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i40e: Fix VF's link state notification
[linux-2.6-block.git] / drivers / net / ethernet / intel / i40e / i40e_virtchnl_pf.c
CommitLineData
ae06c70b 1// SPDX-License-Identifier: GPL-2.0
51dce24b 2/* Copyright(c) 2013 - 2018 Intel Corporation. */
5c3c48ac
JB		 3
4#include "i40e.h"
5
532b0455
MW		 6/*********************notification routines***********************/
7
8/**
9 * i40e_vc_vf_broadcast
10 * @pf: pointer to the PF structure
f5254429
JK		 11 * @v_opcode: operation code
12 * @v_retval: return value
532b0455
MW		 13 * @msg: pointer to the msg buffer
14 * @msglen: msg length
15 *
16 * send a message to all VFs on a given PF
17 **/
18static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
310a2ad9 19 enum virtchnl_ops v_opcode,
532b0455
MW		 20 i40e_status v_retval, u8 *msg,
21 u16 msglen)
22{
23 struct i40e_hw *hw = &pf->hw;
24 struct i40e_vf *vf = pf->vf;
25 int i;
26
27 for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
a1b5a24f 28 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455 29 /* Not all vfs are enabled so skip the ones that are not */
6322e63c
JK		 30 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
31 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 32 continue;
33
34 /* Ignore return value on purpose - a given VF may fail, but
35 * we need to keep going and send to all of them
36 */
37 i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
38 msg, msglen, NULL);
39 }
40}
41
42/**
55f7d723 43 * i40e_vc_notify_vf_link_state
532b0455
MW		 44 * @vf: pointer to the VF structure
45 *
46 * send a link status message to a single VF
47 **/
48static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf)
49{
310a2ad9 50 struct virtchnl_pf_event pfe;
532b0455
MW		 51 struct i40e_pf *pf = vf->pf;
52 struct i40e_hw *hw = &pf->hw;
53 struct i40e_link_status *ls = &pf->hw.phy.link_info;
a1b5a24f 54 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455 55
310a2ad9 56 pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
ff3f4cc2 57 pfe.severity = PF_EVENT_SEVERITY_INFO;
532b0455
MW		 58 if (vf->link_forced) {
59 pfe.event_data.link_event.link_status = vf->link_up;
60 pfe.event_data.link_event.link_speed =
5b643479 61 (vf->link_up ? VIRTCHNL_LINK_SPEED_40GB : 0);
532b0455
MW		 62 } else {
63 pfe.event_data.link_event.link_status =
64 ls->link_info & I40E_AQ_LINK_UP;
ff3f4cc2 65 pfe.event_data.link_event.link_speed =
5b643479 66 i40e_virtchnl_link_speed(ls->link_speed);
532b0455 67 }
310a2ad9 68 i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
532b0455
MW		 69 0, (u8 *)&pfe, sizeof(pfe), NULL);
70}
71
72/**
73 * i40e_vc_notify_link_state
74 * @pf: pointer to the PF structure
75 *
76 * send a link status message to all VFs on a given PF
77 **/
78void i40e_vc_notify_link_state(struct i40e_pf *pf)
79{
80 int i;
81
82 for (i = 0; i < pf->num_alloc_vfs; i++)
83 i40e_vc_notify_vf_link_state(&pf->vf[i]);
84}
85
86/**
87 * i40e_vc_notify_reset
88 * @pf: pointer to the PF structure
89 *
90 * indicate a pending reset to all VFs on a given PF
91 **/
92void i40e_vc_notify_reset(struct i40e_pf *pf)
93{
310a2ad9 94 struct virtchnl_pf_event pfe;
532b0455 95
310a2ad9 96 pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
ff3f4cc2 97 pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
310a2ad9
JB		 98 i40e_vc_vf_broadcast(pf, VIRTCHNL_OP_EVENT, 0,
99 (u8 *)&pfe, sizeof(struct virtchnl_pf_event));
532b0455
MW		 100}
101
102/**
103 * i40e_vc_notify_vf_reset
104 * @vf: pointer to the VF structure
105 *
106 * indicate a pending reset to the given VF
107 **/
108void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
109{
310a2ad9 110 struct virtchnl_pf_event pfe;
532b0455
MW		 111 int abs_vf_id;
112
113 /* validate the request */
114 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
115 return;
116
117 /* verify if the VF is in either init or active before proceeding */
6322e63c
JK		 118 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
119 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 120 return;
121
a1b5a24f 122 abs_vf_id = vf->vf_id + (int)vf->pf->hw.func_caps.vf_base_id;
532b0455 123
310a2ad9 124 pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
ff3f4cc2 125 pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
310a2ad9 126 i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, VIRTCHNL_OP_EVENT,
532b0455 127 0, (u8 *)&pfe,
310a2ad9 128 sizeof(struct virtchnl_pf_event), NULL);
532b0455 129}
5c3c48ac
JB		 130/***********************misc routines*****************************/
131
f9b4b627
GR		 132/**
133 * i40e_vc_disable_vf
b40c82e6 134 * @vf: pointer to the VF info
f9b4b627 135 *
d43d60e5 136 * Disable the VF through a SW reset.
f9b4b627 137 **/
eeeddbb8 138static inline void i40e_vc_disable_vf(struct i40e_vf *vf)
f9b4b627 139{
d43d60e5
JK		 140 int i;
141
54f455ee 142 i40e_vc_notify_vf_reset(vf);
d43d60e5
JK		 143
144 /* We want to ensure that an actual reset occurs initiated after this
145 * function was called. However, we do not want to wait forever, so
146 * we'll give a reasonable time and print a message if we failed to
147 * ensure a reset.
148 */
149 for (i = 0; i < 20; i++) {
150 if (i40e_reset_vf(vf, false))
151 return;
152 usleep_range(10000, 20000);
153 }
154
155 dev_warn(&vf->pf->pdev->dev,
156 "Failed to initiate reset for VF %d after 200 milliseconds\n",
157 vf->vf_id);
f9b4b627
GR		 158}
159
5c3c48ac
JB		 160/**
161 * i40e_vc_isvalid_vsi_id
b40c82e6
JK		 162 * @vf: pointer to the VF info
163 * @vsi_id: VF relative VSI id
5c3c48ac 164 *
b40c82e6 165 * check for the valid VSI id
5c3c48ac 166 **/
fdf0e0bf 167static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id)
5c3c48ac
JB		 168{
169 struct i40e_pf *pf = vf->pf;
fdf0e0bf 170 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 171
fdf0e0bf 172 return (vsi && (vsi->vf_id == vf->vf_id));
5c3c48ac
JB		 173}
174
175/**
176 * i40e_vc_isvalid_queue_id
b40c82e6 177 * @vf: pointer to the VF info
5c3c48ac
JB		 178 * @vsi_id: vsi id
179 * @qid: vsi relative queue id
180 *
181 * check for the valid queue id
182 **/
fdf0e0bf 183static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 184 u8 qid)
185{
186 struct i40e_pf *pf = vf->pf;
fdf0e0bf 187 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 188
fdf0e0bf 189 return (vsi && (qid < vsi->alloc_queue_pairs));
5c3c48ac
JB		 190}
191
192/**
193 * i40e_vc_isvalid_vector_id
b40c82e6
JK		 194 * @vf: pointer to the VF info
195 * @vector_id: VF relative vector id
5c3c48ac
JB		 196 *
197 * check for the valid vector id
198 **/
199static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
200{
201 struct i40e_pf *pf = vf->pf;
202
9347eb77 203 return vector_id < pf->hw.func_caps.num_msix_vectors_vf;
5c3c48ac
JB		 204}
205
206/***********************vf resource mgmt routines*****************/
207
208/**
209 * i40e_vc_get_pf_queue_id
b40c82e6 210 * @vf: pointer to the VF info
fdf0e0bf 211 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 212 * @vsi_queue_id: vsi relative queue id
213 *
b40c82e6 214 * return PF relative queue id
5c3c48ac 215 **/
fdf0e0bf 216static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 217 u8 vsi_queue_id)
218{
219 struct i40e_pf *pf = vf->pf;
fdf0e0bf 220 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac
JB		 221 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
222
fdf0e0bf
ASJ		 223 if (!vsi)
224 return pf_queue_id;
225
5c3c48ac
JB		 226 if (le16_to_cpu(vsi->info.mapping_flags) &
227 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
228 pf_queue_id =
229 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
230 else
231 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
232 vsi_queue_id;
233
234 return pf_queue_id;
235}
236
c27eac48
AD		 237/**
238 * i40e_get_real_pf_qid
239 * @vf: pointer to the VF info
240 * @vsi_id: vsi id
241 * @queue_id: queue number
242 *
243 * wrapper function to get pf_queue_id handling ADq code as well
244 **/
245static u16 i40e_get_real_pf_qid(struct i40e_vf *vf, u16 vsi_id, u16 queue_id)
246{
247 int i;
248
249 if (vf->adq_enabled) {
250 /* Although VF considers all the queues(can be 1 to 16) as its
251 * own but they may actually belong to different VSIs(up to 4).
252 * We need to find which queues belongs to which VSI.
253 */
254 for (i = 0; i < vf->num_tc; i++) {
255 if (queue_id < vf->ch[i].num_qps) {
256 vsi_id = vf->ch[i].vsi_id;
257 break;
258 }
259 /* find right queue id which is relative to a
260 * given VSI.
261 */
262 queue_id -= vf->ch[i].num_qps;
263 }
264 }
265
266 return i40e_vc_get_pf_queue_id(vf, vsi_id, queue_id);
267}
268
5c3c48ac
JB		 269/**
270 * i40e_config_irq_link_list
b40c82e6 271 * @vf: pointer to the VF info
fdf0e0bf 272 * @vsi_id: id of VSI as given by the FW
5c3c48ac
JB		 273 * @vecmap: irq map info
274 *
275 * configure irq link list from the map
276 **/
fdf0e0bf 277static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
310a2ad9 278 struct virtchnl_vector_map *vecmap)
5c3c48ac
JB		 279{
280 unsigned long linklistmap = 0, tempmap;
281 struct i40e_pf *pf = vf->pf;
282 struct i40e_hw *hw = &pf->hw;
283 u16 vsi_queue_id, pf_queue_id;
284 enum i40e_queue_type qtype;
9bcc07f0 285 u16 next_q, vector_id, size;
5c3c48ac
JB		 286 u32 reg, reg_idx;
287 u16 itr_idx = 0;
288
289 vector_id = vecmap->vector_id;
290 /* setup the head */
291 if (0 == vector_id)
292 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
293 else
294 reg_idx = I40E_VPINT_LNKLSTN(
9347eb77
MW		 295 ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) +
296 (vector_id - 1));
5c3c48ac
JB		 297
298 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
299 /* Special case - No queues mapped on this vector */
300 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
301 goto irq_list_done;
302 }
303 tempmap = vecmap->rxq_map;
4836650b 304 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 305 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
306 vsi_queue_id));
5c3c48ac
JB		 307 }
308
309 tempmap = vecmap->txq_map;
4836650b 310 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 311 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
312 vsi_queue_id + 1));
5c3c48ac
JB		 313 }
314
9bcc07f0
LY		 315 size = I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES;
316 next_q = find_first_bit(&linklistmap, size);
317 if (unlikely(next_q == size))
b861fb76
LY		 318 goto irq_list_done;
319
b82bc49e
MW		 320 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
321 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
c27eac48 322 pf_queue_id = i40e_get_real_pf_qid(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 323 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
324
325 wr32(hw, reg_idx, reg);
326
9bcc07f0 327 while (next_q < size) {
5c3c48ac
JB		 328 switch (qtype) {
329 case I40E_QUEUE_TYPE_RX:
330 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
331 itr_idx = vecmap->rxitr_idx;
332 break;
333 case I40E_QUEUE_TYPE_TX:
334 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
335 itr_idx = vecmap->txitr_idx;
336 break;
337 default:
338 break;
339 }
340
9bcc07f0
LY		 341 next_q = find_next_bit(&linklistmap, size, next_q + 1);
342 if (next_q < size) {
5c3c48ac
JB		 343 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
344 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
c27eac48
AD		 345 pf_queue_id = i40e_get_real_pf_qid(vf,
346 vsi_id,
347 vsi_queue_id);
5c3c48ac
JB		 348 } else {
349 pf_queue_id = I40E_QUEUE_END_OF_LIST;
350 qtype = 0;
351 }
352
353 /* format for the RQCTL & TQCTL regs is same */
354 reg = (vector_id) |
355 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
356 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
41a1d04b 357 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
5c3c48ac
JB		 358 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
359 wr32(hw, reg_idx, reg);
360 }
361
b8262a6d
ASJ		 362 /* if the vf is running in polling mode and using interrupt zero,
363 * need to disable auto-mask on enabling zero interrupt for VFs.
364 */
310a2ad9 365 if ((vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
b8262a6d
ASJ		 366 (vector_id == 0)) {
367 reg = rd32(hw, I40E_GLINT_CTL);
368 if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
369 reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
370 wr32(hw, I40E_GLINT_CTL, reg);
371 }
372 }
373
5c3c48ac
JB		 374irq_list_done:
375 i40e_flush(hw);
376}
377
e3219ce6
ASJ		 378/**
379 * i40e_release_iwarp_qvlist
380 * @vf: pointer to the VF.
381 *
382 **/
383static void i40e_release_iwarp_qvlist(struct i40e_vf *vf)
384{
385 struct i40e_pf *pf = vf->pf;
310a2ad9 386 struct virtchnl_iwarp_qvlist_info *qvlist_info = vf->qvlist_info;
e3219ce6
ASJ		 387 u32 msix_vf;
388 u32 i;
389
390 if (!vf->qvlist_info)
391 return;
392
393 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
394 for (i = 0; i < qvlist_info->num_vectors; i++) {
310a2ad9 395 struct virtchnl_iwarp_qv_info *qv_info;
e3219ce6
ASJ		 396 u32 next_q_index, next_q_type;
397 struct i40e_hw *hw = &pf->hw;
398 u32 v_idx, reg_idx, reg;
399
400 qv_info = &qvlist_info->qv_info[i];
401 if (!qv_info)
402 continue;
403 v_idx = qv_info->v_idx;
404 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
405 /* Figure out the queue after CEQ and make that the
406 * first queue.
407 */
408 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
409 reg = rd32(hw, I40E_VPINT_CEQCTL(reg_idx));
410 next_q_index = (reg & I40E_VPINT_CEQCTL_NEXTQ_INDX_MASK)
411 >> I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT;
412 next_q_type = (reg & I40E_VPINT_CEQCTL_NEXTQ_TYPE_MASK)
413 >> I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT;
414
415 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
416 reg = (next_q_index &
417 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
418 (next_q_type <<
419 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
420
421 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
422 }
423 }
424 kfree(vf->qvlist_info);
425 vf->qvlist_info = NULL;
426}
427
428/**
429 * i40e_config_iwarp_qvlist
430 * @vf: pointer to the VF info
431 * @qvlist_info: queue and vector list
432 *
433 * Return 0 on success or < 0 on error
434 **/
435static int i40e_config_iwarp_qvlist(struct i40e_vf *vf,
310a2ad9 436 struct virtchnl_iwarp_qvlist_info *qvlist_info)
e3219ce6
ASJ		 437{
438 struct i40e_pf *pf = vf->pf;
439 struct i40e_hw *hw = &pf->hw;
310a2ad9 440 struct virtchnl_iwarp_qv_info *qv_info;
e3219ce6
ASJ		 441 u32 v_idx, i, reg_idx, reg;
442 u32 next_q_idx, next_q_type;
443 u32 msix_vf, size;
444
310a2ad9
JB		 445 size = sizeof(struct virtchnl_iwarp_qvlist_info) +
446 (sizeof(struct virtchnl_iwarp_qv_info) *
e3219ce6
ASJ		 447 (qvlist_info->num_vectors - 1));
448 vf->qvlist_info = kzalloc(size, GFP_KERNEL);
54902349
CJ		 449 if (!vf->qvlist_info)
450 return -ENOMEM;
451
e3219ce6
ASJ		 452 vf->qvlist_info->num_vectors = qvlist_info->num_vectors;
453
454 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
455 for (i = 0; i < qvlist_info->num_vectors; i++) {
456 qv_info = &qvlist_info->qv_info[i];
457 if (!qv_info)
458 continue;
459 v_idx = qv_info->v_idx;
460
461 /* Validate vector id belongs to this vf */
462 if (!i40e_vc_isvalid_vector_id(vf, v_idx))
463 goto err;
464
465 vf->qvlist_info->qv_info[i] = *qv_info;
466
467 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
468 /* We might be sharing the interrupt, so get the first queue
469 * index and type, push it down the list by adding the new
470 * queue on top. Also link it with the new queue in CEQCTL.
471 */
472 reg = rd32(hw, I40E_VPINT_LNKLSTN(reg_idx));
473 next_q_idx = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) >>
474 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT);
475 next_q_type = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK) >>
476 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
477
478 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
479 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
480 reg = (I40E_VPINT_CEQCTL_CAUSE_ENA_MASK |
481 (v_idx << I40E_VPINT_CEQCTL_MSIX_INDX_SHIFT) |
482 (qv_info->itr_idx << I40E_VPINT_CEQCTL_ITR_INDX_SHIFT) |
483 (next_q_type << I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT) |
484 (next_q_idx << I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT));
485 wr32(hw, I40E_VPINT_CEQCTL(reg_idx), reg);
486
487 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
488 reg = (qv_info->ceq_idx &
489 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
490 (I40E_QUEUE_TYPE_PE_CEQ <<
491 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
492 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
493 }
494
495 if (qv_info->aeq_idx != I40E_QUEUE_INVALID_IDX) {
496 reg = (I40E_VPINT_AEQCTL_CAUSE_ENA_MASK |
497 (v_idx << I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT) |
498 (qv_info->itr_idx << I40E_VPINT_AEQCTL_ITR_INDX_SHIFT));
499
500 wr32(hw, I40E_VPINT_AEQCTL(vf->vf_id), reg);
501 }
502 }
503
504 return 0;
505err:
506 kfree(vf->qvlist_info);
507 vf->qvlist_info = NULL;
508 return -EINVAL;
509}
510
5c3c48ac
JB		 511/**
512 * i40e_config_vsi_tx_queue
b40c82e6 513 * @vf: pointer to the VF info
fdf0e0bf 514 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 515 * @vsi_queue_id: vsi relative queue index
516 * @info: config. info
517 *
518 * configure tx queue
519 **/
fdf0e0bf 520static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac 521 u16 vsi_queue_id,
310a2ad9 522 struct virtchnl_txq_info *info)
5c3c48ac
JB		 523{
524 struct i40e_pf *pf = vf->pf;
525 struct i40e_hw *hw = &pf->hw;
526 struct i40e_hmc_obj_txq tx_ctx;
fdf0e0bf 527 struct i40e_vsi *vsi;
5c3c48ac
JB		 528 u16 pf_queue_id;
529 u32 qtx_ctl;
530 int ret = 0;
531
d4a0658d
CW		 532 if (!i40e_vc_isvalid_vsi_id(vf, info->vsi_id)) {
533 ret = -ENOENT;
534 goto error_context;
535 }
fdf0e0bf
ASJ		 536 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
537 vsi = i40e_find_vsi_from_id(pf, vsi_id);
d4a0658d
CW		 538 if (!vsi) {
539 ret = -ENOENT;
540 goto error_context;
541 }
5c3c48ac
JB		 542
543 /* clear the context structure first */
544 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
545
546 /* only set the required fields */
547 tx_ctx.base = info->dma_ring_addr / 128;
548 tx_ctx.qlen = info->ring_len;
fdf0e0bf 549 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
5c3c48ac 550 tx_ctx.rdylist_act = 0;
5d29896a
AS		 551 tx_ctx.head_wb_ena = info->headwb_enabled;
552 tx_ctx.head_wb_addr = info->dma_headwb_addr;
5c3c48ac
JB		 553
554 /* clear the context in the HMC */
555 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
556 if (ret) {
557 dev_err(&pf->pdev->dev,
558 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
559 pf_queue_id, ret);
560 ret = -ENOENT;
561 goto error_context;
562 }
563
564 /* set the context in the HMC */
565 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
566 if (ret) {
567 dev_err(&pf->pdev->dev,
568 "Failed to set VF LAN Tx queue context %d error: %d\n",
569 pf_queue_id, ret);
570 ret = -ENOENT;
571 goto error_context;
572 }
573
574 /* associate this queue with the PCI VF function */
575 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
13fd9774 576 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
5c3c48ac
JB		 577 & I40E_QTX_CTL_PF_INDX_MASK);
578 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
579 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
580 & I40E_QTX_CTL_VFVM_INDX_MASK);
581 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
582 i40e_flush(hw);
583
584error_context:
585 return ret;
586}
587
588/**
589 * i40e_config_vsi_rx_queue
b40c82e6 590 * @vf: pointer to the VF info
fdf0e0bf 591 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 592 * @vsi_queue_id: vsi relative queue index
593 * @info: config. info
594 *
595 * configure rx queue
596 **/
fdf0e0bf 597static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac 598 u16 vsi_queue_id,
310a2ad9 599 struct virtchnl_rxq_info *info)
5c3c48ac
JB		 600{
601 struct i40e_pf *pf = vf->pf;
602 struct i40e_hw *hw = &pf->hw;
603 struct i40e_hmc_obj_rxq rx_ctx;
604 u16 pf_queue_id;
605 int ret = 0;
606
fdf0e0bf 607 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 608
609 /* clear the context structure first */
610 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
611
612 /* only set the required fields */
613 rx_ctx.base = info->dma_ring_addr / 128;
614 rx_ctx.qlen = info->ring_len;
615
616 if (info->splithdr_enabled) {
617 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
618 I40E_RX_SPLIT_IP |
619 I40E_RX_SPLIT_TCP_UDP |
620 I40E_RX_SPLIT_SCTP;
621 /* header length validation */
622 if (info->hdr_size > ((2 * 1024) - 64)) {
623 ret = -EINVAL;
624 goto error_param;
625 }
626 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
627
19b85e67 628 /* set split mode 10b */
d6b3bca1 629 rx_ctx.dtype = I40E_RX_DTYPE_HEADER_SPLIT;
5c3c48ac
JB		 630 }
631
632 /* databuffer length validation */
633 if (info->databuffer_size > ((16 * 1024) - 128)) {
634 ret = -EINVAL;
635 goto error_param;
636 }
637 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
638
639 /* max pkt. length validation */
640 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
641 ret = -EINVAL;
642 goto error_param;
643 }
644 rx_ctx.rxmax = info->max_pkt_size;
645
646 /* enable 32bytes desc always */
647 rx_ctx.dsize = 1;
648
649 /* default values */
7362be9e 650 rx_ctx.lrxqthresh = 1;
5c3c48ac 651 rx_ctx.crcstrip = 1;
50d41659 652 rx_ctx.prefena = 1;
c1d11cef 653 rx_ctx.l2tsel = 1;
5c3c48ac
JB		 654
655 /* clear the context in the HMC */
656 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
657 if (ret) {
658 dev_err(&pf->pdev->dev,
659 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
660 pf_queue_id, ret);
661 ret = -ENOENT;
662 goto error_param;
663 }
664
665 /* set the context in the HMC */
666 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
667 if (ret) {
668 dev_err(&pf->pdev->dev,
669 "Failed to set VF LAN Rx queue context %d error: %d\n",
670 pf_queue_id, ret);
671 ret = -ENOENT;
672 goto error_param;
673 }
674
675error_param:
676 return ret;
677}
678
679/**
680 * i40e_alloc_vsi_res
b40c82e6 681 * @vf: pointer to the VF info
c27eac48 682 * @idx: VSI index, applies only for ADq mode, zero otherwise
5c3c48ac 683 *
b40c82e6 684 * alloc VF vsi context & resources
5c3c48ac 685 **/
c27eac48 686static int i40e_alloc_vsi_res(struct i40e_vf *vf, u8 idx)
5c3c48ac
JB		 687{
688 struct i40e_mac_filter *f = NULL;
689 struct i40e_pf *pf = vf->pf;
5c3c48ac 690 struct i40e_vsi *vsi;
0c483bd4 691 u64 max_tx_rate = 0;
5c3c48ac
JB		 692 int ret = 0;
693
c27eac48
AD		 694 vsi = i40e_vsi_setup(pf, I40E_VSI_SRIOV, pf->vsi[pf->lan_vsi]->seid,
695 vf->vf_id);
5c3c48ac
JB		 696
697 if (!vsi) {
698 dev_err(&pf->pdev->dev,
b40c82e6 699 "add vsi failed for VF %d, aq_err %d\n",
5c3c48ac
JB		 700 vf->vf_id, pf->hw.aq.asq_last_status);
701 ret = -ENOENT;
702 goto error_alloc_vsi_res;
703 }
c27eac48
AD		 704
705 if (!idx) {
bb360717 706 u64 hena = i40e_pf_get_default_rss_hena(pf);
435c084a 707 u8 broadcast[ETH_ALEN];
bb360717 708
fdf0e0bf 709 vf->lan_vsi_idx = vsi->idx;
5c3c48ac 710 vf->lan_vsi_id = vsi->id;
6c12fcbf
GR		 711 /* If the port VLAN has been configured and then the
712 * VF driver was removed then the VSI port VLAN
713 * configuration was destroyed. Check if there is
714 * a port VLAN and restore the VSI configuration if
715 * needed.
716 */
717 if (vf->port_vlan_id)
718 i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
21659035 719
278e7d0b 720 spin_lock_bh(&vsi->mac_filter_hash_lock);
b7b713a8 721 if (is_valid_ether_addr(vf->default_lan_addr.addr)) {
9569a9a4
JK		 722 f = i40e_add_mac_filter(vsi,
723 vf->default_lan_addr.addr);
b7b713a8
MW		 724 if (!f)
725 dev_info(&pf->pdev->dev,
726 "Could not add MAC filter %pM for VF %d\n",
727 vf->default_lan_addr.addr, vf->vf_id);
728 }
435c084a 729 eth_broadcast_addr(broadcast);
9569a9a4 730 f = i40e_add_mac_filter(vsi, broadcast);
435c084a
JK		 731 if (!f)
732 dev_info(&pf->pdev->dev,
733 "Could not allocate VF broadcast filter\n");
278e7d0b 734 spin_unlock_bh(&vsi->mac_filter_hash_lock);
26f77e53
LY		 735 wr32(&pf->hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)hena);
736 wr32(&pf->hw, I40E_VFQF_HENA1(1, vf->vf_id), (u32)(hena >> 32));
c27eac48
AD		 737 /* program mac filter only for VF VSI */
738 ret = i40e_sync_vsi_filters(vsi);
739 if (ret)
740 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
5c3c48ac 741 }
6dbbbfb2 742
c27eac48
AD		 743 /* storing VSI index and id for ADq and don't apply the mac filter */
744 if (vf->adq_enabled) {
745 vf->ch[idx].vsi_idx = vsi->idx;
746 vf->ch[idx].vsi_id = vsi->id;
747 }
5c3c48ac 748
6b192891
MW		 749 /* Set VF bandwidth if specified */
750 if (vf->tx_rate) {
0c483bd4
AD		 751 max_tx_rate = vf->tx_rate;
752 } else if (vf->ch[idx].max_tx_rate) {
753 max_tx_rate = vf->ch[idx].max_tx_rate;
754 }
755
756 if (max_tx_rate) {
757 max_tx_rate = div_u64(max_tx_rate, I40E_BW_CREDIT_DIVISOR);
6b192891 758 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
0c483bd4 759 max_tx_rate, 0, NULL);
6b192891
MW		 760 if (ret)
761 dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
762 vf->vf_id, ret);
763 }
764
5c3c48ac
JB		 765error_alloc_vsi_res:
766 return ret;
767}
768
c27eac48
AD		 769/**
770 * i40e_map_pf_queues_to_vsi
771 * @vf: pointer to the VF info
772 *
773 * PF maps LQPs to a VF by programming VSILAN_QTABLE & VPLAN_QTABLE. This
774 * function takes care of first part VSILAN_QTABLE, mapping pf queues to VSI.
775 **/
776static void i40e_map_pf_queues_to_vsi(struct i40e_vf *vf)
777{
778 struct i40e_pf *pf = vf->pf;
779 struct i40e_hw *hw = &pf->hw;
780 u32 reg, num_tc = 1; /* VF has at least one traffic class */
781 u16 vsi_id, qps;
782 int i, j;
783
784 if (vf->adq_enabled)
785 num_tc = vf->num_tc;
786
787 for (i = 0; i < num_tc; i++) {
788 if (vf->adq_enabled) {
789 qps = vf->ch[i].num_qps;
790 vsi_id = vf->ch[i].vsi_id;
791 } else {
792 qps = pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
793 vsi_id = vf->lan_vsi_id;
794 }
795
796 for (j = 0; j < 7; j++) {
797 if (j * 2 >= qps) {
798 /* end of list */
799 reg = 0x07FF07FF;
800 } else {
801 u16 qid = i40e_vc_get_pf_queue_id(vf,
802 vsi_id,
803 j * 2);
804 reg = qid;
805 qid = i40e_vc_get_pf_queue_id(vf, vsi_id,
806 (j * 2) + 1);
807 reg |= qid << 16;
808 }
809 i40e_write_rx_ctl(hw,
810 I40E_VSILAN_QTABLE(j, vsi_id),
811 reg);
812 }
813 }
814}
815
816/**
817 * i40e_map_pf_to_vf_queues
818 * @vf: pointer to the VF info
819 *
820 * PF maps LQPs to a VF by programming VSILAN_QTABLE & VPLAN_QTABLE. This
821 * function takes care of the second part VPLAN_QTABLE & completes VF mappings.
822 **/
823static void i40e_map_pf_to_vf_queues(struct i40e_vf *vf)
824{
825 struct i40e_pf *pf = vf->pf;
826 struct i40e_hw *hw = &pf->hw;
827 u32 reg, total_qps = 0;
828 u32 qps, num_tc = 1; /* VF has at least one traffic class */
829 u16 vsi_id, qid;
830 int i, j;
831
832 if (vf->adq_enabled)
833 num_tc = vf->num_tc;
834
835 for (i = 0; i < num_tc; i++) {
836 if (vf->adq_enabled) {
837 qps = vf->ch[i].num_qps;
838 vsi_id = vf->ch[i].vsi_id;
839 } else {
840 qps = pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
841 vsi_id = vf->lan_vsi_id;
842 }
843
844 for (j = 0; j < qps; j++) {
845 qid = i40e_vc_get_pf_queue_id(vf, vsi_id, j);
846
847 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
848 wr32(hw, I40E_VPLAN_QTABLE(total_qps, vf->vf_id),
849 reg);
850 total_qps++;
851 }
852 }
853}
854
805bd5bd
MW		 855/**
856 * i40e_enable_vf_mappings
b40c82e6 857 * @vf: pointer to the VF info
805bd5bd 858 *
b40c82e6 859 * enable VF mappings
805bd5bd
MW		 860 **/
861static void i40e_enable_vf_mappings(struct i40e_vf *vf)
862{
863 struct i40e_pf *pf = vf->pf;
864 struct i40e_hw *hw = &pf->hw;
c27eac48 865 u32 reg;
805bd5bd
MW		 866
867 /* Tell the hardware we're using noncontiguous mapping. HW requires
868 * that VF queues be mapped using this method, even when they are
869 * contiguous in real life
870 */
272cdaf2
SN		 871 i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
872 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
805bd5bd
MW		 873
874 /* enable VF vplan_qtable mappings */
875 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
876 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
877
c27eac48
AD		 878 i40e_map_pf_to_vf_queues(vf);
879 i40e_map_pf_queues_to_vsi(vf);
805bd5bd
MW		 880
881 i40e_flush(hw);
882}
883
884/**
885 * i40e_disable_vf_mappings
b40c82e6 886 * @vf: pointer to the VF info
805bd5bd 887 *
b40c82e6 888 * disable VF mappings
805bd5bd
MW		 889 **/
890static void i40e_disable_vf_mappings(struct i40e_vf *vf)
891{
892 struct i40e_pf *pf = vf->pf;
893 struct i40e_hw *hw = &pf->hw;
894 int i;
895
896 /* disable qp mappings */
897 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
898 for (i = 0; i < I40E_MAX_VSI_QP; i++)
899 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
900 I40E_QUEUE_END_OF_LIST);
901 i40e_flush(hw);
902}
903
904/**
905 * i40e_free_vf_res
b40c82e6 906 * @vf: pointer to the VF info
805bd5bd 907 *
b40c82e6 908 * free VF resources
805bd5bd
MW		 909 **/
910static void i40e_free_vf_res(struct i40e_vf *vf)
911{
912 struct i40e_pf *pf = vf->pf;
fc18eaa0
MW		 913 struct i40e_hw *hw = &pf->hw;
914 u32 reg_idx, reg;
c27eac48 915 int i, j, msix_vf;
805bd5bd 916
beff3e9d
RK		 917 /* Start by disabling VF's configuration API to prevent the OS from
918 * accessing the VF's VSI after it's freed / invalidated.
919 */
6322e63c 920 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 921
a3f5aa90
AB		 922 /* It's possible the VF had requeuested more queues than the default so
923 * do the accounting here when we're about to free them.
924 */
925 if (vf->num_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF) {
926 pf->queues_left += vf->num_queue_pairs -
927 I40E_DEFAULT_QUEUES_PER_VF;
928 }
929
805bd5bd 930 /* free vsi & disconnect it from the parent uplink */
fdf0e0bf
ASJ		 931 if (vf->lan_vsi_idx) {
932 i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]);
933 vf->lan_vsi_idx = 0;
805bd5bd 934 vf->lan_vsi_id = 0;
13fd3f9c 935 vf->num_mac = 0;
805bd5bd 936 }
c27eac48
AD		 937
938 /* do the accounting and remove additional ADq VSI's */
939 if (vf->adq_enabled && vf->ch[0].vsi_idx) {
940 for (j = 0; j < vf->num_tc; j++) {
941 /* At this point VSI0 is already released so don't
942 * release it again and only clear their values in
943 * structure variables
944 */
945 if (j)
946 i40e_vsi_release(pf->vsi[vf->ch[j].vsi_idx]);
947 vf->ch[j].vsi_idx = 0;
948 vf->ch[j].vsi_id = 0;
949 }
950 }
9347eb77
MW		 951 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
952
fc18eaa0
MW		 953 /* disable interrupts so the VF starts in a known state */
954 for (i = 0; i < msix_vf; i++) {
955 /* format is same for both registers */
956 if (0 == i)
957 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
958 else
959 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
960 (vf->vf_id))
961 + (i - 1));
962 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
963 i40e_flush(hw);
964 }
805bd5bd 965
fc18eaa0
MW		 966 /* clear the irq settings */
967 for (i = 0; i < msix_vf; i++) {
968 /* format is same for both registers */
969 if (0 == i)
970 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
971 else
972 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
973 (vf->vf_id))
974 + (i - 1));
975 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
976 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
977 wr32(hw, reg_idx, reg);
978 i40e_flush(hw);
979 }
b564d62e 980 /* reset some of the state variables keeping track of the resources */
805bd5bd 981 vf->num_queue_pairs = 0;
41d0a4d0
AB		 982 clear_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
983 clear_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
805bd5bd
MW		 984}
985
986/**
987 * i40e_alloc_vf_res
b40c82e6 988 * @vf: pointer to the VF info
805bd5bd 989 *
b40c82e6 990 * allocate VF resources
805bd5bd
MW		 991 **/
992static int i40e_alloc_vf_res(struct i40e_vf *vf)
993{
994 struct i40e_pf *pf = vf->pf;
995 int total_queue_pairs = 0;
c27eac48 996 int ret, idx;
805bd5bd 997
a3f5aa90
AB		 998 if (vf->num_req_queues &&
999 vf->num_req_queues <= pf->queues_left + I40E_DEFAULT_QUEUES_PER_VF)
1000 pf->num_vf_qps = vf->num_req_queues;
1001 else
1002 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
1003
805bd5bd 1004 /* allocate hw vsi context & associated resources */
c27eac48 1005 ret = i40e_alloc_vsi_res(vf, 0);
805bd5bd
MW		 1006 if (ret)
1007 goto error_alloc;
fdf0e0bf 1008 total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
692fb0a7 1009
c27eac48
AD		 1010 /* allocate additional VSIs based on tc information for ADq */
1011 if (vf->adq_enabled) {
1012 if (pf->queues_left >=
1013 (I40E_MAX_VF_QUEUES - I40E_DEFAULT_QUEUES_PER_VF)) {
1014 /* TC 0 always belongs to VF VSI */
1015 for (idx = 1; idx < vf->num_tc; idx++) {
1016 ret = i40e_alloc_vsi_res(vf, idx);
1017 if (ret)
1018 goto error_alloc;
1019 }
1020 /* send correct number of queues */
1021 total_queue_pairs = I40E_MAX_VF_QUEUES;
1022 } else {
1023 dev_info(&pf->pdev->dev, "VF %d: Not enough queues to allocate, disabling ADq\n",
1024 vf->vf_id);
1025 vf->adq_enabled = false;
1026 }
1027 }
1028
a3f5aa90
AB		 1029 /* We account for each VF to get a default number of queue pairs. If
1030 * the VF has now requested more, we need to account for that to make
1031 * certain we never request more queues than we actually have left in
1032 * HW.
1033 */
1034 if (total_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF)
1035 pf->queues_left -=
1036 total_queue_pairs - I40E_DEFAULT_QUEUES_PER_VF;
1037
692fb0a7
ASJ		 1038 if (vf->trusted)
1039 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
1040 else
1041 clear_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
805bd5bd
MW		 1042
1043 /* store the total qps number for the runtime
b40c82e6 1044 * VF req validation
805bd5bd
MW		 1045 */
1046 vf->num_queue_pairs = total_queue_pairs;
1047
b40c82e6 1048 /* VF is now completely initialized */
6322e63c 1049 set_bit(I40E_VF_STATE_INIT, &vf->vf_states);
805bd5bd
MW		 1050
1051error_alloc:
1052 if (ret)
1053 i40e_free_vf_res(vf);
1054
1055 return ret;
1056}
1057
fc18eaa0
MW		 1058#define VF_DEVICE_STATUS 0xAA
1059#define VF_TRANS_PENDING_MASK 0x20
1060/**
1061 * i40e_quiesce_vf_pci
b40c82e6 1062 * @vf: pointer to the VF structure
fc18eaa0
MW		 1063 *
1064 * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
1065 * if the transactions never clear.
1066 **/
1067static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
1068{
1069 struct i40e_pf *pf = vf->pf;
1070 struct i40e_hw *hw = &pf->hw;
1071 int vf_abs_id, i;
1072 u32 reg;
1073
b141d619 1074 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
fc18eaa0
MW		 1075
1076 wr32(hw, I40E_PF_PCI_CIAA,
1077 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
1078 for (i = 0; i < 100; i++) {
1079 reg = rd32(hw, I40E_PF_PCI_CIAD);
1080 if ((reg & VF_TRANS_PENDING_MASK) == 0)
1081 return 0;
1082 udelay(1);
1083 }
1084 return -EIO;
1085}
1086
5c3c48ac 1087/**
9dc2e417 1088 * i40e_trigger_vf_reset
b40c82e6 1089 * @vf: pointer to the VF structure
5c3c48ac
JB		 1090 * @flr: VFLR was issued or not
1091 *
9dc2e417
JK		 1092 * Trigger hardware to start a reset for a particular VF. Expects the caller
1093 * to wait the proper amount of time to allow hardware to reset the VF before
1094 * it cleans up and restores VF functionality.
5c3c48ac 1095 **/
9dc2e417 1096static void i40e_trigger_vf_reset(struct i40e_vf *vf, bool flr)
5c3c48ac 1097{
5c3c48ac
JB		 1098 struct i40e_pf *pf = vf->pf;
1099 struct i40e_hw *hw = &pf->hw;
7e5a313e 1100 u32 reg, reg_idx, bit_idx;
3ba9bcb4 1101
5c3c48ac 1102 /* warn the VF */
6322e63c 1103 clear_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac 1104
beff3e9d
RK		 1105 /* Disable VF's configuration API during reset. The flag is re-enabled
1106 * in i40e_alloc_vf_res(), when it's safe again to access VF's VSI.
1107 * It's normally disabled in i40e_free_vf_res(), but it's safer
1108 * to do it earlier to give some time to finish to any VF config
1109 * functions that may still be running at this point.
1110 */
6322e63c 1111 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 1112
fc18eaa0
MW		 1113 /* In the case of a VFLR, the HW has already reset the VF and we
1114 * just need to clean up, so don't hit the VFRTRIG register.
5c3c48ac
JB		 1115 */
1116 if (!flr) {
b40c82e6 1117 /* reset VF using VPGEN_VFRTRIG reg */
fc18eaa0
MW		 1118 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1119 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
5c3c48ac
JB		 1120 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
1121 i40e_flush(hw);
1122 }
7369ca87
MW		 1123 /* clear the VFLR bit in GLGEN_VFLRSTAT */
1124 reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
1125 bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
1126 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
30728c5b 1127 i40e_flush(hw);
5c3c48ac 1128
fc18eaa0
MW		 1129 if (i40e_quiesce_vf_pci(vf))
1130 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
1131 vf->vf_id);
9dc2e417 1132}
fc18eaa0 1133
9dc2e417
JK		 1134/**
1135 * i40e_cleanup_reset_vf
1136 * @vf: pointer to the VF structure
1137 *
1138 * Cleanup a VF after the hardware reset is finished. Expects the caller to
1139 * have verified whether the reset is finished properly, and ensure the
1140 * minimum amount of wait time has passed.
1141 **/
1142static void i40e_cleanup_reset_vf(struct i40e_vf *vf)
1143{
1144 struct i40e_pf *pf = vf->pf;
1145 struct i40e_hw *hw = &pf->hw;
1146 u32 reg;
fc18eaa0 1147
beff3e9d 1148 /* free VF resources to begin resetting the VSI state */
fc18eaa0 1149 i40e_free_vf_res(vf);
beff3e9d
RK		 1150
1151 /* Enable hardware by clearing the reset bit in the VPGEN_VFRTRIG reg.
1152 * By doing this we allow HW to access VF memory at any point. If we
1153 * did it any sooner, HW could access memory while it was being freed
1154 * in i40e_free_vf_res(), causing an IOMMU fault.
1155 *
1156 * On the other hand, this needs to be done ASAP, because the VF driver
1157 * is waiting for this to happen and may report a timeout. It's
1158 * harmless, but it gets logged into Guest OS kernel log, so best avoid
1159 * it.
1160 */
1161 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1162 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
1163 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
1164
1165 /* reallocate VF resources to finish resetting the VSI state */
21be99ec 1166 if (!i40e_alloc_vf_res(vf)) {
e3219ce6 1167 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
21be99ec 1168 i40e_enable_vf_mappings(vf);
6322e63c
JK		 1169 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
1170 clear_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
6a23449a 1171 /* Do not notify the client during VF init */
c53d11f6
AB		 1172 if (!test_and_clear_bit(I40E_VF_STATE_PRE_ENABLE,
1173 &vf->vf_states))
6a23449a 1174 i40e_notify_client_of_vf_reset(pf, abs_vf_id);
dc5b4e9f 1175 vf->num_vlan = 0;
21be99ec 1176 }
beff3e9d
RK		 1177
1178 /* Tell the VF driver the reset is done. This needs to be done only
1179 * after VF has been fully initialized, because the VF driver may
1180 * request resources immediately after setting this flag.
1181 */
310a2ad9 1182 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), VIRTCHNL_VFR_VFACTIVE);
9dc2e417
JK		 1183}
1184
1185/**
1186 * i40e_reset_vf
1187 * @vf: pointer to the VF structure
1188 * @flr: VFLR was issued or not
1189 *
d43d60e5 1190 * Returns true if the VF is reset, false otherwise.
9dc2e417 1191 **/
d43d60e5 1192bool i40e_reset_vf(struct i40e_vf *vf, bool flr)
9dc2e417
JK		 1193{
1194 struct i40e_pf *pf = vf->pf;
1195 struct i40e_hw *hw = &pf->hw;
1196 bool rsd = false;
1197 u32 reg;
1198 int i;
1199
d43d60e5
JK		 1200 /* If the VFs have been disabled, this means something else is
1201 * resetting the VF, so we shouldn't continue.
1202 */
0da36b97 1203 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
d43d60e5 1204 return false;
9dc2e417
JK		 1205
1206 i40e_trigger_vf_reset(vf, flr);
1207
1208 /* poll VPGEN_VFRSTAT reg to make sure
1209 * that reset is complete
1210 */
1211 for (i = 0; i < 10; i++) {
1212 /* VF reset requires driver to first reset the VF and then
1213 * poll the status register to make sure that the reset
1214 * completed successfully. Due to internal HW FIFO flushes,
1215 * we must wait 10ms before the register will be valid.
1216 */
1217 usleep_range(10000, 20000);
1218 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1219 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
1220 rsd = true;
1221 break;
1222 }
1223 }
1224
1225 if (flr)
1226 usleep_range(10000, 20000);
1227
1228 if (!rsd)
1229 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1230 vf->vf_id);
1231 usleep_range(10000, 20000);
1232
1233 /* On initial reset, we don't have any queues to disable */
1234 if (vf->lan_vsi_idx != 0)
1235 i40e_vsi_stop_rings(pf->vsi[vf->lan_vsi_idx]);
1236
1237 i40e_cleanup_reset_vf(vf);
7e5a313e 1238
5c3c48ac 1239 i40e_flush(hw);
0da36b97 1240 clear_bit(__I40E_VF_DISABLE, pf->state);
d43d60e5
JK		 1241
1242 return true;
5c3c48ac 1243}
c354229f 1244
e4b433f4
JK		 1245/**
1246 * i40e_reset_all_vfs
1247 * @pf: pointer to the PF structure
1248 * @flr: VFLR was issued or not
1249 *
1250 * Reset all allocated VFs in one go. First, tell the hardware to reset each
1251 * VF, then do all the waiting in one chunk, and finally finish restoring each
1252 * VF after the wait. This is useful during PF routines which need to reset
1253 * all VFs, as otherwise it must perform these resets in a serialized fashion.
d43d60e5
JK		 1254 *
1255 * Returns true if any VFs were reset, and false otherwise.
e4b433f4 1256 **/
d43d60e5 1257bool i40e_reset_all_vfs(struct i40e_pf *pf, bool flr)
e4b433f4
JK		 1258{
1259 struct i40e_hw *hw = &pf->hw;
1260 struct i40e_vf *vf;
1261 int i, v;
1262 u32 reg;
1263
1264 /* If we don't have any VFs, then there is nothing to reset */
1265 if (!pf->num_alloc_vfs)
d43d60e5 1266 return false;
e4b433f4
JK		 1267
1268 /* If VFs have been disabled, there is no need to reset */
0da36b97 1269 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
d43d60e5 1270 return false;
e4b433f4
JK		 1271
1272 /* Begin reset on all VFs at once */
1273 for (v = 0; v < pf->num_alloc_vfs; v++)
1274 i40e_trigger_vf_reset(&pf->vf[v], flr);
1275
1276 /* HW requires some time to make sure it can flush the FIFO for a VF
1277 * when it resets it. Poll the VPGEN_VFRSTAT register for each VF in
1278 * sequence to make sure that it has completed. We'll keep track of
1279 * the VFs using a simple iterator that increments once that VF has
1280 * finished resetting.
1281 */
1282 for (i = 0, v = 0; i < 10 && v < pf->num_alloc_vfs; i++) {
1283 usleep_range(10000, 20000);
1284
1285 /* Check each VF in sequence, beginning with the VF to fail
1286 * the previous check.
1287 */
1288 while (v < pf->num_alloc_vfs) {
1289 vf = &pf->vf[v];
1290 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1291 if (!(reg & I40E_VPGEN_VFRSTAT_VFRD_MASK))
1292 break;
1293
1294 /* If the current VF has finished resetting, move on
1295 * to the next VF in sequence.
1296 */
1297 v++;
1298 }
1299 }
1300
1301 if (flr)
1302 usleep_range(10000, 20000);
1303
1304 /* Display a warning if at least one VF didn't manage to reset in
1305 * time, but continue on with the operation.
1306 */
1307 if (v < pf->num_alloc_vfs)
1308 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1309 pf->vf[v].vf_id);
1310 usleep_range(10000, 20000);
1311
1312 /* Begin disabling all the rings associated with VFs, but do not wait
1313 * between each VF.
1314 */
1315 for (v = 0; v < pf->num_alloc_vfs; v++) {
1316 /* On initial reset, we don't have any queues to disable */
1317 if (pf->vf[v].lan_vsi_idx == 0)
1318 continue;
1319
1320 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[v].lan_vsi_idx]);
1321 }
1322
1323 /* Now that we've notified HW to disable all of the VF rings, wait
1324 * until they finish.
1325 */
1326 for (v = 0; v < pf->num_alloc_vfs; v++) {
1327 /* On initial reset, we don't have any queues to disable */
1328 if (pf->vf[v].lan_vsi_idx == 0)
1329 continue;
1330
1331 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[v].lan_vsi_idx]);
1332 }
1333
1334 /* Hw may need up to 50ms to finish disabling the RX queues. We
1335 * minimize the wait by delaying only once for all VFs.
1336 */
1337 mdelay(50);
1338
1339 /* Finish the reset on each VF */
1340 for (v = 0; v < pf->num_alloc_vfs; v++)
1341 i40e_cleanup_reset_vf(&pf->vf[v]);
1342
1343 i40e_flush(hw);
0da36b97 1344 clear_bit(__I40E_VF_DISABLE, pf->state);
d43d60e5
JK		 1345
1346 return true;
e4b433f4
JK		 1347}
1348
5c3c48ac
JB		 1349/**
1350 * i40e_free_vfs
b40c82e6 1351 * @pf: pointer to the PF structure
5c3c48ac 1352 *
b40c82e6 1353 * free VF resources
5c3c48ac
JB		 1354 **/
1355void i40e_free_vfs(struct i40e_pf *pf)
1356{
f7414531
MW		 1357 struct i40e_hw *hw = &pf->hw;
1358 u32 reg_idx, bit_idx;
1359 int i, tmp, vf_id;
5c3c48ac
JB		 1360
1361 if (!pf->vf)
1362 return;
0da36b97 1363 while (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
3ba9bcb4 1364 usleep_range(1000, 2000);
5c3c48ac 1365
e3219ce6 1366 i40e_notify_client_of_vf_enable(pf, 0);
707d088a
JK		 1367
1368 /* Amortize wait time by stopping all VFs at the same time */
1369 for (i = 0; i < pf->num_alloc_vfs; i++) {
1370 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
1371 continue;
1372
1373 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[i].lan_vsi_idx]);
1374 }
1375
1376 for (i = 0; i < pf->num_alloc_vfs; i++) {
6322e63c 1377 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
707d088a
JK		 1378 continue;
1379
1380 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[i].lan_vsi_idx]);
1381 }
44434638 1382
6a9ddb36
MW		 1383 /* Disable IOV before freeing resources. This lets any VF drivers
1384 * running in the host get themselves cleaned up before we yank
1385 * the carpet out from underneath their feet.
1386 */
1387 if (!pci_vfs_assigned(pf->pdev))
1388 pci_disable_sriov(pf->pdev);
6d7b967d
MW		 1389 else
1390 dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
6a9ddb36 1391
b40c82e6 1392 /* free up VF resources */
6c1b5bff
MW		 1393 tmp = pf->num_alloc_vfs;
1394 pf->num_alloc_vfs = 0;
1395 for (i = 0; i < tmp; i++) {
6322e63c 1396 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
5c3c48ac
JB		 1397 i40e_free_vf_res(&pf->vf[i]);
1398 /* disable qp mappings */
1399 i40e_disable_vf_mappings(&pf->vf[i]);
1400 }
1401
1402 kfree(pf->vf);
1403 pf->vf = NULL;
5c3c48ac 1404
9e5634df
MW		 1405 /* This check is for when the driver is unloaded while VFs are
1406 * assigned. Setting the number of VFs to 0 through sysfs is caught
1407 * before this function ever gets called.
1408 */
c24817b6 1409 if (!pci_vfs_assigned(pf->pdev)) {
f7414531
MW		 1410 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
1411 * work correctly when SR-IOV gets re-enabled.
1412 */
1413 for (vf_id = 0; vf_id < tmp; vf_id++) {
1414 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
1415 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
41a1d04b 1416 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
f7414531 1417 }
c354229f 1418 }
0da36b97 1419 clear_bit(__I40E_VF_DISABLE, pf->state);
5c3c48ac
JB		 1420}
1421
1422#ifdef CONFIG_PCI_IOV
1423/**
1424 * i40e_alloc_vfs
b40c82e6
JK		 1425 * @pf: pointer to the PF structure
1426 * @num_alloc_vfs: number of VFs to allocate
5c3c48ac 1427 *
b40c82e6 1428 * allocate VF resources
5c3c48ac 1429 **/
4aeec010 1430int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
5c3c48ac
JB		 1431{
1432 struct i40e_vf *vfs;
1433 int i, ret = 0;
1434
6c1b5bff 1435 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW		 1436 i40e_irq_dynamic_disable_icr0(pf);
1437
4aeec010
MW		 1438 /* Check to see if we're just allocating resources for extant VFs */
1439 if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
1440 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
1441 if (ret) {
de445b3d 1442 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
4aeec010
MW		 1443 pf->num_alloc_vfs = 0;
1444 goto err_iov;
1445 }
5c3c48ac 1446 }
5c3c48ac 1447 /* allocate memory */
cc6456af 1448 vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL);
5c3c48ac
JB		 1449 if (!vfs) {
1450 ret = -ENOMEM;
1451 goto err_alloc;
1452 }
c674d125 1453 pf->vf = vfs;
5c3c48ac
JB		 1454
1455 /* apply default profile */
1456 for (i = 0; i < num_alloc_vfs; i++) {
1457 vfs[i].pf = pf;
1458 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
1459 vfs[i].vf_id = i;
1460
1461 /* assign default capabilities */
1462 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
c674d125 1463 vfs[i].spoofchk = true;
1b484370
JK		 1464
1465 set_bit(I40E_VF_STATE_PRE_ENABLE, &vfs[i].vf_states);
5c3c48ac 1466
5c3c48ac 1467 }
5c3c48ac
JB		 1468 pf->num_alloc_vfs = num_alloc_vfs;
1469
1b484370
JK		 1470 /* VF resources get allocated during reset */
1471 i40e_reset_all_vfs(pf, false);
1472
6a23449a
AD		 1473 i40e_notify_client_of_vf_enable(pf, num_alloc_vfs);
1474
5c3c48ac
JB		 1475err_alloc:
1476 if (ret)
1477 i40e_free_vfs(pf);
1478err_iov:
6c1b5bff 1479 /* Re-enable interrupt 0. */
dbadbbe2 1480 i40e_irq_dynamic_enable_icr0(pf);
5c3c48ac
JB		 1481 return ret;
1482}
1483
1484#endif
1485/**
1486 * i40e_pci_sriov_enable
1487 * @pdev: pointer to a pci_dev structure
b40c82e6 1488 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1489 *
1490 * Enable or change the number of VFs
1491 **/
1492static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
1493{
1494#ifdef CONFIG_PCI_IOV
1495 struct i40e_pf *pf = pci_get_drvdata(pdev);
1496 int pre_existing_vfs = pci_num_vf(pdev);
1497 int err = 0;
1498
0da36b97 1499 if (test_bit(__I40E_TESTING, pf->state)) {
e17bc411
GR		 1500 dev_warn(&pdev->dev,
1501 "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n");
1502 err = -EPERM;
1503 goto err_out;
1504 }
1505
5c3c48ac
JB		 1506 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
1507 i40e_free_vfs(pf);
1508 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
1509 goto out;
1510
1511 if (num_vfs > pf->num_req_vfs) {
96c8d073
MW		 1512 dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n",
1513 num_vfs, pf->num_req_vfs);
5c3c48ac
JB		 1514 err = -EPERM;
1515 goto err_out;
1516 }
1517
96c8d073 1518 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
5c3c48ac
JB		 1519 err = i40e_alloc_vfs(pf, num_vfs);
1520 if (err) {
1521 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
1522 goto err_out;
1523 }
1524
1525out:
1526 return num_vfs;
1527
1528err_out:
1529 return err;
1530#endif
1531 return 0;
1532}
1533
1534/**
1535 * i40e_pci_sriov_configure
1536 * @pdev: pointer to a pci_dev structure
b40c82e6 1537 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1538 *
1539 * Enable or change the number of VFs. Called when the user updates the number
1540 * of VFs in sysfs.
1541 **/
1542int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1543{
1544 struct i40e_pf *pf = pci_get_drvdata(pdev);
1545
fc60861e
ASJ		 1546 if (num_vfs) {
1547 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
1548 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
ff424188 1549 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
fc60861e 1550 }
5c3c48ac 1551 return i40e_pci_sriov_enable(pdev, num_vfs);
fc60861e 1552 }
5c3c48ac 1553
c24817b6 1554 if (!pci_vfs_assigned(pf->pdev)) {
9e5634df 1555 i40e_free_vfs(pf);
fc60861e 1556 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
ff424188 1557 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
9e5634df
MW		 1558 } else {
1559 dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
1560 return -EINVAL;
1561 }
5c3c48ac
JB		 1562 return 0;
1563}
1564
1565/***********************virtual channel routines******************/
1566
1567/**
1568 * i40e_vc_send_msg_to_vf
b40c82e6 1569 * @vf: pointer to the VF info
5c3c48ac
JB		 1570 * @v_opcode: virtual channel opcode
1571 * @v_retval: virtual channel return value
1572 * @msg: pointer to the msg buffer
1573 * @msglen: msg length
1574 *
b40c82e6 1575 * send msg to VF
5c3c48ac
JB		 1576 **/
1577static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
1578 u32 v_retval, u8 *msg, u16 msglen)
1579{
6e7b5bd3
ASJ		 1580 struct i40e_pf *pf;
1581 struct i40e_hw *hw;
1582 int abs_vf_id;
5c3c48ac
JB		 1583 i40e_status aq_ret;
1584
6e7b5bd3
ASJ		 1585 /* validate the request */
1586 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
1587 return -EINVAL;
1588
1589 pf = vf->pf;
1590 hw = &pf->hw;
1591 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1592
5c3c48ac
JB		 1593 /* single place to detect unsuccessful return values */
1594 if (v_retval) {
1595 vf->num_invalid_msgs++;
18b7af57
MW		 1596 dev_info(&pf->pdev->dev, "VF %d failed opcode %d, retval: %d\n",
1597 vf->vf_id, v_opcode, v_retval);
5c3c48ac
JB		 1598 if (vf->num_invalid_msgs >
1599 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
1600 dev_err(&pf->pdev->dev,
1601 "Number of invalid messages exceeded for VF %d\n",
1602 vf->vf_id);
1603 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
6322e63c 1604 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
5c3c48ac
JB		 1605 }
1606 } else {
1607 vf->num_valid_msgs++;
5d38c93e
JW		 1608 /* reset the invalid counter, if a valid message is received. */
1609 vf->num_invalid_msgs = 0;
5c3c48ac
JB		 1610 }
1611
f19efbb5 1612 aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
7efa84b7 1613 msg, msglen, NULL);
5c3c48ac 1614 if (aq_ret) {
18b7af57
MW		 1615 dev_info(&pf->pdev->dev,
1616 "Unable to send the message to VF %d aq_err %d\n",
1617 vf->vf_id, pf->hw.aq.asq_last_status);
5c3c48ac
JB		 1618 return -EIO;
1619 }
1620
1621 return 0;
1622}
1623
1624/**
1625 * i40e_vc_send_resp_to_vf
b40c82e6 1626 * @vf: pointer to the VF info
5c3c48ac
JB		 1627 * @opcode: operation code
1628 * @retval: return value
1629 *
b40c82e6 1630 * send resp msg to VF
5c3c48ac
JB		 1631 **/
1632static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
310a2ad9 1633 enum virtchnl_ops opcode,
5c3c48ac
JB		 1634 i40e_status retval)
1635{
1636 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
1637}
1638
1639/**
1640 * i40e_vc_get_version_msg
b40c82e6 1641 * @vf: pointer to the VF info
f5254429 1642 * @msg: pointer to the msg buffer
5c3c48ac 1643 *
b40c82e6 1644 * called from the VF to request the API version used by the PF
5c3c48ac 1645 **/
f4ca1a22 1646static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 1647{
310a2ad9
JB		 1648 struct virtchnl_version_info info = {
1649 VIRTCHNL_VERSION_MAJOR, VIRTCHNL_VERSION_MINOR
5c3c48ac
JB		 1650 };
1651
310a2ad9 1652 vf->vf_ver = *(struct virtchnl_version_info *)msg;
606a5488 1653 /* VFs running the 1.0 API expect to get 1.0 back or they will cry. */
eedcfef8 1654 if (VF_IS_V10(&vf->vf_ver))
310a2ad9
JB		 1655 info.minor = VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
1656 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_VERSION,
5c3c48ac 1657 I40E_SUCCESS, (u8 *)&info,
f0adc6e8 1658 sizeof(struct virtchnl_version_info));
5c3c48ac
JB		 1659}
1660
c4998aa3
AD		 1661/**
1662 * i40e_del_qch - delete all the additional VSIs created as a part of ADq
1663 * @vf: pointer to VF structure
1664 **/
1665static void i40e_del_qch(struct i40e_vf *vf)
1666{
1667 struct i40e_pf *pf = vf->pf;
1668 int i;
1669
1670 /* first element in the array belongs to primary VF VSI and we shouldn't
1671 * delete it. We should however delete the rest of the VSIs created
1672 */
1673 for (i = 1; i < vf->num_tc; i++) {
1674 if (vf->ch[i].vsi_idx) {
1675 i40e_vsi_release(pf->vsi[vf->ch[i].vsi_idx]);
1676 vf->ch[i].vsi_idx = 0;
1677 vf->ch[i].vsi_id = 0;
1678 }
1679 }
1680}
1681
5c3c48ac
JB		 1682/**
1683 * i40e_vc_get_vf_resources_msg
b40c82e6 1684 * @vf: pointer to the VF info
5c3c48ac 1685 * @msg: pointer to the msg buffer
5c3c48ac 1686 *
b40c82e6 1687 * called from the VF to request its resources
5c3c48ac 1688 **/
f4ca1a22 1689static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 1690{
310a2ad9 1691 struct virtchnl_vf_resource *vfres = NULL;
5c3c48ac
JB		 1692 struct i40e_pf *pf = vf->pf;
1693 i40e_status aq_ret = 0;
1694 struct i40e_vsi *vsi;
5c3c48ac 1695 int num_vsis = 1;
442b25e4 1696 int len = 0;
5c3c48ac
JB		 1697 int ret;
1698
6322e63c 1699 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
5c3c48ac
JB		 1700 aq_ret = I40E_ERR_PARAM;
1701 goto err;
1702 }
1703
310a2ad9
JB		 1704 len = (sizeof(struct virtchnl_vf_resource) +
1705 sizeof(struct virtchnl_vsi_resource) * num_vsis);
5c3c48ac
JB		 1706
1707 vfres = kzalloc(len, GFP_KERNEL);
1708 if (!vfres) {
1709 aq_ret = I40E_ERR_NO_MEMORY;
1710 len = 0;
1711 goto err;
1712 }
eedcfef8 1713 if (VF_IS_V11(&vf->vf_ver))
f4ca1a22
MW		 1714 vf->driver_caps = *(u32 *)msg;
1715 else
310a2ad9
JB		 1716 vf->driver_caps = VIRTCHNL_VF_OFFLOAD_L2 |
1717 VIRTCHNL_VF_OFFLOAD_RSS_REG |
1718 VIRTCHNL_VF_OFFLOAD_VLAN;
5c3c48ac 1719
fbb113f7 1720 vfres->vf_cap_flags = VIRTCHNL_VF_OFFLOAD_L2;
fdf0e0bf 1721 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1722 if (!vsi->info.pvid)
fbb113f7 1723 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_VLAN;
e3219ce6 1724
0ef2d5af 1725 if (i40e_vf_client_capable(pf, vf->vf_id) &&
310a2ad9 1726 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_IWARP)) {
fbb113f7 1727 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_IWARP;
6322e63c 1728 set_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
41d0a4d0
AB		 1729 } else {
1730 clear_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
e3219ce6
ASJ		 1731 }
1732
310a2ad9 1733 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
fbb113f7 1734 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_PF;
e25d00b8 1735 } else {
d36e41dc 1736 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
310a2ad9 1737 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_AQ))
fbb113f7 1738 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_AQ;
c4e1868c 1739 else
fbb113f7 1740 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_REG;
e25d00b8 1741 }
1f012279 1742
d36e41dc 1743 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
310a2ad9 1744 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
fbb113f7 1745 vfres->vf_cap_flags |=
310a2ad9 1746 VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
3d0da5b7
ASJ		 1747 }
1748
310a2ad9 1749 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP)
fbb113f7 1750 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP;
bacd75cf 1751
d36e41dc 1752 if ((pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE) &&
310a2ad9 1753 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM))
fbb113f7 1754 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM;
bacd75cf 1755
310a2ad9 1756 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) {
14c5f5d2
SN		 1757 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
1758 dev_err(&pf->pdev->dev,
1759 "VF %d requested polling mode: this feature is supported only when the device is running in single function per port (SFP) mode\n",
1760 vf->vf_id);
db1a8f8e 1761 aq_ret = I40E_ERR_PARAM;
14c5f5d2
SN		 1762 goto err;
1763 }
fbb113f7 1764 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RX_POLLING;
14c5f5d2 1765 }
1f012279 1766
d36e41dc 1767 if (pf->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) {
310a2ad9 1768 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
fbb113f7 1769 vfres->vf_cap_flags |=
310a2ad9 1770 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
f6d83d13
ASJ		 1771 }
1772
a3f5aa90
AB		 1773 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_REQ_QUEUES)
1774 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_REQ_QUEUES;
1775
c27eac48
AD		 1776 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ADQ)
1777 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ADQ;
1778
5c3c48ac
JB		 1779 vfres->num_vsis = num_vsis;
1780 vfres->num_queue_pairs = vf->num_queue_pairs;
1781 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
c4e1868c
MW		 1782 vfres->rss_key_size = I40E_HKEY_ARRAY_SIZE;
1783 vfres->rss_lut_size = I40E_VF_HLUT_ARRAY_SIZE;
1784
fdf0e0bf 1785 if (vf->lan_vsi_idx) {
442b25e4 1786 vfres->vsi_res[0].vsi_id = vf->lan_vsi_id;
ff3f4cc2 1787 vfres->vsi_res[0].vsi_type = VIRTCHNL_VSI_SRIOV;
442b25e4 1788 vfres->vsi_res[0].num_queue_pairs = vsi->alloc_queue_pairs;
f578f5f4 1789 /* VFs only use TC 0 */
442b25e4 1790 vfres->vsi_res[0].qset_handle
f578f5f4 1791 = le16_to_cpu(vsi->info.qs_handle[0]);
442b25e4 1792 ether_addr_copy(vfres->vsi_res[0].default_mac_addr,
6995b36c 1793 vf->default_lan_addr.addr);
5c3c48ac 1794 }
6322e63c 1795 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac
JB		 1796
1797err:
b40c82e6 1798 /* send the response back to the VF */
310a2ad9 1799 ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_VF_RESOURCES,
5c3c48ac
JB		 1800 aq_ret, (u8 *)vfres, len);
1801
1802 kfree(vfres);
1803 return ret;
1804}
1805
1806/**
1807 * i40e_vc_reset_vf_msg
b40c82e6 1808 * @vf: pointer to the VF info
5c3c48ac 1809 *
b40c82e6
JK		 1810 * called from the VF to reset itself,
1811 * unlike other virtchnl messages, PF driver
1812 * doesn't send the response back to the VF
5c3c48ac 1813 **/
fc18eaa0 1814static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
5c3c48ac 1815{
6322e63c 1816 if (test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
fc18eaa0 1817 i40e_reset_vf(vf, false);
5c3c48ac
JB		 1818}
1819
5676a8b9
ASJ		 1820/**
1821 * i40e_getnum_vf_vsi_vlan_filters
1822 * @vsi: pointer to the vsi
1823 *
1824 * called to get the number of VLANs offloaded on this VF
1825 **/
1826static inline int i40e_getnum_vf_vsi_vlan_filters(struct i40e_vsi *vsi)
1827{
1828 struct i40e_mac_filter *f;
278e7d0b 1829 int num_vlans = 0, bkt;
5676a8b9 1830
278e7d0b 1831 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
5676a8b9
ASJ		 1832 if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID)
1833 num_vlans++;
1834 }
1835
1836 return num_vlans;
1837}
1838
5c3c48ac
JB		 1839/**
1840 * i40e_vc_config_promiscuous_mode_msg
b40c82e6 1841 * @vf: pointer to the VF info
5c3c48ac
JB		 1842 * @msg: pointer to the msg buffer
1843 * @msglen: msg length
1844 *
b40c82e6
JK		 1845 * called from the VF to configure the promiscuous mode of
1846 * VF vsis
5c3c48ac
JB		 1847 **/
1848static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf,
1849 u8 *msg, u16 msglen)
1850{
310a2ad9
JB		 1851 struct virtchnl_promisc_info *info =
1852 (struct virtchnl_promisc_info *)msg;
5c3c48ac
JB		 1853 struct i40e_pf *pf = vf->pf;
1854 struct i40e_hw *hw = &pf->hw;
5676a8b9
ASJ		 1855 struct i40e_mac_filter *f;
1856 i40e_status aq_ret = 0;
5c3c48ac 1857 bool allmulti = false;
5676a8b9
ASJ		 1858 struct i40e_vsi *vsi;
1859 bool alluni = false;
1860 int aq_err = 0;
278e7d0b 1861 int bkt;
5c3c48ac 1862
fdf0e0bf 1863 vsi = i40e_find_vsi_from_id(pf, info->vsi_id);
6322e63c 1864 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d4a0658d
CW		 1865 !i40e_vc_isvalid_vsi_id(vf, info->vsi_id) ||
1866 !vsi) {
eee4172a
MW		 1867 aq_ret = I40E_ERR_PARAM;
1868 goto error_param;
1869 }
1870 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
5676a8b9 1871 dev_err(&pf->pdev->dev,
eee4172a 1872 "Unprivileged VF %d is attempting to configure promiscuous mode\n",
5676a8b9 1873 vf->vf_id);
eee4172a
MW		 1874 /* Lie to the VF on purpose. */
1875 aq_ret = 0;
5c3c48ac
JB		 1876 goto error_param;
1877 }
5676a8b9 1878 /* Multicast promiscuous handling*/
ff3f4cc2 1879 if (info->flags & FLAG_VF_MULTICAST_PROMISC)
5c3c48ac 1880 allmulti = true;
5676a8b9
ASJ		 1881
1882 if (vf->port_vlan_id) {
1883 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw, vsi->seid,
1884 allmulti,
1885 vf->port_vlan_id,
1886 NULL);
1887 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
278e7d0b 1888 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
47d34839
ASJ		 1889 if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
1890 continue;
1891 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw,
1892 vsi->seid,
1893 allmulti,
1894 f->vlan,
1895 NULL);
5676a8b9
ASJ		 1896 aq_err = pf->hw.aq.asq_last_status;
1897 if (aq_ret) {
1898 dev_err(&pf->pdev->dev,
1899 "Could not add VLAN %d to multicast promiscuous domain err %s aq_err %s\n",
1900 f->vlan,
1901 i40e_stat_str(&pf->hw, aq_ret),
1902 i40e_aq_str(&pf->hw, aq_err));
1903 break;
1904 }
1905 }
1906 } else {
1907 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid,
1908 allmulti, NULL);
1909 aq_err = pf->hw.aq.asq_last_status;
1910 if (aq_ret) {
1911 dev_err(&pf->pdev->dev,
1912 "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n",
1913 vf->vf_id,
1914 i40e_stat_str(&pf->hw, aq_ret),
1915 i40e_aq_str(&pf->hw, aq_err));
7429c0bd 1916 goto error_param;
5676a8b9
ASJ		 1917 }
1918 }
1919
1920 if (!aq_ret) {
1921 dev_info(&pf->pdev->dev,
1922 "VF %d successfully set multicast promiscuous mode\n",
1923 vf->vf_id);
1924 if (allmulti)
6322e63c 1925 set_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
5676a8b9 1926 else
6322e63c 1927 clear_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
5676a8b9
ASJ		 1928 }
1929
ff3f4cc2 1930 if (info->flags & FLAG_VF_UNICAST_PROMISC)
5676a8b9
ASJ		 1931 alluni = true;
1932 if (vf->port_vlan_id) {
1933 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw, vsi->seid,
1934 alluni,
1935 vf->port_vlan_id,
1936 NULL);
1937 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
278e7d0b 1938 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
4d433084
JB		 1939 if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
1940 continue;
1941 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw,
1942 vsi->seid,
1943 alluni,
1944 f->vlan,
1945 NULL);
1946 aq_err = pf->hw.aq.asq_last_status;
5676a8b9
ASJ		 1947 if (aq_ret)
1948 dev_err(&pf->pdev->dev,
1949 "Could not add VLAN %d to Unicast promiscuous domain err %s aq_err %s\n",
1950 f->vlan,
1951 i40e_stat_str(&pf->hw, aq_ret),
1952 i40e_aq_str(&pf->hw, aq_err));
1953 }
1954 } else {
1955 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, vsi->seid,
e53b382f 1956 alluni, NULL,
b5569892 1957 true);
5676a8b9 1958 aq_err = pf->hw.aq.asq_last_status;
7429c0bd 1959 if (aq_ret) {
5676a8b9
ASJ		 1960 dev_err(&pf->pdev->dev,
1961 "VF %d failed to set unicast promiscuous mode %8.8x err %s aq_err %s\n",
1962 vf->vf_id, info->flags,
1963 i40e_stat_str(&pf->hw, aq_ret),
1964 i40e_aq_str(&pf->hw, aq_err));
7429c0bd
JK		 1965 goto error_param;
1966 }
5676a8b9
ASJ		 1967 }
1968
5676a8b9
ASJ		 1969 if (!aq_ret) {
1970 dev_info(&pf->pdev->dev,
1971 "VF %d successfully set unicast promiscuous mode\n",
1972 vf->vf_id);
1973 if (alluni)
6322e63c 1974 set_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
5676a8b9 1975 else
6322e63c 1976 clear_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
5676a8b9 1977 }
5c3c48ac
JB		 1978
1979error_param:
b40c82e6 1980 /* send the response to the VF */
5c3c48ac 1981 return i40e_vc_send_resp_to_vf(vf,
310a2ad9 1982 VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
5c3c48ac
JB		 1983 aq_ret);
1984}
1985
1986/**
1987 * i40e_vc_config_queues_msg
b40c82e6 1988 * @vf: pointer to the VF info
5c3c48ac
JB		 1989 * @msg: pointer to the msg buffer
1990 * @msglen: msg length
1991 *
b40c82e6 1992 * called from the VF to configure the rx/tx
5c3c48ac
JB		 1993 * queues
1994 **/
1995static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1996{
310a2ad9
JB		 1997 struct virtchnl_vsi_queue_config_info *qci =
1998 (struct virtchnl_vsi_queue_config_info *)msg;
1999 struct virtchnl_queue_pair_info *qpi;
5f5e33b6 2000 struct i40e_pf *pf = vf->pf;
c27eac48 2001 u16 vsi_id, vsi_queue_id = 0;
5c3c48ac 2002 i40e_status aq_ret = 0;
c27eac48
AD		 2003 int i, j = 0, idx = 0;
2004
2005 vsi_id = qci->vsi_id;
5c3c48ac 2006
6322e63c 2007 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2008 aq_ret = I40E_ERR_PARAM;
2009 goto error_param;
2010 }
2011
5c3c48ac
JB		 2012 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2013 aq_ret = I40E_ERR_PARAM;
2014 goto error_param;
2015 }
c27eac48 2016
5c3c48ac
JB		 2017 for (i = 0; i < qci->num_queue_pairs; i++) {
2018 qpi = &qci->qpair[i];
c27eac48
AD		 2019
2020 if (!vf->adq_enabled) {
2021 vsi_queue_id = qpi->txq.queue_id;
2022
2023 if (qpi->txq.vsi_id != qci->vsi_id ||
2024 qpi->rxq.vsi_id != qci->vsi_id ||
2025 qpi->rxq.queue_id != vsi_queue_id) {
2026 aq_ret = I40E_ERR_PARAM;
2027 goto error_param;
2028 }
2029 }
2030
2031 if (!i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
5c3c48ac
JB		 2032 aq_ret = I40E_ERR_PARAM;
2033 goto error_param;
2034 }
2035
2036 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
2037 &qpi->rxq) ||
2038 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
2039 &qpi->txq)) {
2040 aq_ret = I40E_ERR_PARAM;
2041 goto error_param;
2042 }
c27eac48
AD		 2043
2044 /* For ADq there can be up to 4 VSIs with max 4 queues each.
2045 * VF does not know about these additional VSIs and all
2046 * it cares is about its own queues. PF configures these queues
2047 * to its appropriate VSIs based on TC mapping
2048 **/
2049 if (vf->adq_enabled) {
2050 if (j == (vf->ch[idx].num_qps - 1)) {
2051 idx++;
2052 j = 0; /* resetting the queue count */
2053 vsi_queue_id = 0;
2054 } else {
2055 j++;
2056 vsi_queue_id++;
2057 }
2058 vsi_id = vf->ch[idx].vsi_id;
2059 }
5c3c48ac 2060 }
b40c82e6 2061 /* set vsi num_queue_pairs in use to num configured by VF */
c27eac48
AD		 2062 if (!vf->adq_enabled) {
2063 pf->vsi[vf->lan_vsi_idx]->num_queue_pairs =
2064 qci->num_queue_pairs;
2065 } else {
2066 for (i = 0; i < vf->num_tc; i++)
2067 pf->vsi[vf->ch[i].vsi_idx]->num_queue_pairs =
2068 vf->ch[i].num_qps;
2069 }
5c3c48ac
JB		 2070
2071error_param:
b40c82e6 2072 /* send the response to the VF */
310a2ad9 2073 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES,
5c3c48ac
JB		 2074 aq_ret);
2075}
2076
c27eac48
AD		 2077/**
2078 * i40e_validate_queue_map
2079 * @vsi_id: vsi id
2080 * @queuemap: Tx or Rx queue map
2081 *
2082 * check if Tx or Rx queue map is valid
2083 **/
2084static int i40e_validate_queue_map(struct i40e_vf *vf, u16 vsi_id,
2085 unsigned long queuemap)
2086{
2087 u16 vsi_queue_id, queue_id;
2088
2089 for_each_set_bit(vsi_queue_id, &queuemap, I40E_MAX_VSI_QP) {
2090 if (vf->adq_enabled) {
2091 vsi_id = vf->ch[vsi_queue_id / I40E_MAX_VF_VSI].vsi_id;
2092 queue_id = (vsi_queue_id % I40E_DEFAULT_QUEUES_PER_VF);
2093 } else {
2094 queue_id = vsi_queue_id;
2095 }
2096
2097 if (!i40e_vc_isvalid_queue_id(vf, vsi_id, queue_id))
2098 return -EINVAL;
2099 }
2100
2101 return 0;
2102}
2103
5c3c48ac
JB		 2104/**
2105 * i40e_vc_config_irq_map_msg
b40c82e6 2106 * @vf: pointer to the VF info
5c3c48ac
JB		 2107 * @msg: pointer to the msg buffer
2108 * @msglen: msg length
2109 *
b40c82e6 2110 * called from the VF to configure the irq to
5c3c48ac
JB		 2111 * queue map
2112 **/
2113static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2114{
310a2ad9
JB		 2115 struct virtchnl_irq_map_info *irqmap_info =
2116 (struct virtchnl_irq_map_info *)msg;
2117 struct virtchnl_vector_map *map;
c27eac48 2118 u16 vsi_id, vector_id;
5c3c48ac 2119 i40e_status aq_ret = 0;
5c3c48ac
JB		 2120 int i;
2121
6322e63c 2122 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2123 aq_ret = I40E_ERR_PARAM;
2124 goto error_param;
2125 }
2126
2127 for (i = 0; i < irqmap_info->num_vectors; i++) {
2128 map = &irqmap_info->vecmap[i];
5c3c48ac
JB		 2129 vector_id = map->vector_id;
2130 vsi_id = map->vsi_id;
2131 /* validate msg params */
2132 if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
2133 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2134 aq_ret = I40E_ERR_PARAM;
2135 goto error_param;
2136 }
2137
c27eac48
AD		 2138 if (i40e_validate_queue_map(vf, vsi_id, map->rxq_map)) {
2139 aq_ret = I40E_ERR_PARAM;
2140 goto error_param;
5c3c48ac
JB		 2141 }
2142
c27eac48
AD		 2143 if (i40e_validate_queue_map(vf, vsi_id, map->txq_map)) {
2144 aq_ret = I40E_ERR_PARAM;
2145 goto error_param;
5c3c48ac
JB		 2146 }
2147
2148 i40e_config_irq_link_list(vf, vsi_id, map);
2149 }
2150error_param:
b40c82e6 2151 /* send the response to the VF */
310a2ad9 2152 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_IRQ_MAP,
5c3c48ac
JB		 2153 aq_ret);
2154}
2155
d0fda04d
HR		 2156/**
2157 * i40e_ctrl_vf_tx_rings
2158 * @vsi: the SRIOV VSI being configured
2159 * @q_map: bit map of the queues to be enabled
2160 * @enable: start or stop the queue
2161 **/
2162static int i40e_ctrl_vf_tx_rings(struct i40e_vsi *vsi, unsigned long q_map,
2163 bool enable)
2164{
2165 struct i40e_pf *pf = vsi->back;
2166 int ret = 0;
2167 u16 q_id;
2168
2169 for_each_set_bit(q_id, &q_map, I40E_MAX_VF_QUEUES) {
2170 ret = i40e_control_wait_tx_q(vsi->seid, pf,
2171 vsi->base_queue + q_id,
2172 false /*is xdp*/, enable);
2173 if (ret)
2174 break;
2175 }
2176 return ret;
2177}
2178
2179/**
2180 * i40e_ctrl_vf_rx_rings
2181 * @vsi: the SRIOV VSI being configured
2182 * @q_map: bit map of the queues to be enabled
2183 * @enable: start or stop the queue
2184 **/
2185static int i40e_ctrl_vf_rx_rings(struct i40e_vsi *vsi, unsigned long q_map,
2186 bool enable)
2187{
2188 struct i40e_pf *pf = vsi->back;
2189 int ret = 0;
2190 u16 q_id;
2191
2192 for_each_set_bit(q_id, &q_map, I40E_MAX_VF_QUEUES) {
2193 ret = i40e_control_wait_rx_q(pf, vsi->base_queue + q_id,
2194 enable);
2195 if (ret)
2196 break;
2197 }
2198 return ret;
2199}
2200
5c3c48ac
JB		 2201/**
2202 * i40e_vc_enable_queues_msg
b40c82e6 2203 * @vf: pointer to the VF info
5c3c48ac
JB		 2204 * @msg: pointer to the msg buffer
2205 * @msglen: msg length
2206 *
b40c82e6 2207 * called from the VF to enable all or specific queue(s)
5c3c48ac
JB		 2208 **/
2209static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2210{
310a2ad9
JB		 2211 struct virtchnl_queue_select *vqs =
2212 (struct virtchnl_queue_select *)msg;
5c3c48ac
JB		 2213 struct i40e_pf *pf = vf->pf;
2214 u16 vsi_id = vqs->vsi_id;
2215 i40e_status aq_ret = 0;
c27eac48 2216 int i;
5c3c48ac 2217
6322e63c 2218 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2219 aq_ret = I40E_ERR_PARAM;
2220 goto error_param;
2221 }
2222
2223 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2224 aq_ret = I40E_ERR_PARAM;
2225 goto error_param;
2226 }
2227
2228 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
2229 aq_ret = I40E_ERR_PARAM;
2230 goto error_param;
2231 }
fdf0e0bf 2232
d0fda04d
HR		 2233 /* Use the queue bit map sent by the VF */
2234 if (i40e_ctrl_vf_rx_rings(pf->vsi[vf->lan_vsi_idx], vqs->rx_queues,
2235 true)) {
88f6563d 2236 aq_ret = I40E_ERR_TIMEOUT;
d0fda04d
HR		 2237 goto error_param;
2238 }
2239 if (i40e_ctrl_vf_tx_rings(pf->vsi[vf->lan_vsi_idx], vqs->tx_queues,
2240 true)) {
2241 aq_ret = I40E_ERR_TIMEOUT;
2242 goto error_param;
2243 }
c27eac48
AD		 2244
2245 /* need to start the rings for additional ADq VSI's as well */
2246 if (vf->adq_enabled) {
2247 /* zero belongs to LAN VSI */
2248 for (i = 1; i < vf->num_tc; i++) {
2249 if (i40e_vsi_start_rings(pf->vsi[vf->ch[i].vsi_idx]))
2250 aq_ret = I40E_ERR_TIMEOUT;
2251 }
2252 }
2253
5c3c48ac 2254error_param:
b40c82e6 2255 /* send the response to the VF */
310a2ad9 2256 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_QUEUES,
5c3c48ac
JB		 2257 aq_ret);
2258}
2259
2260/**
2261 * i40e_vc_disable_queues_msg
b40c82e6 2262 * @vf: pointer to the VF info
5c3c48ac
JB		 2263 * @msg: pointer to the msg buffer
2264 * @msglen: msg length
2265 *
b40c82e6 2266 * called from the VF to disable all or specific
5c3c48ac
JB		 2267 * queue(s)
2268 **/
2269static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2270{
310a2ad9
JB		 2271 struct virtchnl_queue_select *vqs =
2272 (struct virtchnl_queue_select *)msg;
5c3c48ac 2273 struct i40e_pf *pf = vf->pf;
5c3c48ac 2274 i40e_status aq_ret = 0;
5c3c48ac 2275
6322e63c 2276 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2277 aq_ret = I40E_ERR_PARAM;
2278 goto error_param;
2279 }
2280
2281 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
2282 aq_ret = I40E_ERR_PARAM;
2283 goto error_param;
2284 }
2285
2286 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
2287 aq_ret = I40E_ERR_PARAM;
2288 goto error_param;
2289 }
fdf0e0bf 2290
d0fda04d
HR		 2291 /* Use the queue bit map sent by the VF */
2292 if (i40e_ctrl_vf_tx_rings(pf->vsi[vf->lan_vsi_idx], vqs->tx_queues,
2293 false)) {
2294 aq_ret = I40E_ERR_TIMEOUT;
2295 goto error_param;
2296 }
2297 if (i40e_ctrl_vf_rx_rings(pf->vsi[vf->lan_vsi_idx], vqs->rx_queues,
2298 false)) {
2299 aq_ret = I40E_ERR_TIMEOUT;
2300 goto error_param;
2301 }
5c3c48ac 2302error_param:
b40c82e6 2303 /* send the response to the VF */
310a2ad9 2304 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_QUEUES,
5c3c48ac
JB		 2305 aq_ret);
2306}
2307
a3f5aa90
AB		 2308/**
2309 * i40e_vc_request_queues_msg
2310 * @vf: pointer to the VF info
2311 * @msg: pointer to the msg buffer
2312 * @msglen: msg length
2313 *
2314 * VFs get a default number of queues but can use this message to request a
17a9422d
AB		 2315 * different number. If the request is successful, PF will reset the VF and
2316 * return 0. If unsuccessful, PF will send message informing VF of number of
2317 * available queues and return result of sending VF a message.
a3f5aa90
AB		 2318 **/
2319static int i40e_vc_request_queues_msg(struct i40e_vf *vf, u8 *msg, int msglen)
2320{
2321 struct virtchnl_vf_res_request *vfres =
2322 (struct virtchnl_vf_res_request *)msg;
2323 int req_pairs = vfres->num_queue_pairs;
2324 int cur_pairs = vf->num_queue_pairs;
2325 struct i40e_pf *pf = vf->pf;
2326
2327 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
2328 return -EINVAL;
2329
2330 if (req_pairs <= 0) {
2331 dev_err(&pf->pdev->dev,
2332 "VF %d tried to request %d queues. Ignoring.\n",
2333 vf->vf_id, req_pairs);
2334 } else if (req_pairs > I40E_MAX_VF_QUEUES) {
2335 dev_err(&pf->pdev->dev,
2336 "VF %d tried to request more than %d queues.\n",
2337 vf->vf_id,
2338 I40E_MAX_VF_QUEUES);
2339 vfres->num_queue_pairs = I40E_MAX_VF_QUEUES;
2340 } else if (req_pairs - cur_pairs > pf->queues_left) {
2341 dev_warn(&pf->pdev->dev,
2342 "VF %d requested %d more queues, but only %d left.\n",
2343 vf->vf_id,
2344 req_pairs - cur_pairs,
2345 pf->queues_left);
2346 vfres->num_queue_pairs = pf->queues_left + cur_pairs;
2347 } else {
17a9422d 2348 /* successful request */
a3f5aa90 2349 vf->num_req_queues = req_pairs;
17a9422d
AB		 2350 i40e_vc_notify_vf_reset(vf);
2351 i40e_reset_vf(vf, false);
2352 return 0;
a3f5aa90
AB		 2353 }
2354
2355 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_REQUEST_QUEUES, 0,
c30bf8ce 2356 (u8 *)vfres, sizeof(*vfres));
a3f5aa90
AB		 2357}
2358
5c3c48ac
JB		 2359/**
2360 * i40e_vc_get_stats_msg
b40c82e6 2361 * @vf: pointer to the VF info
5c3c48ac
JB		 2362 * @msg: pointer to the msg buffer
2363 * @msglen: msg length
2364 *
b40c82e6 2365 * called from the VF to get vsi stats
5c3c48ac
JB		 2366 **/
2367static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2368{
310a2ad9
JB		 2369 struct virtchnl_queue_select *vqs =
2370 (struct virtchnl_queue_select *)msg;
5c3c48ac
JB		 2371 struct i40e_pf *pf = vf->pf;
2372 struct i40e_eth_stats stats;
2373 i40e_status aq_ret = 0;
2374 struct i40e_vsi *vsi;
2375
2376 memset(&stats, 0, sizeof(struct i40e_eth_stats));
2377
6322e63c 2378 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2379 aq_ret = I40E_ERR_PARAM;
2380 goto error_param;
2381 }
2382
2383 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
2384 aq_ret = I40E_ERR_PARAM;
2385 goto error_param;
2386 }
2387
fdf0e0bf 2388 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2389 if (!vsi) {
2390 aq_ret = I40E_ERR_PARAM;
2391 goto error_param;
2392 }
2393 i40e_update_eth_stats(vsi);
5a9769c8 2394 stats = vsi->eth_stats;
5c3c48ac
JB		 2395
2396error_param:
b40c82e6 2397 /* send the response back to the VF */
310a2ad9 2398 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_STATS, aq_ret,
5c3c48ac
JB		 2399 (u8 *)&stats, sizeof(stats));
2400}
2401
5f527ba9 2402/* If the VF is not trusted restrict the number of MAC/VLAN it can program */
4dbc5661 2403#define I40E_VC_MAX_MAC_ADDR_PER_VF 12
5f527ba9
ASJ		 2404#define I40E_VC_MAX_VLAN_PER_VF 8
2405
f657a6e1
GR		 2406/**
2407 * i40e_check_vf_permission
b40c82e6 2408 * @vf: pointer to the VF info
03ce7b1d 2409 * @al: MAC address list from virtchnl
f657a6e1 2410 *
03ce7b1d
FS		 2411 * Check that the given list of MAC addresses is allowed. Will return -EPERM
2412 * if any address in the list is not valid. Checks the following conditions:
2413 *
2414 * 1) broadcast and zero addresses are never valid
2415 * 2) unicast addresses are not allowed if the VMM has administratively set
2416 * the VF MAC address, unless the VF is marked as privileged.
2417 * 3) There is enough space to add all the addresses.
2418 *
2419 * Note that to guarantee consistency, it is expected this function be called
2420 * while holding the mac_filter_hash_lock, as otherwise the current number of
2421 * addresses might not be accurate.
f657a6e1 2422 **/
03ce7b1d
FS		 2423static inline int i40e_check_vf_permission(struct i40e_vf *vf,
2424 struct virtchnl_ether_addr_list *al)
f657a6e1
GR		 2425{
2426 struct i40e_pf *pf = vf->pf;
03ce7b1d
FS		 2427 int i;
2428
2429 /* If this VF is not privileged, then we can't add more than a limited
2430 * number of addresses. Check to make sure that the additions do not
2431 * push us over the limit.
2432 */
2433 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
2434 (vf->num_mac + al->num_elements) > I40E_VC_MAX_MAC_ADDR_PER_VF) {
2435 dev_err(&pf->pdev->dev,
2436 "Cannot add more MAC addresses, VF is not trusted, switch the VF to trusted to add more functionality\n");
2437 return -EPERM;
2438 }
2439
2440 for (i = 0; i < al->num_elements; i++) {
2441 u8 *addr = al->list[i].addr;
2442
2443 if (is_broadcast_ether_addr(addr) ||
2444 is_zero_ether_addr(addr)) {
2445 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n",
2446 addr);
2447 return I40E_ERR_INVALID_MAC_ADDR;
2448 }
f657a6e1 2449
f657a6e1
GR		 2450 /* If the host VMM administrator has set the VF MAC address
2451 * administratively via the ndo_set_vf_mac command then deny
2452 * permission to the VF to add or delete unicast MAC addresses.
692fb0a7 2453 * Unless the VF is privileged and then it can do whatever.
5017c2a8
GR		 2454 * The VF may request to set the MAC address filter already
2455 * assigned to it so do not return an error in that case.
f657a6e1 2456 */
03ce7b1d
FS		 2457 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
2458 !is_multicast_ether_addr(addr) && vf->pf_set_mac &&
2459 !ether_addr_equal(addr, vf->default_lan_addr.addr)) {
2460 dev_err(&pf->pdev->dev,
ae1e29f6 2461 "VF attempting to override administratively set MAC address, bring down and up the VF interface to resume normal operation\n");
03ce7b1d
FS		 2462 return -EPERM;
2463 }
f657a6e1 2464 }
03ce7b1d
FS		 2465
2466 return 0;
f657a6e1
GR		 2467}
2468
5c3c48ac
JB		 2469/**
2470 * i40e_vc_add_mac_addr_msg
b40c82e6 2471 * @vf: pointer to the VF info
5c3c48ac
JB		 2472 * @msg: pointer to the msg buffer
2473 * @msglen: msg length
2474 *
2475 * add guest mac address filter
2476 **/
2477static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2478{
310a2ad9
JB		 2479 struct virtchnl_ether_addr_list *al =
2480 (struct virtchnl_ether_addr_list *)msg;
5c3c48ac
JB		 2481 struct i40e_pf *pf = vf->pf;
2482 struct i40e_vsi *vsi = NULL;
2483 u16 vsi_id = al->vsi_id;
f657a6e1 2484 i40e_status ret = 0;
5c3c48ac
JB		 2485 int i;
2486
6322e63c 2487 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac 2488 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 2489 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2490 goto error_param;
2491 }
2492
fdf0e0bf 2493 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2494
21659035
KP		 2495 /* Lock once, because all function inside for loop accesses VSI's
2496 * MAC filter list which needs to be protected using same lock.
2497 */
278e7d0b 2498 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 2499
03ce7b1d
FS		 2500 ret = i40e_check_vf_permission(vf, al);
2501 if (ret) {
2502 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2503 goto error_param;
2504 }
2505
5c3c48ac
JB		 2506 /* add new addresses to the list */
2507 for (i = 0; i < al->num_elements; i++) {
2508 struct i40e_mac_filter *f;
2509
1bc87e80 2510 f = i40e_find_mac(vsi, al->list[i].addr);
34c164de 2511 if (!f) {
feffdbe4 2512 f = i40e_add_mac_filter(vsi, al->list[i].addr);
5c3c48ac 2513
34c164de
ZP		 2514 if (!f) {
2515 dev_err(&pf->pdev->dev,
2516 "Unable to add MAC filter %pM for VF %d\n",
2517 al->list[i].addr, vf->vf_id);
2518 ret = I40E_ERR_PARAM;
2519 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2520 goto error_param;
2521 } else {
2522 vf->num_mac++;
2523 }
5c3c48ac
JB		 2524 }
2525 }
278e7d0b 2526 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2527
2528 /* program the updated filter list */
ea02e90b
MW		 2529 ret = i40e_sync_vsi_filters(vsi);
2530 if (ret)
2531 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2532 vf->vf_id, ret);
5c3c48ac
JB		 2533
2534error_param:
b40c82e6 2535 /* send the response to the VF */
310a2ad9 2536 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_ETH_ADDR,
f657a6e1 2537 ret);
5c3c48ac
JB		 2538}
2539
2540/**
2541 * i40e_vc_del_mac_addr_msg
b40c82e6 2542 * @vf: pointer to the VF info
5c3c48ac
JB		 2543 * @msg: pointer to the msg buffer
2544 * @msglen: msg length
2545 *
2546 * remove guest mac address filter
2547 **/
2548static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2549{
310a2ad9
JB		 2550 struct virtchnl_ether_addr_list *al =
2551 (struct virtchnl_ether_addr_list *)msg;
5c3c48ac
JB		 2552 struct i40e_pf *pf = vf->pf;
2553 struct i40e_vsi *vsi = NULL;
2554 u16 vsi_id = al->vsi_id;
f657a6e1 2555 i40e_status ret = 0;
5c3c48ac
JB		 2556 int i;
2557
6322e63c 2558 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac 2559 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 2560 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2561 goto error_param;
2562 }
f657a6e1
GR		 2563
2564 for (i = 0; i < al->num_elements; i++) {
700bbf6c
MW		 2565 if (is_broadcast_ether_addr(al->list[i].addr) ||
2566 is_zero_ether_addr(al->list[i].addr)) {
8d8f2295
MW		 2567 dev_err(&pf->pdev->dev, "Invalid MAC addr %pM for VF %d\n",
2568 al->list[i].addr, vf->vf_id);
700bbf6c 2569 ret = I40E_ERR_INVALID_MAC_ADDR;
f657a6e1 2570 goto error_param;
700bbf6c 2571 }
5907cf6c
PM		 2572
2573 if (vf->pf_set_mac &&
2574 ether_addr_equal(al->list[i].addr,
2575 vf->default_lan_addr.addr)) {
2576 dev_err(&pf->pdev->dev,
2577 "MAC addr %pM has been set by PF, cannot delete it for VF %d, reset VF to change MAC addr\n",
2578 vf->default_lan_addr.addr, vf->vf_id);
2579 ret = I40E_ERR_PARAM;
2580 goto error_param;
2581 }
f657a6e1 2582 }
fdf0e0bf 2583 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2584
278e7d0b 2585 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2586 /* delete addresses from the list */
2587 for (i = 0; i < al->num_elements; i++)
feffdbe4 2588 if (i40e_del_mac_filter(vsi, al->list[i].addr)) {
b36e9ab5 2589 ret = I40E_ERR_INVALID_MAC_ADDR;
278e7d0b 2590 spin_unlock_bh(&vsi->mac_filter_hash_lock);
b36e9ab5 2591 goto error_param;
5f527ba9
ASJ		 2592 } else {
2593 vf->num_mac--;
b36e9ab5
MW		 2594 }
2595
278e7d0b 2596 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2597
2598 /* program the updated filter list */
ea02e90b
MW		 2599 ret = i40e_sync_vsi_filters(vsi);
2600 if (ret)
2601 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2602 vf->vf_id, ret);
5c3c48ac
JB		 2603
2604error_param:
b40c82e6 2605 /* send the response to the VF */
310a2ad9 2606 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_ETH_ADDR,
f657a6e1 2607 ret);
5c3c48ac
JB		 2608}
2609
2610/**
2611 * i40e_vc_add_vlan_msg
b40c82e6 2612 * @vf: pointer to the VF info
5c3c48ac
JB		 2613 * @msg: pointer to the msg buffer
2614 * @msglen: msg length
2615 *
2616 * program guest vlan id
2617 **/
2618static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2619{
310a2ad9
JB		 2620 struct virtchnl_vlan_filter_list *vfl =
2621 (struct virtchnl_vlan_filter_list *)msg;
5c3c48ac
JB		 2622 struct i40e_pf *pf = vf->pf;
2623 struct i40e_vsi *vsi = NULL;
2624 u16 vsi_id = vfl->vsi_id;
2625 i40e_status aq_ret = 0;
2626 int i;
2627
5f527ba9
ASJ		 2628 if ((vf->num_vlan >= I40E_VC_MAX_VLAN_PER_VF) &&
2629 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2630 dev_err(&pf->pdev->dev,
2631 "VF is not trusted, switch the VF to trusted to add more VLAN addresses\n");
2632 goto error_param;
2633 }
6322e63c 2634 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2635 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2636 aq_ret = I40E_ERR_PARAM;
2637 goto error_param;
2638 }
2639
2640 for (i = 0; i < vfl->num_elements; i++) {
2641 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2642 aq_ret = I40E_ERR_PARAM;
2643 dev_err(&pf->pdev->dev,
2644 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
2645 goto error_param;
2646 }
2647 }
fdf0e0bf 2648 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2649 if (vsi->info.pvid) {
2650 aq_ret = I40E_ERR_PARAM;
2651 goto error_param;
2652 }
2653
2654 i40e_vlan_stripping_enable(vsi);
2655 for (i = 0; i < vfl->num_elements; i++) {
2656 /* add new VLAN filter */
2657 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
5f527ba9
ASJ		 2658 if (!ret)
2659 vf->num_vlan++;
6995b36c 2660
6322e63c 2661 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2662 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2663 true,
2664 vfl->vlan_id[i],
2665 NULL);
6322e63c 2666 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2667 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2668 true,
2669 vfl->vlan_id[i],
2670 NULL);
2671
5c3c48ac
JB		 2672 if (ret)
2673 dev_err(&pf->pdev->dev,
8d8f2295
MW		 2674 "Unable to add VLAN filter %d for VF %d, error %d\n",
2675 vfl->vlan_id[i], vf->vf_id, ret);
5c3c48ac
JB		 2676 }
2677
2678error_param:
b40c82e6 2679 /* send the response to the VF */
310a2ad9 2680 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_VLAN, aq_ret);
5c3c48ac
JB		 2681}
2682
2683/**
2684 * i40e_vc_remove_vlan_msg
b40c82e6 2685 * @vf: pointer to the VF info
5c3c48ac
JB		 2686 * @msg: pointer to the msg buffer
2687 * @msglen: msg length
2688 *
2689 * remove programmed guest vlan id
2690 **/
2691static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2692{
310a2ad9
JB		 2693 struct virtchnl_vlan_filter_list *vfl =
2694 (struct virtchnl_vlan_filter_list *)msg;
5c3c48ac
JB		 2695 struct i40e_pf *pf = vf->pf;
2696 struct i40e_vsi *vsi = NULL;
2697 u16 vsi_id = vfl->vsi_id;
2698 i40e_status aq_ret = 0;
2699 int i;
2700
6322e63c 2701 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2702 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2703 aq_ret = I40E_ERR_PARAM;
2704 goto error_param;
2705 }
2706
2707 for (i = 0; i < vfl->num_elements; i++) {
2708 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2709 aq_ret = I40E_ERR_PARAM;
2710 goto error_param;
2711 }
2712 }
2713
fdf0e0bf 2714 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2715 if (vsi->info.pvid) {
2716 aq_ret = I40E_ERR_PARAM;
2717 goto error_param;
2718 }
2719
2720 for (i = 0; i < vfl->num_elements; i++) {
3aa7b74d
FS		 2721 i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
2722 vf->num_vlan--;
6995b36c 2723
6322e63c 2724 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2725 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2726 false,
2727 vfl->vlan_id[i],
2728 NULL);
6322e63c 2729 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2730 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2731 false,
2732 vfl->vlan_id[i],
2733 NULL);
5c3c48ac
JB		 2734 }
2735
2736error_param:
b40c82e6 2737 /* send the response to the VF */
310a2ad9 2738 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_VLAN, aq_ret);
5c3c48ac
JB		 2739}
2740
e3219ce6
ASJ		 2741/**
2742 * i40e_vc_iwarp_msg
2743 * @vf: pointer to the VF info
2744 * @msg: pointer to the msg buffer
2745 * @msglen: msg length
2746 *
2747 * called from the VF for the iwarp msgs
2748 **/
2749static int i40e_vc_iwarp_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2750{
2751 struct i40e_pf *pf = vf->pf;
2752 int abs_vf_id = vf->vf_id + pf->hw.func_caps.vf_base_id;
2753 i40e_status aq_ret = 0;
2754
6322e63c
JK		 2755 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2756 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2757 aq_ret = I40E_ERR_PARAM;
2758 goto error_param;
2759 }
2760
2761 i40e_notify_client_of_vf_msg(pf->vsi[pf->lan_vsi], abs_vf_id,
2762 msg, msglen);
2763
2764error_param:
2765 /* send the response to the VF */
310a2ad9 2766 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_IWARP,
e3219ce6
ASJ		 2767 aq_ret);
2768}
2769
2770/**
2771 * i40e_vc_iwarp_qvmap_msg
2772 * @vf: pointer to the VF info
2773 * @msg: pointer to the msg buffer
2774 * @msglen: msg length
2775 * @config: config qvmap or release it
2776 *
2777 * called from the VF for the iwarp msgs
2778 **/
2779static int i40e_vc_iwarp_qvmap_msg(struct i40e_vf *vf, u8 *msg, u16 msglen,
2780 bool config)
2781{
310a2ad9
JB		 2782 struct virtchnl_iwarp_qvlist_info *qvlist_info =
2783 (struct virtchnl_iwarp_qvlist_info *)msg;
e3219ce6
ASJ		 2784 i40e_status aq_ret = 0;
2785
6322e63c
JK		 2786 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2787 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2788 aq_ret = I40E_ERR_PARAM;
2789 goto error_param;
2790 }
2791
2792 if (config) {
2793 if (i40e_config_iwarp_qvlist(vf, qvlist_info))
2794 aq_ret = I40E_ERR_PARAM;
2795 } else {
2796 i40e_release_iwarp_qvlist(vf);
2797 }
2798
2799error_param:
2800 /* send the response to the VF */
2801 return i40e_vc_send_resp_to_vf(vf,
310a2ad9
JB		 2802 config ? VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP :
2803 VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP,
e3219ce6
ASJ		 2804 aq_ret);
2805}
2806
c4e1868c
MW		 2807/**
2808 * i40e_vc_config_rss_key
2809 * @vf: pointer to the VF info
2810 * @msg: pointer to the msg buffer
2811 * @msglen: msg length
2812 *
2813 * Configure the VF's RSS key
2814 **/
2815static int i40e_vc_config_rss_key(struct i40e_vf *vf, u8 *msg, u16 msglen)
2816{
310a2ad9
JB		 2817 struct virtchnl_rss_key *vrk =
2818 (struct virtchnl_rss_key *)msg;
c4e1868c
MW		 2819 struct i40e_pf *pf = vf->pf;
2820 struct i40e_vsi *vsi = NULL;
2821 u16 vsi_id = vrk->vsi_id;
2822 i40e_status aq_ret = 0;
2823
6322e63c 2824 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2825 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2826 (vrk->key_len != I40E_HKEY_ARRAY_SIZE)) {
2827 aq_ret = I40E_ERR_PARAM;
2828 goto err;
2829 }
2830
2831 vsi = pf->vsi[vf->lan_vsi_idx];
2832 aq_ret = i40e_config_rss(vsi, vrk->key, NULL, 0);
2833err:
2834 /* send the response to the VF */
310a2ad9 2835 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_KEY,
c4e1868c
MW		 2836 aq_ret);
2837}
2838
2839/**
2840 * i40e_vc_config_rss_lut
2841 * @vf: pointer to the VF info
2842 * @msg: pointer to the msg buffer
2843 * @msglen: msg length
2844 *
2845 * Configure the VF's RSS LUT
2846 **/
2847static int i40e_vc_config_rss_lut(struct i40e_vf *vf, u8 *msg, u16 msglen)
2848{
310a2ad9
JB		 2849 struct virtchnl_rss_lut *vrl =
2850 (struct virtchnl_rss_lut *)msg;
c4e1868c
MW		 2851 struct i40e_pf *pf = vf->pf;
2852 struct i40e_vsi *vsi = NULL;
2853 u16 vsi_id = vrl->vsi_id;
2854 i40e_status aq_ret = 0;
2855
6322e63c 2856 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2857 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2858 (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)) {
2859 aq_ret = I40E_ERR_PARAM;
2860 goto err;
2861 }
2862
2863 vsi = pf->vsi[vf->lan_vsi_idx];
2864 aq_ret = i40e_config_rss(vsi, NULL, vrl->lut, I40E_VF_HLUT_ARRAY_SIZE);
2865 /* send the response to the VF */
2866err:
310a2ad9 2867 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_LUT,
c4e1868c
MW		 2868 aq_ret);
2869}
2870
2871/**
2872 * i40e_vc_get_rss_hena
2873 * @vf: pointer to the VF info
2874 * @msg: pointer to the msg buffer
2875 * @msglen: msg length
2876 *
2877 * Return the RSS HENA bits allowed by the hardware
2878 **/
2879static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
2880{
310a2ad9 2881 struct virtchnl_rss_hena *vrh = NULL;
c4e1868c
MW		 2882 struct i40e_pf *pf = vf->pf;
2883 i40e_status aq_ret = 0;
2884 int len = 0;
2885
6322e63c 2886 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2887 aq_ret = I40E_ERR_PARAM;
2888 goto err;
2889 }
310a2ad9 2890 len = sizeof(struct virtchnl_rss_hena);
c4e1868c
MW		 2891
2892 vrh = kzalloc(len, GFP_KERNEL);
2893 if (!vrh) {
2894 aq_ret = I40E_ERR_NO_MEMORY;
2895 len = 0;
2896 goto err;
2897 }
2898 vrh->hena = i40e_pf_get_default_rss_hena(pf);
2899err:
2900 /* send the response back to the VF */
310a2ad9 2901 aq_ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_RSS_HENA_CAPS,
c4e1868c 2902 aq_ret, (u8 *)vrh, len);
b7d2cd95 2903 kfree(vrh);
c4e1868c
MW		 2904 return aq_ret;
2905}
2906
2907/**
2908 * i40e_vc_set_rss_hena
2909 * @vf: pointer to the VF info
2910 * @msg: pointer to the msg buffer
2911 * @msglen: msg length
2912 *
2913 * Set the RSS HENA bits for the VF
2914 **/
2915static int i40e_vc_set_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
2916{
310a2ad9
JB		 2917 struct virtchnl_rss_hena *vrh =
2918 (struct virtchnl_rss_hena *)msg;
c4e1868c
MW		 2919 struct i40e_pf *pf = vf->pf;
2920 struct i40e_hw *hw = &pf->hw;
2921 i40e_status aq_ret = 0;
2922
6322e63c 2923 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2924 aq_ret = I40E_ERR_PARAM;
2925 goto err;
2926 }
2927 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)vrh->hena);
2928 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_id),
2929 (u32)(vrh->hena >> 32));
2930
2931 /* send the response to the VF */
2932err:
f0adc6e8 2933 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_SET_RSS_HENA, aq_ret);
c4e1868c
MW		 2934}
2935
8774370d
MS		 2936/**
2937 * i40e_vc_enable_vlan_stripping
2938 * @vf: pointer to the VF info
2939 * @msg: pointer to the msg buffer
2940 * @msglen: msg length
2941 *
2942 * Enable vlan header stripping for the VF
2943 **/
2944static int i40e_vc_enable_vlan_stripping(struct i40e_vf *vf, u8 *msg,
2945 u16 msglen)
2946{
2947 struct i40e_vsi *vsi = vf->pf->vsi[vf->lan_vsi_idx];
2948 i40e_status aq_ret = 0;
2949
2950 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
2951 aq_ret = I40E_ERR_PARAM;
2952 goto err;
2953 }
2954
2955 i40e_vlan_stripping_enable(vsi);
2956
2957 /* send the response to the VF */
2958err:
2959 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_VLAN_STRIPPING,
2960 aq_ret);
2961}
2962
2963/**
2964 * i40e_vc_disable_vlan_stripping
2965 * @vf: pointer to the VF info
2966 * @msg: pointer to the msg buffer
2967 * @msglen: msg length
2968 *
2969 * Disable vlan header stripping for the VF
2970 **/
2971static int i40e_vc_disable_vlan_stripping(struct i40e_vf *vf, u8 *msg,
2972 u16 msglen)
2973{
2974 struct i40e_vsi *vsi = vf->pf->vsi[vf->lan_vsi_idx];
2975 i40e_status aq_ret = 0;
2976
2977 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
2978 aq_ret = I40E_ERR_PARAM;
2979 goto err;
2980 }
2981
2982 i40e_vlan_stripping_disable(vsi);
2983
2984 /* send the response to the VF */
2985err:
2986 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_VLAN_STRIPPING,
2987 aq_ret);
2988}
2989
e284fc28
AD		 2990/**
2991 * i40e_validate_cloud_filter
2992 * @mask: mask for TC filter
2993 * @data: data for TC filter
2994 *
2995 * This function validates cloud filter programmed as TC filter for ADq
2996 **/
2997static int i40e_validate_cloud_filter(struct i40e_vf *vf,
2998 struct virtchnl_filter *tc_filter)
2999{
3000 struct virtchnl_l4_spec mask = tc_filter->mask.tcp_spec;
3001 struct virtchnl_l4_spec data = tc_filter->data.tcp_spec;
3002 struct i40e_pf *pf = vf->pf;
3003 struct i40e_vsi *vsi = NULL;
3004 struct i40e_mac_filter *f;
3005 struct hlist_node *h;
3006 bool found = false;
3007 int bkt;
3008
3009 if (!tc_filter->action) {
3010 dev_info(&pf->pdev->dev,
3011 "VF %d: Currently ADq doesn't support Drop Action\n",
3012 vf->vf_id);
3013 goto err;
3014 }
3015
3016 /* action_meta is TC number here to which the filter is applied */
3017 if (!tc_filter->action_meta ||
3018 tc_filter->action_meta > I40E_MAX_VF_VSI) {
3019 dev_info(&pf->pdev->dev, "VF %d: Invalid TC number %u\n",
3020 vf->vf_id, tc_filter->action_meta);
3021 goto err;
3022 }
3023
3024 /* Check filter if it's programmed for advanced mode or basic mode.
3025 * There are two ADq modes (for VF only),
3026 * 1. Basic mode: intended to allow as many filter options as possible
3027 * to be added to a VF in Non-trusted mode. Main goal is
3028 * to add filters to its own MAC and VLAN id.
3029 * 2. Advanced mode: is for allowing filters to be applied other than
3030 * its own MAC or VLAN. This mode requires the VF to be
3031 * Trusted.
3032 */
3033 if (mask.dst_mac[0] && !mask.dst_ip[0]) {
3034 vsi = pf->vsi[vf->lan_vsi_idx];
3035 f = i40e_find_mac(vsi, data.dst_mac);
3036
3037 if (!f) {
3038 dev_info(&pf->pdev->dev,
3039 "Destination MAC %pM doesn't belong to VF %d\n",
3040 data.dst_mac, vf->vf_id);
3041 goto err;
3042 }
3043
3044 if (mask.vlan_id) {
3045 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f,
3046 hlist) {
3047 if (f->vlan == ntohs(data.vlan_id)) {
3048 found = true;
3049 break;
3050 }
3051 }
3052 if (!found) {
3053 dev_info(&pf->pdev->dev,
3054 "VF %d doesn't have any VLAN id %u\n",
3055 vf->vf_id, ntohs(data.vlan_id));
3056 goto err;
3057 }
3058 }
3059 } else {
3060 /* Check if VF is trusted */
3061 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
3062 dev_err(&pf->pdev->dev,
3063 "VF %d not trusted, make VF trusted to add advanced mode ADq cloud filters\n",
3064 vf->vf_id);
3065 return I40E_ERR_CONFIG;
3066 }
3067 }
3068
3069 if (mask.dst_mac[0] & data.dst_mac[0]) {
3070 if (is_broadcast_ether_addr(data.dst_mac) ||
3071 is_zero_ether_addr(data.dst_mac)) {
3072 dev_info(&pf->pdev->dev, "VF %d: Invalid Dest MAC addr %pM\n",
3073 vf->vf_id, data.dst_mac);
3074 goto err;
3075 }
3076 }
3077
3078 if (mask.src_mac[0] & data.src_mac[0]) {
3079 if (is_broadcast_ether_addr(data.src_mac) ||
3080 is_zero_ether_addr(data.src_mac)) {
3081 dev_info(&pf->pdev->dev, "VF %d: Invalid Source MAC addr %pM\n",
3082 vf->vf_id, data.src_mac);
3083 goto err;
3084 }
3085 }
3086
3087 if (mask.dst_port & data.dst_port) {
3088 if (!data.dst_port || be16_to_cpu(data.dst_port) > 0xFFFF) {
3089 dev_info(&pf->pdev->dev, "VF %d: Invalid Dest port\n",
3090 vf->vf_id);
3091 goto err;
3092 }
3093 }
3094
3095 if (mask.src_port & data.src_port) {
3096 if (!data.src_port || be16_to_cpu(data.src_port) > 0xFFFF) {
3097 dev_info(&pf->pdev->dev, "VF %d: Invalid Source port\n",
3098 vf->vf_id);
3099 goto err;
3100 }
3101 }
3102
3103 if (tc_filter->flow_type != VIRTCHNL_TCP_V6_FLOW &&
3104 tc_filter->flow_type != VIRTCHNL_TCP_V4_FLOW) {
3105 dev_info(&pf->pdev->dev, "VF %d: Invalid Flow type\n",
3106 vf->vf_id);
3107 goto err;
3108 }
3109
3110 if (mask.vlan_id & data.vlan_id) {
3111 if (ntohs(data.vlan_id) > I40E_MAX_VLANID) {
3112 dev_info(&pf->pdev->dev, "VF %d: invalid VLAN ID\n",
3113 vf->vf_id);
3114 goto err;
3115 }
3116 }
3117
3118 return I40E_SUCCESS;
3119err:
3120 return I40E_ERR_CONFIG;
3121}
3122
3123/**
3124 * i40e_find_vsi_from_seid - searches for the vsi with the given seid
3125 * @vf: pointer to the VF info
3126 * @seid - seid of the vsi it is searching for
3127 **/
3128static struct i40e_vsi *i40e_find_vsi_from_seid(struct i40e_vf *vf, u16 seid)
3129{
3130 struct i40e_pf *pf = vf->pf;
3131 struct i40e_vsi *vsi = NULL;
3132 int i;
3133
3134 for (i = 0; i < vf->num_tc ; i++) {
3135 vsi = i40e_find_vsi_from_id(pf, vf->ch[i].vsi_id);
46345b38 3136 if (vsi && vsi->seid == seid)
e284fc28
AD		 3137 return vsi;
3138 }
3139 return NULL;
3140}
3141
3142/**
3143 * i40e_del_all_cloud_filters
3144 * @vf: pointer to the VF info
3145 *
3146 * This function deletes all cloud filters
3147 **/
3148static void i40e_del_all_cloud_filters(struct i40e_vf *vf)
3149{
3150 struct i40e_cloud_filter *cfilter = NULL;
3151 struct i40e_pf *pf = vf->pf;
3152 struct i40e_vsi *vsi = NULL;
3153 struct hlist_node *node;
3154 int ret;
3155
3156 hlist_for_each_entry_safe(cfilter, node,
3157 &vf->cloud_filter_list, cloud_node) {
3158 vsi = i40e_find_vsi_from_seid(vf, cfilter->seid);
3159
3160 if (!vsi) {
3161 dev_err(&pf->pdev->dev, "VF %d: no VSI found for matching %u seid, can't delete cloud filter\n",
3162 vf->vf_id, cfilter->seid);
3163 continue;
3164 }
3165
3166 if (cfilter->dst_port)
3167 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
3168 false);
3169 else
3170 ret = i40e_add_del_cloud_filter(vsi, cfilter, false);
3171 if (ret)
3172 dev_err(&pf->pdev->dev,
3173 "VF %d: Failed to delete cloud filter, err %s aq_err %s\n",
3174 vf->vf_id, i40e_stat_str(&pf->hw, ret),
3175 i40e_aq_str(&pf->hw,
3176 pf->hw.aq.asq_last_status));
3177
3178 hlist_del(&cfilter->cloud_node);
3179 kfree(cfilter);
3180 vf->num_cloud_filters--;
3181 }
3182}
3183
3184/**
3185 * i40e_vc_del_cloud_filter
3186 * @vf: pointer to the VF info
3187 * @msg: pointer to the msg buffer
3188 *
3189 * This function deletes a cloud filter programmed as TC filter for ADq
3190 **/
3191static int i40e_vc_del_cloud_filter(struct i40e_vf *vf, u8 *msg)
3192{
3193 struct virtchnl_filter *vcf = (struct virtchnl_filter *)msg;
3194 struct virtchnl_l4_spec mask = vcf->mask.tcp_spec;
3195 struct virtchnl_l4_spec tcf = vcf->data.tcp_spec;
3196 struct i40e_cloud_filter cfilter, *cf = NULL;
3197 struct i40e_pf *pf = vf->pf;
3198 struct i40e_vsi *vsi = NULL;
3199 struct hlist_node *node;
3200 i40e_status aq_ret = 0;
3201 int i, ret;
3202
3203 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3204 aq_ret = I40E_ERR_PARAM;
3205 goto err;
3206 }
3207
3208 if (!vf->adq_enabled) {
3209 dev_info(&pf->pdev->dev,
3210 "VF %d: ADq not enabled, can't apply cloud filter\n",
3211 vf->vf_id);
3212 aq_ret = I40E_ERR_PARAM;
3213 goto err;
3214 }
3215
3216 if (i40e_validate_cloud_filter(vf, vcf)) {
3217 dev_info(&pf->pdev->dev,
3218 "VF %d: Invalid input, can't apply cloud filter\n",
3219 vf->vf_id);
5dd3691c
DC		 3220 aq_ret = I40E_ERR_PARAM;
3221 goto err;
e284fc28
AD		 3222 }
3223
3224 memset(&cfilter, 0, sizeof(cfilter));
3225 /* parse destination mac address */
3226 for (i = 0; i < ETH_ALEN; i++)
3227 cfilter.dst_mac[i] = mask.dst_mac[i] & tcf.dst_mac[i];
3228
3229 /* parse source mac address */
3230 for (i = 0; i < ETH_ALEN; i++)
3231 cfilter.src_mac[i] = mask.src_mac[i] & tcf.src_mac[i];
3232
3233 cfilter.vlan_id = mask.vlan_id & tcf.vlan_id;
3234 cfilter.dst_port = mask.dst_port & tcf.dst_port;
3235 cfilter.src_port = mask.src_port & tcf.src_port;
3236
3237 switch (vcf->flow_type) {
3238 case VIRTCHNL_TCP_V4_FLOW:
3239 cfilter.n_proto = ETH_P_IP;
3240 if (mask.dst_ip[0] & tcf.dst_ip[0])
3241 memcpy(&cfilter.ip.v4.dst_ip, tcf.dst_ip,
3242 ARRAY_SIZE(tcf.dst_ip));
3243 else if (mask.src_ip[0] & tcf.dst_ip[0])
3244 memcpy(&cfilter.ip.v4.src_ip, tcf.src_ip,
3245 ARRAY_SIZE(tcf.dst_ip));
3246 break;
3247 case VIRTCHNL_TCP_V6_FLOW:
3248 cfilter.n_proto = ETH_P_IPV6;
3249 if (mask.dst_ip[3] & tcf.dst_ip[3])
3250 memcpy(&cfilter.ip.v6.dst_ip6, tcf.dst_ip,
3251 sizeof(cfilter.ip.v6.dst_ip6));
3252 if (mask.src_ip[3] & tcf.src_ip[3])
3253 memcpy(&cfilter.ip.v6.src_ip6, tcf.src_ip,
3254 sizeof(cfilter.ip.v6.src_ip6));
3255 break;
3256 default:
3257 /* TC filter can be configured based on different combinations
3258 * and in this case IP is not a part of filter config
3259 */
3260 dev_info(&pf->pdev->dev, "VF %d: Flow type not configured\n",
3261 vf->vf_id);
3262 }
3263
3264 /* get the vsi to which the tc belongs to */
3265 vsi = pf->vsi[vf->ch[vcf->action_meta].vsi_idx];
3266 cfilter.seid = vsi->seid;
3267 cfilter.flags = vcf->field_flags;
3268
3269 /* Deleting TC filter */
3270 if (tcf.dst_port)
3271 ret = i40e_add_del_cloud_filter_big_buf(vsi, &cfilter, false);
3272 else
3273 ret = i40e_add_del_cloud_filter(vsi, &cfilter, false);
3274 if (ret) {
3275 dev_err(&pf->pdev->dev,
3276 "VF %d: Failed to delete cloud filter, err %s aq_err %s\n",
3277 vf->vf_id, i40e_stat_str(&pf->hw, ret),
3278 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
3279 goto err;
3280 }
3281
3282 hlist_for_each_entry_safe(cf, node,
3283 &vf->cloud_filter_list, cloud_node) {
3284 if (cf->seid != cfilter.seid)
3285 continue;
3286 if (mask.dst_port)
3287 if (cfilter.dst_port != cf->dst_port)
3288 continue;
3289 if (mask.dst_mac[0])
3290 if (!ether_addr_equal(cf->src_mac, cfilter.src_mac))
3291 continue;
3292 /* for ipv4 data to be valid, only first byte of mask is set */
3293 if (cfilter.n_proto == ETH_P_IP && mask.dst_ip[0])
3294 if (memcmp(&cfilter.ip.v4.dst_ip, &cf->ip.v4.dst_ip,
3295 ARRAY_SIZE(tcf.dst_ip)))
3296 continue;
3297 /* for ipv6, mask is set for all sixteen bytes (4 words) */
3298 if (cfilter.n_proto == ETH_P_IPV6 && mask.dst_ip[3])
3299 if (memcmp(&cfilter.ip.v6.dst_ip6, &cf->ip.v6.dst_ip6,
3300 sizeof(cfilter.ip.v6.src_ip6)))
3301 continue;
3302 if (mask.vlan_id)
3303 if (cfilter.vlan_id != cf->vlan_id)
3304 continue;
3305
3306 hlist_del(&cf->cloud_node);
3307 kfree(cf);
3308 vf->num_cloud_filters--;
3309 }
3310
3311err:
3312 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_CLOUD_FILTER,
3313 aq_ret);
3314}
3315
3316/**
3317 * i40e_vc_add_cloud_filter
3318 * @vf: pointer to the VF info
3319 * @msg: pointer to the msg buffer
3320 *
3321 * This function adds a cloud filter programmed as TC filter for ADq
3322 **/
3323static int i40e_vc_add_cloud_filter(struct i40e_vf *vf, u8 *msg)
3324{
3325 struct virtchnl_filter *vcf = (struct virtchnl_filter *)msg;
3326 struct virtchnl_l4_spec mask = vcf->mask.tcp_spec;
3327 struct virtchnl_l4_spec tcf = vcf->data.tcp_spec;
3328 struct i40e_cloud_filter *cfilter = NULL;
3329 struct i40e_pf *pf = vf->pf;
3330 struct i40e_vsi *vsi = NULL;
3331 i40e_status aq_ret = 0;
3332 int i, ret;
3333
3334 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3335 aq_ret = I40E_ERR_PARAM;
3336 goto err;
3337 }
3338
3339 if (!vf->adq_enabled) {
3340 dev_info(&pf->pdev->dev,
3341 "VF %d: ADq is not enabled, can't apply cloud filter\n",
3342 vf->vf_id);
3343 aq_ret = I40E_ERR_PARAM;
3344 goto err;
3345 }
3346
3347 if (i40e_validate_cloud_filter(vf, vcf)) {
3348 dev_info(&pf->pdev->dev,
3349 "VF %d: Invalid input/s, can't apply cloud filter\n",
3350 vf->vf_id);
3351 aq_ret = I40E_ERR_PARAM;
3352 goto err;
3353 }
3354
3355 cfilter = kzalloc(sizeof(*cfilter), GFP_KERNEL);
3356 if (!cfilter)
3357 return -ENOMEM;
3358
3359 /* parse destination mac address */
3360 for (i = 0; i < ETH_ALEN; i++)
3361 cfilter->dst_mac[i] = mask.dst_mac[i] & tcf.dst_mac[i];
3362
3363 /* parse source mac address */
3364 for (i = 0; i < ETH_ALEN; i++)
3365 cfilter->src_mac[i] = mask.src_mac[i] & tcf.src_mac[i];
3366
3367 cfilter->vlan_id = mask.vlan_id & tcf.vlan_id;
3368 cfilter->dst_port = mask.dst_port & tcf.dst_port;
3369 cfilter->src_port = mask.src_port & tcf.src_port;
3370
3371 switch (vcf->flow_type) {
3372 case VIRTCHNL_TCP_V4_FLOW:
3373 cfilter->n_proto = ETH_P_IP;
3374 if (mask.dst_ip[0] & tcf.dst_ip[0])
3375 memcpy(&cfilter->ip.v4.dst_ip, tcf.dst_ip,
3376 ARRAY_SIZE(tcf.dst_ip));
3377 else if (mask.src_ip[0] & tcf.dst_ip[0])
3378 memcpy(&cfilter->ip.v4.src_ip, tcf.src_ip,
3379 ARRAY_SIZE(tcf.dst_ip));
3380 break;
3381 case VIRTCHNL_TCP_V6_FLOW:
3382 cfilter->n_proto = ETH_P_IPV6;
3383 if (mask.dst_ip[3] & tcf.dst_ip[3])
3384 memcpy(&cfilter->ip.v6.dst_ip6, tcf.dst_ip,
3385 sizeof(cfilter->ip.v6.dst_ip6));
3386 if (mask.src_ip[3] & tcf.src_ip[3])
3387 memcpy(&cfilter->ip.v6.src_ip6, tcf.src_ip,
3388 sizeof(cfilter->ip.v6.src_ip6));
3389 break;
3390 default:
3391 /* TC filter can be configured based on different combinations
3392 * and in this case IP is not a part of filter config
3393 */
3394 dev_info(&pf->pdev->dev, "VF %d: Flow type not configured\n",
3395 vf->vf_id);
3396 }
3397
3398 /* get the VSI to which the TC belongs to */
3399 vsi = pf->vsi[vf->ch[vcf->action_meta].vsi_idx];
3400 cfilter->seid = vsi->seid;
3401 cfilter->flags = vcf->field_flags;
3402
3403 /* Adding cloud filter programmed as TC filter */
3404 if (tcf.dst_port)
3405 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter, true);
3406 else
3407 ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
3408 if (ret) {
3409 dev_err(&pf->pdev->dev,
3410 "VF %d: Failed to add cloud filter, err %s aq_err %s\n",
3411 vf->vf_id, i40e_stat_str(&pf->hw, ret),
3412 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
3413 goto err;
3414 }
3415
3416 INIT_HLIST_NODE(&cfilter->cloud_node);
3417 hlist_add_head(&cfilter->cloud_node, &vf->cloud_filter_list);
3418 vf->num_cloud_filters++;
3419err:
3420 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_CLOUD_FILTER,
3421 aq_ret);
3422}
3423
c27eac48
AD		 3424/**
3425 * i40e_vc_add_qch_msg: Add queue channel and enable ADq
3426 * @vf: pointer to the VF info
3427 * @msg: pointer to the msg buffer
3428 **/
3429static int i40e_vc_add_qch_msg(struct i40e_vf *vf, u8 *msg)
3430{
3431 struct virtchnl_tc_info *tci =
3432 (struct virtchnl_tc_info *)msg;
3433 struct i40e_pf *pf = vf->pf;
0c483bd4
AD		 3434 struct i40e_link_status *ls = &pf->hw.phy.link_info;
3435 int i, adq_request_qps = 0, speed = 0;
c27eac48
AD		 3436 i40e_status aq_ret = 0;
3437
3438 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3439 aq_ret = I40E_ERR_PARAM;
3440 goto err;
3441 }
3442
3443 /* ADq cannot be applied if spoof check is ON */
3444 if (vf->spoofchk) {
3445 dev_err(&pf->pdev->dev,
3446 "Spoof check is ON, turn it OFF to enable ADq\n");
3447 aq_ret = I40E_ERR_PARAM;
3448 goto err;
3449 }
3450
3451 if (!(vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ADQ)) {
3452 dev_err(&pf->pdev->dev,
3453 "VF %d attempting to enable ADq, but hasn't properly negotiated that capability\n",
3454 vf->vf_id);
3455 aq_ret = I40E_ERR_PARAM;
3456 goto err;
3457 }
3458
3459 /* max number of traffic classes for VF currently capped at 4 */
3460 if (!tci->num_tc || tci->num_tc > I40E_MAX_VF_VSI) {
3461 dev_err(&pf->pdev->dev,
3462 "VF %d trying to set %u TCs, valid range 1-4 TCs per VF\n",
3463 vf->vf_id, tci->num_tc);
3464 aq_ret = I40E_ERR_PARAM;
3465 goto err;
3466 }
3467
3468 /* validate queues for each TC */
3469 for (i = 0; i < tci->num_tc; i++)
3470 if (!tci->list[i].count ||
3471 tci->list[i].count > I40E_DEFAULT_QUEUES_PER_VF) {
3472 dev_err(&pf->pdev->dev,
3473 "VF %d: TC %d trying to set %u queues, valid range 1-4 queues per TC\n",
3474 vf->vf_id, i, tci->list[i].count);
3475 aq_ret = I40E_ERR_PARAM;
3476 goto err;
3477 }
3478
3479 /* need Max VF queues but already have default number of queues */
3480 adq_request_qps = I40E_MAX_VF_QUEUES - I40E_DEFAULT_QUEUES_PER_VF;
3481
3482 if (pf->queues_left < adq_request_qps) {
3483 dev_err(&pf->pdev->dev,
3484 "No queues left to allocate to VF %d\n",
3485 vf->vf_id);
3486 aq_ret = I40E_ERR_PARAM;
3487 goto err;
3488 } else {
3489 /* we need to allocate max VF queues to enable ADq so as to
3490 * make sure ADq enabled VF always gets back queues when it
3491 * goes through a reset.
3492 */
3493 vf->num_queue_pairs = I40E_MAX_VF_QUEUES;
3494 }
3495
0c483bd4
AD		 3496 /* get link speed in MB to validate rate limit */
3497 switch (ls->link_speed) {
3498 case VIRTCHNL_LINK_SPEED_100MB:
3499 speed = SPEED_100;
3500 break;
3501 case VIRTCHNL_LINK_SPEED_1GB:
3502 speed = SPEED_1000;
3503 break;
3504 case VIRTCHNL_LINK_SPEED_10GB:
3505 speed = SPEED_10000;
3506 break;
3507 case VIRTCHNL_LINK_SPEED_20GB:
3508 speed = SPEED_20000;
3509 break;
3510 case VIRTCHNL_LINK_SPEED_25GB:
3511 speed = SPEED_25000;
3512 break;
3513 case VIRTCHNL_LINK_SPEED_40GB:
3514 speed = SPEED_40000;
3515 break;
3516 default:
3517 dev_err(&pf->pdev->dev,
3518 "Cannot detect link speed\n");
3519 aq_ret = I40E_ERR_PARAM;
3520 goto err;
3521 }
3522
c27eac48
AD		 3523 /* parse data from the queue channel info */
3524 vf->num_tc = tci->num_tc;
0c483bd4
AD		 3525 for (i = 0; i < vf->num_tc; i++) {
3526 if (tci->list[i].max_tx_rate) {
3527 if (tci->list[i].max_tx_rate > speed) {
3528 dev_err(&pf->pdev->dev,
3529 "Invalid max tx rate %llu specified for VF %d.",
3530 tci->list[i].max_tx_rate,
3531 vf->vf_id);
3532 aq_ret = I40E_ERR_PARAM;
3533 goto err;
3534 } else {
3535 vf->ch[i].max_tx_rate =
3536 tci->list[i].max_tx_rate;
3537 }
3538 }
c27eac48 3539 vf->ch[i].num_qps = tci->list[i].count;
0c483bd4 3540 }
c27eac48
AD		 3541
3542 /* set this flag only after making sure all inputs are sane */
3543 vf->adq_enabled = true;
e284fc28
AD		 3544 /* num_req_queues is set when user changes number of queues via ethtool
3545 * and this causes issue for default VSI(which depends on this variable)
3546 * when ADq is enabled, hence reset it.
3547 */
3548 vf->num_req_queues = 0;
c27eac48
AD		 3549
3550 /* reset the VF in order to allocate resources */
3551 i40e_vc_notify_vf_reset(vf);
3552 i40e_reset_vf(vf, false);
3553
3554 return I40E_SUCCESS;
3555
3556 /* send the response to the VF */
3557err:
3558 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_CHANNELS,
3559 aq_ret);
3560}
3561
c4998aa3
AD		 3562/**
3563 * i40e_vc_del_qch_msg
3564 * @vf: pointer to the VF info
3565 * @msg: pointer to the msg buffer
3566 **/
3567static int i40e_vc_del_qch_msg(struct i40e_vf *vf, u8 *msg)
3568{
3569 struct i40e_pf *pf = vf->pf;
3570 i40e_status aq_ret = 0;
3571
3572 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3573 aq_ret = I40E_ERR_PARAM;
3574 goto err;
3575 }
3576
3577 if (vf->adq_enabled) {
e284fc28 3578 i40e_del_all_cloud_filters(vf);
c4998aa3
AD		 3579 i40e_del_qch(vf);
3580 vf->adq_enabled = false;
3581 vf->num_tc = 0;
3582 dev_info(&pf->pdev->dev,
e284fc28 3583 "Deleting Queue Channels and cloud filters for ADq on VF %d\n",
c4998aa3
AD		 3584 vf->vf_id);
3585 } else {
3586 dev_info(&pf->pdev->dev, "VF %d trying to delete queue channels but ADq isn't enabled\n",
3587 vf->vf_id);
3588 aq_ret = I40E_ERR_PARAM;
3589 }
3590
3591 /* reset the VF in order to allocate resources */
3592 i40e_vc_notify_vf_reset(vf);
3593 i40e_reset_vf(vf, false);
3594
3595 return I40E_SUCCESS;
3596
3597err:
3598 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_CHANNELS,
3599 aq_ret);
3600}
3601
5c3c48ac
JB		 3602/**
3603 * i40e_vc_process_vf_msg
b40c82e6
JK		 3604 * @pf: pointer to the PF structure
3605 * @vf_id: source VF id
f5254429
JK		 3606 * @v_opcode: operation code
3607 * @v_retval: unused return value code
5c3c48ac
JB		 3608 * @msg: pointer to the msg buffer
3609 * @msglen: msg length
5c3c48ac
JB		 3610 *
3611 * called from the common aeq/arq handler to
b40c82e6 3612 * process request from VF
5c3c48ac 3613 **/
a1b5a24f 3614int i40e_vc_process_vf_msg(struct i40e_pf *pf, s16 vf_id, u32 v_opcode,
f5254429 3615 u32 __always_unused v_retval, u8 *msg, u16 msglen)
5c3c48ac 3616{
5c3c48ac 3617 struct i40e_hw *hw = &pf->hw;
a1b5a24f 3618 int local_vf_id = vf_id - (s16)hw->func_caps.vf_base_id;
6c1b5bff 3619 struct i40e_vf *vf;
5c3c48ac
JB		 3620 int ret;
3621
3622 pf->vf_aq_requests++;
7efa84b7 3623 if (local_vf_id >= pf->num_alloc_vfs)
6c1b5bff 3624 return -EINVAL;
7efa84b7 3625 vf = &(pf->vf[local_vf_id]);
260e9382
JB		 3626
3627 /* Check if VF is disabled. */
3628 if (test_bit(I40E_VF_STATE_DISABLED, &vf->vf_states))
3629 return I40E_ERR_PARAM;
3630
5c3c48ac 3631 /* perform basic checks on the msg */
735e35c5 3632 ret = virtchnl_vc_validate_vf_msg(&vf->vf_ver, v_opcode, msg, msglen);
5c3c48ac 3633
260e9382
JB		 3634 /* perform additional checks specific to this driver */
3635 if (v_opcode == VIRTCHNL_OP_CONFIG_RSS_KEY) {
3636 struct virtchnl_rss_key *vrk = (struct virtchnl_rss_key *)msg;
3637
3638 if (vrk->key_len != I40E_HKEY_ARRAY_SIZE)
3639 ret = -EINVAL;
3640 } else if (v_opcode == VIRTCHNL_OP_CONFIG_RSS_LUT) {
3641 struct virtchnl_rss_lut *vrl = (struct virtchnl_rss_lut *)msg;
3642
3643 if (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)
3644 ret = -EINVAL;
3645 }
3646
5c3c48ac 3647 if (ret) {
764430ce 3648 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
b40c82e6 3649 dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n",
7efa84b7 3650 local_vf_id, v_opcode, msglen);
764430ce
JB		 3651 switch (ret) {
3652 case VIRTCHNL_ERR_PARAM:
3653 return -EPERM;
3654 default:
3655 return -EINVAL;
3656 }
5c3c48ac 3657 }
bae3cae4 3658
5c3c48ac 3659 switch (v_opcode) {
310a2ad9 3660 case VIRTCHNL_OP_VERSION:
f4ca1a22 3661 ret = i40e_vc_get_version_msg(vf, msg);
5c3c48ac 3662 break;
310a2ad9 3663 case VIRTCHNL_OP_GET_VF_RESOURCES:
f4ca1a22 3664 ret = i40e_vc_get_vf_resources_msg(vf, msg);
d3d657a9 3665 i40e_vc_notify_vf_link_state(vf);
5c3c48ac 3666 break;
310a2ad9 3667 case VIRTCHNL_OP_RESET_VF:
fc18eaa0
MW		 3668 i40e_vc_reset_vf_msg(vf);
3669 ret = 0;
5c3c48ac 3670 break;
310a2ad9 3671 case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
5c3c48ac
JB		 3672 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen);
3673 break;
310a2ad9 3674 case VIRTCHNL_OP_CONFIG_VSI_QUEUES:
5c3c48ac
JB		 3675 ret = i40e_vc_config_queues_msg(vf, msg, msglen);
3676 break;
310a2ad9 3677 case VIRTCHNL_OP_CONFIG_IRQ_MAP:
5c3c48ac
JB		 3678 ret = i40e_vc_config_irq_map_msg(vf, msg, msglen);
3679 break;
310a2ad9 3680 case VIRTCHNL_OP_ENABLE_QUEUES:
5c3c48ac 3681 ret = i40e_vc_enable_queues_msg(vf, msg, msglen);
055b295d 3682 i40e_vc_notify_vf_link_state(vf);
5c3c48ac 3683 break;
310a2ad9 3684 case VIRTCHNL_OP_DISABLE_QUEUES:
5c3c48ac
JB		 3685 ret = i40e_vc_disable_queues_msg(vf, msg, msglen);
3686 break;
310a2ad9 3687 case VIRTCHNL_OP_ADD_ETH_ADDR:
5c3c48ac
JB		 3688 ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen);
3689 break;
310a2ad9 3690 case VIRTCHNL_OP_DEL_ETH_ADDR:
5c3c48ac
JB		 3691 ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen);
3692 break;
310a2ad9 3693 case VIRTCHNL_OP_ADD_VLAN:
5c3c48ac
JB		 3694 ret = i40e_vc_add_vlan_msg(vf, msg, msglen);
3695 break;
310a2ad9 3696 case VIRTCHNL_OP_DEL_VLAN:
5c3c48ac
JB		 3697 ret = i40e_vc_remove_vlan_msg(vf, msg, msglen);
3698 break;
310a2ad9 3699 case VIRTCHNL_OP_GET_STATS:
5c3c48ac
JB		 3700 ret = i40e_vc_get_stats_msg(vf, msg, msglen);
3701 break;
310a2ad9 3702 case VIRTCHNL_OP_IWARP:
e3219ce6
ASJ		 3703 ret = i40e_vc_iwarp_msg(vf, msg, msglen);
3704 break;
310a2ad9 3705 case VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
e3219ce6
ASJ		 3706 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, true);
3707 break;
310a2ad9 3708 case VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
e3219ce6
ASJ		 3709 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, false);
3710 break;
310a2ad9 3711 case VIRTCHNL_OP_CONFIG_RSS_KEY:
c4e1868c
MW		 3712 ret = i40e_vc_config_rss_key(vf, msg, msglen);
3713 break;
310a2ad9 3714 case VIRTCHNL_OP_CONFIG_RSS_LUT:
c4e1868c
MW		 3715 ret = i40e_vc_config_rss_lut(vf, msg, msglen);
3716 break;
310a2ad9 3717 case VIRTCHNL_OP_GET_RSS_HENA_CAPS:
c4e1868c
MW		 3718 ret = i40e_vc_get_rss_hena(vf, msg, msglen);
3719 break;
310a2ad9 3720 case VIRTCHNL_OP_SET_RSS_HENA:
c4e1868c
MW		 3721 ret = i40e_vc_set_rss_hena(vf, msg, msglen);
3722 break;
8774370d
MS		 3723 case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING:
3724 ret = i40e_vc_enable_vlan_stripping(vf, msg, msglen);
3725 break;
3726 case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING:
3727 ret = i40e_vc_disable_vlan_stripping(vf, msg, msglen);
3728 break;
a3f5aa90
AB		 3729 case VIRTCHNL_OP_REQUEST_QUEUES:
3730 ret = i40e_vc_request_queues_msg(vf, msg, msglen);
3731 break;
c27eac48
AD		 3732 case VIRTCHNL_OP_ENABLE_CHANNELS:
3733 ret = i40e_vc_add_qch_msg(vf, msg);
3734 break;
c4998aa3
AD		 3735 case VIRTCHNL_OP_DISABLE_CHANNELS:
3736 ret = i40e_vc_del_qch_msg(vf, msg);
3737 break;
e284fc28
AD		 3738 case VIRTCHNL_OP_ADD_CLOUD_FILTER:
3739 ret = i40e_vc_add_cloud_filter(vf, msg);
3740 break;
3741 case VIRTCHNL_OP_DEL_CLOUD_FILTER:
3742 ret = i40e_vc_del_cloud_filter(vf, msg);
3743 break;
310a2ad9 3744 case VIRTCHNL_OP_UNKNOWN:
5c3c48ac 3745 default:
b40c82e6 3746 dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n",
7efa84b7 3747 v_opcode, local_vf_id);
5c3c48ac
JB		 3748 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
3749 I40E_ERR_NOT_IMPLEMENTED);
3750 break;
3751 }
3752
3753 return ret;
3754}
3755
3756/**
3757 * i40e_vc_process_vflr_event
b40c82e6 3758 * @pf: pointer to the PF structure
5c3c48ac
JB		 3759 *
3760 * called from the vlfr irq handler to
b40c82e6 3761 * free up VF resources and state variables
5c3c48ac
JB		 3762 **/
3763int i40e_vc_process_vflr_event(struct i40e_pf *pf)
3764{
5c3c48ac 3765 struct i40e_hw *hw = &pf->hw;
a1b5a24f 3766 u32 reg, reg_idx, bit_idx;
5c3c48ac 3767 struct i40e_vf *vf;
a1b5a24f 3768 int vf_id;
5c3c48ac 3769
0da36b97 3770 if (!test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
5c3c48ac
JB		 3771 return 0;
3772
0d790327
MW		 3773 /* Re-enable the VFLR interrupt cause here, before looking for which
3774 * VF got reset. Otherwise, if another VF gets a reset while the
3775 * first one is being processed, that interrupt will be lost, and
3776 * that VF will be stuck in reset forever.
3777 */
c5c2f7c3
MW		 3778 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
3779 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
3780 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
3781 i40e_flush(hw);
3782
0da36b97 3783 clear_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
5c3c48ac
JB		 3784 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
3785 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
3786 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
b40c82e6 3787 /* read GLGEN_VFLRSTAT register to find out the flr VFs */
5c3c48ac
JB		 3788 vf = &pf->vf[vf_id];
3789 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
7369ca87 3790 if (reg & BIT(bit_idx))
7e5a313e 3791 /* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */
7369ca87 3792 i40e_reset_vf(vf, true);
5c3c48ac
JB		 3793 }
3794
5c3c48ac
JB		 3795 return 0;
3796}
3797
5c3c48ac
JB		 3798/**
3799 * i40e_ndo_set_vf_mac
3800 * @netdev: network interface device structure
b40c82e6 3801 * @vf_id: VF identifier
5c3c48ac
JB		 3802 * @mac: mac address
3803 *
b40c82e6 3804 * program VF mac address
5c3c48ac
JB		 3805 **/
3806int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
3807{
3808 struct i40e_netdev_priv *np = netdev_priv(netdev);
3809 struct i40e_vsi *vsi = np->vsi;
3810 struct i40e_pf *pf = vsi->back;
3811 struct i40e_mac_filter *f;
3812 struct i40e_vf *vf;
3813 int ret = 0;
784548c4 3814 struct hlist_node *h;
278e7d0b 3815 int bkt;
028daf80 3816 u8 i;
5c3c48ac
JB		 3817
3818 /* validate the request */
3819 if (vf_id >= pf->num_alloc_vfs) {
3820 dev_err(&pf->pdev->dev,
3821 "Invalid VF Identifier %d\n", vf_id);
3822 ret = -EINVAL;
3823 goto error_param;
3824 }
3825
3826 vf = &(pf->vf[vf_id]);
fdf0e0bf 3827 vsi = pf->vsi[vf->lan_vsi_idx];
028daf80
PJ		 3828
3829 /* When the VF is resetting wait until it is done.
3830 * It can take up to 200 milliseconds,
3831 * but wait for up to 300 milliseconds to be safe.
3832 */
3833 for (i = 0; i < 15; i++) {
3834 if (test_bit(I40E_VF_STATE_INIT, &vf->vf_states))
3835 break;
3836 msleep(20);
3837 }
6322e63c 3838 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3839 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3840 vf_id);
3841 ret = -EAGAIN;
5c3c48ac
JB		 3842 goto error_param;
3843 }
3844
efd8e39a 3845 if (is_multicast_ether_addr(mac)) {
5c3c48ac 3846 dev_err(&pf->pdev->dev,
efd8e39a 3847 "Invalid Ethernet address %pM for VF %d\n", mac, vf_id);
5c3c48ac
JB		 3848 ret = -EINVAL;
3849 goto error_param;
3850 }
3851
21659035 3852 /* Lock once because below invoked function add/del_filter requires
278e7d0b 3853 * mac_filter_hash_lock to be held
21659035 3854 */
278e7d0b 3855 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 3856
5c3c48ac 3857 /* delete the temporary mac address */
efd8e39a 3858 if (!is_zero_ether_addr(vf->default_lan_addr.addr))
9569a9a4 3859 i40e_del_mac_filter(vsi, vf->default_lan_addr.addr);
5c3c48ac 3860
29f71bb0
GR		 3861 /* Delete all the filters for this VSI - we're going to kill it
3862 * anyway.
3863 */
784548c4 3864 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
148141bb 3865 __i40e_del_filter(vsi, f);
5c3c48ac 3866
278e7d0b 3867 spin_unlock_bh(&vsi->mac_filter_hash_lock);
21659035 3868
5c3c48ac 3869 /* program mac filter */
17652c63 3870 if (i40e_sync_vsi_filters(vsi)) {
5c3c48ac
JB		 3871 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
3872 ret = -EIO;
3873 goto error_param;
3874 }
9a173901 3875 ether_addr_copy(vf->default_lan_addr.addr, mac);
2f1d86e4
SA		 3876
3877 if (is_zero_ether_addr(mac)) {
3878 vf->pf_set_mac = false;
3879 dev_info(&pf->pdev->dev, "Removing MAC on VF %d\n", vf_id);
3880 } else {
3881 vf->pf_set_mac = true;
3882 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n",
3883 mac, vf_id);
3884 }
3885
ae1e29f6
PJ		 3886 /* Force the VF interface down so it has to bring up with new MAC
3887 * address
3888 */
eeeddbb8 3889 i40e_vc_disable_vf(vf);
ae1e29f6 3890 dev_info(&pf->pdev->dev, "Bring down and up the VF interface to make this change effective.\n");
5c3c48ac
JB		 3891
3892error_param:
3893 return ret;
3894}
3895
ba4e003d
JK		 3896/**
3897 * i40e_vsi_has_vlans - True if VSI has configured VLANs
3898 * @vsi: pointer to the vsi
3899 *
3900 * Check if a VSI has configured any VLANs. False if we have a port VLAN or if
3901 * we have no configured VLANs. Do not call while holding the
3902 * mac_filter_hash_lock.
3903 */
3904static bool i40e_vsi_has_vlans(struct i40e_vsi *vsi)
3905{
3906 bool have_vlans;
3907
3908 /* If we have a port VLAN, then the VSI cannot have any VLANs
3909 * configured, as all MAC/VLAN filters will be assigned to the PVID.
3910 */
3911 if (vsi->info.pvid)
3912 return false;
3913
3914 /* Since we don't have a PVID, we know that if the device is in VLAN
3915 * mode it must be because of a VLAN filter configured on this VSI.
3916 */
3917 spin_lock_bh(&vsi->mac_filter_hash_lock);
3918 have_vlans = i40e_is_vsi_in_vlan(vsi);
3919 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3920
3921 return have_vlans;
3922}
3923
5c3c48ac
JB		 3924/**
3925 * i40e_ndo_set_vf_port_vlan
3926 * @netdev: network interface device structure
b40c82e6 3927 * @vf_id: VF identifier
5c3c48ac
JB		 3928 * @vlan_id: mac address
3929 * @qos: priority setting
79aab093 3930 * @vlan_proto: vlan protocol
5c3c48ac 3931 *
b40c82e6 3932 * program VF vlan id and/or qos
5c3c48ac 3933 **/
79aab093
MS		 3934int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, int vf_id,
3935 u16 vlan_id, u8 qos, __be16 vlan_proto)
5c3c48ac 3936{
f7fc2f2e 3937 u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT);
5c3c48ac
JB		 3938 struct i40e_netdev_priv *np = netdev_priv(netdev);
3939 struct i40e_pf *pf = np->vsi->back;
3940 struct i40e_vsi *vsi;
3941 struct i40e_vf *vf;
3942 int ret = 0;
3943
3944 /* validate the request */
3945 if (vf_id >= pf->num_alloc_vfs) {
3946 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3947 ret = -EINVAL;
3948 goto error_pvid;
3949 }
3950
3951 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
3952 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
3953 ret = -EINVAL;
3954 goto error_pvid;
3955 }
3956
79aab093
MS		 3957 if (vlan_proto != htons(ETH_P_8021Q)) {
3958 dev_err(&pf->pdev->dev, "VF VLAN protocol is not supported\n");
3959 ret = -EPROTONOSUPPORT;
3960 goto error_pvid;
3961 }
3962
5c3c48ac 3963 vf = &(pf->vf[vf_id]);
fdf0e0bf 3964 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 3965 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3966 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3967 vf_id);
3968 ret = -EAGAIN;
5c3c48ac
JB		 3969 goto error_pvid;
3970 }
3971
f7fc2f2e 3972 if (le16_to_cpu(vsi->info.pvid) == vlanprio)
85927ec1
MW		 3973 /* duplicate request, so just return success */
3974 goto error_pvid;
3975
ba4e003d 3976 if (i40e_vsi_has_vlans(vsi)) {
99a4973c
GR		 3977 dev_err(&pf->pdev->dev,
3978 "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
3979 vf_id);
f9b4b627
GR		 3980 /* Administrator Error - knock the VF offline until he does
3981 * the right thing by reconfiguring his network correctly
3982 * and then reloading the VF driver.
3983 */
eeeddbb8 3984 i40e_vc_disable_vf(vf);
35f3472a
MW		 3985 /* During reset the VF got a new VSI, so refresh the pointer. */
3986 vsi = pf->vsi[vf->lan_vsi_idx];
f9b4b627 3987 }
99a4973c 3988
ba4e003d
JK		 3989 /* Locked once because multiple functions below iterate list */
3990 spin_lock_bh(&vsi->mac_filter_hash_lock);
3991
8d82a7c5
GR		 3992 /* Check for condition where there was already a port VLAN ID
3993 * filter set and now it is being deleted by setting it to zero.
1315f7c3
GR		 3994 * Additionally check for the condition where there was a port
3995 * VLAN but now there is a new and different port VLAN being set.
8d82a7c5
GR		 3996 * Before deleting all the old VLAN filters we must add new ones
3997 * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our
3998 * MAC addresses deleted.
3999 */
1315f7c3 4000 if ((!(vlan_id || qos) ||
f7fc2f2e 4001 vlanprio != le16_to_cpu(vsi->info.pvid)) &&
9af52f60
JK		 4002 vsi->info.pvid) {
4003 ret = i40e_add_vlan_all_mac(vsi, I40E_VLAN_ANY);
4004 if (ret) {
4005 dev_info(&vsi->back->pdev->dev,
4006 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
4007 vsi->back->hw.aq.asq_last_status);
4008 spin_unlock_bh(&vsi->mac_filter_hash_lock);
4009 goto error_pvid;
4010 }
4011 }
8d82a7c5 4012
5c3c48ac 4013 if (vsi->info.pvid) {
9af52f60
JK		 4014 /* remove all filters on the old VLAN */
4015 i40e_rm_vlan_all_mac(vsi, (le16_to_cpu(vsi->info.pvid) &
4016 VLAN_VID_MASK));
5c3c48ac 4017 }
9af52f60 4018
640f93cc 4019 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac 4020 if (vlan_id || qos)
f7fc2f2e 4021 ret = i40e_vsi_add_pvid(vsi, vlanprio);
5c3c48ac 4022 else
6c12fcbf 4023 i40e_vsi_remove_pvid(vsi);
640f93cc 4024 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 4025
4026 if (vlan_id) {
4027 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
4028 vlan_id, qos, vf_id);
4029
9af52f60
JK		 4030 /* add new VLAN filter for each MAC */
4031 ret = i40e_add_vlan_all_mac(vsi, vlan_id);
5c3c48ac
JB		 4032 if (ret) {
4033 dev_info(&vsi->back->pdev->dev,
4034 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
4035 vsi->back->hw.aq.asq_last_status);
9af52f60 4036 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 4037 goto error_pvid;
4038 }
9af52f60
JK		 4039
4040 /* remove the previously added non-VLAN MAC filters */
4041 i40e_rm_vlan_all_mac(vsi, I40E_VLAN_ANY);
5c3c48ac
JB		 4042 }
4043
9af52f60
JK		 4044 spin_unlock_bh(&vsi->mac_filter_hash_lock);
4045
4046 /* Schedule the worker thread to take care of applying changes */
4047 i40e_service_event_schedule(vsi->back);
4048
5c3c48ac
JB		 4049 if (ret) {
4050 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
4051 goto error_pvid;
4052 }
9af52f60 4053
6c12fcbf
GR		 4054 /* The Port VLAN needs to be saved across resets the same as the
4055 * default LAN MAC address.
4056 */
4057 vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
5c3c48ac
JB		 4058 ret = 0;
4059
4060error_pvid:
4061 return ret;
4062}
4063
4064/**
4065 * i40e_ndo_set_vf_bw
4066 * @netdev: network interface device structure
b40c82e6 4067 * @vf_id: VF identifier
f5254429
JK		 4068 * @min_tx_rate: Minimum Tx rate
4069 * @max_tx_rate: Maximum Tx rate
5c3c48ac 4070 *
b40c82e6 4071 * configure VF Tx rate
5c3c48ac 4072 **/
ed616689
SC		 4073int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
4074 int max_tx_rate)
5c3c48ac 4075{
6b192891
MW		 4076 struct i40e_netdev_priv *np = netdev_priv(netdev);
4077 struct i40e_pf *pf = np->vsi->back;
4078 struct i40e_vsi *vsi;
4079 struct i40e_vf *vf;
6b192891
MW		 4080 int ret = 0;
4081
4082 /* validate the request */
4083 if (vf_id >= pf->num_alloc_vfs) {
4084 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d.\n", vf_id);
4085 ret = -EINVAL;
4086 goto error;
4087 }
4088
ed616689 4089 if (min_tx_rate) {
b40c82e6 4090 dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n",
ed616689
SC		 4091 min_tx_rate, vf_id);
4092 return -EINVAL;
4093 }
4094
6b192891 4095 vf = &(pf->vf[vf_id]);
fdf0e0bf 4096 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 4097 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4098 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4099 vf_id);
4100 ret = -EAGAIN;
6b192891
MW		 4101 goto error;
4102 }
4103
5ecae412
AN		 4104 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
4105 if (ret)
6b192891 4106 goto error;
dac9b31a 4107
ed616689 4108 vf->tx_rate = max_tx_rate;
6b192891
MW		 4109error:
4110 return ret;
5c3c48ac
JB		 4111}
4112
4113/**
4114 * i40e_ndo_get_vf_config
4115 * @netdev: network interface device structure
b40c82e6
JK		 4116 * @vf_id: VF identifier
4117 * @ivi: VF configuration structure
5c3c48ac 4118 *
b40c82e6 4119 * return VF configuration
5c3c48ac
JB		 4120 **/
4121int i40e_ndo_get_vf_config(struct net_device *netdev,
4122 int vf_id, struct ifla_vf_info *ivi)
4123{
4124 struct i40e_netdev_priv *np = netdev_priv(netdev);
5c3c48ac
JB		 4125 struct i40e_vsi *vsi = np->vsi;
4126 struct i40e_pf *pf = vsi->back;
4127 struct i40e_vf *vf;
4128 int ret = 0;
4129
4130 /* validate the request */
4131 if (vf_id >= pf->num_alloc_vfs) {
4132 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
4133 ret = -EINVAL;
4134 goto error_param;
4135 }
4136
4137 vf = &(pf->vf[vf_id]);
4138 /* first vsi is always the LAN vsi */
fdf0e0bf 4139 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 4140 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4141 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4142 vf_id);
4143 ret = -EAGAIN;
5c3c48ac
JB		 4144 goto error_param;
4145 }
4146
4147 ivi->vf = vf_id;
4148
6995b36c 4149 ether_addr_copy(ivi->mac, vf->default_lan_addr.addr);
5c3c48ac 4150
ed616689
SC		 4151 ivi->max_tx_rate = vf->tx_rate;
4152 ivi->min_tx_rate = 0;
5c3c48ac
JB		 4153 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
4154 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
4155 I40E_VLAN_PRIORITY_SHIFT;
84ca55a0
MW		 4156 if (vf->link_forced == false)
4157 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
4158 else if (vf->link_up == true)
4159 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
4160 else
4161 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
c674d125 4162 ivi->spoofchk = vf->spoofchk;
d40062f3 4163 ivi->trusted = vf->trusted;
5c3c48ac
JB		 4164 ret = 0;
4165
4166error_param:
4167 return ret;
4168}
588aefa0
MW		 4169
4170/**
4171 * i40e_ndo_set_vf_link_state
4172 * @netdev: network interface device structure
b40c82e6 4173 * @vf_id: VF identifier
588aefa0
MW		 4174 * @link: required link state
4175 *
4176 * Set the link state of a specified VF, regardless of physical link state
4177 **/
4178int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
4179{
4180 struct i40e_netdev_priv *np = netdev_priv(netdev);
4181 struct i40e_pf *pf = np->vsi->back;
310a2ad9 4182 struct virtchnl_pf_event pfe;
588aefa0
MW		 4183 struct i40e_hw *hw = &pf->hw;
4184 struct i40e_vf *vf;
f19efbb5 4185 int abs_vf_id;
588aefa0
MW		 4186 int ret = 0;
4187
4188 /* validate the request */
4189 if (vf_id >= pf->num_alloc_vfs) {
4190 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
4191 ret = -EINVAL;
4192 goto error_out;
4193 }
4194
4195 vf = &pf->vf[vf_id];
f19efbb5 4196 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
588aefa0 4197
310a2ad9 4198 pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
ff3f4cc2 4199 pfe.severity = PF_EVENT_SEVERITY_INFO;
588aefa0
MW		 4200
4201 switch (link) {
4202 case IFLA_VF_LINK_STATE_AUTO:
4203 vf->link_forced = false;
4204 pfe.event_data.link_event.link_status =
4205 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
4206 pfe.event_data.link_event.link_speed =
ff3f4cc2 4207 (enum virtchnl_link_speed)
588aefa0
MW		 4208 pf->hw.phy.link_info.link_speed;
4209 break;
4210 case IFLA_VF_LINK_STATE_ENABLE:
4211 vf->link_forced = true;
4212 vf->link_up = true;
4213 pfe.event_data.link_event.link_status = true;
4214 pfe.event_data.link_event.link_speed = I40E_LINK_SPEED_40GB;
4215 break;
4216 case IFLA_VF_LINK_STATE_DISABLE:
4217 vf->link_forced = true;
4218 vf->link_up = false;
4219 pfe.event_data.link_event.link_status = false;
4220 pfe.event_data.link_event.link_speed = 0;
4221 break;
4222 default:
4223 ret = -EINVAL;
4224 goto error_out;
4225 }
4226 /* Notify the VF of its new link state */
310a2ad9 4227 i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
588aefa0
MW		 4228 0, (u8 *)&pfe, sizeof(pfe), NULL);
4229
4230error_out:
4231 return ret;
4232}
c674d125
MW		 4233
4234/**
4235 * i40e_ndo_set_vf_spoofchk
4236 * @netdev: network interface device structure
b40c82e6 4237 * @vf_id: VF identifier
c674d125
MW		 4238 * @enable: flag to enable or disable feature
4239 *
4240 * Enable or disable VF spoof checking
4241 **/
e6d9004d 4242int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable)
c674d125
MW		 4243{
4244 struct i40e_netdev_priv *np = netdev_priv(netdev);
4245 struct i40e_vsi *vsi = np->vsi;
4246 struct i40e_pf *pf = vsi->back;
4247 struct i40e_vsi_context ctxt;
4248 struct i40e_hw *hw = &pf->hw;
4249 struct i40e_vf *vf;
4250 int ret = 0;
4251
4252 /* validate the request */
4253 if (vf_id >= pf->num_alloc_vfs) {
4254 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
4255 ret = -EINVAL;
4256 goto out;
4257 }
4258
4259 vf = &(pf->vf[vf_id]);
6322e63c 4260 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4261 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4262 vf_id);
4263 ret = -EAGAIN;
4264 goto out;
4265 }
c674d125
MW		 4266
4267 if (enable == vf->spoofchk)
4268 goto out;
4269
4270 vf->spoofchk = enable;
4271 memset(&ctxt, 0, sizeof(ctxt));
fdf0e0bf 4272 ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid;
c674d125
MW		 4273 ctxt.pf_num = pf->hw.pf_id;
4274 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
4275 if (enable)
30d71af5
GR		 4276 ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
4277 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
c674d125
MW		 4278 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
4279 if (ret) {
4280 dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
4281 ret);
4282 ret = -EIO;
4283 }
4284out:
4285 return ret;
4286}
c3bbbd20
ASJ		 4287
4288/**
4289 * i40e_ndo_set_vf_trust
4290 * @netdev: network interface device structure of the pf
4291 * @vf_id: VF identifier
4292 * @setting: trust setting
4293 *
4294 * Enable or disable VF trust setting
4295 **/
4296int i40e_ndo_set_vf_trust(struct net_device *netdev, int vf_id, bool setting)
4297{
4298 struct i40e_netdev_priv *np = netdev_priv(netdev);
4299 struct i40e_pf *pf = np->vsi->back;
4300 struct i40e_vf *vf;
4301 int ret = 0;
4302
4303 /* validate the request */
4304 if (vf_id >= pf->num_alloc_vfs) {
4305 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
4306 return -EINVAL;
4307 }
4308
4309 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4310 dev_err(&pf->pdev->dev, "Trusted VF not supported in MFP mode.\n");
4311 return -EINVAL;
4312 }
4313
4314 vf = &pf->vf[vf_id];
4315
c3bbbd20
ASJ		 4316 if (setting == vf->trusted)
4317 goto out;
4318
4319 vf->trusted = setting;
f18d2021 4320 i40e_vc_disable_vf(vf);
c3bbbd20
ASJ		 4321 dev_info(&pf->pdev->dev, "VF %u is now %strusted\n",
4322 vf_id, setting ? "" : "un");
e284fc28
AD		 4323
4324 if (vf->adq_enabled) {
4325 if (!vf->trusted) {
4326 dev_info(&pf->pdev->dev,
4327 "VF %u no longer Trusted, deleting all cloud filters\n",
4328 vf_id);
4329 i40e_del_all_cloud_filters(vf);
4330 }
4331 }
4332
c3bbbd20
ASJ		 4333out:
4334 return ret;
4335}
Linux 6.x block layer and io_uring tree(s)