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i40evf: pass struct virtchnl_filter by reference rather than by value
[linux-2.6-block.git] / drivers / net / ethernet / intel / i40e / i40e_virtchnl_pf.c
CommitLineData
5c3c48ac
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
40d72a50 4 * Copyright(c) 2013 - 2016 Intel Corporation.
5c3c48ac
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
5c3c48ac
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#include "i40e.h"
28
532b0455
MW		 29/*********************notification routines***********************/
30
31/**
32 * i40e_vc_vf_broadcast
33 * @pf: pointer to the PF structure
34 * @opcode: operation code
35 * @retval: return value
36 * @msg: pointer to the msg buffer
37 * @msglen: msg length
38 *
39 * send a message to all VFs on a given PF
40 **/
41static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
310a2ad9 42 enum virtchnl_ops v_opcode,
532b0455
MW		 43 i40e_status v_retval, u8 *msg,
44 u16 msglen)
45{
46 struct i40e_hw *hw = &pf->hw;
47 struct i40e_vf *vf = pf->vf;
48 int i;
49
50 for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
a1b5a24f 51 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455 52 /* Not all vfs are enabled so skip the ones that are not */
6322e63c
JK		 53 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
54 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 55 continue;
56
57 /* Ignore return value on purpose - a given VF may fail, but
58 * we need to keep going and send to all of them
59 */
60 i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
61 msg, msglen, NULL);
62 }
63}
64
65/**
55f7d723 66 * i40e_vc_notify_vf_link_state
532b0455
MW		 67 * @vf: pointer to the VF structure
68 *
69 * send a link status message to a single VF
70 **/
71static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf)
72{
310a2ad9 73 struct virtchnl_pf_event pfe;
532b0455
MW		 74 struct i40e_pf *pf = vf->pf;
75 struct i40e_hw *hw = &pf->hw;
76 struct i40e_link_status *ls = &pf->hw.phy.link_info;
a1b5a24f 77 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455 78
310a2ad9 79 pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
ff3f4cc2 80 pfe.severity = PF_EVENT_SEVERITY_INFO;
532b0455
MW		 81 if (vf->link_forced) {
82 pfe.event_data.link_event.link_status = vf->link_up;
83 pfe.event_data.link_event.link_speed =
5b643479 84 (vf->link_up ? VIRTCHNL_LINK_SPEED_40GB : 0);
532b0455
MW		 85 } else {
86 pfe.event_data.link_event.link_status =
87 ls->link_info & I40E_AQ_LINK_UP;
ff3f4cc2 88 pfe.event_data.link_event.link_speed =
5b643479 89 i40e_virtchnl_link_speed(ls->link_speed);
532b0455 90 }
310a2ad9 91 i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
532b0455
MW		 92 0, (u8 *)&pfe, sizeof(pfe), NULL);
93}
94
95/**
96 * i40e_vc_notify_link_state
97 * @pf: pointer to the PF structure
98 *
99 * send a link status message to all VFs on a given PF
100 **/
101void i40e_vc_notify_link_state(struct i40e_pf *pf)
102{
103 int i;
104
105 for (i = 0; i < pf->num_alloc_vfs; i++)
106 i40e_vc_notify_vf_link_state(&pf->vf[i]);
107}
108
109/**
110 * i40e_vc_notify_reset
111 * @pf: pointer to the PF structure
112 *
113 * indicate a pending reset to all VFs on a given PF
114 **/
115void i40e_vc_notify_reset(struct i40e_pf *pf)
116{
310a2ad9 117 struct virtchnl_pf_event pfe;
532b0455 118
310a2ad9 119 pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
ff3f4cc2 120 pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
310a2ad9
JB		 121 i40e_vc_vf_broadcast(pf, VIRTCHNL_OP_EVENT, 0,
122 (u8 *)&pfe, sizeof(struct virtchnl_pf_event));
532b0455
MW		 123}
124
125/**
126 * i40e_vc_notify_vf_reset
127 * @vf: pointer to the VF structure
128 *
129 * indicate a pending reset to the given VF
130 **/
131void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
132{
310a2ad9 133 struct virtchnl_pf_event pfe;
532b0455
MW		 134 int abs_vf_id;
135
136 /* validate the request */
137 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
138 return;
139
140 /* verify if the VF is in either init or active before proceeding */
6322e63c
JK		 141 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
142 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 143 return;
144
a1b5a24f 145 abs_vf_id = vf->vf_id + (int)vf->pf->hw.func_caps.vf_base_id;
532b0455 146
310a2ad9 147 pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
ff3f4cc2 148 pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
310a2ad9 149 i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, VIRTCHNL_OP_EVENT,
532b0455 150 0, (u8 *)&pfe,
310a2ad9 151 sizeof(struct virtchnl_pf_event), NULL);
532b0455 152}
5c3c48ac
JB		 153/***********************misc routines*****************************/
154
f9b4b627
GR		 155/**
156 * i40e_vc_disable_vf
b40c82e6 157 * @vf: pointer to the VF info
f9b4b627 158 *
d43d60e5 159 * Disable the VF through a SW reset.
f9b4b627 160 **/
eeeddbb8 161static inline void i40e_vc_disable_vf(struct i40e_vf *vf)
f9b4b627 162{
d43d60e5
JK		 163 int i;
164
54f455ee 165 i40e_vc_notify_vf_reset(vf);
d43d60e5
JK		 166
167 /* We want to ensure that an actual reset occurs initiated after this
168 * function was called. However, we do not want to wait forever, so
169 * we'll give a reasonable time and print a message if we failed to
170 * ensure a reset.
171 */
172 for (i = 0; i < 20; i++) {
173 if (i40e_reset_vf(vf, false))
174 return;
175 usleep_range(10000, 20000);
176 }
177
178 dev_warn(&vf->pf->pdev->dev,
179 "Failed to initiate reset for VF %d after 200 milliseconds\n",
180 vf->vf_id);
f9b4b627
GR		 181}
182
5c3c48ac
JB		 183/**
184 * i40e_vc_isvalid_vsi_id
b40c82e6
JK		 185 * @vf: pointer to the VF info
186 * @vsi_id: VF relative VSI id
5c3c48ac 187 *
b40c82e6 188 * check for the valid VSI id
5c3c48ac 189 **/
fdf0e0bf 190static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id)
5c3c48ac
JB		 191{
192 struct i40e_pf *pf = vf->pf;
fdf0e0bf 193 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 194
fdf0e0bf 195 return (vsi && (vsi->vf_id == vf->vf_id));
5c3c48ac
JB		 196}
197
198/**
199 * i40e_vc_isvalid_queue_id
b40c82e6 200 * @vf: pointer to the VF info
5c3c48ac
JB		 201 * @vsi_id: vsi id
202 * @qid: vsi relative queue id
203 *
204 * check for the valid queue id
205 **/
fdf0e0bf 206static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 207 u8 qid)
208{
209 struct i40e_pf *pf = vf->pf;
fdf0e0bf 210 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 211
fdf0e0bf 212 return (vsi && (qid < vsi->alloc_queue_pairs));
5c3c48ac
JB		 213}
214
215/**
216 * i40e_vc_isvalid_vector_id
b40c82e6
JK		 217 * @vf: pointer to the VF info
218 * @vector_id: VF relative vector id
5c3c48ac
JB		 219 *
220 * check for the valid vector id
221 **/
222static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
223{
224 struct i40e_pf *pf = vf->pf;
225
9347eb77 226 return vector_id < pf->hw.func_caps.num_msix_vectors_vf;
5c3c48ac
JB		 227}
228
229/***********************vf resource mgmt routines*****************/
230
231/**
232 * i40e_vc_get_pf_queue_id
b40c82e6 233 * @vf: pointer to the VF info
fdf0e0bf 234 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 235 * @vsi_queue_id: vsi relative queue id
236 *
b40c82e6 237 * return PF relative queue id
5c3c48ac 238 **/
fdf0e0bf 239static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 240 u8 vsi_queue_id)
241{
242 struct i40e_pf *pf = vf->pf;
fdf0e0bf 243 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac
JB		 244 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
245
fdf0e0bf
ASJ		 246 if (!vsi)
247 return pf_queue_id;
248
5c3c48ac
JB		 249 if (le16_to_cpu(vsi->info.mapping_flags) &
250 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
251 pf_queue_id =
252 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
253 else
254 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
255 vsi_queue_id;
256
257 return pf_queue_id;
258}
259
c27eac48
AD		 260/**
261 * i40e_get_real_pf_qid
262 * @vf: pointer to the VF info
263 * @vsi_id: vsi id
264 * @queue_id: queue number
265 *
266 * wrapper function to get pf_queue_id handling ADq code as well
267 **/
268static u16 i40e_get_real_pf_qid(struct i40e_vf *vf, u16 vsi_id, u16 queue_id)
269{
270 int i;
271
272 if (vf->adq_enabled) {
273 /* Although VF considers all the queues(can be 1 to 16) as its
274 * own but they may actually belong to different VSIs(up to 4).
275 * We need to find which queues belongs to which VSI.
276 */
277 for (i = 0; i < vf->num_tc; i++) {
278 if (queue_id < vf->ch[i].num_qps) {
279 vsi_id = vf->ch[i].vsi_id;
280 break;
281 }
282 /* find right queue id which is relative to a
283 * given VSI.
284 */
285 queue_id -= vf->ch[i].num_qps;
286 }
287 }
288
289 return i40e_vc_get_pf_queue_id(vf, vsi_id, queue_id);
290}
291
5c3c48ac
JB		 292/**
293 * i40e_config_irq_link_list
b40c82e6 294 * @vf: pointer to the VF info
fdf0e0bf 295 * @vsi_id: id of VSI as given by the FW
5c3c48ac
JB		 296 * @vecmap: irq map info
297 *
298 * configure irq link list from the map
299 **/
fdf0e0bf 300static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
310a2ad9 301 struct virtchnl_vector_map *vecmap)
5c3c48ac
JB		 302{
303 unsigned long linklistmap = 0, tempmap;
304 struct i40e_pf *pf = vf->pf;
305 struct i40e_hw *hw = &pf->hw;
306 u16 vsi_queue_id, pf_queue_id;
307 enum i40e_queue_type qtype;
9bcc07f0 308 u16 next_q, vector_id, size;
5c3c48ac
JB		 309 u32 reg, reg_idx;
310 u16 itr_idx = 0;
311
312 vector_id = vecmap->vector_id;
313 /* setup the head */
314 if (0 == vector_id)
315 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
316 else
317 reg_idx = I40E_VPINT_LNKLSTN(
9347eb77
MW		 318 ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) +
319 (vector_id - 1));
5c3c48ac
JB		 320
321 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
322 /* Special case - No queues mapped on this vector */
323 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
324 goto irq_list_done;
325 }
326 tempmap = vecmap->rxq_map;
4836650b 327 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 328 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
329 vsi_queue_id));
5c3c48ac
JB		 330 }
331
332 tempmap = vecmap->txq_map;
4836650b 333 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 334 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
335 vsi_queue_id + 1));
5c3c48ac
JB		 336 }
337
9bcc07f0
LY		 338 size = I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES;
339 next_q = find_first_bit(&linklistmap, size);
340 if (unlikely(next_q == size))
b861fb76
LY		 341 goto irq_list_done;
342
b82bc49e
MW		 343 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
344 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
c27eac48 345 pf_queue_id = i40e_get_real_pf_qid(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 346 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
347
348 wr32(hw, reg_idx, reg);
349
9bcc07f0 350 while (next_q < size) {
5c3c48ac
JB		 351 switch (qtype) {
352 case I40E_QUEUE_TYPE_RX:
353 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
354 itr_idx = vecmap->rxitr_idx;
355 break;
356 case I40E_QUEUE_TYPE_TX:
357 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
358 itr_idx = vecmap->txitr_idx;
359 break;
360 default:
361 break;
362 }
363
9bcc07f0
LY		 364 next_q = find_next_bit(&linklistmap, size, next_q + 1);
365 if (next_q < size) {
5c3c48ac
JB		 366 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
367 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
c27eac48
AD		 368 pf_queue_id = i40e_get_real_pf_qid(vf,
369 vsi_id,
370 vsi_queue_id);
5c3c48ac
JB		 371 } else {
372 pf_queue_id = I40E_QUEUE_END_OF_LIST;
373 qtype = 0;
374 }
375
376 /* format for the RQCTL & TQCTL regs is same */
377 reg = (vector_id) |
378 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
379 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
41a1d04b 380 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
5c3c48ac
JB		 381 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
382 wr32(hw, reg_idx, reg);
383 }
384
b8262a6d
ASJ		 385 /* if the vf is running in polling mode and using interrupt zero,
386 * need to disable auto-mask on enabling zero interrupt for VFs.
387 */
310a2ad9 388 if ((vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
b8262a6d
ASJ		 389 (vector_id == 0)) {
390 reg = rd32(hw, I40E_GLINT_CTL);
391 if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
392 reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
393 wr32(hw, I40E_GLINT_CTL, reg);
394 }
395 }
396
5c3c48ac
JB		 397irq_list_done:
398 i40e_flush(hw);
399}
400
e3219ce6
ASJ		 401/**
402 * i40e_release_iwarp_qvlist
403 * @vf: pointer to the VF.
404 *
405 **/
406static void i40e_release_iwarp_qvlist(struct i40e_vf *vf)
407{
408 struct i40e_pf *pf = vf->pf;
310a2ad9 409 struct virtchnl_iwarp_qvlist_info *qvlist_info = vf->qvlist_info;
e3219ce6
ASJ		 410 u32 msix_vf;
411 u32 i;
412
413 if (!vf->qvlist_info)
414 return;
415
416 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
417 for (i = 0; i < qvlist_info->num_vectors; i++) {
310a2ad9 418 struct virtchnl_iwarp_qv_info *qv_info;
e3219ce6
ASJ		 419 u32 next_q_index, next_q_type;
420 struct i40e_hw *hw = &pf->hw;
421 u32 v_idx, reg_idx, reg;
422
423 qv_info = &qvlist_info->qv_info[i];
424 if (!qv_info)
425 continue;
426 v_idx = qv_info->v_idx;
427 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
428 /* Figure out the queue after CEQ and make that the
429 * first queue.
430 */
431 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
432 reg = rd32(hw, I40E_VPINT_CEQCTL(reg_idx));
433 next_q_index = (reg & I40E_VPINT_CEQCTL_NEXTQ_INDX_MASK)
434 >> I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT;
435 next_q_type = (reg & I40E_VPINT_CEQCTL_NEXTQ_TYPE_MASK)
436 >> I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT;
437
438 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
439 reg = (next_q_index &
440 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
441 (next_q_type <<
442 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
443
444 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
445 }
446 }
447 kfree(vf->qvlist_info);
448 vf->qvlist_info = NULL;
449}
450
451/**
452 * i40e_config_iwarp_qvlist
453 * @vf: pointer to the VF info
454 * @qvlist_info: queue and vector list
455 *
456 * Return 0 on success or < 0 on error
457 **/
458static int i40e_config_iwarp_qvlist(struct i40e_vf *vf,
310a2ad9 459 struct virtchnl_iwarp_qvlist_info *qvlist_info)
e3219ce6
ASJ		 460{
461 struct i40e_pf *pf = vf->pf;
462 struct i40e_hw *hw = &pf->hw;
310a2ad9 463 struct virtchnl_iwarp_qv_info *qv_info;
e3219ce6
ASJ		 464 u32 v_idx, i, reg_idx, reg;
465 u32 next_q_idx, next_q_type;
466 u32 msix_vf, size;
467
310a2ad9
JB		 468 size = sizeof(struct virtchnl_iwarp_qvlist_info) +
469 (sizeof(struct virtchnl_iwarp_qv_info) *
e3219ce6
ASJ		 470 (qvlist_info->num_vectors - 1));
471 vf->qvlist_info = kzalloc(size, GFP_KERNEL);
54902349
CJ		 472 if (!vf->qvlist_info)
473 return -ENOMEM;
474
e3219ce6
ASJ		 475 vf->qvlist_info->num_vectors = qvlist_info->num_vectors;
476
477 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
478 for (i = 0; i < qvlist_info->num_vectors; i++) {
479 qv_info = &qvlist_info->qv_info[i];
480 if (!qv_info)
481 continue;
482 v_idx = qv_info->v_idx;
483
484 /* Validate vector id belongs to this vf */
485 if (!i40e_vc_isvalid_vector_id(vf, v_idx))
486 goto err;
487
488 vf->qvlist_info->qv_info[i] = *qv_info;
489
490 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
491 /* We might be sharing the interrupt, so get the first queue
492 * index and type, push it down the list by adding the new
493 * queue on top. Also link it with the new queue in CEQCTL.
494 */
495 reg = rd32(hw, I40E_VPINT_LNKLSTN(reg_idx));
496 next_q_idx = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) >>
497 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT);
498 next_q_type = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK) >>
499 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
500
501 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
502 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
503 reg = (I40E_VPINT_CEQCTL_CAUSE_ENA_MASK |
504 (v_idx << I40E_VPINT_CEQCTL_MSIX_INDX_SHIFT) |
505 (qv_info->itr_idx << I40E_VPINT_CEQCTL_ITR_INDX_SHIFT) |
506 (next_q_type << I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT) |
507 (next_q_idx << I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT));
508 wr32(hw, I40E_VPINT_CEQCTL(reg_idx), reg);
509
510 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
511 reg = (qv_info->ceq_idx &
512 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
513 (I40E_QUEUE_TYPE_PE_CEQ <<
514 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
515 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
516 }
517
518 if (qv_info->aeq_idx != I40E_QUEUE_INVALID_IDX) {
519 reg = (I40E_VPINT_AEQCTL_CAUSE_ENA_MASK |
520 (v_idx << I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT) |
521 (qv_info->itr_idx << I40E_VPINT_AEQCTL_ITR_INDX_SHIFT));
522
523 wr32(hw, I40E_VPINT_AEQCTL(vf->vf_id), reg);
524 }
525 }
526
527 return 0;
528err:
529 kfree(vf->qvlist_info);
530 vf->qvlist_info = NULL;
531 return -EINVAL;
532}
533
5c3c48ac
JB		 534/**
535 * i40e_config_vsi_tx_queue
b40c82e6 536 * @vf: pointer to the VF info
fdf0e0bf 537 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 538 * @vsi_queue_id: vsi relative queue index
539 * @info: config. info
540 *
541 * configure tx queue
542 **/
fdf0e0bf 543static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac 544 u16 vsi_queue_id,
310a2ad9 545 struct virtchnl_txq_info *info)
5c3c48ac
JB		 546{
547 struct i40e_pf *pf = vf->pf;
548 struct i40e_hw *hw = &pf->hw;
549 struct i40e_hmc_obj_txq tx_ctx;
fdf0e0bf 550 struct i40e_vsi *vsi;
5c3c48ac
JB		 551 u16 pf_queue_id;
552 u32 qtx_ctl;
553 int ret = 0;
554
d4a0658d
CW		 555 if (!i40e_vc_isvalid_vsi_id(vf, info->vsi_id)) {
556 ret = -ENOENT;
557 goto error_context;
558 }
fdf0e0bf
ASJ		 559 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
560 vsi = i40e_find_vsi_from_id(pf, vsi_id);
d4a0658d
CW		 561 if (!vsi) {
562 ret = -ENOENT;
563 goto error_context;
564 }
5c3c48ac
JB		 565
566 /* clear the context structure first */
567 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
568
569 /* only set the required fields */
570 tx_ctx.base = info->dma_ring_addr / 128;
571 tx_ctx.qlen = info->ring_len;
fdf0e0bf 572 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
5c3c48ac 573 tx_ctx.rdylist_act = 0;
5d29896a
AS		 574 tx_ctx.head_wb_ena = info->headwb_enabled;
575 tx_ctx.head_wb_addr = info->dma_headwb_addr;
5c3c48ac
JB		 576
577 /* clear the context in the HMC */
578 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
579 if (ret) {
580 dev_err(&pf->pdev->dev,
581 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
582 pf_queue_id, ret);
583 ret = -ENOENT;
584 goto error_context;
585 }
586
587 /* set the context in the HMC */
588 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
589 if (ret) {
590 dev_err(&pf->pdev->dev,
591 "Failed to set VF LAN Tx queue context %d error: %d\n",
592 pf_queue_id, ret);
593 ret = -ENOENT;
594 goto error_context;
595 }
596
597 /* associate this queue with the PCI VF function */
598 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
13fd9774 599 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
5c3c48ac
JB		 600 & I40E_QTX_CTL_PF_INDX_MASK);
601 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
602 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
603 & I40E_QTX_CTL_VFVM_INDX_MASK);
604 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
605 i40e_flush(hw);
606
607error_context:
608 return ret;
609}
610
611/**
612 * i40e_config_vsi_rx_queue
b40c82e6 613 * @vf: pointer to the VF info
fdf0e0bf 614 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 615 * @vsi_queue_id: vsi relative queue index
616 * @info: config. info
617 *
618 * configure rx queue
619 **/
fdf0e0bf 620static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac 621 u16 vsi_queue_id,
310a2ad9 622 struct virtchnl_rxq_info *info)
5c3c48ac
JB		 623{
624 struct i40e_pf *pf = vf->pf;
625 struct i40e_hw *hw = &pf->hw;
626 struct i40e_hmc_obj_rxq rx_ctx;
627 u16 pf_queue_id;
628 int ret = 0;
629
fdf0e0bf 630 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 631
632 /* clear the context structure first */
633 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
634
635 /* only set the required fields */
636 rx_ctx.base = info->dma_ring_addr / 128;
637 rx_ctx.qlen = info->ring_len;
638
639 if (info->splithdr_enabled) {
640 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
641 I40E_RX_SPLIT_IP |
642 I40E_RX_SPLIT_TCP_UDP |
643 I40E_RX_SPLIT_SCTP;
644 /* header length validation */
645 if (info->hdr_size > ((2 * 1024) - 64)) {
646 ret = -EINVAL;
647 goto error_param;
648 }
649 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
650
19b85e67 651 /* set split mode 10b */
d6b3bca1 652 rx_ctx.dtype = I40E_RX_DTYPE_HEADER_SPLIT;
5c3c48ac
JB		 653 }
654
655 /* databuffer length validation */
656 if (info->databuffer_size > ((16 * 1024) - 128)) {
657 ret = -EINVAL;
658 goto error_param;
659 }
660 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
661
662 /* max pkt. length validation */
663 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
664 ret = -EINVAL;
665 goto error_param;
666 }
667 rx_ctx.rxmax = info->max_pkt_size;
668
669 /* enable 32bytes desc always */
670 rx_ctx.dsize = 1;
671
672 /* default values */
7362be9e 673 rx_ctx.lrxqthresh = 1;
5c3c48ac 674 rx_ctx.crcstrip = 1;
50d41659 675 rx_ctx.prefena = 1;
c1d11cef 676 rx_ctx.l2tsel = 1;
5c3c48ac
JB		 677
678 /* clear the context in the HMC */
679 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
680 if (ret) {
681 dev_err(&pf->pdev->dev,
682 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
683 pf_queue_id, ret);
684 ret = -ENOENT;
685 goto error_param;
686 }
687
688 /* set the context in the HMC */
689 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
690 if (ret) {
691 dev_err(&pf->pdev->dev,
692 "Failed to set VF LAN Rx queue context %d error: %d\n",
693 pf_queue_id, ret);
694 ret = -ENOENT;
695 goto error_param;
696 }
697
698error_param:
699 return ret;
700}
701
702/**
703 * i40e_alloc_vsi_res
b40c82e6 704 * @vf: pointer to the VF info
c27eac48 705 * @idx: VSI index, applies only for ADq mode, zero otherwise
5c3c48ac 706 *
b40c82e6 707 * alloc VF vsi context & resources
5c3c48ac 708 **/
c27eac48 709static int i40e_alloc_vsi_res(struct i40e_vf *vf, u8 idx)
5c3c48ac
JB		 710{
711 struct i40e_mac_filter *f = NULL;
712 struct i40e_pf *pf = vf->pf;
5c3c48ac 713 struct i40e_vsi *vsi;
0c483bd4 714 u64 max_tx_rate = 0;
5c3c48ac
JB		 715 int ret = 0;
716
c27eac48
AD		 717 vsi = i40e_vsi_setup(pf, I40E_VSI_SRIOV, pf->vsi[pf->lan_vsi]->seid,
718 vf->vf_id);
5c3c48ac
JB		 719
720 if (!vsi) {
721 dev_err(&pf->pdev->dev,
b40c82e6 722 "add vsi failed for VF %d, aq_err %d\n",
5c3c48ac
JB		 723 vf->vf_id, pf->hw.aq.asq_last_status);
724 ret = -ENOENT;
725 goto error_alloc_vsi_res;
726 }
c27eac48
AD		 727
728 if (!idx) {
bb360717 729 u64 hena = i40e_pf_get_default_rss_hena(pf);
435c084a 730 u8 broadcast[ETH_ALEN];
bb360717 731
fdf0e0bf 732 vf->lan_vsi_idx = vsi->idx;
5c3c48ac 733 vf->lan_vsi_id = vsi->id;
6c12fcbf
GR		 734 /* If the port VLAN has been configured and then the
735 * VF driver was removed then the VSI port VLAN
736 * configuration was destroyed. Check if there is
737 * a port VLAN and restore the VSI configuration if
738 * needed.
739 */
740 if (vf->port_vlan_id)
741 i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
21659035 742
278e7d0b 743 spin_lock_bh(&vsi->mac_filter_hash_lock);
b7b713a8 744 if (is_valid_ether_addr(vf->default_lan_addr.addr)) {
9569a9a4
JK		 745 f = i40e_add_mac_filter(vsi,
746 vf->default_lan_addr.addr);
b7b713a8
MW		 747 if (!f)
748 dev_info(&pf->pdev->dev,
749 "Could not add MAC filter %pM for VF %d\n",
750 vf->default_lan_addr.addr, vf->vf_id);
751 }
435c084a 752 eth_broadcast_addr(broadcast);
9569a9a4 753 f = i40e_add_mac_filter(vsi, broadcast);
435c084a
JK		 754 if (!f)
755 dev_info(&pf->pdev->dev,
756 "Could not allocate VF broadcast filter\n");
278e7d0b 757 spin_unlock_bh(&vsi->mac_filter_hash_lock);
26f77e53
LY		 758 wr32(&pf->hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)hena);
759 wr32(&pf->hw, I40E_VFQF_HENA1(1, vf->vf_id), (u32)(hena >> 32));
c27eac48
AD		 760 /* program mac filter only for VF VSI */
761 ret = i40e_sync_vsi_filters(vsi);
762 if (ret)
763 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
5c3c48ac 764 }
6dbbbfb2 765
c27eac48
AD		 766 /* storing VSI index and id for ADq and don't apply the mac filter */
767 if (vf->adq_enabled) {
768 vf->ch[idx].vsi_idx = vsi->idx;
769 vf->ch[idx].vsi_id = vsi->id;
770 }
5c3c48ac 771
6b192891
MW		 772 /* Set VF bandwidth if specified */
773 if (vf->tx_rate) {
0c483bd4
AD		 774 max_tx_rate = vf->tx_rate;
775 } else if (vf->ch[idx].max_tx_rate) {
776 max_tx_rate = vf->ch[idx].max_tx_rate;
777 }
778
779 if (max_tx_rate) {
780 max_tx_rate = div_u64(max_tx_rate, I40E_BW_CREDIT_DIVISOR);
6b192891 781 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
0c483bd4 782 max_tx_rate, 0, NULL);
6b192891
MW		 783 if (ret)
784 dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
785 vf->vf_id, ret);
786 }
787
5c3c48ac
JB		 788error_alloc_vsi_res:
789 return ret;
790}
791
c27eac48
AD		 792/**
793 * i40e_map_pf_queues_to_vsi
794 * @vf: pointer to the VF info
795 *
796 * PF maps LQPs to a VF by programming VSILAN_QTABLE & VPLAN_QTABLE. This
797 * function takes care of first part VSILAN_QTABLE, mapping pf queues to VSI.
798 **/
799static void i40e_map_pf_queues_to_vsi(struct i40e_vf *vf)
800{
801 struct i40e_pf *pf = vf->pf;
802 struct i40e_hw *hw = &pf->hw;
803 u32 reg, num_tc = 1; /* VF has at least one traffic class */
804 u16 vsi_id, qps;
805 int i, j;
806
807 if (vf->adq_enabled)
808 num_tc = vf->num_tc;
809
810 for (i = 0; i < num_tc; i++) {
811 if (vf->adq_enabled) {
812 qps = vf->ch[i].num_qps;
813 vsi_id = vf->ch[i].vsi_id;
814 } else {
815 qps = pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
816 vsi_id = vf->lan_vsi_id;
817 }
818
819 for (j = 0; j < 7; j++) {
820 if (j * 2 >= qps) {
821 /* end of list */
822 reg = 0x07FF07FF;
823 } else {
824 u16 qid = i40e_vc_get_pf_queue_id(vf,
825 vsi_id,
826 j * 2);
827 reg = qid;
828 qid = i40e_vc_get_pf_queue_id(vf, vsi_id,
829 (j * 2) + 1);
830 reg |= qid << 16;
831 }
832 i40e_write_rx_ctl(hw,
833 I40E_VSILAN_QTABLE(j, vsi_id),
834 reg);
835 }
836 }
837}
838
839/**
840 * i40e_map_pf_to_vf_queues
841 * @vf: pointer to the VF info
842 *
843 * PF maps LQPs to a VF by programming VSILAN_QTABLE & VPLAN_QTABLE. This
844 * function takes care of the second part VPLAN_QTABLE & completes VF mappings.
845 **/
846static void i40e_map_pf_to_vf_queues(struct i40e_vf *vf)
847{
848 struct i40e_pf *pf = vf->pf;
849 struct i40e_hw *hw = &pf->hw;
850 u32 reg, total_qps = 0;
851 u32 qps, num_tc = 1; /* VF has at least one traffic class */
852 u16 vsi_id, qid;
853 int i, j;
854
855 if (vf->adq_enabled)
856 num_tc = vf->num_tc;
857
858 for (i = 0; i < num_tc; i++) {
859 if (vf->adq_enabled) {
860 qps = vf->ch[i].num_qps;
861 vsi_id = vf->ch[i].vsi_id;
862 } else {
863 qps = pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
864 vsi_id = vf->lan_vsi_id;
865 }
866
867 for (j = 0; j < qps; j++) {
868 qid = i40e_vc_get_pf_queue_id(vf, vsi_id, j);
869
870 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
871 wr32(hw, I40E_VPLAN_QTABLE(total_qps, vf->vf_id),
872 reg);
873 total_qps++;
874 }
875 }
876}
877
805bd5bd
MW		 878/**
879 * i40e_enable_vf_mappings
b40c82e6 880 * @vf: pointer to the VF info
805bd5bd 881 *
b40c82e6 882 * enable VF mappings
805bd5bd
MW		 883 **/
884static void i40e_enable_vf_mappings(struct i40e_vf *vf)
885{
886 struct i40e_pf *pf = vf->pf;
887 struct i40e_hw *hw = &pf->hw;
c27eac48 888 u32 reg;
805bd5bd
MW		 889
890 /* Tell the hardware we're using noncontiguous mapping. HW requires
891 * that VF queues be mapped using this method, even when they are
892 * contiguous in real life
893 */
272cdaf2
SN		 894 i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
895 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
805bd5bd
MW		 896
897 /* enable VF vplan_qtable mappings */
898 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
899 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
900
c27eac48
AD		 901 i40e_map_pf_to_vf_queues(vf);
902 i40e_map_pf_queues_to_vsi(vf);
805bd5bd
MW		 903
904 i40e_flush(hw);
905}
906
907/**
908 * i40e_disable_vf_mappings
b40c82e6 909 * @vf: pointer to the VF info
805bd5bd 910 *
b40c82e6 911 * disable VF mappings
805bd5bd
MW		 912 **/
913static void i40e_disable_vf_mappings(struct i40e_vf *vf)
914{
915 struct i40e_pf *pf = vf->pf;
916 struct i40e_hw *hw = &pf->hw;
917 int i;
918
919 /* disable qp mappings */
920 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
921 for (i = 0; i < I40E_MAX_VSI_QP; i++)
922 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
923 I40E_QUEUE_END_OF_LIST);
924 i40e_flush(hw);
925}
926
927/**
928 * i40e_free_vf_res
b40c82e6 929 * @vf: pointer to the VF info
805bd5bd 930 *
b40c82e6 931 * free VF resources
805bd5bd
MW		 932 **/
933static void i40e_free_vf_res(struct i40e_vf *vf)
934{
935 struct i40e_pf *pf = vf->pf;
fc18eaa0
MW		 936 struct i40e_hw *hw = &pf->hw;
937 u32 reg_idx, reg;
c27eac48 938 int i, j, msix_vf;
805bd5bd 939
beff3e9d
RK		 940 /* Start by disabling VF's configuration API to prevent the OS from
941 * accessing the VF's VSI after it's freed / invalidated.
942 */
6322e63c 943 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 944
a3f5aa90
AB		 945 /* It's possible the VF had requeuested more queues than the default so
946 * do the accounting here when we're about to free them.
947 */
948 if (vf->num_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF) {
949 pf->queues_left += vf->num_queue_pairs -
950 I40E_DEFAULT_QUEUES_PER_VF;
951 }
952
805bd5bd 953 /* free vsi & disconnect it from the parent uplink */
fdf0e0bf
ASJ		 954 if (vf->lan_vsi_idx) {
955 i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]);
956 vf->lan_vsi_idx = 0;
805bd5bd 957 vf->lan_vsi_id = 0;
13fd3f9c 958 vf->num_mac = 0;
805bd5bd 959 }
c27eac48
AD		 960
961 /* do the accounting and remove additional ADq VSI's */
962 if (vf->adq_enabled && vf->ch[0].vsi_idx) {
963 for (j = 0; j < vf->num_tc; j++) {
964 /* At this point VSI0 is already released so don't
965 * release it again and only clear their values in
966 * structure variables
967 */
968 if (j)
969 i40e_vsi_release(pf->vsi[vf->ch[j].vsi_idx]);
970 vf->ch[j].vsi_idx = 0;
971 vf->ch[j].vsi_id = 0;
972 }
973 }
9347eb77
MW		 974 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
975
fc18eaa0
MW		 976 /* disable interrupts so the VF starts in a known state */
977 for (i = 0; i < msix_vf; i++) {
978 /* format is same for both registers */
979 if (0 == i)
980 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
981 else
982 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
983 (vf->vf_id))
984 + (i - 1));
985 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
986 i40e_flush(hw);
987 }
805bd5bd 988
fc18eaa0
MW		 989 /* clear the irq settings */
990 for (i = 0; i < msix_vf; i++) {
991 /* format is same for both registers */
992 if (0 == i)
993 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
994 else
995 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
996 (vf->vf_id))
997 + (i - 1));
998 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
999 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
1000 wr32(hw, reg_idx, reg);
1001 i40e_flush(hw);
1002 }
b564d62e 1003 /* reset some of the state variables keeping track of the resources */
805bd5bd 1004 vf->num_queue_pairs = 0;
41d0a4d0
AB		 1005 clear_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
1006 clear_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
805bd5bd
MW		 1007}
1008
1009/**
1010 * i40e_alloc_vf_res
b40c82e6 1011 * @vf: pointer to the VF info
805bd5bd 1012 *
b40c82e6 1013 * allocate VF resources
805bd5bd
MW		 1014 **/
1015static int i40e_alloc_vf_res(struct i40e_vf *vf)
1016{
1017 struct i40e_pf *pf = vf->pf;
1018 int total_queue_pairs = 0;
c27eac48 1019 int ret, idx;
805bd5bd 1020
a3f5aa90
AB		 1021 if (vf->num_req_queues &&
1022 vf->num_req_queues <= pf->queues_left + I40E_DEFAULT_QUEUES_PER_VF)
1023 pf->num_vf_qps = vf->num_req_queues;
1024 else
1025 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
1026
805bd5bd 1027 /* allocate hw vsi context & associated resources */
c27eac48 1028 ret = i40e_alloc_vsi_res(vf, 0);
805bd5bd
MW		 1029 if (ret)
1030 goto error_alloc;
fdf0e0bf 1031 total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
692fb0a7 1032
c27eac48
AD		 1033 /* allocate additional VSIs based on tc information for ADq */
1034 if (vf->adq_enabled) {
1035 if (pf->queues_left >=
1036 (I40E_MAX_VF_QUEUES - I40E_DEFAULT_QUEUES_PER_VF)) {
1037 /* TC 0 always belongs to VF VSI */
1038 for (idx = 1; idx < vf->num_tc; idx++) {
1039 ret = i40e_alloc_vsi_res(vf, idx);
1040 if (ret)
1041 goto error_alloc;
1042 }
1043 /* send correct number of queues */
1044 total_queue_pairs = I40E_MAX_VF_QUEUES;
1045 } else {
1046 dev_info(&pf->pdev->dev, "VF %d: Not enough queues to allocate, disabling ADq\n",
1047 vf->vf_id);
1048 vf->adq_enabled = false;
1049 }
1050 }
1051
a3f5aa90
AB		 1052 /* We account for each VF to get a default number of queue pairs. If
1053 * the VF has now requested more, we need to account for that to make
1054 * certain we never request more queues than we actually have left in
1055 * HW.
1056 */
1057 if (total_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF)
1058 pf->queues_left -=
1059 total_queue_pairs - I40E_DEFAULT_QUEUES_PER_VF;
1060
692fb0a7
ASJ		 1061 if (vf->trusted)
1062 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
1063 else
1064 clear_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
805bd5bd
MW		 1065
1066 /* store the total qps number for the runtime
b40c82e6 1067 * VF req validation
805bd5bd
MW		 1068 */
1069 vf->num_queue_pairs = total_queue_pairs;
1070
b40c82e6 1071 /* VF is now completely initialized */
6322e63c 1072 set_bit(I40E_VF_STATE_INIT, &vf->vf_states);
805bd5bd
MW		 1073
1074error_alloc:
1075 if (ret)
1076 i40e_free_vf_res(vf);
1077
1078 return ret;
1079}
1080
fc18eaa0
MW		 1081#define VF_DEVICE_STATUS 0xAA
1082#define VF_TRANS_PENDING_MASK 0x20
1083/**
1084 * i40e_quiesce_vf_pci
b40c82e6 1085 * @vf: pointer to the VF structure
fc18eaa0
MW		 1086 *
1087 * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
1088 * if the transactions never clear.
1089 **/
1090static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
1091{
1092 struct i40e_pf *pf = vf->pf;
1093 struct i40e_hw *hw = &pf->hw;
1094 int vf_abs_id, i;
1095 u32 reg;
1096
b141d619 1097 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
fc18eaa0
MW		 1098
1099 wr32(hw, I40E_PF_PCI_CIAA,
1100 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
1101 for (i = 0; i < 100; i++) {
1102 reg = rd32(hw, I40E_PF_PCI_CIAD);
1103 if ((reg & VF_TRANS_PENDING_MASK) == 0)
1104 return 0;
1105 udelay(1);
1106 }
1107 return -EIO;
1108}
1109
5c3c48ac 1110/**
9dc2e417 1111 * i40e_trigger_vf_reset
b40c82e6 1112 * @vf: pointer to the VF structure
5c3c48ac
JB		 1113 * @flr: VFLR was issued or not
1114 *
9dc2e417
JK		 1115 * Trigger hardware to start a reset for a particular VF. Expects the caller
1116 * to wait the proper amount of time to allow hardware to reset the VF before
1117 * it cleans up and restores VF functionality.
5c3c48ac 1118 **/
9dc2e417 1119static void i40e_trigger_vf_reset(struct i40e_vf *vf, bool flr)
5c3c48ac 1120{
5c3c48ac
JB		 1121 struct i40e_pf *pf = vf->pf;
1122 struct i40e_hw *hw = &pf->hw;
7e5a313e 1123 u32 reg, reg_idx, bit_idx;
3ba9bcb4 1124
5c3c48ac 1125 /* warn the VF */
6322e63c 1126 clear_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac 1127
beff3e9d
RK		 1128 /* Disable VF's configuration API during reset. The flag is re-enabled
1129 * in i40e_alloc_vf_res(), when it's safe again to access VF's VSI.
1130 * It's normally disabled in i40e_free_vf_res(), but it's safer
1131 * to do it earlier to give some time to finish to any VF config
1132 * functions that may still be running at this point.
1133 */
6322e63c 1134 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 1135
fc18eaa0
MW		 1136 /* In the case of a VFLR, the HW has already reset the VF and we
1137 * just need to clean up, so don't hit the VFRTRIG register.
5c3c48ac
JB		 1138 */
1139 if (!flr) {
b40c82e6 1140 /* reset VF using VPGEN_VFRTRIG reg */
fc18eaa0
MW		 1141 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1142 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
5c3c48ac
JB		 1143 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
1144 i40e_flush(hw);
1145 }
7369ca87
MW		 1146 /* clear the VFLR bit in GLGEN_VFLRSTAT */
1147 reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
1148 bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
1149 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
30728c5b 1150 i40e_flush(hw);
5c3c48ac 1151
fc18eaa0
MW		 1152 if (i40e_quiesce_vf_pci(vf))
1153 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
1154 vf->vf_id);
9dc2e417 1155}
fc18eaa0 1156
9dc2e417
JK		 1157/**
1158 * i40e_cleanup_reset_vf
1159 * @vf: pointer to the VF structure
1160 *
1161 * Cleanup a VF after the hardware reset is finished. Expects the caller to
1162 * have verified whether the reset is finished properly, and ensure the
1163 * minimum amount of wait time has passed.
1164 **/
1165static void i40e_cleanup_reset_vf(struct i40e_vf *vf)
1166{
1167 struct i40e_pf *pf = vf->pf;
1168 struct i40e_hw *hw = &pf->hw;
1169 u32 reg;
fc18eaa0 1170
beff3e9d 1171 /* free VF resources to begin resetting the VSI state */
fc18eaa0 1172 i40e_free_vf_res(vf);
beff3e9d
RK		 1173
1174 /* Enable hardware by clearing the reset bit in the VPGEN_VFRTRIG reg.
1175 * By doing this we allow HW to access VF memory at any point. If we
1176 * did it any sooner, HW could access memory while it was being freed
1177 * in i40e_free_vf_res(), causing an IOMMU fault.
1178 *
1179 * On the other hand, this needs to be done ASAP, because the VF driver
1180 * is waiting for this to happen and may report a timeout. It's
1181 * harmless, but it gets logged into Guest OS kernel log, so best avoid
1182 * it.
1183 */
1184 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1185 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
1186 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
1187
1188 /* reallocate VF resources to finish resetting the VSI state */
21be99ec 1189 if (!i40e_alloc_vf_res(vf)) {
e3219ce6 1190 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
21be99ec 1191 i40e_enable_vf_mappings(vf);
6322e63c
JK		 1192 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
1193 clear_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
6a23449a 1194 /* Do not notify the client during VF init */
c53d11f6
AB		 1195 if (!test_and_clear_bit(I40E_VF_STATE_PRE_ENABLE,
1196 &vf->vf_states))
6a23449a 1197 i40e_notify_client_of_vf_reset(pf, abs_vf_id);
dc5b4e9f 1198 vf->num_vlan = 0;
21be99ec 1199 }
beff3e9d
RK		 1200
1201 /* Tell the VF driver the reset is done. This needs to be done only
1202 * after VF has been fully initialized, because the VF driver may
1203 * request resources immediately after setting this flag.
1204 */
310a2ad9 1205 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), VIRTCHNL_VFR_VFACTIVE);
9dc2e417
JK		 1206}
1207
1208/**
1209 * i40e_reset_vf
1210 * @vf: pointer to the VF structure
1211 * @flr: VFLR was issued or not
1212 *
d43d60e5 1213 * Returns true if the VF is reset, false otherwise.
9dc2e417 1214 **/
d43d60e5 1215bool i40e_reset_vf(struct i40e_vf *vf, bool flr)
9dc2e417
JK		 1216{
1217 struct i40e_pf *pf = vf->pf;
1218 struct i40e_hw *hw = &pf->hw;
1219 bool rsd = false;
1220 u32 reg;
1221 int i;
1222
d43d60e5
JK		 1223 /* If the VFs have been disabled, this means something else is
1224 * resetting the VF, so we shouldn't continue.
1225 */
0da36b97 1226 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
d43d60e5 1227 return false;
9dc2e417
JK		 1228
1229 i40e_trigger_vf_reset(vf, flr);
1230
1231 /* poll VPGEN_VFRSTAT reg to make sure
1232 * that reset is complete
1233 */
1234 for (i = 0; i < 10; i++) {
1235 /* VF reset requires driver to first reset the VF and then
1236 * poll the status register to make sure that the reset
1237 * completed successfully. Due to internal HW FIFO flushes,
1238 * we must wait 10ms before the register will be valid.
1239 */
1240 usleep_range(10000, 20000);
1241 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1242 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
1243 rsd = true;
1244 break;
1245 }
1246 }
1247
1248 if (flr)
1249 usleep_range(10000, 20000);
1250
1251 if (!rsd)
1252 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1253 vf->vf_id);
1254 usleep_range(10000, 20000);
1255
1256 /* On initial reset, we don't have any queues to disable */
1257 if (vf->lan_vsi_idx != 0)
1258 i40e_vsi_stop_rings(pf->vsi[vf->lan_vsi_idx]);
1259
1260 i40e_cleanup_reset_vf(vf);
7e5a313e 1261
5c3c48ac 1262 i40e_flush(hw);
0da36b97 1263 clear_bit(__I40E_VF_DISABLE, pf->state);
d43d60e5
JK		 1264
1265 return true;
5c3c48ac 1266}
c354229f 1267
e4b433f4
JK		 1268/**
1269 * i40e_reset_all_vfs
1270 * @pf: pointer to the PF structure
1271 * @flr: VFLR was issued or not
1272 *
1273 * Reset all allocated VFs in one go. First, tell the hardware to reset each
1274 * VF, then do all the waiting in one chunk, and finally finish restoring each
1275 * VF after the wait. This is useful during PF routines which need to reset
1276 * all VFs, as otherwise it must perform these resets in a serialized fashion.
d43d60e5
JK		 1277 *
1278 * Returns true if any VFs were reset, and false otherwise.
e4b433f4 1279 **/
d43d60e5 1280bool i40e_reset_all_vfs(struct i40e_pf *pf, bool flr)
e4b433f4
JK		 1281{
1282 struct i40e_hw *hw = &pf->hw;
1283 struct i40e_vf *vf;
1284 int i, v;
1285 u32 reg;
1286
1287 /* If we don't have any VFs, then there is nothing to reset */
1288 if (!pf->num_alloc_vfs)
d43d60e5 1289 return false;
e4b433f4
JK		 1290
1291 /* If VFs have been disabled, there is no need to reset */
0da36b97 1292 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
d43d60e5 1293 return false;
e4b433f4
JK		 1294
1295 /* Begin reset on all VFs at once */
1296 for (v = 0; v < pf->num_alloc_vfs; v++)
1297 i40e_trigger_vf_reset(&pf->vf[v], flr);
1298
1299 /* HW requires some time to make sure it can flush the FIFO for a VF
1300 * when it resets it. Poll the VPGEN_VFRSTAT register for each VF in
1301 * sequence to make sure that it has completed. We'll keep track of
1302 * the VFs using a simple iterator that increments once that VF has
1303 * finished resetting.
1304 */
1305 for (i = 0, v = 0; i < 10 && v < pf->num_alloc_vfs; i++) {
1306 usleep_range(10000, 20000);
1307
1308 /* Check each VF in sequence, beginning with the VF to fail
1309 * the previous check.
1310 */
1311 while (v < pf->num_alloc_vfs) {
1312 vf = &pf->vf[v];
1313 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1314 if (!(reg & I40E_VPGEN_VFRSTAT_VFRD_MASK))
1315 break;
1316
1317 /* If the current VF has finished resetting, move on
1318 * to the next VF in sequence.
1319 */
1320 v++;
1321 }
1322 }
1323
1324 if (flr)
1325 usleep_range(10000, 20000);
1326
1327 /* Display a warning if at least one VF didn't manage to reset in
1328 * time, but continue on with the operation.
1329 */
1330 if (v < pf->num_alloc_vfs)
1331 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1332 pf->vf[v].vf_id);
1333 usleep_range(10000, 20000);
1334
1335 /* Begin disabling all the rings associated with VFs, but do not wait
1336 * between each VF.
1337 */
1338 for (v = 0; v < pf->num_alloc_vfs; v++) {
1339 /* On initial reset, we don't have any queues to disable */
1340 if (pf->vf[v].lan_vsi_idx == 0)
1341 continue;
1342
1343 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[v].lan_vsi_idx]);
1344 }
1345
1346 /* Now that we've notified HW to disable all of the VF rings, wait
1347 * until they finish.
1348 */
1349 for (v = 0; v < pf->num_alloc_vfs; v++) {
1350 /* On initial reset, we don't have any queues to disable */
1351 if (pf->vf[v].lan_vsi_idx == 0)
1352 continue;
1353
1354 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[v].lan_vsi_idx]);
1355 }
1356
1357 /* Hw may need up to 50ms to finish disabling the RX queues. We
1358 * minimize the wait by delaying only once for all VFs.
1359 */
1360 mdelay(50);
1361
1362 /* Finish the reset on each VF */
1363 for (v = 0; v < pf->num_alloc_vfs; v++)
1364 i40e_cleanup_reset_vf(&pf->vf[v]);
1365
1366 i40e_flush(hw);
0da36b97 1367 clear_bit(__I40E_VF_DISABLE, pf->state);
d43d60e5
JK		 1368
1369 return true;
e4b433f4
JK		 1370}
1371
5c3c48ac
JB		 1372/**
1373 * i40e_free_vfs
b40c82e6 1374 * @pf: pointer to the PF structure
5c3c48ac 1375 *
b40c82e6 1376 * free VF resources
5c3c48ac
JB		 1377 **/
1378void i40e_free_vfs(struct i40e_pf *pf)
1379{
f7414531
MW		 1380 struct i40e_hw *hw = &pf->hw;
1381 u32 reg_idx, bit_idx;
1382 int i, tmp, vf_id;
5c3c48ac
JB		 1383
1384 if (!pf->vf)
1385 return;
0da36b97 1386 while (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
3ba9bcb4 1387 usleep_range(1000, 2000);
5c3c48ac 1388
e3219ce6 1389 i40e_notify_client_of_vf_enable(pf, 0);
707d088a
JK		 1390
1391 /* Amortize wait time by stopping all VFs at the same time */
1392 for (i = 0; i < pf->num_alloc_vfs; i++) {
1393 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
1394 continue;
1395
1396 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[i].lan_vsi_idx]);
1397 }
1398
1399 for (i = 0; i < pf->num_alloc_vfs; i++) {
6322e63c 1400 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
707d088a
JK		 1401 continue;
1402
1403 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[i].lan_vsi_idx]);
1404 }
44434638 1405
6a9ddb36
MW		 1406 /* Disable IOV before freeing resources. This lets any VF drivers
1407 * running in the host get themselves cleaned up before we yank
1408 * the carpet out from underneath their feet.
1409 */
1410 if (!pci_vfs_assigned(pf->pdev))
1411 pci_disable_sriov(pf->pdev);
6d7b967d
MW		 1412 else
1413 dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
6a9ddb36 1414
b40c82e6 1415 /* free up VF resources */
6c1b5bff
MW		 1416 tmp = pf->num_alloc_vfs;
1417 pf->num_alloc_vfs = 0;
1418 for (i = 0; i < tmp; i++) {
6322e63c 1419 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
5c3c48ac
JB		 1420 i40e_free_vf_res(&pf->vf[i]);
1421 /* disable qp mappings */
1422 i40e_disable_vf_mappings(&pf->vf[i]);
1423 }
1424
1425 kfree(pf->vf);
1426 pf->vf = NULL;
5c3c48ac 1427
9e5634df
MW		 1428 /* This check is for when the driver is unloaded while VFs are
1429 * assigned. Setting the number of VFs to 0 through sysfs is caught
1430 * before this function ever gets called.
1431 */
c24817b6 1432 if (!pci_vfs_assigned(pf->pdev)) {
f7414531
MW		 1433 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
1434 * work correctly when SR-IOV gets re-enabled.
1435 */
1436 for (vf_id = 0; vf_id < tmp; vf_id++) {
1437 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
1438 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
41a1d04b 1439 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
f7414531 1440 }
c354229f 1441 }
0da36b97 1442 clear_bit(__I40E_VF_DISABLE, pf->state);
5c3c48ac
JB		 1443}
1444
1445#ifdef CONFIG_PCI_IOV
1446/**
1447 * i40e_alloc_vfs
b40c82e6
JK		 1448 * @pf: pointer to the PF structure
1449 * @num_alloc_vfs: number of VFs to allocate
5c3c48ac 1450 *
b40c82e6 1451 * allocate VF resources
5c3c48ac 1452 **/
4aeec010 1453int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
5c3c48ac
JB		 1454{
1455 struct i40e_vf *vfs;
1456 int i, ret = 0;
1457
6c1b5bff 1458 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW		 1459 i40e_irq_dynamic_disable_icr0(pf);
1460
4aeec010
MW		 1461 /* Check to see if we're just allocating resources for extant VFs */
1462 if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
1463 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
1464 if (ret) {
de445b3d 1465 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
4aeec010
MW		 1466 pf->num_alloc_vfs = 0;
1467 goto err_iov;
1468 }
5c3c48ac 1469 }
5c3c48ac 1470 /* allocate memory */
cc6456af 1471 vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL);
5c3c48ac
JB		 1472 if (!vfs) {
1473 ret = -ENOMEM;
1474 goto err_alloc;
1475 }
c674d125 1476 pf->vf = vfs;
5c3c48ac
JB		 1477
1478 /* apply default profile */
1479 for (i = 0; i < num_alloc_vfs; i++) {
1480 vfs[i].pf = pf;
1481 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
1482 vfs[i].vf_id = i;
1483
1484 /* assign default capabilities */
1485 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
c674d125 1486 vfs[i].spoofchk = true;
1b484370
JK		 1487
1488 set_bit(I40E_VF_STATE_PRE_ENABLE, &vfs[i].vf_states);
5c3c48ac 1489
5c3c48ac 1490 }
5c3c48ac
JB		 1491 pf->num_alloc_vfs = num_alloc_vfs;
1492
1b484370
JK		 1493 /* VF resources get allocated during reset */
1494 i40e_reset_all_vfs(pf, false);
1495
6a23449a
AD		 1496 i40e_notify_client_of_vf_enable(pf, num_alloc_vfs);
1497
5c3c48ac
JB		 1498err_alloc:
1499 if (ret)
1500 i40e_free_vfs(pf);
1501err_iov:
6c1b5bff 1502 /* Re-enable interrupt 0. */
dbadbbe2 1503 i40e_irq_dynamic_enable_icr0(pf);
5c3c48ac
JB		 1504 return ret;
1505}
1506
1507#endif
1508/**
1509 * i40e_pci_sriov_enable
1510 * @pdev: pointer to a pci_dev structure
b40c82e6 1511 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1512 *
1513 * Enable or change the number of VFs
1514 **/
1515static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
1516{
1517#ifdef CONFIG_PCI_IOV
1518 struct i40e_pf *pf = pci_get_drvdata(pdev);
1519 int pre_existing_vfs = pci_num_vf(pdev);
1520 int err = 0;
1521
0da36b97 1522 if (test_bit(__I40E_TESTING, pf->state)) {
e17bc411
GR		 1523 dev_warn(&pdev->dev,
1524 "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n");
1525 err = -EPERM;
1526 goto err_out;
1527 }
1528
5c3c48ac
JB		 1529 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
1530 i40e_free_vfs(pf);
1531 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
1532 goto out;
1533
1534 if (num_vfs > pf->num_req_vfs) {
96c8d073
MW		 1535 dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n",
1536 num_vfs, pf->num_req_vfs);
5c3c48ac
JB		 1537 err = -EPERM;
1538 goto err_out;
1539 }
1540
96c8d073 1541 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
5c3c48ac
JB		 1542 err = i40e_alloc_vfs(pf, num_vfs);
1543 if (err) {
1544 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
1545 goto err_out;
1546 }
1547
1548out:
1549 return num_vfs;
1550
1551err_out:
1552 return err;
1553#endif
1554 return 0;
1555}
1556
1557/**
1558 * i40e_pci_sriov_configure
1559 * @pdev: pointer to a pci_dev structure
b40c82e6 1560 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1561 *
1562 * Enable or change the number of VFs. Called when the user updates the number
1563 * of VFs in sysfs.
1564 **/
1565int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1566{
1567 struct i40e_pf *pf = pci_get_drvdata(pdev);
1568
fc60861e
ASJ		 1569 if (num_vfs) {
1570 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
1571 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
ff424188 1572 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
fc60861e 1573 }
5c3c48ac 1574 return i40e_pci_sriov_enable(pdev, num_vfs);
fc60861e 1575 }
5c3c48ac 1576
c24817b6 1577 if (!pci_vfs_assigned(pf->pdev)) {
9e5634df 1578 i40e_free_vfs(pf);
fc60861e 1579 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
ff424188 1580 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
9e5634df
MW		 1581 } else {
1582 dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
1583 return -EINVAL;
1584 }
5c3c48ac
JB		 1585 return 0;
1586}
1587
1588/***********************virtual channel routines******************/
1589
1590/**
1591 * i40e_vc_send_msg_to_vf
b40c82e6 1592 * @vf: pointer to the VF info
5c3c48ac
JB		 1593 * @v_opcode: virtual channel opcode
1594 * @v_retval: virtual channel return value
1595 * @msg: pointer to the msg buffer
1596 * @msglen: msg length
1597 *
b40c82e6 1598 * send msg to VF
5c3c48ac
JB		 1599 **/
1600static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
1601 u32 v_retval, u8 *msg, u16 msglen)
1602{
6e7b5bd3
ASJ		 1603 struct i40e_pf *pf;
1604 struct i40e_hw *hw;
1605 int abs_vf_id;
5c3c48ac
JB		 1606 i40e_status aq_ret;
1607
6e7b5bd3
ASJ		 1608 /* validate the request */
1609 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
1610 return -EINVAL;
1611
1612 pf = vf->pf;
1613 hw = &pf->hw;
1614 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1615
5c3c48ac
JB		 1616 /* single place to detect unsuccessful return values */
1617 if (v_retval) {
1618 vf->num_invalid_msgs++;
18b7af57
MW		 1619 dev_info(&pf->pdev->dev, "VF %d failed opcode %d, retval: %d\n",
1620 vf->vf_id, v_opcode, v_retval);
5c3c48ac
JB		 1621 if (vf->num_invalid_msgs >
1622 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
1623 dev_err(&pf->pdev->dev,
1624 "Number of invalid messages exceeded for VF %d\n",
1625 vf->vf_id);
1626 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
6322e63c 1627 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
5c3c48ac
JB		 1628 }
1629 } else {
1630 vf->num_valid_msgs++;
5d38c93e
JW		 1631 /* reset the invalid counter, if a valid message is received. */
1632 vf->num_invalid_msgs = 0;
5c3c48ac
JB		 1633 }
1634
f19efbb5 1635 aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
7efa84b7 1636 msg, msglen, NULL);
5c3c48ac 1637 if (aq_ret) {
18b7af57
MW		 1638 dev_info(&pf->pdev->dev,
1639 "Unable to send the message to VF %d aq_err %d\n",
1640 vf->vf_id, pf->hw.aq.asq_last_status);
5c3c48ac
JB		 1641 return -EIO;
1642 }
1643
1644 return 0;
1645}
1646
1647/**
1648 * i40e_vc_send_resp_to_vf
b40c82e6 1649 * @vf: pointer to the VF info
5c3c48ac
JB		 1650 * @opcode: operation code
1651 * @retval: return value
1652 *
b40c82e6 1653 * send resp msg to VF
5c3c48ac
JB		 1654 **/
1655static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
310a2ad9 1656 enum virtchnl_ops opcode,
5c3c48ac
JB		 1657 i40e_status retval)
1658{
1659 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
1660}
1661
1662/**
1663 * i40e_vc_get_version_msg
b40c82e6 1664 * @vf: pointer to the VF info
5c3c48ac 1665 *
b40c82e6 1666 * called from the VF to request the API version used by the PF
5c3c48ac 1667 **/
f4ca1a22 1668static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 1669{
310a2ad9
JB		 1670 struct virtchnl_version_info info = {
1671 VIRTCHNL_VERSION_MAJOR, VIRTCHNL_VERSION_MINOR
5c3c48ac
JB		 1672 };
1673
310a2ad9 1674 vf->vf_ver = *(struct virtchnl_version_info *)msg;
606a5488 1675 /* VFs running the 1.0 API expect to get 1.0 back or they will cry. */
eedcfef8 1676 if (VF_IS_V10(&vf->vf_ver))
310a2ad9
JB		 1677 info.minor = VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
1678 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_VERSION,
5c3c48ac 1679 I40E_SUCCESS, (u8 *)&info,
f0adc6e8 1680 sizeof(struct virtchnl_version_info));
5c3c48ac
JB		 1681}
1682
c4998aa3
AD		 1683/**
1684 * i40e_del_qch - delete all the additional VSIs created as a part of ADq
1685 * @vf: pointer to VF structure
1686 **/
1687static void i40e_del_qch(struct i40e_vf *vf)
1688{
1689 struct i40e_pf *pf = vf->pf;
1690 int i;
1691
1692 /* first element in the array belongs to primary VF VSI and we shouldn't
1693 * delete it. We should however delete the rest of the VSIs created
1694 */
1695 for (i = 1; i < vf->num_tc; i++) {
1696 if (vf->ch[i].vsi_idx) {
1697 i40e_vsi_release(pf->vsi[vf->ch[i].vsi_idx]);
1698 vf->ch[i].vsi_idx = 0;
1699 vf->ch[i].vsi_id = 0;
1700 }
1701 }
1702}
1703
5c3c48ac
JB		 1704/**
1705 * i40e_vc_get_vf_resources_msg
b40c82e6 1706 * @vf: pointer to the VF info
5c3c48ac
JB		 1707 * @msg: pointer to the msg buffer
1708 * @msglen: msg length
1709 *
b40c82e6 1710 * called from the VF to request its resources
5c3c48ac 1711 **/
f4ca1a22 1712static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 1713{
310a2ad9 1714 struct virtchnl_vf_resource *vfres = NULL;
5c3c48ac
JB		 1715 struct i40e_pf *pf = vf->pf;
1716 i40e_status aq_ret = 0;
1717 struct i40e_vsi *vsi;
5c3c48ac 1718 int num_vsis = 1;
442b25e4 1719 int len = 0;
5c3c48ac
JB		 1720 int ret;
1721
6322e63c 1722 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
5c3c48ac
JB		 1723 aq_ret = I40E_ERR_PARAM;
1724 goto err;
1725 }
1726
310a2ad9
JB		 1727 len = (sizeof(struct virtchnl_vf_resource) +
1728 sizeof(struct virtchnl_vsi_resource) * num_vsis);
5c3c48ac
JB		 1729
1730 vfres = kzalloc(len, GFP_KERNEL);
1731 if (!vfres) {
1732 aq_ret = I40E_ERR_NO_MEMORY;
1733 len = 0;
1734 goto err;
1735 }
eedcfef8 1736 if (VF_IS_V11(&vf->vf_ver))
f4ca1a22
MW		 1737 vf->driver_caps = *(u32 *)msg;
1738 else
310a2ad9
JB		 1739 vf->driver_caps = VIRTCHNL_VF_OFFLOAD_L2 |
1740 VIRTCHNL_VF_OFFLOAD_RSS_REG |
1741 VIRTCHNL_VF_OFFLOAD_VLAN;
5c3c48ac 1742
fbb113f7 1743 vfres->vf_cap_flags = VIRTCHNL_VF_OFFLOAD_L2;
fdf0e0bf 1744 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1745 if (!vsi->info.pvid)
fbb113f7 1746 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_VLAN;
e3219ce6 1747
0ef2d5af 1748 if (i40e_vf_client_capable(pf, vf->vf_id) &&
310a2ad9 1749 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_IWARP)) {
fbb113f7 1750 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_IWARP;
6322e63c 1751 set_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
41d0a4d0
AB		 1752 } else {
1753 clear_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
e3219ce6
ASJ		 1754 }
1755
310a2ad9 1756 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
fbb113f7 1757 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_PF;
e25d00b8 1758 } else {
d36e41dc 1759 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
310a2ad9 1760 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_AQ))
fbb113f7 1761 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_AQ;
c4e1868c 1762 else
fbb113f7 1763 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_REG;
e25d00b8 1764 }
1f012279 1765
d36e41dc 1766 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
310a2ad9 1767 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
fbb113f7 1768 vfres->vf_cap_flags |=
310a2ad9 1769 VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
3d0da5b7
ASJ		 1770 }
1771
310a2ad9 1772 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP)
fbb113f7 1773 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP;
bacd75cf 1774
d36e41dc 1775 if ((pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE) &&
310a2ad9 1776 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM))
fbb113f7 1777 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM;
bacd75cf 1778
310a2ad9 1779 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) {
14c5f5d2
SN		 1780 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
1781 dev_err(&pf->pdev->dev,
1782 "VF %d requested polling mode: this feature is supported only when the device is running in single function per port (SFP) mode\n",
1783 vf->vf_id);
db1a8f8e 1784 aq_ret = I40E_ERR_PARAM;
14c5f5d2
SN		 1785 goto err;
1786 }
fbb113f7 1787 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RX_POLLING;
14c5f5d2 1788 }
1f012279 1789
d36e41dc 1790 if (pf->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) {
310a2ad9 1791 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
fbb113f7 1792 vfres->vf_cap_flags |=
310a2ad9 1793 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
f6d83d13
ASJ		 1794 }
1795
a3f5aa90
AB		 1796 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_REQ_QUEUES)
1797 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_REQ_QUEUES;
1798
c27eac48
AD		 1799 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ADQ)
1800 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ADQ;
1801
5c3c48ac
JB		 1802 vfres->num_vsis = num_vsis;
1803 vfres->num_queue_pairs = vf->num_queue_pairs;
1804 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
c4e1868c
MW		 1805 vfres->rss_key_size = I40E_HKEY_ARRAY_SIZE;
1806 vfres->rss_lut_size = I40E_VF_HLUT_ARRAY_SIZE;
1807
fdf0e0bf 1808 if (vf->lan_vsi_idx) {
442b25e4 1809 vfres->vsi_res[0].vsi_id = vf->lan_vsi_id;
ff3f4cc2 1810 vfres->vsi_res[0].vsi_type = VIRTCHNL_VSI_SRIOV;
442b25e4 1811 vfres->vsi_res[0].num_queue_pairs = vsi->alloc_queue_pairs;
f578f5f4 1812 /* VFs only use TC 0 */
442b25e4 1813 vfres->vsi_res[0].qset_handle
f578f5f4 1814 = le16_to_cpu(vsi->info.qs_handle[0]);
442b25e4 1815 ether_addr_copy(vfres->vsi_res[0].default_mac_addr,
6995b36c 1816 vf->default_lan_addr.addr);
5c3c48ac 1817 }
6322e63c 1818 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac
JB		 1819
1820err:
b40c82e6 1821 /* send the response back to the VF */
310a2ad9 1822 ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_VF_RESOURCES,
5c3c48ac
JB		 1823 aq_ret, (u8 *)vfres, len);
1824
1825 kfree(vfres);
1826 return ret;
1827}
1828
1829/**
1830 * i40e_vc_reset_vf_msg
b40c82e6 1831 * @vf: pointer to the VF info
5c3c48ac
JB		 1832 * @msg: pointer to the msg buffer
1833 * @msglen: msg length
1834 *
b40c82e6
JK		 1835 * called from the VF to reset itself,
1836 * unlike other virtchnl messages, PF driver
1837 * doesn't send the response back to the VF
5c3c48ac 1838 **/
fc18eaa0 1839static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
5c3c48ac 1840{
6322e63c 1841 if (test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
fc18eaa0 1842 i40e_reset_vf(vf, false);
5c3c48ac
JB		 1843}
1844
5676a8b9
ASJ		 1845/**
1846 * i40e_getnum_vf_vsi_vlan_filters
1847 * @vsi: pointer to the vsi
1848 *
1849 * called to get the number of VLANs offloaded on this VF
1850 **/
1851static inline int i40e_getnum_vf_vsi_vlan_filters(struct i40e_vsi *vsi)
1852{
1853 struct i40e_mac_filter *f;
278e7d0b 1854 int num_vlans = 0, bkt;
5676a8b9 1855
278e7d0b 1856 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
5676a8b9
ASJ		 1857 if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID)
1858 num_vlans++;
1859 }
1860
1861 return num_vlans;
1862}
1863
5c3c48ac
JB		 1864/**
1865 * i40e_vc_config_promiscuous_mode_msg
b40c82e6 1866 * @vf: pointer to the VF info
5c3c48ac
JB		 1867 * @msg: pointer to the msg buffer
1868 * @msglen: msg length
1869 *
b40c82e6
JK		 1870 * called from the VF to configure the promiscuous mode of
1871 * VF vsis
5c3c48ac
JB		 1872 **/
1873static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf,
1874 u8 *msg, u16 msglen)
1875{
310a2ad9
JB		 1876 struct virtchnl_promisc_info *info =
1877 (struct virtchnl_promisc_info *)msg;
5c3c48ac
JB		 1878 struct i40e_pf *pf = vf->pf;
1879 struct i40e_hw *hw = &pf->hw;
5676a8b9
ASJ		 1880 struct i40e_mac_filter *f;
1881 i40e_status aq_ret = 0;
5c3c48ac 1882 bool allmulti = false;
5676a8b9
ASJ		 1883 struct i40e_vsi *vsi;
1884 bool alluni = false;
1885 int aq_err = 0;
278e7d0b 1886 int bkt;
5c3c48ac 1887
fdf0e0bf 1888 vsi = i40e_find_vsi_from_id(pf, info->vsi_id);
6322e63c 1889 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d4a0658d
CW		 1890 !i40e_vc_isvalid_vsi_id(vf, info->vsi_id) ||
1891 !vsi) {
eee4172a
MW		 1892 aq_ret = I40E_ERR_PARAM;
1893 goto error_param;
1894 }
1895 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
5676a8b9 1896 dev_err(&pf->pdev->dev,
eee4172a 1897 "Unprivileged VF %d is attempting to configure promiscuous mode\n",
5676a8b9 1898 vf->vf_id);
eee4172a
MW		 1899 /* Lie to the VF on purpose. */
1900 aq_ret = 0;
5c3c48ac
JB		 1901 goto error_param;
1902 }
5676a8b9 1903 /* Multicast promiscuous handling*/
ff3f4cc2 1904 if (info->flags & FLAG_VF_MULTICAST_PROMISC)
5c3c48ac 1905 allmulti = true;
5676a8b9
ASJ		 1906
1907 if (vf->port_vlan_id) {
1908 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw, vsi->seid,
1909 allmulti,
1910 vf->port_vlan_id,
1911 NULL);
1912 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
278e7d0b 1913 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
47d34839
ASJ		 1914 if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
1915 continue;
1916 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw,
1917 vsi->seid,
1918 allmulti,
1919 f->vlan,
1920 NULL);
5676a8b9
ASJ		 1921 aq_err = pf->hw.aq.asq_last_status;
1922 if (aq_ret) {
1923 dev_err(&pf->pdev->dev,
1924 "Could not add VLAN %d to multicast promiscuous domain err %s aq_err %s\n",
1925 f->vlan,
1926 i40e_stat_str(&pf->hw, aq_ret),
1927 i40e_aq_str(&pf->hw, aq_err));
1928 break;
1929 }
1930 }
1931 } else {
1932 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid,
1933 allmulti, NULL);
1934 aq_err = pf->hw.aq.asq_last_status;
1935 if (aq_ret) {
1936 dev_err(&pf->pdev->dev,
1937 "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n",
1938 vf->vf_id,
1939 i40e_stat_str(&pf->hw, aq_ret),
1940 i40e_aq_str(&pf->hw, aq_err));
7429c0bd 1941 goto error_param;
5676a8b9
ASJ		 1942 }
1943 }
1944
1945 if (!aq_ret) {
1946 dev_info(&pf->pdev->dev,
1947 "VF %d successfully set multicast promiscuous mode\n",
1948 vf->vf_id);
1949 if (allmulti)
6322e63c 1950 set_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
5676a8b9 1951 else
6322e63c 1952 clear_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
5676a8b9
ASJ		 1953 }
1954
ff3f4cc2 1955 if (info->flags & FLAG_VF_UNICAST_PROMISC)
5676a8b9
ASJ		 1956 alluni = true;
1957 if (vf->port_vlan_id) {
1958 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw, vsi->seid,
1959 alluni,
1960 vf->port_vlan_id,
1961 NULL);
1962 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
278e7d0b 1963 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
4d433084
JB		 1964 if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
1965 continue;
1966 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw,
1967 vsi->seid,
1968 alluni,
1969 f->vlan,
1970 NULL);
1971 aq_err = pf->hw.aq.asq_last_status;
5676a8b9
ASJ		 1972 if (aq_ret)
1973 dev_err(&pf->pdev->dev,
1974 "Could not add VLAN %d to Unicast promiscuous domain err %s aq_err %s\n",
1975 f->vlan,
1976 i40e_stat_str(&pf->hw, aq_ret),
1977 i40e_aq_str(&pf->hw, aq_err));
1978 }
1979 } else {
1980 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, vsi->seid,
e53b382f 1981 alluni, NULL,
b5569892 1982 true);
5676a8b9 1983 aq_err = pf->hw.aq.asq_last_status;
7429c0bd 1984 if (aq_ret) {
5676a8b9
ASJ		 1985 dev_err(&pf->pdev->dev,
1986 "VF %d failed to set unicast promiscuous mode %8.8x err %s aq_err %s\n",
1987 vf->vf_id, info->flags,
1988 i40e_stat_str(&pf->hw, aq_ret),
1989 i40e_aq_str(&pf->hw, aq_err));
7429c0bd
JK		 1990 goto error_param;
1991 }
5676a8b9
ASJ		 1992 }
1993
5676a8b9
ASJ		 1994 if (!aq_ret) {
1995 dev_info(&pf->pdev->dev,
1996 "VF %d successfully set unicast promiscuous mode\n",
1997 vf->vf_id);
1998 if (alluni)
6322e63c 1999 set_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
5676a8b9 2000 else
6322e63c 2001 clear_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
5676a8b9 2002 }
5c3c48ac
JB		 2003
2004error_param:
b40c82e6 2005 /* send the response to the VF */
5c3c48ac 2006 return i40e_vc_send_resp_to_vf(vf,
310a2ad9 2007 VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
5c3c48ac
JB		 2008 aq_ret);
2009}
2010
2011/**
2012 * i40e_vc_config_queues_msg
b40c82e6 2013 * @vf: pointer to the VF info
5c3c48ac
JB		 2014 * @msg: pointer to the msg buffer
2015 * @msglen: msg length
2016 *
b40c82e6 2017 * called from the VF to configure the rx/tx
5c3c48ac
JB		 2018 * queues
2019 **/
2020static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2021{
310a2ad9
JB		 2022 struct virtchnl_vsi_queue_config_info *qci =
2023 (struct virtchnl_vsi_queue_config_info *)msg;
2024 struct virtchnl_queue_pair_info *qpi;
5f5e33b6 2025 struct i40e_pf *pf = vf->pf;
c27eac48 2026 u16 vsi_id, vsi_queue_id = 0;
5c3c48ac 2027 i40e_status aq_ret = 0;
c27eac48
AD		 2028 int i, j = 0, idx = 0;
2029
2030 vsi_id = qci->vsi_id;
5c3c48ac 2031
6322e63c 2032 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2033 aq_ret = I40E_ERR_PARAM;
2034 goto error_param;
2035 }
2036
5c3c48ac
JB		 2037 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2038 aq_ret = I40E_ERR_PARAM;
2039 goto error_param;
2040 }
c27eac48 2041
5c3c48ac
JB		 2042 for (i = 0; i < qci->num_queue_pairs; i++) {
2043 qpi = &qci->qpair[i];
c27eac48
AD		 2044
2045 if (!vf->adq_enabled) {
2046 vsi_queue_id = qpi->txq.queue_id;
2047
2048 if (qpi->txq.vsi_id != qci->vsi_id ||
2049 qpi->rxq.vsi_id != qci->vsi_id ||
2050 qpi->rxq.queue_id != vsi_queue_id) {
2051 aq_ret = I40E_ERR_PARAM;
2052 goto error_param;
2053 }
2054 }
2055
2056 if (!i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
5c3c48ac
JB		 2057 aq_ret = I40E_ERR_PARAM;
2058 goto error_param;
2059 }
2060
2061 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
2062 &qpi->rxq) ||
2063 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
2064 &qpi->txq)) {
2065 aq_ret = I40E_ERR_PARAM;
2066 goto error_param;
2067 }
c27eac48
AD		 2068
2069 /* For ADq there can be up to 4 VSIs with max 4 queues each.
2070 * VF does not know about these additional VSIs and all
2071 * it cares is about its own queues. PF configures these queues
2072 * to its appropriate VSIs based on TC mapping
2073 **/
2074 if (vf->adq_enabled) {
2075 if (j == (vf->ch[idx].num_qps - 1)) {
2076 idx++;
2077 j = 0; /* resetting the queue count */
2078 vsi_queue_id = 0;
2079 } else {
2080 j++;
2081 vsi_queue_id++;
2082 }
2083 vsi_id = vf->ch[idx].vsi_id;
2084 }
5c3c48ac 2085 }
b40c82e6 2086 /* set vsi num_queue_pairs in use to num configured by VF */
c27eac48
AD		 2087 if (!vf->adq_enabled) {
2088 pf->vsi[vf->lan_vsi_idx]->num_queue_pairs =
2089 qci->num_queue_pairs;
2090 } else {
2091 for (i = 0; i < vf->num_tc; i++)
2092 pf->vsi[vf->ch[i].vsi_idx]->num_queue_pairs =
2093 vf->ch[i].num_qps;
2094 }
5c3c48ac
JB		 2095
2096error_param:
b40c82e6 2097 /* send the response to the VF */
310a2ad9 2098 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES,
5c3c48ac
JB		 2099 aq_ret);
2100}
2101
c27eac48
AD		 2102/**
2103 * i40e_validate_queue_map
2104 * @vsi_id: vsi id
2105 * @queuemap: Tx or Rx queue map
2106 *
2107 * check if Tx or Rx queue map is valid
2108 **/
2109static int i40e_validate_queue_map(struct i40e_vf *vf, u16 vsi_id,
2110 unsigned long queuemap)
2111{
2112 u16 vsi_queue_id, queue_id;
2113
2114 for_each_set_bit(vsi_queue_id, &queuemap, I40E_MAX_VSI_QP) {
2115 if (vf->adq_enabled) {
2116 vsi_id = vf->ch[vsi_queue_id / I40E_MAX_VF_VSI].vsi_id;
2117 queue_id = (vsi_queue_id % I40E_DEFAULT_QUEUES_PER_VF);
2118 } else {
2119 queue_id = vsi_queue_id;
2120 }
2121
2122 if (!i40e_vc_isvalid_queue_id(vf, vsi_id, queue_id))
2123 return -EINVAL;
2124 }
2125
2126 return 0;
2127}
2128
5c3c48ac
JB		 2129/**
2130 * i40e_vc_config_irq_map_msg
b40c82e6 2131 * @vf: pointer to the VF info
5c3c48ac
JB		 2132 * @msg: pointer to the msg buffer
2133 * @msglen: msg length
2134 *
b40c82e6 2135 * called from the VF to configure the irq to
5c3c48ac
JB		 2136 * queue map
2137 **/
2138static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2139{
310a2ad9
JB		 2140 struct virtchnl_irq_map_info *irqmap_info =
2141 (struct virtchnl_irq_map_info *)msg;
2142 struct virtchnl_vector_map *map;
c27eac48 2143 u16 vsi_id, vector_id;
5c3c48ac 2144 i40e_status aq_ret = 0;
5c3c48ac
JB		 2145 int i;
2146
6322e63c 2147 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2148 aq_ret = I40E_ERR_PARAM;
2149 goto error_param;
2150 }
2151
2152 for (i = 0; i < irqmap_info->num_vectors; i++) {
2153 map = &irqmap_info->vecmap[i];
5c3c48ac
JB		 2154 vector_id = map->vector_id;
2155 vsi_id = map->vsi_id;
2156 /* validate msg params */
2157 if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
2158 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2159 aq_ret = I40E_ERR_PARAM;
2160 goto error_param;
2161 }
2162
c27eac48
AD		 2163 if (i40e_validate_queue_map(vf, vsi_id, map->rxq_map)) {
2164 aq_ret = I40E_ERR_PARAM;
2165 goto error_param;
5c3c48ac
JB		 2166 }
2167
c27eac48
AD		 2168 if (i40e_validate_queue_map(vf, vsi_id, map->txq_map)) {
2169 aq_ret = I40E_ERR_PARAM;
2170 goto error_param;
5c3c48ac
JB		 2171 }
2172
2173 i40e_config_irq_link_list(vf, vsi_id, map);
2174 }
2175error_param:
b40c82e6 2176 /* send the response to the VF */
310a2ad9 2177 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_IRQ_MAP,
5c3c48ac
JB		 2178 aq_ret);
2179}
2180
2181/**
2182 * i40e_vc_enable_queues_msg
b40c82e6 2183 * @vf: pointer to the VF info
5c3c48ac
JB		 2184 * @msg: pointer to the msg buffer
2185 * @msglen: msg length
2186 *
b40c82e6 2187 * called from the VF to enable all or specific queue(s)
5c3c48ac
JB		 2188 **/
2189static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2190{
310a2ad9
JB		 2191 struct virtchnl_queue_select *vqs =
2192 (struct virtchnl_queue_select *)msg;
5c3c48ac
JB		 2193 struct i40e_pf *pf = vf->pf;
2194 u16 vsi_id = vqs->vsi_id;
2195 i40e_status aq_ret = 0;
c27eac48 2196 int i;
5c3c48ac 2197
6322e63c 2198 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2199 aq_ret = I40E_ERR_PARAM;
2200 goto error_param;
2201 }
2202
2203 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2204 aq_ret = I40E_ERR_PARAM;
2205 goto error_param;
2206 }
2207
2208 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
2209 aq_ret = I40E_ERR_PARAM;
2210 goto error_param;
2211 }
fdf0e0bf 2212
3aa7b74d 2213 if (i40e_vsi_start_rings(pf->vsi[vf->lan_vsi_idx]))
88f6563d 2214 aq_ret = I40E_ERR_TIMEOUT;
c27eac48
AD		 2215
2216 /* need to start the rings for additional ADq VSI's as well */
2217 if (vf->adq_enabled) {
2218 /* zero belongs to LAN VSI */
2219 for (i = 1; i < vf->num_tc; i++) {
2220 if (i40e_vsi_start_rings(pf->vsi[vf->ch[i].vsi_idx]))
2221 aq_ret = I40E_ERR_TIMEOUT;
2222 }
2223 }
2224
5c3c48ac 2225error_param:
b40c82e6 2226 /* send the response to the VF */
310a2ad9 2227 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_QUEUES,
5c3c48ac
JB		 2228 aq_ret);
2229}
2230
2231/**
2232 * i40e_vc_disable_queues_msg
b40c82e6 2233 * @vf: pointer to the VF info
5c3c48ac
JB		 2234 * @msg: pointer to the msg buffer
2235 * @msglen: msg length
2236 *
b40c82e6 2237 * called from the VF to disable all or specific
5c3c48ac
JB		 2238 * queue(s)
2239 **/
2240static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2241{
310a2ad9
JB		 2242 struct virtchnl_queue_select *vqs =
2243 (struct virtchnl_queue_select *)msg;
5c3c48ac 2244 struct i40e_pf *pf = vf->pf;
5c3c48ac 2245 i40e_status aq_ret = 0;
5c3c48ac 2246
6322e63c 2247 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2248 aq_ret = I40E_ERR_PARAM;
2249 goto error_param;
2250 }
2251
2252 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
2253 aq_ret = I40E_ERR_PARAM;
2254 goto error_param;
2255 }
2256
2257 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
2258 aq_ret = I40E_ERR_PARAM;
2259 goto error_param;
2260 }
fdf0e0bf 2261
3aa7b74d 2262 i40e_vsi_stop_rings(pf->vsi[vf->lan_vsi_idx]);
5c3c48ac
JB		 2263
2264error_param:
b40c82e6 2265 /* send the response to the VF */
310a2ad9 2266 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_QUEUES,
5c3c48ac
JB		 2267 aq_ret);
2268}
2269
a3f5aa90
AB		 2270/**
2271 * i40e_vc_request_queues_msg
2272 * @vf: pointer to the VF info
2273 * @msg: pointer to the msg buffer
2274 * @msglen: msg length
2275 *
2276 * VFs get a default number of queues but can use this message to request a
17a9422d
AB		 2277 * different number. If the request is successful, PF will reset the VF and
2278 * return 0. If unsuccessful, PF will send message informing VF of number of
2279 * available queues and return result of sending VF a message.
a3f5aa90
AB		 2280 **/
2281static int i40e_vc_request_queues_msg(struct i40e_vf *vf, u8 *msg, int msglen)
2282{
2283 struct virtchnl_vf_res_request *vfres =
2284 (struct virtchnl_vf_res_request *)msg;
2285 int req_pairs = vfres->num_queue_pairs;
2286 int cur_pairs = vf->num_queue_pairs;
2287 struct i40e_pf *pf = vf->pf;
2288
2289 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
2290 return -EINVAL;
2291
2292 if (req_pairs <= 0) {
2293 dev_err(&pf->pdev->dev,
2294 "VF %d tried to request %d queues. Ignoring.\n",
2295 vf->vf_id, req_pairs);
2296 } else if (req_pairs > I40E_MAX_VF_QUEUES) {
2297 dev_err(&pf->pdev->dev,
2298 "VF %d tried to request more than %d queues.\n",
2299 vf->vf_id,
2300 I40E_MAX_VF_QUEUES);
2301 vfres->num_queue_pairs = I40E_MAX_VF_QUEUES;
2302 } else if (req_pairs - cur_pairs > pf->queues_left) {
2303 dev_warn(&pf->pdev->dev,
2304 "VF %d requested %d more queues, but only %d left.\n",
2305 vf->vf_id,
2306 req_pairs - cur_pairs,
2307 pf->queues_left);
2308 vfres->num_queue_pairs = pf->queues_left + cur_pairs;
2309 } else {
17a9422d 2310 /* successful request */
a3f5aa90 2311 vf->num_req_queues = req_pairs;
17a9422d
AB		 2312 i40e_vc_notify_vf_reset(vf);
2313 i40e_reset_vf(vf, false);
2314 return 0;
a3f5aa90
AB		 2315 }
2316
2317 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_REQUEST_QUEUES, 0,
c30bf8ce 2318 (u8 *)vfres, sizeof(*vfres));
a3f5aa90
AB		 2319}
2320
5c3c48ac
JB		 2321/**
2322 * i40e_vc_get_stats_msg
b40c82e6 2323 * @vf: pointer to the VF info
5c3c48ac
JB		 2324 * @msg: pointer to the msg buffer
2325 * @msglen: msg length
2326 *
b40c82e6 2327 * called from the VF to get vsi stats
5c3c48ac
JB		 2328 **/
2329static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2330{
310a2ad9
JB		 2331 struct virtchnl_queue_select *vqs =
2332 (struct virtchnl_queue_select *)msg;
5c3c48ac
JB		 2333 struct i40e_pf *pf = vf->pf;
2334 struct i40e_eth_stats stats;
2335 i40e_status aq_ret = 0;
2336 struct i40e_vsi *vsi;
2337
2338 memset(&stats, 0, sizeof(struct i40e_eth_stats));
2339
6322e63c 2340 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2341 aq_ret = I40E_ERR_PARAM;
2342 goto error_param;
2343 }
2344
2345 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
2346 aq_ret = I40E_ERR_PARAM;
2347 goto error_param;
2348 }
2349
fdf0e0bf 2350 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2351 if (!vsi) {
2352 aq_ret = I40E_ERR_PARAM;
2353 goto error_param;
2354 }
2355 i40e_update_eth_stats(vsi);
5a9769c8 2356 stats = vsi->eth_stats;
5c3c48ac
JB		 2357
2358error_param:
b40c82e6 2359 /* send the response back to the VF */
310a2ad9 2360 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_STATS, aq_ret,
5c3c48ac
JB		 2361 (u8 *)&stats, sizeof(stats));
2362}
2363
5f527ba9 2364/* If the VF is not trusted restrict the number of MAC/VLAN it can program */
4dbc5661 2365#define I40E_VC_MAX_MAC_ADDR_PER_VF 12
5f527ba9
ASJ		 2366#define I40E_VC_MAX_VLAN_PER_VF 8
2367
f657a6e1
GR		 2368/**
2369 * i40e_check_vf_permission
b40c82e6 2370 * @vf: pointer to the VF info
f657a6e1
GR		 2371 * @macaddr: pointer to the MAC Address being checked
2372 *
2373 * Check if the VF has permission to add or delete unicast MAC address
2374 * filters and return error code -EPERM if not. Then check if the
2375 * address filter requested is broadcast or zero and if so return
2376 * an invalid MAC address error code.
2377 **/
2378static inline int i40e_check_vf_permission(struct i40e_vf *vf, u8 *macaddr)
2379{
2380 struct i40e_pf *pf = vf->pf;
2381 int ret = 0;
2382
2383 if (is_broadcast_ether_addr(macaddr) ||
2384 is_zero_ether_addr(macaddr)) {
2385 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n", macaddr);
2386 ret = I40E_ERR_INVALID_MAC_ADDR;
5017c2a8 2387 } else if (vf->pf_set_mac && !is_multicast_ether_addr(macaddr) &&
692fb0a7 2388 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
5017c2a8 2389 !ether_addr_equal(macaddr, vf->default_lan_addr.addr)) {
f657a6e1
GR		 2390 /* If the host VMM administrator has set the VF MAC address
2391 * administratively via the ndo_set_vf_mac command then deny
2392 * permission to the VF to add or delete unicast MAC addresses.
692fb0a7 2393 * Unless the VF is privileged and then it can do whatever.
5017c2a8
GR		 2394 * The VF may request to set the MAC address filter already
2395 * assigned to it so do not return an error in that case.
f657a6e1
GR		 2396 */
2397 dev_err(&pf->pdev->dev,
692fb0a7 2398 "VF attempting to override administratively set MAC address, reload the VF driver to resume normal operation\n");
f657a6e1 2399 ret = -EPERM;
5f527ba9
ASJ		 2400 } else if ((vf->num_mac >= I40E_VC_MAX_MAC_ADDR_PER_VF) &&
2401 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2402 dev_err(&pf->pdev->dev,
2403 "VF is not trusted, switch the VF to trusted to add more functionality\n");
2404 ret = -EPERM;
f657a6e1
GR		 2405 }
2406 return ret;
2407}
2408
5c3c48ac
JB		 2409/**
2410 * i40e_vc_add_mac_addr_msg
b40c82e6 2411 * @vf: pointer to the VF info
5c3c48ac
JB		 2412 * @msg: pointer to the msg buffer
2413 * @msglen: msg length
2414 *
2415 * add guest mac address filter
2416 **/
2417static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2418{
310a2ad9
JB		 2419 struct virtchnl_ether_addr_list *al =
2420 (struct virtchnl_ether_addr_list *)msg;
5c3c48ac
JB		 2421 struct i40e_pf *pf = vf->pf;
2422 struct i40e_vsi *vsi = NULL;
2423 u16 vsi_id = al->vsi_id;
f657a6e1 2424 i40e_status ret = 0;
5c3c48ac
JB		 2425 int i;
2426
6322e63c 2427 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac 2428 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 2429 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2430 goto error_param;
2431 }
2432
2433 for (i = 0; i < al->num_elements; i++) {
f657a6e1
GR		 2434 ret = i40e_check_vf_permission(vf, al->list[i].addr);
2435 if (ret)
5c3c48ac 2436 goto error_param;
5c3c48ac 2437 }
fdf0e0bf 2438 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2439
21659035
KP		 2440 /* Lock once, because all function inside for loop accesses VSI's
2441 * MAC filter list which needs to be protected using same lock.
2442 */
278e7d0b 2443 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 2444
5c3c48ac
JB		 2445 /* add new addresses to the list */
2446 for (i = 0; i < al->num_elements; i++) {
2447 struct i40e_mac_filter *f;
2448
1bc87e80 2449 f = i40e_find_mac(vsi, al->list[i].addr);
34c164de 2450 if (!f) {
feffdbe4 2451 f = i40e_add_mac_filter(vsi, al->list[i].addr);
5c3c48ac 2452
34c164de
ZP		 2453 if (!f) {
2454 dev_err(&pf->pdev->dev,
2455 "Unable to add MAC filter %pM for VF %d\n",
2456 al->list[i].addr, vf->vf_id);
2457 ret = I40E_ERR_PARAM;
2458 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2459 goto error_param;
2460 } else {
2461 vf->num_mac++;
2462 }
5c3c48ac
JB		 2463 }
2464 }
278e7d0b 2465 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2466
2467 /* program the updated filter list */
ea02e90b
MW		 2468 ret = i40e_sync_vsi_filters(vsi);
2469 if (ret)
2470 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2471 vf->vf_id, ret);
5c3c48ac
JB		 2472
2473error_param:
b40c82e6 2474 /* send the response to the VF */
310a2ad9 2475 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_ETH_ADDR,
f657a6e1 2476 ret);
5c3c48ac
JB		 2477}
2478
2479/**
2480 * i40e_vc_del_mac_addr_msg
b40c82e6 2481 * @vf: pointer to the VF info
5c3c48ac
JB		 2482 * @msg: pointer to the msg buffer
2483 * @msglen: msg length
2484 *
2485 * remove guest mac address filter
2486 **/
2487static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2488{
310a2ad9
JB		 2489 struct virtchnl_ether_addr_list *al =
2490 (struct virtchnl_ether_addr_list *)msg;
5c3c48ac
JB		 2491 struct i40e_pf *pf = vf->pf;
2492 struct i40e_vsi *vsi = NULL;
2493 u16 vsi_id = al->vsi_id;
f657a6e1 2494 i40e_status ret = 0;
5c3c48ac
JB		 2495 int i;
2496
6322e63c 2497 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac 2498 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 2499 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2500 goto error_param;
2501 }
f657a6e1
GR		 2502
2503 for (i = 0; i < al->num_elements; i++) {
700bbf6c
MW		 2504 if (is_broadcast_ether_addr(al->list[i].addr) ||
2505 is_zero_ether_addr(al->list[i].addr)) {
8d8f2295
MW		 2506 dev_err(&pf->pdev->dev, "Invalid MAC addr %pM for VF %d\n",
2507 al->list[i].addr, vf->vf_id);
700bbf6c 2508 ret = I40E_ERR_INVALID_MAC_ADDR;
f657a6e1 2509 goto error_param;
700bbf6c 2510 }
f657a6e1 2511 }
fdf0e0bf 2512 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2513
278e7d0b 2514 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2515 /* delete addresses from the list */
2516 for (i = 0; i < al->num_elements; i++)
feffdbe4 2517 if (i40e_del_mac_filter(vsi, al->list[i].addr)) {
b36e9ab5 2518 ret = I40E_ERR_INVALID_MAC_ADDR;
278e7d0b 2519 spin_unlock_bh(&vsi->mac_filter_hash_lock);
b36e9ab5 2520 goto error_param;
5f527ba9
ASJ		 2521 } else {
2522 vf->num_mac--;
b36e9ab5
MW		 2523 }
2524
278e7d0b 2525 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2526
2527 /* program the updated filter list */
ea02e90b
MW		 2528 ret = i40e_sync_vsi_filters(vsi);
2529 if (ret)
2530 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2531 vf->vf_id, ret);
5c3c48ac
JB		 2532
2533error_param:
b40c82e6 2534 /* send the response to the VF */
310a2ad9 2535 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_ETH_ADDR,
f657a6e1 2536 ret);
5c3c48ac
JB		 2537}
2538
2539/**
2540 * i40e_vc_add_vlan_msg
b40c82e6 2541 * @vf: pointer to the VF info
5c3c48ac
JB		 2542 * @msg: pointer to the msg buffer
2543 * @msglen: msg length
2544 *
2545 * program guest vlan id
2546 **/
2547static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2548{
310a2ad9
JB		 2549 struct virtchnl_vlan_filter_list *vfl =
2550 (struct virtchnl_vlan_filter_list *)msg;
5c3c48ac
JB		 2551 struct i40e_pf *pf = vf->pf;
2552 struct i40e_vsi *vsi = NULL;
2553 u16 vsi_id = vfl->vsi_id;
2554 i40e_status aq_ret = 0;
2555 int i;
2556
5f527ba9
ASJ		 2557 if ((vf->num_vlan >= I40E_VC_MAX_VLAN_PER_VF) &&
2558 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2559 dev_err(&pf->pdev->dev,
2560 "VF is not trusted, switch the VF to trusted to add more VLAN addresses\n");
2561 goto error_param;
2562 }
6322e63c 2563 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2564 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2565 aq_ret = I40E_ERR_PARAM;
2566 goto error_param;
2567 }
2568
2569 for (i = 0; i < vfl->num_elements; i++) {
2570 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2571 aq_ret = I40E_ERR_PARAM;
2572 dev_err(&pf->pdev->dev,
2573 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
2574 goto error_param;
2575 }
2576 }
fdf0e0bf 2577 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2578 if (vsi->info.pvid) {
2579 aq_ret = I40E_ERR_PARAM;
2580 goto error_param;
2581 }
2582
2583 i40e_vlan_stripping_enable(vsi);
2584 for (i = 0; i < vfl->num_elements; i++) {
2585 /* add new VLAN filter */
2586 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
5f527ba9
ASJ		 2587 if (!ret)
2588 vf->num_vlan++;
6995b36c 2589
6322e63c 2590 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2591 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2592 true,
2593 vfl->vlan_id[i],
2594 NULL);
6322e63c 2595 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2596 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2597 true,
2598 vfl->vlan_id[i],
2599 NULL);
2600
5c3c48ac
JB		 2601 if (ret)
2602 dev_err(&pf->pdev->dev,
8d8f2295
MW		 2603 "Unable to add VLAN filter %d for VF %d, error %d\n",
2604 vfl->vlan_id[i], vf->vf_id, ret);
5c3c48ac
JB		 2605 }
2606
2607error_param:
b40c82e6 2608 /* send the response to the VF */
310a2ad9 2609 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_VLAN, aq_ret);
5c3c48ac
JB		 2610}
2611
2612/**
2613 * i40e_vc_remove_vlan_msg
b40c82e6 2614 * @vf: pointer to the VF info
5c3c48ac
JB		 2615 * @msg: pointer to the msg buffer
2616 * @msglen: msg length
2617 *
2618 * remove programmed guest vlan id
2619 **/
2620static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2621{
310a2ad9
JB		 2622 struct virtchnl_vlan_filter_list *vfl =
2623 (struct virtchnl_vlan_filter_list *)msg;
5c3c48ac
JB		 2624 struct i40e_pf *pf = vf->pf;
2625 struct i40e_vsi *vsi = NULL;
2626 u16 vsi_id = vfl->vsi_id;
2627 i40e_status aq_ret = 0;
2628 int i;
2629
6322e63c 2630 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2631 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2632 aq_ret = I40E_ERR_PARAM;
2633 goto error_param;
2634 }
2635
2636 for (i = 0; i < vfl->num_elements; i++) {
2637 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2638 aq_ret = I40E_ERR_PARAM;
2639 goto error_param;
2640 }
2641 }
2642
fdf0e0bf 2643 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2644 if (vsi->info.pvid) {
2645 aq_ret = I40E_ERR_PARAM;
2646 goto error_param;
2647 }
2648
2649 for (i = 0; i < vfl->num_elements; i++) {
3aa7b74d
FS		 2650 i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
2651 vf->num_vlan--;
6995b36c 2652
6322e63c 2653 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2654 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2655 false,
2656 vfl->vlan_id[i],
2657 NULL);
6322e63c 2658 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2659 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2660 false,
2661 vfl->vlan_id[i],
2662 NULL);
5c3c48ac
JB		 2663 }
2664
2665error_param:
b40c82e6 2666 /* send the response to the VF */
310a2ad9 2667 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_VLAN, aq_ret);
5c3c48ac
JB		 2668}
2669
e3219ce6
ASJ		 2670/**
2671 * i40e_vc_iwarp_msg
2672 * @vf: pointer to the VF info
2673 * @msg: pointer to the msg buffer
2674 * @msglen: msg length
2675 *
2676 * called from the VF for the iwarp msgs
2677 **/
2678static int i40e_vc_iwarp_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2679{
2680 struct i40e_pf *pf = vf->pf;
2681 int abs_vf_id = vf->vf_id + pf->hw.func_caps.vf_base_id;
2682 i40e_status aq_ret = 0;
2683
6322e63c
JK		 2684 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2685 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2686 aq_ret = I40E_ERR_PARAM;
2687 goto error_param;
2688 }
2689
2690 i40e_notify_client_of_vf_msg(pf->vsi[pf->lan_vsi], abs_vf_id,
2691 msg, msglen);
2692
2693error_param:
2694 /* send the response to the VF */
310a2ad9 2695 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_IWARP,
e3219ce6
ASJ		 2696 aq_ret);
2697}
2698
2699/**
2700 * i40e_vc_iwarp_qvmap_msg
2701 * @vf: pointer to the VF info
2702 * @msg: pointer to the msg buffer
2703 * @msglen: msg length
2704 * @config: config qvmap or release it
2705 *
2706 * called from the VF for the iwarp msgs
2707 **/
2708static int i40e_vc_iwarp_qvmap_msg(struct i40e_vf *vf, u8 *msg, u16 msglen,
2709 bool config)
2710{
310a2ad9
JB		 2711 struct virtchnl_iwarp_qvlist_info *qvlist_info =
2712 (struct virtchnl_iwarp_qvlist_info *)msg;
e3219ce6
ASJ		 2713 i40e_status aq_ret = 0;
2714
6322e63c
JK		 2715 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2716 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2717 aq_ret = I40E_ERR_PARAM;
2718 goto error_param;
2719 }
2720
2721 if (config) {
2722 if (i40e_config_iwarp_qvlist(vf, qvlist_info))
2723 aq_ret = I40E_ERR_PARAM;
2724 } else {
2725 i40e_release_iwarp_qvlist(vf);
2726 }
2727
2728error_param:
2729 /* send the response to the VF */
2730 return i40e_vc_send_resp_to_vf(vf,
310a2ad9
JB		 2731 config ? VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP :
2732 VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP,
e3219ce6
ASJ		 2733 aq_ret);
2734}
2735
c4e1868c
MW		 2736/**
2737 * i40e_vc_config_rss_key
2738 * @vf: pointer to the VF info
2739 * @msg: pointer to the msg buffer
2740 * @msglen: msg length
2741 *
2742 * Configure the VF's RSS key
2743 **/
2744static int i40e_vc_config_rss_key(struct i40e_vf *vf, u8 *msg, u16 msglen)
2745{
310a2ad9
JB		 2746 struct virtchnl_rss_key *vrk =
2747 (struct virtchnl_rss_key *)msg;
c4e1868c
MW		 2748 struct i40e_pf *pf = vf->pf;
2749 struct i40e_vsi *vsi = NULL;
2750 u16 vsi_id = vrk->vsi_id;
2751 i40e_status aq_ret = 0;
2752
6322e63c 2753 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2754 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2755 (vrk->key_len != I40E_HKEY_ARRAY_SIZE)) {
2756 aq_ret = I40E_ERR_PARAM;
2757 goto err;
2758 }
2759
2760 vsi = pf->vsi[vf->lan_vsi_idx];
2761 aq_ret = i40e_config_rss(vsi, vrk->key, NULL, 0);
2762err:
2763 /* send the response to the VF */
310a2ad9 2764 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_KEY,
c4e1868c
MW		 2765 aq_ret);
2766}
2767
2768/**
2769 * i40e_vc_config_rss_lut
2770 * @vf: pointer to the VF info
2771 * @msg: pointer to the msg buffer
2772 * @msglen: msg length
2773 *
2774 * Configure the VF's RSS LUT
2775 **/
2776static int i40e_vc_config_rss_lut(struct i40e_vf *vf, u8 *msg, u16 msglen)
2777{
310a2ad9
JB		 2778 struct virtchnl_rss_lut *vrl =
2779 (struct virtchnl_rss_lut *)msg;
c4e1868c
MW		 2780 struct i40e_pf *pf = vf->pf;
2781 struct i40e_vsi *vsi = NULL;
2782 u16 vsi_id = vrl->vsi_id;
2783 i40e_status aq_ret = 0;
2784
6322e63c 2785 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2786 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2787 (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)) {
2788 aq_ret = I40E_ERR_PARAM;
2789 goto err;
2790 }
2791
2792 vsi = pf->vsi[vf->lan_vsi_idx];
2793 aq_ret = i40e_config_rss(vsi, NULL, vrl->lut, I40E_VF_HLUT_ARRAY_SIZE);
2794 /* send the response to the VF */
2795err:
310a2ad9 2796 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_LUT,
c4e1868c
MW		 2797 aq_ret);
2798}
2799
2800/**
2801 * i40e_vc_get_rss_hena
2802 * @vf: pointer to the VF info
2803 * @msg: pointer to the msg buffer
2804 * @msglen: msg length
2805 *
2806 * Return the RSS HENA bits allowed by the hardware
2807 **/
2808static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
2809{
310a2ad9 2810 struct virtchnl_rss_hena *vrh = NULL;
c4e1868c
MW		 2811 struct i40e_pf *pf = vf->pf;
2812 i40e_status aq_ret = 0;
2813 int len = 0;
2814
6322e63c 2815 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2816 aq_ret = I40E_ERR_PARAM;
2817 goto err;
2818 }
310a2ad9 2819 len = sizeof(struct virtchnl_rss_hena);
c4e1868c
MW		 2820
2821 vrh = kzalloc(len, GFP_KERNEL);
2822 if (!vrh) {
2823 aq_ret = I40E_ERR_NO_MEMORY;
2824 len = 0;
2825 goto err;
2826 }
2827 vrh->hena = i40e_pf_get_default_rss_hena(pf);
2828err:
2829 /* send the response back to the VF */
310a2ad9 2830 aq_ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_RSS_HENA_CAPS,
c4e1868c 2831 aq_ret, (u8 *)vrh, len);
b7d2cd95 2832 kfree(vrh);
c4e1868c
MW		 2833 return aq_ret;
2834}
2835
2836/**
2837 * i40e_vc_set_rss_hena
2838 * @vf: pointer to the VF info
2839 * @msg: pointer to the msg buffer
2840 * @msglen: msg length
2841 *
2842 * Set the RSS HENA bits for the VF
2843 **/
2844static int i40e_vc_set_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
2845{
310a2ad9
JB		 2846 struct virtchnl_rss_hena *vrh =
2847 (struct virtchnl_rss_hena *)msg;
c4e1868c
MW		 2848 struct i40e_pf *pf = vf->pf;
2849 struct i40e_hw *hw = &pf->hw;
2850 i40e_status aq_ret = 0;
2851
6322e63c 2852 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2853 aq_ret = I40E_ERR_PARAM;
2854 goto err;
2855 }
2856 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)vrh->hena);
2857 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_id),
2858 (u32)(vrh->hena >> 32));
2859
2860 /* send the response to the VF */
2861err:
f0adc6e8 2862 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_SET_RSS_HENA, aq_ret);
c4e1868c
MW		 2863}
2864
8774370d
MS		 2865/**
2866 * i40e_vc_enable_vlan_stripping
2867 * @vf: pointer to the VF info
2868 * @msg: pointer to the msg buffer
2869 * @msglen: msg length
2870 *
2871 * Enable vlan header stripping for the VF
2872 **/
2873static int i40e_vc_enable_vlan_stripping(struct i40e_vf *vf, u8 *msg,
2874 u16 msglen)
2875{
2876 struct i40e_vsi *vsi = vf->pf->vsi[vf->lan_vsi_idx];
2877 i40e_status aq_ret = 0;
2878
2879 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
2880 aq_ret = I40E_ERR_PARAM;
2881 goto err;
2882 }
2883
2884 i40e_vlan_stripping_enable(vsi);
2885
2886 /* send the response to the VF */
2887err:
2888 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_VLAN_STRIPPING,
2889 aq_ret);
2890}
2891
2892/**
2893 * i40e_vc_disable_vlan_stripping
2894 * @vf: pointer to the VF info
2895 * @msg: pointer to the msg buffer
2896 * @msglen: msg length
2897 *
2898 * Disable vlan header stripping for the VF
2899 **/
2900static int i40e_vc_disable_vlan_stripping(struct i40e_vf *vf, u8 *msg,
2901 u16 msglen)
2902{
2903 struct i40e_vsi *vsi = vf->pf->vsi[vf->lan_vsi_idx];
2904 i40e_status aq_ret = 0;
2905
2906 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
2907 aq_ret = I40E_ERR_PARAM;
2908 goto err;
2909 }
2910
2911 i40e_vlan_stripping_disable(vsi);
2912
2913 /* send the response to the VF */
2914err:
2915 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_VLAN_STRIPPING,
2916 aq_ret);
2917}
2918
e284fc28
AD		 2919/**
2920 * i40e_validate_cloud_filter
2921 * @mask: mask for TC filter
2922 * @data: data for TC filter
2923 *
2924 * This function validates cloud filter programmed as TC filter for ADq
2925 **/
2926static int i40e_validate_cloud_filter(struct i40e_vf *vf,
2927 struct virtchnl_filter *tc_filter)
2928{
2929 struct virtchnl_l4_spec mask = tc_filter->mask.tcp_spec;
2930 struct virtchnl_l4_spec data = tc_filter->data.tcp_spec;
2931 struct i40e_pf *pf = vf->pf;
2932 struct i40e_vsi *vsi = NULL;
2933 struct i40e_mac_filter *f;
2934 struct hlist_node *h;
2935 bool found = false;
2936 int bkt;
2937
2938 if (!tc_filter->action) {
2939 dev_info(&pf->pdev->dev,
2940 "VF %d: Currently ADq doesn't support Drop Action\n",
2941 vf->vf_id);
2942 goto err;
2943 }
2944
2945 /* action_meta is TC number here to which the filter is applied */
2946 if (!tc_filter->action_meta ||
2947 tc_filter->action_meta > I40E_MAX_VF_VSI) {
2948 dev_info(&pf->pdev->dev, "VF %d: Invalid TC number %u\n",
2949 vf->vf_id, tc_filter->action_meta);
2950 goto err;
2951 }
2952
2953 /* Check filter if it's programmed for advanced mode or basic mode.
2954 * There are two ADq modes (for VF only),
2955 * 1. Basic mode: intended to allow as many filter options as possible
2956 * to be added to a VF in Non-trusted mode. Main goal is
2957 * to add filters to its own MAC and VLAN id.
2958 * 2. Advanced mode: is for allowing filters to be applied other than
2959 * its own MAC or VLAN. This mode requires the VF to be
2960 * Trusted.
2961 */
2962 if (mask.dst_mac[0] && !mask.dst_ip[0]) {
2963 vsi = pf->vsi[vf->lan_vsi_idx];
2964 f = i40e_find_mac(vsi, data.dst_mac);
2965
2966 if (!f) {
2967 dev_info(&pf->pdev->dev,
2968 "Destination MAC %pM doesn't belong to VF %d\n",
2969 data.dst_mac, vf->vf_id);
2970 goto err;
2971 }
2972
2973 if (mask.vlan_id) {
2974 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f,
2975 hlist) {
2976 if (f->vlan == ntohs(data.vlan_id)) {
2977 found = true;
2978 break;
2979 }
2980 }
2981 if (!found) {
2982 dev_info(&pf->pdev->dev,
2983 "VF %d doesn't have any VLAN id %u\n",
2984 vf->vf_id, ntohs(data.vlan_id));
2985 goto err;
2986 }
2987 }
2988 } else {
2989 /* Check if VF is trusted */
2990 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2991 dev_err(&pf->pdev->dev,
2992 "VF %d not trusted, make VF trusted to add advanced mode ADq cloud filters\n",
2993 vf->vf_id);
2994 return I40E_ERR_CONFIG;
2995 }
2996 }
2997
2998 if (mask.dst_mac[0] & data.dst_mac[0]) {
2999 if (is_broadcast_ether_addr(data.dst_mac) ||
3000 is_zero_ether_addr(data.dst_mac)) {
3001 dev_info(&pf->pdev->dev, "VF %d: Invalid Dest MAC addr %pM\n",
3002 vf->vf_id, data.dst_mac);
3003 goto err;
3004 }
3005 }
3006
3007 if (mask.src_mac[0] & data.src_mac[0]) {
3008 if (is_broadcast_ether_addr(data.src_mac) ||
3009 is_zero_ether_addr(data.src_mac)) {
3010 dev_info(&pf->pdev->dev, "VF %d: Invalid Source MAC addr %pM\n",
3011 vf->vf_id, data.src_mac);
3012 goto err;
3013 }
3014 }
3015
3016 if (mask.dst_port & data.dst_port) {
3017 if (!data.dst_port || be16_to_cpu(data.dst_port) > 0xFFFF) {
3018 dev_info(&pf->pdev->dev, "VF %d: Invalid Dest port\n",
3019 vf->vf_id);
3020 goto err;
3021 }
3022 }
3023
3024 if (mask.src_port & data.src_port) {
3025 if (!data.src_port || be16_to_cpu(data.src_port) > 0xFFFF) {
3026 dev_info(&pf->pdev->dev, "VF %d: Invalid Source port\n",
3027 vf->vf_id);
3028 goto err;
3029 }
3030 }
3031
3032 if (tc_filter->flow_type != VIRTCHNL_TCP_V6_FLOW &&
3033 tc_filter->flow_type != VIRTCHNL_TCP_V4_FLOW) {
3034 dev_info(&pf->pdev->dev, "VF %d: Invalid Flow type\n",
3035 vf->vf_id);
3036 goto err;
3037 }
3038
3039 if (mask.vlan_id & data.vlan_id) {
3040 if (ntohs(data.vlan_id) > I40E_MAX_VLANID) {
3041 dev_info(&pf->pdev->dev, "VF %d: invalid VLAN ID\n",
3042 vf->vf_id);
3043 goto err;
3044 }
3045 }
3046
3047 return I40E_SUCCESS;
3048err:
3049 return I40E_ERR_CONFIG;
3050}
3051
3052/**
3053 * i40e_find_vsi_from_seid - searches for the vsi with the given seid
3054 * @vf: pointer to the VF info
3055 * @seid - seid of the vsi it is searching for
3056 **/
3057static struct i40e_vsi *i40e_find_vsi_from_seid(struct i40e_vf *vf, u16 seid)
3058{
3059 struct i40e_pf *pf = vf->pf;
3060 struct i40e_vsi *vsi = NULL;
3061 int i;
3062
3063 for (i = 0; i < vf->num_tc ; i++) {
3064 vsi = i40e_find_vsi_from_id(pf, vf->ch[i].vsi_id);
3065 if (vsi->seid == seid)
3066 return vsi;
3067 }
3068 return NULL;
3069}
3070
3071/**
3072 * i40e_del_all_cloud_filters
3073 * @vf: pointer to the VF info
3074 *
3075 * This function deletes all cloud filters
3076 **/
3077static void i40e_del_all_cloud_filters(struct i40e_vf *vf)
3078{
3079 struct i40e_cloud_filter *cfilter = NULL;
3080 struct i40e_pf *pf = vf->pf;
3081 struct i40e_vsi *vsi = NULL;
3082 struct hlist_node *node;
3083 int ret;
3084
3085 hlist_for_each_entry_safe(cfilter, node,
3086 &vf->cloud_filter_list, cloud_node) {
3087 vsi = i40e_find_vsi_from_seid(vf, cfilter->seid);
3088
3089 if (!vsi) {
3090 dev_err(&pf->pdev->dev, "VF %d: no VSI found for matching %u seid, can't delete cloud filter\n",
3091 vf->vf_id, cfilter->seid);
3092 continue;
3093 }
3094
3095 if (cfilter->dst_port)
3096 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
3097 false);
3098 else
3099 ret = i40e_add_del_cloud_filter(vsi, cfilter, false);
3100 if (ret)
3101 dev_err(&pf->pdev->dev,
3102 "VF %d: Failed to delete cloud filter, err %s aq_err %s\n",
3103 vf->vf_id, i40e_stat_str(&pf->hw, ret),
3104 i40e_aq_str(&pf->hw,
3105 pf->hw.aq.asq_last_status));
3106
3107 hlist_del(&cfilter->cloud_node);
3108 kfree(cfilter);
3109 vf->num_cloud_filters--;
3110 }
3111}
3112
3113/**
3114 * i40e_vc_del_cloud_filter
3115 * @vf: pointer to the VF info
3116 * @msg: pointer to the msg buffer
3117 *
3118 * This function deletes a cloud filter programmed as TC filter for ADq
3119 **/
3120static int i40e_vc_del_cloud_filter(struct i40e_vf *vf, u8 *msg)
3121{
3122 struct virtchnl_filter *vcf = (struct virtchnl_filter *)msg;
3123 struct virtchnl_l4_spec mask = vcf->mask.tcp_spec;
3124 struct virtchnl_l4_spec tcf = vcf->data.tcp_spec;
3125 struct i40e_cloud_filter cfilter, *cf = NULL;
3126 struct i40e_pf *pf = vf->pf;
3127 struct i40e_vsi *vsi = NULL;
3128 struct hlist_node *node;
3129 i40e_status aq_ret = 0;
3130 int i, ret;
3131
3132 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3133 aq_ret = I40E_ERR_PARAM;
3134 goto err;
3135 }
3136
3137 if (!vf->adq_enabled) {
3138 dev_info(&pf->pdev->dev,
3139 "VF %d: ADq not enabled, can't apply cloud filter\n",
3140 vf->vf_id);
3141 aq_ret = I40E_ERR_PARAM;
3142 goto err;
3143 }
3144
3145 if (i40e_validate_cloud_filter(vf, vcf)) {
3146 dev_info(&pf->pdev->dev,
3147 "VF %d: Invalid input, can't apply cloud filter\n",
3148 vf->vf_id);
3149 aq_ret = I40E_ERR_PARAM;
3150 goto err;
3151 }
3152
3153 memset(&cfilter, 0, sizeof(cfilter));
3154 /* parse destination mac address */
3155 for (i = 0; i < ETH_ALEN; i++)
3156 cfilter.dst_mac[i] = mask.dst_mac[i] & tcf.dst_mac[i];
3157
3158 /* parse source mac address */
3159 for (i = 0; i < ETH_ALEN; i++)
3160 cfilter.src_mac[i] = mask.src_mac[i] & tcf.src_mac[i];
3161
3162 cfilter.vlan_id = mask.vlan_id & tcf.vlan_id;
3163 cfilter.dst_port = mask.dst_port & tcf.dst_port;
3164 cfilter.src_port = mask.src_port & tcf.src_port;
3165
3166 switch (vcf->flow_type) {
3167 case VIRTCHNL_TCP_V4_FLOW:
3168 cfilter.n_proto = ETH_P_IP;
3169 if (mask.dst_ip[0] & tcf.dst_ip[0])
3170 memcpy(&cfilter.ip.v4.dst_ip, tcf.dst_ip,
3171 ARRAY_SIZE(tcf.dst_ip));
3172 else if (mask.src_ip[0] & tcf.dst_ip[0])
3173 memcpy(&cfilter.ip.v4.src_ip, tcf.src_ip,
3174 ARRAY_SIZE(tcf.dst_ip));
3175 break;
3176 case VIRTCHNL_TCP_V6_FLOW:
3177 cfilter.n_proto = ETH_P_IPV6;
3178 if (mask.dst_ip[3] & tcf.dst_ip[3])
3179 memcpy(&cfilter.ip.v6.dst_ip6, tcf.dst_ip,
3180 sizeof(cfilter.ip.v6.dst_ip6));
3181 if (mask.src_ip[3] & tcf.src_ip[3])
3182 memcpy(&cfilter.ip.v6.src_ip6, tcf.src_ip,
3183 sizeof(cfilter.ip.v6.src_ip6));
3184 break;
3185 default:
3186 /* TC filter can be configured based on different combinations
3187 * and in this case IP is not a part of filter config
3188 */
3189 dev_info(&pf->pdev->dev, "VF %d: Flow type not configured\n",
3190 vf->vf_id);
3191 }
3192
3193 /* get the vsi to which the tc belongs to */
3194 vsi = pf->vsi[vf->ch[vcf->action_meta].vsi_idx];
3195 cfilter.seid = vsi->seid;
3196 cfilter.flags = vcf->field_flags;
3197
3198 /* Deleting TC filter */
3199 if (tcf.dst_port)
3200 ret = i40e_add_del_cloud_filter_big_buf(vsi, &cfilter, false);
3201 else
3202 ret = i40e_add_del_cloud_filter(vsi, &cfilter, false);
3203 if (ret) {
3204 dev_err(&pf->pdev->dev,
3205 "VF %d: Failed to delete cloud filter, err %s aq_err %s\n",
3206 vf->vf_id, i40e_stat_str(&pf->hw, ret),
3207 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
3208 goto err;
3209 }
3210
3211 hlist_for_each_entry_safe(cf, node,
3212 &vf->cloud_filter_list, cloud_node) {
3213 if (cf->seid != cfilter.seid)
3214 continue;
3215 if (mask.dst_port)
3216 if (cfilter.dst_port != cf->dst_port)
3217 continue;
3218 if (mask.dst_mac[0])
3219 if (!ether_addr_equal(cf->src_mac, cfilter.src_mac))
3220 continue;
3221 /* for ipv4 data to be valid, only first byte of mask is set */
3222 if (cfilter.n_proto == ETH_P_IP && mask.dst_ip[0])
3223 if (memcmp(&cfilter.ip.v4.dst_ip, &cf->ip.v4.dst_ip,
3224 ARRAY_SIZE(tcf.dst_ip)))
3225 continue;
3226 /* for ipv6, mask is set for all sixteen bytes (4 words) */
3227 if (cfilter.n_proto == ETH_P_IPV6 && mask.dst_ip[3])
3228 if (memcmp(&cfilter.ip.v6.dst_ip6, &cf->ip.v6.dst_ip6,
3229 sizeof(cfilter.ip.v6.src_ip6)))
3230 continue;
3231 if (mask.vlan_id)
3232 if (cfilter.vlan_id != cf->vlan_id)
3233 continue;
3234
3235 hlist_del(&cf->cloud_node);
3236 kfree(cf);
3237 vf->num_cloud_filters--;
3238 }
3239
3240err:
3241 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_CLOUD_FILTER,
3242 aq_ret);
3243}
3244
3245/**
3246 * i40e_vc_add_cloud_filter
3247 * @vf: pointer to the VF info
3248 * @msg: pointer to the msg buffer
3249 *
3250 * This function adds a cloud filter programmed as TC filter for ADq
3251 **/
3252static int i40e_vc_add_cloud_filter(struct i40e_vf *vf, u8 *msg)
3253{
3254 struct virtchnl_filter *vcf = (struct virtchnl_filter *)msg;
3255 struct virtchnl_l4_spec mask = vcf->mask.tcp_spec;
3256 struct virtchnl_l4_spec tcf = vcf->data.tcp_spec;
3257 struct i40e_cloud_filter *cfilter = NULL;
3258 struct i40e_pf *pf = vf->pf;
3259 struct i40e_vsi *vsi = NULL;
3260 i40e_status aq_ret = 0;
3261 int i, ret;
3262
3263 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3264 aq_ret = I40E_ERR_PARAM;
3265 goto err;
3266 }
3267
3268 if (!vf->adq_enabled) {
3269 dev_info(&pf->pdev->dev,
3270 "VF %d: ADq is not enabled, can't apply cloud filter\n",
3271 vf->vf_id);
3272 aq_ret = I40E_ERR_PARAM;
3273 goto err;
3274 }
3275
3276 if (i40e_validate_cloud_filter(vf, vcf)) {
3277 dev_info(&pf->pdev->dev,
3278 "VF %d: Invalid input/s, can't apply cloud filter\n",
3279 vf->vf_id);
3280 aq_ret = I40E_ERR_PARAM;
3281 goto err;
3282 }
3283
3284 cfilter = kzalloc(sizeof(*cfilter), GFP_KERNEL);
3285 if (!cfilter)
3286 return -ENOMEM;
3287
3288 /* parse destination mac address */
3289 for (i = 0; i < ETH_ALEN; i++)
3290 cfilter->dst_mac[i] = mask.dst_mac[i] & tcf.dst_mac[i];
3291
3292 /* parse source mac address */
3293 for (i = 0; i < ETH_ALEN; i++)
3294 cfilter->src_mac[i] = mask.src_mac[i] & tcf.src_mac[i];
3295
3296 cfilter->vlan_id = mask.vlan_id & tcf.vlan_id;
3297 cfilter->dst_port = mask.dst_port & tcf.dst_port;
3298 cfilter->src_port = mask.src_port & tcf.src_port;
3299
3300 switch (vcf->flow_type) {
3301 case VIRTCHNL_TCP_V4_FLOW:
3302 cfilter->n_proto = ETH_P_IP;
3303 if (mask.dst_ip[0] & tcf.dst_ip[0])
3304 memcpy(&cfilter->ip.v4.dst_ip, tcf.dst_ip,
3305 ARRAY_SIZE(tcf.dst_ip));
3306 else if (mask.src_ip[0] & tcf.dst_ip[0])
3307 memcpy(&cfilter->ip.v4.src_ip, tcf.src_ip,
3308 ARRAY_SIZE(tcf.dst_ip));
3309 break;
3310 case VIRTCHNL_TCP_V6_FLOW:
3311 cfilter->n_proto = ETH_P_IPV6;
3312 if (mask.dst_ip[3] & tcf.dst_ip[3])
3313 memcpy(&cfilter->ip.v6.dst_ip6, tcf.dst_ip,
3314 sizeof(cfilter->ip.v6.dst_ip6));
3315 if (mask.src_ip[3] & tcf.src_ip[3])
3316 memcpy(&cfilter->ip.v6.src_ip6, tcf.src_ip,
3317 sizeof(cfilter->ip.v6.src_ip6));
3318 break;
3319 default:
3320 /* TC filter can be configured based on different combinations
3321 * and in this case IP is not a part of filter config
3322 */
3323 dev_info(&pf->pdev->dev, "VF %d: Flow type not configured\n",
3324 vf->vf_id);
3325 }
3326
3327 /* get the VSI to which the TC belongs to */
3328 vsi = pf->vsi[vf->ch[vcf->action_meta].vsi_idx];
3329 cfilter->seid = vsi->seid;
3330 cfilter->flags = vcf->field_flags;
3331
3332 /* Adding cloud filter programmed as TC filter */
3333 if (tcf.dst_port)
3334 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter, true);
3335 else
3336 ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
3337 if (ret) {
3338 dev_err(&pf->pdev->dev,
3339 "VF %d: Failed to add cloud filter, err %s aq_err %s\n",
3340 vf->vf_id, i40e_stat_str(&pf->hw, ret),
3341 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
3342 goto err;
3343 }
3344
3345 INIT_HLIST_NODE(&cfilter->cloud_node);
3346 hlist_add_head(&cfilter->cloud_node, &vf->cloud_filter_list);
3347 vf->num_cloud_filters++;
3348err:
3349 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_CLOUD_FILTER,
3350 aq_ret);
3351}
3352
c27eac48
AD		 3353/**
3354 * i40e_vc_add_qch_msg: Add queue channel and enable ADq
3355 * @vf: pointer to the VF info
3356 * @msg: pointer to the msg buffer
3357 **/
3358static int i40e_vc_add_qch_msg(struct i40e_vf *vf, u8 *msg)
3359{
3360 struct virtchnl_tc_info *tci =
3361 (struct virtchnl_tc_info *)msg;
3362 struct i40e_pf *pf = vf->pf;
0c483bd4
AD		 3363 struct i40e_link_status *ls = &pf->hw.phy.link_info;
3364 int i, adq_request_qps = 0, speed = 0;
c27eac48
AD		 3365 i40e_status aq_ret = 0;
3366
3367 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3368 aq_ret = I40E_ERR_PARAM;
3369 goto err;
3370 }
3371
3372 /* ADq cannot be applied if spoof check is ON */
3373 if (vf->spoofchk) {
3374 dev_err(&pf->pdev->dev,
3375 "Spoof check is ON, turn it OFF to enable ADq\n");
3376 aq_ret = I40E_ERR_PARAM;
3377 goto err;
3378 }
3379
3380 if (!(vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ADQ)) {
3381 dev_err(&pf->pdev->dev,
3382 "VF %d attempting to enable ADq, but hasn't properly negotiated that capability\n",
3383 vf->vf_id);
3384 aq_ret = I40E_ERR_PARAM;
3385 goto err;
3386 }
3387
3388 /* max number of traffic classes for VF currently capped at 4 */
3389 if (!tci->num_tc || tci->num_tc > I40E_MAX_VF_VSI) {
3390 dev_err(&pf->pdev->dev,
3391 "VF %d trying to set %u TCs, valid range 1-4 TCs per VF\n",
3392 vf->vf_id, tci->num_tc);
3393 aq_ret = I40E_ERR_PARAM;
3394 goto err;
3395 }
3396
3397 /* validate queues for each TC */
3398 for (i = 0; i < tci->num_tc; i++)
3399 if (!tci->list[i].count ||
3400 tci->list[i].count > I40E_DEFAULT_QUEUES_PER_VF) {
3401 dev_err(&pf->pdev->dev,
3402 "VF %d: TC %d trying to set %u queues, valid range 1-4 queues per TC\n",
3403 vf->vf_id, i, tci->list[i].count);
3404 aq_ret = I40E_ERR_PARAM;
3405 goto err;
3406 }
3407
3408 /* need Max VF queues but already have default number of queues */
3409 adq_request_qps = I40E_MAX_VF_QUEUES - I40E_DEFAULT_QUEUES_PER_VF;
3410
3411 if (pf->queues_left < adq_request_qps) {
3412 dev_err(&pf->pdev->dev,
3413 "No queues left to allocate to VF %d\n",
3414 vf->vf_id);
3415 aq_ret = I40E_ERR_PARAM;
3416 goto err;
3417 } else {
3418 /* we need to allocate max VF queues to enable ADq so as to
3419 * make sure ADq enabled VF always gets back queues when it
3420 * goes through a reset.
3421 */
3422 vf->num_queue_pairs = I40E_MAX_VF_QUEUES;
3423 }
3424
0c483bd4
AD		 3425 /* get link speed in MB to validate rate limit */
3426 switch (ls->link_speed) {
3427 case VIRTCHNL_LINK_SPEED_100MB:
3428 speed = SPEED_100;
3429 break;
3430 case VIRTCHNL_LINK_SPEED_1GB:
3431 speed = SPEED_1000;
3432 break;
3433 case VIRTCHNL_LINK_SPEED_10GB:
3434 speed = SPEED_10000;
3435 break;
3436 case VIRTCHNL_LINK_SPEED_20GB:
3437 speed = SPEED_20000;
3438 break;
3439 case VIRTCHNL_LINK_SPEED_25GB:
3440 speed = SPEED_25000;
3441 break;
3442 case VIRTCHNL_LINK_SPEED_40GB:
3443 speed = SPEED_40000;
3444 break;
3445 default:
3446 dev_err(&pf->pdev->dev,
3447 "Cannot detect link speed\n");
3448 aq_ret = I40E_ERR_PARAM;
3449 goto err;
3450 }
3451
c27eac48
AD		 3452 /* parse data from the queue channel info */
3453 vf->num_tc = tci->num_tc;
0c483bd4
AD		 3454 for (i = 0; i < vf->num_tc; i++) {
3455 if (tci->list[i].max_tx_rate) {
3456 if (tci->list[i].max_tx_rate > speed) {
3457 dev_err(&pf->pdev->dev,
3458 "Invalid max tx rate %llu specified for VF %d.",
3459 tci->list[i].max_tx_rate,
3460 vf->vf_id);
3461 aq_ret = I40E_ERR_PARAM;
3462 goto err;
3463 } else {
3464 vf->ch[i].max_tx_rate =
3465 tci->list[i].max_tx_rate;
3466 }
3467 }
c27eac48 3468 vf->ch[i].num_qps = tci->list[i].count;
0c483bd4 3469 }
c27eac48
AD		 3470
3471 /* set this flag only after making sure all inputs are sane */
3472 vf->adq_enabled = true;
e284fc28
AD		 3473 /* num_req_queues is set when user changes number of queues via ethtool
3474 * and this causes issue for default VSI(which depends on this variable)
3475 * when ADq is enabled, hence reset it.
3476 */
3477 vf->num_req_queues = 0;
c27eac48
AD		 3478
3479 /* reset the VF in order to allocate resources */
3480 i40e_vc_notify_vf_reset(vf);
3481 i40e_reset_vf(vf, false);
3482
3483 return I40E_SUCCESS;
3484
3485 /* send the response to the VF */
3486err:
3487 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_CHANNELS,
3488 aq_ret);
3489}
3490
c4998aa3
AD		 3491/**
3492 * i40e_vc_del_qch_msg
3493 * @vf: pointer to the VF info
3494 * @msg: pointer to the msg buffer
3495 **/
3496static int i40e_vc_del_qch_msg(struct i40e_vf *vf, u8 *msg)
3497{
3498 struct i40e_pf *pf = vf->pf;
3499 i40e_status aq_ret = 0;
3500
3501 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3502 aq_ret = I40E_ERR_PARAM;
3503 goto err;
3504 }
3505
3506 if (vf->adq_enabled) {
e284fc28 3507 i40e_del_all_cloud_filters(vf);
c4998aa3
AD		 3508 i40e_del_qch(vf);
3509 vf->adq_enabled = false;
3510 vf->num_tc = 0;
3511 dev_info(&pf->pdev->dev,
e284fc28 3512 "Deleting Queue Channels and cloud filters for ADq on VF %d\n",
c4998aa3
AD		 3513 vf->vf_id);
3514 } else {
3515 dev_info(&pf->pdev->dev, "VF %d trying to delete queue channels but ADq isn't enabled\n",
3516 vf->vf_id);
3517 aq_ret = I40E_ERR_PARAM;
3518 }
3519
3520 /* reset the VF in order to allocate resources */
3521 i40e_vc_notify_vf_reset(vf);
3522 i40e_reset_vf(vf, false);
3523
3524 return I40E_SUCCESS;
3525
3526err:
3527 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_CHANNELS,
3528 aq_ret);
3529}
3530
5c3c48ac
JB		 3531/**
3532 * i40e_vc_process_vf_msg
b40c82e6
JK		 3533 * @pf: pointer to the PF structure
3534 * @vf_id: source VF id
5c3c48ac
JB		 3535 * @msg: pointer to the msg buffer
3536 * @msglen: msg length
3537 * @msghndl: msg handle
3538 *
3539 * called from the common aeq/arq handler to
b40c82e6 3540 * process request from VF
5c3c48ac 3541 **/
a1b5a24f 3542int i40e_vc_process_vf_msg(struct i40e_pf *pf, s16 vf_id, u32 v_opcode,
5c3c48ac
JB		 3543 u32 v_retval, u8 *msg, u16 msglen)
3544{
5c3c48ac 3545 struct i40e_hw *hw = &pf->hw;
a1b5a24f 3546 int local_vf_id = vf_id - (s16)hw->func_caps.vf_base_id;
6c1b5bff 3547 struct i40e_vf *vf;
5c3c48ac
JB		 3548 int ret;
3549
3550 pf->vf_aq_requests++;
7efa84b7 3551 if (local_vf_id >= pf->num_alloc_vfs)
6c1b5bff 3552 return -EINVAL;
7efa84b7 3553 vf = &(pf->vf[local_vf_id]);
260e9382
JB		 3554
3555 /* Check if VF is disabled. */
3556 if (test_bit(I40E_VF_STATE_DISABLED, &vf->vf_states))
3557 return I40E_ERR_PARAM;
3558
5c3c48ac 3559 /* perform basic checks on the msg */
735e35c5 3560 ret = virtchnl_vc_validate_vf_msg(&vf->vf_ver, v_opcode, msg, msglen);
5c3c48ac 3561
260e9382
JB		 3562 /* perform additional checks specific to this driver */
3563 if (v_opcode == VIRTCHNL_OP_CONFIG_RSS_KEY) {
3564 struct virtchnl_rss_key *vrk = (struct virtchnl_rss_key *)msg;
3565
3566 if (vrk->key_len != I40E_HKEY_ARRAY_SIZE)
3567 ret = -EINVAL;
3568 } else if (v_opcode == VIRTCHNL_OP_CONFIG_RSS_LUT) {
3569 struct virtchnl_rss_lut *vrl = (struct virtchnl_rss_lut *)msg;
3570
3571 if (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)
3572 ret = -EINVAL;
3573 }
3574
5c3c48ac 3575 if (ret) {
764430ce 3576 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
b40c82e6 3577 dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n",
7efa84b7 3578 local_vf_id, v_opcode, msglen);
764430ce
JB		 3579 switch (ret) {
3580 case VIRTCHNL_ERR_PARAM:
3581 return -EPERM;
3582 default:
3583 return -EINVAL;
3584 }
5c3c48ac 3585 }
bae3cae4 3586
5c3c48ac 3587 switch (v_opcode) {
310a2ad9 3588 case VIRTCHNL_OP_VERSION:
f4ca1a22 3589 ret = i40e_vc_get_version_msg(vf, msg);
5c3c48ac 3590 break;
310a2ad9 3591 case VIRTCHNL_OP_GET_VF_RESOURCES:
f4ca1a22 3592 ret = i40e_vc_get_vf_resources_msg(vf, msg);
d3d657a9 3593 i40e_vc_notify_vf_link_state(vf);
5c3c48ac 3594 break;
310a2ad9 3595 case VIRTCHNL_OP_RESET_VF:
fc18eaa0
MW		 3596 i40e_vc_reset_vf_msg(vf);
3597 ret = 0;
5c3c48ac 3598 break;
310a2ad9 3599 case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
5c3c48ac
JB		 3600 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen);
3601 break;
310a2ad9 3602 case VIRTCHNL_OP_CONFIG_VSI_QUEUES:
5c3c48ac
JB		 3603 ret = i40e_vc_config_queues_msg(vf, msg, msglen);
3604 break;
310a2ad9 3605 case VIRTCHNL_OP_CONFIG_IRQ_MAP:
5c3c48ac
JB		 3606 ret = i40e_vc_config_irq_map_msg(vf, msg, msglen);
3607 break;
310a2ad9 3608 case VIRTCHNL_OP_ENABLE_QUEUES:
5c3c48ac 3609 ret = i40e_vc_enable_queues_msg(vf, msg, msglen);
055b295d 3610 i40e_vc_notify_vf_link_state(vf);
5c3c48ac 3611 break;
310a2ad9 3612 case VIRTCHNL_OP_DISABLE_QUEUES:
5c3c48ac
JB		 3613 ret = i40e_vc_disable_queues_msg(vf, msg, msglen);
3614 break;
310a2ad9 3615 case VIRTCHNL_OP_ADD_ETH_ADDR:
5c3c48ac
JB		 3616 ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen);
3617 break;
310a2ad9 3618 case VIRTCHNL_OP_DEL_ETH_ADDR:
5c3c48ac
JB		 3619 ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen);
3620 break;
310a2ad9 3621 case VIRTCHNL_OP_ADD_VLAN:
5c3c48ac
JB		 3622 ret = i40e_vc_add_vlan_msg(vf, msg, msglen);
3623 break;
310a2ad9 3624 case VIRTCHNL_OP_DEL_VLAN:
5c3c48ac
JB		 3625 ret = i40e_vc_remove_vlan_msg(vf, msg, msglen);
3626 break;
310a2ad9 3627 case VIRTCHNL_OP_GET_STATS:
5c3c48ac
JB		 3628 ret = i40e_vc_get_stats_msg(vf, msg, msglen);
3629 break;
310a2ad9 3630 case VIRTCHNL_OP_IWARP:
e3219ce6
ASJ		 3631 ret = i40e_vc_iwarp_msg(vf, msg, msglen);
3632 break;
310a2ad9 3633 case VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
e3219ce6
ASJ		 3634 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, true);
3635 break;
310a2ad9 3636 case VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
e3219ce6
ASJ		 3637 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, false);
3638 break;
310a2ad9 3639 case VIRTCHNL_OP_CONFIG_RSS_KEY:
c4e1868c
MW		 3640 ret = i40e_vc_config_rss_key(vf, msg, msglen);
3641 break;
310a2ad9 3642 case VIRTCHNL_OP_CONFIG_RSS_LUT:
c4e1868c
MW		 3643 ret = i40e_vc_config_rss_lut(vf, msg, msglen);
3644 break;
310a2ad9 3645 case VIRTCHNL_OP_GET_RSS_HENA_CAPS:
c4e1868c
MW		 3646 ret = i40e_vc_get_rss_hena(vf, msg, msglen);
3647 break;
310a2ad9 3648 case VIRTCHNL_OP_SET_RSS_HENA:
c4e1868c
MW		 3649 ret = i40e_vc_set_rss_hena(vf, msg, msglen);
3650 break;
8774370d
MS		 3651 case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING:
3652 ret = i40e_vc_enable_vlan_stripping(vf, msg, msglen);
3653 break;
3654 case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING:
3655 ret = i40e_vc_disable_vlan_stripping(vf, msg, msglen);
3656 break;
a3f5aa90
AB		 3657 case VIRTCHNL_OP_REQUEST_QUEUES:
3658 ret = i40e_vc_request_queues_msg(vf, msg, msglen);
3659 break;
c27eac48
AD		 3660 case VIRTCHNL_OP_ENABLE_CHANNELS:
3661 ret = i40e_vc_add_qch_msg(vf, msg);
3662 break;
c4998aa3
AD		 3663 case VIRTCHNL_OP_DISABLE_CHANNELS:
3664 ret = i40e_vc_del_qch_msg(vf, msg);
3665 break;
e284fc28
AD		 3666 case VIRTCHNL_OP_ADD_CLOUD_FILTER:
3667 ret = i40e_vc_add_cloud_filter(vf, msg);
3668 break;
3669 case VIRTCHNL_OP_DEL_CLOUD_FILTER:
3670 ret = i40e_vc_del_cloud_filter(vf, msg);
3671 break;
310a2ad9 3672 case VIRTCHNL_OP_UNKNOWN:
5c3c48ac 3673 default:
b40c82e6 3674 dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n",
7efa84b7 3675 v_opcode, local_vf_id);
5c3c48ac
JB		 3676 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
3677 I40E_ERR_NOT_IMPLEMENTED);
3678 break;
3679 }
3680
3681 return ret;
3682}
3683
3684/**
3685 * i40e_vc_process_vflr_event
b40c82e6 3686 * @pf: pointer to the PF structure
5c3c48ac
JB		 3687 *
3688 * called from the vlfr irq handler to
b40c82e6 3689 * free up VF resources and state variables
5c3c48ac
JB		 3690 **/
3691int i40e_vc_process_vflr_event(struct i40e_pf *pf)
3692{
5c3c48ac 3693 struct i40e_hw *hw = &pf->hw;
a1b5a24f 3694 u32 reg, reg_idx, bit_idx;
5c3c48ac 3695 struct i40e_vf *vf;
a1b5a24f 3696 int vf_id;
5c3c48ac 3697
0da36b97 3698 if (!test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
5c3c48ac
JB		 3699 return 0;
3700
0d790327
MW		 3701 /* Re-enable the VFLR interrupt cause here, before looking for which
3702 * VF got reset. Otherwise, if another VF gets a reset while the
3703 * first one is being processed, that interrupt will be lost, and
3704 * that VF will be stuck in reset forever.
3705 */
c5c2f7c3
MW		 3706 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
3707 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
3708 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
3709 i40e_flush(hw);
3710
0da36b97 3711 clear_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
5c3c48ac
JB		 3712 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
3713 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
3714 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
b40c82e6 3715 /* read GLGEN_VFLRSTAT register to find out the flr VFs */
5c3c48ac
JB		 3716 vf = &pf->vf[vf_id];
3717 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
7369ca87 3718 if (reg & BIT(bit_idx))
7e5a313e 3719 /* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */
7369ca87 3720 i40e_reset_vf(vf, true);
5c3c48ac
JB		 3721 }
3722
5c3c48ac
JB		 3723 return 0;
3724}
3725
5c3c48ac
JB		 3726/**
3727 * i40e_ndo_set_vf_mac
3728 * @netdev: network interface device structure
b40c82e6 3729 * @vf_id: VF identifier
5c3c48ac
JB		 3730 * @mac: mac address
3731 *
b40c82e6 3732 * program VF mac address
5c3c48ac
JB		 3733 **/
3734int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
3735{
3736 struct i40e_netdev_priv *np = netdev_priv(netdev);
3737 struct i40e_vsi *vsi = np->vsi;
3738 struct i40e_pf *pf = vsi->back;
3739 struct i40e_mac_filter *f;
3740 struct i40e_vf *vf;
3741 int ret = 0;
784548c4 3742 struct hlist_node *h;
278e7d0b 3743 int bkt;
5c3c48ac
JB		 3744
3745 /* validate the request */
3746 if (vf_id >= pf->num_alloc_vfs) {
3747 dev_err(&pf->pdev->dev,
3748 "Invalid VF Identifier %d\n", vf_id);
3749 ret = -EINVAL;
3750 goto error_param;
3751 }
3752
3753 vf = &(pf->vf[vf_id]);
fdf0e0bf 3754 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 3755 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3756 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3757 vf_id);
3758 ret = -EAGAIN;
5c3c48ac
JB		 3759 goto error_param;
3760 }
3761
efd8e39a 3762 if (is_multicast_ether_addr(mac)) {
5c3c48ac 3763 dev_err(&pf->pdev->dev,
efd8e39a 3764 "Invalid Ethernet address %pM for VF %d\n", mac, vf_id);
5c3c48ac
JB		 3765 ret = -EINVAL;
3766 goto error_param;
3767 }
3768
21659035 3769 /* Lock once because below invoked function add/del_filter requires
278e7d0b 3770 * mac_filter_hash_lock to be held
21659035 3771 */
278e7d0b 3772 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 3773
5c3c48ac 3774 /* delete the temporary mac address */
efd8e39a 3775 if (!is_zero_ether_addr(vf->default_lan_addr.addr))
9569a9a4 3776 i40e_del_mac_filter(vsi, vf->default_lan_addr.addr);
5c3c48ac 3777
29f71bb0
GR		 3778 /* Delete all the filters for this VSI - we're going to kill it
3779 * anyway.
3780 */
784548c4 3781 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
148141bb 3782 __i40e_del_filter(vsi, f);
5c3c48ac 3783
278e7d0b 3784 spin_unlock_bh(&vsi->mac_filter_hash_lock);
21659035 3785
5c3c48ac 3786 /* program mac filter */
17652c63 3787 if (i40e_sync_vsi_filters(vsi)) {
5c3c48ac
JB		 3788 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
3789 ret = -EIO;
3790 goto error_param;
3791 }
9a173901 3792 ether_addr_copy(vf->default_lan_addr.addr, mac);
2f1d86e4
SA		 3793
3794 if (is_zero_ether_addr(mac)) {
3795 vf->pf_set_mac = false;
3796 dev_info(&pf->pdev->dev, "Removing MAC on VF %d\n", vf_id);
3797 } else {
3798 vf->pf_set_mac = true;
3799 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n",
3800 mac, vf_id);
3801 }
3802
17413a80 3803 /* Force the VF driver stop so it has to reload with new MAC address */
eeeddbb8 3804 i40e_vc_disable_vf(vf);
5c3c48ac 3805 dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n");
5c3c48ac
JB		 3806
3807error_param:
3808 return ret;
3809}
3810
ba4e003d
JK		 3811/**
3812 * i40e_vsi_has_vlans - True if VSI has configured VLANs
3813 * @vsi: pointer to the vsi
3814 *
3815 * Check if a VSI has configured any VLANs. False if we have a port VLAN or if
3816 * we have no configured VLANs. Do not call while holding the
3817 * mac_filter_hash_lock.
3818 */
3819static bool i40e_vsi_has_vlans(struct i40e_vsi *vsi)
3820{
3821 bool have_vlans;
3822
3823 /* If we have a port VLAN, then the VSI cannot have any VLANs
3824 * configured, as all MAC/VLAN filters will be assigned to the PVID.
3825 */
3826 if (vsi->info.pvid)
3827 return false;
3828
3829 /* Since we don't have a PVID, we know that if the device is in VLAN
3830 * mode it must be because of a VLAN filter configured on this VSI.
3831 */
3832 spin_lock_bh(&vsi->mac_filter_hash_lock);
3833 have_vlans = i40e_is_vsi_in_vlan(vsi);
3834 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3835
3836 return have_vlans;
3837}
3838
5c3c48ac
JB		 3839/**
3840 * i40e_ndo_set_vf_port_vlan
3841 * @netdev: network interface device structure
b40c82e6 3842 * @vf_id: VF identifier
5c3c48ac
JB		 3843 * @vlan_id: mac address
3844 * @qos: priority setting
79aab093 3845 * @vlan_proto: vlan protocol
5c3c48ac 3846 *
b40c82e6 3847 * program VF vlan id and/or qos
5c3c48ac 3848 **/
79aab093
MS		 3849int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, int vf_id,
3850 u16 vlan_id, u8 qos, __be16 vlan_proto)
5c3c48ac 3851{
f7fc2f2e 3852 u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT);
5c3c48ac
JB		 3853 struct i40e_netdev_priv *np = netdev_priv(netdev);
3854 struct i40e_pf *pf = np->vsi->back;
3855 struct i40e_vsi *vsi;
3856 struct i40e_vf *vf;
3857 int ret = 0;
3858
3859 /* validate the request */
3860 if (vf_id >= pf->num_alloc_vfs) {
3861 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3862 ret = -EINVAL;
3863 goto error_pvid;
3864 }
3865
3866 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
3867 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
3868 ret = -EINVAL;
3869 goto error_pvid;
3870 }
3871
79aab093
MS		 3872 if (vlan_proto != htons(ETH_P_8021Q)) {
3873 dev_err(&pf->pdev->dev, "VF VLAN protocol is not supported\n");
3874 ret = -EPROTONOSUPPORT;
3875 goto error_pvid;
3876 }
3877
5c3c48ac 3878 vf = &(pf->vf[vf_id]);
fdf0e0bf 3879 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 3880 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3881 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3882 vf_id);
3883 ret = -EAGAIN;
5c3c48ac
JB		 3884 goto error_pvid;
3885 }
3886
f7fc2f2e 3887 if (le16_to_cpu(vsi->info.pvid) == vlanprio)
85927ec1
MW		 3888 /* duplicate request, so just return success */
3889 goto error_pvid;
3890
ba4e003d 3891 if (i40e_vsi_has_vlans(vsi)) {
99a4973c
GR		 3892 dev_err(&pf->pdev->dev,
3893 "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
3894 vf_id);
f9b4b627
GR		 3895 /* Administrator Error - knock the VF offline until he does
3896 * the right thing by reconfiguring his network correctly
3897 * and then reloading the VF driver.
3898 */
eeeddbb8 3899 i40e_vc_disable_vf(vf);
35f3472a
MW		 3900 /* During reset the VF got a new VSI, so refresh the pointer. */
3901 vsi = pf->vsi[vf->lan_vsi_idx];
f9b4b627 3902 }
99a4973c 3903
ba4e003d
JK		 3904 /* Locked once because multiple functions below iterate list */
3905 spin_lock_bh(&vsi->mac_filter_hash_lock);
3906
8d82a7c5
GR		 3907 /* Check for condition where there was already a port VLAN ID
3908 * filter set and now it is being deleted by setting it to zero.
1315f7c3
GR		 3909 * Additionally check for the condition where there was a port
3910 * VLAN but now there is a new and different port VLAN being set.
8d82a7c5
GR		 3911 * Before deleting all the old VLAN filters we must add new ones
3912 * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our
3913 * MAC addresses deleted.
3914 */
1315f7c3 3915 if ((!(vlan_id || qos) ||
f7fc2f2e 3916 vlanprio != le16_to_cpu(vsi->info.pvid)) &&
9af52f60
JK		 3917 vsi->info.pvid) {
3918 ret = i40e_add_vlan_all_mac(vsi, I40E_VLAN_ANY);
3919 if (ret) {
3920 dev_info(&vsi->back->pdev->dev,
3921 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
3922 vsi->back->hw.aq.asq_last_status);
3923 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3924 goto error_pvid;
3925 }
3926 }
8d82a7c5 3927
5c3c48ac 3928 if (vsi->info.pvid) {
9af52f60
JK		 3929 /* remove all filters on the old VLAN */
3930 i40e_rm_vlan_all_mac(vsi, (le16_to_cpu(vsi->info.pvid) &
3931 VLAN_VID_MASK));
5c3c48ac 3932 }
9af52f60 3933
640f93cc 3934 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac 3935 if (vlan_id || qos)
f7fc2f2e 3936 ret = i40e_vsi_add_pvid(vsi, vlanprio);
5c3c48ac 3937 else
6c12fcbf 3938 i40e_vsi_remove_pvid(vsi);
640f93cc 3939 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 3940
3941 if (vlan_id) {
3942 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
3943 vlan_id, qos, vf_id);
3944
9af52f60
JK		 3945 /* add new VLAN filter for each MAC */
3946 ret = i40e_add_vlan_all_mac(vsi, vlan_id);
5c3c48ac
JB		 3947 if (ret) {
3948 dev_info(&vsi->back->pdev->dev,
3949 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
3950 vsi->back->hw.aq.asq_last_status);
9af52f60 3951 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 3952 goto error_pvid;
3953 }
9af52f60
JK		 3954
3955 /* remove the previously added non-VLAN MAC filters */
3956 i40e_rm_vlan_all_mac(vsi, I40E_VLAN_ANY);
5c3c48ac
JB		 3957 }
3958
9af52f60
JK		 3959 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3960
3961 /* Schedule the worker thread to take care of applying changes */
3962 i40e_service_event_schedule(vsi->back);
3963
5c3c48ac
JB		 3964 if (ret) {
3965 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
3966 goto error_pvid;
3967 }
9af52f60 3968
6c12fcbf
GR		 3969 /* The Port VLAN needs to be saved across resets the same as the
3970 * default LAN MAC address.
3971 */
3972 vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
5c3c48ac
JB		 3973 ret = 0;
3974
3975error_pvid:
3976 return ret;
3977}
3978
3979/**
3980 * i40e_ndo_set_vf_bw
3981 * @netdev: network interface device structure
b40c82e6
JK		 3982 * @vf_id: VF identifier
3983 * @tx_rate: Tx rate
5c3c48ac 3984 *
b40c82e6 3985 * configure VF Tx rate
5c3c48ac 3986 **/
ed616689
SC		 3987int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
3988 int max_tx_rate)
5c3c48ac 3989{
6b192891
MW		 3990 struct i40e_netdev_priv *np = netdev_priv(netdev);
3991 struct i40e_pf *pf = np->vsi->back;
3992 struct i40e_vsi *vsi;
3993 struct i40e_vf *vf;
6b192891
MW		 3994 int ret = 0;
3995
3996 /* validate the request */
3997 if (vf_id >= pf->num_alloc_vfs) {
3998 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d.\n", vf_id);
3999 ret = -EINVAL;
4000 goto error;
4001 }
4002
ed616689 4003 if (min_tx_rate) {
b40c82e6 4004 dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n",
ed616689
SC		 4005 min_tx_rate, vf_id);
4006 return -EINVAL;
4007 }
4008
6b192891 4009 vf = &(pf->vf[vf_id]);
fdf0e0bf 4010 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 4011 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4012 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4013 vf_id);
4014 ret = -EAGAIN;
6b192891
MW		 4015 goto error;
4016 }
4017
5ecae412
AN		 4018 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
4019 if (ret)
6b192891 4020 goto error;
dac9b31a 4021
ed616689 4022 vf->tx_rate = max_tx_rate;
6b192891
MW		 4023error:
4024 return ret;
5c3c48ac
JB		 4025}
4026
4027/**
4028 * i40e_ndo_get_vf_config
4029 * @netdev: network interface device structure
b40c82e6
JK		 4030 * @vf_id: VF identifier
4031 * @ivi: VF configuration structure
5c3c48ac 4032 *
b40c82e6 4033 * return VF configuration
5c3c48ac
JB		 4034 **/
4035int i40e_ndo_get_vf_config(struct net_device *netdev,
4036 int vf_id, struct ifla_vf_info *ivi)
4037{
4038 struct i40e_netdev_priv *np = netdev_priv(netdev);
5c3c48ac
JB		 4039 struct i40e_vsi *vsi = np->vsi;
4040 struct i40e_pf *pf = vsi->back;
4041 struct i40e_vf *vf;
4042 int ret = 0;
4043
4044 /* validate the request */
4045 if (vf_id >= pf->num_alloc_vfs) {
4046 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
4047 ret = -EINVAL;
4048 goto error_param;
4049 }
4050
4051 vf = &(pf->vf[vf_id]);
4052 /* first vsi is always the LAN vsi */
fdf0e0bf 4053 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 4054 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4055 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4056 vf_id);
4057 ret = -EAGAIN;
5c3c48ac
JB		 4058 goto error_param;
4059 }
4060
4061 ivi->vf = vf_id;
4062
6995b36c 4063 ether_addr_copy(ivi->mac, vf->default_lan_addr.addr);
5c3c48ac 4064
ed616689
SC		 4065 ivi->max_tx_rate = vf->tx_rate;
4066 ivi->min_tx_rate = 0;
5c3c48ac
JB		 4067 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
4068 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
4069 I40E_VLAN_PRIORITY_SHIFT;
84ca55a0
MW		 4070 if (vf->link_forced == false)
4071 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
4072 else if (vf->link_up == true)
4073 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
4074 else
4075 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
c674d125 4076 ivi->spoofchk = vf->spoofchk;
d40062f3 4077 ivi->trusted = vf->trusted;
5c3c48ac
JB		 4078 ret = 0;
4079
4080error_param:
4081 return ret;
4082}
588aefa0
MW		 4083
4084/**
4085 * i40e_ndo_set_vf_link_state
4086 * @netdev: network interface device structure
b40c82e6 4087 * @vf_id: VF identifier
588aefa0
MW		 4088 * @link: required link state
4089 *
4090 * Set the link state of a specified VF, regardless of physical link state
4091 **/
4092int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
4093{
4094 struct i40e_netdev_priv *np = netdev_priv(netdev);
4095 struct i40e_pf *pf = np->vsi->back;
310a2ad9 4096 struct virtchnl_pf_event pfe;
588aefa0
MW		 4097 struct i40e_hw *hw = &pf->hw;
4098 struct i40e_vf *vf;
f19efbb5 4099 int abs_vf_id;
588aefa0
MW		 4100 int ret = 0;
4101
4102 /* validate the request */
4103 if (vf_id >= pf->num_alloc_vfs) {
4104 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
4105 ret = -EINVAL;
4106 goto error_out;
4107 }
4108
4109 vf = &pf->vf[vf_id];
f19efbb5 4110 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
588aefa0 4111
310a2ad9 4112 pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
ff3f4cc2 4113 pfe.severity = PF_EVENT_SEVERITY_INFO;
588aefa0
MW		 4114
4115 switch (link) {
4116 case IFLA_VF_LINK_STATE_AUTO:
4117 vf->link_forced = false;
4118 pfe.event_data.link_event.link_status =
4119 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
4120 pfe.event_data.link_event.link_speed =
ff3f4cc2 4121 (enum virtchnl_link_speed)
588aefa0
MW		 4122 pf->hw.phy.link_info.link_speed;
4123 break;
4124 case IFLA_VF_LINK_STATE_ENABLE:
4125 vf->link_forced = true;
4126 vf->link_up = true;
4127 pfe.event_data.link_event.link_status = true;
4128 pfe.event_data.link_event.link_speed = I40E_LINK_SPEED_40GB;
4129 break;
4130 case IFLA_VF_LINK_STATE_DISABLE:
4131 vf->link_forced = true;
4132 vf->link_up = false;
4133 pfe.event_data.link_event.link_status = false;
4134 pfe.event_data.link_event.link_speed = 0;
4135 break;
4136 default:
4137 ret = -EINVAL;
4138 goto error_out;
4139 }
4140 /* Notify the VF of its new link state */
310a2ad9 4141 i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
588aefa0
MW		 4142 0, (u8 *)&pfe, sizeof(pfe), NULL);
4143
4144error_out:
4145 return ret;
4146}
c674d125
MW		 4147
4148/**
4149 * i40e_ndo_set_vf_spoofchk
4150 * @netdev: network interface device structure
b40c82e6 4151 * @vf_id: VF identifier
c674d125
MW		 4152 * @enable: flag to enable or disable feature
4153 *
4154 * Enable or disable VF spoof checking
4155 **/
e6d9004d 4156int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable)
c674d125
MW		 4157{
4158 struct i40e_netdev_priv *np = netdev_priv(netdev);
4159 struct i40e_vsi *vsi = np->vsi;
4160 struct i40e_pf *pf = vsi->back;
4161 struct i40e_vsi_context ctxt;
4162 struct i40e_hw *hw = &pf->hw;
4163 struct i40e_vf *vf;
4164 int ret = 0;
4165
4166 /* validate the request */
4167 if (vf_id >= pf->num_alloc_vfs) {
4168 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
4169 ret = -EINVAL;
4170 goto out;
4171 }
4172
4173 vf = &(pf->vf[vf_id]);
6322e63c 4174 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4175 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4176 vf_id);
4177 ret = -EAGAIN;
4178 goto out;
4179 }
c674d125
MW		 4180
4181 if (enable == vf->spoofchk)
4182 goto out;
4183
4184 vf->spoofchk = enable;
4185 memset(&ctxt, 0, sizeof(ctxt));
fdf0e0bf 4186 ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid;
c674d125
MW		 4187 ctxt.pf_num = pf->hw.pf_id;
4188 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
4189 if (enable)
30d71af5
GR		 4190 ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
4191 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
c674d125
MW		 4192 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
4193 if (ret) {
4194 dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
4195 ret);
4196 ret = -EIO;
4197 }
4198out:
4199 return ret;
4200}
c3bbbd20
ASJ		 4201
4202/**
4203 * i40e_ndo_set_vf_trust
4204 * @netdev: network interface device structure of the pf
4205 * @vf_id: VF identifier
4206 * @setting: trust setting
4207 *
4208 * Enable or disable VF trust setting
4209 **/
4210int i40e_ndo_set_vf_trust(struct net_device *netdev, int vf_id, bool setting)
4211{
4212 struct i40e_netdev_priv *np = netdev_priv(netdev);
4213 struct i40e_pf *pf = np->vsi->back;
4214 struct i40e_vf *vf;
4215 int ret = 0;
4216
4217 /* validate the request */
4218 if (vf_id >= pf->num_alloc_vfs) {
4219 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
4220 return -EINVAL;
4221 }
4222
4223 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4224 dev_err(&pf->pdev->dev, "Trusted VF not supported in MFP mode.\n");
4225 return -EINVAL;
4226 }
4227
4228 vf = &pf->vf[vf_id];
4229
c3bbbd20
ASJ		 4230 if (setting == vf->trusted)
4231 goto out;
4232
4233 vf->trusted = setting;
f18d2021 4234 i40e_vc_disable_vf(vf);
c3bbbd20
ASJ		 4235 dev_info(&pf->pdev->dev, "VF %u is now %strusted\n",
4236 vf_id, setting ? "" : "un");
e284fc28
AD		 4237
4238 if (vf->adq_enabled) {
4239 if (!vf->trusted) {
4240 dev_info(&pf->pdev->dev,
4241 "VF %u no longer Trusted, deleting all cloud filters\n",
4242 vf_id);
4243 i40e_del_all_cloud_filters(vf);
4244 }
4245 }
4246
c3bbbd20
ASJ		 4247out:
4248 return ret;
4249}
Linux 6.x block layer and io_uring tree(s)