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5c3c48ac JB |
1 | /******************************************************************************* |
2 | * | |
3 | * Intel Ethernet Controller XL710 Family Linux Driver | |
40d72a50 | 4 | * Copyright(c) 2013 - 2016 Intel Corporation. |
5c3c48ac JB |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
dc641b73 GR |
15 | * You should have received a copy of the GNU General Public License along |
16 | * with this program. If not, see <http://www.gnu.org/licenses/>. | |
5c3c48ac JB |
17 | * |
18 | * The full GNU General Public License is included in this distribution in | |
19 | * the file called "COPYING". | |
20 | * | |
21 | * Contact Information: | |
22 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
24 | * | |
25 | ******************************************************************************/ | |
26 | ||
27 | #include "i40e.h" | |
28 | ||
532b0455 MW |
29 | /*********************notification routines***********************/ |
30 | ||
31 | /** | |
32 | * i40e_vc_vf_broadcast | |
33 | * @pf: pointer to the PF structure | |
34 | * @opcode: operation code | |
35 | * @retval: return value | |
36 | * @msg: pointer to the msg buffer | |
37 | * @msglen: msg length | |
38 | * | |
39 | * send a message to all VFs on a given PF | |
40 | **/ | |
41 | static void i40e_vc_vf_broadcast(struct i40e_pf *pf, | |
42 | enum i40e_virtchnl_ops v_opcode, | |
43 | i40e_status v_retval, u8 *msg, | |
44 | u16 msglen) | |
45 | { | |
46 | struct i40e_hw *hw = &pf->hw; | |
47 | struct i40e_vf *vf = pf->vf; | |
48 | int i; | |
49 | ||
50 | for (i = 0; i < pf->num_alloc_vfs; i++, vf++) { | |
a1b5a24f | 51 | int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id; |
532b0455 MW |
52 | /* Not all vfs are enabled so skip the ones that are not */ |
53 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) && | |
54 | !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) | |
55 | continue; | |
56 | ||
57 | /* Ignore return value on purpose - a given VF may fail, but | |
58 | * we need to keep going and send to all of them | |
59 | */ | |
60 | i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval, | |
61 | msg, msglen, NULL); | |
62 | } | |
63 | } | |
64 | ||
65 | /** | |
55f7d723 | 66 | * i40e_vc_notify_vf_link_state |
532b0455 MW |
67 | * @vf: pointer to the VF structure |
68 | * | |
69 | * send a link status message to a single VF | |
70 | **/ | |
71 | static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf) | |
72 | { | |
73 | struct i40e_virtchnl_pf_event pfe; | |
74 | struct i40e_pf *pf = vf->pf; | |
75 | struct i40e_hw *hw = &pf->hw; | |
76 | struct i40e_link_status *ls = &pf->hw.phy.link_info; | |
a1b5a24f | 77 | int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id; |
532b0455 MW |
78 | |
79 | pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE; | |
80 | pfe.severity = I40E_PF_EVENT_SEVERITY_INFO; | |
81 | if (vf->link_forced) { | |
82 | pfe.event_data.link_event.link_status = vf->link_up; | |
83 | pfe.event_data.link_event.link_speed = | |
84 | (vf->link_up ? I40E_LINK_SPEED_40GB : 0); | |
85 | } else { | |
86 | pfe.event_data.link_event.link_status = | |
87 | ls->link_info & I40E_AQ_LINK_UP; | |
88 | pfe.event_data.link_event.link_speed = ls->link_speed; | |
89 | } | |
90 | i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT, | |
91 | 0, (u8 *)&pfe, sizeof(pfe), NULL); | |
92 | } | |
93 | ||
94 | /** | |
95 | * i40e_vc_notify_link_state | |
96 | * @pf: pointer to the PF structure | |
97 | * | |
98 | * send a link status message to all VFs on a given PF | |
99 | **/ | |
100 | void i40e_vc_notify_link_state(struct i40e_pf *pf) | |
101 | { | |
102 | int i; | |
103 | ||
104 | for (i = 0; i < pf->num_alloc_vfs; i++) | |
105 | i40e_vc_notify_vf_link_state(&pf->vf[i]); | |
106 | } | |
107 | ||
108 | /** | |
109 | * i40e_vc_notify_reset | |
110 | * @pf: pointer to the PF structure | |
111 | * | |
112 | * indicate a pending reset to all VFs on a given PF | |
113 | **/ | |
114 | void i40e_vc_notify_reset(struct i40e_pf *pf) | |
115 | { | |
116 | struct i40e_virtchnl_pf_event pfe; | |
117 | ||
118 | pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING; | |
119 | pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM; | |
120 | i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, 0, | |
121 | (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event)); | |
122 | } | |
123 | ||
124 | /** | |
125 | * i40e_vc_notify_vf_reset | |
126 | * @vf: pointer to the VF structure | |
127 | * | |
128 | * indicate a pending reset to the given VF | |
129 | **/ | |
130 | void i40e_vc_notify_vf_reset(struct i40e_vf *vf) | |
131 | { | |
132 | struct i40e_virtchnl_pf_event pfe; | |
133 | int abs_vf_id; | |
134 | ||
135 | /* validate the request */ | |
136 | if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs) | |
137 | return; | |
138 | ||
139 | /* verify if the VF is in either init or active before proceeding */ | |
140 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) && | |
141 | !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) | |
142 | return; | |
143 | ||
a1b5a24f | 144 | abs_vf_id = vf->vf_id + (int)vf->pf->hw.func_caps.vf_base_id; |
532b0455 MW |
145 | |
146 | pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING; | |
147 | pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM; | |
148 | i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT, | |
149 | 0, (u8 *)&pfe, | |
150 | sizeof(struct i40e_virtchnl_pf_event), NULL); | |
151 | } | |
5c3c48ac JB |
152 | /***********************misc routines*****************************/ |
153 | ||
f9b4b627 GR |
154 | /** |
155 | * i40e_vc_disable_vf | |
b40c82e6 JK |
156 | * @pf: pointer to the PF info |
157 | * @vf: pointer to the VF info | |
f9b4b627 GR |
158 | * |
159 | * Disable the VF through a SW reset | |
160 | **/ | |
161 | static inline void i40e_vc_disable_vf(struct i40e_pf *pf, struct i40e_vf *vf) | |
162 | { | |
54f455ee MW |
163 | i40e_vc_notify_vf_reset(vf); |
164 | i40e_reset_vf(vf, false); | |
f9b4b627 GR |
165 | } |
166 | ||
5c3c48ac JB |
167 | /** |
168 | * i40e_vc_isvalid_vsi_id | |
b40c82e6 JK |
169 | * @vf: pointer to the VF info |
170 | * @vsi_id: VF relative VSI id | |
5c3c48ac | 171 | * |
b40c82e6 | 172 | * check for the valid VSI id |
5c3c48ac | 173 | **/ |
fdf0e0bf | 174 | static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id) |
5c3c48ac JB |
175 | { |
176 | struct i40e_pf *pf = vf->pf; | |
fdf0e0bf | 177 | struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id); |
5c3c48ac | 178 | |
fdf0e0bf | 179 | return (vsi && (vsi->vf_id == vf->vf_id)); |
5c3c48ac JB |
180 | } |
181 | ||
182 | /** | |
183 | * i40e_vc_isvalid_queue_id | |
b40c82e6 | 184 | * @vf: pointer to the VF info |
5c3c48ac JB |
185 | * @vsi_id: vsi id |
186 | * @qid: vsi relative queue id | |
187 | * | |
188 | * check for the valid queue id | |
189 | **/ | |
fdf0e0bf | 190 | static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id, |
5c3c48ac JB |
191 | u8 qid) |
192 | { | |
193 | struct i40e_pf *pf = vf->pf; | |
fdf0e0bf | 194 | struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id); |
5c3c48ac | 195 | |
fdf0e0bf | 196 | return (vsi && (qid < vsi->alloc_queue_pairs)); |
5c3c48ac JB |
197 | } |
198 | ||
199 | /** | |
200 | * i40e_vc_isvalid_vector_id | |
b40c82e6 JK |
201 | * @vf: pointer to the VF info |
202 | * @vector_id: VF relative vector id | |
5c3c48ac JB |
203 | * |
204 | * check for the valid vector id | |
205 | **/ | |
206 | static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id) | |
207 | { | |
208 | struct i40e_pf *pf = vf->pf; | |
209 | ||
9347eb77 | 210 | return vector_id < pf->hw.func_caps.num_msix_vectors_vf; |
5c3c48ac JB |
211 | } |
212 | ||
213 | /***********************vf resource mgmt routines*****************/ | |
214 | ||
215 | /** | |
216 | * i40e_vc_get_pf_queue_id | |
b40c82e6 | 217 | * @vf: pointer to the VF info |
fdf0e0bf | 218 | * @vsi_id: id of VSI as provided by the FW |
5c3c48ac JB |
219 | * @vsi_queue_id: vsi relative queue id |
220 | * | |
b40c82e6 | 221 | * return PF relative queue id |
5c3c48ac | 222 | **/ |
fdf0e0bf | 223 | static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id, |
5c3c48ac JB |
224 | u8 vsi_queue_id) |
225 | { | |
226 | struct i40e_pf *pf = vf->pf; | |
fdf0e0bf | 227 | struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id); |
5c3c48ac JB |
228 | u16 pf_queue_id = I40E_QUEUE_END_OF_LIST; |
229 | ||
fdf0e0bf ASJ |
230 | if (!vsi) |
231 | return pf_queue_id; | |
232 | ||
5c3c48ac JB |
233 | if (le16_to_cpu(vsi->info.mapping_flags) & |
234 | I40E_AQ_VSI_QUE_MAP_NONCONTIG) | |
235 | pf_queue_id = | |
236 | le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]); | |
237 | else | |
238 | pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) + | |
239 | vsi_queue_id; | |
240 | ||
241 | return pf_queue_id; | |
242 | } | |
243 | ||
5c3c48ac JB |
244 | /** |
245 | * i40e_config_irq_link_list | |
b40c82e6 | 246 | * @vf: pointer to the VF info |
fdf0e0bf | 247 | * @vsi_id: id of VSI as given by the FW |
5c3c48ac JB |
248 | * @vecmap: irq map info |
249 | * | |
250 | * configure irq link list from the map | |
251 | **/ | |
fdf0e0bf | 252 | static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id, |
5c3c48ac JB |
253 | struct i40e_virtchnl_vector_map *vecmap) |
254 | { | |
255 | unsigned long linklistmap = 0, tempmap; | |
256 | struct i40e_pf *pf = vf->pf; | |
257 | struct i40e_hw *hw = &pf->hw; | |
258 | u16 vsi_queue_id, pf_queue_id; | |
259 | enum i40e_queue_type qtype; | |
260 | u16 next_q, vector_id; | |
261 | u32 reg, reg_idx; | |
262 | u16 itr_idx = 0; | |
263 | ||
264 | vector_id = vecmap->vector_id; | |
265 | /* setup the head */ | |
266 | if (0 == vector_id) | |
267 | reg_idx = I40E_VPINT_LNKLST0(vf->vf_id); | |
268 | else | |
269 | reg_idx = I40E_VPINT_LNKLSTN( | |
9347eb77 MW |
270 | ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) + |
271 | (vector_id - 1)); | |
5c3c48ac JB |
272 | |
273 | if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) { | |
274 | /* Special case - No queues mapped on this vector */ | |
275 | wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK); | |
276 | goto irq_list_done; | |
277 | } | |
278 | tempmap = vecmap->rxq_map; | |
4836650b | 279 | for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) { |
41a1d04b JB |
280 | linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES * |
281 | vsi_queue_id)); | |
5c3c48ac JB |
282 | } |
283 | ||
284 | tempmap = vecmap->txq_map; | |
4836650b | 285 | for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) { |
41a1d04b JB |
286 | linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES * |
287 | vsi_queue_id + 1)); | |
5c3c48ac JB |
288 | } |
289 | ||
290 | next_q = find_first_bit(&linklistmap, | |
291 | (I40E_MAX_VSI_QP * | |
292 | I40E_VIRTCHNL_SUPPORTED_QTYPES)); | |
b82bc49e MW |
293 | vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES; |
294 | qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES; | |
fdf0e0bf | 295 | pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id); |
5c3c48ac JB |
296 | reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id); |
297 | ||
298 | wr32(hw, reg_idx, reg); | |
299 | ||
300 | while (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) { | |
301 | switch (qtype) { | |
302 | case I40E_QUEUE_TYPE_RX: | |
303 | reg_idx = I40E_QINT_RQCTL(pf_queue_id); | |
304 | itr_idx = vecmap->rxitr_idx; | |
305 | break; | |
306 | case I40E_QUEUE_TYPE_TX: | |
307 | reg_idx = I40E_QINT_TQCTL(pf_queue_id); | |
308 | itr_idx = vecmap->txitr_idx; | |
309 | break; | |
310 | default: | |
311 | break; | |
312 | } | |
313 | ||
314 | next_q = find_next_bit(&linklistmap, | |
315 | (I40E_MAX_VSI_QP * | |
316 | I40E_VIRTCHNL_SUPPORTED_QTYPES), | |
317 | next_q + 1); | |
829af3ac MW |
318 | if (next_q < |
319 | (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) { | |
5c3c48ac JB |
320 | vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES; |
321 | qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES; | |
fdf0e0bf | 322 | pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, |
5c3c48ac JB |
323 | vsi_queue_id); |
324 | } else { | |
325 | pf_queue_id = I40E_QUEUE_END_OF_LIST; | |
326 | qtype = 0; | |
327 | } | |
328 | ||
329 | /* format for the RQCTL & TQCTL regs is same */ | |
330 | reg = (vector_id) | | |
331 | (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) | | |
332 | (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) | | |
41a1d04b | 333 | BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) | |
5c3c48ac JB |
334 | (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT); |
335 | wr32(hw, reg_idx, reg); | |
336 | } | |
337 | ||
b8262a6d ASJ |
338 | /* if the vf is running in polling mode and using interrupt zero, |
339 | * need to disable auto-mask on enabling zero interrupt for VFs. | |
340 | */ | |
341 | if ((vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) && | |
342 | (vector_id == 0)) { | |
343 | reg = rd32(hw, I40E_GLINT_CTL); | |
344 | if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) { | |
345 | reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK; | |
346 | wr32(hw, I40E_GLINT_CTL, reg); | |
347 | } | |
348 | } | |
349 | ||
5c3c48ac JB |
350 | irq_list_done: |
351 | i40e_flush(hw); | |
352 | } | |
353 | ||
e3219ce6 ASJ |
354 | /** |
355 | * i40e_release_iwarp_qvlist | |
356 | * @vf: pointer to the VF. | |
357 | * | |
358 | **/ | |
359 | static void i40e_release_iwarp_qvlist(struct i40e_vf *vf) | |
360 | { | |
361 | struct i40e_pf *pf = vf->pf; | |
362 | struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info = vf->qvlist_info; | |
363 | u32 msix_vf; | |
364 | u32 i; | |
365 | ||
366 | if (!vf->qvlist_info) | |
367 | return; | |
368 | ||
369 | msix_vf = pf->hw.func_caps.num_msix_vectors_vf; | |
370 | for (i = 0; i < qvlist_info->num_vectors; i++) { | |
371 | struct i40e_virtchnl_iwarp_qv_info *qv_info; | |
372 | u32 next_q_index, next_q_type; | |
373 | struct i40e_hw *hw = &pf->hw; | |
374 | u32 v_idx, reg_idx, reg; | |
375 | ||
376 | qv_info = &qvlist_info->qv_info[i]; | |
377 | if (!qv_info) | |
378 | continue; | |
379 | v_idx = qv_info->v_idx; | |
380 | if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) { | |
381 | /* Figure out the queue after CEQ and make that the | |
382 | * first queue. | |
383 | */ | |
384 | reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx; | |
385 | reg = rd32(hw, I40E_VPINT_CEQCTL(reg_idx)); | |
386 | next_q_index = (reg & I40E_VPINT_CEQCTL_NEXTQ_INDX_MASK) | |
387 | >> I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT; | |
388 | next_q_type = (reg & I40E_VPINT_CEQCTL_NEXTQ_TYPE_MASK) | |
389 | >> I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT; | |
390 | ||
391 | reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1); | |
392 | reg = (next_q_index & | |
393 | I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) | | |
394 | (next_q_type << | |
395 | I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT); | |
396 | ||
397 | wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg); | |
398 | } | |
399 | } | |
400 | kfree(vf->qvlist_info); | |
401 | vf->qvlist_info = NULL; | |
402 | } | |
403 | ||
404 | /** | |
405 | * i40e_config_iwarp_qvlist | |
406 | * @vf: pointer to the VF info | |
407 | * @qvlist_info: queue and vector list | |
408 | * | |
409 | * Return 0 on success or < 0 on error | |
410 | **/ | |
411 | static int i40e_config_iwarp_qvlist(struct i40e_vf *vf, | |
412 | struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info) | |
413 | { | |
414 | struct i40e_pf *pf = vf->pf; | |
415 | struct i40e_hw *hw = &pf->hw; | |
416 | struct i40e_virtchnl_iwarp_qv_info *qv_info; | |
417 | u32 v_idx, i, reg_idx, reg; | |
418 | u32 next_q_idx, next_q_type; | |
419 | u32 msix_vf, size; | |
420 | ||
421 | size = sizeof(struct i40e_virtchnl_iwarp_qvlist_info) + | |
422 | (sizeof(struct i40e_virtchnl_iwarp_qv_info) * | |
423 | (qvlist_info->num_vectors - 1)); | |
424 | vf->qvlist_info = kzalloc(size, GFP_KERNEL); | |
425 | vf->qvlist_info->num_vectors = qvlist_info->num_vectors; | |
426 | ||
427 | msix_vf = pf->hw.func_caps.num_msix_vectors_vf; | |
428 | for (i = 0; i < qvlist_info->num_vectors; i++) { | |
429 | qv_info = &qvlist_info->qv_info[i]; | |
430 | if (!qv_info) | |
431 | continue; | |
432 | v_idx = qv_info->v_idx; | |
433 | ||
434 | /* Validate vector id belongs to this vf */ | |
435 | if (!i40e_vc_isvalid_vector_id(vf, v_idx)) | |
436 | goto err; | |
437 | ||
438 | vf->qvlist_info->qv_info[i] = *qv_info; | |
439 | ||
440 | reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1); | |
441 | /* We might be sharing the interrupt, so get the first queue | |
442 | * index and type, push it down the list by adding the new | |
443 | * queue on top. Also link it with the new queue in CEQCTL. | |
444 | */ | |
445 | reg = rd32(hw, I40E_VPINT_LNKLSTN(reg_idx)); | |
446 | next_q_idx = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) >> | |
447 | I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT); | |
448 | next_q_type = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK) >> | |
449 | I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT); | |
450 | ||
451 | if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) { | |
452 | reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx; | |
453 | reg = (I40E_VPINT_CEQCTL_CAUSE_ENA_MASK | | |
454 | (v_idx << I40E_VPINT_CEQCTL_MSIX_INDX_SHIFT) | | |
455 | (qv_info->itr_idx << I40E_VPINT_CEQCTL_ITR_INDX_SHIFT) | | |
456 | (next_q_type << I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT) | | |
457 | (next_q_idx << I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT)); | |
458 | wr32(hw, I40E_VPINT_CEQCTL(reg_idx), reg); | |
459 | ||
460 | reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1); | |
461 | reg = (qv_info->ceq_idx & | |
462 | I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) | | |
463 | (I40E_QUEUE_TYPE_PE_CEQ << | |
464 | I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT); | |
465 | wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg); | |
466 | } | |
467 | ||
468 | if (qv_info->aeq_idx != I40E_QUEUE_INVALID_IDX) { | |
469 | reg = (I40E_VPINT_AEQCTL_CAUSE_ENA_MASK | | |
470 | (v_idx << I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT) | | |
471 | (qv_info->itr_idx << I40E_VPINT_AEQCTL_ITR_INDX_SHIFT)); | |
472 | ||
473 | wr32(hw, I40E_VPINT_AEQCTL(vf->vf_id), reg); | |
474 | } | |
475 | } | |
476 | ||
477 | return 0; | |
478 | err: | |
479 | kfree(vf->qvlist_info); | |
480 | vf->qvlist_info = NULL; | |
481 | return -EINVAL; | |
482 | } | |
483 | ||
5c3c48ac JB |
484 | /** |
485 | * i40e_config_vsi_tx_queue | |
b40c82e6 | 486 | * @vf: pointer to the VF info |
fdf0e0bf | 487 | * @vsi_id: id of VSI as provided by the FW |
5c3c48ac JB |
488 | * @vsi_queue_id: vsi relative queue index |
489 | * @info: config. info | |
490 | * | |
491 | * configure tx queue | |
492 | **/ | |
fdf0e0bf | 493 | static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id, |
5c3c48ac JB |
494 | u16 vsi_queue_id, |
495 | struct i40e_virtchnl_txq_info *info) | |
496 | { | |
497 | struct i40e_pf *pf = vf->pf; | |
498 | struct i40e_hw *hw = &pf->hw; | |
499 | struct i40e_hmc_obj_txq tx_ctx; | |
fdf0e0bf | 500 | struct i40e_vsi *vsi; |
5c3c48ac JB |
501 | u16 pf_queue_id; |
502 | u32 qtx_ctl; | |
503 | int ret = 0; | |
504 | ||
fdf0e0bf ASJ |
505 | pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id); |
506 | vsi = i40e_find_vsi_from_id(pf, vsi_id); | |
5c3c48ac JB |
507 | |
508 | /* clear the context structure first */ | |
509 | memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq)); | |
510 | ||
511 | /* only set the required fields */ | |
512 | tx_ctx.base = info->dma_ring_addr / 128; | |
513 | tx_ctx.qlen = info->ring_len; | |
fdf0e0bf | 514 | tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]); |
5c3c48ac | 515 | tx_ctx.rdylist_act = 0; |
5d29896a AS |
516 | tx_ctx.head_wb_ena = info->headwb_enabled; |
517 | tx_ctx.head_wb_addr = info->dma_headwb_addr; | |
5c3c48ac JB |
518 | |
519 | /* clear the context in the HMC */ | |
520 | ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id); | |
521 | if (ret) { | |
522 | dev_err(&pf->pdev->dev, | |
523 | "Failed to clear VF LAN Tx queue context %d, error: %d\n", | |
524 | pf_queue_id, ret); | |
525 | ret = -ENOENT; | |
526 | goto error_context; | |
527 | } | |
528 | ||
529 | /* set the context in the HMC */ | |
530 | ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx); | |
531 | if (ret) { | |
532 | dev_err(&pf->pdev->dev, | |
533 | "Failed to set VF LAN Tx queue context %d error: %d\n", | |
534 | pf_queue_id, ret); | |
535 | ret = -ENOENT; | |
536 | goto error_context; | |
537 | } | |
538 | ||
539 | /* associate this queue with the PCI VF function */ | |
540 | qtx_ctl = I40E_QTX_CTL_VF_QUEUE; | |
13fd9774 | 541 | qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) |
5c3c48ac JB |
542 | & I40E_QTX_CTL_PF_INDX_MASK); |
543 | qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id) | |
544 | << I40E_QTX_CTL_VFVM_INDX_SHIFT) | |
545 | & I40E_QTX_CTL_VFVM_INDX_MASK); | |
546 | wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl); | |
547 | i40e_flush(hw); | |
548 | ||
549 | error_context: | |
550 | return ret; | |
551 | } | |
552 | ||
553 | /** | |
554 | * i40e_config_vsi_rx_queue | |
b40c82e6 | 555 | * @vf: pointer to the VF info |
fdf0e0bf | 556 | * @vsi_id: id of VSI as provided by the FW |
5c3c48ac JB |
557 | * @vsi_queue_id: vsi relative queue index |
558 | * @info: config. info | |
559 | * | |
560 | * configure rx queue | |
561 | **/ | |
fdf0e0bf | 562 | static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id, |
5c3c48ac JB |
563 | u16 vsi_queue_id, |
564 | struct i40e_virtchnl_rxq_info *info) | |
565 | { | |
566 | struct i40e_pf *pf = vf->pf; | |
567 | struct i40e_hw *hw = &pf->hw; | |
568 | struct i40e_hmc_obj_rxq rx_ctx; | |
569 | u16 pf_queue_id; | |
570 | int ret = 0; | |
571 | ||
fdf0e0bf | 572 | pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id); |
5c3c48ac JB |
573 | |
574 | /* clear the context structure first */ | |
575 | memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq)); | |
576 | ||
577 | /* only set the required fields */ | |
578 | rx_ctx.base = info->dma_ring_addr / 128; | |
579 | rx_ctx.qlen = info->ring_len; | |
580 | ||
581 | if (info->splithdr_enabled) { | |
582 | rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 | | |
583 | I40E_RX_SPLIT_IP | | |
584 | I40E_RX_SPLIT_TCP_UDP | | |
585 | I40E_RX_SPLIT_SCTP; | |
586 | /* header length validation */ | |
587 | if (info->hdr_size > ((2 * 1024) - 64)) { | |
588 | ret = -EINVAL; | |
589 | goto error_param; | |
590 | } | |
591 | rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT; | |
592 | ||
19b85e67 | 593 | /* set split mode 10b */ |
d6b3bca1 | 594 | rx_ctx.dtype = I40E_RX_DTYPE_HEADER_SPLIT; |
5c3c48ac JB |
595 | } |
596 | ||
597 | /* databuffer length validation */ | |
598 | if (info->databuffer_size > ((16 * 1024) - 128)) { | |
599 | ret = -EINVAL; | |
600 | goto error_param; | |
601 | } | |
602 | rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT; | |
603 | ||
604 | /* max pkt. length validation */ | |
605 | if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) { | |
606 | ret = -EINVAL; | |
607 | goto error_param; | |
608 | } | |
609 | rx_ctx.rxmax = info->max_pkt_size; | |
610 | ||
611 | /* enable 32bytes desc always */ | |
612 | rx_ctx.dsize = 1; | |
613 | ||
614 | /* default values */ | |
5c3c48ac JB |
615 | rx_ctx.lrxqthresh = 2; |
616 | rx_ctx.crcstrip = 1; | |
50d41659 | 617 | rx_ctx.prefena = 1; |
c1d11cef | 618 | rx_ctx.l2tsel = 1; |
5c3c48ac JB |
619 | |
620 | /* clear the context in the HMC */ | |
621 | ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id); | |
622 | if (ret) { | |
623 | dev_err(&pf->pdev->dev, | |
624 | "Failed to clear VF LAN Rx queue context %d, error: %d\n", | |
625 | pf_queue_id, ret); | |
626 | ret = -ENOENT; | |
627 | goto error_param; | |
628 | } | |
629 | ||
630 | /* set the context in the HMC */ | |
631 | ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx); | |
632 | if (ret) { | |
633 | dev_err(&pf->pdev->dev, | |
634 | "Failed to set VF LAN Rx queue context %d error: %d\n", | |
635 | pf_queue_id, ret); | |
636 | ret = -ENOENT; | |
637 | goto error_param; | |
638 | } | |
639 | ||
640 | error_param: | |
641 | return ret; | |
642 | } | |
643 | ||
644 | /** | |
645 | * i40e_alloc_vsi_res | |
b40c82e6 | 646 | * @vf: pointer to the VF info |
5c3c48ac JB |
647 | * @type: type of VSI to allocate |
648 | * | |
b40c82e6 | 649 | * alloc VF vsi context & resources |
5c3c48ac JB |
650 | **/ |
651 | static int i40e_alloc_vsi_res(struct i40e_vf *vf, enum i40e_vsi_type type) | |
652 | { | |
653 | struct i40e_mac_filter *f = NULL; | |
654 | struct i40e_pf *pf = vf->pf; | |
5c3c48ac JB |
655 | struct i40e_vsi *vsi; |
656 | int ret = 0; | |
657 | ||
658 | vsi = i40e_vsi_setup(pf, type, pf->vsi[pf->lan_vsi]->seid, vf->vf_id); | |
659 | ||
660 | if (!vsi) { | |
661 | dev_err(&pf->pdev->dev, | |
b40c82e6 | 662 | "add vsi failed for VF %d, aq_err %d\n", |
5c3c48ac JB |
663 | vf->vf_id, pf->hw.aq.asq_last_status); |
664 | ret = -ENOENT; | |
665 | goto error_alloc_vsi_res; | |
666 | } | |
667 | if (type == I40E_VSI_SRIOV) { | |
bb360717 MW |
668 | u64 hena = i40e_pf_get_default_rss_hena(pf); |
669 | ||
fdf0e0bf | 670 | vf->lan_vsi_idx = vsi->idx; |
5c3c48ac | 671 | vf->lan_vsi_id = vsi->id; |
6c12fcbf GR |
672 | /* If the port VLAN has been configured and then the |
673 | * VF driver was removed then the VSI port VLAN | |
674 | * configuration was destroyed. Check if there is | |
675 | * a port VLAN and restore the VSI configuration if | |
676 | * needed. | |
677 | */ | |
678 | if (vf->port_vlan_id) | |
679 | i40e_vsi_add_pvid(vsi, vf->port_vlan_id); | |
21659035 KP |
680 | |
681 | spin_lock_bh(&vsi->mac_filter_list_lock); | |
b7b713a8 MW |
682 | if (is_valid_ether_addr(vf->default_lan_addr.addr)) { |
683 | f = i40e_add_filter(vsi, vf->default_lan_addr.addr, | |
684 | vf->port_vlan_id ? vf->port_vlan_id : -1, | |
685 | true, false); | |
686 | if (!f) | |
687 | dev_info(&pf->pdev->dev, | |
688 | "Could not add MAC filter %pM for VF %d\n", | |
689 | vf->default_lan_addr.addr, vf->vf_id); | |
690 | } | |
21659035 | 691 | spin_unlock_bh(&vsi->mac_filter_list_lock); |
bb360717 MW |
692 | i40e_write_rx_ctl(&pf->hw, I40E_VFQF_HENA1(0, vf->vf_id), |
693 | (u32)hena); | |
694 | i40e_write_rx_ctl(&pf->hw, I40E_VFQF_HENA1(1, vf->vf_id), | |
695 | (u32)(hena >> 32)); | |
5c3c48ac | 696 | } |
6dbbbfb2 | 697 | |
5c3c48ac | 698 | /* program mac filter */ |
17652c63 | 699 | ret = i40e_sync_vsi_filters(vsi); |
fd1646ee | 700 | if (ret) |
5c3c48ac | 701 | dev_err(&pf->pdev->dev, "Unable to program ucast filters\n"); |
5c3c48ac | 702 | |
6b192891 MW |
703 | /* Set VF bandwidth if specified */ |
704 | if (vf->tx_rate) { | |
705 | ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid, | |
706 | vf->tx_rate / 50, 0, NULL); | |
707 | if (ret) | |
708 | dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n", | |
709 | vf->vf_id, ret); | |
710 | } | |
711 | ||
5c3c48ac JB |
712 | error_alloc_vsi_res: |
713 | return ret; | |
714 | } | |
715 | ||
805bd5bd MW |
716 | /** |
717 | * i40e_enable_vf_mappings | |
b40c82e6 | 718 | * @vf: pointer to the VF info |
805bd5bd | 719 | * |
b40c82e6 | 720 | * enable VF mappings |
805bd5bd MW |
721 | **/ |
722 | static void i40e_enable_vf_mappings(struct i40e_vf *vf) | |
723 | { | |
724 | struct i40e_pf *pf = vf->pf; | |
725 | struct i40e_hw *hw = &pf->hw; | |
726 | u32 reg, total_queue_pairs = 0; | |
727 | int j; | |
728 | ||
729 | /* Tell the hardware we're using noncontiguous mapping. HW requires | |
730 | * that VF queues be mapped using this method, even when they are | |
731 | * contiguous in real life | |
732 | */ | |
272cdaf2 SN |
733 | i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id), |
734 | I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK); | |
805bd5bd MW |
735 | |
736 | /* enable VF vplan_qtable mappings */ | |
737 | reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK; | |
738 | wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg); | |
739 | ||
740 | /* map PF queues to VF queues */ | |
fdf0e0bf ASJ |
741 | for (j = 0; j < pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs; j++) { |
742 | u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id, j); | |
6995b36c | 743 | |
805bd5bd MW |
744 | reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK); |
745 | wr32(hw, I40E_VPLAN_QTABLE(total_queue_pairs, vf->vf_id), reg); | |
746 | total_queue_pairs++; | |
747 | } | |
748 | ||
749 | /* map PF queues to VSI */ | |
750 | for (j = 0; j < 7; j++) { | |
fdf0e0bf | 751 | if (j * 2 >= pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs) { |
805bd5bd MW |
752 | reg = 0x07FF07FF; /* unused */ |
753 | } else { | |
fdf0e0bf | 754 | u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id, |
805bd5bd MW |
755 | j * 2); |
756 | reg = qid; | |
fdf0e0bf | 757 | qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id, |
805bd5bd MW |
758 | (j * 2) + 1); |
759 | reg |= qid << 16; | |
760 | } | |
272cdaf2 SN |
761 | i40e_write_rx_ctl(hw, I40E_VSILAN_QTABLE(j, vf->lan_vsi_id), |
762 | reg); | |
805bd5bd MW |
763 | } |
764 | ||
765 | i40e_flush(hw); | |
766 | } | |
767 | ||
768 | /** | |
769 | * i40e_disable_vf_mappings | |
b40c82e6 | 770 | * @vf: pointer to the VF info |
805bd5bd | 771 | * |
b40c82e6 | 772 | * disable VF mappings |
805bd5bd MW |
773 | **/ |
774 | static void i40e_disable_vf_mappings(struct i40e_vf *vf) | |
775 | { | |
776 | struct i40e_pf *pf = vf->pf; | |
777 | struct i40e_hw *hw = &pf->hw; | |
778 | int i; | |
779 | ||
780 | /* disable qp mappings */ | |
781 | wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0); | |
782 | for (i = 0; i < I40E_MAX_VSI_QP; i++) | |
783 | wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id), | |
784 | I40E_QUEUE_END_OF_LIST); | |
785 | i40e_flush(hw); | |
786 | } | |
787 | ||
788 | /** | |
789 | * i40e_free_vf_res | |
b40c82e6 | 790 | * @vf: pointer to the VF info |
805bd5bd | 791 | * |
b40c82e6 | 792 | * free VF resources |
805bd5bd MW |
793 | **/ |
794 | static void i40e_free_vf_res(struct i40e_vf *vf) | |
795 | { | |
796 | struct i40e_pf *pf = vf->pf; | |
fc18eaa0 MW |
797 | struct i40e_hw *hw = &pf->hw; |
798 | u32 reg_idx, reg; | |
799 | int i, msix_vf; | |
805bd5bd MW |
800 | |
801 | /* free vsi & disconnect it from the parent uplink */ | |
fdf0e0bf ASJ |
802 | if (vf->lan_vsi_idx) { |
803 | i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]); | |
804 | vf->lan_vsi_idx = 0; | |
805bd5bd MW |
805 | vf->lan_vsi_id = 0; |
806 | } | |
9347eb77 MW |
807 | msix_vf = pf->hw.func_caps.num_msix_vectors_vf; |
808 | ||
fc18eaa0 MW |
809 | /* disable interrupts so the VF starts in a known state */ |
810 | for (i = 0; i < msix_vf; i++) { | |
811 | /* format is same for both registers */ | |
812 | if (0 == i) | |
813 | reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id); | |
814 | else | |
815 | reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) * | |
816 | (vf->vf_id)) | |
817 | + (i - 1)); | |
818 | wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK); | |
819 | i40e_flush(hw); | |
820 | } | |
805bd5bd | 821 | |
fc18eaa0 MW |
822 | /* clear the irq settings */ |
823 | for (i = 0; i < msix_vf; i++) { | |
824 | /* format is same for both registers */ | |
825 | if (0 == i) | |
826 | reg_idx = I40E_VPINT_LNKLST0(vf->vf_id); | |
827 | else | |
828 | reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) * | |
829 | (vf->vf_id)) | |
830 | + (i - 1)); | |
831 | reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK | | |
832 | I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK); | |
833 | wr32(hw, reg_idx, reg); | |
834 | i40e_flush(hw); | |
835 | } | |
805bd5bd MW |
836 | /* reset some of the state varibles keeping |
837 | * track of the resources | |
838 | */ | |
839 | vf->num_queue_pairs = 0; | |
840 | vf->vf_states = 0; | |
21be99ec | 841 | clear_bit(I40E_VF_STAT_INIT, &vf->vf_states); |
805bd5bd MW |
842 | } |
843 | ||
844 | /** | |
845 | * i40e_alloc_vf_res | |
b40c82e6 | 846 | * @vf: pointer to the VF info |
805bd5bd | 847 | * |
b40c82e6 | 848 | * allocate VF resources |
805bd5bd MW |
849 | **/ |
850 | static int i40e_alloc_vf_res(struct i40e_vf *vf) | |
851 | { | |
852 | struct i40e_pf *pf = vf->pf; | |
853 | int total_queue_pairs = 0; | |
854 | int ret; | |
855 | ||
856 | /* allocate hw vsi context & associated resources */ | |
857 | ret = i40e_alloc_vsi_res(vf, I40E_VSI_SRIOV); | |
858 | if (ret) | |
859 | goto error_alloc; | |
fdf0e0bf | 860 | total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs; |
692fb0a7 ASJ |
861 | |
862 | if (vf->trusted) | |
863 | set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps); | |
864 | else | |
865 | clear_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps); | |
805bd5bd MW |
866 | |
867 | /* store the total qps number for the runtime | |
b40c82e6 | 868 | * VF req validation |
805bd5bd MW |
869 | */ |
870 | vf->num_queue_pairs = total_queue_pairs; | |
871 | ||
b40c82e6 | 872 | /* VF is now completely initialized */ |
805bd5bd MW |
873 | set_bit(I40E_VF_STAT_INIT, &vf->vf_states); |
874 | ||
875 | error_alloc: | |
876 | if (ret) | |
877 | i40e_free_vf_res(vf); | |
878 | ||
879 | return ret; | |
880 | } | |
881 | ||
fc18eaa0 MW |
882 | #define VF_DEVICE_STATUS 0xAA |
883 | #define VF_TRANS_PENDING_MASK 0x20 | |
884 | /** | |
885 | * i40e_quiesce_vf_pci | |
b40c82e6 | 886 | * @vf: pointer to the VF structure |
fc18eaa0 MW |
887 | * |
888 | * Wait for VF PCI transactions to be cleared after reset. Returns -EIO | |
889 | * if the transactions never clear. | |
890 | **/ | |
891 | static int i40e_quiesce_vf_pci(struct i40e_vf *vf) | |
892 | { | |
893 | struct i40e_pf *pf = vf->pf; | |
894 | struct i40e_hw *hw = &pf->hw; | |
895 | int vf_abs_id, i; | |
896 | u32 reg; | |
897 | ||
b141d619 | 898 | vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id; |
fc18eaa0 MW |
899 | |
900 | wr32(hw, I40E_PF_PCI_CIAA, | |
901 | VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT)); | |
902 | for (i = 0; i < 100; i++) { | |
903 | reg = rd32(hw, I40E_PF_PCI_CIAD); | |
904 | if ((reg & VF_TRANS_PENDING_MASK) == 0) | |
905 | return 0; | |
906 | udelay(1); | |
907 | } | |
908 | return -EIO; | |
909 | } | |
910 | ||
5c3c48ac JB |
911 | /** |
912 | * i40e_reset_vf | |
b40c82e6 | 913 | * @vf: pointer to the VF structure |
5c3c48ac JB |
914 | * @flr: VFLR was issued or not |
915 | * | |
b40c82e6 | 916 | * reset the VF |
5c3c48ac | 917 | **/ |
fc18eaa0 | 918 | void i40e_reset_vf(struct i40e_vf *vf, bool flr) |
5c3c48ac | 919 | { |
5c3c48ac JB |
920 | struct i40e_pf *pf = vf->pf; |
921 | struct i40e_hw *hw = &pf->hw; | |
7e5a313e | 922 | u32 reg, reg_idx, bit_idx; |
5c3c48ac | 923 | bool rsd = false; |
fc18eaa0 | 924 | int i; |
5c3c48ac | 925 | |
3ba9bcb4 MW |
926 | if (test_and_set_bit(__I40E_VF_DISABLE, &pf->state)) |
927 | return; | |
928 | ||
5c3c48ac | 929 | /* warn the VF */ |
5c3c48ac JB |
930 | clear_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states); |
931 | ||
fc18eaa0 MW |
932 | /* In the case of a VFLR, the HW has already reset the VF and we |
933 | * just need to clean up, so don't hit the VFRTRIG register. | |
5c3c48ac JB |
934 | */ |
935 | if (!flr) { | |
b40c82e6 | 936 | /* reset VF using VPGEN_VFRTRIG reg */ |
fc18eaa0 MW |
937 | reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id)); |
938 | reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK; | |
5c3c48ac JB |
939 | wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg); |
940 | i40e_flush(hw); | |
941 | } | |
7369ca87 MW |
942 | /* clear the VFLR bit in GLGEN_VFLRSTAT */ |
943 | reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32; | |
944 | bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32; | |
945 | wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx)); | |
30728c5b | 946 | i40e_flush(hw); |
5c3c48ac | 947 | |
fc18eaa0 MW |
948 | if (i40e_quiesce_vf_pci(vf)) |
949 | dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n", | |
950 | vf->vf_id); | |
951 | ||
5c3c48ac JB |
952 | /* poll VPGEN_VFRSTAT reg to make sure |
953 | * that reset is complete | |
954 | */ | |
1750a22f MW |
955 | for (i = 0; i < 10; i++) { |
956 | /* VF reset requires driver to first reset the VF and then | |
957 | * poll the status register to make sure that the reset | |
958 | * completed successfully. Due to internal HW FIFO flushes, | |
959 | * we must wait 10ms before the register will be valid. | |
5c3c48ac | 960 | */ |
1750a22f | 961 | usleep_range(10000, 20000); |
5c3c48ac JB |
962 | reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id)); |
963 | if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) { | |
964 | rsd = true; | |
965 | break; | |
966 | } | |
967 | } | |
968 | ||
57175ac1 ASJ |
969 | if (flr) |
970 | usleep_range(10000, 20000); | |
971 | ||
5c3c48ac | 972 | if (!rsd) |
fc18eaa0 | 973 | dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n", |
5c3c48ac | 974 | vf->vf_id); |
fc18eaa0 | 975 | wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_COMPLETED); |
5c3c48ac JB |
976 | /* clear the reset bit in the VPGEN_VFRTRIG reg */ |
977 | reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id)); | |
978 | reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK; | |
979 | wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg); | |
fc18eaa0 MW |
980 | |
981 | /* On initial reset, we won't have any queues */ | |
fdf0e0bf | 982 | if (vf->lan_vsi_idx == 0) |
fc18eaa0 MW |
983 | goto complete_reset; |
984 | ||
fdf0e0bf | 985 | i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], false); |
fc18eaa0 | 986 | complete_reset: |
b40c82e6 | 987 | /* reallocate VF resources to reset the VSI state */ |
fc18eaa0 | 988 | i40e_free_vf_res(vf); |
21be99ec | 989 | if (!i40e_alloc_vf_res(vf)) { |
e3219ce6 | 990 | int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id; |
21be99ec MW |
991 | i40e_enable_vf_mappings(vf); |
992 | set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states); | |
993 | clear_bit(I40E_VF_STAT_DISABLED, &vf->vf_states); | |
6a23449a AD |
994 | /* Do not notify the client during VF init */ |
995 | if (vf->pf->num_alloc_vfs) | |
996 | i40e_notify_client_of_vf_reset(pf, abs_vf_id); | |
dc5b4e9f | 997 | vf->num_vlan = 0; |
21be99ec | 998 | } |
5c3c48ac | 999 | /* tell the VF the reset is done */ |
fc18eaa0 | 1000 | wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_VFACTIVE); |
7e5a313e | 1001 | |
5c3c48ac | 1002 | i40e_flush(hw); |
3ba9bcb4 | 1003 | clear_bit(__I40E_VF_DISABLE, &pf->state); |
5c3c48ac | 1004 | } |
c354229f | 1005 | |
5c3c48ac JB |
1006 | /** |
1007 | * i40e_free_vfs | |
b40c82e6 | 1008 | * @pf: pointer to the PF structure |
5c3c48ac | 1009 | * |
b40c82e6 | 1010 | * free VF resources |
5c3c48ac JB |
1011 | **/ |
1012 | void i40e_free_vfs(struct i40e_pf *pf) | |
1013 | { | |
f7414531 MW |
1014 | struct i40e_hw *hw = &pf->hw; |
1015 | u32 reg_idx, bit_idx; | |
1016 | int i, tmp, vf_id; | |
5c3c48ac JB |
1017 | |
1018 | if (!pf->vf) | |
1019 | return; | |
3ba9bcb4 MW |
1020 | while (test_and_set_bit(__I40E_VF_DISABLE, &pf->state)) |
1021 | usleep_range(1000, 2000); | |
5c3c48ac | 1022 | |
e3219ce6 | 1023 | i40e_notify_client_of_vf_enable(pf, 0); |
0325fca7 MW |
1024 | for (i = 0; i < pf->num_alloc_vfs; i++) |
1025 | if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states)) | |
1026 | i40e_vsi_control_rings(pf->vsi[pf->vf[i].lan_vsi_idx], | |
1027 | false); | |
44434638 | 1028 | |
6a9ddb36 MW |
1029 | /* Disable IOV before freeing resources. This lets any VF drivers |
1030 | * running in the host get themselves cleaned up before we yank | |
1031 | * the carpet out from underneath their feet. | |
1032 | */ | |
1033 | if (!pci_vfs_assigned(pf->pdev)) | |
1034 | pci_disable_sriov(pf->pdev); | |
6d7b967d MW |
1035 | else |
1036 | dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n"); | |
6a9ddb36 MW |
1037 | |
1038 | msleep(20); /* let any messages in transit get finished up */ | |
1039 | ||
b40c82e6 | 1040 | /* free up VF resources */ |
6c1b5bff MW |
1041 | tmp = pf->num_alloc_vfs; |
1042 | pf->num_alloc_vfs = 0; | |
1043 | for (i = 0; i < tmp; i++) { | |
5c3c48ac JB |
1044 | if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states)) |
1045 | i40e_free_vf_res(&pf->vf[i]); | |
1046 | /* disable qp mappings */ | |
1047 | i40e_disable_vf_mappings(&pf->vf[i]); | |
1048 | } | |
1049 | ||
1050 | kfree(pf->vf); | |
1051 | pf->vf = NULL; | |
5c3c48ac | 1052 | |
9e5634df MW |
1053 | /* This check is for when the driver is unloaded while VFs are |
1054 | * assigned. Setting the number of VFs to 0 through sysfs is caught | |
1055 | * before this function ever gets called. | |
1056 | */ | |
c24817b6 | 1057 | if (!pci_vfs_assigned(pf->pdev)) { |
f7414531 MW |
1058 | /* Acknowledge VFLR for all VFS. Without this, VFs will fail to |
1059 | * work correctly when SR-IOV gets re-enabled. | |
1060 | */ | |
1061 | for (vf_id = 0; vf_id < tmp; vf_id++) { | |
1062 | reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32; | |
1063 | bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32; | |
41a1d04b | 1064 | wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx)); |
f7414531 | 1065 | } |
c354229f | 1066 | } |
3ba9bcb4 | 1067 | clear_bit(__I40E_VF_DISABLE, &pf->state); |
5c3c48ac JB |
1068 | } |
1069 | ||
1070 | #ifdef CONFIG_PCI_IOV | |
1071 | /** | |
1072 | * i40e_alloc_vfs | |
b40c82e6 JK |
1073 | * @pf: pointer to the PF structure |
1074 | * @num_alloc_vfs: number of VFs to allocate | |
5c3c48ac | 1075 | * |
b40c82e6 | 1076 | * allocate VF resources |
5c3c48ac | 1077 | **/ |
4aeec010 | 1078 | int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs) |
5c3c48ac JB |
1079 | { |
1080 | struct i40e_vf *vfs; | |
1081 | int i, ret = 0; | |
1082 | ||
6c1b5bff | 1083 | /* Disable interrupt 0 so we don't try to handle the VFLR. */ |
2ef28cfb MW |
1084 | i40e_irq_dynamic_disable_icr0(pf); |
1085 | ||
4aeec010 MW |
1086 | /* Check to see if we're just allocating resources for extant VFs */ |
1087 | if (pci_num_vf(pf->pdev) != num_alloc_vfs) { | |
1088 | ret = pci_enable_sriov(pf->pdev, num_alloc_vfs); | |
1089 | if (ret) { | |
de445b3d | 1090 | pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; |
4aeec010 MW |
1091 | pf->num_alloc_vfs = 0; |
1092 | goto err_iov; | |
1093 | } | |
5c3c48ac | 1094 | } |
5c3c48ac | 1095 | /* allocate memory */ |
cc6456af | 1096 | vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL); |
5c3c48ac JB |
1097 | if (!vfs) { |
1098 | ret = -ENOMEM; | |
1099 | goto err_alloc; | |
1100 | } | |
c674d125 | 1101 | pf->vf = vfs; |
5c3c48ac JB |
1102 | |
1103 | /* apply default profile */ | |
1104 | for (i = 0; i < num_alloc_vfs; i++) { | |
1105 | vfs[i].pf = pf; | |
1106 | vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB; | |
1107 | vfs[i].vf_id = i; | |
1108 | ||
1109 | /* assign default capabilities */ | |
1110 | set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps); | |
c674d125 | 1111 | vfs[i].spoofchk = true; |
b40c82e6 | 1112 | /* VF resources get allocated during reset */ |
fc18eaa0 | 1113 | i40e_reset_vf(&vfs[i], false); |
5c3c48ac | 1114 | |
5c3c48ac | 1115 | } |
5c3c48ac JB |
1116 | pf->num_alloc_vfs = num_alloc_vfs; |
1117 | ||
6a23449a AD |
1118 | i40e_notify_client_of_vf_enable(pf, num_alloc_vfs); |
1119 | ||
5c3c48ac JB |
1120 | err_alloc: |
1121 | if (ret) | |
1122 | i40e_free_vfs(pf); | |
1123 | err_iov: | |
6c1b5bff | 1124 | /* Re-enable interrupt 0. */ |
40d72a50 | 1125 | i40e_irq_dynamic_enable_icr0(pf, false); |
5c3c48ac JB |
1126 | return ret; |
1127 | } | |
1128 | ||
1129 | #endif | |
1130 | /** | |
1131 | * i40e_pci_sriov_enable | |
1132 | * @pdev: pointer to a pci_dev structure | |
b40c82e6 | 1133 | * @num_vfs: number of VFs to allocate |
5c3c48ac JB |
1134 | * |
1135 | * Enable or change the number of VFs | |
1136 | **/ | |
1137 | static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs) | |
1138 | { | |
1139 | #ifdef CONFIG_PCI_IOV | |
1140 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
1141 | int pre_existing_vfs = pci_num_vf(pdev); | |
1142 | int err = 0; | |
1143 | ||
6995b36c | 1144 | if (test_bit(__I40E_TESTING, &pf->state)) { |
e17bc411 GR |
1145 | dev_warn(&pdev->dev, |
1146 | "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n"); | |
1147 | err = -EPERM; | |
1148 | goto err_out; | |
1149 | } | |
1150 | ||
5c3c48ac JB |
1151 | if (pre_existing_vfs && pre_existing_vfs != num_vfs) |
1152 | i40e_free_vfs(pf); | |
1153 | else if (pre_existing_vfs && pre_existing_vfs == num_vfs) | |
1154 | goto out; | |
1155 | ||
1156 | if (num_vfs > pf->num_req_vfs) { | |
96c8d073 MW |
1157 | dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n", |
1158 | num_vfs, pf->num_req_vfs); | |
5c3c48ac JB |
1159 | err = -EPERM; |
1160 | goto err_out; | |
1161 | } | |
1162 | ||
96c8d073 | 1163 | dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs); |
5c3c48ac JB |
1164 | err = i40e_alloc_vfs(pf, num_vfs); |
1165 | if (err) { | |
1166 | dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err); | |
1167 | goto err_out; | |
1168 | } | |
1169 | ||
1170 | out: | |
1171 | return num_vfs; | |
1172 | ||
1173 | err_out: | |
1174 | return err; | |
1175 | #endif | |
1176 | return 0; | |
1177 | } | |
1178 | ||
1179 | /** | |
1180 | * i40e_pci_sriov_configure | |
1181 | * @pdev: pointer to a pci_dev structure | |
b40c82e6 | 1182 | * @num_vfs: number of VFs to allocate |
5c3c48ac JB |
1183 | * |
1184 | * Enable or change the number of VFs. Called when the user updates the number | |
1185 | * of VFs in sysfs. | |
1186 | **/ | |
1187 | int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs) | |
1188 | { | |
1189 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
1190 | ||
fc60861e ASJ |
1191 | if (num_vfs) { |
1192 | if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) { | |
1193 | pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; | |
1194 | i40e_do_reset_safe(pf, | |
1195 | BIT_ULL(__I40E_PF_RESET_REQUESTED)); | |
1196 | } | |
5c3c48ac | 1197 | return i40e_pci_sriov_enable(pdev, num_vfs); |
fc60861e | 1198 | } |
5c3c48ac | 1199 | |
c24817b6 | 1200 | if (!pci_vfs_assigned(pf->pdev)) { |
9e5634df | 1201 | i40e_free_vfs(pf); |
fc60861e ASJ |
1202 | pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; |
1203 | i40e_do_reset_safe(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED)); | |
9e5634df MW |
1204 | } else { |
1205 | dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n"); | |
1206 | return -EINVAL; | |
1207 | } | |
5c3c48ac JB |
1208 | return 0; |
1209 | } | |
1210 | ||
1211 | /***********************virtual channel routines******************/ | |
1212 | ||
1213 | /** | |
1214 | * i40e_vc_send_msg_to_vf | |
b40c82e6 | 1215 | * @vf: pointer to the VF info |
5c3c48ac JB |
1216 | * @v_opcode: virtual channel opcode |
1217 | * @v_retval: virtual channel return value | |
1218 | * @msg: pointer to the msg buffer | |
1219 | * @msglen: msg length | |
1220 | * | |
b40c82e6 | 1221 | * send msg to VF |
5c3c48ac JB |
1222 | **/ |
1223 | static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode, | |
1224 | u32 v_retval, u8 *msg, u16 msglen) | |
1225 | { | |
6e7b5bd3 ASJ |
1226 | struct i40e_pf *pf; |
1227 | struct i40e_hw *hw; | |
1228 | int abs_vf_id; | |
5c3c48ac JB |
1229 | i40e_status aq_ret; |
1230 | ||
6e7b5bd3 ASJ |
1231 | /* validate the request */ |
1232 | if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs) | |
1233 | return -EINVAL; | |
1234 | ||
1235 | pf = vf->pf; | |
1236 | hw = &pf->hw; | |
1237 | abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id; | |
1238 | ||
5c3c48ac JB |
1239 | /* single place to detect unsuccessful return values */ |
1240 | if (v_retval) { | |
1241 | vf->num_invalid_msgs++; | |
18b7af57 MW |
1242 | dev_info(&pf->pdev->dev, "VF %d failed opcode %d, retval: %d\n", |
1243 | vf->vf_id, v_opcode, v_retval); | |
5c3c48ac JB |
1244 | if (vf->num_invalid_msgs > |
1245 | I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) { | |
1246 | dev_err(&pf->pdev->dev, | |
1247 | "Number of invalid messages exceeded for VF %d\n", | |
1248 | vf->vf_id); | |
1249 | dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n"); | |
1250 | set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states); | |
1251 | } | |
1252 | } else { | |
1253 | vf->num_valid_msgs++; | |
5d38c93e JW |
1254 | /* reset the invalid counter, if a valid message is received. */ |
1255 | vf->num_invalid_msgs = 0; | |
5c3c48ac JB |
1256 | } |
1257 | ||
f19efbb5 | 1258 | aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval, |
7efa84b7 | 1259 | msg, msglen, NULL); |
5c3c48ac | 1260 | if (aq_ret) { |
18b7af57 MW |
1261 | dev_info(&pf->pdev->dev, |
1262 | "Unable to send the message to VF %d aq_err %d\n", | |
1263 | vf->vf_id, pf->hw.aq.asq_last_status); | |
5c3c48ac JB |
1264 | return -EIO; |
1265 | } | |
1266 | ||
1267 | return 0; | |
1268 | } | |
1269 | ||
1270 | /** | |
1271 | * i40e_vc_send_resp_to_vf | |
b40c82e6 | 1272 | * @vf: pointer to the VF info |
5c3c48ac JB |
1273 | * @opcode: operation code |
1274 | * @retval: return value | |
1275 | * | |
b40c82e6 | 1276 | * send resp msg to VF |
5c3c48ac JB |
1277 | **/ |
1278 | static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf, | |
1279 | enum i40e_virtchnl_ops opcode, | |
1280 | i40e_status retval) | |
1281 | { | |
1282 | return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0); | |
1283 | } | |
1284 | ||
1285 | /** | |
1286 | * i40e_vc_get_version_msg | |
b40c82e6 | 1287 | * @vf: pointer to the VF info |
5c3c48ac | 1288 | * |
b40c82e6 | 1289 | * called from the VF to request the API version used by the PF |
5c3c48ac | 1290 | **/ |
f4ca1a22 | 1291 | static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg) |
5c3c48ac JB |
1292 | { |
1293 | struct i40e_virtchnl_version_info info = { | |
1294 | I40E_VIRTCHNL_VERSION_MAJOR, I40E_VIRTCHNL_VERSION_MINOR | |
1295 | }; | |
1296 | ||
f4ca1a22 | 1297 | vf->vf_ver = *(struct i40e_virtchnl_version_info *)msg; |
606a5488 MW |
1298 | /* VFs running the 1.0 API expect to get 1.0 back or they will cry. */ |
1299 | if (VF_IS_V10(vf)) | |
1300 | info.minor = I40E_VIRTCHNL_VERSION_MINOR_NO_VF_CAPS; | |
5c3c48ac JB |
1301 | return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION, |
1302 | I40E_SUCCESS, (u8 *)&info, | |
1303 | sizeof(struct | |
1304 | i40e_virtchnl_version_info)); | |
1305 | } | |
1306 | ||
1307 | /** | |
1308 | * i40e_vc_get_vf_resources_msg | |
b40c82e6 | 1309 | * @vf: pointer to the VF info |
5c3c48ac JB |
1310 | * @msg: pointer to the msg buffer |
1311 | * @msglen: msg length | |
1312 | * | |
b40c82e6 | 1313 | * called from the VF to request its resources |
5c3c48ac | 1314 | **/ |
f4ca1a22 | 1315 | static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg) |
5c3c48ac JB |
1316 | { |
1317 | struct i40e_virtchnl_vf_resource *vfres = NULL; | |
1318 | struct i40e_pf *pf = vf->pf; | |
1319 | i40e_status aq_ret = 0; | |
1320 | struct i40e_vsi *vsi; | |
5c3c48ac | 1321 | int num_vsis = 1; |
442b25e4 | 1322 | int len = 0; |
5c3c48ac JB |
1323 | int ret; |
1324 | ||
1325 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) { | |
1326 | aq_ret = I40E_ERR_PARAM; | |
1327 | goto err; | |
1328 | } | |
1329 | ||
1330 | len = (sizeof(struct i40e_virtchnl_vf_resource) + | |
1331 | sizeof(struct i40e_virtchnl_vsi_resource) * num_vsis); | |
1332 | ||
1333 | vfres = kzalloc(len, GFP_KERNEL); | |
1334 | if (!vfres) { | |
1335 | aq_ret = I40E_ERR_NO_MEMORY; | |
1336 | len = 0; | |
1337 | goto err; | |
1338 | } | |
f4ca1a22 MW |
1339 | if (VF_IS_V11(vf)) |
1340 | vf->driver_caps = *(u32 *)msg; | |
1341 | else | |
1342 | vf->driver_caps = I40E_VIRTCHNL_VF_OFFLOAD_L2 | | |
1343 | I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG | | |
1344 | I40E_VIRTCHNL_VF_OFFLOAD_VLAN; | |
5c3c48ac JB |
1345 | |
1346 | vfres->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2; | |
fdf0e0bf | 1347 | vsi = pf->vsi[vf->lan_vsi_idx]; |
5c3c48ac | 1348 | if (!vsi->info.pvid) |
e25d00b8 | 1349 | vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_VLAN; |
e3219ce6 ASJ |
1350 | |
1351 | if (i40e_vf_client_capable(pf, vf->vf_id, I40E_CLIENT_IWARP) && | |
1352 | (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_IWARP)) { | |
1353 | vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_IWARP; | |
1354 | set_bit(I40E_VF_STAT_IWARPENA, &vf->vf_states); | |
1355 | } | |
1356 | ||
c4e1868c MW |
1357 | if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PF) { |
1358 | vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RSS_PF; | |
e25d00b8 | 1359 | } else { |
c4e1868c MW |
1360 | if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) && |
1361 | (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ)) | |
1362 | vfres->vf_offload_flags |= | |
1363 | I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ; | |
1364 | else | |
1365 | vfres->vf_offload_flags |= | |
1366 | I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG; | |
e25d00b8 | 1367 | } |
1f012279 | 1368 | |
3d0da5b7 ASJ |
1369 | if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) { |
1370 | if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2) | |
1371 | vfres->vf_offload_flags |= | |
1372 | I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2; | |
1373 | } | |
1374 | ||
14c5f5d2 SN |
1375 | if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) { |
1376 | if (pf->flags & I40E_FLAG_MFP_ENABLED) { | |
1377 | dev_err(&pf->pdev->dev, | |
1378 | "VF %d requested polling mode: this feature is supported only when the device is running in single function per port (SFP) mode\n", | |
1379 | vf->vf_id); | |
1380 | ret = I40E_ERR_PARAM; | |
1381 | goto err; | |
1382 | } | |
1f012279 | 1383 | vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING; |
14c5f5d2 | 1384 | } |
1f012279 | 1385 | |
f6d83d13 ASJ |
1386 | if (pf->flags & I40E_FLAG_WB_ON_ITR_CAPABLE) { |
1387 | if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) | |
1388 | vfres->vf_offload_flags |= | |
1389 | I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR; | |
1390 | } | |
1391 | ||
5c3c48ac JB |
1392 | vfres->num_vsis = num_vsis; |
1393 | vfres->num_queue_pairs = vf->num_queue_pairs; | |
1394 | vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf; | |
c4e1868c MW |
1395 | vfres->rss_key_size = I40E_HKEY_ARRAY_SIZE; |
1396 | vfres->rss_lut_size = I40E_VF_HLUT_ARRAY_SIZE; | |
1397 | ||
fdf0e0bf | 1398 | if (vf->lan_vsi_idx) { |
442b25e4 MW |
1399 | vfres->vsi_res[0].vsi_id = vf->lan_vsi_id; |
1400 | vfres->vsi_res[0].vsi_type = I40E_VSI_SRIOV; | |
1401 | vfres->vsi_res[0].num_queue_pairs = vsi->alloc_queue_pairs; | |
f578f5f4 | 1402 | /* VFs only use TC 0 */ |
442b25e4 | 1403 | vfres->vsi_res[0].qset_handle |
f578f5f4 | 1404 | = le16_to_cpu(vsi->info.qs_handle[0]); |
442b25e4 | 1405 | ether_addr_copy(vfres->vsi_res[0].default_mac_addr, |
6995b36c | 1406 | vf->default_lan_addr.addr); |
5c3c48ac JB |
1407 | } |
1408 | set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states); | |
1409 | ||
1410 | err: | |
b40c82e6 | 1411 | /* send the response back to the VF */ |
5c3c48ac JB |
1412 | ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES, |
1413 | aq_ret, (u8 *)vfres, len); | |
1414 | ||
1415 | kfree(vfres); | |
1416 | return ret; | |
1417 | } | |
1418 | ||
1419 | /** | |
1420 | * i40e_vc_reset_vf_msg | |
b40c82e6 | 1421 | * @vf: pointer to the VF info |
5c3c48ac JB |
1422 | * @msg: pointer to the msg buffer |
1423 | * @msglen: msg length | |
1424 | * | |
b40c82e6 JK |
1425 | * called from the VF to reset itself, |
1426 | * unlike other virtchnl messages, PF driver | |
1427 | * doesn't send the response back to the VF | |
5c3c48ac | 1428 | **/ |
fc18eaa0 | 1429 | static void i40e_vc_reset_vf_msg(struct i40e_vf *vf) |
5c3c48ac | 1430 | { |
fc18eaa0 MW |
1431 | if (test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) |
1432 | i40e_reset_vf(vf, false); | |
5c3c48ac JB |
1433 | } |
1434 | ||
5676a8b9 ASJ |
1435 | /** |
1436 | * i40e_getnum_vf_vsi_vlan_filters | |
1437 | * @vsi: pointer to the vsi | |
1438 | * | |
1439 | * called to get the number of VLANs offloaded on this VF | |
1440 | **/ | |
1441 | static inline int i40e_getnum_vf_vsi_vlan_filters(struct i40e_vsi *vsi) | |
1442 | { | |
1443 | struct i40e_mac_filter *f; | |
1444 | int num_vlans = 0; | |
1445 | ||
1446 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1447 | if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID) | |
1448 | num_vlans++; | |
1449 | } | |
1450 | ||
1451 | return num_vlans; | |
1452 | } | |
1453 | ||
5c3c48ac JB |
1454 | /** |
1455 | * i40e_vc_config_promiscuous_mode_msg | |
b40c82e6 | 1456 | * @vf: pointer to the VF info |
5c3c48ac JB |
1457 | * @msg: pointer to the msg buffer |
1458 | * @msglen: msg length | |
1459 | * | |
b40c82e6 JK |
1460 | * called from the VF to configure the promiscuous mode of |
1461 | * VF vsis | |
5c3c48ac JB |
1462 | **/ |
1463 | static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf, | |
1464 | u8 *msg, u16 msglen) | |
1465 | { | |
1466 | struct i40e_virtchnl_promisc_info *info = | |
1467 | (struct i40e_virtchnl_promisc_info *)msg; | |
1468 | struct i40e_pf *pf = vf->pf; | |
1469 | struct i40e_hw *hw = &pf->hw; | |
5676a8b9 ASJ |
1470 | struct i40e_mac_filter *f; |
1471 | i40e_status aq_ret = 0; | |
5c3c48ac | 1472 | bool allmulti = false; |
5676a8b9 ASJ |
1473 | struct i40e_vsi *vsi; |
1474 | bool alluni = false; | |
1475 | int aq_err = 0; | |
5c3c48ac | 1476 | |
fdf0e0bf | 1477 | vsi = i40e_find_vsi_from_id(pf, info->vsi_id); |
5c3c48ac | 1478 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || |
5676a8b9 | 1479 | !i40e_vc_isvalid_vsi_id(vf, info->vsi_id)) { |
eee4172a MW |
1480 | aq_ret = I40E_ERR_PARAM; |
1481 | goto error_param; | |
1482 | } | |
1483 | if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) { | |
5676a8b9 | 1484 | dev_err(&pf->pdev->dev, |
eee4172a | 1485 | "Unprivileged VF %d is attempting to configure promiscuous mode\n", |
5676a8b9 | 1486 | vf->vf_id); |
eee4172a MW |
1487 | /* Lie to the VF on purpose. */ |
1488 | aq_ret = 0; | |
5c3c48ac JB |
1489 | goto error_param; |
1490 | } | |
5676a8b9 | 1491 | /* Multicast promiscuous handling*/ |
5c3c48ac JB |
1492 | if (info->flags & I40E_FLAG_VF_MULTICAST_PROMISC) |
1493 | allmulti = true; | |
5676a8b9 ASJ |
1494 | |
1495 | if (vf->port_vlan_id) { | |
1496 | aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw, vsi->seid, | |
1497 | allmulti, | |
1498 | vf->port_vlan_id, | |
1499 | NULL); | |
1500 | } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) { | |
1501 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
47d34839 ASJ |
1502 | if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID) |
1503 | continue; | |
1504 | aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw, | |
1505 | vsi->seid, | |
1506 | allmulti, | |
1507 | f->vlan, | |
1508 | NULL); | |
5676a8b9 ASJ |
1509 | aq_err = pf->hw.aq.asq_last_status; |
1510 | if (aq_ret) { | |
1511 | dev_err(&pf->pdev->dev, | |
1512 | "Could not add VLAN %d to multicast promiscuous domain err %s aq_err %s\n", | |
1513 | f->vlan, | |
1514 | i40e_stat_str(&pf->hw, aq_ret), | |
1515 | i40e_aq_str(&pf->hw, aq_err)); | |
1516 | break; | |
1517 | } | |
1518 | } | |
1519 | } else { | |
1520 | aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid, | |
1521 | allmulti, NULL); | |
1522 | aq_err = pf->hw.aq.asq_last_status; | |
1523 | if (aq_ret) { | |
1524 | dev_err(&pf->pdev->dev, | |
1525 | "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n", | |
1526 | vf->vf_id, | |
1527 | i40e_stat_str(&pf->hw, aq_ret), | |
1528 | i40e_aq_str(&pf->hw, aq_err)); | |
1529 | goto error_param_int; | |
1530 | } | |
1531 | } | |
1532 | ||
1533 | if (!aq_ret) { | |
1534 | dev_info(&pf->pdev->dev, | |
1535 | "VF %d successfully set multicast promiscuous mode\n", | |
1536 | vf->vf_id); | |
1537 | if (allmulti) | |
1538 | set_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states); | |
1539 | else | |
1540 | clear_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states); | |
1541 | } | |
1542 | ||
1543 | if (info->flags & I40E_FLAG_VF_UNICAST_PROMISC) | |
1544 | alluni = true; | |
1545 | if (vf->port_vlan_id) { | |
1546 | aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw, vsi->seid, | |
1547 | alluni, | |
1548 | vf->port_vlan_id, | |
1549 | NULL); | |
1550 | } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) { | |
1551 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1552 | aq_ret = 0; | |
ce927db4 | 1553 | if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID) { |
5676a8b9 ASJ |
1554 | aq_ret = |
1555 | i40e_aq_set_vsi_uc_promisc_on_vlan(hw, | |
1556 | vsi->seid, | |
1557 | alluni, | |
1558 | f->vlan, | |
1559 | NULL); | |
1560 | aq_err = pf->hw.aq.asq_last_status; | |
ce927db4 | 1561 | } |
5676a8b9 ASJ |
1562 | if (aq_ret) |
1563 | dev_err(&pf->pdev->dev, | |
1564 | "Could not add VLAN %d to Unicast promiscuous domain err %s aq_err %s\n", | |
1565 | f->vlan, | |
1566 | i40e_stat_str(&pf->hw, aq_ret), | |
1567 | i40e_aq_str(&pf->hw, aq_err)); | |
1568 | } | |
1569 | } else { | |
1570 | aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, vsi->seid, | |
b5569892 ASJ |
1571 | allmulti, NULL, |
1572 | true); | |
5676a8b9 ASJ |
1573 | aq_err = pf->hw.aq.asq_last_status; |
1574 | if (aq_ret) | |
1575 | dev_err(&pf->pdev->dev, | |
1576 | "VF %d failed to set unicast promiscuous mode %8.8x err %s aq_err %s\n", | |
1577 | vf->vf_id, info->flags, | |
1578 | i40e_stat_str(&pf->hw, aq_ret), | |
1579 | i40e_aq_str(&pf->hw, aq_err)); | |
1580 | } | |
1581 | ||
1582 | error_param_int: | |
1583 | if (!aq_ret) { | |
1584 | dev_info(&pf->pdev->dev, | |
1585 | "VF %d successfully set unicast promiscuous mode\n", | |
1586 | vf->vf_id); | |
1587 | if (alluni) | |
1588 | set_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states); | |
1589 | else | |
1590 | clear_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states); | |
1591 | } | |
5c3c48ac JB |
1592 | |
1593 | error_param: | |
b40c82e6 | 1594 | /* send the response to the VF */ |
5c3c48ac JB |
1595 | return i40e_vc_send_resp_to_vf(vf, |
1596 | I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, | |
1597 | aq_ret); | |
1598 | } | |
1599 | ||
1600 | /** | |
1601 | * i40e_vc_config_queues_msg | |
b40c82e6 | 1602 | * @vf: pointer to the VF info |
5c3c48ac JB |
1603 | * @msg: pointer to the msg buffer |
1604 | * @msglen: msg length | |
1605 | * | |
b40c82e6 | 1606 | * called from the VF to configure the rx/tx |
5c3c48ac JB |
1607 | * queues |
1608 | **/ | |
1609 | static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1610 | { | |
1611 | struct i40e_virtchnl_vsi_queue_config_info *qci = | |
1612 | (struct i40e_virtchnl_vsi_queue_config_info *)msg; | |
1613 | struct i40e_virtchnl_queue_pair_info *qpi; | |
5f5e33b6 | 1614 | struct i40e_pf *pf = vf->pf; |
5c3c48ac JB |
1615 | u16 vsi_id, vsi_queue_id; |
1616 | i40e_status aq_ret = 0; | |
1617 | int i; | |
1618 | ||
1619 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { | |
1620 | aq_ret = I40E_ERR_PARAM; | |
1621 | goto error_param; | |
1622 | } | |
1623 | ||
1624 | vsi_id = qci->vsi_id; | |
1625 | if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1626 | aq_ret = I40E_ERR_PARAM; | |
1627 | goto error_param; | |
1628 | } | |
1629 | for (i = 0; i < qci->num_queue_pairs; i++) { | |
1630 | qpi = &qci->qpair[i]; | |
1631 | vsi_queue_id = qpi->txq.queue_id; | |
1632 | if ((qpi->txq.vsi_id != vsi_id) || | |
1633 | (qpi->rxq.vsi_id != vsi_id) || | |
1634 | (qpi->rxq.queue_id != vsi_queue_id) || | |
1635 | !i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) { | |
1636 | aq_ret = I40E_ERR_PARAM; | |
1637 | goto error_param; | |
1638 | } | |
1639 | ||
1640 | if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id, | |
1641 | &qpi->rxq) || | |
1642 | i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id, | |
1643 | &qpi->txq)) { | |
1644 | aq_ret = I40E_ERR_PARAM; | |
1645 | goto error_param; | |
1646 | } | |
1647 | } | |
b40c82e6 | 1648 | /* set vsi num_queue_pairs in use to num configured by VF */ |
fdf0e0bf | 1649 | pf->vsi[vf->lan_vsi_idx]->num_queue_pairs = qci->num_queue_pairs; |
5c3c48ac JB |
1650 | |
1651 | error_param: | |
b40c82e6 | 1652 | /* send the response to the VF */ |
5c3c48ac JB |
1653 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES, |
1654 | aq_ret); | |
1655 | } | |
1656 | ||
1657 | /** | |
1658 | * i40e_vc_config_irq_map_msg | |
b40c82e6 | 1659 | * @vf: pointer to the VF info |
5c3c48ac JB |
1660 | * @msg: pointer to the msg buffer |
1661 | * @msglen: msg length | |
1662 | * | |
b40c82e6 | 1663 | * called from the VF to configure the irq to |
5c3c48ac JB |
1664 | * queue map |
1665 | **/ | |
1666 | static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1667 | { | |
1668 | struct i40e_virtchnl_irq_map_info *irqmap_info = | |
1669 | (struct i40e_virtchnl_irq_map_info *)msg; | |
1670 | struct i40e_virtchnl_vector_map *map; | |
1671 | u16 vsi_id, vsi_queue_id, vector_id; | |
1672 | i40e_status aq_ret = 0; | |
1673 | unsigned long tempmap; | |
1674 | int i; | |
1675 | ||
1676 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { | |
1677 | aq_ret = I40E_ERR_PARAM; | |
1678 | goto error_param; | |
1679 | } | |
1680 | ||
1681 | for (i = 0; i < irqmap_info->num_vectors; i++) { | |
1682 | map = &irqmap_info->vecmap[i]; | |
1683 | ||
1684 | vector_id = map->vector_id; | |
1685 | vsi_id = map->vsi_id; | |
1686 | /* validate msg params */ | |
1687 | if (!i40e_vc_isvalid_vector_id(vf, vector_id) || | |
1688 | !i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1689 | aq_ret = I40E_ERR_PARAM; | |
1690 | goto error_param; | |
1691 | } | |
1692 | ||
1693 | /* lookout for the invalid queue index */ | |
1694 | tempmap = map->rxq_map; | |
4836650b | 1695 | for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
1696 | if (!i40e_vc_isvalid_queue_id(vf, vsi_id, |
1697 | vsi_queue_id)) { | |
1698 | aq_ret = I40E_ERR_PARAM; | |
1699 | goto error_param; | |
1700 | } | |
5c3c48ac JB |
1701 | } |
1702 | ||
1703 | tempmap = map->txq_map; | |
4836650b | 1704 | for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
1705 | if (!i40e_vc_isvalid_queue_id(vf, vsi_id, |
1706 | vsi_queue_id)) { | |
1707 | aq_ret = I40E_ERR_PARAM; | |
1708 | goto error_param; | |
1709 | } | |
5c3c48ac JB |
1710 | } |
1711 | ||
1712 | i40e_config_irq_link_list(vf, vsi_id, map); | |
1713 | } | |
1714 | error_param: | |
b40c82e6 | 1715 | /* send the response to the VF */ |
5c3c48ac JB |
1716 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP, |
1717 | aq_ret); | |
1718 | } | |
1719 | ||
1720 | /** | |
1721 | * i40e_vc_enable_queues_msg | |
b40c82e6 | 1722 | * @vf: pointer to the VF info |
5c3c48ac JB |
1723 | * @msg: pointer to the msg buffer |
1724 | * @msglen: msg length | |
1725 | * | |
b40c82e6 | 1726 | * called from the VF to enable all or specific queue(s) |
5c3c48ac JB |
1727 | **/ |
1728 | static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1729 | { | |
1730 | struct i40e_virtchnl_queue_select *vqs = | |
1731 | (struct i40e_virtchnl_queue_select *)msg; | |
1732 | struct i40e_pf *pf = vf->pf; | |
1733 | u16 vsi_id = vqs->vsi_id; | |
1734 | i40e_status aq_ret = 0; | |
5c3c48ac JB |
1735 | |
1736 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { | |
1737 | aq_ret = I40E_ERR_PARAM; | |
1738 | goto error_param; | |
1739 | } | |
1740 | ||
1741 | if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1742 | aq_ret = I40E_ERR_PARAM; | |
1743 | goto error_param; | |
1744 | } | |
1745 | ||
1746 | if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) { | |
1747 | aq_ret = I40E_ERR_PARAM; | |
1748 | goto error_param; | |
1749 | } | |
fdf0e0bf ASJ |
1750 | |
1751 | if (i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], true)) | |
88f6563d | 1752 | aq_ret = I40E_ERR_TIMEOUT; |
5c3c48ac | 1753 | error_param: |
b40c82e6 | 1754 | /* send the response to the VF */ |
5c3c48ac JB |
1755 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES, |
1756 | aq_ret); | |
1757 | } | |
1758 | ||
1759 | /** | |
1760 | * i40e_vc_disable_queues_msg | |
b40c82e6 | 1761 | * @vf: pointer to the VF info |
5c3c48ac JB |
1762 | * @msg: pointer to the msg buffer |
1763 | * @msglen: msg length | |
1764 | * | |
b40c82e6 | 1765 | * called from the VF to disable all or specific |
5c3c48ac JB |
1766 | * queue(s) |
1767 | **/ | |
1768 | static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1769 | { | |
1770 | struct i40e_virtchnl_queue_select *vqs = | |
1771 | (struct i40e_virtchnl_queue_select *)msg; | |
1772 | struct i40e_pf *pf = vf->pf; | |
5c3c48ac | 1773 | i40e_status aq_ret = 0; |
5c3c48ac JB |
1774 | |
1775 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { | |
1776 | aq_ret = I40E_ERR_PARAM; | |
1777 | goto error_param; | |
1778 | } | |
1779 | ||
1780 | if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) { | |
1781 | aq_ret = I40E_ERR_PARAM; | |
1782 | goto error_param; | |
1783 | } | |
1784 | ||
1785 | if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) { | |
1786 | aq_ret = I40E_ERR_PARAM; | |
1787 | goto error_param; | |
1788 | } | |
fdf0e0bf ASJ |
1789 | |
1790 | if (i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], false)) | |
88f6563d | 1791 | aq_ret = I40E_ERR_TIMEOUT; |
5c3c48ac JB |
1792 | |
1793 | error_param: | |
b40c82e6 | 1794 | /* send the response to the VF */ |
5c3c48ac JB |
1795 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES, |
1796 | aq_ret); | |
1797 | } | |
1798 | ||
1799 | /** | |
1800 | * i40e_vc_get_stats_msg | |
b40c82e6 | 1801 | * @vf: pointer to the VF info |
5c3c48ac JB |
1802 | * @msg: pointer to the msg buffer |
1803 | * @msglen: msg length | |
1804 | * | |
b40c82e6 | 1805 | * called from the VF to get vsi stats |
5c3c48ac JB |
1806 | **/ |
1807 | static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1808 | { | |
1809 | struct i40e_virtchnl_queue_select *vqs = | |
1810 | (struct i40e_virtchnl_queue_select *)msg; | |
1811 | struct i40e_pf *pf = vf->pf; | |
1812 | struct i40e_eth_stats stats; | |
1813 | i40e_status aq_ret = 0; | |
1814 | struct i40e_vsi *vsi; | |
1815 | ||
1816 | memset(&stats, 0, sizeof(struct i40e_eth_stats)); | |
1817 | ||
1818 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { | |
1819 | aq_ret = I40E_ERR_PARAM; | |
1820 | goto error_param; | |
1821 | } | |
1822 | ||
1823 | if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) { | |
1824 | aq_ret = I40E_ERR_PARAM; | |
1825 | goto error_param; | |
1826 | } | |
1827 | ||
fdf0e0bf | 1828 | vsi = pf->vsi[vf->lan_vsi_idx]; |
5c3c48ac JB |
1829 | if (!vsi) { |
1830 | aq_ret = I40E_ERR_PARAM; | |
1831 | goto error_param; | |
1832 | } | |
1833 | i40e_update_eth_stats(vsi); | |
5a9769c8 | 1834 | stats = vsi->eth_stats; |
5c3c48ac JB |
1835 | |
1836 | error_param: | |
b40c82e6 | 1837 | /* send the response back to the VF */ |
5c3c48ac JB |
1838 | return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS, aq_ret, |
1839 | (u8 *)&stats, sizeof(stats)); | |
1840 | } | |
1841 | ||
5f527ba9 ASJ |
1842 | /* If the VF is not trusted restrict the number of MAC/VLAN it can program */ |
1843 | #define I40E_VC_MAX_MAC_ADDR_PER_VF 8 | |
1844 | #define I40E_VC_MAX_VLAN_PER_VF 8 | |
1845 | ||
f657a6e1 GR |
1846 | /** |
1847 | * i40e_check_vf_permission | |
b40c82e6 | 1848 | * @vf: pointer to the VF info |
f657a6e1 GR |
1849 | * @macaddr: pointer to the MAC Address being checked |
1850 | * | |
1851 | * Check if the VF has permission to add or delete unicast MAC address | |
1852 | * filters and return error code -EPERM if not. Then check if the | |
1853 | * address filter requested is broadcast or zero and if so return | |
1854 | * an invalid MAC address error code. | |
1855 | **/ | |
1856 | static inline int i40e_check_vf_permission(struct i40e_vf *vf, u8 *macaddr) | |
1857 | { | |
1858 | struct i40e_pf *pf = vf->pf; | |
1859 | int ret = 0; | |
1860 | ||
1861 | if (is_broadcast_ether_addr(macaddr) || | |
1862 | is_zero_ether_addr(macaddr)) { | |
1863 | dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n", macaddr); | |
1864 | ret = I40E_ERR_INVALID_MAC_ADDR; | |
5017c2a8 | 1865 | } else if (vf->pf_set_mac && !is_multicast_ether_addr(macaddr) && |
692fb0a7 | 1866 | !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) && |
5017c2a8 | 1867 | !ether_addr_equal(macaddr, vf->default_lan_addr.addr)) { |
f657a6e1 GR |
1868 | /* If the host VMM administrator has set the VF MAC address |
1869 | * administratively via the ndo_set_vf_mac command then deny | |
1870 | * permission to the VF to add or delete unicast MAC addresses. | |
692fb0a7 | 1871 | * Unless the VF is privileged and then it can do whatever. |
5017c2a8 GR |
1872 | * The VF may request to set the MAC address filter already |
1873 | * assigned to it so do not return an error in that case. | |
f657a6e1 GR |
1874 | */ |
1875 | dev_err(&pf->pdev->dev, | |
692fb0a7 | 1876 | "VF attempting to override administratively set MAC address, reload the VF driver to resume normal operation\n"); |
f657a6e1 | 1877 | ret = -EPERM; |
5f527ba9 ASJ |
1878 | } else if ((vf->num_mac >= I40E_VC_MAX_MAC_ADDR_PER_VF) && |
1879 | !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) { | |
1880 | dev_err(&pf->pdev->dev, | |
1881 | "VF is not trusted, switch the VF to trusted to add more functionality\n"); | |
1882 | ret = -EPERM; | |
f657a6e1 GR |
1883 | } |
1884 | return ret; | |
1885 | } | |
1886 | ||
5c3c48ac JB |
1887 | /** |
1888 | * i40e_vc_add_mac_addr_msg | |
b40c82e6 | 1889 | * @vf: pointer to the VF info |
5c3c48ac JB |
1890 | * @msg: pointer to the msg buffer |
1891 | * @msglen: msg length | |
1892 | * | |
1893 | * add guest mac address filter | |
1894 | **/ | |
1895 | static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1896 | { | |
1897 | struct i40e_virtchnl_ether_addr_list *al = | |
1898 | (struct i40e_virtchnl_ether_addr_list *)msg; | |
1899 | struct i40e_pf *pf = vf->pf; | |
1900 | struct i40e_vsi *vsi = NULL; | |
1901 | u16 vsi_id = al->vsi_id; | |
f657a6e1 | 1902 | i40e_status ret = 0; |
5c3c48ac JB |
1903 | int i; |
1904 | ||
1905 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
5c3c48ac | 1906 | !i40e_vc_isvalid_vsi_id(vf, vsi_id)) { |
f657a6e1 | 1907 | ret = I40E_ERR_PARAM; |
5c3c48ac JB |
1908 | goto error_param; |
1909 | } | |
1910 | ||
1911 | for (i = 0; i < al->num_elements; i++) { | |
f657a6e1 GR |
1912 | ret = i40e_check_vf_permission(vf, al->list[i].addr); |
1913 | if (ret) | |
5c3c48ac | 1914 | goto error_param; |
5c3c48ac | 1915 | } |
fdf0e0bf | 1916 | vsi = pf->vsi[vf->lan_vsi_idx]; |
5c3c48ac | 1917 | |
21659035 KP |
1918 | /* Lock once, because all function inside for loop accesses VSI's |
1919 | * MAC filter list which needs to be protected using same lock. | |
1920 | */ | |
1921 | spin_lock_bh(&vsi->mac_filter_list_lock); | |
1922 | ||
5c3c48ac JB |
1923 | /* add new addresses to the list */ |
1924 | for (i = 0; i < al->num_elements; i++) { | |
1925 | struct i40e_mac_filter *f; | |
1926 | ||
1927 | f = i40e_find_mac(vsi, al->list[i].addr, true, false); | |
7e68edf9 | 1928 | if (!f) { |
5c3c48ac JB |
1929 | if (i40e_is_vsi_in_vlan(vsi)) |
1930 | f = i40e_put_mac_in_vlan(vsi, al->list[i].addr, | |
1931 | true, false); | |
1932 | else | |
1933 | f = i40e_add_filter(vsi, al->list[i].addr, -1, | |
1934 | true, false); | |
1935 | } | |
1936 | ||
1937 | if (!f) { | |
1938 | dev_err(&pf->pdev->dev, | |
8d8f2295 MW |
1939 | "Unable to add MAC filter %pM for VF %d\n", |
1940 | al->list[i].addr, vf->vf_id); | |
f657a6e1 | 1941 | ret = I40E_ERR_PARAM; |
21659035 | 1942 | spin_unlock_bh(&vsi->mac_filter_list_lock); |
5c3c48ac | 1943 | goto error_param; |
5f527ba9 ASJ |
1944 | } else { |
1945 | vf->num_mac++; | |
5c3c48ac JB |
1946 | } |
1947 | } | |
21659035 | 1948 | spin_unlock_bh(&vsi->mac_filter_list_lock); |
5c3c48ac JB |
1949 | |
1950 | /* program the updated filter list */ | |
ea02e90b MW |
1951 | ret = i40e_sync_vsi_filters(vsi); |
1952 | if (ret) | |
1953 | dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n", | |
1954 | vf->vf_id, ret); | |
5c3c48ac JB |
1955 | |
1956 | error_param: | |
b40c82e6 | 1957 | /* send the response to the VF */ |
5c3c48ac | 1958 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS, |
f657a6e1 | 1959 | ret); |
5c3c48ac JB |
1960 | } |
1961 | ||
1962 | /** | |
1963 | * i40e_vc_del_mac_addr_msg | |
b40c82e6 | 1964 | * @vf: pointer to the VF info |
5c3c48ac JB |
1965 | * @msg: pointer to the msg buffer |
1966 | * @msglen: msg length | |
1967 | * | |
1968 | * remove guest mac address filter | |
1969 | **/ | |
1970 | static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1971 | { | |
1972 | struct i40e_virtchnl_ether_addr_list *al = | |
1973 | (struct i40e_virtchnl_ether_addr_list *)msg; | |
1974 | struct i40e_pf *pf = vf->pf; | |
1975 | struct i40e_vsi *vsi = NULL; | |
1976 | u16 vsi_id = al->vsi_id; | |
f657a6e1 | 1977 | i40e_status ret = 0; |
5c3c48ac JB |
1978 | int i; |
1979 | ||
1980 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
5c3c48ac | 1981 | !i40e_vc_isvalid_vsi_id(vf, vsi_id)) { |
f657a6e1 | 1982 | ret = I40E_ERR_PARAM; |
5c3c48ac JB |
1983 | goto error_param; |
1984 | } | |
f657a6e1 GR |
1985 | |
1986 | for (i = 0; i < al->num_elements; i++) { | |
700bbf6c MW |
1987 | if (is_broadcast_ether_addr(al->list[i].addr) || |
1988 | is_zero_ether_addr(al->list[i].addr)) { | |
8d8f2295 MW |
1989 | dev_err(&pf->pdev->dev, "Invalid MAC addr %pM for VF %d\n", |
1990 | al->list[i].addr, vf->vf_id); | |
700bbf6c | 1991 | ret = I40E_ERR_INVALID_MAC_ADDR; |
f657a6e1 | 1992 | goto error_param; |
700bbf6c | 1993 | } |
f657a6e1 | 1994 | } |
fdf0e0bf | 1995 | vsi = pf->vsi[vf->lan_vsi_idx]; |
5c3c48ac | 1996 | |
21659035 | 1997 | spin_lock_bh(&vsi->mac_filter_list_lock); |
5c3c48ac JB |
1998 | /* delete addresses from the list */ |
1999 | for (i = 0; i < al->num_elements; i++) | |
b36e9ab5 MW |
2000 | if (i40e_del_mac_all_vlan(vsi, al->list[i].addr, true, false)) { |
2001 | ret = I40E_ERR_INVALID_MAC_ADDR; | |
2002 | spin_unlock_bh(&vsi->mac_filter_list_lock); | |
2003 | goto error_param; | |
5f527ba9 ASJ |
2004 | } else { |
2005 | vf->num_mac--; | |
b36e9ab5 MW |
2006 | } |
2007 | ||
21659035 | 2008 | spin_unlock_bh(&vsi->mac_filter_list_lock); |
5c3c48ac JB |
2009 | |
2010 | /* program the updated filter list */ | |
ea02e90b MW |
2011 | ret = i40e_sync_vsi_filters(vsi); |
2012 | if (ret) | |
2013 | dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n", | |
2014 | vf->vf_id, ret); | |
5c3c48ac JB |
2015 | |
2016 | error_param: | |
b40c82e6 | 2017 | /* send the response to the VF */ |
5c3c48ac | 2018 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS, |
f657a6e1 | 2019 | ret); |
5c3c48ac JB |
2020 | } |
2021 | ||
2022 | /** | |
2023 | * i40e_vc_add_vlan_msg | |
b40c82e6 | 2024 | * @vf: pointer to the VF info |
5c3c48ac JB |
2025 | * @msg: pointer to the msg buffer |
2026 | * @msglen: msg length | |
2027 | * | |
2028 | * program guest vlan id | |
2029 | **/ | |
2030 | static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
2031 | { | |
2032 | struct i40e_virtchnl_vlan_filter_list *vfl = | |
2033 | (struct i40e_virtchnl_vlan_filter_list *)msg; | |
2034 | struct i40e_pf *pf = vf->pf; | |
2035 | struct i40e_vsi *vsi = NULL; | |
2036 | u16 vsi_id = vfl->vsi_id; | |
2037 | i40e_status aq_ret = 0; | |
2038 | int i; | |
2039 | ||
5f527ba9 ASJ |
2040 | if ((vf->num_vlan >= I40E_VC_MAX_VLAN_PER_VF) && |
2041 | !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) { | |
2042 | dev_err(&pf->pdev->dev, | |
2043 | "VF is not trusted, switch the VF to trusted to add more VLAN addresses\n"); | |
2044 | goto error_param; | |
2045 | } | |
5c3c48ac | 2046 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || |
5c3c48ac JB |
2047 | !i40e_vc_isvalid_vsi_id(vf, vsi_id)) { |
2048 | aq_ret = I40E_ERR_PARAM; | |
2049 | goto error_param; | |
2050 | } | |
2051 | ||
2052 | for (i = 0; i < vfl->num_elements; i++) { | |
2053 | if (vfl->vlan_id[i] > I40E_MAX_VLANID) { | |
2054 | aq_ret = I40E_ERR_PARAM; | |
2055 | dev_err(&pf->pdev->dev, | |
2056 | "invalid VF VLAN id %d\n", vfl->vlan_id[i]); | |
2057 | goto error_param; | |
2058 | } | |
2059 | } | |
fdf0e0bf | 2060 | vsi = pf->vsi[vf->lan_vsi_idx]; |
5c3c48ac JB |
2061 | if (vsi->info.pvid) { |
2062 | aq_ret = I40E_ERR_PARAM; | |
2063 | goto error_param; | |
2064 | } | |
2065 | ||
2066 | i40e_vlan_stripping_enable(vsi); | |
2067 | for (i = 0; i < vfl->num_elements; i++) { | |
2068 | /* add new VLAN filter */ | |
2069 | int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]); | |
5f527ba9 ASJ |
2070 | if (!ret) |
2071 | vf->num_vlan++; | |
6995b36c | 2072 | |
5676a8b9 ASJ |
2073 | if (test_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states)) |
2074 | i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid, | |
2075 | true, | |
2076 | vfl->vlan_id[i], | |
2077 | NULL); | |
2078 | if (test_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states)) | |
2079 | i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid, | |
2080 | true, | |
2081 | vfl->vlan_id[i], | |
2082 | NULL); | |
2083 | ||
5c3c48ac JB |
2084 | if (ret) |
2085 | dev_err(&pf->pdev->dev, | |
8d8f2295 MW |
2086 | "Unable to add VLAN filter %d for VF %d, error %d\n", |
2087 | vfl->vlan_id[i], vf->vf_id, ret); | |
5c3c48ac JB |
2088 | } |
2089 | ||
2090 | error_param: | |
b40c82e6 | 2091 | /* send the response to the VF */ |
5c3c48ac JB |
2092 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN, aq_ret); |
2093 | } | |
2094 | ||
2095 | /** | |
2096 | * i40e_vc_remove_vlan_msg | |
b40c82e6 | 2097 | * @vf: pointer to the VF info |
5c3c48ac JB |
2098 | * @msg: pointer to the msg buffer |
2099 | * @msglen: msg length | |
2100 | * | |
2101 | * remove programmed guest vlan id | |
2102 | **/ | |
2103 | static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
2104 | { | |
2105 | struct i40e_virtchnl_vlan_filter_list *vfl = | |
2106 | (struct i40e_virtchnl_vlan_filter_list *)msg; | |
2107 | struct i40e_pf *pf = vf->pf; | |
2108 | struct i40e_vsi *vsi = NULL; | |
2109 | u16 vsi_id = vfl->vsi_id; | |
2110 | i40e_status aq_ret = 0; | |
2111 | int i; | |
2112 | ||
2113 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
5c3c48ac JB |
2114 | !i40e_vc_isvalid_vsi_id(vf, vsi_id)) { |
2115 | aq_ret = I40E_ERR_PARAM; | |
2116 | goto error_param; | |
2117 | } | |
2118 | ||
2119 | for (i = 0; i < vfl->num_elements; i++) { | |
2120 | if (vfl->vlan_id[i] > I40E_MAX_VLANID) { | |
2121 | aq_ret = I40E_ERR_PARAM; | |
2122 | goto error_param; | |
2123 | } | |
2124 | } | |
2125 | ||
fdf0e0bf | 2126 | vsi = pf->vsi[vf->lan_vsi_idx]; |
5c3c48ac JB |
2127 | if (vsi->info.pvid) { |
2128 | aq_ret = I40E_ERR_PARAM; | |
2129 | goto error_param; | |
2130 | } | |
2131 | ||
2132 | for (i = 0; i < vfl->num_elements; i++) { | |
2133 | int ret = i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]); | |
5f527ba9 ASJ |
2134 | if (!ret) |
2135 | vf->num_vlan--; | |
6995b36c | 2136 | |
5676a8b9 ASJ |
2137 | if (test_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states)) |
2138 | i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid, | |
2139 | false, | |
2140 | vfl->vlan_id[i], | |
2141 | NULL); | |
2142 | if (test_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states)) | |
2143 | i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid, | |
2144 | false, | |
2145 | vfl->vlan_id[i], | |
2146 | NULL); | |
2147 | ||
5c3c48ac JB |
2148 | if (ret) |
2149 | dev_err(&pf->pdev->dev, | |
8d8f2295 MW |
2150 | "Unable to delete VLAN filter %d for VF %d, error %d\n", |
2151 | vfl->vlan_id[i], vf->vf_id, ret); | |
5c3c48ac JB |
2152 | } |
2153 | ||
2154 | error_param: | |
b40c82e6 | 2155 | /* send the response to the VF */ |
5c3c48ac JB |
2156 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN, aq_ret); |
2157 | } | |
2158 | ||
e3219ce6 ASJ |
2159 | /** |
2160 | * i40e_vc_iwarp_msg | |
2161 | * @vf: pointer to the VF info | |
2162 | * @msg: pointer to the msg buffer | |
2163 | * @msglen: msg length | |
2164 | * | |
2165 | * called from the VF for the iwarp msgs | |
2166 | **/ | |
2167 | static int i40e_vc_iwarp_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
2168 | { | |
2169 | struct i40e_pf *pf = vf->pf; | |
2170 | int abs_vf_id = vf->vf_id + pf->hw.func_caps.vf_base_id; | |
2171 | i40e_status aq_ret = 0; | |
2172 | ||
2173 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
2174 | !test_bit(I40E_VF_STAT_IWARPENA, &vf->vf_states)) { | |
2175 | aq_ret = I40E_ERR_PARAM; | |
2176 | goto error_param; | |
2177 | } | |
2178 | ||
2179 | i40e_notify_client_of_vf_msg(pf->vsi[pf->lan_vsi], abs_vf_id, | |
2180 | msg, msglen); | |
2181 | ||
2182 | error_param: | |
2183 | /* send the response to the VF */ | |
2184 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_IWARP, | |
2185 | aq_ret); | |
2186 | } | |
2187 | ||
2188 | /** | |
2189 | * i40e_vc_iwarp_qvmap_msg | |
2190 | * @vf: pointer to the VF info | |
2191 | * @msg: pointer to the msg buffer | |
2192 | * @msglen: msg length | |
2193 | * @config: config qvmap or release it | |
2194 | * | |
2195 | * called from the VF for the iwarp msgs | |
2196 | **/ | |
2197 | static int i40e_vc_iwarp_qvmap_msg(struct i40e_vf *vf, u8 *msg, u16 msglen, | |
2198 | bool config) | |
2199 | { | |
2200 | struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info = | |
2201 | (struct i40e_virtchnl_iwarp_qvlist_info *)msg; | |
2202 | i40e_status aq_ret = 0; | |
2203 | ||
2204 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
2205 | !test_bit(I40E_VF_STAT_IWARPENA, &vf->vf_states)) { | |
2206 | aq_ret = I40E_ERR_PARAM; | |
2207 | goto error_param; | |
2208 | } | |
2209 | ||
2210 | if (config) { | |
2211 | if (i40e_config_iwarp_qvlist(vf, qvlist_info)) | |
2212 | aq_ret = I40E_ERR_PARAM; | |
2213 | } else { | |
2214 | i40e_release_iwarp_qvlist(vf); | |
2215 | } | |
2216 | ||
2217 | error_param: | |
2218 | /* send the response to the VF */ | |
2219 | return i40e_vc_send_resp_to_vf(vf, | |
2220 | config ? I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP : | |
2221 | I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP, | |
2222 | aq_ret); | |
2223 | } | |
2224 | ||
c4e1868c MW |
2225 | /** |
2226 | * i40e_vc_config_rss_key | |
2227 | * @vf: pointer to the VF info | |
2228 | * @msg: pointer to the msg buffer | |
2229 | * @msglen: msg length | |
2230 | * | |
2231 | * Configure the VF's RSS key | |
2232 | **/ | |
2233 | static int i40e_vc_config_rss_key(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
2234 | { | |
2235 | struct i40e_virtchnl_rss_key *vrk = | |
2236 | (struct i40e_virtchnl_rss_key *)msg; | |
2237 | struct i40e_pf *pf = vf->pf; | |
2238 | struct i40e_vsi *vsi = NULL; | |
2239 | u16 vsi_id = vrk->vsi_id; | |
2240 | i40e_status aq_ret = 0; | |
2241 | ||
2242 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
c4e1868c MW |
2243 | !i40e_vc_isvalid_vsi_id(vf, vsi_id) || |
2244 | (vrk->key_len != I40E_HKEY_ARRAY_SIZE)) { | |
2245 | aq_ret = I40E_ERR_PARAM; | |
2246 | goto err; | |
2247 | } | |
2248 | ||
2249 | vsi = pf->vsi[vf->lan_vsi_idx]; | |
2250 | aq_ret = i40e_config_rss(vsi, vrk->key, NULL, 0); | |
2251 | err: | |
2252 | /* send the response to the VF */ | |
2253 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_RSS_KEY, | |
2254 | aq_ret); | |
2255 | } | |
2256 | ||
2257 | /** | |
2258 | * i40e_vc_config_rss_lut | |
2259 | * @vf: pointer to the VF info | |
2260 | * @msg: pointer to the msg buffer | |
2261 | * @msglen: msg length | |
2262 | * | |
2263 | * Configure the VF's RSS LUT | |
2264 | **/ | |
2265 | static int i40e_vc_config_rss_lut(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
2266 | { | |
2267 | struct i40e_virtchnl_rss_lut *vrl = | |
2268 | (struct i40e_virtchnl_rss_lut *)msg; | |
2269 | struct i40e_pf *pf = vf->pf; | |
2270 | struct i40e_vsi *vsi = NULL; | |
2271 | u16 vsi_id = vrl->vsi_id; | |
2272 | i40e_status aq_ret = 0; | |
2273 | ||
2274 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
c4e1868c MW |
2275 | !i40e_vc_isvalid_vsi_id(vf, vsi_id) || |
2276 | (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)) { | |
2277 | aq_ret = I40E_ERR_PARAM; | |
2278 | goto err; | |
2279 | } | |
2280 | ||
2281 | vsi = pf->vsi[vf->lan_vsi_idx]; | |
2282 | aq_ret = i40e_config_rss(vsi, NULL, vrl->lut, I40E_VF_HLUT_ARRAY_SIZE); | |
2283 | /* send the response to the VF */ | |
2284 | err: | |
2285 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_RSS_LUT, | |
2286 | aq_ret); | |
2287 | } | |
2288 | ||
2289 | /** | |
2290 | * i40e_vc_get_rss_hena | |
2291 | * @vf: pointer to the VF info | |
2292 | * @msg: pointer to the msg buffer | |
2293 | * @msglen: msg length | |
2294 | * | |
2295 | * Return the RSS HENA bits allowed by the hardware | |
2296 | **/ | |
2297 | static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
2298 | { | |
2299 | struct i40e_virtchnl_rss_hena *vrh = NULL; | |
2300 | struct i40e_pf *pf = vf->pf; | |
2301 | i40e_status aq_ret = 0; | |
2302 | int len = 0; | |
2303 | ||
692fb0a7 | 2304 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { |
c4e1868c MW |
2305 | aq_ret = I40E_ERR_PARAM; |
2306 | goto err; | |
2307 | } | |
2308 | len = sizeof(struct i40e_virtchnl_rss_hena); | |
2309 | ||
2310 | vrh = kzalloc(len, GFP_KERNEL); | |
2311 | if (!vrh) { | |
2312 | aq_ret = I40E_ERR_NO_MEMORY; | |
2313 | len = 0; | |
2314 | goto err; | |
2315 | } | |
2316 | vrh->hena = i40e_pf_get_default_rss_hena(pf); | |
2317 | err: | |
2318 | /* send the response back to the VF */ | |
2319 | aq_ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_RSS_HENA_CAPS, | |
2320 | aq_ret, (u8 *)vrh, len); | |
2321 | return aq_ret; | |
2322 | } | |
2323 | ||
2324 | /** | |
2325 | * i40e_vc_set_rss_hena | |
2326 | * @vf: pointer to the VF info | |
2327 | * @msg: pointer to the msg buffer | |
2328 | * @msglen: msg length | |
2329 | * | |
2330 | * Set the RSS HENA bits for the VF | |
2331 | **/ | |
2332 | static int i40e_vc_set_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
2333 | { | |
2334 | struct i40e_virtchnl_rss_hena *vrh = | |
2335 | (struct i40e_virtchnl_rss_hena *)msg; | |
2336 | struct i40e_pf *pf = vf->pf; | |
2337 | struct i40e_hw *hw = &pf->hw; | |
2338 | i40e_status aq_ret = 0; | |
2339 | ||
692fb0a7 | 2340 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { |
c4e1868c MW |
2341 | aq_ret = I40E_ERR_PARAM; |
2342 | goto err; | |
2343 | } | |
2344 | i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)vrh->hena); | |
2345 | i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_id), | |
2346 | (u32)(vrh->hena >> 32)); | |
2347 | ||
2348 | /* send the response to the VF */ | |
2349 | err: | |
2350 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_SET_RSS_HENA, | |
2351 | aq_ret); | |
2352 | } | |
2353 | ||
5c3c48ac JB |
2354 | /** |
2355 | * i40e_vc_validate_vf_msg | |
b40c82e6 | 2356 | * @vf: pointer to the VF info |
5c3c48ac JB |
2357 | * @msg: pointer to the msg buffer |
2358 | * @msglen: msg length | |
2359 | * @msghndl: msg handle | |
2360 | * | |
2361 | * validate msg | |
2362 | **/ | |
2363 | static int i40e_vc_validate_vf_msg(struct i40e_vf *vf, u32 v_opcode, | |
2364 | u32 v_retval, u8 *msg, u16 msglen) | |
2365 | { | |
2366 | bool err_msg_format = false; | |
3ed439c5 | 2367 | int valid_len = 0; |
5c3c48ac JB |
2368 | |
2369 | /* Check if VF is disabled. */ | |
2370 | if (test_bit(I40E_VF_STAT_DISABLED, &vf->vf_states)) | |
2371 | return I40E_ERR_PARAM; | |
2372 | ||
2373 | /* Validate message length. */ | |
2374 | switch (v_opcode) { | |
2375 | case I40E_VIRTCHNL_OP_VERSION: | |
2376 | valid_len = sizeof(struct i40e_virtchnl_version_info); | |
2377 | break; | |
2378 | case I40E_VIRTCHNL_OP_RESET_VF: | |
5c3c48ac | 2379 | break; |
f4ca1a22 MW |
2380 | case I40E_VIRTCHNL_OP_GET_VF_RESOURCES: |
2381 | if (VF_IS_V11(vf)) | |
2382 | valid_len = sizeof(u32); | |
f4ca1a22 | 2383 | break; |
5c3c48ac JB |
2384 | case I40E_VIRTCHNL_OP_CONFIG_TX_QUEUE: |
2385 | valid_len = sizeof(struct i40e_virtchnl_txq_info); | |
2386 | break; | |
2387 | case I40E_VIRTCHNL_OP_CONFIG_RX_QUEUE: | |
2388 | valid_len = sizeof(struct i40e_virtchnl_rxq_info); | |
2389 | break; | |
2390 | case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES: | |
2391 | valid_len = sizeof(struct i40e_virtchnl_vsi_queue_config_info); | |
2392 | if (msglen >= valid_len) { | |
2393 | struct i40e_virtchnl_vsi_queue_config_info *vqc = | |
2394 | (struct i40e_virtchnl_vsi_queue_config_info *)msg; | |
2395 | valid_len += (vqc->num_queue_pairs * | |
2396 | sizeof(struct | |
2397 | i40e_virtchnl_queue_pair_info)); | |
2398 | if (vqc->num_queue_pairs == 0) | |
2399 | err_msg_format = true; | |
2400 | } | |
2401 | break; | |
2402 | case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP: | |
2403 | valid_len = sizeof(struct i40e_virtchnl_irq_map_info); | |
2404 | if (msglen >= valid_len) { | |
2405 | struct i40e_virtchnl_irq_map_info *vimi = | |
2406 | (struct i40e_virtchnl_irq_map_info *)msg; | |
2407 | valid_len += (vimi->num_vectors * | |
2408 | sizeof(struct i40e_virtchnl_vector_map)); | |
2409 | if (vimi->num_vectors == 0) | |
2410 | err_msg_format = true; | |
2411 | } | |
2412 | break; | |
2413 | case I40E_VIRTCHNL_OP_ENABLE_QUEUES: | |
2414 | case I40E_VIRTCHNL_OP_DISABLE_QUEUES: | |
2415 | valid_len = sizeof(struct i40e_virtchnl_queue_select); | |
2416 | break; | |
2417 | case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS: | |
2418 | case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS: | |
2419 | valid_len = sizeof(struct i40e_virtchnl_ether_addr_list); | |
2420 | if (msglen >= valid_len) { | |
2421 | struct i40e_virtchnl_ether_addr_list *veal = | |
2422 | (struct i40e_virtchnl_ether_addr_list *)msg; | |
2423 | valid_len += veal->num_elements * | |
2424 | sizeof(struct i40e_virtchnl_ether_addr); | |
2425 | if (veal->num_elements == 0) | |
2426 | err_msg_format = true; | |
2427 | } | |
2428 | break; | |
2429 | case I40E_VIRTCHNL_OP_ADD_VLAN: | |
2430 | case I40E_VIRTCHNL_OP_DEL_VLAN: | |
2431 | valid_len = sizeof(struct i40e_virtchnl_vlan_filter_list); | |
2432 | if (msglen >= valid_len) { | |
2433 | struct i40e_virtchnl_vlan_filter_list *vfl = | |
2434 | (struct i40e_virtchnl_vlan_filter_list *)msg; | |
2435 | valid_len += vfl->num_elements * sizeof(u16); | |
2436 | if (vfl->num_elements == 0) | |
2437 | err_msg_format = true; | |
2438 | } | |
2439 | break; | |
2440 | case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE: | |
2441 | valid_len = sizeof(struct i40e_virtchnl_promisc_info); | |
2442 | break; | |
2443 | case I40E_VIRTCHNL_OP_GET_STATS: | |
2444 | valid_len = sizeof(struct i40e_virtchnl_queue_select); | |
2445 | break; | |
e3219ce6 ASJ |
2446 | case I40E_VIRTCHNL_OP_IWARP: |
2447 | /* These messages are opaque to us and will be validated in | |
2448 | * the RDMA client code. We just need to check for nonzero | |
2449 | * length. The firmware will enforce max length restrictions. | |
2450 | */ | |
2451 | if (msglen) | |
2452 | valid_len = msglen; | |
2453 | else | |
2454 | err_msg_format = true; | |
2455 | break; | |
2456 | case I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP: | |
2457 | valid_len = 0; | |
2458 | break; | |
2459 | case I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP: | |
2460 | valid_len = sizeof(struct i40e_virtchnl_iwarp_qvlist_info); | |
2461 | if (msglen >= valid_len) { | |
2462 | struct i40e_virtchnl_iwarp_qvlist_info *qv = | |
2463 | (struct i40e_virtchnl_iwarp_qvlist_info *)msg; | |
2464 | if (qv->num_vectors == 0) { | |
2465 | err_msg_format = true; | |
2466 | break; | |
2467 | } | |
2468 | valid_len += ((qv->num_vectors - 1) * | |
2469 | sizeof(struct i40e_virtchnl_iwarp_qv_info)); | |
2470 | } | |
2471 | break; | |
c4e1868c MW |
2472 | case I40E_VIRTCHNL_OP_CONFIG_RSS_KEY: |
2473 | valid_len = sizeof(struct i40e_virtchnl_rss_key); | |
2474 | if (msglen >= valid_len) { | |
2475 | struct i40e_virtchnl_rss_key *vrk = | |
2476 | (struct i40e_virtchnl_rss_key *)msg; | |
2477 | if (vrk->key_len != I40E_HKEY_ARRAY_SIZE) { | |
2478 | err_msg_format = true; | |
2479 | break; | |
2480 | } | |
2481 | valid_len += vrk->key_len - 1; | |
2482 | } | |
2483 | break; | |
2484 | case I40E_VIRTCHNL_OP_CONFIG_RSS_LUT: | |
2485 | valid_len = sizeof(struct i40e_virtchnl_rss_lut); | |
2486 | if (msglen >= valid_len) { | |
2487 | struct i40e_virtchnl_rss_lut *vrl = | |
2488 | (struct i40e_virtchnl_rss_lut *)msg; | |
2489 | if (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE) { | |
2490 | err_msg_format = true; | |
2491 | break; | |
2492 | } | |
2493 | valid_len += vrl->lut_entries - 1; | |
2494 | } | |
2495 | break; | |
2496 | case I40E_VIRTCHNL_OP_GET_RSS_HENA_CAPS: | |
c4e1868c MW |
2497 | break; |
2498 | case I40E_VIRTCHNL_OP_SET_RSS_HENA: | |
2499 | valid_len = sizeof(struct i40e_virtchnl_rss_hena); | |
2500 | break; | |
5c3c48ac JB |
2501 | /* These are always errors coming from the VF. */ |
2502 | case I40E_VIRTCHNL_OP_EVENT: | |
2503 | case I40E_VIRTCHNL_OP_UNKNOWN: | |
2504 | default: | |
2505 | return -EPERM; | |
5c3c48ac JB |
2506 | } |
2507 | /* few more checks */ | |
2508 | if ((valid_len != msglen) || (err_msg_format)) { | |
2509 | i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM); | |
2510 | return -EINVAL; | |
2511 | } else { | |
2512 | return 0; | |
2513 | } | |
2514 | } | |
2515 | ||
2516 | /** | |
2517 | * i40e_vc_process_vf_msg | |
b40c82e6 JK |
2518 | * @pf: pointer to the PF structure |
2519 | * @vf_id: source VF id | |
5c3c48ac JB |
2520 | * @msg: pointer to the msg buffer |
2521 | * @msglen: msg length | |
2522 | * @msghndl: msg handle | |
2523 | * | |
2524 | * called from the common aeq/arq handler to | |
b40c82e6 | 2525 | * process request from VF |
5c3c48ac | 2526 | **/ |
a1b5a24f | 2527 | int i40e_vc_process_vf_msg(struct i40e_pf *pf, s16 vf_id, u32 v_opcode, |
5c3c48ac JB |
2528 | u32 v_retval, u8 *msg, u16 msglen) |
2529 | { | |
5c3c48ac | 2530 | struct i40e_hw *hw = &pf->hw; |
a1b5a24f | 2531 | int local_vf_id = vf_id - (s16)hw->func_caps.vf_base_id; |
6c1b5bff | 2532 | struct i40e_vf *vf; |
5c3c48ac JB |
2533 | int ret; |
2534 | ||
2535 | pf->vf_aq_requests++; | |
7efa84b7 | 2536 | if (local_vf_id >= pf->num_alloc_vfs) |
6c1b5bff | 2537 | return -EINVAL; |
7efa84b7 | 2538 | vf = &(pf->vf[local_vf_id]); |
5c3c48ac JB |
2539 | /* perform basic checks on the msg */ |
2540 | ret = i40e_vc_validate_vf_msg(vf, v_opcode, v_retval, msg, msglen); | |
2541 | ||
2542 | if (ret) { | |
b40c82e6 | 2543 | dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n", |
7efa84b7 | 2544 | local_vf_id, v_opcode, msglen); |
5c3c48ac JB |
2545 | return ret; |
2546 | } | |
bae3cae4 | 2547 | |
5c3c48ac JB |
2548 | switch (v_opcode) { |
2549 | case I40E_VIRTCHNL_OP_VERSION: | |
f4ca1a22 | 2550 | ret = i40e_vc_get_version_msg(vf, msg); |
5c3c48ac JB |
2551 | break; |
2552 | case I40E_VIRTCHNL_OP_GET_VF_RESOURCES: | |
f4ca1a22 | 2553 | ret = i40e_vc_get_vf_resources_msg(vf, msg); |
5c3c48ac JB |
2554 | break; |
2555 | case I40E_VIRTCHNL_OP_RESET_VF: | |
fc18eaa0 MW |
2556 | i40e_vc_reset_vf_msg(vf); |
2557 | ret = 0; | |
5c3c48ac JB |
2558 | break; |
2559 | case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE: | |
2560 | ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen); | |
2561 | break; | |
2562 | case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES: | |
2563 | ret = i40e_vc_config_queues_msg(vf, msg, msglen); | |
2564 | break; | |
2565 | case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP: | |
2566 | ret = i40e_vc_config_irq_map_msg(vf, msg, msglen); | |
2567 | break; | |
2568 | case I40E_VIRTCHNL_OP_ENABLE_QUEUES: | |
2569 | ret = i40e_vc_enable_queues_msg(vf, msg, msglen); | |
055b295d | 2570 | i40e_vc_notify_vf_link_state(vf); |
5c3c48ac JB |
2571 | break; |
2572 | case I40E_VIRTCHNL_OP_DISABLE_QUEUES: | |
2573 | ret = i40e_vc_disable_queues_msg(vf, msg, msglen); | |
2574 | break; | |
2575 | case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS: | |
2576 | ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen); | |
2577 | break; | |
2578 | case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS: | |
2579 | ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen); | |
2580 | break; | |
2581 | case I40E_VIRTCHNL_OP_ADD_VLAN: | |
2582 | ret = i40e_vc_add_vlan_msg(vf, msg, msglen); | |
2583 | break; | |
2584 | case I40E_VIRTCHNL_OP_DEL_VLAN: | |
2585 | ret = i40e_vc_remove_vlan_msg(vf, msg, msglen); | |
2586 | break; | |
2587 | case I40E_VIRTCHNL_OP_GET_STATS: | |
2588 | ret = i40e_vc_get_stats_msg(vf, msg, msglen); | |
2589 | break; | |
e3219ce6 ASJ |
2590 | case I40E_VIRTCHNL_OP_IWARP: |
2591 | ret = i40e_vc_iwarp_msg(vf, msg, msglen); | |
2592 | break; | |
2593 | case I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP: | |
2594 | ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, true); | |
2595 | break; | |
2596 | case I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP: | |
2597 | ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, false); | |
2598 | break; | |
c4e1868c MW |
2599 | case I40E_VIRTCHNL_OP_CONFIG_RSS_KEY: |
2600 | ret = i40e_vc_config_rss_key(vf, msg, msglen); | |
2601 | break; | |
2602 | case I40E_VIRTCHNL_OP_CONFIG_RSS_LUT: | |
2603 | ret = i40e_vc_config_rss_lut(vf, msg, msglen); | |
2604 | break; | |
2605 | case I40E_VIRTCHNL_OP_GET_RSS_HENA_CAPS: | |
2606 | ret = i40e_vc_get_rss_hena(vf, msg, msglen); | |
2607 | break; | |
2608 | case I40E_VIRTCHNL_OP_SET_RSS_HENA: | |
2609 | ret = i40e_vc_set_rss_hena(vf, msg, msglen); | |
2610 | break; | |
2611 | ||
5c3c48ac JB |
2612 | case I40E_VIRTCHNL_OP_UNKNOWN: |
2613 | default: | |
b40c82e6 | 2614 | dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n", |
7efa84b7 | 2615 | v_opcode, local_vf_id); |
5c3c48ac JB |
2616 | ret = i40e_vc_send_resp_to_vf(vf, v_opcode, |
2617 | I40E_ERR_NOT_IMPLEMENTED); | |
2618 | break; | |
2619 | } | |
2620 | ||
2621 | return ret; | |
2622 | } | |
2623 | ||
2624 | /** | |
2625 | * i40e_vc_process_vflr_event | |
b40c82e6 | 2626 | * @pf: pointer to the PF structure |
5c3c48ac JB |
2627 | * |
2628 | * called from the vlfr irq handler to | |
b40c82e6 | 2629 | * free up VF resources and state variables |
5c3c48ac JB |
2630 | **/ |
2631 | int i40e_vc_process_vflr_event(struct i40e_pf *pf) | |
2632 | { | |
5c3c48ac | 2633 | struct i40e_hw *hw = &pf->hw; |
a1b5a24f | 2634 | u32 reg, reg_idx, bit_idx; |
5c3c48ac | 2635 | struct i40e_vf *vf; |
a1b5a24f | 2636 | int vf_id; |
5c3c48ac JB |
2637 | |
2638 | if (!test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state)) | |
2639 | return 0; | |
2640 | ||
0d790327 MW |
2641 | /* Re-enable the VFLR interrupt cause here, before looking for which |
2642 | * VF got reset. Otherwise, if another VF gets a reset while the | |
2643 | * first one is being processed, that interrupt will be lost, and | |
2644 | * that VF will be stuck in reset forever. | |
2645 | */ | |
c5c2f7c3 MW |
2646 | reg = rd32(hw, I40E_PFINT_ICR0_ENA); |
2647 | reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK; | |
2648 | wr32(hw, I40E_PFINT_ICR0_ENA, reg); | |
2649 | i40e_flush(hw); | |
2650 | ||
5c3c48ac JB |
2651 | clear_bit(__I40E_VFLR_EVENT_PENDING, &pf->state); |
2652 | for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) { | |
2653 | reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32; | |
2654 | bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32; | |
b40c82e6 | 2655 | /* read GLGEN_VFLRSTAT register to find out the flr VFs */ |
5c3c48ac JB |
2656 | vf = &pf->vf[vf_id]; |
2657 | reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx)); | |
7369ca87 | 2658 | if (reg & BIT(bit_idx)) |
7e5a313e | 2659 | /* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */ |
7369ca87 | 2660 | i40e_reset_vf(vf, true); |
5c3c48ac JB |
2661 | } |
2662 | ||
5c3c48ac JB |
2663 | return 0; |
2664 | } | |
2665 | ||
5c3c48ac JB |
2666 | /** |
2667 | * i40e_ndo_set_vf_mac | |
2668 | * @netdev: network interface device structure | |
b40c82e6 | 2669 | * @vf_id: VF identifier |
5c3c48ac JB |
2670 | * @mac: mac address |
2671 | * | |
b40c82e6 | 2672 | * program VF mac address |
5c3c48ac JB |
2673 | **/ |
2674 | int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac) | |
2675 | { | |
2676 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2677 | struct i40e_vsi *vsi = np->vsi; | |
2678 | struct i40e_pf *pf = vsi->back; | |
2679 | struct i40e_mac_filter *f; | |
2680 | struct i40e_vf *vf; | |
2681 | int ret = 0; | |
2682 | ||
2683 | /* validate the request */ | |
2684 | if (vf_id >= pf->num_alloc_vfs) { | |
2685 | dev_err(&pf->pdev->dev, | |
2686 | "Invalid VF Identifier %d\n", vf_id); | |
2687 | ret = -EINVAL; | |
2688 | goto error_param; | |
2689 | } | |
2690 | ||
2691 | vf = &(pf->vf[vf_id]); | |
fdf0e0bf | 2692 | vsi = pf->vsi[vf->lan_vsi_idx]; |
5c3c48ac | 2693 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) { |
2d166c30 MW |
2694 | dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n", |
2695 | vf_id); | |
2696 | ret = -EAGAIN; | |
5c3c48ac JB |
2697 | goto error_param; |
2698 | } | |
2699 | ||
efd8e39a | 2700 | if (is_multicast_ether_addr(mac)) { |
5c3c48ac | 2701 | dev_err(&pf->pdev->dev, |
efd8e39a | 2702 | "Invalid Ethernet address %pM for VF %d\n", mac, vf_id); |
5c3c48ac JB |
2703 | ret = -EINVAL; |
2704 | goto error_param; | |
2705 | } | |
2706 | ||
21659035 KP |
2707 | /* Lock once because below invoked function add/del_filter requires |
2708 | * mac_filter_list_lock to be held | |
2709 | */ | |
2710 | spin_lock_bh(&vsi->mac_filter_list_lock); | |
2711 | ||
5c3c48ac | 2712 | /* delete the temporary mac address */ |
efd8e39a MW |
2713 | if (!is_zero_ether_addr(vf->default_lan_addr.addr)) |
2714 | i40e_del_filter(vsi, vf->default_lan_addr.addr, | |
2715 | vf->port_vlan_id ? vf->port_vlan_id : -1, | |
2716 | true, false); | |
5c3c48ac | 2717 | |
29f71bb0 GR |
2718 | /* Delete all the filters for this VSI - we're going to kill it |
2719 | * anyway. | |
2720 | */ | |
2721 | list_for_each_entry(f, &vsi->mac_filter_list, list) | |
2722 | i40e_del_filter(vsi, f->macaddr, f->vlan, true, false); | |
5c3c48ac | 2723 | |
21659035 KP |
2724 | spin_unlock_bh(&vsi->mac_filter_list_lock); |
2725 | ||
5c3c48ac JB |
2726 | dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n", mac, vf_id); |
2727 | /* program mac filter */ | |
17652c63 | 2728 | if (i40e_sync_vsi_filters(vsi)) { |
5c3c48ac JB |
2729 | dev_err(&pf->pdev->dev, "Unable to program ucast filters\n"); |
2730 | ret = -EIO; | |
2731 | goto error_param; | |
2732 | } | |
9a173901 | 2733 | ether_addr_copy(vf->default_lan_addr.addr, mac); |
f657a6e1 | 2734 | vf->pf_set_mac = true; |
17413a80 GR |
2735 | /* Force the VF driver stop so it has to reload with new MAC address */ |
2736 | i40e_vc_disable_vf(pf, vf); | |
5c3c48ac | 2737 | dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n"); |
5c3c48ac JB |
2738 | |
2739 | error_param: | |
2740 | return ret; | |
2741 | } | |
2742 | ||
2743 | /** | |
2744 | * i40e_ndo_set_vf_port_vlan | |
2745 | * @netdev: network interface device structure | |
b40c82e6 | 2746 | * @vf_id: VF identifier |
5c3c48ac JB |
2747 | * @vlan_id: mac address |
2748 | * @qos: priority setting | |
2749 | * | |
b40c82e6 | 2750 | * program VF vlan id and/or qos |
5c3c48ac JB |
2751 | **/ |
2752 | int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, | |
2753 | int vf_id, u16 vlan_id, u8 qos) | |
2754 | { | |
f7fc2f2e | 2755 | u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT); |
5c3c48ac JB |
2756 | struct i40e_netdev_priv *np = netdev_priv(netdev); |
2757 | struct i40e_pf *pf = np->vsi->back; | |
21659035 | 2758 | bool is_vsi_in_vlan = false; |
5c3c48ac JB |
2759 | struct i40e_vsi *vsi; |
2760 | struct i40e_vf *vf; | |
2761 | int ret = 0; | |
2762 | ||
2763 | /* validate the request */ | |
2764 | if (vf_id >= pf->num_alloc_vfs) { | |
2765 | dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id); | |
2766 | ret = -EINVAL; | |
2767 | goto error_pvid; | |
2768 | } | |
2769 | ||
2770 | if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) { | |
2771 | dev_err(&pf->pdev->dev, "Invalid VF Parameters\n"); | |
2772 | ret = -EINVAL; | |
2773 | goto error_pvid; | |
2774 | } | |
2775 | ||
2776 | vf = &(pf->vf[vf_id]); | |
fdf0e0bf | 2777 | vsi = pf->vsi[vf->lan_vsi_idx]; |
5c3c48ac | 2778 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) { |
2d166c30 MW |
2779 | dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n", |
2780 | vf_id); | |
2781 | ret = -EAGAIN; | |
5c3c48ac JB |
2782 | goto error_pvid; |
2783 | } | |
2784 | ||
f7fc2f2e | 2785 | if (le16_to_cpu(vsi->info.pvid) == vlanprio) |
85927ec1 MW |
2786 | /* duplicate request, so just return success */ |
2787 | goto error_pvid; | |
2788 | ||
21659035 KP |
2789 | spin_lock_bh(&vsi->mac_filter_list_lock); |
2790 | is_vsi_in_vlan = i40e_is_vsi_in_vlan(vsi); | |
2791 | spin_unlock_bh(&vsi->mac_filter_list_lock); | |
2792 | ||
2793 | if (le16_to_cpu(vsi->info.pvid) == 0 && is_vsi_in_vlan) { | |
99a4973c GR |
2794 | dev_err(&pf->pdev->dev, |
2795 | "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n", | |
2796 | vf_id); | |
f9b4b627 GR |
2797 | /* Administrator Error - knock the VF offline until he does |
2798 | * the right thing by reconfiguring his network correctly | |
2799 | * and then reloading the VF driver. | |
2800 | */ | |
2801 | i40e_vc_disable_vf(pf, vf); | |
35f3472a MW |
2802 | /* During reset the VF got a new VSI, so refresh the pointer. */ |
2803 | vsi = pf->vsi[vf->lan_vsi_idx]; | |
f9b4b627 | 2804 | } |
99a4973c | 2805 | |
8d82a7c5 GR |
2806 | /* Check for condition where there was already a port VLAN ID |
2807 | * filter set and now it is being deleted by setting it to zero. | |
1315f7c3 GR |
2808 | * Additionally check for the condition where there was a port |
2809 | * VLAN but now there is a new and different port VLAN being set. | |
8d82a7c5 GR |
2810 | * Before deleting all the old VLAN filters we must add new ones |
2811 | * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our | |
2812 | * MAC addresses deleted. | |
2813 | */ | |
1315f7c3 | 2814 | if ((!(vlan_id || qos) || |
f7fc2f2e | 2815 | vlanprio != le16_to_cpu(vsi->info.pvid)) && |
1315f7c3 | 2816 | vsi->info.pvid) |
8d82a7c5 GR |
2817 | ret = i40e_vsi_add_vlan(vsi, I40E_VLAN_ANY); |
2818 | ||
5c3c48ac JB |
2819 | if (vsi->info.pvid) { |
2820 | /* kill old VLAN */ | |
2821 | ret = i40e_vsi_kill_vlan(vsi, (le16_to_cpu(vsi->info.pvid) & | |
2822 | VLAN_VID_MASK)); | |
2823 | if (ret) { | |
2824 | dev_info(&vsi->back->pdev->dev, | |
2825 | "remove VLAN failed, ret=%d, aq_err=%d\n", | |
2826 | ret, pf->hw.aq.asq_last_status); | |
2827 | } | |
2828 | } | |
2829 | if (vlan_id || qos) | |
f7fc2f2e | 2830 | ret = i40e_vsi_add_pvid(vsi, vlanprio); |
5c3c48ac | 2831 | else |
6c12fcbf | 2832 | i40e_vsi_remove_pvid(vsi); |
5c3c48ac JB |
2833 | |
2834 | if (vlan_id) { | |
2835 | dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n", | |
2836 | vlan_id, qos, vf_id); | |
2837 | ||
2838 | /* add new VLAN filter */ | |
2839 | ret = i40e_vsi_add_vlan(vsi, vlan_id); | |
2840 | if (ret) { | |
2841 | dev_info(&vsi->back->pdev->dev, | |
2842 | "add VF VLAN failed, ret=%d aq_err=%d\n", ret, | |
2843 | vsi->back->hw.aq.asq_last_status); | |
2844 | goto error_pvid; | |
2845 | } | |
8d82a7c5 GR |
2846 | /* Kill non-vlan MAC filters - ignore error return since |
2847 | * there might not be any non-vlan MAC filters. | |
2848 | */ | |
2849 | i40e_vsi_kill_vlan(vsi, I40E_VLAN_ANY); | |
5c3c48ac JB |
2850 | } |
2851 | ||
2852 | if (ret) { | |
2853 | dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n"); | |
2854 | goto error_pvid; | |
2855 | } | |
6c12fcbf GR |
2856 | /* The Port VLAN needs to be saved across resets the same as the |
2857 | * default LAN MAC address. | |
2858 | */ | |
2859 | vf->port_vlan_id = le16_to_cpu(vsi->info.pvid); | |
5c3c48ac JB |
2860 | ret = 0; |
2861 | ||
2862 | error_pvid: | |
2863 | return ret; | |
2864 | } | |
2865 | ||
84590fd9 MW |
2866 | #define I40E_BW_CREDIT_DIVISOR 50 /* 50Mbps per BW credit */ |
2867 | #define I40E_MAX_BW_INACTIVE_ACCUM 4 /* device can accumulate 4 credits max */ | |
5c3c48ac JB |
2868 | /** |
2869 | * i40e_ndo_set_vf_bw | |
2870 | * @netdev: network interface device structure | |
b40c82e6 JK |
2871 | * @vf_id: VF identifier |
2872 | * @tx_rate: Tx rate | |
5c3c48ac | 2873 | * |
b40c82e6 | 2874 | * configure VF Tx rate |
5c3c48ac | 2875 | **/ |
ed616689 SC |
2876 | int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate, |
2877 | int max_tx_rate) | |
5c3c48ac | 2878 | { |
6b192891 MW |
2879 | struct i40e_netdev_priv *np = netdev_priv(netdev); |
2880 | struct i40e_pf *pf = np->vsi->back; | |
2881 | struct i40e_vsi *vsi; | |
2882 | struct i40e_vf *vf; | |
2883 | int speed = 0; | |
2884 | int ret = 0; | |
2885 | ||
2886 | /* validate the request */ | |
2887 | if (vf_id >= pf->num_alloc_vfs) { | |
2888 | dev_err(&pf->pdev->dev, "Invalid VF Identifier %d.\n", vf_id); | |
2889 | ret = -EINVAL; | |
2890 | goto error; | |
2891 | } | |
2892 | ||
ed616689 | 2893 | if (min_tx_rate) { |
b40c82e6 | 2894 | dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n", |
ed616689 SC |
2895 | min_tx_rate, vf_id); |
2896 | return -EINVAL; | |
2897 | } | |
2898 | ||
6b192891 | 2899 | vf = &(pf->vf[vf_id]); |
fdf0e0bf | 2900 | vsi = pf->vsi[vf->lan_vsi_idx]; |
6b192891 | 2901 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) { |
2d166c30 MW |
2902 | dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n", |
2903 | vf_id); | |
2904 | ret = -EAGAIN; | |
6b192891 MW |
2905 | goto error; |
2906 | } | |
2907 | ||
2908 | switch (pf->hw.phy.link_info.link_speed) { | |
2909 | case I40E_LINK_SPEED_40GB: | |
2910 | speed = 40000; | |
2911 | break; | |
07f169c3 MW |
2912 | case I40E_LINK_SPEED_20GB: |
2913 | speed = 20000; | |
2914 | break; | |
6b192891 MW |
2915 | case I40E_LINK_SPEED_10GB: |
2916 | speed = 10000; | |
2917 | break; | |
2918 | case I40E_LINK_SPEED_1GB: | |
2919 | speed = 1000; | |
2920 | break; | |
2921 | default: | |
2922 | break; | |
2923 | } | |
2924 | ||
ed616689 | 2925 | if (max_tx_rate > speed) { |
b40c82e6 | 2926 | dev_err(&pf->pdev->dev, "Invalid max tx rate %d specified for VF %d.", |
ed616689 | 2927 | max_tx_rate, vf->vf_id); |
6b192891 MW |
2928 | ret = -EINVAL; |
2929 | goto error; | |
2930 | } | |
2931 | ||
dac9b31a MW |
2932 | if ((max_tx_rate < 50) && (max_tx_rate > 0)) { |
2933 | dev_warn(&pf->pdev->dev, "Setting max Tx rate to minimum usable value of 50Mbps.\n"); | |
2934 | max_tx_rate = 50; | |
2935 | } | |
2936 | ||
6b192891 | 2937 | /* Tx rate credits are in values of 50Mbps, 0 is disabled*/ |
84590fd9 MW |
2938 | ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid, |
2939 | max_tx_rate / I40E_BW_CREDIT_DIVISOR, | |
2940 | I40E_MAX_BW_INACTIVE_ACCUM, NULL); | |
6b192891 | 2941 | if (ret) { |
ed616689 | 2942 | dev_err(&pf->pdev->dev, "Unable to set max tx rate, error code %d.\n", |
6b192891 MW |
2943 | ret); |
2944 | ret = -EIO; | |
2945 | goto error; | |
2946 | } | |
ed616689 | 2947 | vf->tx_rate = max_tx_rate; |
6b192891 MW |
2948 | error: |
2949 | return ret; | |
5c3c48ac JB |
2950 | } |
2951 | ||
2952 | /** | |
2953 | * i40e_ndo_get_vf_config | |
2954 | * @netdev: network interface device structure | |
b40c82e6 JK |
2955 | * @vf_id: VF identifier |
2956 | * @ivi: VF configuration structure | |
5c3c48ac | 2957 | * |
b40c82e6 | 2958 | * return VF configuration |
5c3c48ac JB |
2959 | **/ |
2960 | int i40e_ndo_get_vf_config(struct net_device *netdev, | |
2961 | int vf_id, struct ifla_vf_info *ivi) | |
2962 | { | |
2963 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
5c3c48ac JB |
2964 | struct i40e_vsi *vsi = np->vsi; |
2965 | struct i40e_pf *pf = vsi->back; | |
2966 | struct i40e_vf *vf; | |
2967 | int ret = 0; | |
2968 | ||
2969 | /* validate the request */ | |
2970 | if (vf_id >= pf->num_alloc_vfs) { | |
2971 | dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id); | |
2972 | ret = -EINVAL; | |
2973 | goto error_param; | |
2974 | } | |
2975 | ||
2976 | vf = &(pf->vf[vf_id]); | |
2977 | /* first vsi is always the LAN vsi */ | |
fdf0e0bf | 2978 | vsi = pf->vsi[vf->lan_vsi_idx]; |
5c3c48ac | 2979 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) { |
2d166c30 MW |
2980 | dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n", |
2981 | vf_id); | |
2982 | ret = -EAGAIN; | |
5c3c48ac JB |
2983 | goto error_param; |
2984 | } | |
2985 | ||
2986 | ivi->vf = vf_id; | |
2987 | ||
6995b36c | 2988 | ether_addr_copy(ivi->mac, vf->default_lan_addr.addr); |
5c3c48ac | 2989 | |
ed616689 SC |
2990 | ivi->max_tx_rate = vf->tx_rate; |
2991 | ivi->min_tx_rate = 0; | |
5c3c48ac JB |
2992 | ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK; |
2993 | ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >> | |
2994 | I40E_VLAN_PRIORITY_SHIFT; | |
84ca55a0 MW |
2995 | if (vf->link_forced == false) |
2996 | ivi->linkstate = IFLA_VF_LINK_STATE_AUTO; | |
2997 | else if (vf->link_up == true) | |
2998 | ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE; | |
2999 | else | |
3000 | ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE; | |
c674d125 | 3001 | ivi->spoofchk = vf->spoofchk; |
5c3c48ac JB |
3002 | ret = 0; |
3003 | ||
3004 | error_param: | |
3005 | return ret; | |
3006 | } | |
588aefa0 MW |
3007 | |
3008 | /** | |
3009 | * i40e_ndo_set_vf_link_state | |
3010 | * @netdev: network interface device structure | |
b40c82e6 | 3011 | * @vf_id: VF identifier |
588aefa0 MW |
3012 | * @link: required link state |
3013 | * | |
3014 | * Set the link state of a specified VF, regardless of physical link state | |
3015 | **/ | |
3016 | int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link) | |
3017 | { | |
3018 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
3019 | struct i40e_pf *pf = np->vsi->back; | |
3020 | struct i40e_virtchnl_pf_event pfe; | |
3021 | struct i40e_hw *hw = &pf->hw; | |
3022 | struct i40e_vf *vf; | |
f19efbb5 | 3023 | int abs_vf_id; |
588aefa0 MW |
3024 | int ret = 0; |
3025 | ||
3026 | /* validate the request */ | |
3027 | if (vf_id >= pf->num_alloc_vfs) { | |
3028 | dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id); | |
3029 | ret = -EINVAL; | |
3030 | goto error_out; | |
3031 | } | |
3032 | ||
3033 | vf = &pf->vf[vf_id]; | |
f19efbb5 | 3034 | abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id; |
588aefa0 MW |
3035 | |
3036 | pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE; | |
3037 | pfe.severity = I40E_PF_EVENT_SEVERITY_INFO; | |
3038 | ||
3039 | switch (link) { | |
3040 | case IFLA_VF_LINK_STATE_AUTO: | |
3041 | vf->link_forced = false; | |
3042 | pfe.event_data.link_event.link_status = | |
3043 | pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP; | |
3044 | pfe.event_data.link_event.link_speed = | |
3045 | pf->hw.phy.link_info.link_speed; | |
3046 | break; | |
3047 | case IFLA_VF_LINK_STATE_ENABLE: | |
3048 | vf->link_forced = true; | |
3049 | vf->link_up = true; | |
3050 | pfe.event_data.link_event.link_status = true; | |
3051 | pfe.event_data.link_event.link_speed = I40E_LINK_SPEED_40GB; | |
3052 | break; | |
3053 | case IFLA_VF_LINK_STATE_DISABLE: | |
3054 | vf->link_forced = true; | |
3055 | vf->link_up = false; | |
3056 | pfe.event_data.link_event.link_status = false; | |
3057 | pfe.event_data.link_event.link_speed = 0; | |
3058 | break; | |
3059 | default: | |
3060 | ret = -EINVAL; | |
3061 | goto error_out; | |
3062 | } | |
3063 | /* Notify the VF of its new link state */ | |
f19efbb5 | 3064 | i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT, |
588aefa0 MW |
3065 | 0, (u8 *)&pfe, sizeof(pfe), NULL); |
3066 | ||
3067 | error_out: | |
3068 | return ret; | |
3069 | } | |
c674d125 MW |
3070 | |
3071 | /** | |
3072 | * i40e_ndo_set_vf_spoofchk | |
3073 | * @netdev: network interface device structure | |
b40c82e6 | 3074 | * @vf_id: VF identifier |
c674d125 MW |
3075 | * @enable: flag to enable or disable feature |
3076 | * | |
3077 | * Enable or disable VF spoof checking | |
3078 | **/ | |
e6d9004d | 3079 | int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable) |
c674d125 MW |
3080 | { |
3081 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
3082 | struct i40e_vsi *vsi = np->vsi; | |
3083 | struct i40e_pf *pf = vsi->back; | |
3084 | struct i40e_vsi_context ctxt; | |
3085 | struct i40e_hw *hw = &pf->hw; | |
3086 | struct i40e_vf *vf; | |
3087 | int ret = 0; | |
3088 | ||
3089 | /* validate the request */ | |
3090 | if (vf_id >= pf->num_alloc_vfs) { | |
3091 | dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id); | |
3092 | ret = -EINVAL; | |
3093 | goto out; | |
3094 | } | |
3095 | ||
3096 | vf = &(pf->vf[vf_id]); | |
2d166c30 MW |
3097 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) { |
3098 | dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n", | |
3099 | vf_id); | |
3100 | ret = -EAGAIN; | |
3101 | goto out; | |
3102 | } | |
c674d125 MW |
3103 | |
3104 | if (enable == vf->spoofchk) | |
3105 | goto out; | |
3106 | ||
3107 | vf->spoofchk = enable; | |
3108 | memset(&ctxt, 0, sizeof(ctxt)); | |
fdf0e0bf | 3109 | ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid; |
c674d125 MW |
3110 | ctxt.pf_num = pf->hw.pf_id; |
3111 | ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID); | |
3112 | if (enable) | |
30d71af5 GR |
3113 | ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK | |
3114 | I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK); | |
c674d125 MW |
3115 | ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); |
3116 | if (ret) { | |
3117 | dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n", | |
3118 | ret); | |
3119 | ret = -EIO; | |
3120 | } | |
3121 | out: | |
3122 | return ret; | |
3123 | } | |
c3bbbd20 ASJ |
3124 | |
3125 | /** | |
3126 | * i40e_ndo_set_vf_trust | |
3127 | * @netdev: network interface device structure of the pf | |
3128 | * @vf_id: VF identifier | |
3129 | * @setting: trust setting | |
3130 | * | |
3131 | * Enable or disable VF trust setting | |
3132 | **/ | |
3133 | int i40e_ndo_set_vf_trust(struct net_device *netdev, int vf_id, bool setting) | |
3134 | { | |
3135 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
3136 | struct i40e_pf *pf = np->vsi->back; | |
3137 | struct i40e_vf *vf; | |
3138 | int ret = 0; | |
3139 | ||
3140 | /* validate the request */ | |
3141 | if (vf_id >= pf->num_alloc_vfs) { | |
3142 | dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id); | |
3143 | return -EINVAL; | |
3144 | } | |
3145 | ||
3146 | if (pf->flags & I40E_FLAG_MFP_ENABLED) { | |
3147 | dev_err(&pf->pdev->dev, "Trusted VF not supported in MFP mode.\n"); | |
3148 | return -EINVAL; | |
3149 | } | |
3150 | ||
3151 | vf = &pf->vf[vf_id]; | |
3152 | ||
3153 | if (!vf) | |
3154 | return -EINVAL; | |
3155 | if (setting == vf->trusted) | |
3156 | goto out; | |
3157 | ||
3158 | vf->trusted = setting; | |
3159 | i40e_vc_notify_vf_reset(vf); | |
3160 | i40e_reset_vf(vf, false); | |
3161 | dev_info(&pf->pdev->dev, "VF %u is now %strusted\n", | |
3162 | vf_id, setting ? "" : "un"); | |
3163 | out: | |
3164 | return ret; | |
3165 | } |