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i40e: update version number
[linux-2.6-block.git] / drivers / net / ethernet / intel / i40e / i40e_virtchnl_pf.c
CommitLineData
ae06c70b 1// SPDX-License-Identifier: GPL-2.0
51dce24b 2/* Copyright(c) 2013 - 2018 Intel Corporation. */
5c3c48ac
JB		 3
4#include "i40e.h"
5
532b0455
MW		 6/*********************notification routines***********************/
7
8/**
9 * i40e_vc_vf_broadcast
10 * @pf: pointer to the PF structure
f5254429
JK		 11 * @v_opcode: operation code
12 * @v_retval: return value
532b0455
MW		 13 * @msg: pointer to the msg buffer
14 * @msglen: msg length
15 *
16 * send a message to all VFs on a given PF
17 **/
18static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
310a2ad9 19 enum virtchnl_ops v_opcode,
532b0455
MW		 20 i40e_status v_retval, u8 *msg,
21 u16 msglen)
22{
23 struct i40e_hw *hw = &pf->hw;
24 struct i40e_vf *vf = pf->vf;
25 int i;
26
27 for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
a1b5a24f 28 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455 29 /* Not all vfs are enabled so skip the ones that are not */
6322e63c
JK		 30 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
31 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 32 continue;
33
34 /* Ignore return value on purpose - a given VF may fail, but
35 * we need to keep going and send to all of them
36 */
37 i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
38 msg, msglen, NULL);
39 }
40}
41
42/**
55f7d723 43 * i40e_vc_notify_vf_link_state
532b0455
MW		 44 * @vf: pointer to the VF structure
45 *
46 * send a link status message to a single VF
47 **/
48static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf)
49{
310a2ad9 50 struct virtchnl_pf_event pfe;
532b0455
MW		 51 struct i40e_pf *pf = vf->pf;
52 struct i40e_hw *hw = &pf->hw;
53 struct i40e_link_status *ls = &pf->hw.phy.link_info;
a1b5a24f 54 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455 55
310a2ad9 56 pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
ff3f4cc2 57 pfe.severity = PF_EVENT_SEVERITY_INFO;
532b0455
MW		 58 if (vf->link_forced) {
59 pfe.event_data.link_event.link_status = vf->link_up;
60 pfe.event_data.link_event.link_speed =
5b643479 61 (vf->link_up ? VIRTCHNL_LINK_SPEED_40GB : 0);
532b0455
MW		 62 } else {
63 pfe.event_data.link_event.link_status =
64 ls->link_info & I40E_AQ_LINK_UP;
ff3f4cc2 65 pfe.event_data.link_event.link_speed =
5b643479 66 i40e_virtchnl_link_speed(ls->link_speed);
532b0455 67 }
310a2ad9 68 i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
532b0455
MW		 69 0, (u8 *)&pfe, sizeof(pfe), NULL);
70}
71
72/**
73 * i40e_vc_notify_link_state
74 * @pf: pointer to the PF structure
75 *
76 * send a link status message to all VFs on a given PF
77 **/
78void i40e_vc_notify_link_state(struct i40e_pf *pf)
79{
80 int i;
81
82 for (i = 0; i < pf->num_alloc_vfs; i++)
83 i40e_vc_notify_vf_link_state(&pf->vf[i]);
84}
85
86/**
87 * i40e_vc_notify_reset
88 * @pf: pointer to the PF structure
89 *
90 * indicate a pending reset to all VFs on a given PF
91 **/
92void i40e_vc_notify_reset(struct i40e_pf *pf)
93{
310a2ad9 94 struct virtchnl_pf_event pfe;
532b0455 95
310a2ad9 96 pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
ff3f4cc2 97 pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
310a2ad9
JB		 98 i40e_vc_vf_broadcast(pf, VIRTCHNL_OP_EVENT, 0,
99 (u8 *)&pfe, sizeof(struct virtchnl_pf_event));
532b0455
MW		 100}
101
102/**
103 * i40e_vc_notify_vf_reset
104 * @vf: pointer to the VF structure
105 *
106 * indicate a pending reset to the given VF
107 **/
108void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
109{
310a2ad9 110 struct virtchnl_pf_event pfe;
532b0455
MW		 111 int abs_vf_id;
112
113 /* validate the request */
114 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
115 return;
116
117 /* verify if the VF is in either init or active before proceeding */
6322e63c
JK		 118 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
119 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 120 return;
121
a1b5a24f 122 abs_vf_id = vf->vf_id + (int)vf->pf->hw.func_caps.vf_base_id;
532b0455 123
310a2ad9 124 pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
ff3f4cc2 125 pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
310a2ad9 126 i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, VIRTCHNL_OP_EVENT,
532b0455 127 0, (u8 *)&pfe,
310a2ad9 128 sizeof(struct virtchnl_pf_event), NULL);
532b0455 129}
5c3c48ac
JB		 130/***********************misc routines*****************************/
131
f9b4b627
GR		 132/**
133 * i40e_vc_disable_vf
b40c82e6 134 * @vf: pointer to the VF info
f9b4b627 135 *
d43d60e5 136 * Disable the VF through a SW reset.
f9b4b627 137 **/
eeeddbb8 138static inline void i40e_vc_disable_vf(struct i40e_vf *vf)
f9b4b627 139{
d43d60e5
JK		 140 int i;
141
54f455ee 142 i40e_vc_notify_vf_reset(vf);
d43d60e5
JK		 143
144 /* We want to ensure that an actual reset occurs initiated after this
145 * function was called. However, we do not want to wait forever, so
146 * we'll give a reasonable time and print a message if we failed to
147 * ensure a reset.
148 */
149 for (i = 0; i < 20; i++) {
150 if (i40e_reset_vf(vf, false))
151 return;
152 usleep_range(10000, 20000);
153 }
154
155 dev_warn(&vf->pf->pdev->dev,
156 "Failed to initiate reset for VF %d after 200 milliseconds\n",
157 vf->vf_id);
f9b4b627
GR		 158}
159
5c3c48ac
JB		 160/**
161 * i40e_vc_isvalid_vsi_id
b40c82e6
JK		 162 * @vf: pointer to the VF info
163 * @vsi_id: VF relative VSI id
5c3c48ac 164 *
b40c82e6 165 * check for the valid VSI id
5c3c48ac 166 **/
fdf0e0bf 167static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id)
5c3c48ac
JB		 168{
169 struct i40e_pf *pf = vf->pf;
fdf0e0bf 170 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 171
fdf0e0bf 172 return (vsi && (vsi->vf_id == vf->vf_id));
5c3c48ac
JB		 173}
174
175/**
176 * i40e_vc_isvalid_queue_id
b40c82e6 177 * @vf: pointer to the VF info
5c3c48ac
JB		 178 * @vsi_id: vsi id
179 * @qid: vsi relative queue id
180 *
181 * check for the valid queue id
182 **/
fdf0e0bf 183static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 184 u8 qid)
185{
186 struct i40e_pf *pf = vf->pf;
fdf0e0bf 187 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 188
fdf0e0bf 189 return (vsi && (qid < vsi->alloc_queue_pairs));
5c3c48ac
JB		 190}
191
192/**
193 * i40e_vc_isvalid_vector_id
b40c82e6
JK		 194 * @vf: pointer to the VF info
195 * @vector_id: VF relative vector id
5c3c48ac
JB		 196 *
197 * check for the valid vector id
198 **/
199static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
200{
201 struct i40e_pf *pf = vf->pf;
202
9347eb77 203 return vector_id < pf->hw.func_caps.num_msix_vectors_vf;
5c3c48ac
JB		 204}
205
206/***********************vf resource mgmt routines*****************/
207
208/**
209 * i40e_vc_get_pf_queue_id
b40c82e6 210 * @vf: pointer to the VF info
fdf0e0bf 211 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 212 * @vsi_queue_id: vsi relative queue id
213 *
b40c82e6 214 * return PF relative queue id
5c3c48ac 215 **/
fdf0e0bf 216static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 217 u8 vsi_queue_id)
218{
219 struct i40e_pf *pf = vf->pf;
fdf0e0bf 220 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac
JB		 221 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
222
fdf0e0bf
ASJ		 223 if (!vsi)
224 return pf_queue_id;
225
5c3c48ac
JB		 226 if (le16_to_cpu(vsi->info.mapping_flags) &
227 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
228 pf_queue_id =
229 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
230 else
231 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
232 vsi_queue_id;
233
234 return pf_queue_id;
235}
236
c27eac48
AD		 237/**
238 * i40e_get_real_pf_qid
239 * @vf: pointer to the VF info
240 * @vsi_id: vsi id
241 * @queue_id: queue number
242 *
243 * wrapper function to get pf_queue_id handling ADq code as well
244 **/
245static u16 i40e_get_real_pf_qid(struct i40e_vf *vf, u16 vsi_id, u16 queue_id)
246{
247 int i;
248
249 if (vf->adq_enabled) {
250 /* Although VF considers all the queues(can be 1 to 16) as its
251 * own but they may actually belong to different VSIs(up to 4).
252 * We need to find which queues belongs to which VSI.
253 */
254 for (i = 0; i < vf->num_tc; i++) {
255 if (queue_id < vf->ch[i].num_qps) {
256 vsi_id = vf->ch[i].vsi_id;
257 break;
258 }
259 /* find right queue id which is relative to a
260 * given VSI.
261 */
262 queue_id -= vf->ch[i].num_qps;
263 }
264 }
265
266 return i40e_vc_get_pf_queue_id(vf, vsi_id, queue_id);
267}
268
5c3c48ac
JB		 269/**
270 * i40e_config_irq_link_list
b40c82e6 271 * @vf: pointer to the VF info
fdf0e0bf 272 * @vsi_id: id of VSI as given by the FW
5c3c48ac
JB		 273 * @vecmap: irq map info
274 *
275 * configure irq link list from the map
276 **/
fdf0e0bf 277static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
310a2ad9 278 struct virtchnl_vector_map *vecmap)
5c3c48ac
JB		 279{
280 unsigned long linklistmap = 0, tempmap;
281 struct i40e_pf *pf = vf->pf;
282 struct i40e_hw *hw = &pf->hw;
283 u16 vsi_queue_id, pf_queue_id;
284 enum i40e_queue_type qtype;
9bcc07f0 285 u16 next_q, vector_id, size;
5c3c48ac
JB		 286 u32 reg, reg_idx;
287 u16 itr_idx = 0;
288
289 vector_id = vecmap->vector_id;
290 /* setup the head */
291 if (0 == vector_id)
292 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
293 else
294 reg_idx = I40E_VPINT_LNKLSTN(
9347eb77
MW		 295 ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) +
296 (vector_id - 1));
5c3c48ac
JB		 297
298 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
299 /* Special case - No queues mapped on this vector */
300 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
301 goto irq_list_done;
302 }
303 tempmap = vecmap->rxq_map;
4836650b 304 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 305 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
306 vsi_queue_id));
5c3c48ac
JB		 307 }
308
309 tempmap = vecmap->txq_map;
4836650b 310 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 311 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
312 vsi_queue_id + 1));
5c3c48ac
JB		 313 }
314
9bcc07f0
LY		 315 size = I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES;
316 next_q = find_first_bit(&linklistmap, size);
317 if (unlikely(next_q == size))
b861fb76
LY		 318 goto irq_list_done;
319
b82bc49e
MW		 320 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
321 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
c27eac48 322 pf_queue_id = i40e_get_real_pf_qid(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 323 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
324
325 wr32(hw, reg_idx, reg);
326
9bcc07f0 327 while (next_q < size) {
5c3c48ac
JB		 328 switch (qtype) {
329 case I40E_QUEUE_TYPE_RX:
330 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
331 itr_idx = vecmap->rxitr_idx;
332 break;
333 case I40E_QUEUE_TYPE_TX:
334 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
335 itr_idx = vecmap->txitr_idx;
336 break;
337 default:
338 break;
339 }
340
9bcc07f0
LY		 341 next_q = find_next_bit(&linklistmap, size, next_q + 1);
342 if (next_q < size) {
5c3c48ac
JB		 343 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
344 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
c27eac48
AD		 345 pf_queue_id = i40e_get_real_pf_qid(vf,
346 vsi_id,
347 vsi_queue_id);
5c3c48ac
JB		 348 } else {
349 pf_queue_id = I40E_QUEUE_END_OF_LIST;
350 qtype = 0;
351 }
352
353 /* format for the RQCTL & TQCTL regs is same */
354 reg = (vector_id) |
355 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
356 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
41a1d04b 357 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
5c3c48ac
JB		 358 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
359 wr32(hw, reg_idx, reg);
360 }
361
b8262a6d
ASJ		 362 /* if the vf is running in polling mode and using interrupt zero,
363 * need to disable auto-mask on enabling zero interrupt for VFs.
364 */
310a2ad9 365 if ((vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
b8262a6d
ASJ		 366 (vector_id == 0)) {
367 reg = rd32(hw, I40E_GLINT_CTL);
368 if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
369 reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
370 wr32(hw, I40E_GLINT_CTL, reg);
371 }
372 }
373
5c3c48ac
JB		 374irq_list_done:
375 i40e_flush(hw);
376}
377
e3219ce6
ASJ		 378/**
379 * i40e_release_iwarp_qvlist
380 * @vf: pointer to the VF.
381 *
382 **/
383static void i40e_release_iwarp_qvlist(struct i40e_vf *vf)
384{
385 struct i40e_pf *pf = vf->pf;
310a2ad9 386 struct virtchnl_iwarp_qvlist_info *qvlist_info = vf->qvlist_info;
e3219ce6
ASJ		 387 u32 msix_vf;
388 u32 i;
389
390 if (!vf->qvlist_info)
391 return;
392
393 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
394 for (i = 0; i < qvlist_info->num_vectors; i++) {
310a2ad9 395 struct virtchnl_iwarp_qv_info *qv_info;
e3219ce6
ASJ		 396 u32 next_q_index, next_q_type;
397 struct i40e_hw *hw = &pf->hw;
398 u32 v_idx, reg_idx, reg;
399
400 qv_info = &qvlist_info->qv_info[i];
401 if (!qv_info)
402 continue;
403 v_idx = qv_info->v_idx;
404 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
405 /* Figure out the queue after CEQ and make that the
406 * first queue.
407 */
408 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
409 reg = rd32(hw, I40E_VPINT_CEQCTL(reg_idx));
410 next_q_index = (reg & I40E_VPINT_CEQCTL_NEXTQ_INDX_MASK)
411 >> I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT;
412 next_q_type = (reg & I40E_VPINT_CEQCTL_NEXTQ_TYPE_MASK)
413 >> I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT;
414
415 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
416 reg = (next_q_index &
417 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
418 (next_q_type <<
419 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
420
421 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
422 }
423 }
424 kfree(vf->qvlist_info);
425 vf->qvlist_info = NULL;
426}
427
428/**
429 * i40e_config_iwarp_qvlist
430 * @vf: pointer to the VF info
431 * @qvlist_info: queue and vector list
432 *
433 * Return 0 on success or < 0 on error
434 **/
435static int i40e_config_iwarp_qvlist(struct i40e_vf *vf,
310a2ad9 436 struct virtchnl_iwarp_qvlist_info *qvlist_info)
e3219ce6
ASJ		 437{
438 struct i40e_pf *pf = vf->pf;
439 struct i40e_hw *hw = &pf->hw;
310a2ad9 440 struct virtchnl_iwarp_qv_info *qv_info;
e3219ce6
ASJ		 441 u32 v_idx, i, reg_idx, reg;
442 u32 next_q_idx, next_q_type;
443 u32 msix_vf, size;
444
310a2ad9
JB		 445 size = sizeof(struct virtchnl_iwarp_qvlist_info) +
446 (sizeof(struct virtchnl_iwarp_qv_info) *
e3219ce6
ASJ		 447 (qvlist_info->num_vectors - 1));
448 vf->qvlist_info = kzalloc(size, GFP_KERNEL);
54902349
CJ		 449 if (!vf->qvlist_info)
450 return -ENOMEM;
451
e3219ce6
ASJ		 452 vf->qvlist_info->num_vectors = qvlist_info->num_vectors;
453
454 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
455 for (i = 0; i < qvlist_info->num_vectors; i++) {
456 qv_info = &qvlist_info->qv_info[i];
457 if (!qv_info)
458 continue;
459 v_idx = qv_info->v_idx;
460
461 /* Validate vector id belongs to this vf */
462 if (!i40e_vc_isvalid_vector_id(vf, v_idx))
463 goto err;
464
465 vf->qvlist_info->qv_info[i] = *qv_info;
466
467 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
468 /* We might be sharing the interrupt, so get the first queue
469 * index and type, push it down the list by adding the new
470 * queue on top. Also link it with the new queue in CEQCTL.
471 */
472 reg = rd32(hw, I40E_VPINT_LNKLSTN(reg_idx));
473 next_q_idx = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) >>
474 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT);
475 next_q_type = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK) >>
476 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
477
478 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
479 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
480 reg = (I40E_VPINT_CEQCTL_CAUSE_ENA_MASK |
481 (v_idx << I40E_VPINT_CEQCTL_MSIX_INDX_SHIFT) |
482 (qv_info->itr_idx << I40E_VPINT_CEQCTL_ITR_INDX_SHIFT) |
483 (next_q_type << I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT) |
484 (next_q_idx << I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT));
485 wr32(hw, I40E_VPINT_CEQCTL(reg_idx), reg);
486
487 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
488 reg = (qv_info->ceq_idx &
489 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
490 (I40E_QUEUE_TYPE_PE_CEQ <<
491 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
492 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
493 }
494
495 if (qv_info->aeq_idx != I40E_QUEUE_INVALID_IDX) {
496 reg = (I40E_VPINT_AEQCTL_CAUSE_ENA_MASK |
497 (v_idx << I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT) |
498 (qv_info->itr_idx << I40E_VPINT_AEQCTL_ITR_INDX_SHIFT));
499
500 wr32(hw, I40E_VPINT_AEQCTL(vf->vf_id), reg);
501 }
502 }
503
504 return 0;
505err:
506 kfree(vf->qvlist_info);
507 vf->qvlist_info = NULL;
508 return -EINVAL;
509}
510
5c3c48ac
JB		 511/**
512 * i40e_config_vsi_tx_queue
b40c82e6 513 * @vf: pointer to the VF info
fdf0e0bf 514 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 515 * @vsi_queue_id: vsi relative queue index
516 * @info: config. info
517 *
518 * configure tx queue
519 **/
fdf0e0bf 520static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac 521 u16 vsi_queue_id,
310a2ad9 522 struct virtchnl_txq_info *info)
5c3c48ac
JB		 523{
524 struct i40e_pf *pf = vf->pf;
525 struct i40e_hw *hw = &pf->hw;
526 struct i40e_hmc_obj_txq tx_ctx;
fdf0e0bf 527 struct i40e_vsi *vsi;
5c3c48ac
JB		 528 u16 pf_queue_id;
529 u32 qtx_ctl;
530 int ret = 0;
531
d4a0658d
CW		 532 if (!i40e_vc_isvalid_vsi_id(vf, info->vsi_id)) {
533 ret = -ENOENT;
534 goto error_context;
535 }
fdf0e0bf
ASJ		 536 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
537 vsi = i40e_find_vsi_from_id(pf, vsi_id);
d4a0658d
CW		 538 if (!vsi) {
539 ret = -ENOENT;
540 goto error_context;
541 }
5c3c48ac
JB		 542
543 /* clear the context structure first */
544 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
545
546 /* only set the required fields */
547 tx_ctx.base = info->dma_ring_addr / 128;
548 tx_ctx.qlen = info->ring_len;
fdf0e0bf 549 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
5c3c48ac 550 tx_ctx.rdylist_act = 0;
5d29896a
AS		 551 tx_ctx.head_wb_ena = info->headwb_enabled;
552 tx_ctx.head_wb_addr = info->dma_headwb_addr;
5c3c48ac
JB		 553
554 /* clear the context in the HMC */
555 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
556 if (ret) {
557 dev_err(&pf->pdev->dev,
558 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
559 pf_queue_id, ret);
560 ret = -ENOENT;
561 goto error_context;
562 }
563
564 /* set the context in the HMC */
565 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
566 if (ret) {
567 dev_err(&pf->pdev->dev,
568 "Failed to set VF LAN Tx queue context %d error: %d\n",
569 pf_queue_id, ret);
570 ret = -ENOENT;
571 goto error_context;
572 }
573
574 /* associate this queue with the PCI VF function */
575 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
13fd9774 576 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
5c3c48ac
JB		 577 & I40E_QTX_CTL_PF_INDX_MASK);
578 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
579 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
580 & I40E_QTX_CTL_VFVM_INDX_MASK);
581 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
582 i40e_flush(hw);
583
584error_context:
585 return ret;
586}
587
588/**
589 * i40e_config_vsi_rx_queue
b40c82e6 590 * @vf: pointer to the VF info
fdf0e0bf 591 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 592 * @vsi_queue_id: vsi relative queue index
593 * @info: config. info
594 *
595 * configure rx queue
596 **/
fdf0e0bf 597static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac 598 u16 vsi_queue_id,
310a2ad9 599 struct virtchnl_rxq_info *info)
5c3c48ac
JB		 600{
601 struct i40e_pf *pf = vf->pf;
602 struct i40e_hw *hw = &pf->hw;
603 struct i40e_hmc_obj_rxq rx_ctx;
604 u16 pf_queue_id;
605 int ret = 0;
606
fdf0e0bf 607 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 608
609 /* clear the context structure first */
610 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
611
612 /* only set the required fields */
613 rx_ctx.base = info->dma_ring_addr / 128;
614 rx_ctx.qlen = info->ring_len;
615
616 if (info->splithdr_enabled) {
617 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
618 I40E_RX_SPLIT_IP |
619 I40E_RX_SPLIT_TCP_UDP |
620 I40E_RX_SPLIT_SCTP;
621 /* header length validation */
622 if (info->hdr_size > ((2 * 1024) - 64)) {
623 ret = -EINVAL;
624 goto error_param;
625 }
626 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
627
19b85e67 628 /* set split mode 10b */
d6b3bca1 629 rx_ctx.dtype = I40E_RX_DTYPE_HEADER_SPLIT;
5c3c48ac
JB		 630 }
631
632 /* databuffer length validation */
633 if (info->databuffer_size > ((16 * 1024) - 128)) {
634 ret = -EINVAL;
635 goto error_param;
636 }
637 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
638
639 /* max pkt. length validation */
640 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
641 ret = -EINVAL;
642 goto error_param;
643 }
644 rx_ctx.rxmax = info->max_pkt_size;
645
646 /* enable 32bytes desc always */
647 rx_ctx.dsize = 1;
648
649 /* default values */
7362be9e 650 rx_ctx.lrxqthresh = 1;
5c3c48ac 651 rx_ctx.crcstrip = 1;
50d41659 652 rx_ctx.prefena = 1;
c1d11cef 653 rx_ctx.l2tsel = 1;
5c3c48ac
JB		 654
655 /* clear the context in the HMC */
656 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
657 if (ret) {
658 dev_err(&pf->pdev->dev,
659 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
660 pf_queue_id, ret);
661 ret = -ENOENT;
662 goto error_param;
663 }
664
665 /* set the context in the HMC */
666 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
667 if (ret) {
668 dev_err(&pf->pdev->dev,
669 "Failed to set VF LAN Rx queue context %d error: %d\n",
670 pf_queue_id, ret);
671 ret = -ENOENT;
672 goto error_param;
673 }
674
675error_param:
676 return ret;
677}
678
679/**
680 * i40e_alloc_vsi_res
b40c82e6 681 * @vf: pointer to the VF info
c27eac48 682 * @idx: VSI index, applies only for ADq mode, zero otherwise
5c3c48ac 683 *
b40c82e6 684 * alloc VF vsi context & resources
5c3c48ac 685 **/
c27eac48 686static int i40e_alloc_vsi_res(struct i40e_vf *vf, u8 idx)
5c3c48ac
JB		 687{
688 struct i40e_mac_filter *f = NULL;
689 struct i40e_pf *pf = vf->pf;
5c3c48ac 690 struct i40e_vsi *vsi;
0c483bd4 691 u64 max_tx_rate = 0;
5c3c48ac
JB		 692 int ret = 0;
693
c27eac48
AD		 694 vsi = i40e_vsi_setup(pf, I40E_VSI_SRIOV, pf->vsi[pf->lan_vsi]->seid,
695 vf->vf_id);
5c3c48ac
JB		 696
697 if (!vsi) {
698 dev_err(&pf->pdev->dev,
b40c82e6 699 "add vsi failed for VF %d, aq_err %d\n",
5c3c48ac
JB		 700 vf->vf_id, pf->hw.aq.asq_last_status);
701 ret = -ENOENT;
702 goto error_alloc_vsi_res;
703 }
c27eac48
AD		 704
705 if (!idx) {
bb360717 706 u64 hena = i40e_pf_get_default_rss_hena(pf);
435c084a 707 u8 broadcast[ETH_ALEN];
bb360717 708
fdf0e0bf 709 vf->lan_vsi_idx = vsi->idx;
5c3c48ac 710 vf->lan_vsi_id = vsi->id;
6c12fcbf
GR		 711 /* If the port VLAN has been configured and then the
712 * VF driver was removed then the VSI port VLAN
713 * configuration was destroyed. Check if there is
714 * a port VLAN and restore the VSI configuration if
715 * needed.
716 */
717 if (vf->port_vlan_id)
718 i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
21659035 719
278e7d0b 720 spin_lock_bh(&vsi->mac_filter_hash_lock);
b7b713a8 721 if (is_valid_ether_addr(vf->default_lan_addr.addr)) {
9569a9a4
JK		 722 f = i40e_add_mac_filter(vsi,
723 vf->default_lan_addr.addr);
b7b713a8
MW		 724 if (!f)
725 dev_info(&pf->pdev->dev,
726 "Could not add MAC filter %pM for VF %d\n",
727 vf->default_lan_addr.addr, vf->vf_id);
728 }
435c084a 729 eth_broadcast_addr(broadcast);
9569a9a4 730 f = i40e_add_mac_filter(vsi, broadcast);
435c084a
JK		 731 if (!f)
732 dev_info(&pf->pdev->dev,
733 "Could not allocate VF broadcast filter\n");
278e7d0b 734 spin_unlock_bh(&vsi->mac_filter_hash_lock);
26f77e53
LY		 735 wr32(&pf->hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)hena);
736 wr32(&pf->hw, I40E_VFQF_HENA1(1, vf->vf_id), (u32)(hena >> 32));
c27eac48
AD		 737 /* program mac filter only for VF VSI */
738 ret = i40e_sync_vsi_filters(vsi);
739 if (ret)
740 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
5c3c48ac 741 }
6dbbbfb2 742
c27eac48
AD		 743 /* storing VSI index and id for ADq and don't apply the mac filter */
744 if (vf->adq_enabled) {
745 vf->ch[idx].vsi_idx = vsi->idx;
746 vf->ch[idx].vsi_id = vsi->id;
747 }
5c3c48ac 748
6b192891
MW		 749 /* Set VF bandwidth if specified */
750 if (vf->tx_rate) {
0c483bd4
AD		 751 max_tx_rate = vf->tx_rate;
752 } else if (vf->ch[idx].max_tx_rate) {
753 max_tx_rate = vf->ch[idx].max_tx_rate;
754 }
755
756 if (max_tx_rate) {
757 max_tx_rate = div_u64(max_tx_rate, I40E_BW_CREDIT_DIVISOR);
6b192891 758 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
0c483bd4 759 max_tx_rate, 0, NULL);
6b192891
MW		 760 if (ret)
761 dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
762 vf->vf_id, ret);
763 }
764
5c3c48ac
JB		 765error_alloc_vsi_res:
766 return ret;
767}
768
c27eac48
AD		 769/**
770 * i40e_map_pf_queues_to_vsi
771 * @vf: pointer to the VF info
772 *
773 * PF maps LQPs to a VF by programming VSILAN_QTABLE & VPLAN_QTABLE. This
774 * function takes care of first part VSILAN_QTABLE, mapping pf queues to VSI.
775 **/
776static void i40e_map_pf_queues_to_vsi(struct i40e_vf *vf)
777{
778 struct i40e_pf *pf = vf->pf;
779 struct i40e_hw *hw = &pf->hw;
780 u32 reg, num_tc = 1; /* VF has at least one traffic class */
781 u16 vsi_id, qps;
782 int i, j;
783
784 if (vf->adq_enabled)
785 num_tc = vf->num_tc;
786
787 for (i = 0; i < num_tc; i++) {
788 if (vf->adq_enabled) {
789 qps = vf->ch[i].num_qps;
790 vsi_id = vf->ch[i].vsi_id;
791 } else {
792 qps = pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
793 vsi_id = vf->lan_vsi_id;
794 }
795
796 for (j = 0; j < 7; j++) {
797 if (j * 2 >= qps) {
798 /* end of list */
799 reg = 0x07FF07FF;
800 } else {
801 u16 qid = i40e_vc_get_pf_queue_id(vf,
802 vsi_id,
803 j * 2);
804 reg = qid;
805 qid = i40e_vc_get_pf_queue_id(vf, vsi_id,
806 (j * 2) + 1);
807 reg |= qid << 16;
808 }
809 i40e_write_rx_ctl(hw,
810 I40E_VSILAN_QTABLE(j, vsi_id),
811 reg);
812 }
813 }
814}
815
816/**
817 * i40e_map_pf_to_vf_queues
818 * @vf: pointer to the VF info
819 *
820 * PF maps LQPs to a VF by programming VSILAN_QTABLE & VPLAN_QTABLE. This
821 * function takes care of the second part VPLAN_QTABLE & completes VF mappings.
822 **/
823static void i40e_map_pf_to_vf_queues(struct i40e_vf *vf)
824{
825 struct i40e_pf *pf = vf->pf;
826 struct i40e_hw *hw = &pf->hw;
827 u32 reg, total_qps = 0;
828 u32 qps, num_tc = 1; /* VF has at least one traffic class */
829 u16 vsi_id, qid;
830 int i, j;
831
832 if (vf->adq_enabled)
833 num_tc = vf->num_tc;
834
835 for (i = 0; i < num_tc; i++) {
836 if (vf->adq_enabled) {
837 qps = vf->ch[i].num_qps;
838 vsi_id = vf->ch[i].vsi_id;
839 } else {
840 qps = pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
841 vsi_id = vf->lan_vsi_id;
842 }
843
844 for (j = 0; j < qps; j++) {
845 qid = i40e_vc_get_pf_queue_id(vf, vsi_id, j);
846
847 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
848 wr32(hw, I40E_VPLAN_QTABLE(total_qps, vf->vf_id),
849 reg);
850 total_qps++;
851 }
852 }
853}
854
805bd5bd
MW		 855/**
856 * i40e_enable_vf_mappings
b40c82e6 857 * @vf: pointer to the VF info
805bd5bd 858 *
b40c82e6 859 * enable VF mappings
805bd5bd
MW		 860 **/
861static void i40e_enable_vf_mappings(struct i40e_vf *vf)
862{
863 struct i40e_pf *pf = vf->pf;
864 struct i40e_hw *hw = &pf->hw;
c27eac48 865 u32 reg;
805bd5bd
MW		 866
867 /* Tell the hardware we're using noncontiguous mapping. HW requires
868 * that VF queues be mapped using this method, even when they are
869 * contiguous in real life
870 */
272cdaf2
SN		 871 i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
872 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
805bd5bd
MW		 873
874 /* enable VF vplan_qtable mappings */
875 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
876 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
877
c27eac48
AD		 878 i40e_map_pf_to_vf_queues(vf);
879 i40e_map_pf_queues_to_vsi(vf);
805bd5bd
MW		 880
881 i40e_flush(hw);
882}
883
884/**
885 * i40e_disable_vf_mappings
b40c82e6 886 * @vf: pointer to the VF info
805bd5bd 887 *
b40c82e6 888 * disable VF mappings
805bd5bd
MW		 889 **/
890static void i40e_disable_vf_mappings(struct i40e_vf *vf)
891{
892 struct i40e_pf *pf = vf->pf;
893 struct i40e_hw *hw = &pf->hw;
894 int i;
895
896 /* disable qp mappings */
897 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
898 for (i = 0; i < I40E_MAX_VSI_QP; i++)
899 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
900 I40E_QUEUE_END_OF_LIST);
901 i40e_flush(hw);
902}
903
904/**
905 * i40e_free_vf_res
b40c82e6 906 * @vf: pointer to the VF info
805bd5bd 907 *
b40c82e6 908 * free VF resources
805bd5bd
MW		 909 **/
910static void i40e_free_vf_res(struct i40e_vf *vf)
911{
912 struct i40e_pf *pf = vf->pf;
fc18eaa0
MW		 913 struct i40e_hw *hw = &pf->hw;
914 u32 reg_idx, reg;
c27eac48 915 int i, j, msix_vf;
805bd5bd 916
beff3e9d
RK		 917 /* Start by disabling VF's configuration API to prevent the OS from
918 * accessing the VF's VSI after it's freed / invalidated.
919 */
6322e63c 920 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 921
a3f5aa90
AB		 922 /* It's possible the VF had requeuested more queues than the default so
923 * do the accounting here when we're about to free them.
924 */
925 if (vf->num_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF) {
926 pf->queues_left += vf->num_queue_pairs -
927 I40E_DEFAULT_QUEUES_PER_VF;
928 }
929
805bd5bd 930 /* free vsi & disconnect it from the parent uplink */
fdf0e0bf
ASJ		 931 if (vf->lan_vsi_idx) {
932 i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]);
933 vf->lan_vsi_idx = 0;
805bd5bd 934 vf->lan_vsi_id = 0;
13fd3f9c 935 vf->num_mac = 0;
805bd5bd 936 }
c27eac48
AD		 937
938 /* do the accounting and remove additional ADq VSI's */
939 if (vf->adq_enabled && vf->ch[0].vsi_idx) {
940 for (j = 0; j < vf->num_tc; j++) {
941 /* At this point VSI0 is already released so don't
942 * release it again and only clear their values in
943 * structure variables
944 */
945 if (j)
946 i40e_vsi_release(pf->vsi[vf->ch[j].vsi_idx]);
947 vf->ch[j].vsi_idx = 0;
948 vf->ch[j].vsi_id = 0;
949 }
950 }
9347eb77
MW		 951 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
952
fc18eaa0
MW		 953 /* disable interrupts so the VF starts in a known state */
954 for (i = 0; i < msix_vf; i++) {
955 /* format is same for both registers */
956 if (0 == i)
957 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
958 else
959 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
960 (vf->vf_id))
961 + (i - 1));
962 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
963 i40e_flush(hw);
964 }
805bd5bd 965
fc18eaa0
MW		 966 /* clear the irq settings */
967 for (i = 0; i < msix_vf; i++) {
968 /* format is same for both registers */
969 if (0 == i)
970 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
971 else
972 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
973 (vf->vf_id))
974 + (i - 1));
975 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
976 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
977 wr32(hw, reg_idx, reg);
978 i40e_flush(hw);
979 }
b564d62e 980 /* reset some of the state variables keeping track of the resources */
805bd5bd 981 vf->num_queue_pairs = 0;
41d0a4d0
AB		 982 clear_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
983 clear_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
805bd5bd
MW		 984}
985
986/**
987 * i40e_alloc_vf_res
b40c82e6 988 * @vf: pointer to the VF info
805bd5bd 989 *
b40c82e6 990 * allocate VF resources
805bd5bd
MW		 991 **/
992static int i40e_alloc_vf_res(struct i40e_vf *vf)
993{
994 struct i40e_pf *pf = vf->pf;
995 int total_queue_pairs = 0;
c27eac48 996 int ret, idx;
805bd5bd 997
a3f5aa90
AB		 998 if (vf->num_req_queues &&
999 vf->num_req_queues <= pf->queues_left + I40E_DEFAULT_QUEUES_PER_VF)
1000 pf->num_vf_qps = vf->num_req_queues;
1001 else
1002 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
1003
805bd5bd 1004 /* allocate hw vsi context & associated resources */
c27eac48 1005 ret = i40e_alloc_vsi_res(vf, 0);
805bd5bd
MW		 1006 if (ret)
1007 goto error_alloc;
fdf0e0bf 1008 total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
692fb0a7 1009
c27eac48
AD		 1010 /* allocate additional VSIs based on tc information for ADq */
1011 if (vf->adq_enabled) {
1012 if (pf->queues_left >=
1013 (I40E_MAX_VF_QUEUES - I40E_DEFAULT_QUEUES_PER_VF)) {
1014 /* TC 0 always belongs to VF VSI */
1015 for (idx = 1; idx < vf->num_tc; idx++) {
1016 ret = i40e_alloc_vsi_res(vf, idx);
1017 if (ret)
1018 goto error_alloc;
1019 }
1020 /* send correct number of queues */
1021 total_queue_pairs = I40E_MAX_VF_QUEUES;
1022 } else {
1023 dev_info(&pf->pdev->dev, "VF %d: Not enough queues to allocate, disabling ADq\n",
1024 vf->vf_id);
1025 vf->adq_enabled = false;
1026 }
1027 }
1028
a3f5aa90
AB		 1029 /* We account for each VF to get a default number of queue pairs. If
1030 * the VF has now requested more, we need to account for that to make
1031 * certain we never request more queues than we actually have left in
1032 * HW.
1033 */
1034 if (total_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF)
1035 pf->queues_left -=
1036 total_queue_pairs - I40E_DEFAULT_QUEUES_PER_VF;
1037
692fb0a7
ASJ		 1038 if (vf->trusted)
1039 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
1040 else
1041 clear_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
805bd5bd
MW		 1042
1043 /* store the total qps number for the runtime
b40c82e6 1044 * VF req validation
805bd5bd
MW		 1045 */
1046 vf->num_queue_pairs = total_queue_pairs;
1047
b40c82e6 1048 /* VF is now completely initialized */
6322e63c 1049 set_bit(I40E_VF_STATE_INIT, &vf->vf_states);
805bd5bd
MW		 1050
1051error_alloc:
1052 if (ret)
1053 i40e_free_vf_res(vf);
1054
1055 return ret;
1056}
1057
fc18eaa0
MW		 1058#define VF_DEVICE_STATUS 0xAA
1059#define VF_TRANS_PENDING_MASK 0x20
1060/**
1061 * i40e_quiesce_vf_pci
b40c82e6 1062 * @vf: pointer to the VF structure
fc18eaa0
MW		 1063 *
1064 * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
1065 * if the transactions never clear.
1066 **/
1067static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
1068{
1069 struct i40e_pf *pf = vf->pf;
1070 struct i40e_hw *hw = &pf->hw;
1071 int vf_abs_id, i;
1072 u32 reg;
1073
b141d619 1074 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
fc18eaa0
MW		 1075
1076 wr32(hw, I40E_PF_PCI_CIAA,
1077 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
1078 for (i = 0; i < 100; i++) {
1079 reg = rd32(hw, I40E_PF_PCI_CIAD);
1080 if ((reg & VF_TRANS_PENDING_MASK) == 0)
1081 return 0;
1082 udelay(1);
1083 }
1084 return -EIO;
1085}
1086
0ce5233e
MS		 1087static inline int i40e_getnum_vf_vsi_vlan_filters(struct i40e_vsi *vsi);
1088
1089/**
1090 * i40e_config_vf_promiscuous_mode
1091 * @vf: pointer to the VF info
1092 * @vsi_id: VSI id
1093 * @allmulti: set MAC L2 layer multicast promiscuous enable/disable
1094 * @alluni: set MAC L2 layer unicast promiscuous enable/disable
1095 *
1096 * Called from the VF to configure the promiscuous mode of
1097 * VF vsis and from the VF reset path to reset promiscuous mode.
1098 **/
1099static i40e_status i40e_config_vf_promiscuous_mode(struct i40e_vf *vf,
1100 u16 vsi_id,
1101 bool allmulti,
1102 bool alluni)
1103{
1104 struct i40e_pf *pf = vf->pf;
1105 struct i40e_hw *hw = &pf->hw;
1106 struct i40e_mac_filter *f;
1107 i40e_status aq_ret = 0;
1108 struct i40e_vsi *vsi;
1109 int bkt;
1110
1111 vsi = i40e_find_vsi_from_id(pf, vsi_id);
1112 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id) || !vsi)
1113 return I40E_ERR_PARAM;
1114
7cd8eb08
MW		 1115 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
1116 (allmulti || alluni)) {
0ce5233e
MS		 1117 dev_err(&pf->pdev->dev,
1118 "Unprivileged VF %d is attempting to configure promiscuous mode\n",
1119 vf->vf_id);
1120 /* Lie to the VF on purpose. */
1121 return 0;
1122 }
1123
1124 if (vf->port_vlan_id) {
1125 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw, vsi->seid,
1126 allmulti,
1127 vf->port_vlan_id,
1128 NULL);
1129 if (aq_ret) {
1130 int aq_err = pf->hw.aq.asq_last_status;
1131
1132 dev_err(&pf->pdev->dev,
1133 "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n",
1134 vf->vf_id,
1135 i40e_stat_str(&pf->hw, aq_ret),
1136 i40e_aq_str(&pf->hw, aq_err));
1137 return aq_ret;
1138 }
1139
1140 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw, vsi->seid,
1141 alluni,
1142 vf->port_vlan_id,
1143 NULL);
1144 if (aq_ret) {
1145 int aq_err = pf->hw.aq.asq_last_status;
1146
1147 dev_err(&pf->pdev->dev,
1148 "VF %d failed to set unicast promiscuous mode err %s aq_err %s\n",
1149 vf->vf_id,
1150 i40e_stat_str(&pf->hw, aq_ret),
1151 i40e_aq_str(&pf->hw, aq_err));
1152 }
1153 return aq_ret;
1154 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
1155 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
1156 if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
1157 continue;
1158 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw,
1159 vsi->seid,
1160 allmulti,
1161 f->vlan,
1162 NULL);
1163 if (aq_ret) {
1164 int aq_err = pf->hw.aq.asq_last_status;
1165
1166 dev_err(&pf->pdev->dev,
1167 "Could not add VLAN %d to multicast promiscuous domain err %s aq_err %s\n",
1168 f->vlan,
1169 i40e_stat_str(&pf->hw, aq_ret),
1170 i40e_aq_str(&pf->hw, aq_err));
1171 }
1172
1173 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw,
1174 vsi->seid,
1175 alluni,
1176 f->vlan,
1177 NULL);
1178 if (aq_ret) {
1179 int aq_err = pf->hw.aq.asq_last_status;
1180
1181 dev_err(&pf->pdev->dev,
1182 "Could not add VLAN %d to Unicast promiscuous domain err %s aq_err %s\n",
1183 f->vlan,
1184 i40e_stat_str(&pf->hw, aq_ret),
1185 i40e_aq_str(&pf->hw, aq_err));
1186 }
1187 }
1188 return aq_ret;
1189 }
1190 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid, allmulti,
1191 NULL);
1192 if (aq_ret) {
1193 int aq_err = pf->hw.aq.asq_last_status;
1194
1195 dev_err(&pf->pdev->dev,
1196 "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n",
1197 vf->vf_id,
1198 i40e_stat_str(&pf->hw, aq_ret),
1199 i40e_aq_str(&pf->hw, aq_err));
1200 return aq_ret;
1201 }
1202
1203 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, vsi->seid, alluni,
1204 NULL, true);
1205 if (aq_ret) {
1206 int aq_err = pf->hw.aq.asq_last_status;
1207
1208 dev_err(&pf->pdev->dev,
1209 "VF %d failed to set unicast promiscuous mode err %s aq_err %s\n",
1210 vf->vf_id,
1211 i40e_stat_str(&pf->hw, aq_ret),
1212 i40e_aq_str(&pf->hw, aq_err));
1213 }
1214
1215 return aq_ret;
1216}
1217
5c3c48ac 1218/**
9dc2e417 1219 * i40e_trigger_vf_reset
b40c82e6 1220 * @vf: pointer to the VF structure
5c3c48ac
JB		 1221 * @flr: VFLR was issued or not
1222 *
9dc2e417
JK		 1223 * Trigger hardware to start a reset for a particular VF. Expects the caller
1224 * to wait the proper amount of time to allow hardware to reset the VF before
1225 * it cleans up and restores VF functionality.
5c3c48ac 1226 **/
9dc2e417 1227static void i40e_trigger_vf_reset(struct i40e_vf *vf, bool flr)
5c3c48ac 1228{
5c3c48ac
JB		 1229 struct i40e_pf *pf = vf->pf;
1230 struct i40e_hw *hw = &pf->hw;
7e5a313e 1231 u32 reg, reg_idx, bit_idx;
3ba9bcb4 1232
5c3c48ac 1233 /* warn the VF */
6322e63c 1234 clear_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac 1235
beff3e9d
RK		 1236 /* Disable VF's configuration API during reset. The flag is re-enabled
1237 * in i40e_alloc_vf_res(), when it's safe again to access VF's VSI.
1238 * It's normally disabled in i40e_free_vf_res(), but it's safer
1239 * to do it earlier to give some time to finish to any VF config
1240 * functions that may still be running at this point.
1241 */
6322e63c 1242 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 1243
fc18eaa0
MW		 1244 /* In the case of a VFLR, the HW has already reset the VF and we
1245 * just need to clean up, so don't hit the VFRTRIG register.
5c3c48ac
JB		 1246 */
1247 if (!flr) {
b40c82e6 1248 /* reset VF using VPGEN_VFRTRIG reg */
fc18eaa0
MW		 1249 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1250 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
5c3c48ac
JB		 1251 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
1252 i40e_flush(hw);
1253 }
7369ca87
MW		 1254 /* clear the VFLR bit in GLGEN_VFLRSTAT */
1255 reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
1256 bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
1257 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
30728c5b 1258 i40e_flush(hw);
5c3c48ac 1259
fc18eaa0
MW		 1260 if (i40e_quiesce_vf_pci(vf))
1261 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
1262 vf->vf_id);
9dc2e417 1263}
fc18eaa0 1264
9dc2e417
JK		 1265/**
1266 * i40e_cleanup_reset_vf
1267 * @vf: pointer to the VF structure
1268 *
1269 * Cleanup a VF after the hardware reset is finished. Expects the caller to
1270 * have verified whether the reset is finished properly, and ensure the
1271 * minimum amount of wait time has passed.
1272 **/
1273static void i40e_cleanup_reset_vf(struct i40e_vf *vf)
1274{
1275 struct i40e_pf *pf = vf->pf;
1276 struct i40e_hw *hw = &pf->hw;
1277 u32 reg;
fc18eaa0 1278
0ce5233e
MS		 1279 /* disable promisc modes in case they were enabled */
1280 i40e_config_vf_promiscuous_mode(vf, vf->lan_vsi_id, false, false);
1281
beff3e9d 1282 /* free VF resources to begin resetting the VSI state */
fc18eaa0 1283 i40e_free_vf_res(vf);
beff3e9d
RK		 1284
1285 /* Enable hardware by clearing the reset bit in the VPGEN_VFRTRIG reg.
1286 * By doing this we allow HW to access VF memory at any point. If we
1287 * did it any sooner, HW could access memory while it was being freed
1288 * in i40e_free_vf_res(), causing an IOMMU fault.
1289 *
1290 * On the other hand, this needs to be done ASAP, because the VF driver
1291 * is waiting for this to happen and may report a timeout. It's
1292 * harmless, but it gets logged into Guest OS kernel log, so best avoid
1293 * it.
1294 */
1295 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1296 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
1297 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
1298
1299 /* reallocate VF resources to finish resetting the VSI state */
21be99ec 1300 if (!i40e_alloc_vf_res(vf)) {
e3219ce6 1301 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
21be99ec 1302 i40e_enable_vf_mappings(vf);
6322e63c
JK		 1303 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
1304 clear_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
6a23449a 1305 /* Do not notify the client during VF init */
c53d11f6
AB		 1306 if (!test_and_clear_bit(I40E_VF_STATE_PRE_ENABLE,
1307 &vf->vf_states))
6a23449a 1308 i40e_notify_client_of_vf_reset(pf, abs_vf_id);
dc5b4e9f 1309 vf->num_vlan = 0;
21be99ec 1310 }
beff3e9d
RK		 1311
1312 /* Tell the VF driver the reset is done. This needs to be done only
1313 * after VF has been fully initialized, because the VF driver may
1314 * request resources immediately after setting this flag.
1315 */
310a2ad9 1316 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), VIRTCHNL_VFR_VFACTIVE);
9dc2e417
JK		 1317}
1318
1319/**
1320 * i40e_reset_vf
1321 * @vf: pointer to the VF structure
1322 * @flr: VFLR was issued or not
1323 *
d43d60e5 1324 * Returns true if the VF is reset, false otherwise.
9dc2e417 1325 **/
d43d60e5 1326bool i40e_reset_vf(struct i40e_vf *vf, bool flr)
9dc2e417
JK		 1327{
1328 struct i40e_pf *pf = vf->pf;
1329 struct i40e_hw *hw = &pf->hw;
1330 bool rsd = false;
1331 u32 reg;
1332 int i;
1333
d43d60e5
JK		 1334 /* If the VFs have been disabled, this means something else is
1335 * resetting the VF, so we shouldn't continue.
1336 */
0da36b97 1337 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
d43d60e5 1338 return false;
9dc2e417
JK		 1339
1340 i40e_trigger_vf_reset(vf, flr);
1341
1342 /* poll VPGEN_VFRSTAT reg to make sure
1343 * that reset is complete
1344 */
1345 for (i = 0; i < 10; i++) {
1346 /* VF reset requires driver to first reset the VF and then
1347 * poll the status register to make sure that the reset
1348 * completed successfully. Due to internal HW FIFO flushes,
1349 * we must wait 10ms before the register will be valid.
1350 */
1351 usleep_range(10000, 20000);
1352 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1353 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
1354 rsd = true;
1355 break;
1356 }
1357 }
1358
1359 if (flr)
1360 usleep_range(10000, 20000);
1361
1362 if (!rsd)
1363 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1364 vf->vf_id);
1365 usleep_range(10000, 20000);
1366
1367 /* On initial reset, we don't have any queues to disable */
1368 if (vf->lan_vsi_idx != 0)
1369 i40e_vsi_stop_rings(pf->vsi[vf->lan_vsi_idx]);
1370
1371 i40e_cleanup_reset_vf(vf);
7e5a313e 1372
5c3c48ac 1373 i40e_flush(hw);
0da36b97 1374 clear_bit(__I40E_VF_DISABLE, pf->state);
d43d60e5
JK		 1375
1376 return true;
5c3c48ac 1377}
c354229f 1378
e4b433f4
JK		 1379/**
1380 * i40e_reset_all_vfs
1381 * @pf: pointer to the PF structure
1382 * @flr: VFLR was issued or not
1383 *
1384 * Reset all allocated VFs in one go. First, tell the hardware to reset each
1385 * VF, then do all the waiting in one chunk, and finally finish restoring each
1386 * VF after the wait. This is useful during PF routines which need to reset
1387 * all VFs, as otherwise it must perform these resets in a serialized fashion.
d43d60e5
JK		 1388 *
1389 * Returns true if any VFs were reset, and false otherwise.
e4b433f4 1390 **/
d43d60e5 1391bool i40e_reset_all_vfs(struct i40e_pf *pf, bool flr)
e4b433f4
JK		 1392{
1393 struct i40e_hw *hw = &pf->hw;
1394 struct i40e_vf *vf;
1395 int i, v;
1396 u32 reg;
1397
1398 /* If we don't have any VFs, then there is nothing to reset */
1399 if (!pf->num_alloc_vfs)
d43d60e5 1400 return false;
e4b433f4
JK		 1401
1402 /* If VFs have been disabled, there is no need to reset */
0da36b97 1403 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
d43d60e5 1404 return false;
e4b433f4
JK		 1405
1406 /* Begin reset on all VFs at once */
1407 for (v = 0; v < pf->num_alloc_vfs; v++)
1408 i40e_trigger_vf_reset(&pf->vf[v], flr);
1409
1410 /* HW requires some time to make sure it can flush the FIFO for a VF
1411 * when it resets it. Poll the VPGEN_VFRSTAT register for each VF in
1412 * sequence to make sure that it has completed. We'll keep track of
1413 * the VFs using a simple iterator that increments once that VF has
1414 * finished resetting.
1415 */
1416 for (i = 0, v = 0; i < 10 && v < pf->num_alloc_vfs; i++) {
1417 usleep_range(10000, 20000);
1418
1419 /* Check each VF in sequence, beginning with the VF to fail
1420 * the previous check.
1421 */
1422 while (v < pf->num_alloc_vfs) {
1423 vf = &pf->vf[v];
1424 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1425 if (!(reg & I40E_VPGEN_VFRSTAT_VFRD_MASK))
1426 break;
1427
1428 /* If the current VF has finished resetting, move on
1429 * to the next VF in sequence.
1430 */
1431 v++;
1432 }
1433 }
1434
1435 if (flr)
1436 usleep_range(10000, 20000);
1437
1438 /* Display a warning if at least one VF didn't manage to reset in
1439 * time, but continue on with the operation.
1440 */
1441 if (v < pf->num_alloc_vfs)
1442 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1443 pf->vf[v].vf_id);
1444 usleep_range(10000, 20000);
1445
1446 /* Begin disabling all the rings associated with VFs, but do not wait
1447 * between each VF.
1448 */
1449 for (v = 0; v < pf->num_alloc_vfs; v++) {
1450 /* On initial reset, we don't have any queues to disable */
1451 if (pf->vf[v].lan_vsi_idx == 0)
1452 continue;
1453
1454 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[v].lan_vsi_idx]);
1455 }
1456
1457 /* Now that we've notified HW to disable all of the VF rings, wait
1458 * until they finish.
1459 */
1460 for (v = 0; v < pf->num_alloc_vfs; v++) {
1461 /* On initial reset, we don't have any queues to disable */
1462 if (pf->vf[v].lan_vsi_idx == 0)
1463 continue;
1464
1465 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[v].lan_vsi_idx]);
1466 }
1467
1468 /* Hw may need up to 50ms to finish disabling the RX queues. We
1469 * minimize the wait by delaying only once for all VFs.
1470 */
1471 mdelay(50);
1472
1473 /* Finish the reset on each VF */
1474 for (v = 0; v < pf->num_alloc_vfs; v++)
1475 i40e_cleanup_reset_vf(&pf->vf[v]);
1476
1477 i40e_flush(hw);
0da36b97 1478 clear_bit(__I40E_VF_DISABLE, pf->state);
d43d60e5
JK		 1479
1480 return true;
e4b433f4
JK		 1481}
1482
5c3c48ac
JB		 1483/**
1484 * i40e_free_vfs
b40c82e6 1485 * @pf: pointer to the PF structure
5c3c48ac 1486 *
b40c82e6 1487 * free VF resources
5c3c48ac
JB		 1488 **/
1489void i40e_free_vfs(struct i40e_pf *pf)
1490{
f7414531
MW		 1491 struct i40e_hw *hw = &pf->hw;
1492 u32 reg_idx, bit_idx;
1493 int i, tmp, vf_id;
5c3c48ac
JB		 1494
1495 if (!pf->vf)
1496 return;
0da36b97 1497 while (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
3ba9bcb4 1498 usleep_range(1000, 2000);
5c3c48ac 1499
e3219ce6 1500 i40e_notify_client_of_vf_enable(pf, 0);
707d088a
JK		 1501
1502 /* Amortize wait time by stopping all VFs at the same time */
1503 for (i = 0; i < pf->num_alloc_vfs; i++) {
1504 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
1505 continue;
1506
1507 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[i].lan_vsi_idx]);
1508 }
1509
1510 for (i = 0; i < pf->num_alloc_vfs; i++) {
6322e63c 1511 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
707d088a
JK		 1512 continue;
1513
1514 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[i].lan_vsi_idx]);
1515 }
44434638 1516
6a9ddb36
MW		 1517 /* Disable IOV before freeing resources. This lets any VF drivers
1518 * running in the host get themselves cleaned up before we yank
1519 * the carpet out from underneath their feet.
1520 */
1521 if (!pci_vfs_assigned(pf->pdev))
1522 pci_disable_sriov(pf->pdev);
6d7b967d
MW		 1523 else
1524 dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
6a9ddb36 1525
b40c82e6 1526 /* free up VF resources */
6c1b5bff
MW		 1527 tmp = pf->num_alloc_vfs;
1528 pf->num_alloc_vfs = 0;
1529 for (i = 0; i < tmp; i++) {
6322e63c 1530 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
5c3c48ac
JB		 1531 i40e_free_vf_res(&pf->vf[i]);
1532 /* disable qp mappings */
1533 i40e_disable_vf_mappings(&pf->vf[i]);
1534 }
1535
1536 kfree(pf->vf);
1537 pf->vf = NULL;
5c3c48ac 1538
9e5634df
MW		 1539 /* This check is for when the driver is unloaded while VFs are
1540 * assigned. Setting the number of VFs to 0 through sysfs is caught
1541 * before this function ever gets called.
1542 */
c24817b6 1543 if (!pci_vfs_assigned(pf->pdev)) {
f7414531
MW		 1544 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
1545 * work correctly when SR-IOV gets re-enabled.
1546 */
1547 for (vf_id = 0; vf_id < tmp; vf_id++) {
1548 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
1549 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
41a1d04b 1550 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
f7414531 1551 }
c354229f 1552 }
0da36b97 1553 clear_bit(__I40E_VF_DISABLE, pf->state);
5c3c48ac
JB		 1554}
1555
1556#ifdef CONFIG_PCI_IOV
1557/**
1558 * i40e_alloc_vfs
b40c82e6
JK		 1559 * @pf: pointer to the PF structure
1560 * @num_alloc_vfs: number of VFs to allocate
5c3c48ac 1561 *
b40c82e6 1562 * allocate VF resources
5c3c48ac 1563 **/
4aeec010 1564int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
5c3c48ac
JB		 1565{
1566 struct i40e_vf *vfs;
1567 int i, ret = 0;
1568
6c1b5bff 1569 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW		 1570 i40e_irq_dynamic_disable_icr0(pf);
1571
4aeec010
MW		 1572 /* Check to see if we're just allocating resources for extant VFs */
1573 if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
1574 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
1575 if (ret) {
de445b3d 1576 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
4aeec010
MW		 1577 pf->num_alloc_vfs = 0;
1578 goto err_iov;
1579 }
5c3c48ac 1580 }
5c3c48ac 1581 /* allocate memory */
cc6456af 1582 vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL);
5c3c48ac
JB		 1583 if (!vfs) {
1584 ret = -ENOMEM;
1585 goto err_alloc;
1586 }
c674d125 1587 pf->vf = vfs;
5c3c48ac
JB		 1588
1589 /* apply default profile */
1590 for (i = 0; i < num_alloc_vfs; i++) {
1591 vfs[i].pf = pf;
1592 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
1593 vfs[i].vf_id = i;
1594
1595 /* assign default capabilities */
1596 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
c674d125 1597 vfs[i].spoofchk = true;
1b484370
JK		 1598
1599 set_bit(I40E_VF_STATE_PRE_ENABLE, &vfs[i].vf_states);
5c3c48ac 1600
5c3c48ac 1601 }
5c3c48ac
JB		 1602 pf->num_alloc_vfs = num_alloc_vfs;
1603
1b484370
JK		 1604 /* VF resources get allocated during reset */
1605 i40e_reset_all_vfs(pf, false);
1606
6a23449a
AD		 1607 i40e_notify_client_of_vf_enable(pf, num_alloc_vfs);
1608
5c3c48ac
JB		 1609err_alloc:
1610 if (ret)
1611 i40e_free_vfs(pf);
1612err_iov:
6c1b5bff 1613 /* Re-enable interrupt 0. */
dbadbbe2 1614 i40e_irq_dynamic_enable_icr0(pf);
5c3c48ac
JB		 1615 return ret;
1616}
1617
1618#endif
1619/**
1620 * i40e_pci_sriov_enable
1621 * @pdev: pointer to a pci_dev structure
b40c82e6 1622 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1623 *
1624 * Enable or change the number of VFs
1625 **/
1626static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
1627{
1628#ifdef CONFIG_PCI_IOV
1629 struct i40e_pf *pf = pci_get_drvdata(pdev);
1630 int pre_existing_vfs = pci_num_vf(pdev);
1631 int err = 0;
1632
0da36b97 1633 if (test_bit(__I40E_TESTING, pf->state)) {
e17bc411
GR		 1634 dev_warn(&pdev->dev,
1635 "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n");
1636 err = -EPERM;
1637 goto err_out;
1638 }
1639
5c3c48ac
JB		 1640 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
1641 i40e_free_vfs(pf);
1642 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
1643 goto out;
1644
1645 if (num_vfs > pf->num_req_vfs) {
96c8d073
MW		 1646 dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n",
1647 num_vfs, pf->num_req_vfs);
5c3c48ac
JB		 1648 err = -EPERM;
1649 goto err_out;
1650 }
1651
96c8d073 1652 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
5c3c48ac
JB		 1653 err = i40e_alloc_vfs(pf, num_vfs);
1654 if (err) {
1655 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
1656 goto err_out;
1657 }
1658
1659out:
1660 return num_vfs;
1661
1662err_out:
1663 return err;
1664#endif
1665 return 0;
1666}
1667
1668/**
1669 * i40e_pci_sriov_configure
1670 * @pdev: pointer to a pci_dev structure
b40c82e6 1671 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1672 *
1673 * Enable or change the number of VFs. Called when the user updates the number
1674 * of VFs in sysfs.
1675 **/
1676int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1677{
1678 struct i40e_pf *pf = pci_get_drvdata(pdev);
f5a7b21b
JS		 1679 int ret = 0;
1680
1681 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
1682 dev_warn(&pdev->dev, "Unable to configure VFs, other operation is pending.\n");
1683 return -EAGAIN;
1684 }
5c3c48ac 1685
fc60861e
ASJ		 1686 if (num_vfs) {
1687 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
1688 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
ff424188 1689 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
fc60861e 1690 }
f5a7b21b
JS		 1691 ret = i40e_pci_sriov_enable(pdev, num_vfs);
1692 goto sriov_configure_out;
fc60861e 1693 }
5c3c48ac 1694
c24817b6 1695 if (!pci_vfs_assigned(pf->pdev)) {
9e5634df 1696 i40e_free_vfs(pf);
fc60861e 1697 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
ff424188 1698 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
9e5634df
MW		 1699 } else {
1700 dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
f5a7b21b
JS		 1701 ret = -EINVAL;
1702 goto sriov_configure_out;
9e5634df 1703 }
f5a7b21b
JS		 1704sriov_configure_out:
1705 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
1706 return ret;
5c3c48ac
JB		 1707}
1708
1709/***********************virtual channel routines******************/
1710
1711/**
1712 * i40e_vc_send_msg_to_vf
b40c82e6 1713 * @vf: pointer to the VF info
5c3c48ac
JB		 1714 * @v_opcode: virtual channel opcode
1715 * @v_retval: virtual channel return value
1716 * @msg: pointer to the msg buffer
1717 * @msglen: msg length
1718 *
b40c82e6 1719 * send msg to VF
5c3c48ac
JB		 1720 **/
1721static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
1722 u32 v_retval, u8 *msg, u16 msglen)
1723{
6e7b5bd3
ASJ		 1724 struct i40e_pf *pf;
1725 struct i40e_hw *hw;
1726 int abs_vf_id;
5c3c48ac
JB		 1727 i40e_status aq_ret;
1728
6e7b5bd3
ASJ		 1729 /* validate the request */
1730 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
1731 return -EINVAL;
1732
1733 pf = vf->pf;
1734 hw = &pf->hw;
1735 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1736
5c3c48ac
JB		 1737 /* single place to detect unsuccessful return values */
1738 if (v_retval) {
1739 vf->num_invalid_msgs++;
18b7af57
MW		 1740 dev_info(&pf->pdev->dev, "VF %d failed opcode %d, retval: %d\n",
1741 vf->vf_id, v_opcode, v_retval);
5c3c48ac
JB		 1742 if (vf->num_invalid_msgs >
1743 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
1744 dev_err(&pf->pdev->dev,
1745 "Number of invalid messages exceeded for VF %d\n",
1746 vf->vf_id);
1747 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
6322e63c 1748 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
5c3c48ac
JB		 1749 }
1750 } else {
1751 vf->num_valid_msgs++;
5d38c93e
JW		 1752 /* reset the invalid counter, if a valid message is received. */
1753 vf->num_invalid_msgs = 0;
5c3c48ac
JB		 1754 }
1755
f19efbb5 1756 aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
7efa84b7 1757 msg, msglen, NULL);
5c3c48ac 1758 if (aq_ret) {
18b7af57
MW		 1759 dev_info(&pf->pdev->dev,
1760 "Unable to send the message to VF %d aq_err %d\n",
1761 vf->vf_id, pf->hw.aq.asq_last_status);
5c3c48ac
JB		 1762 return -EIO;
1763 }
1764
1765 return 0;
1766}
1767
1768/**
1769 * i40e_vc_send_resp_to_vf
b40c82e6 1770 * @vf: pointer to the VF info
5c3c48ac
JB		 1771 * @opcode: operation code
1772 * @retval: return value
1773 *
b40c82e6 1774 * send resp msg to VF
5c3c48ac
JB		 1775 **/
1776static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
310a2ad9 1777 enum virtchnl_ops opcode,
5c3c48ac
JB		 1778 i40e_status retval)
1779{
1780 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
1781}
1782
1783/**
1784 * i40e_vc_get_version_msg
b40c82e6 1785 * @vf: pointer to the VF info
f5254429 1786 * @msg: pointer to the msg buffer
5c3c48ac 1787 *
b40c82e6 1788 * called from the VF to request the API version used by the PF
5c3c48ac 1789 **/
f4ca1a22 1790static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 1791{
310a2ad9
JB		 1792 struct virtchnl_version_info info = {
1793 VIRTCHNL_VERSION_MAJOR, VIRTCHNL_VERSION_MINOR
5c3c48ac
JB		 1794 };
1795
310a2ad9 1796 vf->vf_ver = *(struct virtchnl_version_info *)msg;
606a5488 1797 /* VFs running the 1.0 API expect to get 1.0 back or they will cry. */
eedcfef8 1798 if (VF_IS_V10(&vf->vf_ver))
310a2ad9
JB		 1799 info.minor = VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
1800 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_VERSION,
5c3c48ac 1801 I40E_SUCCESS, (u8 *)&info,
f0adc6e8 1802 sizeof(struct virtchnl_version_info));
5c3c48ac
JB		 1803}
1804
c4998aa3
AD		 1805/**
1806 * i40e_del_qch - delete all the additional VSIs created as a part of ADq
1807 * @vf: pointer to VF structure
1808 **/
1809static void i40e_del_qch(struct i40e_vf *vf)
1810{
1811 struct i40e_pf *pf = vf->pf;
1812 int i;
1813
1814 /* first element in the array belongs to primary VF VSI and we shouldn't
1815 * delete it. We should however delete the rest of the VSIs created
1816 */
1817 for (i = 1; i < vf->num_tc; i++) {
1818 if (vf->ch[i].vsi_idx) {
1819 i40e_vsi_release(pf->vsi[vf->ch[i].vsi_idx]);
1820 vf->ch[i].vsi_idx = 0;
1821 vf->ch[i].vsi_id = 0;
1822 }
1823 }
1824}
1825
5c3c48ac
JB		 1826/**
1827 * i40e_vc_get_vf_resources_msg
b40c82e6 1828 * @vf: pointer to the VF info
5c3c48ac 1829 * @msg: pointer to the msg buffer
5c3c48ac 1830 *
b40c82e6 1831 * called from the VF to request its resources
5c3c48ac 1832 **/
f4ca1a22 1833static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 1834{
310a2ad9 1835 struct virtchnl_vf_resource *vfres = NULL;
5c3c48ac
JB		 1836 struct i40e_pf *pf = vf->pf;
1837 i40e_status aq_ret = 0;
1838 struct i40e_vsi *vsi;
5c3c48ac 1839 int num_vsis = 1;
442b25e4 1840 int len = 0;
5c3c48ac
JB		 1841 int ret;
1842
6322e63c 1843 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
5c3c48ac
JB		 1844 aq_ret = I40E_ERR_PARAM;
1845 goto err;
1846 }
1847
310a2ad9
JB		 1848 len = (sizeof(struct virtchnl_vf_resource) +
1849 sizeof(struct virtchnl_vsi_resource) * num_vsis);
5c3c48ac
JB		 1850
1851 vfres = kzalloc(len, GFP_KERNEL);
1852 if (!vfres) {
1853 aq_ret = I40E_ERR_NO_MEMORY;
1854 len = 0;
1855 goto err;
1856 }
eedcfef8 1857 if (VF_IS_V11(&vf->vf_ver))
f4ca1a22
MW		 1858 vf->driver_caps = *(u32 *)msg;
1859 else
310a2ad9
JB		 1860 vf->driver_caps = VIRTCHNL_VF_OFFLOAD_L2 |
1861 VIRTCHNL_VF_OFFLOAD_RSS_REG |
1862 VIRTCHNL_VF_OFFLOAD_VLAN;
5c3c48ac 1863
fbb113f7 1864 vfres->vf_cap_flags = VIRTCHNL_VF_OFFLOAD_L2;
fdf0e0bf 1865 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1866 if (!vsi->info.pvid)
fbb113f7 1867 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_VLAN;
e3219ce6 1868
0ef2d5af 1869 if (i40e_vf_client_capable(pf, vf->vf_id) &&
310a2ad9 1870 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_IWARP)) {
fbb113f7 1871 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_IWARP;
6322e63c 1872 set_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
41d0a4d0
AB		 1873 } else {
1874 clear_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
e3219ce6
ASJ		 1875 }
1876
310a2ad9 1877 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
fbb113f7 1878 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_PF;
e25d00b8 1879 } else {
d36e41dc 1880 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
310a2ad9 1881 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_AQ))
fbb113f7 1882 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_AQ;
c4e1868c 1883 else
fbb113f7 1884 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_REG;
e25d00b8 1885 }
1f012279 1886
d36e41dc 1887 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
310a2ad9 1888 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
fbb113f7 1889 vfres->vf_cap_flags |=
310a2ad9 1890 VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
3d0da5b7
ASJ		 1891 }
1892
310a2ad9 1893 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP)
fbb113f7 1894 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP;
bacd75cf 1895
d36e41dc 1896 if ((pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE) &&
310a2ad9 1897 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM))
fbb113f7 1898 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM;
bacd75cf 1899
310a2ad9 1900 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) {
14c5f5d2
SN		 1901 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
1902 dev_err(&pf->pdev->dev,
1903 "VF %d requested polling mode: this feature is supported only when the device is running in single function per port (SFP) mode\n",
1904 vf->vf_id);
db1a8f8e 1905 aq_ret = I40E_ERR_PARAM;
14c5f5d2
SN		 1906 goto err;
1907 }
fbb113f7 1908 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RX_POLLING;
14c5f5d2 1909 }
1f012279 1910
d36e41dc 1911 if (pf->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) {
310a2ad9 1912 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
fbb113f7 1913 vfres->vf_cap_flags |=
310a2ad9 1914 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
f6d83d13
ASJ		 1915 }
1916
a3f5aa90
AB		 1917 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_REQ_QUEUES)
1918 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_REQ_QUEUES;
1919
c27eac48
AD		 1920 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ADQ)
1921 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ADQ;
1922
5c3c48ac
JB		 1923 vfres->num_vsis = num_vsis;
1924 vfres->num_queue_pairs = vf->num_queue_pairs;
1925 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
c4e1868c
MW		 1926 vfres->rss_key_size = I40E_HKEY_ARRAY_SIZE;
1927 vfres->rss_lut_size = I40E_VF_HLUT_ARRAY_SIZE;
1928
fdf0e0bf 1929 if (vf->lan_vsi_idx) {
442b25e4 1930 vfres->vsi_res[0].vsi_id = vf->lan_vsi_id;
ff3f4cc2 1931 vfres->vsi_res[0].vsi_type = VIRTCHNL_VSI_SRIOV;
442b25e4 1932 vfres->vsi_res[0].num_queue_pairs = vsi->alloc_queue_pairs;
f578f5f4 1933 /* VFs only use TC 0 */
442b25e4 1934 vfres->vsi_res[0].qset_handle
f578f5f4 1935 = le16_to_cpu(vsi->info.qs_handle[0]);
442b25e4 1936 ether_addr_copy(vfres->vsi_res[0].default_mac_addr,
6995b36c 1937 vf->default_lan_addr.addr);
5c3c48ac 1938 }
6322e63c 1939 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac
JB		 1940
1941err:
b40c82e6 1942 /* send the response back to the VF */
310a2ad9 1943 ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_VF_RESOURCES,
5c3c48ac
JB		 1944 aq_ret, (u8 *)vfres, len);
1945
1946 kfree(vfres);
1947 return ret;
1948}
1949
1950/**
1951 * i40e_vc_reset_vf_msg
b40c82e6 1952 * @vf: pointer to the VF info
5c3c48ac 1953 *
b40c82e6
JK		 1954 * called from the VF to reset itself,
1955 * unlike other virtchnl messages, PF driver
1956 * doesn't send the response back to the VF
5c3c48ac 1957 **/
fc18eaa0 1958static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
5c3c48ac 1959{
6322e63c 1960 if (test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
fc18eaa0 1961 i40e_reset_vf(vf, false);
5c3c48ac
JB		 1962}
1963
5676a8b9
ASJ		 1964/**
1965 * i40e_getnum_vf_vsi_vlan_filters
1966 * @vsi: pointer to the vsi
1967 *
1968 * called to get the number of VLANs offloaded on this VF
1969 **/
1970static inline int i40e_getnum_vf_vsi_vlan_filters(struct i40e_vsi *vsi)
1971{
1972 struct i40e_mac_filter *f;
278e7d0b 1973 int num_vlans = 0, bkt;
5676a8b9 1974
278e7d0b 1975 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
5676a8b9
ASJ		 1976 if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID)
1977 num_vlans++;
1978 }
1979
1980 return num_vlans;
1981}
1982
5c3c48ac
JB		 1983/**
1984 * i40e_vc_config_promiscuous_mode_msg
b40c82e6 1985 * @vf: pointer to the VF info
5c3c48ac 1986 * @msg: pointer to the msg buffer
5c3c48ac 1987 *
b40c82e6
JK		 1988 * called from the VF to configure the promiscuous mode of
1989 * VF vsis
5c3c48ac 1990 **/
679b05c0 1991static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 1992{
310a2ad9
JB		 1993 struct virtchnl_promisc_info *info =
1994 (struct virtchnl_promisc_info *)msg;
5c3c48ac 1995 struct i40e_pf *pf = vf->pf;
5676a8b9 1996 i40e_status aq_ret = 0;
5c3c48ac 1997 bool allmulti = false;
5676a8b9 1998 bool alluni = false;
5c3c48ac 1999
0ce5233e
MS		 2000 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
2001 return I40E_ERR_PARAM;
2002
5676a8b9 2003 /* Multicast promiscuous handling*/
ff3f4cc2 2004 if (info->flags & FLAG_VF_MULTICAST_PROMISC)
5c3c48ac 2005 allmulti = true;
5676a8b9 2006
0ce5233e
MS		 2007 if (info->flags & FLAG_VF_UNICAST_PROMISC)
2008 alluni = true;
2009 aq_ret = i40e_config_vf_promiscuous_mode(vf, info->vsi_id, allmulti,
2010 alluni);
5676a8b9 2011 if (!aq_ret) {
0ce5233e
MS		 2012 if (allmulti) {
2013 dev_info(&pf->pdev->dev,
2014 "VF %d successfully set multicast promiscuous mode\n",
2015 vf->vf_id);
6322e63c 2016 set_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
0ce5233e
MS		 2017 } else {
2018 dev_info(&pf->pdev->dev,
2019 "VF %d successfully unset multicast promiscuous mode\n",
2020 vf->vf_id);
6322e63c 2021 clear_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
7429c0bd 2022 }
0ce5233e
MS		 2023 if (alluni) {
2024 dev_info(&pf->pdev->dev,
2025 "VF %d successfully set unicast promiscuous mode\n",
2026 vf->vf_id);
6322e63c 2027 set_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
0ce5233e
MS		 2028 } else {
2029 dev_info(&pf->pdev->dev,
2030 "VF %d successfully unset unicast promiscuous mode\n",
2031 vf->vf_id);
6322e63c 2032 clear_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
0ce5233e 2033 }
5676a8b9 2034 }
5c3c48ac 2035
b40c82e6 2036 /* send the response to the VF */
5c3c48ac 2037 return i40e_vc_send_resp_to_vf(vf,
310a2ad9 2038 VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
5c3c48ac
JB		 2039 aq_ret);
2040}
2041
2042/**
2043 * i40e_vc_config_queues_msg
b40c82e6 2044 * @vf: pointer to the VF info
5c3c48ac 2045 * @msg: pointer to the msg buffer
5c3c48ac 2046 *
b40c82e6 2047 * called from the VF to configure the rx/tx
5c3c48ac
JB		 2048 * queues
2049 **/
679b05c0 2050static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2051{
310a2ad9
JB		 2052 struct virtchnl_vsi_queue_config_info *qci =
2053 (struct virtchnl_vsi_queue_config_info *)msg;
2054 struct virtchnl_queue_pair_info *qpi;
5f5e33b6 2055 struct i40e_pf *pf = vf->pf;
c27eac48 2056 u16 vsi_id, vsi_queue_id = 0;
5c3c48ac 2057 i40e_status aq_ret = 0;
c27eac48
AD		 2058 int i, j = 0, idx = 0;
2059
2060 vsi_id = qci->vsi_id;
5c3c48ac 2061
6322e63c 2062 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2063 aq_ret = I40E_ERR_PARAM;
2064 goto error_param;
2065 }
2066
5c3c48ac
JB		 2067 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2068 aq_ret = I40E_ERR_PARAM;
2069 goto error_param;
2070 }
c27eac48 2071
3f8af412
SN		 2072 if (qci->num_queue_pairs > I40E_MAX_VF_QUEUES) {
2073 aq_ret = I40E_ERR_PARAM;
2074 goto error_param;
2075 }
2076
5c3c48ac
JB		 2077 for (i = 0; i < qci->num_queue_pairs; i++) {
2078 qpi = &qci->qpair[i];
c27eac48
AD		 2079
2080 if (!vf->adq_enabled) {
2081 vsi_queue_id = qpi->txq.queue_id;
2082
2083 if (qpi->txq.vsi_id != qci->vsi_id ||
2084 qpi->rxq.vsi_id != qci->vsi_id ||
2085 qpi->rxq.queue_id != vsi_queue_id) {
2086 aq_ret = I40E_ERR_PARAM;
2087 goto error_param;
2088 }
2089 }
2090
2091 if (!i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
5c3c48ac
JB		 2092 aq_ret = I40E_ERR_PARAM;
2093 goto error_param;
2094 }
2095
2096 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
2097 &qpi->rxq) ||
2098 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
2099 &qpi->txq)) {
2100 aq_ret = I40E_ERR_PARAM;
2101 goto error_param;
2102 }
c27eac48
AD		 2103
2104 /* For ADq there can be up to 4 VSIs with max 4 queues each.
2105 * VF does not know about these additional VSIs and all
2106 * it cares is about its own queues. PF configures these queues
2107 * to its appropriate VSIs based on TC mapping
2108 **/
2109 if (vf->adq_enabled) {
2110 if (j == (vf->ch[idx].num_qps - 1)) {
2111 idx++;
2112 j = 0; /* resetting the queue count */
2113 vsi_queue_id = 0;
2114 } else {
2115 j++;
2116 vsi_queue_id++;
2117 }
2118 vsi_id = vf->ch[idx].vsi_id;
2119 }
5c3c48ac 2120 }
b40c82e6 2121 /* set vsi num_queue_pairs in use to num configured by VF */
c27eac48
AD		 2122 if (!vf->adq_enabled) {
2123 pf->vsi[vf->lan_vsi_idx]->num_queue_pairs =
2124 qci->num_queue_pairs;
2125 } else {
2126 for (i = 0; i < vf->num_tc; i++)
2127 pf->vsi[vf->ch[i].vsi_idx]->num_queue_pairs =
2128 vf->ch[i].num_qps;
2129 }
5c3c48ac
JB		 2130
2131error_param:
b40c82e6 2132 /* send the response to the VF */
310a2ad9 2133 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES,
5c3c48ac
JB		 2134 aq_ret);
2135}
2136
c27eac48
AD		 2137/**
2138 * i40e_validate_queue_map
2139 * @vsi_id: vsi id
2140 * @queuemap: Tx or Rx queue map
2141 *
2142 * check if Tx or Rx queue map is valid
2143 **/
2144static int i40e_validate_queue_map(struct i40e_vf *vf, u16 vsi_id,
2145 unsigned long queuemap)
2146{
2147 u16 vsi_queue_id, queue_id;
2148
2149 for_each_set_bit(vsi_queue_id, &queuemap, I40E_MAX_VSI_QP) {
2150 if (vf->adq_enabled) {
2151 vsi_id = vf->ch[vsi_queue_id / I40E_MAX_VF_VSI].vsi_id;
2152 queue_id = (vsi_queue_id % I40E_DEFAULT_QUEUES_PER_VF);
2153 } else {
2154 queue_id = vsi_queue_id;
2155 }
2156
2157 if (!i40e_vc_isvalid_queue_id(vf, vsi_id, queue_id))
2158 return -EINVAL;
2159 }
2160
2161 return 0;
2162}
2163
5c3c48ac
JB		 2164/**
2165 * i40e_vc_config_irq_map_msg
b40c82e6 2166 * @vf: pointer to the VF info
5c3c48ac 2167 * @msg: pointer to the msg buffer
5c3c48ac 2168 *
b40c82e6 2169 * called from the VF to configure the irq to
5c3c48ac
JB		 2170 * queue map
2171 **/
679b05c0 2172static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2173{
310a2ad9
JB		 2174 struct virtchnl_irq_map_info *irqmap_info =
2175 (struct virtchnl_irq_map_info *)msg;
2176 struct virtchnl_vector_map *map;
c27eac48 2177 u16 vsi_id, vector_id;
5c3c48ac 2178 i40e_status aq_ret = 0;
5c3c48ac
JB		 2179 int i;
2180
6322e63c 2181 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2182 aq_ret = I40E_ERR_PARAM;
2183 goto error_param;
2184 }
2185
2186 for (i = 0; i < irqmap_info->num_vectors; i++) {
2187 map = &irqmap_info->vecmap[i];
5c3c48ac
JB		 2188 vector_id = map->vector_id;
2189 vsi_id = map->vsi_id;
2190 /* validate msg params */
2191 if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
2192 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2193 aq_ret = I40E_ERR_PARAM;
2194 goto error_param;
2195 }
2196
c27eac48
AD		 2197 if (i40e_validate_queue_map(vf, vsi_id, map->rxq_map)) {
2198 aq_ret = I40E_ERR_PARAM;
2199 goto error_param;
5c3c48ac
JB		 2200 }
2201
c27eac48
AD		 2202 if (i40e_validate_queue_map(vf, vsi_id, map->txq_map)) {
2203 aq_ret = I40E_ERR_PARAM;
2204 goto error_param;
5c3c48ac
JB		 2205 }
2206
2207 i40e_config_irq_link_list(vf, vsi_id, map);
2208 }
2209error_param:
b40c82e6 2210 /* send the response to the VF */
310a2ad9 2211 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_IRQ_MAP,
5c3c48ac
JB		 2212 aq_ret);
2213}
2214
d0fda04d
HR		 2215/**
2216 * i40e_ctrl_vf_tx_rings
2217 * @vsi: the SRIOV VSI being configured
2218 * @q_map: bit map of the queues to be enabled
2219 * @enable: start or stop the queue
2220 **/
2221static int i40e_ctrl_vf_tx_rings(struct i40e_vsi *vsi, unsigned long q_map,
2222 bool enable)
2223{
2224 struct i40e_pf *pf = vsi->back;
2225 int ret = 0;
2226 u16 q_id;
2227
2228 for_each_set_bit(q_id, &q_map, I40E_MAX_VF_QUEUES) {
2229 ret = i40e_control_wait_tx_q(vsi->seid, pf,
2230 vsi->base_queue + q_id,
2231 false /*is xdp*/, enable);
2232 if (ret)
2233 break;
2234 }
2235 return ret;
2236}
2237
2238/**
2239 * i40e_ctrl_vf_rx_rings
2240 * @vsi: the SRIOV VSI being configured
2241 * @q_map: bit map of the queues to be enabled
2242 * @enable: start or stop the queue
2243 **/
2244static int i40e_ctrl_vf_rx_rings(struct i40e_vsi *vsi, unsigned long q_map,
2245 bool enable)
2246{
2247 struct i40e_pf *pf = vsi->back;
2248 int ret = 0;
2249 u16 q_id;
2250
2251 for_each_set_bit(q_id, &q_map, I40E_MAX_VF_QUEUES) {
2252 ret = i40e_control_wait_rx_q(pf, vsi->base_queue + q_id,
2253 enable);
2254 if (ret)
2255 break;
2256 }
2257 return ret;
2258}
2259
5c3c48ac
JB		 2260/**
2261 * i40e_vc_enable_queues_msg
b40c82e6 2262 * @vf: pointer to the VF info
5c3c48ac 2263 * @msg: pointer to the msg buffer
5c3c48ac 2264 *
b40c82e6 2265 * called from the VF to enable all or specific queue(s)
5c3c48ac 2266 **/
679b05c0 2267static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2268{
310a2ad9
JB		 2269 struct virtchnl_queue_select *vqs =
2270 (struct virtchnl_queue_select *)msg;
5c3c48ac
JB		 2271 struct i40e_pf *pf = vf->pf;
2272 u16 vsi_id = vqs->vsi_id;
2273 i40e_status aq_ret = 0;
c27eac48 2274 int i;
5c3c48ac 2275
6322e63c 2276 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2277 aq_ret = I40E_ERR_PARAM;
2278 goto error_param;
2279 }
2280
2281 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2282 aq_ret = I40E_ERR_PARAM;
2283 goto error_param;
2284 }
2285
2286 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
2287 aq_ret = I40E_ERR_PARAM;
2288 goto error_param;
2289 }
fdf0e0bf 2290
d0fda04d
HR		 2291 /* Use the queue bit map sent by the VF */
2292 if (i40e_ctrl_vf_rx_rings(pf->vsi[vf->lan_vsi_idx], vqs->rx_queues,
2293 true)) {
88f6563d 2294 aq_ret = I40E_ERR_TIMEOUT;
d0fda04d
HR		 2295 goto error_param;
2296 }
2297 if (i40e_ctrl_vf_tx_rings(pf->vsi[vf->lan_vsi_idx], vqs->tx_queues,
2298 true)) {
2299 aq_ret = I40E_ERR_TIMEOUT;
2300 goto error_param;
2301 }
c27eac48
AD		 2302
2303 /* need to start the rings for additional ADq VSI's as well */
2304 if (vf->adq_enabled) {
2305 /* zero belongs to LAN VSI */
2306 for (i = 1; i < vf->num_tc; i++) {
2307 if (i40e_vsi_start_rings(pf->vsi[vf->ch[i].vsi_idx]))
2308 aq_ret = I40E_ERR_TIMEOUT;
2309 }
2310 }
2311
5c3c48ac 2312error_param:
b40c82e6 2313 /* send the response to the VF */
310a2ad9 2314 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_QUEUES,
5c3c48ac
JB		 2315 aq_ret);
2316}
2317
2318/**
2319 * i40e_vc_disable_queues_msg
b40c82e6 2320 * @vf: pointer to the VF info
5c3c48ac 2321 * @msg: pointer to the msg buffer
5c3c48ac 2322 *
b40c82e6 2323 * called from the VF to disable all or specific
5c3c48ac
JB		 2324 * queue(s)
2325 **/
679b05c0 2326static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2327{
310a2ad9
JB		 2328 struct virtchnl_queue_select *vqs =
2329 (struct virtchnl_queue_select *)msg;
5c3c48ac 2330 struct i40e_pf *pf = vf->pf;
5c3c48ac 2331 i40e_status aq_ret = 0;
5c3c48ac 2332
6322e63c 2333 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2334 aq_ret = I40E_ERR_PARAM;
2335 goto error_param;
2336 }
2337
2338 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
2339 aq_ret = I40E_ERR_PARAM;
2340 goto error_param;
2341 }
2342
2343 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
2344 aq_ret = I40E_ERR_PARAM;
2345 goto error_param;
2346 }
fdf0e0bf 2347
d0fda04d
HR		 2348 /* Use the queue bit map sent by the VF */
2349 if (i40e_ctrl_vf_tx_rings(pf->vsi[vf->lan_vsi_idx], vqs->tx_queues,
2350 false)) {
2351 aq_ret = I40E_ERR_TIMEOUT;
2352 goto error_param;
2353 }
2354 if (i40e_ctrl_vf_rx_rings(pf->vsi[vf->lan_vsi_idx], vqs->rx_queues,
2355 false)) {
2356 aq_ret = I40E_ERR_TIMEOUT;
2357 goto error_param;
2358 }
5c3c48ac 2359error_param:
b40c82e6 2360 /* send the response to the VF */
310a2ad9 2361 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_QUEUES,
5c3c48ac
JB		 2362 aq_ret);
2363}
2364
a3f5aa90
AB		 2365/**
2366 * i40e_vc_request_queues_msg
2367 * @vf: pointer to the VF info
2368 * @msg: pointer to the msg buffer
a3f5aa90
AB		 2369 *
2370 * VFs get a default number of queues but can use this message to request a
17a9422d
AB		 2371 * different number. If the request is successful, PF will reset the VF and
2372 * return 0. If unsuccessful, PF will send message informing VF of number of
2373 * available queues and return result of sending VF a message.
a3f5aa90 2374 **/
679b05c0 2375static int i40e_vc_request_queues_msg(struct i40e_vf *vf, u8 *msg)
a3f5aa90
AB		 2376{
2377 struct virtchnl_vf_res_request *vfres =
2378 (struct virtchnl_vf_res_request *)msg;
2379 int req_pairs = vfres->num_queue_pairs;
2380 int cur_pairs = vf->num_queue_pairs;
2381 struct i40e_pf *pf = vf->pf;
2382
2383 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
2384 return -EINVAL;
2385
2386 if (req_pairs <= 0) {
2387 dev_err(&pf->pdev->dev,
2388 "VF %d tried to request %d queues. Ignoring.\n",
2389 vf->vf_id, req_pairs);
2390 } else if (req_pairs > I40E_MAX_VF_QUEUES) {
2391 dev_err(&pf->pdev->dev,
2392 "VF %d tried to request more than %d queues.\n",
2393 vf->vf_id,
2394 I40E_MAX_VF_QUEUES);
2395 vfres->num_queue_pairs = I40E_MAX_VF_QUEUES;
2396 } else if (req_pairs - cur_pairs > pf->queues_left) {
2397 dev_warn(&pf->pdev->dev,
2398 "VF %d requested %d more queues, but only %d left.\n",
2399 vf->vf_id,
2400 req_pairs - cur_pairs,
2401 pf->queues_left);
2402 vfres->num_queue_pairs = pf->queues_left + cur_pairs;
2403 } else {
17a9422d 2404 /* successful request */
a3f5aa90 2405 vf->num_req_queues = req_pairs;
17a9422d
AB		 2406 i40e_vc_notify_vf_reset(vf);
2407 i40e_reset_vf(vf, false);
2408 return 0;
a3f5aa90
AB		 2409 }
2410
2411 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_REQUEST_QUEUES, 0,
c30bf8ce 2412 (u8 *)vfres, sizeof(*vfres));
a3f5aa90
AB		 2413}
2414
5c3c48ac
JB		 2415/**
2416 * i40e_vc_get_stats_msg
b40c82e6 2417 * @vf: pointer to the VF info
5c3c48ac 2418 * @msg: pointer to the msg buffer
5c3c48ac 2419 *
b40c82e6 2420 * called from the VF to get vsi stats
5c3c48ac 2421 **/
679b05c0 2422static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2423{
310a2ad9
JB		 2424 struct virtchnl_queue_select *vqs =
2425 (struct virtchnl_queue_select *)msg;
5c3c48ac
JB		 2426 struct i40e_pf *pf = vf->pf;
2427 struct i40e_eth_stats stats;
2428 i40e_status aq_ret = 0;
2429 struct i40e_vsi *vsi;
2430
2431 memset(&stats, 0, sizeof(struct i40e_eth_stats));
2432
6322e63c 2433 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2434 aq_ret = I40E_ERR_PARAM;
2435 goto error_param;
2436 }
2437
2438 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
2439 aq_ret = I40E_ERR_PARAM;
2440 goto error_param;
2441 }
2442
fdf0e0bf 2443 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2444 if (!vsi) {
2445 aq_ret = I40E_ERR_PARAM;
2446 goto error_param;
2447 }
2448 i40e_update_eth_stats(vsi);
5a9769c8 2449 stats = vsi->eth_stats;
5c3c48ac
JB		 2450
2451error_param:
b40c82e6 2452 /* send the response back to the VF */
310a2ad9 2453 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_STATS, aq_ret,
5c3c48ac
JB		 2454 (u8 *)&stats, sizeof(stats));
2455}
2456
06b6e2a2
AL		 2457/* If the VF is not trusted restrict the number of MAC/VLAN it can program
2458 * MAC filters: 16 for multicast, 1 for MAC, 1 for broadcast
2459 */
2460#define I40E_VC_MAX_MAC_ADDR_PER_VF (16 + 1 + 1)
5f527ba9
ASJ		 2461#define I40E_VC_MAX_VLAN_PER_VF 8
2462
f657a6e1
GR		 2463/**
2464 * i40e_check_vf_permission
b40c82e6 2465 * @vf: pointer to the VF info
03ce7b1d 2466 * @al: MAC address list from virtchnl
f657a6e1 2467 *
03ce7b1d
FS		 2468 * Check that the given list of MAC addresses is allowed. Will return -EPERM
2469 * if any address in the list is not valid. Checks the following conditions:
2470 *
2471 * 1) broadcast and zero addresses are never valid
2472 * 2) unicast addresses are not allowed if the VMM has administratively set
2473 * the VF MAC address, unless the VF is marked as privileged.
2474 * 3) There is enough space to add all the addresses.
2475 *
2476 * Note that to guarantee consistency, it is expected this function be called
2477 * while holding the mac_filter_hash_lock, as otherwise the current number of
2478 * addresses might not be accurate.
f657a6e1 2479 **/
03ce7b1d
FS		 2480static inline int i40e_check_vf_permission(struct i40e_vf *vf,
2481 struct virtchnl_ether_addr_list *al)
f657a6e1
GR		 2482{
2483 struct i40e_pf *pf = vf->pf;
03ce7b1d
FS		 2484 int i;
2485
2486 /* If this VF is not privileged, then we can't add more than a limited
2487 * number of addresses. Check to make sure that the additions do not
2488 * push us over the limit.
2489 */
2490 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
2491 (vf->num_mac + al->num_elements) > I40E_VC_MAX_MAC_ADDR_PER_VF) {
2492 dev_err(&pf->pdev->dev,
2493 "Cannot add more MAC addresses, VF is not trusted, switch the VF to trusted to add more functionality\n");
2494 return -EPERM;
2495 }
2496
2497 for (i = 0; i < al->num_elements; i++) {
2498 u8 *addr = al->list[i].addr;
2499
2500 if (is_broadcast_ether_addr(addr) ||
2501 is_zero_ether_addr(addr)) {
2502 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n",
2503 addr);
2504 return I40E_ERR_INVALID_MAC_ADDR;
2505 }
f657a6e1 2506
f657a6e1
GR		 2507 /* If the host VMM administrator has set the VF MAC address
2508 * administratively via the ndo_set_vf_mac command then deny
2509 * permission to the VF to add or delete unicast MAC addresses.
692fb0a7 2510 * Unless the VF is privileged and then it can do whatever.
5017c2a8
GR		 2511 * The VF may request to set the MAC address filter already
2512 * assigned to it so do not return an error in that case.
f657a6e1 2513 */
03ce7b1d
FS		 2514 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
2515 !is_multicast_ether_addr(addr) && vf->pf_set_mac &&
2516 !ether_addr_equal(addr, vf->default_lan_addr.addr)) {
2517 dev_err(&pf->pdev->dev,
ae1e29f6 2518 "VF attempting to override administratively set MAC address, bring down and up the VF interface to resume normal operation\n");
03ce7b1d
FS		 2519 return -EPERM;
2520 }
f657a6e1 2521 }
03ce7b1d
FS		 2522
2523 return 0;
f657a6e1
GR		 2524}
2525
5c3c48ac
JB		 2526/**
2527 * i40e_vc_add_mac_addr_msg
b40c82e6 2528 * @vf: pointer to the VF info
5c3c48ac 2529 * @msg: pointer to the msg buffer
5c3c48ac
JB		 2530 *
2531 * add guest mac address filter
2532 **/
679b05c0 2533static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2534{
310a2ad9
JB		 2535 struct virtchnl_ether_addr_list *al =
2536 (struct virtchnl_ether_addr_list *)msg;
5c3c48ac
JB		 2537 struct i40e_pf *pf = vf->pf;
2538 struct i40e_vsi *vsi = NULL;
2539 u16 vsi_id = al->vsi_id;
f657a6e1 2540 i40e_status ret = 0;
5c3c48ac
JB		 2541 int i;
2542
6322e63c 2543 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac 2544 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 2545 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2546 goto error_param;
2547 }
2548
fdf0e0bf 2549 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2550
21659035
KP		 2551 /* Lock once, because all function inside for loop accesses VSI's
2552 * MAC filter list which needs to be protected using same lock.
2553 */
278e7d0b 2554 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 2555
03ce7b1d
FS		 2556 ret = i40e_check_vf_permission(vf, al);
2557 if (ret) {
2558 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2559 goto error_param;
2560 }
2561
5c3c48ac
JB		 2562 /* add new addresses to the list */
2563 for (i = 0; i < al->num_elements; i++) {
2564 struct i40e_mac_filter *f;
2565
1bc87e80 2566 f = i40e_find_mac(vsi, al->list[i].addr);
34c164de 2567 if (!f) {
feffdbe4 2568 f = i40e_add_mac_filter(vsi, al->list[i].addr);
5c3c48ac 2569
34c164de
ZP		 2570 if (!f) {
2571 dev_err(&pf->pdev->dev,
2572 "Unable to add MAC filter %pM for VF %d\n",
2573 al->list[i].addr, vf->vf_id);
2574 ret = I40E_ERR_PARAM;
2575 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2576 goto error_param;
2577 } else {
2578 vf->num_mac++;
2579 }
5c3c48ac
JB		 2580 }
2581 }
278e7d0b 2582 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2583
2584 /* program the updated filter list */
ea02e90b
MW		 2585 ret = i40e_sync_vsi_filters(vsi);
2586 if (ret)
2587 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2588 vf->vf_id, ret);
5c3c48ac
JB		 2589
2590error_param:
b40c82e6 2591 /* send the response to the VF */
310a2ad9 2592 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_ETH_ADDR,
f657a6e1 2593 ret);
5c3c48ac
JB		 2594}
2595
2596/**
2597 * i40e_vc_del_mac_addr_msg
b40c82e6 2598 * @vf: pointer to the VF info
5c3c48ac 2599 * @msg: pointer to the msg buffer
5c3c48ac
JB		 2600 *
2601 * remove guest mac address filter
2602 **/
679b05c0 2603static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2604{
310a2ad9
JB		 2605 struct virtchnl_ether_addr_list *al =
2606 (struct virtchnl_ether_addr_list *)msg;
5c3c48ac
JB		 2607 struct i40e_pf *pf = vf->pf;
2608 struct i40e_vsi *vsi = NULL;
2609 u16 vsi_id = al->vsi_id;
f657a6e1 2610 i40e_status ret = 0;
5c3c48ac
JB		 2611 int i;
2612
6322e63c 2613 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac 2614 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 2615 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2616 goto error_param;
2617 }
f657a6e1
GR		 2618
2619 for (i = 0; i < al->num_elements; i++) {
700bbf6c
MW		 2620 if (is_broadcast_ether_addr(al->list[i].addr) ||
2621 is_zero_ether_addr(al->list[i].addr)) {
8d8f2295
MW		 2622 dev_err(&pf->pdev->dev, "Invalid MAC addr %pM for VF %d\n",
2623 al->list[i].addr, vf->vf_id);
700bbf6c 2624 ret = I40E_ERR_INVALID_MAC_ADDR;
f657a6e1 2625 goto error_param;
700bbf6c 2626 }
5907cf6c
PM		 2627
2628 if (vf->pf_set_mac &&
2629 ether_addr_equal(al->list[i].addr,
2630 vf->default_lan_addr.addr)) {
2631 dev_err(&pf->pdev->dev,
2632 "MAC addr %pM has been set by PF, cannot delete it for VF %d, reset VF to change MAC addr\n",
2633 vf->default_lan_addr.addr, vf->vf_id);
2634 ret = I40E_ERR_PARAM;
2635 goto error_param;
2636 }
f657a6e1 2637 }
fdf0e0bf 2638 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2639
278e7d0b 2640 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2641 /* delete addresses from the list */
2642 for (i = 0; i < al->num_elements; i++)
feffdbe4 2643 if (i40e_del_mac_filter(vsi, al->list[i].addr)) {
b36e9ab5 2644 ret = I40E_ERR_INVALID_MAC_ADDR;
278e7d0b 2645 spin_unlock_bh(&vsi->mac_filter_hash_lock);
b36e9ab5 2646 goto error_param;
5f527ba9
ASJ		 2647 } else {
2648 vf->num_mac--;
b36e9ab5
MW		 2649 }
2650
278e7d0b 2651 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2652
2653 /* program the updated filter list */
ea02e90b
MW		 2654 ret = i40e_sync_vsi_filters(vsi);
2655 if (ret)
2656 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2657 vf->vf_id, ret);
5c3c48ac
JB		 2658
2659error_param:
b40c82e6 2660 /* send the response to the VF */
310a2ad9 2661 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_ETH_ADDR,
f657a6e1 2662 ret);
5c3c48ac
JB		 2663}
2664
2665/**
2666 * i40e_vc_add_vlan_msg
b40c82e6 2667 * @vf: pointer to the VF info
5c3c48ac 2668 * @msg: pointer to the msg buffer
5c3c48ac
JB		 2669 *
2670 * program guest vlan id
2671 **/
679b05c0 2672static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2673{
310a2ad9
JB		 2674 struct virtchnl_vlan_filter_list *vfl =
2675 (struct virtchnl_vlan_filter_list *)msg;
5c3c48ac
JB		 2676 struct i40e_pf *pf = vf->pf;
2677 struct i40e_vsi *vsi = NULL;
2678 u16 vsi_id = vfl->vsi_id;
2679 i40e_status aq_ret = 0;
2680 int i;
2681
5f527ba9
ASJ		 2682 if ((vf->num_vlan >= I40E_VC_MAX_VLAN_PER_VF) &&
2683 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2684 dev_err(&pf->pdev->dev,
2685 "VF is not trusted, switch the VF to trusted to add more VLAN addresses\n");
2686 goto error_param;
2687 }
6322e63c 2688 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2689 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2690 aq_ret = I40E_ERR_PARAM;
2691 goto error_param;
2692 }
2693
2694 for (i = 0; i < vfl->num_elements; i++) {
2695 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2696 aq_ret = I40E_ERR_PARAM;
2697 dev_err(&pf->pdev->dev,
2698 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
2699 goto error_param;
2700 }
2701 }
fdf0e0bf 2702 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2703 if (vsi->info.pvid) {
2704 aq_ret = I40E_ERR_PARAM;
2705 goto error_param;
2706 }
2707
2708 i40e_vlan_stripping_enable(vsi);
2709 for (i = 0; i < vfl->num_elements; i++) {
2710 /* add new VLAN filter */
2711 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
5f527ba9
ASJ		 2712 if (!ret)
2713 vf->num_vlan++;
6995b36c 2714
6322e63c 2715 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2716 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2717 true,
2718 vfl->vlan_id[i],
2719 NULL);
6322e63c 2720 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2721 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2722 true,
2723 vfl->vlan_id[i],
2724 NULL);
2725
5c3c48ac
JB		 2726 if (ret)
2727 dev_err(&pf->pdev->dev,
8d8f2295
MW		 2728 "Unable to add VLAN filter %d for VF %d, error %d\n",
2729 vfl->vlan_id[i], vf->vf_id, ret);
5c3c48ac
JB		 2730 }
2731
2732error_param:
b40c82e6 2733 /* send the response to the VF */
310a2ad9 2734 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_VLAN, aq_ret);
5c3c48ac
JB		 2735}
2736
2737/**
2738 * i40e_vc_remove_vlan_msg
b40c82e6 2739 * @vf: pointer to the VF info
5c3c48ac 2740 * @msg: pointer to the msg buffer
5c3c48ac
JB		 2741 *
2742 * remove programmed guest vlan id
2743 **/
679b05c0 2744static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2745{
310a2ad9
JB		 2746 struct virtchnl_vlan_filter_list *vfl =
2747 (struct virtchnl_vlan_filter_list *)msg;
5c3c48ac
JB		 2748 struct i40e_pf *pf = vf->pf;
2749 struct i40e_vsi *vsi = NULL;
2750 u16 vsi_id = vfl->vsi_id;
2751 i40e_status aq_ret = 0;
2752 int i;
2753
6322e63c 2754 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2755 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2756 aq_ret = I40E_ERR_PARAM;
2757 goto error_param;
2758 }
2759
2760 for (i = 0; i < vfl->num_elements; i++) {
2761 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2762 aq_ret = I40E_ERR_PARAM;
2763 goto error_param;
2764 }
2765 }
2766
fdf0e0bf 2767 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2768 if (vsi->info.pvid) {
5a189f15
AL		 2769 if (vfl->num_elements > 1 || vfl->vlan_id[0])
2770 aq_ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2771 goto error_param;
2772 }
2773
2774 for (i = 0; i < vfl->num_elements; i++) {
3aa7b74d
FS		 2775 i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
2776 vf->num_vlan--;
6995b36c 2777
6322e63c 2778 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2779 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2780 false,
2781 vfl->vlan_id[i],
2782 NULL);
6322e63c 2783 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2784 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2785 false,
2786 vfl->vlan_id[i],
2787 NULL);
5c3c48ac
JB		 2788 }
2789
2790error_param:
b40c82e6 2791 /* send the response to the VF */
310a2ad9 2792 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_VLAN, aq_ret);
5c3c48ac
JB		 2793}
2794
e3219ce6
ASJ		 2795/**
2796 * i40e_vc_iwarp_msg
2797 * @vf: pointer to the VF info
2798 * @msg: pointer to the msg buffer
2799 * @msglen: msg length
2800 *
2801 * called from the VF for the iwarp msgs
2802 **/
2803static int i40e_vc_iwarp_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2804{
2805 struct i40e_pf *pf = vf->pf;
2806 int abs_vf_id = vf->vf_id + pf->hw.func_caps.vf_base_id;
2807 i40e_status aq_ret = 0;
2808
6322e63c
JK		 2809 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2810 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2811 aq_ret = I40E_ERR_PARAM;
2812 goto error_param;
2813 }
2814
2815 i40e_notify_client_of_vf_msg(pf->vsi[pf->lan_vsi], abs_vf_id,
2816 msg, msglen);
2817
2818error_param:
2819 /* send the response to the VF */
310a2ad9 2820 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_IWARP,
e3219ce6
ASJ		 2821 aq_ret);
2822}
2823
2824/**
2825 * i40e_vc_iwarp_qvmap_msg
2826 * @vf: pointer to the VF info
2827 * @msg: pointer to the msg buffer
e3219ce6
ASJ		 2828 * @config: config qvmap or release it
2829 *
2830 * called from the VF for the iwarp msgs
2831 **/
679b05c0 2832static int i40e_vc_iwarp_qvmap_msg(struct i40e_vf *vf, u8 *msg, bool config)
e3219ce6 2833{
310a2ad9
JB		 2834 struct virtchnl_iwarp_qvlist_info *qvlist_info =
2835 (struct virtchnl_iwarp_qvlist_info *)msg;
e3219ce6
ASJ		 2836 i40e_status aq_ret = 0;
2837
6322e63c
JK		 2838 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2839 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2840 aq_ret = I40E_ERR_PARAM;
2841 goto error_param;
2842 }
2843
2844 if (config) {
2845 if (i40e_config_iwarp_qvlist(vf, qvlist_info))
2846 aq_ret = I40E_ERR_PARAM;
2847 } else {
2848 i40e_release_iwarp_qvlist(vf);
2849 }
2850
2851error_param:
2852 /* send the response to the VF */
2853 return i40e_vc_send_resp_to_vf(vf,
310a2ad9
JB		 2854 config ? VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP :
2855 VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP,
e3219ce6
ASJ		 2856 aq_ret);
2857}
2858
c4e1868c
MW		 2859/**
2860 * i40e_vc_config_rss_key
2861 * @vf: pointer to the VF info
2862 * @msg: pointer to the msg buffer
c4e1868c
MW		 2863 *
2864 * Configure the VF's RSS key
2865 **/
679b05c0 2866static int i40e_vc_config_rss_key(struct i40e_vf *vf, u8 *msg)
c4e1868c 2867{
310a2ad9
JB		 2868 struct virtchnl_rss_key *vrk =
2869 (struct virtchnl_rss_key *)msg;
c4e1868c
MW		 2870 struct i40e_pf *pf = vf->pf;
2871 struct i40e_vsi *vsi = NULL;
2872 u16 vsi_id = vrk->vsi_id;
2873 i40e_status aq_ret = 0;
2874
6322e63c 2875 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2876 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2877 (vrk->key_len != I40E_HKEY_ARRAY_SIZE)) {
2878 aq_ret = I40E_ERR_PARAM;
2879 goto err;
2880 }
2881
2882 vsi = pf->vsi[vf->lan_vsi_idx];
2883 aq_ret = i40e_config_rss(vsi, vrk->key, NULL, 0);
2884err:
2885 /* send the response to the VF */
310a2ad9 2886 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_KEY,
c4e1868c
MW		 2887 aq_ret);
2888}
2889
2890/**
2891 * i40e_vc_config_rss_lut
2892 * @vf: pointer to the VF info
2893 * @msg: pointer to the msg buffer
c4e1868c
MW		 2894 *
2895 * Configure the VF's RSS LUT
2896 **/
679b05c0 2897static int i40e_vc_config_rss_lut(struct i40e_vf *vf, u8 *msg)
c4e1868c 2898{
310a2ad9
JB		 2899 struct virtchnl_rss_lut *vrl =
2900 (struct virtchnl_rss_lut *)msg;
c4e1868c
MW		 2901 struct i40e_pf *pf = vf->pf;
2902 struct i40e_vsi *vsi = NULL;
2903 u16 vsi_id = vrl->vsi_id;
2904 i40e_status aq_ret = 0;
2905
6322e63c 2906 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2907 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2908 (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)) {
2909 aq_ret = I40E_ERR_PARAM;
2910 goto err;
2911 }
2912
2913 vsi = pf->vsi[vf->lan_vsi_idx];
2914 aq_ret = i40e_config_rss(vsi, NULL, vrl->lut, I40E_VF_HLUT_ARRAY_SIZE);
2915 /* send the response to the VF */
2916err:
310a2ad9 2917 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_LUT,
c4e1868c
MW		 2918 aq_ret);
2919}
2920
2921/**
2922 * i40e_vc_get_rss_hena
2923 * @vf: pointer to the VF info
2924 * @msg: pointer to the msg buffer
c4e1868c
MW		 2925 *
2926 * Return the RSS HENA bits allowed by the hardware
2927 **/
679b05c0 2928static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg)
c4e1868c 2929{
310a2ad9 2930 struct virtchnl_rss_hena *vrh = NULL;
c4e1868c
MW		 2931 struct i40e_pf *pf = vf->pf;
2932 i40e_status aq_ret = 0;
2933 int len = 0;
2934
6322e63c 2935 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2936 aq_ret = I40E_ERR_PARAM;
2937 goto err;
2938 }
310a2ad9 2939 len = sizeof(struct virtchnl_rss_hena);
c4e1868c
MW		 2940
2941 vrh = kzalloc(len, GFP_KERNEL);
2942 if (!vrh) {
2943 aq_ret = I40E_ERR_NO_MEMORY;
2944 len = 0;
2945 goto err;
2946 }
2947 vrh->hena = i40e_pf_get_default_rss_hena(pf);
2948err:
2949 /* send the response back to the VF */
310a2ad9 2950 aq_ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_RSS_HENA_CAPS,
c4e1868c 2951 aq_ret, (u8 *)vrh, len);
b7d2cd95 2952 kfree(vrh);
c4e1868c
MW		 2953 return aq_ret;
2954}
2955
2956/**
2957 * i40e_vc_set_rss_hena
2958 * @vf: pointer to the VF info
2959 * @msg: pointer to the msg buffer
c4e1868c
MW		 2960 *
2961 * Set the RSS HENA bits for the VF
2962 **/
679b05c0 2963static int i40e_vc_set_rss_hena(struct i40e_vf *vf, u8 *msg)
c4e1868c 2964{
310a2ad9
JB		 2965 struct virtchnl_rss_hena *vrh =
2966 (struct virtchnl_rss_hena *)msg;
c4e1868c
MW		 2967 struct i40e_pf *pf = vf->pf;
2968 struct i40e_hw *hw = &pf->hw;
2969 i40e_status aq_ret = 0;
2970
6322e63c 2971 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2972 aq_ret = I40E_ERR_PARAM;
2973 goto err;
2974 }
2975 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)vrh->hena);
2976 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_id),
2977 (u32)(vrh->hena >> 32));
2978
2979 /* send the response to the VF */
2980err:
f0adc6e8 2981 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_SET_RSS_HENA, aq_ret);
c4e1868c
MW		 2982}
2983
8774370d
MS		 2984/**
2985 * i40e_vc_enable_vlan_stripping
2986 * @vf: pointer to the VF info
2987 * @msg: pointer to the msg buffer
8774370d
MS		 2988 *
2989 * Enable vlan header stripping for the VF
2990 **/
679b05c0 2991static int i40e_vc_enable_vlan_stripping(struct i40e_vf *vf, u8 *msg)
8774370d
MS		 2992{
2993 struct i40e_vsi *vsi = vf->pf->vsi[vf->lan_vsi_idx];
2994 i40e_status aq_ret = 0;
2995
2996 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
2997 aq_ret = I40E_ERR_PARAM;
2998 goto err;
2999 }
3000
3001 i40e_vlan_stripping_enable(vsi);
3002
3003 /* send the response to the VF */
3004err:
3005 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_VLAN_STRIPPING,
3006 aq_ret);
3007}
3008
3009/**
3010 * i40e_vc_disable_vlan_stripping
3011 * @vf: pointer to the VF info
3012 * @msg: pointer to the msg buffer
8774370d
MS		 3013 *
3014 * Disable vlan header stripping for the VF
3015 **/
679b05c0 3016static int i40e_vc_disable_vlan_stripping(struct i40e_vf *vf, u8 *msg)
8774370d
MS		 3017{
3018 struct i40e_vsi *vsi = vf->pf->vsi[vf->lan_vsi_idx];
3019 i40e_status aq_ret = 0;
3020
3021 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3022 aq_ret = I40E_ERR_PARAM;
3023 goto err;
3024 }
3025
3026 i40e_vlan_stripping_disable(vsi);
3027
3028 /* send the response to the VF */
3029err:
3030 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_VLAN_STRIPPING,
3031 aq_ret);
3032}
3033
e284fc28
AD		 3034/**
3035 * i40e_validate_cloud_filter
3036 * @mask: mask for TC filter
3037 * @data: data for TC filter
3038 *
3039 * This function validates cloud filter programmed as TC filter for ADq
3040 **/
3041static int i40e_validate_cloud_filter(struct i40e_vf *vf,
3042 struct virtchnl_filter *tc_filter)
3043{
3044 struct virtchnl_l4_spec mask = tc_filter->mask.tcp_spec;
3045 struct virtchnl_l4_spec data = tc_filter->data.tcp_spec;
3046 struct i40e_pf *pf = vf->pf;
3047 struct i40e_vsi *vsi = NULL;
3048 struct i40e_mac_filter *f;
3049 struct hlist_node *h;
3050 bool found = false;
3051 int bkt;
3052
3053 if (!tc_filter->action) {
3054 dev_info(&pf->pdev->dev,
3055 "VF %d: Currently ADq doesn't support Drop Action\n",
3056 vf->vf_id);
3057 goto err;
3058 }
3059
3060 /* action_meta is TC number here to which the filter is applied */
3061 if (!tc_filter->action_meta ||
3062 tc_filter->action_meta > I40E_MAX_VF_VSI) {
3063 dev_info(&pf->pdev->dev, "VF %d: Invalid TC number %u\n",
3064 vf->vf_id, tc_filter->action_meta);
3065 goto err;
3066 }
3067
3068 /* Check filter if it's programmed for advanced mode or basic mode.
3069 * There are two ADq modes (for VF only),
3070 * 1. Basic mode: intended to allow as many filter options as possible
3071 * to be added to a VF in Non-trusted mode. Main goal is
3072 * to add filters to its own MAC and VLAN id.
3073 * 2. Advanced mode: is for allowing filters to be applied other than
3074 * its own MAC or VLAN. This mode requires the VF to be
3075 * Trusted.
3076 */
3077 if (mask.dst_mac[0] && !mask.dst_ip[0]) {
3078 vsi = pf->vsi[vf->lan_vsi_idx];
3079 f = i40e_find_mac(vsi, data.dst_mac);
3080
3081 if (!f) {
3082 dev_info(&pf->pdev->dev,
3083 "Destination MAC %pM doesn't belong to VF %d\n",
3084 data.dst_mac, vf->vf_id);
3085 goto err;
3086 }
3087
3088 if (mask.vlan_id) {
3089 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f,
3090 hlist) {
3091 if (f->vlan == ntohs(data.vlan_id)) {
3092 found = true;
3093 break;
3094 }
3095 }
3096 if (!found) {
3097 dev_info(&pf->pdev->dev,
3098 "VF %d doesn't have any VLAN id %u\n",
3099 vf->vf_id, ntohs(data.vlan_id));
3100 goto err;
3101 }
3102 }
3103 } else {
3104 /* Check if VF is trusted */
3105 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
3106 dev_err(&pf->pdev->dev,
3107 "VF %d not trusted, make VF trusted to add advanced mode ADq cloud filters\n",
3108 vf->vf_id);
3109 return I40E_ERR_CONFIG;
3110 }
3111 }
3112
3113 if (mask.dst_mac[0] & data.dst_mac[0]) {
3114 if (is_broadcast_ether_addr(data.dst_mac) ||
3115 is_zero_ether_addr(data.dst_mac)) {
3116 dev_info(&pf->pdev->dev, "VF %d: Invalid Dest MAC addr %pM\n",
3117 vf->vf_id, data.dst_mac);
3118 goto err;
3119 }
3120 }
3121
3122 if (mask.src_mac[0] & data.src_mac[0]) {
3123 if (is_broadcast_ether_addr(data.src_mac) ||
3124 is_zero_ether_addr(data.src_mac)) {
3125 dev_info(&pf->pdev->dev, "VF %d: Invalid Source MAC addr %pM\n",
3126 vf->vf_id, data.src_mac);
3127 goto err;
3128 }
3129 }
3130
3131 if (mask.dst_port & data.dst_port) {
a01e5f22 3132 if (!data.dst_port) {
e284fc28
AD		 3133 dev_info(&pf->pdev->dev, "VF %d: Invalid Dest port\n",
3134 vf->vf_id);
3135 goto err;
3136 }
3137 }
3138
3139 if (mask.src_port & data.src_port) {
a01e5f22 3140 if (!data.src_port) {
e284fc28
AD		 3141 dev_info(&pf->pdev->dev, "VF %d: Invalid Source port\n",
3142 vf->vf_id);
3143 goto err;
3144 }
3145 }
3146
3147 if (tc_filter->flow_type != VIRTCHNL_TCP_V6_FLOW &&
3148 tc_filter->flow_type != VIRTCHNL_TCP_V4_FLOW) {
3149 dev_info(&pf->pdev->dev, "VF %d: Invalid Flow type\n",
3150 vf->vf_id);
3151 goto err;
3152 }
3153
3154 if (mask.vlan_id & data.vlan_id) {
3155 if (ntohs(data.vlan_id) > I40E_MAX_VLANID) {
3156 dev_info(&pf->pdev->dev, "VF %d: invalid VLAN ID\n",
3157 vf->vf_id);
3158 goto err;
3159 }
3160 }
3161
3162 return I40E_SUCCESS;
3163err:
3164 return I40E_ERR_CONFIG;
3165}
3166
3167/**
3168 * i40e_find_vsi_from_seid - searches for the vsi with the given seid
3169 * @vf: pointer to the VF info
3170 * @seid - seid of the vsi it is searching for
3171 **/
3172static struct i40e_vsi *i40e_find_vsi_from_seid(struct i40e_vf *vf, u16 seid)
3173{
3174 struct i40e_pf *pf = vf->pf;
3175 struct i40e_vsi *vsi = NULL;
3176 int i;
3177
3178 for (i = 0; i < vf->num_tc ; i++) {
3179 vsi = i40e_find_vsi_from_id(pf, vf->ch[i].vsi_id);
46345b38 3180 if (vsi && vsi->seid == seid)
e284fc28
AD		 3181 return vsi;
3182 }
3183 return NULL;
3184}
3185
3186/**
3187 * i40e_del_all_cloud_filters
3188 * @vf: pointer to the VF info
3189 *
3190 * This function deletes all cloud filters
3191 **/
3192static void i40e_del_all_cloud_filters(struct i40e_vf *vf)
3193{
3194 struct i40e_cloud_filter *cfilter = NULL;
3195 struct i40e_pf *pf = vf->pf;
3196 struct i40e_vsi *vsi = NULL;
3197 struct hlist_node *node;
3198 int ret;
3199
3200 hlist_for_each_entry_safe(cfilter, node,
3201 &vf->cloud_filter_list, cloud_node) {
3202 vsi = i40e_find_vsi_from_seid(vf, cfilter->seid);
3203
3204 if (!vsi) {
3205 dev_err(&pf->pdev->dev, "VF %d: no VSI found for matching %u seid, can't delete cloud filter\n",
3206 vf->vf_id, cfilter->seid);
3207 continue;
3208 }
3209
3210 if (cfilter->dst_port)
3211 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
3212 false);
3213 else
3214 ret = i40e_add_del_cloud_filter(vsi, cfilter, false);
3215 if (ret)
3216 dev_err(&pf->pdev->dev,
3217 "VF %d: Failed to delete cloud filter, err %s aq_err %s\n",
3218 vf->vf_id, i40e_stat_str(&pf->hw, ret),
3219 i40e_aq_str(&pf->hw,
3220 pf->hw.aq.asq_last_status));
3221
3222 hlist_del(&cfilter->cloud_node);
3223 kfree(cfilter);
3224 vf->num_cloud_filters--;
3225 }
3226}
3227
3228/**
3229 * i40e_vc_del_cloud_filter
3230 * @vf: pointer to the VF info
3231 * @msg: pointer to the msg buffer
3232 *
3233 * This function deletes a cloud filter programmed as TC filter for ADq
3234 **/
3235static int i40e_vc_del_cloud_filter(struct i40e_vf *vf, u8 *msg)
3236{
3237 struct virtchnl_filter *vcf = (struct virtchnl_filter *)msg;
3238 struct virtchnl_l4_spec mask = vcf->mask.tcp_spec;
3239 struct virtchnl_l4_spec tcf = vcf->data.tcp_spec;
3240 struct i40e_cloud_filter cfilter, *cf = NULL;
3241 struct i40e_pf *pf = vf->pf;
3242 struct i40e_vsi *vsi = NULL;
3243 struct hlist_node *node;
3244 i40e_status aq_ret = 0;
3245 int i, ret;
3246
3247 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3248 aq_ret = I40E_ERR_PARAM;
3249 goto err;
3250 }
3251
3252 if (!vf->adq_enabled) {
3253 dev_info(&pf->pdev->dev,
3254 "VF %d: ADq not enabled, can't apply cloud filter\n",
3255 vf->vf_id);
3256 aq_ret = I40E_ERR_PARAM;
3257 goto err;
3258 }
3259
3260 if (i40e_validate_cloud_filter(vf, vcf)) {
3261 dev_info(&pf->pdev->dev,
3262 "VF %d: Invalid input, can't apply cloud filter\n",
3263 vf->vf_id);
5dd3691c
DC		 3264 aq_ret = I40E_ERR_PARAM;
3265 goto err;
e284fc28
AD		 3266 }
3267
3268 memset(&cfilter, 0, sizeof(cfilter));
3269 /* parse destination mac address */
3270 for (i = 0; i < ETH_ALEN; i++)
3271 cfilter.dst_mac[i] = mask.dst_mac[i] & tcf.dst_mac[i];
3272
3273 /* parse source mac address */
3274 for (i = 0; i < ETH_ALEN; i++)
3275 cfilter.src_mac[i] = mask.src_mac[i] & tcf.src_mac[i];
3276
3277 cfilter.vlan_id = mask.vlan_id & tcf.vlan_id;
3278 cfilter.dst_port = mask.dst_port & tcf.dst_port;
3279 cfilter.src_port = mask.src_port & tcf.src_port;
3280
3281 switch (vcf->flow_type) {
3282 case VIRTCHNL_TCP_V4_FLOW:
3283 cfilter.n_proto = ETH_P_IP;
3284 if (mask.dst_ip[0] & tcf.dst_ip[0])
3285 memcpy(&cfilter.ip.v4.dst_ip, tcf.dst_ip,
3286 ARRAY_SIZE(tcf.dst_ip));
3287 else if (mask.src_ip[0] & tcf.dst_ip[0])
3288 memcpy(&cfilter.ip.v4.src_ip, tcf.src_ip,
3289 ARRAY_SIZE(tcf.dst_ip));
3290 break;
3291 case VIRTCHNL_TCP_V6_FLOW:
3292 cfilter.n_proto = ETH_P_IPV6;
3293 if (mask.dst_ip[3] & tcf.dst_ip[3])
3294 memcpy(&cfilter.ip.v6.dst_ip6, tcf.dst_ip,
3295 sizeof(cfilter.ip.v6.dst_ip6));
3296 if (mask.src_ip[3] & tcf.src_ip[3])
3297 memcpy(&cfilter.ip.v6.src_ip6, tcf.src_ip,
3298 sizeof(cfilter.ip.v6.src_ip6));
3299 break;
3300 default:
3301 /* TC filter can be configured based on different combinations
3302 * and in this case IP is not a part of filter config
3303 */
3304 dev_info(&pf->pdev->dev, "VF %d: Flow type not configured\n",
3305 vf->vf_id);
3306 }
3307
3308 /* get the vsi to which the tc belongs to */
3309 vsi = pf->vsi[vf->ch[vcf->action_meta].vsi_idx];
3310 cfilter.seid = vsi->seid;
3311 cfilter.flags = vcf->field_flags;
3312
3313 /* Deleting TC filter */
3314 if (tcf.dst_port)
3315 ret = i40e_add_del_cloud_filter_big_buf(vsi, &cfilter, false);
3316 else
3317 ret = i40e_add_del_cloud_filter(vsi, &cfilter, false);
3318 if (ret) {
3319 dev_err(&pf->pdev->dev,
3320 "VF %d: Failed to delete cloud filter, err %s aq_err %s\n",
3321 vf->vf_id, i40e_stat_str(&pf->hw, ret),
3322 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
3323 goto err;
3324 }
3325
3326 hlist_for_each_entry_safe(cf, node,
3327 &vf->cloud_filter_list, cloud_node) {
3328 if (cf->seid != cfilter.seid)
3329 continue;
3330 if (mask.dst_port)
3331 if (cfilter.dst_port != cf->dst_port)
3332 continue;
3333 if (mask.dst_mac[0])
3334 if (!ether_addr_equal(cf->src_mac, cfilter.src_mac))
3335 continue;
3336 /* for ipv4 data to be valid, only first byte of mask is set */
3337 if (cfilter.n_proto == ETH_P_IP && mask.dst_ip[0])
3338 if (memcmp(&cfilter.ip.v4.dst_ip, &cf->ip.v4.dst_ip,
3339 ARRAY_SIZE(tcf.dst_ip)))
3340 continue;
3341 /* for ipv6, mask is set for all sixteen bytes (4 words) */
3342 if (cfilter.n_proto == ETH_P_IPV6 && mask.dst_ip[3])
3343 if (memcmp(&cfilter.ip.v6.dst_ip6, &cf->ip.v6.dst_ip6,
3344 sizeof(cfilter.ip.v6.src_ip6)))
3345 continue;
3346 if (mask.vlan_id)
3347 if (cfilter.vlan_id != cf->vlan_id)
3348 continue;
3349
3350 hlist_del(&cf->cloud_node);
3351 kfree(cf);
3352 vf->num_cloud_filters--;
3353 }
3354
3355err:
3356 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_CLOUD_FILTER,
3357 aq_ret);
3358}
3359
3360/**
3361 * i40e_vc_add_cloud_filter
3362 * @vf: pointer to the VF info
3363 * @msg: pointer to the msg buffer
3364 *
3365 * This function adds a cloud filter programmed as TC filter for ADq
3366 **/
3367static int i40e_vc_add_cloud_filter(struct i40e_vf *vf, u8 *msg)
3368{
3369 struct virtchnl_filter *vcf = (struct virtchnl_filter *)msg;
3370 struct virtchnl_l4_spec mask = vcf->mask.tcp_spec;
3371 struct virtchnl_l4_spec tcf = vcf->data.tcp_spec;
3372 struct i40e_cloud_filter *cfilter = NULL;
3373 struct i40e_pf *pf = vf->pf;
3374 struct i40e_vsi *vsi = NULL;
3375 i40e_status aq_ret = 0;
3376 int i, ret;
3377
3378 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3379 aq_ret = I40E_ERR_PARAM;
3380 goto err;
3381 }
3382
3383 if (!vf->adq_enabled) {
3384 dev_info(&pf->pdev->dev,
3385 "VF %d: ADq is not enabled, can't apply cloud filter\n",
3386 vf->vf_id);
3387 aq_ret = I40E_ERR_PARAM;
3388 goto err;
3389 }
3390
3391 if (i40e_validate_cloud_filter(vf, vcf)) {
3392 dev_info(&pf->pdev->dev,
3393 "VF %d: Invalid input/s, can't apply cloud filter\n",
3394 vf->vf_id);
d1b3fa86
CIK		 3395 aq_ret = I40E_ERR_PARAM;
3396 goto err;
e284fc28
AD		 3397 }
3398
3399 cfilter = kzalloc(sizeof(*cfilter), GFP_KERNEL);
3400 if (!cfilter)
3401 return -ENOMEM;
3402
3403 /* parse destination mac address */
3404 for (i = 0; i < ETH_ALEN; i++)
3405 cfilter->dst_mac[i] = mask.dst_mac[i] & tcf.dst_mac[i];
3406
3407 /* parse source mac address */
3408 for (i = 0; i < ETH_ALEN; i++)
3409 cfilter->src_mac[i] = mask.src_mac[i] & tcf.src_mac[i];
3410
3411 cfilter->vlan_id = mask.vlan_id & tcf.vlan_id;
3412 cfilter->dst_port = mask.dst_port & tcf.dst_port;
3413 cfilter->src_port = mask.src_port & tcf.src_port;
3414
3415 switch (vcf->flow_type) {
3416 case VIRTCHNL_TCP_V4_FLOW:
3417 cfilter->n_proto = ETH_P_IP;
3418 if (mask.dst_ip[0] & tcf.dst_ip[0])
3419 memcpy(&cfilter->ip.v4.dst_ip, tcf.dst_ip,
3420 ARRAY_SIZE(tcf.dst_ip));
3421 else if (mask.src_ip[0] & tcf.dst_ip[0])
3422 memcpy(&cfilter->ip.v4.src_ip, tcf.src_ip,
3423 ARRAY_SIZE(tcf.dst_ip));
3424 break;
3425 case VIRTCHNL_TCP_V6_FLOW:
3426 cfilter->n_proto = ETH_P_IPV6;
3427 if (mask.dst_ip[3] & tcf.dst_ip[3])
3428 memcpy(&cfilter->ip.v6.dst_ip6, tcf.dst_ip,
3429 sizeof(cfilter->ip.v6.dst_ip6));
3430 if (mask.src_ip[3] & tcf.src_ip[3])
3431 memcpy(&cfilter->ip.v6.src_ip6, tcf.src_ip,
3432 sizeof(cfilter->ip.v6.src_ip6));
3433 break;
3434 default:
3435 /* TC filter can be configured based on different combinations
3436 * and in this case IP is not a part of filter config
3437 */
3438 dev_info(&pf->pdev->dev, "VF %d: Flow type not configured\n",
3439 vf->vf_id);
3440 }
3441
3442 /* get the VSI to which the TC belongs to */
3443 vsi = pf->vsi[vf->ch[vcf->action_meta].vsi_idx];
3444 cfilter->seid = vsi->seid;
3445 cfilter->flags = vcf->field_flags;
3446
3447 /* Adding cloud filter programmed as TC filter */
3448 if (tcf.dst_port)
3449 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter, true);
3450 else
3451 ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
3452 if (ret) {
3453 dev_err(&pf->pdev->dev,
3454 "VF %d: Failed to add cloud filter, err %s aq_err %s\n",
3455 vf->vf_id, i40e_stat_str(&pf->hw, ret),
3456 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
3457 goto err;
3458 }
3459
3460 INIT_HLIST_NODE(&cfilter->cloud_node);
3461 hlist_add_head(&cfilter->cloud_node, &vf->cloud_filter_list);
3462 vf->num_cloud_filters++;
3463err:
3464 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_CLOUD_FILTER,
3465 aq_ret);
3466}
3467
c27eac48
AD		 3468/**
3469 * i40e_vc_add_qch_msg: Add queue channel and enable ADq
3470 * @vf: pointer to the VF info
3471 * @msg: pointer to the msg buffer
3472 **/
3473static int i40e_vc_add_qch_msg(struct i40e_vf *vf, u8 *msg)
3474{
3475 struct virtchnl_tc_info *tci =
3476 (struct virtchnl_tc_info *)msg;
3477 struct i40e_pf *pf = vf->pf;
0c483bd4
AD		 3478 struct i40e_link_status *ls = &pf->hw.phy.link_info;
3479 int i, adq_request_qps = 0, speed = 0;
c27eac48
AD		 3480 i40e_status aq_ret = 0;
3481
3482 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3483 aq_ret = I40E_ERR_PARAM;
3484 goto err;
3485 }
3486
3487 /* ADq cannot be applied if spoof check is ON */
3488 if (vf->spoofchk) {
3489 dev_err(&pf->pdev->dev,
3490 "Spoof check is ON, turn it OFF to enable ADq\n");
3491 aq_ret = I40E_ERR_PARAM;
3492 goto err;
3493 }
3494
3495 if (!(vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ADQ)) {
3496 dev_err(&pf->pdev->dev,
3497 "VF %d attempting to enable ADq, but hasn't properly negotiated that capability\n",
3498 vf->vf_id);
3499 aq_ret = I40E_ERR_PARAM;
3500 goto err;
3501 }
3502
3503 /* max number of traffic classes for VF currently capped at 4 */
3504 if (!tci->num_tc || tci->num_tc > I40E_MAX_VF_VSI) {
3505 dev_err(&pf->pdev->dev,
3506 "VF %d trying to set %u TCs, valid range 1-4 TCs per VF\n",
3507 vf->vf_id, tci->num_tc);
3508 aq_ret = I40E_ERR_PARAM;
3509 goto err;
3510 }
3511
3512 /* validate queues for each TC */
3513 for (i = 0; i < tci->num_tc; i++)
3514 if (!tci->list[i].count ||
3515 tci->list[i].count > I40E_DEFAULT_QUEUES_PER_VF) {
3516 dev_err(&pf->pdev->dev,
3517 "VF %d: TC %d trying to set %u queues, valid range 1-4 queues per TC\n",
3518 vf->vf_id, i, tci->list[i].count);
3519 aq_ret = I40E_ERR_PARAM;
3520 goto err;
3521 }
3522
3523 /* need Max VF queues but already have default number of queues */
3524 adq_request_qps = I40E_MAX_VF_QUEUES - I40E_DEFAULT_QUEUES_PER_VF;
3525
3526 if (pf->queues_left < adq_request_qps) {
3527 dev_err(&pf->pdev->dev,
3528 "No queues left to allocate to VF %d\n",
3529 vf->vf_id);
3530 aq_ret = I40E_ERR_PARAM;
3531 goto err;
3532 } else {
3533 /* we need to allocate max VF queues to enable ADq so as to
3534 * make sure ADq enabled VF always gets back queues when it
3535 * goes through a reset.
3536 */
3537 vf->num_queue_pairs = I40E_MAX_VF_QUEUES;
3538 }
3539
0c483bd4
AD		 3540 /* get link speed in MB to validate rate limit */
3541 switch (ls->link_speed) {
3542 case VIRTCHNL_LINK_SPEED_100MB:
3543 speed = SPEED_100;
3544 break;
3545 case VIRTCHNL_LINK_SPEED_1GB:
3546 speed = SPEED_1000;
3547 break;
3548 case VIRTCHNL_LINK_SPEED_10GB:
3549 speed = SPEED_10000;
3550 break;
3551 case VIRTCHNL_LINK_SPEED_20GB:
3552 speed = SPEED_20000;
3553 break;
3554 case VIRTCHNL_LINK_SPEED_25GB:
3555 speed = SPEED_25000;
3556 break;
3557 case VIRTCHNL_LINK_SPEED_40GB:
3558 speed = SPEED_40000;
3559 break;
3560 default:
3561 dev_err(&pf->pdev->dev,
3562 "Cannot detect link speed\n");
3563 aq_ret = I40E_ERR_PARAM;
3564 goto err;
3565 }
3566
c27eac48
AD		 3567 /* parse data from the queue channel info */
3568 vf->num_tc = tci->num_tc;
0c483bd4
AD		 3569 for (i = 0; i < vf->num_tc; i++) {
3570 if (tci->list[i].max_tx_rate) {
3571 if (tci->list[i].max_tx_rate > speed) {
3572 dev_err(&pf->pdev->dev,
3573 "Invalid max tx rate %llu specified for VF %d.",
3574 tci->list[i].max_tx_rate,
3575 vf->vf_id);
3576 aq_ret = I40E_ERR_PARAM;
3577 goto err;
3578 } else {
3579 vf->ch[i].max_tx_rate =
3580 tci->list[i].max_tx_rate;
3581 }
3582 }
c27eac48 3583 vf->ch[i].num_qps = tci->list[i].count;
0c483bd4 3584 }
c27eac48
AD		 3585
3586 /* set this flag only after making sure all inputs are sane */
3587 vf->adq_enabled = true;
e284fc28
AD		 3588 /* num_req_queues is set when user changes number of queues via ethtool
3589 * and this causes issue for default VSI(which depends on this variable)
3590 * when ADq is enabled, hence reset it.
3591 */
3592 vf->num_req_queues = 0;
c27eac48
AD		 3593
3594 /* reset the VF in order to allocate resources */
3595 i40e_vc_notify_vf_reset(vf);
3596 i40e_reset_vf(vf, false);
3597
3598 return I40E_SUCCESS;
3599
3600 /* send the response to the VF */
3601err:
3602 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_CHANNELS,
3603 aq_ret);
3604}
3605
c4998aa3
AD		 3606/**
3607 * i40e_vc_del_qch_msg
3608 * @vf: pointer to the VF info
3609 * @msg: pointer to the msg buffer
3610 **/
3611static int i40e_vc_del_qch_msg(struct i40e_vf *vf, u8 *msg)
3612{
3613 struct i40e_pf *pf = vf->pf;
3614 i40e_status aq_ret = 0;
3615
3616 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3617 aq_ret = I40E_ERR_PARAM;
3618 goto err;
3619 }
3620
3621 if (vf->adq_enabled) {
e284fc28 3622 i40e_del_all_cloud_filters(vf);
c4998aa3
AD		 3623 i40e_del_qch(vf);
3624 vf->adq_enabled = false;
3625 vf->num_tc = 0;
3626 dev_info(&pf->pdev->dev,
e284fc28 3627 "Deleting Queue Channels and cloud filters for ADq on VF %d\n",
c4998aa3
AD		 3628 vf->vf_id);
3629 } else {
3630 dev_info(&pf->pdev->dev, "VF %d trying to delete queue channels but ADq isn't enabled\n",
3631 vf->vf_id);
3632 aq_ret = I40E_ERR_PARAM;
3633 }
3634
3635 /* reset the VF in order to allocate resources */
3636 i40e_vc_notify_vf_reset(vf);
3637 i40e_reset_vf(vf, false);
3638
3639 return I40E_SUCCESS;
3640
3641err:
3642 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_CHANNELS,
3643 aq_ret);
3644}
3645
5c3c48ac
JB		 3646/**
3647 * i40e_vc_process_vf_msg
b40c82e6
JK		 3648 * @pf: pointer to the PF structure
3649 * @vf_id: source VF id
f5254429
JK		 3650 * @v_opcode: operation code
3651 * @v_retval: unused return value code
5c3c48ac
JB		 3652 * @msg: pointer to the msg buffer
3653 * @msglen: msg length
5c3c48ac
JB		 3654 *
3655 * called from the common aeq/arq handler to
b40c82e6 3656 * process request from VF
5c3c48ac 3657 **/
a1b5a24f 3658int i40e_vc_process_vf_msg(struct i40e_pf *pf, s16 vf_id, u32 v_opcode,
f5254429 3659 u32 __always_unused v_retval, u8 *msg, u16 msglen)
5c3c48ac 3660{
5c3c48ac 3661 struct i40e_hw *hw = &pf->hw;
a1b5a24f 3662 int local_vf_id = vf_id - (s16)hw->func_caps.vf_base_id;
6c1b5bff 3663 struct i40e_vf *vf;
5c3c48ac
JB		 3664 int ret;
3665
3666 pf->vf_aq_requests++;
3f8af412 3667 if (local_vf_id < 0 || local_vf_id >= pf->num_alloc_vfs)
6c1b5bff 3668 return -EINVAL;
7efa84b7 3669 vf = &(pf->vf[local_vf_id]);
260e9382
JB		 3670
3671 /* Check if VF is disabled. */
3672 if (test_bit(I40E_VF_STATE_DISABLED, &vf->vf_states))
3673 return I40E_ERR_PARAM;
3674
5c3c48ac 3675 /* perform basic checks on the msg */
735e35c5 3676 ret = virtchnl_vc_validate_vf_msg(&vf->vf_ver, v_opcode, msg, msglen);
5c3c48ac 3677
260e9382
JB		 3678 /* perform additional checks specific to this driver */
3679 if (v_opcode == VIRTCHNL_OP_CONFIG_RSS_KEY) {
3680 struct virtchnl_rss_key *vrk = (struct virtchnl_rss_key *)msg;
3681
3682 if (vrk->key_len != I40E_HKEY_ARRAY_SIZE)
3683 ret = -EINVAL;
3684 } else if (v_opcode == VIRTCHNL_OP_CONFIG_RSS_LUT) {
3685 struct virtchnl_rss_lut *vrl = (struct virtchnl_rss_lut *)msg;
3686
3687 if (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)
3688 ret = -EINVAL;
3689 }
3690
5c3c48ac 3691 if (ret) {
764430ce 3692 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
b40c82e6 3693 dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n",
7efa84b7 3694 local_vf_id, v_opcode, msglen);
764430ce 3695 switch (ret) {
bb58fd7e 3696 case VIRTCHNL_STATUS_ERR_PARAM:
764430ce
JB		 3697 return -EPERM;
3698 default:
3699 return -EINVAL;
3700 }
5c3c48ac 3701 }
bae3cae4 3702
5c3c48ac 3703 switch (v_opcode) {
310a2ad9 3704 case VIRTCHNL_OP_VERSION:
f4ca1a22 3705 ret = i40e_vc_get_version_msg(vf, msg);
5c3c48ac 3706 break;
310a2ad9 3707 case VIRTCHNL_OP_GET_VF_RESOURCES:
f4ca1a22 3708 ret = i40e_vc_get_vf_resources_msg(vf, msg);
d3d657a9 3709 i40e_vc_notify_vf_link_state(vf);
5c3c48ac 3710 break;
310a2ad9 3711 case VIRTCHNL_OP_RESET_VF:
fc18eaa0
MW		 3712 i40e_vc_reset_vf_msg(vf);
3713 ret = 0;
5c3c48ac 3714 break;
310a2ad9 3715 case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
679b05c0 3716 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg);
5c3c48ac 3717 break;
310a2ad9 3718 case VIRTCHNL_OP_CONFIG_VSI_QUEUES:
679b05c0 3719 ret = i40e_vc_config_queues_msg(vf, msg);
5c3c48ac 3720 break;
310a2ad9 3721 case VIRTCHNL_OP_CONFIG_IRQ_MAP:
679b05c0 3722 ret = i40e_vc_config_irq_map_msg(vf, msg);
5c3c48ac 3723 break;
310a2ad9 3724 case VIRTCHNL_OP_ENABLE_QUEUES:
679b05c0 3725 ret = i40e_vc_enable_queues_msg(vf, msg);
055b295d 3726 i40e_vc_notify_vf_link_state(vf);
5c3c48ac 3727 break;
310a2ad9 3728 case VIRTCHNL_OP_DISABLE_QUEUES:
679b05c0 3729 ret = i40e_vc_disable_queues_msg(vf, msg);
5c3c48ac 3730 break;
310a2ad9 3731 case VIRTCHNL_OP_ADD_ETH_ADDR:
679b05c0 3732 ret = i40e_vc_add_mac_addr_msg(vf, msg);
5c3c48ac 3733 break;
310a2ad9 3734 case VIRTCHNL_OP_DEL_ETH_ADDR:
679b05c0 3735 ret = i40e_vc_del_mac_addr_msg(vf, msg);
5c3c48ac 3736 break;
310a2ad9 3737 case VIRTCHNL_OP_ADD_VLAN:
679b05c0 3738 ret = i40e_vc_add_vlan_msg(vf, msg);
5c3c48ac 3739 break;
310a2ad9 3740 case VIRTCHNL_OP_DEL_VLAN:
679b05c0 3741 ret = i40e_vc_remove_vlan_msg(vf, msg);
5c3c48ac 3742 break;
310a2ad9 3743 case VIRTCHNL_OP_GET_STATS:
679b05c0 3744 ret = i40e_vc_get_stats_msg(vf, msg);
5c3c48ac 3745 break;
310a2ad9 3746 case VIRTCHNL_OP_IWARP:
e3219ce6
ASJ		 3747 ret = i40e_vc_iwarp_msg(vf, msg, msglen);
3748 break;
310a2ad9 3749 case VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
679b05c0 3750 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, true);
e3219ce6 3751 break;
310a2ad9 3752 case VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
679b05c0 3753 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, false);
e3219ce6 3754 break;
310a2ad9 3755 case VIRTCHNL_OP_CONFIG_RSS_KEY:
679b05c0 3756 ret = i40e_vc_config_rss_key(vf, msg);
c4e1868c 3757 break;
310a2ad9 3758 case VIRTCHNL_OP_CONFIG_RSS_LUT:
679b05c0 3759 ret = i40e_vc_config_rss_lut(vf, msg);
c4e1868c 3760 break;
310a2ad9 3761 case VIRTCHNL_OP_GET_RSS_HENA_CAPS:
679b05c0 3762 ret = i40e_vc_get_rss_hena(vf, msg);
c4e1868c 3763 break;
310a2ad9 3764 case VIRTCHNL_OP_SET_RSS_HENA:
679b05c0 3765 ret = i40e_vc_set_rss_hena(vf, msg);
c4e1868c 3766 break;
8774370d 3767 case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING:
679b05c0 3768 ret = i40e_vc_enable_vlan_stripping(vf, msg);
8774370d
MS		 3769 break;
3770 case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING:
679b05c0 3771 ret = i40e_vc_disable_vlan_stripping(vf, msg);
8774370d 3772 break;
a3f5aa90 3773 case VIRTCHNL_OP_REQUEST_QUEUES:
679b05c0 3774 ret = i40e_vc_request_queues_msg(vf, msg);
a3f5aa90 3775 break;
c27eac48
AD		 3776 case VIRTCHNL_OP_ENABLE_CHANNELS:
3777 ret = i40e_vc_add_qch_msg(vf, msg);
3778 break;
c4998aa3
AD		 3779 case VIRTCHNL_OP_DISABLE_CHANNELS:
3780 ret = i40e_vc_del_qch_msg(vf, msg);
3781 break;
e284fc28
AD		 3782 case VIRTCHNL_OP_ADD_CLOUD_FILTER:
3783 ret = i40e_vc_add_cloud_filter(vf, msg);
3784 break;
3785 case VIRTCHNL_OP_DEL_CLOUD_FILTER:
3786 ret = i40e_vc_del_cloud_filter(vf, msg);
3787 break;
310a2ad9 3788 case VIRTCHNL_OP_UNKNOWN:
5c3c48ac 3789 default:
b40c82e6 3790 dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n",
7efa84b7 3791 v_opcode, local_vf_id);
5c3c48ac
JB		 3792 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
3793 I40E_ERR_NOT_IMPLEMENTED);
3794 break;
3795 }
3796
3797 return ret;
3798}
3799
3800/**
3801 * i40e_vc_process_vflr_event
b40c82e6 3802 * @pf: pointer to the PF structure
5c3c48ac
JB		 3803 *
3804 * called from the vlfr irq handler to
b40c82e6 3805 * free up VF resources and state variables
5c3c48ac
JB		 3806 **/
3807int i40e_vc_process_vflr_event(struct i40e_pf *pf)
3808{
5c3c48ac 3809 struct i40e_hw *hw = &pf->hw;
a1b5a24f 3810 u32 reg, reg_idx, bit_idx;
5c3c48ac 3811 struct i40e_vf *vf;
a1b5a24f 3812 int vf_id;
5c3c48ac 3813
0da36b97 3814 if (!test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
5c3c48ac
JB		 3815 return 0;
3816
0d790327
MW		 3817 /* Re-enable the VFLR interrupt cause here, before looking for which
3818 * VF got reset. Otherwise, if another VF gets a reset while the
3819 * first one is being processed, that interrupt will be lost, and
3820 * that VF will be stuck in reset forever.
3821 */
c5c2f7c3
MW		 3822 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
3823 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
3824 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
3825 i40e_flush(hw);
3826
0da36b97 3827 clear_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
5c3c48ac
JB		 3828 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
3829 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
3830 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
b40c82e6 3831 /* read GLGEN_VFLRSTAT register to find out the flr VFs */
5c3c48ac
JB		 3832 vf = &pf->vf[vf_id];
3833 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
7369ca87 3834 if (reg & BIT(bit_idx))
7e5a313e 3835 /* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */
7369ca87 3836 i40e_reset_vf(vf, true);
5c3c48ac
JB		 3837 }
3838
5c3c48ac
JB		 3839 return 0;
3840}
3841
ed277c50
HR		 3842/**
3843 * i40e_validate_vf
3844 * @pf: the physical function
3845 * @vf_id: VF identifier
3846 *
3847 * Check that the VF is enabled and the VSI exists.
3848 *
3849 * Returns 0 on success, negative on failure
3850 **/
3851static int i40e_validate_vf(struct i40e_pf *pf, int vf_id)
3852{
3853 struct i40e_vsi *vsi;
3854 struct i40e_vf *vf;
3855 int ret = 0;
3856
3857 if (vf_id >= pf->num_alloc_vfs) {
3858 dev_err(&pf->pdev->dev,
3859 "Invalid VF Identifier %d\n", vf_id);
3860 ret = -EINVAL;
3861 goto err_out;
3862 }
3863 vf = &pf->vf[vf_id];
3864 vsi = i40e_find_vsi_from_id(pf, vf->lan_vsi_id);
3865 if (!vsi)
3866 ret = -EINVAL;
3867err_out:
3868 return ret;
3869}
3870
5c3c48ac
JB		 3871/**
3872 * i40e_ndo_set_vf_mac
3873 * @netdev: network interface device structure
b40c82e6 3874 * @vf_id: VF identifier
5c3c48ac
JB		 3875 * @mac: mac address
3876 *
b40c82e6 3877 * program VF mac address
5c3c48ac
JB		 3878 **/
3879int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
3880{
3881 struct i40e_netdev_priv *np = netdev_priv(netdev);
3882 struct i40e_vsi *vsi = np->vsi;
3883 struct i40e_pf *pf = vsi->back;
3884 struct i40e_mac_filter *f;
3885 struct i40e_vf *vf;
3886 int ret = 0;
784548c4 3887 struct hlist_node *h;
278e7d0b 3888 int bkt;
028daf80 3889 u8 i;
5c3c48ac
JB		 3890
3891 /* validate the request */
ed277c50
HR		 3892 ret = i40e_validate_vf(pf, vf_id);
3893 if (ret)
5c3c48ac 3894 goto error_param;
5c3c48ac 3895
ed277c50 3896 vf = &pf->vf[vf_id];
fdf0e0bf 3897 vsi = pf->vsi[vf->lan_vsi_idx];
028daf80
PJ		 3898
3899 /* When the VF is resetting wait until it is done.
3900 * It can take up to 200 milliseconds,
3901 * but wait for up to 300 milliseconds to be safe.
3902 */
3903 for (i = 0; i < 15; i++) {
3904 if (test_bit(I40E_VF_STATE_INIT, &vf->vf_states))
3905 break;
3906 msleep(20);
3907 }
6322e63c 3908 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3909 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3910 vf_id);
3911 ret = -EAGAIN;
5c3c48ac
JB		 3912 goto error_param;
3913 }
3914
f5a7b21b
JS		 3915 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
3916 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
3917 return -EAGAIN;
3918 }
3919
efd8e39a 3920 if (is_multicast_ether_addr(mac)) {
5c3c48ac 3921 dev_err(&pf->pdev->dev,
efd8e39a 3922 "Invalid Ethernet address %pM for VF %d\n", mac, vf_id);
5c3c48ac
JB		 3923 ret = -EINVAL;
3924 goto error_param;
3925 }
3926
21659035 3927 /* Lock once because below invoked function add/del_filter requires
278e7d0b 3928 * mac_filter_hash_lock to be held
21659035 3929 */
278e7d0b 3930 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 3931
5c3c48ac 3932 /* delete the temporary mac address */
efd8e39a 3933 if (!is_zero_ether_addr(vf->default_lan_addr.addr))
9569a9a4 3934 i40e_del_mac_filter(vsi, vf->default_lan_addr.addr);
5c3c48ac 3935
29f71bb0
GR		 3936 /* Delete all the filters for this VSI - we're going to kill it
3937 * anyway.
3938 */
784548c4 3939 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
148141bb 3940 __i40e_del_filter(vsi, f);
5c3c48ac 3941
278e7d0b 3942 spin_unlock_bh(&vsi->mac_filter_hash_lock);
21659035 3943
5c3c48ac 3944 /* program mac filter */
17652c63 3945 if (i40e_sync_vsi_filters(vsi)) {
5c3c48ac
JB		 3946 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
3947 ret = -EIO;
3948 goto error_param;
3949 }
9a173901 3950 ether_addr_copy(vf->default_lan_addr.addr, mac);
2f1d86e4
SA		 3951
3952 if (is_zero_ether_addr(mac)) {
3953 vf->pf_set_mac = false;
3954 dev_info(&pf->pdev->dev, "Removing MAC on VF %d\n", vf_id);
3955 } else {
3956 vf->pf_set_mac = true;
3957 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n",
3958 mac, vf_id);
3959 }
3960
ae1e29f6
PJ		 3961 /* Force the VF interface down so it has to bring up with new MAC
3962 * address
3963 */
eeeddbb8 3964 i40e_vc_disable_vf(vf);
ae1e29f6 3965 dev_info(&pf->pdev->dev, "Bring down and up the VF interface to make this change effective.\n");
5c3c48ac
JB		 3966
3967error_param:
f5a7b21b 3968 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
5c3c48ac
JB		 3969 return ret;
3970}
3971
ba4e003d
JK		 3972/**
3973 * i40e_vsi_has_vlans - True if VSI has configured VLANs
3974 * @vsi: pointer to the vsi
3975 *
3976 * Check if a VSI has configured any VLANs. False if we have a port VLAN or if
3977 * we have no configured VLANs. Do not call while holding the
3978 * mac_filter_hash_lock.
3979 */
3980static bool i40e_vsi_has_vlans(struct i40e_vsi *vsi)
3981{
3982 bool have_vlans;
3983
3984 /* If we have a port VLAN, then the VSI cannot have any VLANs
3985 * configured, as all MAC/VLAN filters will be assigned to the PVID.
3986 */
3987 if (vsi->info.pvid)
3988 return false;
3989
3990 /* Since we don't have a PVID, we know that if the device is in VLAN
3991 * mode it must be because of a VLAN filter configured on this VSI.
3992 */
3993 spin_lock_bh(&vsi->mac_filter_hash_lock);
3994 have_vlans = i40e_is_vsi_in_vlan(vsi);
3995 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3996
3997 return have_vlans;
3998}
3999
5c3c48ac
JB		 4000/**
4001 * i40e_ndo_set_vf_port_vlan
4002 * @netdev: network interface device structure
b40c82e6 4003 * @vf_id: VF identifier
5c3c48ac
JB		 4004 * @vlan_id: mac address
4005 * @qos: priority setting
79aab093 4006 * @vlan_proto: vlan protocol
5c3c48ac 4007 *
b40c82e6 4008 * program VF vlan id and/or qos
5c3c48ac 4009 **/
79aab093
MS		 4010int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, int vf_id,
4011 u16 vlan_id, u8 qos, __be16 vlan_proto)
5c3c48ac 4012{
f7fc2f2e 4013 u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT);
5c3c48ac
JB		 4014 struct i40e_netdev_priv *np = netdev_priv(netdev);
4015 struct i40e_pf *pf = np->vsi->back;
4016 struct i40e_vsi *vsi;
4017 struct i40e_vf *vf;
4018 int ret = 0;
4019
f5a7b21b
JS		 4020 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4021 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4022 return -EAGAIN;
4023 }
4024
5c3c48ac 4025 /* validate the request */
ed277c50
HR		 4026 ret = i40e_validate_vf(pf, vf_id);
4027 if (ret)
5c3c48ac 4028 goto error_pvid;
5c3c48ac
JB		 4029
4030 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
4031 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
4032 ret = -EINVAL;
4033 goto error_pvid;
4034 }
4035
79aab093
MS		 4036 if (vlan_proto != htons(ETH_P_8021Q)) {
4037 dev_err(&pf->pdev->dev, "VF VLAN protocol is not supported\n");
4038 ret = -EPROTONOSUPPORT;
4039 goto error_pvid;
4040 }
4041
ed277c50 4042 vf = &pf->vf[vf_id];
fdf0e0bf 4043 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 4044 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4045 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4046 vf_id);
4047 ret = -EAGAIN;
5c3c48ac
JB		 4048 goto error_pvid;
4049 }
4050
f7fc2f2e 4051 if (le16_to_cpu(vsi->info.pvid) == vlanprio)
85927ec1
MW		 4052 /* duplicate request, so just return success */
4053 goto error_pvid;
4054
ba4e003d 4055 if (i40e_vsi_has_vlans(vsi)) {
99a4973c
GR		 4056 dev_err(&pf->pdev->dev,
4057 "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
4058 vf_id);
f9b4b627
GR		 4059 /* Administrator Error - knock the VF offline until he does
4060 * the right thing by reconfiguring his network correctly
4061 * and then reloading the VF driver.
4062 */
eeeddbb8 4063 i40e_vc_disable_vf(vf);
35f3472a
MW		 4064 /* During reset the VF got a new VSI, so refresh the pointer. */
4065 vsi = pf->vsi[vf->lan_vsi_idx];
f9b4b627 4066 }
99a4973c 4067
ba4e003d
JK		 4068 /* Locked once because multiple functions below iterate list */
4069 spin_lock_bh(&vsi->mac_filter_hash_lock);
4070
8d82a7c5
GR		 4071 /* Check for condition where there was already a port VLAN ID
4072 * filter set and now it is being deleted by setting it to zero.
1315f7c3
GR		 4073 * Additionally check for the condition where there was a port
4074 * VLAN but now there is a new and different port VLAN being set.
8d82a7c5
GR		 4075 * Before deleting all the old VLAN filters we must add new ones
4076 * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our
4077 * MAC addresses deleted.
4078 */
1315f7c3 4079 if ((!(vlan_id || qos) ||
f7fc2f2e 4080 vlanprio != le16_to_cpu(vsi->info.pvid)) &&
9af52f60
JK		 4081 vsi->info.pvid) {
4082 ret = i40e_add_vlan_all_mac(vsi, I40E_VLAN_ANY);
4083 if (ret) {
4084 dev_info(&vsi->back->pdev->dev,
4085 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
4086 vsi->back->hw.aq.asq_last_status);
4087 spin_unlock_bh(&vsi->mac_filter_hash_lock);
4088 goto error_pvid;
4089 }
4090 }
8d82a7c5 4091
5c3c48ac 4092 if (vsi->info.pvid) {
9af52f60
JK		 4093 /* remove all filters on the old VLAN */
4094 i40e_rm_vlan_all_mac(vsi, (le16_to_cpu(vsi->info.pvid) &
4095 VLAN_VID_MASK));
5c3c48ac 4096 }
9af52f60 4097
640f93cc 4098 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac 4099 if (vlan_id || qos)
f7fc2f2e 4100 ret = i40e_vsi_add_pvid(vsi, vlanprio);
5c3c48ac 4101 else
6c12fcbf 4102 i40e_vsi_remove_pvid(vsi);
640f93cc 4103 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 4104
4105 if (vlan_id) {
4106 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
4107 vlan_id, qos, vf_id);
4108
9af52f60
JK		 4109 /* add new VLAN filter for each MAC */
4110 ret = i40e_add_vlan_all_mac(vsi, vlan_id);
5c3c48ac
JB		 4111 if (ret) {
4112 dev_info(&vsi->back->pdev->dev,
4113 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
4114 vsi->back->hw.aq.asq_last_status);
9af52f60 4115 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 4116 goto error_pvid;
4117 }
9af52f60
JK		 4118
4119 /* remove the previously added non-VLAN MAC filters */
4120 i40e_rm_vlan_all_mac(vsi, I40E_VLAN_ANY);
5c3c48ac
JB		 4121 }
4122
9af52f60
JK		 4123 spin_unlock_bh(&vsi->mac_filter_hash_lock);
4124
4125 /* Schedule the worker thread to take care of applying changes */
4126 i40e_service_event_schedule(vsi->back);
4127
5c3c48ac
JB		 4128 if (ret) {
4129 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
4130 goto error_pvid;
4131 }
9af52f60 4132
6c12fcbf
GR		 4133 /* The Port VLAN needs to be saved across resets the same as the
4134 * default LAN MAC address.
4135 */
4136 vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
5c3c48ac
JB		 4137 ret = 0;
4138
4139error_pvid:
f5a7b21b 4140 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
5c3c48ac
JB		 4141 return ret;
4142}
4143
4144/**
4145 * i40e_ndo_set_vf_bw
4146 * @netdev: network interface device structure
b40c82e6 4147 * @vf_id: VF identifier
f5254429
JK		 4148 * @min_tx_rate: Minimum Tx rate
4149 * @max_tx_rate: Maximum Tx rate
5c3c48ac 4150 *
b40c82e6 4151 * configure VF Tx rate
5c3c48ac 4152 **/
ed616689
SC		 4153int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
4154 int max_tx_rate)
5c3c48ac 4155{
6b192891
MW		 4156 struct i40e_netdev_priv *np = netdev_priv(netdev);
4157 struct i40e_pf *pf = np->vsi->back;
4158 struct i40e_vsi *vsi;
4159 struct i40e_vf *vf;
6b192891
MW		 4160 int ret = 0;
4161
f5a7b21b
JS		 4162 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4163 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4164 return -EAGAIN;
4165 }
4166
6b192891 4167 /* validate the request */
ed277c50
HR		 4168 ret = i40e_validate_vf(pf, vf_id);
4169 if (ret)
6b192891 4170 goto error;
6b192891 4171
ed616689 4172 if (min_tx_rate) {
b40c82e6 4173 dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n",
ed616689
SC		 4174 min_tx_rate, vf_id);
4175 return -EINVAL;
4176 }
4177
ed277c50 4178 vf = &pf->vf[vf_id];
fdf0e0bf 4179 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 4180 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4181 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4182 vf_id);
4183 ret = -EAGAIN;
6b192891
MW		 4184 goto error;
4185 }
4186
5ecae412
AN		 4187 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
4188 if (ret)
6b192891 4189 goto error;
dac9b31a 4190
ed616689 4191 vf->tx_rate = max_tx_rate;
6b192891 4192error:
f5a7b21b 4193 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
6b192891 4194 return ret;
5c3c48ac
JB		 4195}
4196
4197/**
4198 * i40e_ndo_get_vf_config
4199 * @netdev: network interface device structure
b40c82e6
JK		 4200 * @vf_id: VF identifier
4201 * @ivi: VF configuration structure
5c3c48ac 4202 *
b40c82e6 4203 * return VF configuration
5c3c48ac
JB		 4204 **/
4205int i40e_ndo_get_vf_config(struct net_device *netdev,
4206 int vf_id, struct ifla_vf_info *ivi)
4207{
4208 struct i40e_netdev_priv *np = netdev_priv(netdev);
5c3c48ac
JB		 4209 struct i40e_vsi *vsi = np->vsi;
4210 struct i40e_pf *pf = vsi->back;
4211 struct i40e_vf *vf;
4212 int ret = 0;
4213
f5a7b21b
JS		 4214 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4215 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4216 return -EAGAIN;
4217 }
4218
5c3c48ac 4219 /* validate the request */
ed277c50
HR		 4220 ret = i40e_validate_vf(pf, vf_id);
4221 if (ret)
5c3c48ac 4222 goto error_param;
5c3c48ac 4223
ed277c50 4224 vf = &pf->vf[vf_id];
5c3c48ac 4225 /* first vsi is always the LAN vsi */
fdf0e0bf 4226 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 4227 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4228 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4229 vf_id);
4230 ret = -EAGAIN;
5c3c48ac
JB		 4231 goto error_param;
4232 }
4233
4234 ivi->vf = vf_id;
4235
6995b36c 4236 ether_addr_copy(ivi->mac, vf->default_lan_addr.addr);
5c3c48ac 4237
ed616689
SC		 4238 ivi->max_tx_rate = vf->tx_rate;
4239 ivi->min_tx_rate = 0;
5c3c48ac
JB		 4240 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
4241 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
4242 I40E_VLAN_PRIORITY_SHIFT;
84ca55a0
MW		 4243 if (vf->link_forced == false)
4244 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
4245 else if (vf->link_up == true)
4246 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
4247 else
4248 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
c674d125 4249 ivi->spoofchk = vf->spoofchk;
d40062f3 4250 ivi->trusted = vf->trusted;
5c3c48ac
JB		 4251 ret = 0;
4252
4253error_param:
f5a7b21b 4254 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
5c3c48ac
JB		 4255 return ret;
4256}
588aefa0
MW		 4257
4258/**
4259 * i40e_ndo_set_vf_link_state
4260 * @netdev: network interface device structure
b40c82e6 4261 * @vf_id: VF identifier
588aefa0
MW		 4262 * @link: required link state
4263 *
4264 * Set the link state of a specified VF, regardless of physical link state
4265 **/
4266int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
4267{
4268 struct i40e_netdev_priv *np = netdev_priv(netdev);
4269 struct i40e_pf *pf = np->vsi->back;
310a2ad9 4270 struct virtchnl_pf_event pfe;
588aefa0
MW		 4271 struct i40e_hw *hw = &pf->hw;
4272 struct i40e_vf *vf;
f19efbb5 4273 int abs_vf_id;
588aefa0
MW		 4274 int ret = 0;
4275
f5a7b21b
JS		 4276 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4277 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4278 return -EAGAIN;
4279 }
4280
588aefa0
MW		 4281 /* validate the request */
4282 if (vf_id >= pf->num_alloc_vfs) {
4283 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
4284 ret = -EINVAL;
4285 goto error_out;
4286 }
4287
4288 vf = &pf->vf[vf_id];
f19efbb5 4289 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
588aefa0 4290
310a2ad9 4291 pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
ff3f4cc2 4292 pfe.severity = PF_EVENT_SEVERITY_INFO;
588aefa0
MW		 4293
4294 switch (link) {
4295 case IFLA_VF_LINK_STATE_AUTO:
4296 vf->link_forced = false;
4297 pfe.event_data.link_event.link_status =
4298 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
4299 pfe.event_data.link_event.link_speed =
ff3f4cc2 4300 (enum virtchnl_link_speed)
588aefa0
MW		 4301 pf->hw.phy.link_info.link_speed;
4302 break;
4303 case IFLA_VF_LINK_STATE_ENABLE:
4304 vf->link_forced = true;
4305 vf->link_up = true;
4306 pfe.event_data.link_event.link_status = true;
43ade6ad 4307 pfe.event_data.link_event.link_speed = VIRTCHNL_LINK_SPEED_40GB;
588aefa0
MW		 4308 break;
4309 case IFLA_VF_LINK_STATE_DISABLE:
4310 vf->link_forced = true;
4311 vf->link_up = false;
4312 pfe.event_data.link_event.link_status = false;
4313 pfe.event_data.link_event.link_speed = 0;
4314 break;
4315 default:
4316 ret = -EINVAL;
4317 goto error_out;
4318 }
4319 /* Notify the VF of its new link state */
310a2ad9 4320 i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
588aefa0
MW		 4321 0, (u8 *)&pfe, sizeof(pfe), NULL);
4322
4323error_out:
f5a7b21b 4324 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
588aefa0
MW		 4325 return ret;
4326}
c674d125
MW		 4327
4328/**
4329 * i40e_ndo_set_vf_spoofchk
4330 * @netdev: network interface device structure
b40c82e6 4331 * @vf_id: VF identifier
c674d125
MW		 4332 * @enable: flag to enable or disable feature
4333 *
4334 * Enable or disable VF spoof checking
4335 **/
e6d9004d 4336int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable)
c674d125
MW		 4337{
4338 struct i40e_netdev_priv *np = netdev_priv(netdev);
4339 struct i40e_vsi *vsi = np->vsi;
4340 struct i40e_pf *pf = vsi->back;
4341 struct i40e_vsi_context ctxt;
4342 struct i40e_hw *hw = &pf->hw;
4343 struct i40e_vf *vf;
4344 int ret = 0;
4345
f5a7b21b
JS		 4346 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4347 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4348 return -EAGAIN;
4349 }
4350
c674d125
MW		 4351 /* validate the request */
4352 if (vf_id >= pf->num_alloc_vfs) {
4353 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
4354 ret = -EINVAL;
4355 goto out;
4356 }
4357
4358 vf = &(pf->vf[vf_id]);
6322e63c 4359 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4360 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4361 vf_id);
4362 ret = -EAGAIN;
4363 goto out;
4364 }
c674d125
MW		 4365
4366 if (enable == vf->spoofchk)
4367 goto out;
4368
4369 vf->spoofchk = enable;
4370 memset(&ctxt, 0, sizeof(ctxt));
fdf0e0bf 4371 ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid;
c674d125
MW		 4372 ctxt.pf_num = pf->hw.pf_id;
4373 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
4374 if (enable)
30d71af5
GR		 4375 ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
4376 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
c674d125
MW		 4377 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
4378 if (ret) {
4379 dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
4380 ret);
4381 ret = -EIO;
4382 }
4383out:
f5a7b21b 4384 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
c674d125
MW		 4385 return ret;
4386}
c3bbbd20
ASJ		 4387
4388/**
4389 * i40e_ndo_set_vf_trust
4390 * @netdev: network interface device structure of the pf
4391 * @vf_id: VF identifier
4392 * @setting: trust setting
4393 *
4394 * Enable or disable VF trust setting
4395 **/
4396int i40e_ndo_set_vf_trust(struct net_device *netdev, int vf_id, bool setting)
4397{
4398 struct i40e_netdev_priv *np = netdev_priv(netdev);
4399 struct i40e_pf *pf = np->vsi->back;
4400 struct i40e_vf *vf;
4401 int ret = 0;
4402
f5a7b21b
JS		 4403 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4404 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4405 return -EAGAIN;
4406 }
4407
c3bbbd20
ASJ		 4408 /* validate the request */
4409 if (vf_id >= pf->num_alloc_vfs) {
4410 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
f5a7b21b
JS		 4411 ret = -EINVAL;
4412 goto out;
c3bbbd20
ASJ		 4413 }
4414
4415 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4416 dev_err(&pf->pdev->dev, "Trusted VF not supported in MFP mode.\n");
f5a7b21b
JS		 4417 ret = -EINVAL;
4418 goto out;
c3bbbd20
ASJ		 4419 }
4420
4421 vf = &pf->vf[vf_id];
4422
c3bbbd20
ASJ		 4423 if (setting == vf->trusted)
4424 goto out;
4425
4426 vf->trusted = setting;
f18d2021 4427 i40e_vc_disable_vf(vf);
c3bbbd20
ASJ		 4428 dev_info(&pf->pdev->dev, "VF %u is now %strusted\n",
4429 vf_id, setting ? "" : "un");
e284fc28
AD		 4430
4431 if (vf->adq_enabled) {
4432 if (!vf->trusted) {
4433 dev_info(&pf->pdev->dev,
4434 "VF %u no longer Trusted, deleting all cloud filters\n",
4435 vf_id);
4436 i40e_del_all_cloud_filters(vf);
4437 }
4438 }
4439
c3bbbd20 4440out:
f5a7b21b 4441 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
c3bbbd20
ASJ		 4442 return ret;
4443}
Linux 6.x block layer and io_uring tree(s)