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i40e: PTP - avoid aggregate return warnings
[linux-2.6-block.git] / drivers / net / ethernet / intel / i40e / i40e_virtchnl_pf.c
CommitLineData
5c3c48ac
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
40d72a50 4 * Copyright(c) 2013 - 2016 Intel Corporation.
5c3c48ac
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
5c3c48ac
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#include "i40e.h"
28
532b0455
MW		 29/*********************notification routines***********************/
30
31/**
32 * i40e_vc_vf_broadcast
33 * @pf: pointer to the PF structure
34 * @opcode: operation code
35 * @retval: return value
36 * @msg: pointer to the msg buffer
37 * @msglen: msg length
38 *
39 * send a message to all VFs on a given PF
40 **/
41static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
42 enum i40e_virtchnl_ops v_opcode,
43 i40e_status v_retval, u8 *msg,
44 u16 msglen)
45{
46 struct i40e_hw *hw = &pf->hw;
47 struct i40e_vf *vf = pf->vf;
48 int i;
49
50 for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
51 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
52 /* Not all vfs are enabled so skip the ones that are not */
53 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) &&
54 !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
55 continue;
56
57 /* Ignore return value on purpose - a given VF may fail, but
58 * we need to keep going and send to all of them
59 */
60 i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
61 msg, msglen, NULL);
62 }
63}
64
65/**
55f7d723 66 * i40e_vc_notify_vf_link_state
532b0455
MW		 67 * @vf: pointer to the VF structure
68 *
69 * send a link status message to a single VF
70 **/
71static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf)
72{
73 struct i40e_virtchnl_pf_event pfe;
74 struct i40e_pf *pf = vf->pf;
75 struct i40e_hw *hw = &pf->hw;
76 struct i40e_link_status *ls = &pf->hw.phy.link_info;
77 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
78
79 pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
80 pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
81 if (vf->link_forced) {
82 pfe.event_data.link_event.link_status = vf->link_up;
83 pfe.event_data.link_event.link_speed =
84 (vf->link_up ? I40E_LINK_SPEED_40GB : 0);
85 } else {
86 pfe.event_data.link_event.link_status =
87 ls->link_info & I40E_AQ_LINK_UP;
88 pfe.event_data.link_event.link_speed = ls->link_speed;
89 }
90 i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
91 0, (u8 *)&pfe, sizeof(pfe), NULL);
92}
93
94/**
95 * i40e_vc_notify_link_state
96 * @pf: pointer to the PF structure
97 *
98 * send a link status message to all VFs on a given PF
99 **/
100void i40e_vc_notify_link_state(struct i40e_pf *pf)
101{
102 int i;
103
104 for (i = 0; i < pf->num_alloc_vfs; i++)
105 i40e_vc_notify_vf_link_state(&pf->vf[i]);
106}
107
108/**
109 * i40e_vc_notify_reset
110 * @pf: pointer to the PF structure
111 *
112 * indicate a pending reset to all VFs on a given PF
113 **/
114void i40e_vc_notify_reset(struct i40e_pf *pf)
115{
116 struct i40e_virtchnl_pf_event pfe;
117
118 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
119 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
120 i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, 0,
121 (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event));
122}
123
124/**
125 * i40e_vc_notify_vf_reset
126 * @vf: pointer to the VF structure
127 *
128 * indicate a pending reset to the given VF
129 **/
130void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
131{
132 struct i40e_virtchnl_pf_event pfe;
133 int abs_vf_id;
134
135 /* validate the request */
136 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
137 return;
138
139 /* verify if the VF is in either init or active before proceeding */
140 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) &&
141 !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
142 return;
143
144 abs_vf_id = vf->vf_id + vf->pf->hw.func_caps.vf_base_id;
145
146 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
147 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
148 i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
149 0, (u8 *)&pfe,
150 sizeof(struct i40e_virtchnl_pf_event), NULL);
151}
5c3c48ac
JB		 152/***********************misc routines*****************************/
153
f9b4b627
GR		 154/**
155 * i40e_vc_disable_vf
b40c82e6
JK		 156 * @pf: pointer to the PF info
157 * @vf: pointer to the VF info
f9b4b627
GR		 158 *
159 * Disable the VF through a SW reset
160 **/
161static inline void i40e_vc_disable_vf(struct i40e_pf *pf, struct i40e_vf *vf)
162{
54f455ee
MW		 163 i40e_vc_notify_vf_reset(vf);
164 i40e_reset_vf(vf, false);
f9b4b627
GR		 165}
166
5c3c48ac
JB		 167/**
168 * i40e_vc_isvalid_vsi_id
b40c82e6
JK		 169 * @vf: pointer to the VF info
170 * @vsi_id: VF relative VSI id
5c3c48ac 171 *
b40c82e6 172 * check for the valid VSI id
5c3c48ac 173 **/
fdf0e0bf 174static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id)
5c3c48ac
JB		 175{
176 struct i40e_pf *pf = vf->pf;
fdf0e0bf 177 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 178
fdf0e0bf 179 return (vsi && (vsi->vf_id == vf->vf_id));
5c3c48ac
JB		 180}
181
182/**
183 * i40e_vc_isvalid_queue_id
b40c82e6 184 * @vf: pointer to the VF info
5c3c48ac
JB		 185 * @vsi_id: vsi id
186 * @qid: vsi relative queue id
187 *
188 * check for the valid queue id
189 **/
fdf0e0bf 190static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 191 u8 qid)
192{
193 struct i40e_pf *pf = vf->pf;
fdf0e0bf 194 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 195
fdf0e0bf 196 return (vsi && (qid < vsi->alloc_queue_pairs));
5c3c48ac
JB		 197}
198
199/**
200 * i40e_vc_isvalid_vector_id
b40c82e6
JK		 201 * @vf: pointer to the VF info
202 * @vector_id: VF relative vector id
5c3c48ac
JB		 203 *
204 * check for the valid vector id
205 **/
206static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
207{
208 struct i40e_pf *pf = vf->pf;
209
9347eb77 210 return vector_id < pf->hw.func_caps.num_msix_vectors_vf;
5c3c48ac
JB		 211}
212
213/***********************vf resource mgmt routines*****************/
214
215/**
216 * i40e_vc_get_pf_queue_id
b40c82e6 217 * @vf: pointer to the VF info
fdf0e0bf 218 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 219 * @vsi_queue_id: vsi relative queue id
220 *
b40c82e6 221 * return PF relative queue id
5c3c48ac 222 **/
fdf0e0bf 223static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 224 u8 vsi_queue_id)
225{
226 struct i40e_pf *pf = vf->pf;
fdf0e0bf 227 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac
JB		 228 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
229
fdf0e0bf
ASJ		 230 if (!vsi)
231 return pf_queue_id;
232
5c3c48ac
JB		 233 if (le16_to_cpu(vsi->info.mapping_flags) &
234 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
235 pf_queue_id =
236 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
237 else
238 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
239 vsi_queue_id;
240
241 return pf_queue_id;
242}
243
5c3c48ac
JB		 244/**
245 * i40e_config_irq_link_list
b40c82e6 246 * @vf: pointer to the VF info
fdf0e0bf 247 * @vsi_id: id of VSI as given by the FW
5c3c48ac
JB		 248 * @vecmap: irq map info
249 *
250 * configure irq link list from the map
251 **/
fdf0e0bf 252static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 253 struct i40e_virtchnl_vector_map *vecmap)
254{
255 unsigned long linklistmap = 0, tempmap;
256 struct i40e_pf *pf = vf->pf;
257 struct i40e_hw *hw = &pf->hw;
258 u16 vsi_queue_id, pf_queue_id;
259 enum i40e_queue_type qtype;
260 u16 next_q, vector_id;
261 u32 reg, reg_idx;
262 u16 itr_idx = 0;
263
264 vector_id = vecmap->vector_id;
265 /* setup the head */
266 if (0 == vector_id)
267 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
268 else
269 reg_idx = I40E_VPINT_LNKLSTN(
9347eb77
MW		 270 ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) +
271 (vector_id - 1));
5c3c48ac
JB		 272
273 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
274 /* Special case - No queues mapped on this vector */
275 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
276 goto irq_list_done;
277 }
278 tempmap = vecmap->rxq_map;
4836650b 279 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 280 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
281 vsi_queue_id));
5c3c48ac
JB		 282 }
283
284 tempmap = vecmap->txq_map;
4836650b 285 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 286 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
287 vsi_queue_id + 1));
5c3c48ac
JB		 288 }
289
290 next_q = find_first_bit(&linklistmap,
291 (I40E_MAX_VSI_QP *
292 I40E_VIRTCHNL_SUPPORTED_QTYPES));
b82bc49e
MW		 293 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
294 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
fdf0e0bf 295 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 296 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
297
298 wr32(hw, reg_idx, reg);
299
300 while (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
301 switch (qtype) {
302 case I40E_QUEUE_TYPE_RX:
303 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
304 itr_idx = vecmap->rxitr_idx;
305 break;
306 case I40E_QUEUE_TYPE_TX:
307 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
308 itr_idx = vecmap->txitr_idx;
309 break;
310 default:
311 break;
312 }
313
314 next_q = find_next_bit(&linklistmap,
315 (I40E_MAX_VSI_QP *
316 I40E_VIRTCHNL_SUPPORTED_QTYPES),
317 next_q + 1);
829af3ac
MW		 318 if (next_q <
319 (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
5c3c48ac
JB		 320 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
321 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
fdf0e0bf 322 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id,
5c3c48ac
JB		 323 vsi_queue_id);
324 } else {
325 pf_queue_id = I40E_QUEUE_END_OF_LIST;
326 qtype = 0;
327 }
328
329 /* format for the RQCTL & TQCTL regs is same */
330 reg = (vector_id) |
331 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
332 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
41a1d04b 333 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
5c3c48ac
JB		 334 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
335 wr32(hw, reg_idx, reg);
336 }
337
b8262a6d
ASJ		 338 /* if the vf is running in polling mode and using interrupt zero,
339 * need to disable auto-mask on enabling zero interrupt for VFs.
340 */
341 if ((vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
342 (vector_id == 0)) {
343 reg = rd32(hw, I40E_GLINT_CTL);
344 if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
345 reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
346 wr32(hw, I40E_GLINT_CTL, reg);
347 }
348 }
349
5c3c48ac
JB		 350irq_list_done:
351 i40e_flush(hw);
352}
353
e3219ce6
ASJ		 354/**
355 * i40e_release_iwarp_qvlist
356 * @vf: pointer to the VF.
357 *
358 **/
359static void i40e_release_iwarp_qvlist(struct i40e_vf *vf)
360{
361 struct i40e_pf *pf = vf->pf;
362 struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info = vf->qvlist_info;
363 u32 msix_vf;
364 u32 i;
365
366 if (!vf->qvlist_info)
367 return;
368
369 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
370 for (i = 0; i < qvlist_info->num_vectors; i++) {
371 struct i40e_virtchnl_iwarp_qv_info *qv_info;
372 u32 next_q_index, next_q_type;
373 struct i40e_hw *hw = &pf->hw;
374 u32 v_idx, reg_idx, reg;
375
376 qv_info = &qvlist_info->qv_info[i];
377 if (!qv_info)
378 continue;
379 v_idx = qv_info->v_idx;
380 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
381 /* Figure out the queue after CEQ and make that the
382 * first queue.
383 */
384 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
385 reg = rd32(hw, I40E_VPINT_CEQCTL(reg_idx));
386 next_q_index = (reg & I40E_VPINT_CEQCTL_NEXTQ_INDX_MASK)
387 >> I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT;
388 next_q_type = (reg & I40E_VPINT_CEQCTL_NEXTQ_TYPE_MASK)
389 >> I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT;
390
391 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
392 reg = (next_q_index &
393 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
394 (next_q_type <<
395 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
396
397 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
398 }
399 }
400 kfree(vf->qvlist_info);
401 vf->qvlist_info = NULL;
402}
403
404/**
405 * i40e_config_iwarp_qvlist
406 * @vf: pointer to the VF info
407 * @qvlist_info: queue and vector list
408 *
409 * Return 0 on success or < 0 on error
410 **/
411static int i40e_config_iwarp_qvlist(struct i40e_vf *vf,
412 struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info)
413{
414 struct i40e_pf *pf = vf->pf;
415 struct i40e_hw *hw = &pf->hw;
416 struct i40e_virtchnl_iwarp_qv_info *qv_info;
417 u32 v_idx, i, reg_idx, reg;
418 u32 next_q_idx, next_q_type;
419 u32 msix_vf, size;
420
421 size = sizeof(struct i40e_virtchnl_iwarp_qvlist_info) +
422 (sizeof(struct i40e_virtchnl_iwarp_qv_info) *
423 (qvlist_info->num_vectors - 1));
424 vf->qvlist_info = kzalloc(size, GFP_KERNEL);
425 vf->qvlist_info->num_vectors = qvlist_info->num_vectors;
426
427 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
428 for (i = 0; i < qvlist_info->num_vectors; i++) {
429 qv_info = &qvlist_info->qv_info[i];
430 if (!qv_info)
431 continue;
432 v_idx = qv_info->v_idx;
433
434 /* Validate vector id belongs to this vf */
435 if (!i40e_vc_isvalid_vector_id(vf, v_idx))
436 goto err;
437
438 vf->qvlist_info->qv_info[i] = *qv_info;
439
440 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
441 /* We might be sharing the interrupt, so get the first queue
442 * index and type, push it down the list by adding the new
443 * queue on top. Also link it with the new queue in CEQCTL.
444 */
445 reg = rd32(hw, I40E_VPINT_LNKLSTN(reg_idx));
446 next_q_idx = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) >>
447 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT);
448 next_q_type = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK) >>
449 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
450
451 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
452 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
453 reg = (I40E_VPINT_CEQCTL_CAUSE_ENA_MASK |
454 (v_idx << I40E_VPINT_CEQCTL_MSIX_INDX_SHIFT) |
455 (qv_info->itr_idx << I40E_VPINT_CEQCTL_ITR_INDX_SHIFT) |
456 (next_q_type << I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT) |
457 (next_q_idx << I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT));
458 wr32(hw, I40E_VPINT_CEQCTL(reg_idx), reg);
459
460 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
461 reg = (qv_info->ceq_idx &
462 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
463 (I40E_QUEUE_TYPE_PE_CEQ <<
464 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
465 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
466 }
467
468 if (qv_info->aeq_idx != I40E_QUEUE_INVALID_IDX) {
469 reg = (I40E_VPINT_AEQCTL_CAUSE_ENA_MASK |
470 (v_idx << I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT) |
471 (qv_info->itr_idx << I40E_VPINT_AEQCTL_ITR_INDX_SHIFT));
472
473 wr32(hw, I40E_VPINT_AEQCTL(vf->vf_id), reg);
474 }
475 }
476
477 return 0;
478err:
479 kfree(vf->qvlist_info);
480 vf->qvlist_info = NULL;
481 return -EINVAL;
482}
483
5c3c48ac
JB		 484/**
485 * i40e_config_vsi_tx_queue
b40c82e6 486 * @vf: pointer to the VF info
fdf0e0bf 487 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 488 * @vsi_queue_id: vsi relative queue index
489 * @info: config. info
490 *
491 * configure tx queue
492 **/
fdf0e0bf 493static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 494 u16 vsi_queue_id,
495 struct i40e_virtchnl_txq_info *info)
496{
497 struct i40e_pf *pf = vf->pf;
498 struct i40e_hw *hw = &pf->hw;
499 struct i40e_hmc_obj_txq tx_ctx;
fdf0e0bf 500 struct i40e_vsi *vsi;
5c3c48ac
JB		 501 u16 pf_queue_id;
502 u32 qtx_ctl;
503 int ret = 0;
504
fdf0e0bf
ASJ		 505 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
506 vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac
JB		 507
508 /* clear the context structure first */
509 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
510
511 /* only set the required fields */
512 tx_ctx.base = info->dma_ring_addr / 128;
513 tx_ctx.qlen = info->ring_len;
fdf0e0bf 514 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
5c3c48ac 515 tx_ctx.rdylist_act = 0;
5d29896a
AS		 516 tx_ctx.head_wb_ena = info->headwb_enabled;
517 tx_ctx.head_wb_addr = info->dma_headwb_addr;
5c3c48ac
JB		 518
519 /* clear the context in the HMC */
520 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
521 if (ret) {
522 dev_err(&pf->pdev->dev,
523 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
524 pf_queue_id, ret);
525 ret = -ENOENT;
526 goto error_context;
527 }
528
529 /* set the context in the HMC */
530 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
531 if (ret) {
532 dev_err(&pf->pdev->dev,
533 "Failed to set VF LAN Tx queue context %d error: %d\n",
534 pf_queue_id, ret);
535 ret = -ENOENT;
536 goto error_context;
537 }
538
539 /* associate this queue with the PCI VF function */
540 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
13fd9774 541 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
5c3c48ac
JB		 542 & I40E_QTX_CTL_PF_INDX_MASK);
543 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
544 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
545 & I40E_QTX_CTL_VFVM_INDX_MASK);
546 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
547 i40e_flush(hw);
548
549error_context:
550 return ret;
551}
552
553/**
554 * i40e_config_vsi_rx_queue
b40c82e6 555 * @vf: pointer to the VF info
fdf0e0bf 556 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 557 * @vsi_queue_id: vsi relative queue index
558 * @info: config. info
559 *
560 * configure rx queue
561 **/
fdf0e0bf 562static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 563 u16 vsi_queue_id,
564 struct i40e_virtchnl_rxq_info *info)
565{
566 struct i40e_pf *pf = vf->pf;
567 struct i40e_hw *hw = &pf->hw;
568 struct i40e_hmc_obj_rxq rx_ctx;
569 u16 pf_queue_id;
570 int ret = 0;
571
fdf0e0bf 572 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 573
574 /* clear the context structure first */
575 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
576
577 /* only set the required fields */
578 rx_ctx.base = info->dma_ring_addr / 128;
579 rx_ctx.qlen = info->ring_len;
580
581 if (info->splithdr_enabled) {
582 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
583 I40E_RX_SPLIT_IP |
584 I40E_RX_SPLIT_TCP_UDP |
585 I40E_RX_SPLIT_SCTP;
586 /* header length validation */
587 if (info->hdr_size > ((2 * 1024) - 64)) {
588 ret = -EINVAL;
589 goto error_param;
590 }
591 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
592
593 /* set splitalways mode 10b */
d6b3bca1 594 rx_ctx.dtype = I40E_RX_DTYPE_HEADER_SPLIT;
5c3c48ac
JB		 595 }
596
597 /* databuffer length validation */
598 if (info->databuffer_size > ((16 * 1024) - 128)) {
599 ret = -EINVAL;
600 goto error_param;
601 }
602 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
603
604 /* max pkt. length validation */
605 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
606 ret = -EINVAL;
607 goto error_param;
608 }
609 rx_ctx.rxmax = info->max_pkt_size;
610
611 /* enable 32bytes desc always */
612 rx_ctx.dsize = 1;
613
614 /* default values */
5c3c48ac
JB		 615 rx_ctx.lrxqthresh = 2;
616 rx_ctx.crcstrip = 1;
50d41659 617 rx_ctx.prefena = 1;
c1d11cef 618 rx_ctx.l2tsel = 1;
5c3c48ac
JB		 619
620 /* clear the context in the HMC */
621 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
622 if (ret) {
623 dev_err(&pf->pdev->dev,
624 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
625 pf_queue_id, ret);
626 ret = -ENOENT;
627 goto error_param;
628 }
629
630 /* set the context in the HMC */
631 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
632 if (ret) {
633 dev_err(&pf->pdev->dev,
634 "Failed to set VF LAN Rx queue context %d error: %d\n",
635 pf_queue_id, ret);
636 ret = -ENOENT;
637 goto error_param;
638 }
639
640error_param:
641 return ret;
642}
643
644/**
645 * i40e_alloc_vsi_res
b40c82e6 646 * @vf: pointer to the VF info
5c3c48ac
JB		 647 * @type: type of VSI to allocate
648 *
b40c82e6 649 * alloc VF vsi context & resources
5c3c48ac
JB		 650 **/
651static int i40e_alloc_vsi_res(struct i40e_vf *vf, enum i40e_vsi_type type)
652{
653 struct i40e_mac_filter *f = NULL;
654 struct i40e_pf *pf = vf->pf;
5c3c48ac
JB		 655 struct i40e_vsi *vsi;
656 int ret = 0;
657
658 vsi = i40e_vsi_setup(pf, type, pf->vsi[pf->lan_vsi]->seid, vf->vf_id);
659
660 if (!vsi) {
661 dev_err(&pf->pdev->dev,
b40c82e6 662 "add vsi failed for VF %d, aq_err %d\n",
5c3c48ac
JB		 663 vf->vf_id, pf->hw.aq.asq_last_status);
664 ret = -ENOENT;
665 goto error_alloc_vsi_res;
666 }
667 if (type == I40E_VSI_SRIOV) {
1a10370a 668 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
6995b36c 669
fdf0e0bf 670 vf->lan_vsi_idx = vsi->idx;
5c3c48ac 671 vf->lan_vsi_id = vsi->id;
6c12fcbf
GR		 672 /* If the port VLAN has been configured and then the
673 * VF driver was removed then the VSI port VLAN
674 * configuration was destroyed. Check if there is
675 * a port VLAN and restore the VSI configuration if
676 * needed.
677 */
678 if (vf->port_vlan_id)
679 i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
21659035
KP		 680
681 spin_lock_bh(&vsi->mac_filter_list_lock);
b7b713a8
MW		 682 if (is_valid_ether_addr(vf->default_lan_addr.addr)) {
683 f = i40e_add_filter(vsi, vf->default_lan_addr.addr,
684 vf->port_vlan_id ? vf->port_vlan_id : -1,
685 true, false);
686 if (!f)
687 dev_info(&pf->pdev->dev,
688 "Could not add MAC filter %pM for VF %d\n",
689 vf->default_lan_addr.addr, vf->vf_id);
690 }
e995163c
MW		 691 f = i40e_add_filter(vsi, brdcast,
692 vf->port_vlan_id ? vf->port_vlan_id : -1,
1a10370a
GR		 693 true, false);
694 if (!f)
695 dev_info(&pf->pdev->dev,
696 "Could not allocate VF broadcast filter\n");
21659035 697 spin_unlock_bh(&vsi->mac_filter_list_lock);
5c3c48ac 698 }
6dbbbfb2 699
5c3c48ac 700 /* program mac filter */
17652c63 701 ret = i40e_sync_vsi_filters(vsi);
fd1646ee 702 if (ret)
5c3c48ac 703 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
5c3c48ac 704
6b192891
MW		 705 /* Set VF bandwidth if specified */
706 if (vf->tx_rate) {
707 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
708 vf->tx_rate / 50, 0, NULL);
709 if (ret)
710 dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
711 vf->vf_id, ret);
712 }
713
5c3c48ac
JB		 714error_alloc_vsi_res:
715 return ret;
716}
717
805bd5bd
MW		 718/**
719 * i40e_enable_vf_mappings
b40c82e6 720 * @vf: pointer to the VF info
805bd5bd 721 *
b40c82e6 722 * enable VF mappings
805bd5bd
MW		 723 **/
724static void i40e_enable_vf_mappings(struct i40e_vf *vf)
725{
726 struct i40e_pf *pf = vf->pf;
727 struct i40e_hw *hw = &pf->hw;
728 u32 reg, total_queue_pairs = 0;
729 int j;
730
731 /* Tell the hardware we're using noncontiguous mapping. HW requires
732 * that VF queues be mapped using this method, even when they are
733 * contiguous in real life
734 */
272cdaf2
SN		 735 i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
736 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
805bd5bd
MW		 737
738 /* enable VF vplan_qtable mappings */
739 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
740 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
741
742 /* map PF queues to VF queues */
fdf0e0bf
ASJ		 743 for (j = 0; j < pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs; j++) {
744 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id, j);
6995b36c 745
805bd5bd
MW		 746 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
747 wr32(hw, I40E_VPLAN_QTABLE(total_queue_pairs, vf->vf_id), reg);
748 total_queue_pairs++;
749 }
750
751 /* map PF queues to VSI */
752 for (j = 0; j < 7; j++) {
fdf0e0bf 753 if (j * 2 >= pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs) {
805bd5bd
MW		 754 reg = 0x07FF07FF; /* unused */
755 } else {
fdf0e0bf 756 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
805bd5bd
MW		 757 j * 2);
758 reg = qid;
fdf0e0bf 759 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
805bd5bd
MW		 760 (j * 2) + 1);
761 reg |= qid << 16;
762 }
272cdaf2
SN		 763 i40e_write_rx_ctl(hw, I40E_VSILAN_QTABLE(j, vf->lan_vsi_id),
764 reg);
805bd5bd
MW		 765 }
766
767 i40e_flush(hw);
768}
769
770/**
771 * i40e_disable_vf_mappings
b40c82e6 772 * @vf: pointer to the VF info
805bd5bd 773 *
b40c82e6 774 * disable VF mappings
805bd5bd
MW		 775 **/
776static void i40e_disable_vf_mappings(struct i40e_vf *vf)
777{
778 struct i40e_pf *pf = vf->pf;
779 struct i40e_hw *hw = &pf->hw;
780 int i;
781
782 /* disable qp mappings */
783 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
784 for (i = 0; i < I40E_MAX_VSI_QP; i++)
785 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
786 I40E_QUEUE_END_OF_LIST);
787 i40e_flush(hw);
788}
789
790/**
791 * i40e_free_vf_res
b40c82e6 792 * @vf: pointer to the VF info
805bd5bd 793 *
b40c82e6 794 * free VF resources
805bd5bd
MW		 795 **/
796static void i40e_free_vf_res(struct i40e_vf *vf)
797{
798 struct i40e_pf *pf = vf->pf;
fc18eaa0
MW		 799 struct i40e_hw *hw = &pf->hw;
800 u32 reg_idx, reg;
801 int i, msix_vf;
805bd5bd
MW		 802
803 /* free vsi & disconnect it from the parent uplink */
fdf0e0bf
ASJ		 804 if (vf->lan_vsi_idx) {
805 i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]);
806 vf->lan_vsi_idx = 0;
805bd5bd
MW		 807 vf->lan_vsi_id = 0;
808 }
9347eb77
MW		 809 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
810
fc18eaa0
MW		 811 /* disable interrupts so the VF starts in a known state */
812 for (i = 0; i < msix_vf; i++) {
813 /* format is same for both registers */
814 if (0 == i)
815 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
816 else
817 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
818 (vf->vf_id))
819 + (i - 1));
820 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
821 i40e_flush(hw);
822 }
805bd5bd 823
fc18eaa0
MW		 824 /* clear the irq settings */
825 for (i = 0; i < msix_vf; i++) {
826 /* format is same for both registers */
827 if (0 == i)
828 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
829 else
830 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
831 (vf->vf_id))
832 + (i - 1));
833 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
834 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
835 wr32(hw, reg_idx, reg);
836 i40e_flush(hw);
837 }
805bd5bd
MW		 838 /* reset some of the state varibles keeping
839 * track of the resources
840 */
841 vf->num_queue_pairs = 0;
842 vf->vf_states = 0;
21be99ec 843 clear_bit(I40E_VF_STAT_INIT, &vf->vf_states);
805bd5bd
MW		 844}
845
846/**
847 * i40e_alloc_vf_res
b40c82e6 848 * @vf: pointer to the VF info
805bd5bd 849 *
b40c82e6 850 * allocate VF resources
805bd5bd
MW		 851 **/
852static int i40e_alloc_vf_res(struct i40e_vf *vf)
853{
854 struct i40e_pf *pf = vf->pf;
855 int total_queue_pairs = 0;
856 int ret;
857
858 /* allocate hw vsi context & associated resources */
859 ret = i40e_alloc_vsi_res(vf, I40E_VSI_SRIOV);
860 if (ret)
861 goto error_alloc;
fdf0e0bf 862 total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
692fb0a7
ASJ		 863
864 if (vf->trusted)
865 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
866 else
867 clear_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
805bd5bd
MW		 868
869 /* store the total qps number for the runtime
b40c82e6 870 * VF req validation
805bd5bd
MW		 871 */
872 vf->num_queue_pairs = total_queue_pairs;
873
b40c82e6 874 /* VF is now completely initialized */
805bd5bd
MW		 875 set_bit(I40E_VF_STAT_INIT, &vf->vf_states);
876
877error_alloc:
878 if (ret)
879 i40e_free_vf_res(vf);
880
881 return ret;
882}
883
fc18eaa0
MW		 884#define VF_DEVICE_STATUS 0xAA
885#define VF_TRANS_PENDING_MASK 0x20
886/**
887 * i40e_quiesce_vf_pci
b40c82e6 888 * @vf: pointer to the VF structure
fc18eaa0
MW		 889 *
890 * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
891 * if the transactions never clear.
892 **/
893static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
894{
895 struct i40e_pf *pf = vf->pf;
896 struct i40e_hw *hw = &pf->hw;
897 int vf_abs_id, i;
898 u32 reg;
899
b141d619 900 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
fc18eaa0
MW		 901
902 wr32(hw, I40E_PF_PCI_CIAA,
903 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
904 for (i = 0; i < 100; i++) {
905 reg = rd32(hw, I40E_PF_PCI_CIAD);
906 if ((reg & VF_TRANS_PENDING_MASK) == 0)
907 return 0;
908 udelay(1);
909 }
910 return -EIO;
911}
912
5c3c48ac
JB		 913/**
914 * i40e_reset_vf
b40c82e6 915 * @vf: pointer to the VF structure
5c3c48ac
JB		 916 * @flr: VFLR was issued or not
917 *
b40c82e6 918 * reset the VF
5c3c48ac 919 **/
fc18eaa0 920void i40e_reset_vf(struct i40e_vf *vf, bool flr)
5c3c48ac 921{
5c3c48ac
JB		 922 struct i40e_pf *pf = vf->pf;
923 struct i40e_hw *hw = &pf->hw;
7e5a313e 924 u32 reg, reg_idx, bit_idx;
5c3c48ac 925 bool rsd = false;
fc18eaa0 926 int i;
5c3c48ac 927
3ba9bcb4
MW		 928 if (test_and_set_bit(__I40E_VF_DISABLE, &pf->state))
929 return;
930
5c3c48ac 931 /* warn the VF */
5c3c48ac
JB		 932 clear_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
933
fc18eaa0
MW		 934 /* In the case of a VFLR, the HW has already reset the VF and we
935 * just need to clean up, so don't hit the VFRTRIG register.
5c3c48ac
JB		 936 */
937 if (!flr) {
b40c82e6 938 /* reset VF using VPGEN_VFRTRIG reg */
fc18eaa0
MW		 939 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
940 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
5c3c48ac
JB		 941 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
942 i40e_flush(hw);
943 }
7369ca87
MW		 944 /* clear the VFLR bit in GLGEN_VFLRSTAT */
945 reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
946 bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
947 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
30728c5b 948 i40e_flush(hw);
5c3c48ac 949
fc18eaa0
MW		 950 if (i40e_quiesce_vf_pci(vf))
951 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
952 vf->vf_id);
953
5c3c48ac
JB		 954 /* poll VPGEN_VFRSTAT reg to make sure
955 * that reset is complete
956 */
1750a22f
MW		 957 for (i = 0; i < 10; i++) {
958 /* VF reset requires driver to first reset the VF and then
959 * poll the status register to make sure that the reset
960 * completed successfully. Due to internal HW FIFO flushes,
961 * we must wait 10ms before the register will be valid.
5c3c48ac 962 */
1750a22f 963 usleep_range(10000, 20000);
5c3c48ac
JB		 964 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
965 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
966 rsd = true;
967 break;
968 }
969 }
970
57175ac1
ASJ		 971 if (flr)
972 usleep_range(10000, 20000);
973
5c3c48ac 974 if (!rsd)
fc18eaa0 975 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
5c3c48ac 976 vf->vf_id);
fc18eaa0 977 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_COMPLETED);
5c3c48ac
JB		 978 /* clear the reset bit in the VPGEN_VFRTRIG reg */
979 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
980 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
981 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
fc18eaa0
MW		 982
983 /* On initial reset, we won't have any queues */
fdf0e0bf 984 if (vf->lan_vsi_idx == 0)
fc18eaa0
MW		 985 goto complete_reset;
986
fdf0e0bf 987 i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], false);
fc18eaa0 988complete_reset:
b40c82e6 989 /* reallocate VF resources to reset the VSI state */
fc18eaa0 990 i40e_free_vf_res(vf);
21be99ec 991 if (!i40e_alloc_vf_res(vf)) {
e3219ce6 992 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
21be99ec
MW		 993 i40e_enable_vf_mappings(vf);
994 set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
995 clear_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
e3219ce6 996 i40e_notify_client_of_vf_reset(pf, abs_vf_id);
21be99ec 997 }
5c3c48ac 998 /* tell the VF the reset is done */
fc18eaa0 999 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_VFACTIVE);
7e5a313e 1000
5c3c48ac 1001 i40e_flush(hw);
3ba9bcb4 1002 clear_bit(__I40E_VF_DISABLE, &pf->state);
5c3c48ac 1003}
c354229f 1004
5c3c48ac
JB		 1005/**
1006 * i40e_free_vfs
b40c82e6 1007 * @pf: pointer to the PF structure
5c3c48ac 1008 *
b40c82e6 1009 * free VF resources
5c3c48ac
JB		 1010 **/
1011void i40e_free_vfs(struct i40e_pf *pf)
1012{
f7414531
MW		 1013 struct i40e_hw *hw = &pf->hw;
1014 u32 reg_idx, bit_idx;
1015 int i, tmp, vf_id;
5c3c48ac
JB		 1016
1017 if (!pf->vf)
1018 return;
3ba9bcb4
MW		 1019 while (test_and_set_bit(__I40E_VF_DISABLE, &pf->state))
1020 usleep_range(1000, 2000);
5c3c48ac 1021
e3219ce6 1022 i40e_notify_client_of_vf_enable(pf, 0);
0325fca7
MW		 1023 for (i = 0; i < pf->num_alloc_vfs; i++)
1024 if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
1025 i40e_vsi_control_rings(pf->vsi[pf->vf[i].lan_vsi_idx],
1026 false);
44434638 1027
6a9ddb36
MW		 1028 /* Disable IOV before freeing resources. This lets any VF drivers
1029 * running in the host get themselves cleaned up before we yank
1030 * the carpet out from underneath their feet.
1031 */
1032 if (!pci_vfs_assigned(pf->pdev))
1033 pci_disable_sriov(pf->pdev);
6d7b967d
MW		 1034 else
1035 dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
6a9ddb36
MW		 1036
1037 msleep(20); /* let any messages in transit get finished up */
1038
b40c82e6 1039 /* free up VF resources */
6c1b5bff
MW		 1040 tmp = pf->num_alloc_vfs;
1041 pf->num_alloc_vfs = 0;
1042 for (i = 0; i < tmp; i++) {
5c3c48ac
JB		 1043 if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
1044 i40e_free_vf_res(&pf->vf[i]);
1045 /* disable qp mappings */
1046 i40e_disable_vf_mappings(&pf->vf[i]);
1047 }
1048
1049 kfree(pf->vf);
1050 pf->vf = NULL;
5c3c48ac 1051
9e5634df
MW		 1052 /* This check is for when the driver is unloaded while VFs are
1053 * assigned. Setting the number of VFs to 0 through sysfs is caught
1054 * before this function ever gets called.
1055 */
c24817b6 1056 if (!pci_vfs_assigned(pf->pdev)) {
f7414531
MW		 1057 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
1058 * work correctly when SR-IOV gets re-enabled.
1059 */
1060 for (vf_id = 0; vf_id < tmp; vf_id++) {
1061 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
1062 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
41a1d04b 1063 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
f7414531 1064 }
c354229f 1065 }
3ba9bcb4 1066 clear_bit(__I40E_VF_DISABLE, &pf->state);
5c3c48ac
JB		 1067}
1068
1069#ifdef CONFIG_PCI_IOV
1070/**
1071 * i40e_alloc_vfs
b40c82e6
JK		 1072 * @pf: pointer to the PF structure
1073 * @num_alloc_vfs: number of VFs to allocate
5c3c48ac 1074 *
b40c82e6 1075 * allocate VF resources
5c3c48ac 1076 **/
4aeec010 1077int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
5c3c48ac
JB		 1078{
1079 struct i40e_vf *vfs;
1080 int i, ret = 0;
1081
6c1b5bff 1082 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW		 1083 i40e_irq_dynamic_disable_icr0(pf);
1084
4aeec010
MW		 1085 /* Check to see if we're just allocating resources for extant VFs */
1086 if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
1087 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
1088 if (ret) {
de445b3d 1089 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
4aeec010
MW		 1090 pf->num_alloc_vfs = 0;
1091 goto err_iov;
1092 }
5c3c48ac 1093 }
e3219ce6 1094 i40e_notify_client_of_vf_enable(pf, num_alloc_vfs);
5c3c48ac 1095 /* allocate memory */
cc6456af 1096 vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL);
5c3c48ac
JB		 1097 if (!vfs) {
1098 ret = -ENOMEM;
1099 goto err_alloc;
1100 }
c674d125 1101 pf->vf = vfs;
5c3c48ac
JB		 1102
1103 /* apply default profile */
1104 for (i = 0; i < num_alloc_vfs; i++) {
1105 vfs[i].pf = pf;
1106 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
1107 vfs[i].vf_id = i;
1108
1109 /* assign default capabilities */
1110 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
c674d125 1111 vfs[i].spoofchk = true;
b40c82e6 1112 /* VF resources get allocated during reset */
fc18eaa0 1113 i40e_reset_vf(&vfs[i], false);
5c3c48ac 1114
5c3c48ac 1115 }
5c3c48ac
JB		 1116 pf->num_alloc_vfs = num_alloc_vfs;
1117
1118err_alloc:
1119 if (ret)
1120 i40e_free_vfs(pf);
1121err_iov:
6c1b5bff 1122 /* Re-enable interrupt 0. */
40d72a50 1123 i40e_irq_dynamic_enable_icr0(pf, false);
5c3c48ac
JB		 1124 return ret;
1125}
1126
1127#endif
1128/**
1129 * i40e_pci_sriov_enable
1130 * @pdev: pointer to a pci_dev structure
b40c82e6 1131 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1132 *
1133 * Enable or change the number of VFs
1134 **/
1135static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
1136{
1137#ifdef CONFIG_PCI_IOV
1138 struct i40e_pf *pf = pci_get_drvdata(pdev);
1139 int pre_existing_vfs = pci_num_vf(pdev);
1140 int err = 0;
1141
6995b36c 1142 if (test_bit(__I40E_TESTING, &pf->state)) {
e17bc411
GR		 1143 dev_warn(&pdev->dev,
1144 "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n");
1145 err = -EPERM;
1146 goto err_out;
1147 }
1148
5c3c48ac
JB		 1149 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
1150 i40e_free_vfs(pf);
1151 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
1152 goto out;
1153
1154 if (num_vfs > pf->num_req_vfs) {
96c8d073
MW		 1155 dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n",
1156 num_vfs, pf->num_req_vfs);
5c3c48ac
JB		 1157 err = -EPERM;
1158 goto err_out;
1159 }
1160
96c8d073 1161 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
5c3c48ac
JB		 1162 err = i40e_alloc_vfs(pf, num_vfs);
1163 if (err) {
1164 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
1165 goto err_out;
1166 }
1167
1168out:
1169 return num_vfs;
1170
1171err_out:
1172 return err;
1173#endif
1174 return 0;
1175}
1176
1177/**
1178 * i40e_pci_sriov_configure
1179 * @pdev: pointer to a pci_dev structure
b40c82e6 1180 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1181 *
1182 * Enable or change the number of VFs. Called when the user updates the number
1183 * of VFs in sysfs.
1184 **/
1185int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1186{
1187 struct i40e_pf *pf = pci_get_drvdata(pdev);
1188
fc60861e
ASJ		 1189 if (num_vfs) {
1190 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
1191 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
1192 i40e_do_reset_safe(pf,
1193 BIT_ULL(__I40E_PF_RESET_REQUESTED));
1194 }
5c3c48ac 1195 return i40e_pci_sriov_enable(pdev, num_vfs);
fc60861e 1196 }
5c3c48ac 1197
c24817b6 1198 if (!pci_vfs_assigned(pf->pdev)) {
9e5634df 1199 i40e_free_vfs(pf);
fc60861e
ASJ		 1200 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
1201 i40e_do_reset_safe(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
9e5634df
MW		 1202 } else {
1203 dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
1204 return -EINVAL;
1205 }
5c3c48ac
JB		 1206 return 0;
1207}
1208
1209/***********************virtual channel routines******************/
1210
1211/**
1212 * i40e_vc_send_msg_to_vf
b40c82e6 1213 * @vf: pointer to the VF info
5c3c48ac
JB		 1214 * @v_opcode: virtual channel opcode
1215 * @v_retval: virtual channel return value
1216 * @msg: pointer to the msg buffer
1217 * @msglen: msg length
1218 *
b40c82e6 1219 * send msg to VF
5c3c48ac
JB		 1220 **/
1221static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
1222 u32 v_retval, u8 *msg, u16 msglen)
1223{
6e7b5bd3
ASJ		 1224 struct i40e_pf *pf;
1225 struct i40e_hw *hw;
1226 int abs_vf_id;
5c3c48ac
JB		 1227 i40e_status aq_ret;
1228
6e7b5bd3
ASJ		 1229 /* validate the request */
1230 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
1231 return -EINVAL;
1232
1233 pf = vf->pf;
1234 hw = &pf->hw;
1235 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1236
5c3c48ac
JB		 1237 /* single place to detect unsuccessful return values */
1238 if (v_retval) {
1239 vf->num_invalid_msgs++;
18b7af57
MW		 1240 dev_info(&pf->pdev->dev, "VF %d failed opcode %d, retval: %d\n",
1241 vf->vf_id, v_opcode, v_retval);
5c3c48ac
JB		 1242 if (vf->num_invalid_msgs >
1243 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
1244 dev_err(&pf->pdev->dev,
1245 "Number of invalid messages exceeded for VF %d\n",
1246 vf->vf_id);
1247 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
1248 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
1249 }
1250 } else {
1251 vf->num_valid_msgs++;
5d38c93e
JW		 1252 /* reset the invalid counter, if a valid message is received. */
1253 vf->num_invalid_msgs = 0;
5c3c48ac
JB		 1254 }
1255
f19efbb5 1256 aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
7efa84b7 1257 msg, msglen, NULL);
5c3c48ac 1258 if (aq_ret) {
18b7af57
MW		 1259 dev_info(&pf->pdev->dev,
1260 "Unable to send the message to VF %d aq_err %d\n",
1261 vf->vf_id, pf->hw.aq.asq_last_status);
5c3c48ac
JB		 1262 return -EIO;
1263 }
1264
1265 return 0;
1266}
1267
1268/**
1269 * i40e_vc_send_resp_to_vf
b40c82e6 1270 * @vf: pointer to the VF info
5c3c48ac
JB		 1271 * @opcode: operation code
1272 * @retval: return value
1273 *
b40c82e6 1274 * send resp msg to VF
5c3c48ac
JB		 1275 **/
1276static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
1277 enum i40e_virtchnl_ops opcode,
1278 i40e_status retval)
1279{
1280 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
1281}
1282
1283/**
1284 * i40e_vc_get_version_msg
b40c82e6 1285 * @vf: pointer to the VF info
5c3c48ac 1286 *
b40c82e6 1287 * called from the VF to request the API version used by the PF
5c3c48ac 1288 **/
f4ca1a22 1289static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac
JB		 1290{
1291 struct i40e_virtchnl_version_info info = {
1292 I40E_VIRTCHNL_VERSION_MAJOR, I40E_VIRTCHNL_VERSION_MINOR
1293 };
1294
f4ca1a22 1295 vf->vf_ver = *(struct i40e_virtchnl_version_info *)msg;
606a5488
MW		 1296 /* VFs running the 1.0 API expect to get 1.0 back or they will cry. */
1297 if (VF_IS_V10(vf))
1298 info.minor = I40E_VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
5c3c48ac
JB		 1299 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
1300 I40E_SUCCESS, (u8 *)&info,
1301 sizeof(struct
1302 i40e_virtchnl_version_info));
1303}
1304
1305/**
1306 * i40e_vc_get_vf_resources_msg
b40c82e6 1307 * @vf: pointer to the VF info
5c3c48ac
JB		 1308 * @msg: pointer to the msg buffer
1309 * @msglen: msg length
1310 *
b40c82e6 1311 * called from the VF to request its resources
5c3c48ac 1312 **/
f4ca1a22 1313static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac
JB		 1314{
1315 struct i40e_virtchnl_vf_resource *vfres = NULL;
1316 struct i40e_pf *pf = vf->pf;
1317 i40e_status aq_ret = 0;
1318 struct i40e_vsi *vsi;
5c3c48ac 1319 int num_vsis = 1;
442b25e4 1320 int len = 0;
5c3c48ac
JB		 1321 int ret;
1322
1323 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
1324 aq_ret = I40E_ERR_PARAM;
1325 goto err;
1326 }
1327
1328 len = (sizeof(struct i40e_virtchnl_vf_resource) +
1329 sizeof(struct i40e_virtchnl_vsi_resource) * num_vsis);
1330
1331 vfres = kzalloc(len, GFP_KERNEL);
1332 if (!vfres) {
1333 aq_ret = I40E_ERR_NO_MEMORY;
1334 len = 0;
1335 goto err;
1336 }
f4ca1a22
MW		 1337 if (VF_IS_V11(vf))
1338 vf->driver_caps = *(u32 *)msg;
1339 else
1340 vf->driver_caps = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
1341 I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG |
1342 I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
5c3c48ac
JB		 1343
1344 vfres->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2;
fdf0e0bf 1345 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1346 if (!vsi->info.pvid)
e25d00b8 1347 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
e3219ce6
ASJ		 1348
1349 if (i40e_vf_client_capable(pf, vf->vf_id, I40E_CLIENT_IWARP) &&
1350 (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_IWARP)) {
1351 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_IWARP;
1352 set_bit(I40E_VF_STAT_IWARPENA, &vf->vf_states);
1353 }
1354
c4e1868c
MW		 1355 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PF) {
1356 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RSS_PF;
e25d00b8 1357 } else {
c4e1868c
MW		 1358 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
1359 (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ))
1360 vfres->vf_offload_flags |=
1361 I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ;
1362 else
1363 vfres->vf_offload_flags |=
1364 I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG;
e25d00b8 1365 }
1f012279 1366
3d0da5b7
ASJ		 1367 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
1368 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
1369 vfres->vf_offload_flags |=
1370 I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
1371 }
1372
14c5f5d2
SN		 1373 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) {
1374 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
1375 dev_err(&pf->pdev->dev,
1376 "VF %d requested polling mode: this feature is supported only when the device is running in single function per port (SFP) mode\n",
1377 vf->vf_id);
1378 ret = I40E_ERR_PARAM;
1379 goto err;
1380 }
1f012279 1381 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING;
14c5f5d2 1382 }
1f012279 1383
f6d83d13
ASJ		 1384 if (pf->flags & I40E_FLAG_WB_ON_ITR_CAPABLE) {
1385 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
1386 vfres->vf_offload_flags |=
1387 I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
1388 }
1389
5c3c48ac
JB		 1390 vfres->num_vsis = num_vsis;
1391 vfres->num_queue_pairs = vf->num_queue_pairs;
1392 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
c4e1868c
MW		 1393 vfres->rss_key_size = I40E_HKEY_ARRAY_SIZE;
1394 vfres->rss_lut_size = I40E_VF_HLUT_ARRAY_SIZE;
1395
fdf0e0bf 1396 if (vf->lan_vsi_idx) {
442b25e4
MW		 1397 vfres->vsi_res[0].vsi_id = vf->lan_vsi_id;
1398 vfres->vsi_res[0].vsi_type = I40E_VSI_SRIOV;
1399 vfres->vsi_res[0].num_queue_pairs = vsi->alloc_queue_pairs;
f578f5f4 1400 /* VFs only use TC 0 */
442b25e4 1401 vfres->vsi_res[0].qset_handle
f578f5f4 1402 = le16_to_cpu(vsi->info.qs_handle[0]);
442b25e4 1403 ether_addr_copy(vfres->vsi_res[0].default_mac_addr,
6995b36c 1404 vf->default_lan_addr.addr);
5c3c48ac
JB		 1405 }
1406 set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
1407
1408err:
b40c82e6 1409 /* send the response back to the VF */
5c3c48ac
JB		 1410 ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
1411 aq_ret, (u8 *)vfres, len);
1412
1413 kfree(vfres);
1414 return ret;
1415}
1416
1417/**
1418 * i40e_vc_reset_vf_msg
b40c82e6 1419 * @vf: pointer to the VF info
5c3c48ac
JB		 1420 * @msg: pointer to the msg buffer
1421 * @msglen: msg length
1422 *
b40c82e6
JK		 1423 * called from the VF to reset itself,
1424 * unlike other virtchnl messages, PF driver
1425 * doesn't send the response back to the VF
5c3c48ac 1426 **/
fc18eaa0 1427static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
5c3c48ac 1428{
fc18eaa0
MW		 1429 if (test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
1430 i40e_reset_vf(vf, false);
5c3c48ac
JB		 1431}
1432
5676a8b9
ASJ		 1433/**
1434 * i40e_getnum_vf_vsi_vlan_filters
1435 * @vsi: pointer to the vsi
1436 *
1437 * called to get the number of VLANs offloaded on this VF
1438 **/
1439static inline int i40e_getnum_vf_vsi_vlan_filters(struct i40e_vsi *vsi)
1440{
1441 struct i40e_mac_filter *f;
1442 int num_vlans = 0;
1443
1444 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1445 if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID)
1446 num_vlans++;
1447 }
1448
1449 return num_vlans;
1450}
1451
5c3c48ac
JB		 1452/**
1453 * i40e_vc_config_promiscuous_mode_msg
b40c82e6 1454 * @vf: pointer to the VF info
5c3c48ac
JB		 1455 * @msg: pointer to the msg buffer
1456 * @msglen: msg length
1457 *
b40c82e6
JK		 1458 * called from the VF to configure the promiscuous mode of
1459 * VF vsis
5c3c48ac
JB		 1460 **/
1461static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf,
1462 u8 *msg, u16 msglen)
1463{
1464 struct i40e_virtchnl_promisc_info *info =
1465 (struct i40e_virtchnl_promisc_info *)msg;
1466 struct i40e_pf *pf = vf->pf;
1467 struct i40e_hw *hw = &pf->hw;
5676a8b9
ASJ		 1468 struct i40e_mac_filter *f;
1469 i40e_status aq_ret = 0;
5c3c48ac 1470 bool allmulti = false;
5676a8b9
ASJ		 1471 struct i40e_vsi *vsi;
1472 bool alluni = false;
1473 int aq_err = 0;
5c3c48ac 1474
fdf0e0bf 1475 vsi = i40e_find_vsi_from_id(pf, info->vsi_id);
5c3c48ac
JB		 1476 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1477 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
5676a8b9
ASJ		 1478 !i40e_vc_isvalid_vsi_id(vf, info->vsi_id)) {
1479 dev_err(&pf->pdev->dev,
1480 "VF %d doesn't meet requirements to enter promiscuous mode\n",
1481 vf->vf_id);
5c3c48ac
JB		 1482 aq_ret = I40E_ERR_PARAM;
1483 goto error_param;
1484 }
5676a8b9 1485 /* Multicast promiscuous handling*/
5c3c48ac
JB		 1486 if (info->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
1487 allmulti = true;
5676a8b9
ASJ		 1488
1489 if (vf->port_vlan_id) {
1490 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw, vsi->seid,
1491 allmulti,
1492 vf->port_vlan_id,
1493 NULL);
1494 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
1495 list_for_each_entry(f, &vsi->mac_filter_list, list) {
47d34839
ASJ		 1496 if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
1497 continue;
1498 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw,
1499 vsi->seid,
1500 allmulti,
1501 f->vlan,
1502 NULL);
5676a8b9
ASJ		 1503 aq_err = pf->hw.aq.asq_last_status;
1504 if (aq_ret) {
1505 dev_err(&pf->pdev->dev,
1506 "Could not add VLAN %d to multicast promiscuous domain err %s aq_err %s\n",
1507 f->vlan,
1508 i40e_stat_str(&pf->hw, aq_ret),
1509 i40e_aq_str(&pf->hw, aq_err));
1510 break;
1511 }
1512 }
1513 } else {
1514 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid,
1515 allmulti, NULL);
1516 aq_err = pf->hw.aq.asq_last_status;
1517 if (aq_ret) {
1518 dev_err(&pf->pdev->dev,
1519 "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n",
1520 vf->vf_id,
1521 i40e_stat_str(&pf->hw, aq_ret),
1522 i40e_aq_str(&pf->hw, aq_err));
1523 goto error_param_int;
1524 }
1525 }
1526
1527 if (!aq_ret) {
1528 dev_info(&pf->pdev->dev,
1529 "VF %d successfully set multicast promiscuous mode\n",
1530 vf->vf_id);
1531 if (allmulti)
1532 set_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states);
1533 else
1534 clear_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states);
1535 }
1536
1537 if (info->flags & I40E_FLAG_VF_UNICAST_PROMISC)
1538 alluni = true;
1539 if (vf->port_vlan_id) {
1540 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw, vsi->seid,
1541 alluni,
1542 vf->port_vlan_id,
1543 NULL);
1544 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
1545 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1546 aq_ret = 0;
1547 if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID)
1548 aq_ret =
1549 i40e_aq_set_vsi_uc_promisc_on_vlan(hw,
1550 vsi->seid,
1551 alluni,
1552 f->vlan,
1553 NULL);
1554 aq_err = pf->hw.aq.asq_last_status;
1555 if (aq_ret)
1556 dev_err(&pf->pdev->dev,
1557 "Could not add VLAN %d to Unicast promiscuous domain err %s aq_err %s\n",
1558 f->vlan,
1559 i40e_stat_str(&pf->hw, aq_ret),
1560 i40e_aq_str(&pf->hw, aq_err));
1561 }
1562 } else {
1563 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, vsi->seid,
1564 allmulti, NULL);
1565 aq_err = pf->hw.aq.asq_last_status;
1566 if (aq_ret)
1567 dev_err(&pf->pdev->dev,
1568 "VF %d failed to set unicast promiscuous mode %8.8x err %s aq_err %s\n",
1569 vf->vf_id, info->flags,
1570 i40e_stat_str(&pf->hw, aq_ret),
1571 i40e_aq_str(&pf->hw, aq_err));
1572 }
1573
1574error_param_int:
1575 if (!aq_ret) {
1576 dev_info(&pf->pdev->dev,
1577 "VF %d successfully set unicast promiscuous mode\n",
1578 vf->vf_id);
1579 if (alluni)
1580 set_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states);
1581 else
1582 clear_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states);
1583 }
5c3c48ac
JB		 1584
1585error_param:
b40c82e6 1586 /* send the response to the VF */
5c3c48ac
JB		 1587 return i40e_vc_send_resp_to_vf(vf,
1588 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
1589 aq_ret);
1590}
1591
1592/**
1593 * i40e_vc_config_queues_msg
b40c82e6 1594 * @vf: pointer to the VF info
5c3c48ac
JB		 1595 * @msg: pointer to the msg buffer
1596 * @msglen: msg length
1597 *
b40c82e6 1598 * called from the VF to configure the rx/tx
5c3c48ac
JB		 1599 * queues
1600 **/
1601static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1602{
1603 struct i40e_virtchnl_vsi_queue_config_info *qci =
1604 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
1605 struct i40e_virtchnl_queue_pair_info *qpi;
5f5e33b6 1606 struct i40e_pf *pf = vf->pf;
5c3c48ac
JB		 1607 u16 vsi_id, vsi_queue_id;
1608 i40e_status aq_ret = 0;
1609 int i;
1610
1611 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1612 aq_ret = I40E_ERR_PARAM;
1613 goto error_param;
1614 }
1615
1616 vsi_id = qci->vsi_id;
1617 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1618 aq_ret = I40E_ERR_PARAM;
1619 goto error_param;
1620 }
1621 for (i = 0; i < qci->num_queue_pairs; i++) {
1622 qpi = &qci->qpair[i];
1623 vsi_queue_id = qpi->txq.queue_id;
1624 if ((qpi->txq.vsi_id != vsi_id) ||
1625 (qpi->rxq.vsi_id != vsi_id) ||
1626 (qpi->rxq.queue_id != vsi_queue_id) ||
1627 !i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
1628 aq_ret = I40E_ERR_PARAM;
1629 goto error_param;
1630 }
1631
1632 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
1633 &qpi->rxq) ||
1634 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
1635 &qpi->txq)) {
1636 aq_ret = I40E_ERR_PARAM;
1637 goto error_param;
1638 }
1639 }
b40c82e6 1640 /* set vsi num_queue_pairs in use to num configured by VF */
fdf0e0bf 1641 pf->vsi[vf->lan_vsi_idx]->num_queue_pairs = qci->num_queue_pairs;
5c3c48ac
JB		 1642
1643error_param:
b40c82e6 1644 /* send the response to the VF */
5c3c48ac
JB		 1645 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
1646 aq_ret);
1647}
1648
1649/**
1650 * i40e_vc_config_irq_map_msg
b40c82e6 1651 * @vf: pointer to the VF info
5c3c48ac
JB		 1652 * @msg: pointer to the msg buffer
1653 * @msglen: msg length
1654 *
b40c82e6 1655 * called from the VF to configure the irq to
5c3c48ac
JB		 1656 * queue map
1657 **/
1658static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1659{
1660 struct i40e_virtchnl_irq_map_info *irqmap_info =
1661 (struct i40e_virtchnl_irq_map_info *)msg;
1662 struct i40e_virtchnl_vector_map *map;
1663 u16 vsi_id, vsi_queue_id, vector_id;
1664 i40e_status aq_ret = 0;
1665 unsigned long tempmap;
1666 int i;
1667
1668 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1669 aq_ret = I40E_ERR_PARAM;
1670 goto error_param;
1671 }
1672
1673 for (i = 0; i < irqmap_info->num_vectors; i++) {
1674 map = &irqmap_info->vecmap[i];
1675
1676 vector_id = map->vector_id;
1677 vsi_id = map->vsi_id;
1678 /* validate msg params */
1679 if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
1680 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1681 aq_ret = I40E_ERR_PARAM;
1682 goto error_param;
1683 }
1684
1685 /* lookout for the invalid queue index */
1686 tempmap = map->rxq_map;
4836650b 1687 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 1688 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1689 vsi_queue_id)) {
1690 aq_ret = I40E_ERR_PARAM;
1691 goto error_param;
1692 }
5c3c48ac
JB		 1693 }
1694
1695 tempmap = map->txq_map;
4836650b 1696 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 1697 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1698 vsi_queue_id)) {
1699 aq_ret = I40E_ERR_PARAM;
1700 goto error_param;
1701 }
5c3c48ac
JB		 1702 }
1703
1704 i40e_config_irq_link_list(vf, vsi_id, map);
1705 }
1706error_param:
b40c82e6 1707 /* send the response to the VF */
5c3c48ac
JB		 1708 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
1709 aq_ret);
1710}
1711
1712/**
1713 * i40e_vc_enable_queues_msg
b40c82e6 1714 * @vf: pointer to the VF info
5c3c48ac
JB		 1715 * @msg: pointer to the msg buffer
1716 * @msglen: msg length
1717 *
b40c82e6 1718 * called from the VF to enable all or specific queue(s)
5c3c48ac
JB		 1719 **/
1720static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1721{
1722 struct i40e_virtchnl_queue_select *vqs =
1723 (struct i40e_virtchnl_queue_select *)msg;
1724 struct i40e_pf *pf = vf->pf;
1725 u16 vsi_id = vqs->vsi_id;
1726 i40e_status aq_ret = 0;
5c3c48ac
JB		 1727
1728 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1729 aq_ret = I40E_ERR_PARAM;
1730 goto error_param;
1731 }
1732
1733 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1734 aq_ret = I40E_ERR_PARAM;
1735 goto error_param;
1736 }
1737
1738 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1739 aq_ret = I40E_ERR_PARAM;
1740 goto error_param;
1741 }
fdf0e0bf
ASJ		 1742
1743 if (i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], true))
88f6563d 1744 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac 1745error_param:
b40c82e6 1746 /* send the response to the VF */
5c3c48ac
JB		 1747 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
1748 aq_ret);
1749}
1750
1751/**
1752 * i40e_vc_disable_queues_msg
b40c82e6 1753 * @vf: pointer to the VF info
5c3c48ac
JB		 1754 * @msg: pointer to the msg buffer
1755 * @msglen: msg length
1756 *
b40c82e6 1757 * called from the VF to disable all or specific
5c3c48ac
JB		 1758 * queue(s)
1759 **/
1760static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1761{
1762 struct i40e_virtchnl_queue_select *vqs =
1763 (struct i40e_virtchnl_queue_select *)msg;
1764 struct i40e_pf *pf = vf->pf;
5c3c48ac 1765 i40e_status aq_ret = 0;
5c3c48ac
JB		 1766
1767 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1768 aq_ret = I40E_ERR_PARAM;
1769 goto error_param;
1770 }
1771
1772 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1773 aq_ret = I40E_ERR_PARAM;
1774 goto error_param;
1775 }
1776
1777 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1778 aq_ret = I40E_ERR_PARAM;
1779 goto error_param;
1780 }
fdf0e0bf
ASJ		 1781
1782 if (i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], false))
88f6563d 1783 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac
JB		 1784
1785error_param:
b40c82e6 1786 /* send the response to the VF */
5c3c48ac
JB		 1787 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
1788 aq_ret);
1789}
1790
1791/**
1792 * i40e_vc_get_stats_msg
b40c82e6 1793 * @vf: pointer to the VF info
5c3c48ac
JB		 1794 * @msg: pointer to the msg buffer
1795 * @msglen: msg length
1796 *
b40c82e6 1797 * called from the VF to get vsi stats
5c3c48ac
JB		 1798 **/
1799static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1800{
1801 struct i40e_virtchnl_queue_select *vqs =
1802 (struct i40e_virtchnl_queue_select *)msg;
1803 struct i40e_pf *pf = vf->pf;
1804 struct i40e_eth_stats stats;
1805 i40e_status aq_ret = 0;
1806 struct i40e_vsi *vsi;
1807
1808 memset(&stats, 0, sizeof(struct i40e_eth_stats));
1809
1810 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1811 aq_ret = I40E_ERR_PARAM;
1812 goto error_param;
1813 }
1814
1815 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1816 aq_ret = I40E_ERR_PARAM;
1817 goto error_param;
1818 }
1819
fdf0e0bf 1820 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 1821 if (!vsi) {
1822 aq_ret = I40E_ERR_PARAM;
1823 goto error_param;
1824 }
1825 i40e_update_eth_stats(vsi);
5a9769c8 1826 stats = vsi->eth_stats;
5c3c48ac
JB		 1827
1828error_param:
b40c82e6 1829 /* send the response back to the VF */
5c3c48ac
JB		 1830 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS, aq_ret,
1831 (u8 *)&stats, sizeof(stats));
1832}
1833
5f527ba9
ASJ		 1834/* If the VF is not trusted restrict the number of MAC/VLAN it can program */
1835#define I40E_VC_MAX_MAC_ADDR_PER_VF 8
1836#define I40E_VC_MAX_VLAN_PER_VF 8
1837
f657a6e1
GR		 1838/**
1839 * i40e_check_vf_permission
b40c82e6 1840 * @vf: pointer to the VF info
f657a6e1
GR		 1841 * @macaddr: pointer to the MAC Address being checked
1842 *
1843 * Check if the VF has permission to add or delete unicast MAC address
1844 * filters and return error code -EPERM if not. Then check if the
1845 * address filter requested is broadcast or zero and if so return
1846 * an invalid MAC address error code.
1847 **/
1848static inline int i40e_check_vf_permission(struct i40e_vf *vf, u8 *macaddr)
1849{
1850 struct i40e_pf *pf = vf->pf;
1851 int ret = 0;
1852
1853 if (is_broadcast_ether_addr(macaddr) ||
1854 is_zero_ether_addr(macaddr)) {
1855 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n", macaddr);
1856 ret = I40E_ERR_INVALID_MAC_ADDR;
5017c2a8 1857 } else if (vf->pf_set_mac && !is_multicast_ether_addr(macaddr) &&
692fb0a7 1858 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
5017c2a8 1859 !ether_addr_equal(macaddr, vf->default_lan_addr.addr)) {
f657a6e1
GR		 1860 /* If the host VMM administrator has set the VF MAC address
1861 * administratively via the ndo_set_vf_mac command then deny
1862 * permission to the VF to add or delete unicast MAC addresses.
692fb0a7 1863 * Unless the VF is privileged and then it can do whatever.
5017c2a8
GR		 1864 * The VF may request to set the MAC address filter already
1865 * assigned to it so do not return an error in that case.
f657a6e1
GR		 1866 */
1867 dev_err(&pf->pdev->dev,
692fb0a7 1868 "VF attempting to override administratively set MAC address, reload the VF driver to resume normal operation\n");
f657a6e1 1869 ret = -EPERM;
5f527ba9
ASJ		 1870 } else if ((vf->num_mac >= I40E_VC_MAX_MAC_ADDR_PER_VF) &&
1871 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
1872 dev_err(&pf->pdev->dev,
1873 "VF is not trusted, switch the VF to trusted to add more functionality\n");
1874 ret = -EPERM;
f657a6e1
GR		 1875 }
1876 return ret;
1877}
1878
5c3c48ac
JB		 1879/**
1880 * i40e_vc_add_mac_addr_msg
b40c82e6 1881 * @vf: pointer to the VF info
5c3c48ac
JB		 1882 * @msg: pointer to the msg buffer
1883 * @msglen: msg length
1884 *
1885 * add guest mac address filter
1886 **/
1887static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1888{
1889 struct i40e_virtchnl_ether_addr_list *al =
1890 (struct i40e_virtchnl_ether_addr_list *)msg;
1891 struct i40e_pf *pf = vf->pf;
1892 struct i40e_vsi *vsi = NULL;
1893 u16 vsi_id = al->vsi_id;
f657a6e1 1894 i40e_status ret = 0;
5c3c48ac
JB		 1895 int i;
1896
1897 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
5c3c48ac 1898 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 1899 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 1900 goto error_param;
1901 }
1902
1903 for (i = 0; i < al->num_elements; i++) {
f657a6e1
GR		 1904 ret = i40e_check_vf_permission(vf, al->list[i].addr);
1905 if (ret)
5c3c48ac 1906 goto error_param;
5c3c48ac 1907 }
fdf0e0bf 1908 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1909
21659035
KP		 1910 /* Lock once, because all function inside for loop accesses VSI's
1911 * MAC filter list which needs to be protected using same lock.
1912 */
1913 spin_lock_bh(&vsi->mac_filter_list_lock);
1914
5c3c48ac
JB		 1915 /* add new addresses to the list */
1916 for (i = 0; i < al->num_elements; i++) {
1917 struct i40e_mac_filter *f;
1918
1919 f = i40e_find_mac(vsi, al->list[i].addr, true, false);
7e68edf9 1920 if (!f) {
5c3c48ac
JB		 1921 if (i40e_is_vsi_in_vlan(vsi))
1922 f = i40e_put_mac_in_vlan(vsi, al->list[i].addr,
1923 true, false);
1924 else
1925 f = i40e_add_filter(vsi, al->list[i].addr, -1,
1926 true, false);
1927 }
1928
1929 if (!f) {
1930 dev_err(&pf->pdev->dev,
8d8f2295
MW		 1931 "Unable to add MAC filter %pM for VF %d\n",
1932 al->list[i].addr, vf->vf_id);
f657a6e1 1933 ret = I40E_ERR_PARAM;
21659035 1934 spin_unlock_bh(&vsi->mac_filter_list_lock);
5c3c48ac 1935 goto error_param;
5f527ba9
ASJ		 1936 } else {
1937 vf->num_mac++;
5c3c48ac
JB		 1938 }
1939 }
21659035 1940 spin_unlock_bh(&vsi->mac_filter_list_lock);
5c3c48ac
JB		 1941
1942 /* program the updated filter list */
ea02e90b
MW		 1943 ret = i40e_sync_vsi_filters(vsi);
1944 if (ret)
1945 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
1946 vf->vf_id, ret);
5c3c48ac
JB		 1947
1948error_param:
b40c82e6 1949 /* send the response to the VF */
5c3c48ac 1950 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
f657a6e1 1951 ret);
5c3c48ac
JB		 1952}
1953
1954/**
1955 * i40e_vc_del_mac_addr_msg
b40c82e6 1956 * @vf: pointer to the VF info
5c3c48ac
JB		 1957 * @msg: pointer to the msg buffer
1958 * @msglen: msg length
1959 *
1960 * remove guest mac address filter
1961 **/
1962static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1963{
1964 struct i40e_virtchnl_ether_addr_list *al =
1965 (struct i40e_virtchnl_ether_addr_list *)msg;
1966 struct i40e_pf *pf = vf->pf;
1967 struct i40e_vsi *vsi = NULL;
1968 u16 vsi_id = al->vsi_id;
f657a6e1 1969 i40e_status ret = 0;
5c3c48ac
JB		 1970 int i;
1971
1972 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
5c3c48ac 1973 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 1974 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 1975 goto error_param;
1976 }
f657a6e1
GR		 1977
1978 for (i = 0; i < al->num_elements; i++) {
700bbf6c
MW		 1979 if (is_broadcast_ether_addr(al->list[i].addr) ||
1980 is_zero_ether_addr(al->list[i].addr)) {
8d8f2295
MW		 1981 dev_err(&pf->pdev->dev, "Invalid MAC addr %pM for VF %d\n",
1982 al->list[i].addr, vf->vf_id);
700bbf6c 1983 ret = I40E_ERR_INVALID_MAC_ADDR;
f657a6e1 1984 goto error_param;
700bbf6c 1985 }
f657a6e1 1986 }
fdf0e0bf 1987 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1988
21659035 1989 spin_lock_bh(&vsi->mac_filter_list_lock);
5c3c48ac
JB		 1990 /* delete addresses from the list */
1991 for (i = 0; i < al->num_elements; i++)
b36e9ab5
MW		 1992 if (i40e_del_mac_all_vlan(vsi, al->list[i].addr, true, false)) {
1993 ret = I40E_ERR_INVALID_MAC_ADDR;
1994 spin_unlock_bh(&vsi->mac_filter_list_lock);
1995 goto error_param;
5f527ba9
ASJ		 1996 } else {
1997 vf->num_mac--;
b36e9ab5
MW		 1998 }
1999
21659035 2000 spin_unlock_bh(&vsi->mac_filter_list_lock);
5c3c48ac
JB		 2001
2002 /* program the updated filter list */
ea02e90b
MW		 2003 ret = i40e_sync_vsi_filters(vsi);
2004 if (ret)
2005 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2006 vf->vf_id, ret);
5c3c48ac
JB		 2007
2008error_param:
b40c82e6 2009 /* send the response to the VF */
5c3c48ac 2010 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
f657a6e1 2011 ret);
5c3c48ac
JB		 2012}
2013
2014/**
2015 * i40e_vc_add_vlan_msg
b40c82e6 2016 * @vf: pointer to the VF info
5c3c48ac
JB		 2017 * @msg: pointer to the msg buffer
2018 * @msglen: msg length
2019 *
2020 * program guest vlan id
2021 **/
2022static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2023{
2024 struct i40e_virtchnl_vlan_filter_list *vfl =
2025 (struct i40e_virtchnl_vlan_filter_list *)msg;
2026 struct i40e_pf *pf = vf->pf;
2027 struct i40e_vsi *vsi = NULL;
2028 u16 vsi_id = vfl->vsi_id;
2029 i40e_status aq_ret = 0;
2030 int i;
2031
5f527ba9
ASJ		 2032 if ((vf->num_vlan >= I40E_VC_MAX_VLAN_PER_VF) &&
2033 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2034 dev_err(&pf->pdev->dev,
2035 "VF is not trusted, switch the VF to trusted to add more VLAN addresses\n");
2036 goto error_param;
2037 }
5c3c48ac 2038 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2039 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2040 aq_ret = I40E_ERR_PARAM;
2041 goto error_param;
2042 }
2043
2044 for (i = 0; i < vfl->num_elements; i++) {
2045 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2046 aq_ret = I40E_ERR_PARAM;
2047 dev_err(&pf->pdev->dev,
2048 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
2049 goto error_param;
2050 }
2051 }
fdf0e0bf 2052 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2053 if (vsi->info.pvid) {
2054 aq_ret = I40E_ERR_PARAM;
2055 goto error_param;
2056 }
2057
2058 i40e_vlan_stripping_enable(vsi);
2059 for (i = 0; i < vfl->num_elements; i++) {
2060 /* add new VLAN filter */
2061 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
5f527ba9
ASJ		 2062 if (!ret)
2063 vf->num_vlan++;
6995b36c 2064
5676a8b9
ASJ		 2065 if (test_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states))
2066 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2067 true,
2068 vfl->vlan_id[i],
2069 NULL);
2070 if (test_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states))
2071 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2072 true,
2073 vfl->vlan_id[i],
2074 NULL);
2075
5c3c48ac
JB		 2076 if (ret)
2077 dev_err(&pf->pdev->dev,
8d8f2295
MW		 2078 "Unable to add VLAN filter %d for VF %d, error %d\n",
2079 vfl->vlan_id[i], vf->vf_id, ret);
5c3c48ac
JB		 2080 }
2081
2082error_param:
b40c82e6 2083 /* send the response to the VF */
5c3c48ac
JB		 2084 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN, aq_ret);
2085}
2086
2087/**
2088 * i40e_vc_remove_vlan_msg
b40c82e6 2089 * @vf: pointer to the VF info
5c3c48ac
JB		 2090 * @msg: pointer to the msg buffer
2091 * @msglen: msg length
2092 *
2093 * remove programmed guest vlan id
2094 **/
2095static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2096{
2097 struct i40e_virtchnl_vlan_filter_list *vfl =
2098 (struct i40e_virtchnl_vlan_filter_list *)msg;
2099 struct i40e_pf *pf = vf->pf;
2100 struct i40e_vsi *vsi = NULL;
2101 u16 vsi_id = vfl->vsi_id;
2102 i40e_status aq_ret = 0;
2103 int i;
2104
2105 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2106 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2107 aq_ret = I40E_ERR_PARAM;
2108 goto error_param;
2109 }
2110
2111 for (i = 0; i < vfl->num_elements; i++) {
2112 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2113 aq_ret = I40E_ERR_PARAM;
2114 goto error_param;
2115 }
2116 }
2117
fdf0e0bf 2118 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2119 if (vsi->info.pvid) {
2120 aq_ret = I40E_ERR_PARAM;
2121 goto error_param;
2122 }
2123
2124 for (i = 0; i < vfl->num_elements; i++) {
2125 int ret = i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
5f527ba9
ASJ		 2126 if (!ret)
2127 vf->num_vlan--;
6995b36c 2128
5676a8b9
ASJ		 2129 if (test_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states))
2130 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2131 false,
2132 vfl->vlan_id[i],
2133 NULL);
2134 if (test_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states))
2135 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2136 false,
2137 vfl->vlan_id[i],
2138 NULL);
2139
5c3c48ac
JB		 2140 if (ret)
2141 dev_err(&pf->pdev->dev,
8d8f2295
MW		 2142 "Unable to delete VLAN filter %d for VF %d, error %d\n",
2143 vfl->vlan_id[i], vf->vf_id, ret);
5c3c48ac
JB		 2144 }
2145
2146error_param:
b40c82e6 2147 /* send the response to the VF */
5c3c48ac
JB		 2148 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN, aq_ret);
2149}
2150
e3219ce6
ASJ		 2151/**
2152 * i40e_vc_iwarp_msg
2153 * @vf: pointer to the VF info
2154 * @msg: pointer to the msg buffer
2155 * @msglen: msg length
2156 *
2157 * called from the VF for the iwarp msgs
2158 **/
2159static int i40e_vc_iwarp_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2160{
2161 struct i40e_pf *pf = vf->pf;
2162 int abs_vf_id = vf->vf_id + pf->hw.func_caps.vf_base_id;
2163 i40e_status aq_ret = 0;
2164
2165 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
2166 !test_bit(I40E_VF_STAT_IWARPENA, &vf->vf_states)) {
2167 aq_ret = I40E_ERR_PARAM;
2168 goto error_param;
2169 }
2170
2171 i40e_notify_client_of_vf_msg(pf->vsi[pf->lan_vsi], abs_vf_id,
2172 msg, msglen);
2173
2174error_param:
2175 /* send the response to the VF */
2176 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_IWARP,
2177 aq_ret);
2178}
2179
2180/**
2181 * i40e_vc_iwarp_qvmap_msg
2182 * @vf: pointer to the VF info
2183 * @msg: pointer to the msg buffer
2184 * @msglen: msg length
2185 * @config: config qvmap or release it
2186 *
2187 * called from the VF for the iwarp msgs
2188 **/
2189static int i40e_vc_iwarp_qvmap_msg(struct i40e_vf *vf, u8 *msg, u16 msglen,
2190 bool config)
2191{
2192 struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info =
2193 (struct i40e_virtchnl_iwarp_qvlist_info *)msg;
2194 i40e_status aq_ret = 0;
2195
2196 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
2197 !test_bit(I40E_VF_STAT_IWARPENA, &vf->vf_states)) {
2198 aq_ret = I40E_ERR_PARAM;
2199 goto error_param;
2200 }
2201
2202 if (config) {
2203 if (i40e_config_iwarp_qvlist(vf, qvlist_info))
2204 aq_ret = I40E_ERR_PARAM;
2205 } else {
2206 i40e_release_iwarp_qvlist(vf);
2207 }
2208
2209error_param:
2210 /* send the response to the VF */
2211 return i40e_vc_send_resp_to_vf(vf,
2212 config ? I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP :
2213 I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP,
2214 aq_ret);
2215}
2216
c4e1868c
MW		 2217/**
2218 * i40e_vc_config_rss_key
2219 * @vf: pointer to the VF info
2220 * @msg: pointer to the msg buffer
2221 * @msglen: msg length
2222 *
2223 * Configure the VF's RSS key
2224 **/
2225static int i40e_vc_config_rss_key(struct i40e_vf *vf, u8 *msg, u16 msglen)
2226{
2227 struct i40e_virtchnl_rss_key *vrk =
2228 (struct i40e_virtchnl_rss_key *)msg;
2229 struct i40e_pf *pf = vf->pf;
2230 struct i40e_vsi *vsi = NULL;
2231 u16 vsi_id = vrk->vsi_id;
2232 i40e_status aq_ret = 0;
2233
2234 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2235 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2236 (vrk->key_len != I40E_HKEY_ARRAY_SIZE)) {
2237 aq_ret = I40E_ERR_PARAM;
2238 goto err;
2239 }
2240
2241 vsi = pf->vsi[vf->lan_vsi_idx];
2242 aq_ret = i40e_config_rss(vsi, vrk->key, NULL, 0);
2243err:
2244 /* send the response to the VF */
2245 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_RSS_KEY,
2246 aq_ret);
2247}
2248
2249/**
2250 * i40e_vc_config_rss_lut
2251 * @vf: pointer to the VF info
2252 * @msg: pointer to the msg buffer
2253 * @msglen: msg length
2254 *
2255 * Configure the VF's RSS LUT
2256 **/
2257static int i40e_vc_config_rss_lut(struct i40e_vf *vf, u8 *msg, u16 msglen)
2258{
2259 struct i40e_virtchnl_rss_lut *vrl =
2260 (struct i40e_virtchnl_rss_lut *)msg;
2261 struct i40e_pf *pf = vf->pf;
2262 struct i40e_vsi *vsi = NULL;
2263 u16 vsi_id = vrl->vsi_id;
2264 i40e_status aq_ret = 0;
2265
2266 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2267 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2268 (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)) {
2269 aq_ret = I40E_ERR_PARAM;
2270 goto err;
2271 }
2272
2273 vsi = pf->vsi[vf->lan_vsi_idx];
2274 aq_ret = i40e_config_rss(vsi, NULL, vrl->lut, I40E_VF_HLUT_ARRAY_SIZE);
2275 /* send the response to the VF */
2276err:
2277 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_RSS_LUT,
2278 aq_ret);
2279}
2280
2281/**
2282 * i40e_vc_get_rss_hena
2283 * @vf: pointer to the VF info
2284 * @msg: pointer to the msg buffer
2285 * @msglen: msg length
2286 *
2287 * Return the RSS HENA bits allowed by the hardware
2288 **/
2289static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
2290{
2291 struct i40e_virtchnl_rss_hena *vrh = NULL;
2292 struct i40e_pf *pf = vf->pf;
2293 i40e_status aq_ret = 0;
2294 int len = 0;
2295
692fb0a7 2296 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2297 aq_ret = I40E_ERR_PARAM;
2298 goto err;
2299 }
2300 len = sizeof(struct i40e_virtchnl_rss_hena);
2301
2302 vrh = kzalloc(len, GFP_KERNEL);
2303 if (!vrh) {
2304 aq_ret = I40E_ERR_NO_MEMORY;
2305 len = 0;
2306 goto err;
2307 }
2308 vrh->hena = i40e_pf_get_default_rss_hena(pf);
2309err:
2310 /* send the response back to the VF */
2311 aq_ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_RSS_HENA_CAPS,
2312 aq_ret, (u8 *)vrh, len);
2313 return aq_ret;
2314}
2315
2316/**
2317 * i40e_vc_set_rss_hena
2318 * @vf: pointer to the VF info
2319 * @msg: pointer to the msg buffer
2320 * @msglen: msg length
2321 *
2322 * Set the RSS HENA bits for the VF
2323 **/
2324static int i40e_vc_set_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
2325{
2326 struct i40e_virtchnl_rss_hena *vrh =
2327 (struct i40e_virtchnl_rss_hena *)msg;
2328 struct i40e_pf *pf = vf->pf;
2329 struct i40e_hw *hw = &pf->hw;
2330 i40e_status aq_ret = 0;
2331
692fb0a7 2332 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2333 aq_ret = I40E_ERR_PARAM;
2334 goto err;
2335 }
2336 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)vrh->hena);
2337 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_id),
2338 (u32)(vrh->hena >> 32));
2339
2340 /* send the response to the VF */
2341err:
2342 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_SET_RSS_HENA,
2343 aq_ret);
2344}
2345
5c3c48ac
JB		 2346/**
2347 * i40e_vc_validate_vf_msg
b40c82e6 2348 * @vf: pointer to the VF info
5c3c48ac
JB		 2349 * @msg: pointer to the msg buffer
2350 * @msglen: msg length
2351 * @msghndl: msg handle
2352 *
2353 * validate msg
2354 **/
2355static int i40e_vc_validate_vf_msg(struct i40e_vf *vf, u32 v_opcode,
2356 u32 v_retval, u8 *msg, u16 msglen)
2357{
2358 bool err_msg_format = false;
3ed439c5 2359 int valid_len = 0;
5c3c48ac
JB		 2360
2361 /* Check if VF is disabled. */
2362 if (test_bit(I40E_VF_STAT_DISABLED, &vf->vf_states))
2363 return I40E_ERR_PARAM;
2364
2365 /* Validate message length. */
2366 switch (v_opcode) {
2367 case I40E_VIRTCHNL_OP_VERSION:
2368 valid_len = sizeof(struct i40e_virtchnl_version_info);
2369 break;
2370 case I40E_VIRTCHNL_OP_RESET_VF:
5c3c48ac 2371 break;
f4ca1a22
MW		 2372 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
2373 if (VF_IS_V11(vf))
2374 valid_len = sizeof(u32);
f4ca1a22 2375 break;
5c3c48ac
JB		 2376 case I40E_VIRTCHNL_OP_CONFIG_TX_QUEUE:
2377 valid_len = sizeof(struct i40e_virtchnl_txq_info);
2378 break;
2379 case I40E_VIRTCHNL_OP_CONFIG_RX_QUEUE:
2380 valid_len = sizeof(struct i40e_virtchnl_rxq_info);
2381 break;
2382 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
2383 valid_len = sizeof(struct i40e_virtchnl_vsi_queue_config_info);
2384 if (msglen >= valid_len) {
2385 struct i40e_virtchnl_vsi_queue_config_info *vqc =
2386 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
2387 valid_len += (vqc->num_queue_pairs *
2388 sizeof(struct
2389 i40e_virtchnl_queue_pair_info));
2390 if (vqc->num_queue_pairs == 0)
2391 err_msg_format = true;
2392 }
2393 break;
2394 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
2395 valid_len = sizeof(struct i40e_virtchnl_irq_map_info);
2396 if (msglen >= valid_len) {
2397 struct i40e_virtchnl_irq_map_info *vimi =
2398 (struct i40e_virtchnl_irq_map_info *)msg;
2399 valid_len += (vimi->num_vectors *
2400 sizeof(struct i40e_virtchnl_vector_map));
2401 if (vimi->num_vectors == 0)
2402 err_msg_format = true;
2403 }
2404 break;
2405 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
2406 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
2407 valid_len = sizeof(struct i40e_virtchnl_queue_select);
2408 break;
2409 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
2410 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
2411 valid_len = sizeof(struct i40e_virtchnl_ether_addr_list);
2412 if (msglen >= valid_len) {
2413 struct i40e_virtchnl_ether_addr_list *veal =
2414 (struct i40e_virtchnl_ether_addr_list *)msg;
2415 valid_len += veal->num_elements *
2416 sizeof(struct i40e_virtchnl_ether_addr);
2417 if (veal->num_elements == 0)
2418 err_msg_format = true;
2419 }
2420 break;
2421 case I40E_VIRTCHNL_OP_ADD_VLAN:
2422 case I40E_VIRTCHNL_OP_DEL_VLAN:
2423 valid_len = sizeof(struct i40e_virtchnl_vlan_filter_list);
2424 if (msglen >= valid_len) {
2425 struct i40e_virtchnl_vlan_filter_list *vfl =
2426 (struct i40e_virtchnl_vlan_filter_list *)msg;
2427 valid_len += vfl->num_elements * sizeof(u16);
2428 if (vfl->num_elements == 0)
2429 err_msg_format = true;
2430 }
2431 break;
2432 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
2433 valid_len = sizeof(struct i40e_virtchnl_promisc_info);
2434 break;
2435 case I40E_VIRTCHNL_OP_GET_STATS:
2436 valid_len = sizeof(struct i40e_virtchnl_queue_select);
2437 break;
e3219ce6
ASJ		 2438 case I40E_VIRTCHNL_OP_IWARP:
2439 /* These messages are opaque to us and will be validated in
2440 * the RDMA client code. We just need to check for nonzero
2441 * length. The firmware will enforce max length restrictions.
2442 */
2443 if (msglen)
2444 valid_len = msglen;
2445 else
2446 err_msg_format = true;
2447 break;
2448 case I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
2449 valid_len = 0;
2450 break;
2451 case I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
2452 valid_len = sizeof(struct i40e_virtchnl_iwarp_qvlist_info);
2453 if (msglen >= valid_len) {
2454 struct i40e_virtchnl_iwarp_qvlist_info *qv =
2455 (struct i40e_virtchnl_iwarp_qvlist_info *)msg;
2456 if (qv->num_vectors == 0) {
2457 err_msg_format = true;
2458 break;
2459 }
2460 valid_len += ((qv->num_vectors - 1) *
2461 sizeof(struct i40e_virtchnl_iwarp_qv_info));
2462 }
2463 break;
c4e1868c
MW		 2464 case I40E_VIRTCHNL_OP_CONFIG_RSS_KEY:
2465 valid_len = sizeof(struct i40e_virtchnl_rss_key);
2466 if (msglen >= valid_len) {
2467 struct i40e_virtchnl_rss_key *vrk =
2468 (struct i40e_virtchnl_rss_key *)msg;
2469 if (vrk->key_len != I40E_HKEY_ARRAY_SIZE) {
2470 err_msg_format = true;
2471 break;
2472 }
2473 valid_len += vrk->key_len - 1;
2474 }
2475 break;
2476 case I40E_VIRTCHNL_OP_CONFIG_RSS_LUT:
2477 valid_len = sizeof(struct i40e_virtchnl_rss_lut);
2478 if (msglen >= valid_len) {
2479 struct i40e_virtchnl_rss_lut *vrl =
2480 (struct i40e_virtchnl_rss_lut *)msg;
2481 if (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE) {
2482 err_msg_format = true;
2483 break;
2484 }
2485 valid_len += vrl->lut_entries - 1;
2486 }
2487 break;
2488 case I40E_VIRTCHNL_OP_GET_RSS_HENA_CAPS:
c4e1868c
MW		 2489 break;
2490 case I40E_VIRTCHNL_OP_SET_RSS_HENA:
2491 valid_len = sizeof(struct i40e_virtchnl_rss_hena);
2492 break;
5c3c48ac
JB		 2493 /* These are always errors coming from the VF. */
2494 case I40E_VIRTCHNL_OP_EVENT:
2495 case I40E_VIRTCHNL_OP_UNKNOWN:
2496 default:
2497 return -EPERM;
5c3c48ac
JB		 2498 }
2499 /* few more checks */
2500 if ((valid_len != msglen) || (err_msg_format)) {
2501 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
2502 return -EINVAL;
2503 } else {
2504 return 0;
2505 }
2506}
2507
2508/**
2509 * i40e_vc_process_vf_msg
b40c82e6
JK		 2510 * @pf: pointer to the PF structure
2511 * @vf_id: source VF id
5c3c48ac
JB		 2512 * @msg: pointer to the msg buffer
2513 * @msglen: msg length
2514 * @msghndl: msg handle
2515 *
2516 * called from the common aeq/arq handler to
b40c82e6 2517 * process request from VF
5c3c48ac
JB		 2518 **/
2519int i40e_vc_process_vf_msg(struct i40e_pf *pf, u16 vf_id, u32 v_opcode,
2520 u32 v_retval, u8 *msg, u16 msglen)
2521{
5c3c48ac 2522 struct i40e_hw *hw = &pf->hw;
c243e963 2523 unsigned int local_vf_id = vf_id - hw->func_caps.vf_base_id;
6c1b5bff 2524 struct i40e_vf *vf;
5c3c48ac
JB		 2525 int ret;
2526
2527 pf->vf_aq_requests++;
7efa84b7 2528 if (local_vf_id >= pf->num_alloc_vfs)
6c1b5bff 2529 return -EINVAL;
7efa84b7 2530 vf = &(pf->vf[local_vf_id]);
5c3c48ac
JB		 2531 /* perform basic checks on the msg */
2532 ret = i40e_vc_validate_vf_msg(vf, v_opcode, v_retval, msg, msglen);
2533
2534 if (ret) {
b40c82e6 2535 dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n",
7efa84b7 2536 local_vf_id, v_opcode, msglen);
5c3c48ac
JB		 2537 return ret;
2538 }
bae3cae4 2539
5c3c48ac
JB		 2540 switch (v_opcode) {
2541 case I40E_VIRTCHNL_OP_VERSION:
f4ca1a22 2542 ret = i40e_vc_get_version_msg(vf, msg);
5c3c48ac
JB		 2543 break;
2544 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
f4ca1a22 2545 ret = i40e_vc_get_vf_resources_msg(vf, msg);
5c3c48ac
JB		 2546 break;
2547 case I40E_VIRTCHNL_OP_RESET_VF:
fc18eaa0
MW		 2548 i40e_vc_reset_vf_msg(vf);
2549 ret = 0;
5c3c48ac
JB		 2550 break;
2551 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
2552 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen);
2553 break;
2554 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
2555 ret = i40e_vc_config_queues_msg(vf, msg, msglen);
2556 break;
2557 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
2558 ret = i40e_vc_config_irq_map_msg(vf, msg, msglen);
2559 break;
2560 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
2561 ret = i40e_vc_enable_queues_msg(vf, msg, msglen);
055b295d 2562 i40e_vc_notify_vf_link_state(vf);
5c3c48ac
JB		 2563 break;
2564 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
2565 ret = i40e_vc_disable_queues_msg(vf, msg, msglen);
2566 break;
2567 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
2568 ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen);
2569 break;
2570 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
2571 ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen);
2572 break;
2573 case I40E_VIRTCHNL_OP_ADD_VLAN:
2574 ret = i40e_vc_add_vlan_msg(vf, msg, msglen);
2575 break;
2576 case I40E_VIRTCHNL_OP_DEL_VLAN:
2577 ret = i40e_vc_remove_vlan_msg(vf, msg, msglen);
2578 break;
2579 case I40E_VIRTCHNL_OP_GET_STATS:
2580 ret = i40e_vc_get_stats_msg(vf, msg, msglen);
2581 break;
e3219ce6
ASJ		 2582 case I40E_VIRTCHNL_OP_IWARP:
2583 ret = i40e_vc_iwarp_msg(vf, msg, msglen);
2584 break;
2585 case I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
2586 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, true);
2587 break;
2588 case I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
2589 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, false);
2590 break;
c4e1868c
MW		 2591 case I40E_VIRTCHNL_OP_CONFIG_RSS_KEY:
2592 ret = i40e_vc_config_rss_key(vf, msg, msglen);
2593 break;
2594 case I40E_VIRTCHNL_OP_CONFIG_RSS_LUT:
2595 ret = i40e_vc_config_rss_lut(vf, msg, msglen);
2596 break;
2597 case I40E_VIRTCHNL_OP_GET_RSS_HENA_CAPS:
2598 ret = i40e_vc_get_rss_hena(vf, msg, msglen);
2599 break;
2600 case I40E_VIRTCHNL_OP_SET_RSS_HENA:
2601 ret = i40e_vc_set_rss_hena(vf, msg, msglen);
2602 break;
2603
5c3c48ac
JB		 2604 case I40E_VIRTCHNL_OP_UNKNOWN:
2605 default:
b40c82e6 2606 dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n",
7efa84b7 2607 v_opcode, local_vf_id);
5c3c48ac
JB		 2608 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
2609 I40E_ERR_NOT_IMPLEMENTED);
2610 break;
2611 }
2612
2613 return ret;
2614}
2615
2616/**
2617 * i40e_vc_process_vflr_event
b40c82e6 2618 * @pf: pointer to the PF structure
5c3c48ac
JB		 2619 *
2620 * called from the vlfr irq handler to
b40c82e6 2621 * free up VF resources and state variables
5c3c48ac
JB		 2622 **/
2623int i40e_vc_process_vflr_event(struct i40e_pf *pf)
2624{
2625 u32 reg, reg_idx, bit_idx, vf_id;
2626 struct i40e_hw *hw = &pf->hw;
2627 struct i40e_vf *vf;
2628
2629 if (!test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
2630 return 0;
2631
0d790327
MW		 2632 /* Re-enable the VFLR interrupt cause here, before looking for which
2633 * VF got reset. Otherwise, if another VF gets a reset while the
2634 * first one is being processed, that interrupt will be lost, and
2635 * that VF will be stuck in reset forever.
2636 */
c5c2f7c3
MW		 2637 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
2638 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
2639 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
2640 i40e_flush(hw);
2641
5c3c48ac
JB		 2642 clear_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
2643 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
2644 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
2645 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
b40c82e6 2646 /* read GLGEN_VFLRSTAT register to find out the flr VFs */
5c3c48ac
JB		 2647 vf = &pf->vf[vf_id];
2648 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
7369ca87 2649 if (reg & BIT(bit_idx))
7e5a313e 2650 /* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */
7369ca87 2651 i40e_reset_vf(vf, true);
5c3c48ac
JB		 2652 }
2653
5c3c48ac
JB		 2654 return 0;
2655}
2656
5c3c48ac
JB		 2657/**
2658 * i40e_ndo_set_vf_mac
2659 * @netdev: network interface device structure
b40c82e6 2660 * @vf_id: VF identifier
5c3c48ac
JB		 2661 * @mac: mac address
2662 *
b40c82e6 2663 * program VF mac address
5c3c48ac
JB		 2664 **/
2665int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
2666{
2667 struct i40e_netdev_priv *np = netdev_priv(netdev);
2668 struct i40e_vsi *vsi = np->vsi;
2669 struct i40e_pf *pf = vsi->back;
2670 struct i40e_mac_filter *f;
2671 struct i40e_vf *vf;
2672 int ret = 0;
2673
2674 /* validate the request */
2675 if (vf_id >= pf->num_alloc_vfs) {
2676 dev_err(&pf->pdev->dev,
2677 "Invalid VF Identifier %d\n", vf_id);
2678 ret = -EINVAL;
2679 goto error_param;
2680 }
2681
2682 vf = &(pf->vf[vf_id]);
fdf0e0bf 2683 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2684 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2d166c30
MW		 2685 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2686 vf_id);
2687 ret = -EAGAIN;
5c3c48ac
JB		 2688 goto error_param;
2689 }
2690
efd8e39a 2691 if (is_multicast_ether_addr(mac)) {
5c3c48ac 2692 dev_err(&pf->pdev->dev,
efd8e39a 2693 "Invalid Ethernet address %pM for VF %d\n", mac, vf_id);
5c3c48ac
JB		 2694 ret = -EINVAL;
2695 goto error_param;
2696 }
2697
21659035
KP		 2698 /* Lock once because below invoked function add/del_filter requires
2699 * mac_filter_list_lock to be held
2700 */
2701 spin_lock_bh(&vsi->mac_filter_list_lock);
2702
5c3c48ac 2703 /* delete the temporary mac address */
efd8e39a
MW		 2704 if (!is_zero_ether_addr(vf->default_lan_addr.addr))
2705 i40e_del_filter(vsi, vf->default_lan_addr.addr,
2706 vf->port_vlan_id ? vf->port_vlan_id : -1,
2707 true, false);
5c3c48ac 2708
29f71bb0
GR		 2709 /* Delete all the filters for this VSI - we're going to kill it
2710 * anyway.
2711 */
2712 list_for_each_entry(f, &vsi->mac_filter_list, list)
2713 i40e_del_filter(vsi, f->macaddr, f->vlan, true, false);
5c3c48ac 2714
21659035
KP		 2715 spin_unlock_bh(&vsi->mac_filter_list_lock);
2716
5c3c48ac
JB		 2717 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n", mac, vf_id);
2718 /* program mac filter */
17652c63 2719 if (i40e_sync_vsi_filters(vsi)) {
5c3c48ac
JB		 2720 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
2721 ret = -EIO;
2722 goto error_param;
2723 }
9a173901 2724 ether_addr_copy(vf->default_lan_addr.addr, mac);
f657a6e1 2725 vf->pf_set_mac = true;
17413a80
GR		 2726 /* Force the VF driver stop so it has to reload with new MAC address */
2727 i40e_vc_disable_vf(pf, vf);
5c3c48ac 2728 dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n");
5c3c48ac
JB		 2729
2730error_param:
2731 return ret;
2732}
2733
2734/**
2735 * i40e_ndo_set_vf_port_vlan
2736 * @netdev: network interface device structure
b40c82e6 2737 * @vf_id: VF identifier
5c3c48ac
JB		 2738 * @vlan_id: mac address
2739 * @qos: priority setting
2740 *
b40c82e6 2741 * program VF vlan id and/or qos
5c3c48ac
JB		 2742 **/
2743int i40e_ndo_set_vf_port_vlan(struct net_device *netdev,
2744 int vf_id, u16 vlan_id, u8 qos)
2745{
f7fc2f2e 2746 u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT);
5c3c48ac
JB		 2747 struct i40e_netdev_priv *np = netdev_priv(netdev);
2748 struct i40e_pf *pf = np->vsi->back;
21659035 2749 bool is_vsi_in_vlan = false;
5c3c48ac
JB		 2750 struct i40e_vsi *vsi;
2751 struct i40e_vf *vf;
2752 int ret = 0;
2753
2754 /* validate the request */
2755 if (vf_id >= pf->num_alloc_vfs) {
2756 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2757 ret = -EINVAL;
2758 goto error_pvid;
2759 }
2760
2761 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
2762 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
2763 ret = -EINVAL;
2764 goto error_pvid;
2765 }
2766
2767 vf = &(pf->vf[vf_id]);
fdf0e0bf 2768 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2769 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2d166c30
MW		 2770 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2771 vf_id);
2772 ret = -EAGAIN;
5c3c48ac
JB		 2773 goto error_pvid;
2774 }
2775
f7fc2f2e 2776 if (le16_to_cpu(vsi->info.pvid) == vlanprio)
85927ec1
MW		 2777 /* duplicate request, so just return success */
2778 goto error_pvid;
2779
21659035
KP		 2780 spin_lock_bh(&vsi->mac_filter_list_lock);
2781 is_vsi_in_vlan = i40e_is_vsi_in_vlan(vsi);
2782 spin_unlock_bh(&vsi->mac_filter_list_lock);
2783
2784 if (le16_to_cpu(vsi->info.pvid) == 0 && is_vsi_in_vlan) {
99a4973c
GR		 2785 dev_err(&pf->pdev->dev,
2786 "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
2787 vf_id);
f9b4b627
GR		 2788 /* Administrator Error - knock the VF offline until he does
2789 * the right thing by reconfiguring his network correctly
2790 * and then reloading the VF driver.
2791 */
2792 i40e_vc_disable_vf(pf, vf);
35f3472a
MW		 2793 /* During reset the VF got a new VSI, so refresh the pointer. */
2794 vsi = pf->vsi[vf->lan_vsi_idx];
f9b4b627 2795 }
99a4973c 2796
8d82a7c5
GR		 2797 /* Check for condition where there was already a port VLAN ID
2798 * filter set and now it is being deleted by setting it to zero.
1315f7c3
GR		 2799 * Additionally check for the condition where there was a port
2800 * VLAN but now there is a new and different port VLAN being set.
8d82a7c5
GR		 2801 * Before deleting all the old VLAN filters we must add new ones
2802 * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our
2803 * MAC addresses deleted.
2804 */
1315f7c3 2805 if ((!(vlan_id || qos) ||
f7fc2f2e 2806 vlanprio != le16_to_cpu(vsi->info.pvid)) &&
1315f7c3 2807 vsi->info.pvid)
8d82a7c5
GR		 2808 ret = i40e_vsi_add_vlan(vsi, I40E_VLAN_ANY);
2809
5c3c48ac
JB		 2810 if (vsi->info.pvid) {
2811 /* kill old VLAN */
2812 ret = i40e_vsi_kill_vlan(vsi, (le16_to_cpu(vsi->info.pvid) &
2813 VLAN_VID_MASK));
2814 if (ret) {
2815 dev_info(&vsi->back->pdev->dev,
2816 "remove VLAN failed, ret=%d, aq_err=%d\n",
2817 ret, pf->hw.aq.asq_last_status);
2818 }
2819 }
2820 if (vlan_id || qos)
f7fc2f2e 2821 ret = i40e_vsi_add_pvid(vsi, vlanprio);
5c3c48ac 2822 else
6c12fcbf 2823 i40e_vsi_remove_pvid(vsi);
5c3c48ac
JB		 2824
2825 if (vlan_id) {
2826 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
2827 vlan_id, qos, vf_id);
2828
2829 /* add new VLAN filter */
2830 ret = i40e_vsi_add_vlan(vsi, vlan_id);
2831 if (ret) {
2832 dev_info(&vsi->back->pdev->dev,
2833 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
2834 vsi->back->hw.aq.asq_last_status);
2835 goto error_pvid;
2836 }
8d82a7c5
GR		 2837 /* Kill non-vlan MAC filters - ignore error return since
2838 * there might not be any non-vlan MAC filters.
2839 */
2840 i40e_vsi_kill_vlan(vsi, I40E_VLAN_ANY);
5c3c48ac
JB		 2841 }
2842
2843 if (ret) {
2844 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
2845 goto error_pvid;
2846 }
6c12fcbf
GR		 2847 /* The Port VLAN needs to be saved across resets the same as the
2848 * default LAN MAC address.
2849 */
2850 vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
5c3c48ac
JB		 2851 ret = 0;
2852
2853error_pvid:
2854 return ret;
2855}
2856
84590fd9
MW		 2857#define I40E_BW_CREDIT_DIVISOR 50 /* 50Mbps per BW credit */
2858#define I40E_MAX_BW_INACTIVE_ACCUM 4 /* device can accumulate 4 credits max */
5c3c48ac
JB		 2859/**
2860 * i40e_ndo_set_vf_bw
2861 * @netdev: network interface device structure
b40c82e6
JK		 2862 * @vf_id: VF identifier
2863 * @tx_rate: Tx rate
5c3c48ac 2864 *
b40c82e6 2865 * configure VF Tx rate
5c3c48ac 2866 **/
ed616689
SC		 2867int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
2868 int max_tx_rate)
5c3c48ac 2869{
6b192891
MW		 2870 struct i40e_netdev_priv *np = netdev_priv(netdev);
2871 struct i40e_pf *pf = np->vsi->back;
2872 struct i40e_vsi *vsi;
2873 struct i40e_vf *vf;
2874 int speed = 0;
2875 int ret = 0;
2876
2877 /* validate the request */
2878 if (vf_id >= pf->num_alloc_vfs) {
2879 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d.\n", vf_id);
2880 ret = -EINVAL;
2881 goto error;
2882 }
2883
ed616689 2884 if (min_tx_rate) {
b40c82e6 2885 dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n",
ed616689
SC		 2886 min_tx_rate, vf_id);
2887 return -EINVAL;
2888 }
2889
6b192891 2890 vf = &(pf->vf[vf_id]);
fdf0e0bf 2891 vsi = pf->vsi[vf->lan_vsi_idx];
6b192891 2892 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2d166c30
MW		 2893 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2894 vf_id);
2895 ret = -EAGAIN;
6b192891
MW		 2896 goto error;
2897 }
2898
2899 switch (pf->hw.phy.link_info.link_speed) {
2900 case I40E_LINK_SPEED_40GB:
2901 speed = 40000;
2902 break;
07f169c3
MW		 2903 case I40E_LINK_SPEED_20GB:
2904 speed = 20000;
2905 break;
6b192891
MW		 2906 case I40E_LINK_SPEED_10GB:
2907 speed = 10000;
2908 break;
2909 case I40E_LINK_SPEED_1GB:
2910 speed = 1000;
2911 break;
2912 default:
2913 break;
2914 }
2915
ed616689 2916 if (max_tx_rate > speed) {
b40c82e6 2917 dev_err(&pf->pdev->dev, "Invalid max tx rate %d specified for VF %d.",
ed616689 2918 max_tx_rate, vf->vf_id);
6b192891
MW		 2919 ret = -EINVAL;
2920 goto error;
2921 }
2922
dac9b31a
MW		 2923 if ((max_tx_rate < 50) && (max_tx_rate > 0)) {
2924 dev_warn(&pf->pdev->dev, "Setting max Tx rate to minimum usable value of 50Mbps.\n");
2925 max_tx_rate = 50;
2926 }
2927
6b192891 2928 /* Tx rate credits are in values of 50Mbps, 0 is disabled*/
84590fd9
MW		 2929 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
2930 max_tx_rate / I40E_BW_CREDIT_DIVISOR,
2931 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
6b192891 2932 if (ret) {
ed616689 2933 dev_err(&pf->pdev->dev, "Unable to set max tx rate, error code %d.\n",
6b192891
MW		 2934 ret);
2935 ret = -EIO;
2936 goto error;
2937 }
ed616689 2938 vf->tx_rate = max_tx_rate;
6b192891
MW		 2939error:
2940 return ret;
5c3c48ac
JB		 2941}
2942
2943/**
2944 * i40e_ndo_get_vf_config
2945 * @netdev: network interface device structure
b40c82e6
JK		 2946 * @vf_id: VF identifier
2947 * @ivi: VF configuration structure
5c3c48ac 2948 *
b40c82e6 2949 * return VF configuration
5c3c48ac
JB		 2950 **/
2951int i40e_ndo_get_vf_config(struct net_device *netdev,
2952 int vf_id, struct ifla_vf_info *ivi)
2953{
2954 struct i40e_netdev_priv *np = netdev_priv(netdev);
5c3c48ac
JB		 2955 struct i40e_vsi *vsi = np->vsi;
2956 struct i40e_pf *pf = vsi->back;
2957 struct i40e_vf *vf;
2958 int ret = 0;
2959
2960 /* validate the request */
2961 if (vf_id >= pf->num_alloc_vfs) {
2962 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2963 ret = -EINVAL;
2964 goto error_param;
2965 }
2966
2967 vf = &(pf->vf[vf_id]);
2968 /* first vsi is always the LAN vsi */
fdf0e0bf 2969 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2970 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2d166c30
MW		 2971 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2972 vf_id);
2973 ret = -EAGAIN;
5c3c48ac
JB		 2974 goto error_param;
2975 }
2976
2977 ivi->vf = vf_id;
2978
6995b36c 2979 ether_addr_copy(ivi->mac, vf->default_lan_addr.addr);
5c3c48ac 2980
ed616689
SC		 2981 ivi->max_tx_rate = vf->tx_rate;
2982 ivi->min_tx_rate = 0;
5c3c48ac
JB		 2983 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
2984 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
2985 I40E_VLAN_PRIORITY_SHIFT;
84ca55a0
MW		 2986 if (vf->link_forced == false)
2987 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
2988 else if (vf->link_up == true)
2989 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
2990 else
2991 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
c674d125 2992 ivi->spoofchk = vf->spoofchk;
5c3c48ac
JB		 2993 ret = 0;
2994
2995error_param:
2996 return ret;
2997}
588aefa0
MW		 2998
2999/**
3000 * i40e_ndo_set_vf_link_state
3001 * @netdev: network interface device structure
b40c82e6 3002 * @vf_id: VF identifier
588aefa0
MW		 3003 * @link: required link state
3004 *
3005 * Set the link state of a specified VF, regardless of physical link state
3006 **/
3007int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
3008{
3009 struct i40e_netdev_priv *np = netdev_priv(netdev);
3010 struct i40e_pf *pf = np->vsi->back;
3011 struct i40e_virtchnl_pf_event pfe;
3012 struct i40e_hw *hw = &pf->hw;
3013 struct i40e_vf *vf;
f19efbb5 3014 int abs_vf_id;
588aefa0
MW		 3015 int ret = 0;
3016
3017 /* validate the request */
3018 if (vf_id >= pf->num_alloc_vfs) {
3019 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3020 ret = -EINVAL;
3021 goto error_out;
3022 }
3023
3024 vf = &pf->vf[vf_id];
f19efbb5 3025 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
588aefa0
MW		 3026
3027 pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
3028 pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
3029
3030 switch (link) {
3031 case IFLA_VF_LINK_STATE_AUTO:
3032 vf->link_forced = false;
3033 pfe.event_data.link_event.link_status =
3034 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
3035 pfe.event_data.link_event.link_speed =
3036 pf->hw.phy.link_info.link_speed;
3037 break;
3038 case IFLA_VF_LINK_STATE_ENABLE:
3039 vf->link_forced = true;
3040 vf->link_up = true;
3041 pfe.event_data.link_event.link_status = true;
3042 pfe.event_data.link_event.link_speed = I40E_LINK_SPEED_40GB;
3043 break;
3044 case IFLA_VF_LINK_STATE_DISABLE:
3045 vf->link_forced = true;
3046 vf->link_up = false;
3047 pfe.event_data.link_event.link_status = false;
3048 pfe.event_data.link_event.link_speed = 0;
3049 break;
3050 default:
3051 ret = -EINVAL;
3052 goto error_out;
3053 }
3054 /* Notify the VF of its new link state */
f19efbb5 3055 i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
588aefa0
MW		 3056 0, (u8 *)&pfe, sizeof(pfe), NULL);
3057
3058error_out:
3059 return ret;
3060}
c674d125
MW		 3061
3062/**
3063 * i40e_ndo_set_vf_spoofchk
3064 * @netdev: network interface device structure
b40c82e6 3065 * @vf_id: VF identifier
c674d125
MW		 3066 * @enable: flag to enable or disable feature
3067 *
3068 * Enable or disable VF spoof checking
3069 **/
e6d9004d 3070int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable)
c674d125
MW		 3071{
3072 struct i40e_netdev_priv *np = netdev_priv(netdev);
3073 struct i40e_vsi *vsi = np->vsi;
3074 struct i40e_pf *pf = vsi->back;
3075 struct i40e_vsi_context ctxt;
3076 struct i40e_hw *hw = &pf->hw;
3077 struct i40e_vf *vf;
3078 int ret = 0;
3079
3080 /* validate the request */
3081 if (vf_id >= pf->num_alloc_vfs) {
3082 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3083 ret = -EINVAL;
3084 goto out;
3085 }
3086
3087 vf = &(pf->vf[vf_id]);
2d166c30
MW		 3088 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
3089 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3090 vf_id);
3091 ret = -EAGAIN;
3092 goto out;
3093 }
c674d125
MW		 3094
3095 if (enable == vf->spoofchk)
3096 goto out;
3097
3098 vf->spoofchk = enable;
3099 memset(&ctxt, 0, sizeof(ctxt));
fdf0e0bf 3100 ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid;
c674d125
MW		 3101 ctxt.pf_num = pf->hw.pf_id;
3102 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
3103 if (enable)
30d71af5
GR		 3104 ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
3105 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
c674d125
MW		 3106 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
3107 if (ret) {
3108 dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
3109 ret);
3110 ret = -EIO;
3111 }
3112out:
3113 return ret;
3114}
c3bbbd20
ASJ		 3115
3116/**
3117 * i40e_ndo_set_vf_trust
3118 * @netdev: network interface device structure of the pf
3119 * @vf_id: VF identifier
3120 * @setting: trust setting
3121 *
3122 * Enable or disable VF trust setting
3123 **/
3124int i40e_ndo_set_vf_trust(struct net_device *netdev, int vf_id, bool setting)
3125{
3126 struct i40e_netdev_priv *np = netdev_priv(netdev);
3127 struct i40e_pf *pf = np->vsi->back;
3128 struct i40e_vf *vf;
3129 int ret = 0;
3130
3131 /* validate the request */
3132 if (vf_id >= pf->num_alloc_vfs) {
3133 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3134 return -EINVAL;
3135 }
3136
3137 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3138 dev_err(&pf->pdev->dev, "Trusted VF not supported in MFP mode.\n");
3139 return -EINVAL;
3140 }
3141
3142 vf = &pf->vf[vf_id];
3143
3144 if (!vf)
3145 return -EINVAL;
3146 if (setting == vf->trusted)
3147 goto out;
3148
3149 vf->trusted = setting;
3150 i40e_vc_notify_vf_reset(vf);
3151 i40e_reset_vf(vf, false);
3152 dev_info(&pf->pdev->dev, "VF %u is now %strusted\n",
3153 vf_id, setting ? "" : "un");
3154out:
3155 return ret;
3156}
Linux 6.x block layer and io_uring tree(s)