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hsr: avoid newline at end of message in NL_SET_ERR_MSG_MOD
[linux-2.6-block.git] / drivers / net / ethernet / intel / i40e / i40e_virtchnl_pf.c
CommitLineData
ae06c70b 1// SPDX-License-Identifier: GPL-2.0
51dce24b 2/* Copyright(c) 2013 - 2018 Intel Corporation. */
5c3c48ac
JB		 3
4#include "i40e.h"
5
532b0455
MW		 6/*********************notification routines***********************/
7
8/**
9 * i40e_vc_vf_broadcast
10 * @pf: pointer to the PF structure
f5254429
JK		 11 * @v_opcode: operation code
12 * @v_retval: return value
532b0455
MW		 13 * @msg: pointer to the msg buffer
14 * @msglen: msg length
15 *
16 * send a message to all VFs on a given PF
17 **/
18static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
310a2ad9 19 enum virtchnl_ops v_opcode,
532b0455
MW		 20 i40e_status v_retval, u8 *msg,
21 u16 msglen)
22{
23 struct i40e_hw *hw = &pf->hw;
24 struct i40e_vf *vf = pf->vf;
25 int i;
26
27 for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
a1b5a24f 28 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455 29 /* Not all vfs are enabled so skip the ones that are not */
6322e63c
JK		 30 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
31 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 32 continue;
33
34 /* Ignore return value on purpose - a given VF may fail, but
35 * we need to keep going and send to all of them
36 */
37 i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
38 msg, msglen, NULL);
39 }
40}
41
42/**
55f7d723 43 * i40e_vc_notify_vf_link_state
532b0455
MW		 44 * @vf: pointer to the VF structure
45 *
46 * send a link status message to a single VF
47 **/
48static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf)
49{
310a2ad9 50 struct virtchnl_pf_event pfe;
532b0455
MW		 51 struct i40e_pf *pf = vf->pf;
52 struct i40e_hw *hw = &pf->hw;
53 struct i40e_link_status *ls = &pf->hw.phy.link_info;
a1b5a24f 54 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455 55
310a2ad9 56 pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
ff3f4cc2 57 pfe.severity = PF_EVENT_SEVERITY_INFO;
2ad1274f
JK		 58
59 /* Always report link is down if the VF queues aren't enabled */
60 if (!vf->queues_enabled) {
61 pfe.event_data.link_event.link_status = false;
62 pfe.event_data.link_event.link_speed = 0;
63 } else if (vf->link_forced) {
532b0455
MW		 64 pfe.event_data.link_event.link_status = vf->link_up;
65 pfe.event_data.link_event.link_speed =
5b643479 66 (vf->link_up ? VIRTCHNL_LINK_SPEED_40GB : 0);
532b0455
MW		 67 } else {
68 pfe.event_data.link_event.link_status =
69 ls->link_info & I40E_AQ_LINK_UP;
ff3f4cc2 70 pfe.event_data.link_event.link_speed =
5b643479 71 i40e_virtchnl_link_speed(ls->link_speed);
532b0455 72 }
2ad1274f 73
310a2ad9 74 i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
532b0455
MW		 75 0, (u8 *)&pfe, sizeof(pfe), NULL);
76}
77
78/**
79 * i40e_vc_notify_link_state
80 * @pf: pointer to the PF structure
81 *
82 * send a link status message to all VFs on a given PF
83 **/
84void i40e_vc_notify_link_state(struct i40e_pf *pf)
85{
86 int i;
87
88 for (i = 0; i < pf->num_alloc_vfs; i++)
89 i40e_vc_notify_vf_link_state(&pf->vf[i]);
90}
91
92/**
93 * i40e_vc_notify_reset
94 * @pf: pointer to the PF structure
95 *
96 * indicate a pending reset to all VFs on a given PF
97 **/
98void i40e_vc_notify_reset(struct i40e_pf *pf)
99{
310a2ad9 100 struct virtchnl_pf_event pfe;
532b0455 101
310a2ad9 102 pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
ff3f4cc2 103 pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
310a2ad9
JB		 104 i40e_vc_vf_broadcast(pf, VIRTCHNL_OP_EVENT, 0,
105 (u8 *)&pfe, sizeof(struct virtchnl_pf_event));
532b0455
MW		 106}
107
108/**
109 * i40e_vc_notify_vf_reset
110 * @vf: pointer to the VF structure
111 *
112 * indicate a pending reset to the given VF
113 **/
114void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
115{
310a2ad9 116 struct virtchnl_pf_event pfe;
532b0455
MW		 117 int abs_vf_id;
118
119 /* validate the request */
120 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
121 return;
122
123 /* verify if the VF is in either init or active before proceeding */
6322e63c
JK		 124 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
125 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 126 return;
127
a1b5a24f 128 abs_vf_id = vf->vf_id + (int)vf->pf->hw.func_caps.vf_base_id;
532b0455 129
310a2ad9 130 pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
ff3f4cc2 131 pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
310a2ad9 132 i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, VIRTCHNL_OP_EVENT,
532b0455 133 0, (u8 *)&pfe,
310a2ad9 134 sizeof(struct virtchnl_pf_event), NULL);
532b0455 135}
5c3c48ac
JB		 136/***********************misc routines*****************************/
137
f9b4b627
GR		 138/**
139 * i40e_vc_disable_vf
b40c82e6 140 * @vf: pointer to the VF info
f9b4b627 141 *
d43d60e5 142 * Disable the VF through a SW reset.
f9b4b627 143 **/
eeeddbb8 144static inline void i40e_vc_disable_vf(struct i40e_vf *vf)
f9b4b627 145{
d43d60e5
JK		 146 int i;
147
54f455ee 148 i40e_vc_notify_vf_reset(vf);
d43d60e5
JK		 149
150 /* We want to ensure that an actual reset occurs initiated after this
151 * function was called. However, we do not want to wait forever, so
152 * we'll give a reasonable time and print a message if we failed to
153 * ensure a reset.
154 */
155 for (i = 0; i < 20; i++) {
156 if (i40e_reset_vf(vf, false))
157 return;
158 usleep_range(10000, 20000);
159 }
160
161 dev_warn(&vf->pf->pdev->dev,
162 "Failed to initiate reset for VF %d after 200 milliseconds\n",
163 vf->vf_id);
f9b4b627
GR		 164}
165
5c3c48ac
JB		 166/**
167 * i40e_vc_isvalid_vsi_id
b40c82e6
JK		 168 * @vf: pointer to the VF info
169 * @vsi_id: VF relative VSI id
5c3c48ac 170 *
b40c82e6 171 * check for the valid VSI id
5c3c48ac 172 **/
fdf0e0bf 173static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id)
5c3c48ac
JB		 174{
175 struct i40e_pf *pf = vf->pf;
fdf0e0bf 176 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 177
fdf0e0bf 178 return (vsi && (vsi->vf_id == vf->vf_id));
5c3c48ac
JB		 179}
180
181/**
182 * i40e_vc_isvalid_queue_id
b40c82e6 183 * @vf: pointer to the VF info
5c3c48ac
JB		 184 * @vsi_id: vsi id
185 * @qid: vsi relative queue id
186 *
187 * check for the valid queue id
188 **/
fdf0e0bf 189static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id,
24474f27 190 u16 qid)
5c3c48ac
JB		 191{
192 struct i40e_pf *pf = vf->pf;
fdf0e0bf 193 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 194
fdf0e0bf 195 return (vsi && (qid < vsi->alloc_queue_pairs));
5c3c48ac
JB		 196}
197
198/**
199 * i40e_vc_isvalid_vector_id
b40c82e6
JK		 200 * @vf: pointer to the VF info
201 * @vector_id: VF relative vector id
5c3c48ac
JB		 202 *
203 * check for the valid vector id
204 **/
c004804d 205static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u32 vector_id)
5c3c48ac
JB		 206{
207 struct i40e_pf *pf = vf->pf;
208
9347eb77 209 return vector_id < pf->hw.func_caps.num_msix_vectors_vf;
5c3c48ac
JB		 210}
211
212/***********************vf resource mgmt routines*****************/
213
214/**
215 * i40e_vc_get_pf_queue_id
b40c82e6 216 * @vf: pointer to the VF info
fdf0e0bf 217 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 218 * @vsi_queue_id: vsi relative queue id
219 *
b40c82e6 220 * return PF relative queue id
5c3c48ac 221 **/
fdf0e0bf 222static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 223 u8 vsi_queue_id)
224{
225 struct i40e_pf *pf = vf->pf;
fdf0e0bf 226 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac
JB		 227 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
228
fdf0e0bf
ASJ		 229 if (!vsi)
230 return pf_queue_id;
231
5c3c48ac
JB		 232 if (le16_to_cpu(vsi->info.mapping_flags) &
233 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
234 pf_queue_id =
235 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
236 else
237 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
238 vsi_queue_id;
239
240 return pf_queue_id;
241}
242
c27eac48
AD		 243/**
244 * i40e_get_real_pf_qid
245 * @vf: pointer to the VF info
246 * @vsi_id: vsi id
247 * @queue_id: queue number
248 *
249 * wrapper function to get pf_queue_id handling ADq code as well
250 **/
251static u16 i40e_get_real_pf_qid(struct i40e_vf *vf, u16 vsi_id, u16 queue_id)
252{
253 int i;
254
255 if (vf->adq_enabled) {
256 /* Although VF considers all the queues(can be 1 to 16) as its
257 * own but they may actually belong to different VSIs(up to 4).
258 * We need to find which queues belongs to which VSI.
259 */
260 for (i = 0; i < vf->num_tc; i++) {
261 if (queue_id < vf->ch[i].num_qps) {
262 vsi_id = vf->ch[i].vsi_id;
263 break;
264 }
265 /* find right queue id which is relative to a
266 * given VSI.
267 */
268 queue_id -= vf->ch[i].num_qps;
269 }
270 }
271
272 return i40e_vc_get_pf_queue_id(vf, vsi_id, queue_id);
273}
274
5c3c48ac
JB		 275/**
276 * i40e_config_irq_link_list
b40c82e6 277 * @vf: pointer to the VF info
fdf0e0bf 278 * @vsi_id: id of VSI as given by the FW
5c3c48ac
JB		 279 * @vecmap: irq map info
280 *
281 * configure irq link list from the map
282 **/
fdf0e0bf 283static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
310a2ad9 284 struct virtchnl_vector_map *vecmap)
5c3c48ac
JB		 285{
286 unsigned long linklistmap = 0, tempmap;
287 struct i40e_pf *pf = vf->pf;
288 struct i40e_hw *hw = &pf->hw;
289 u16 vsi_queue_id, pf_queue_id;
290 enum i40e_queue_type qtype;
9bcc07f0 291 u16 next_q, vector_id, size;
5c3c48ac
JB		 292 u32 reg, reg_idx;
293 u16 itr_idx = 0;
294
295 vector_id = vecmap->vector_id;
296 /* setup the head */
297 if (0 == vector_id)
298 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
299 else
300 reg_idx = I40E_VPINT_LNKLSTN(
9347eb77
MW		 301 ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) +
302 (vector_id - 1));
5c3c48ac
JB		 303
304 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
305 /* Special case - No queues mapped on this vector */
306 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
307 goto irq_list_done;
308 }
309 tempmap = vecmap->rxq_map;
4836650b 310 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 311 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
312 vsi_queue_id));
5c3c48ac
JB		 313 }
314
315 tempmap = vecmap->txq_map;
4836650b 316 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 317 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
318 vsi_queue_id + 1));
5c3c48ac
JB		 319 }
320
9bcc07f0
LY		 321 size = I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES;
322 next_q = find_first_bit(&linklistmap, size);
323 if (unlikely(next_q == size))
b861fb76
LY		 324 goto irq_list_done;
325
b82bc49e
MW		 326 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
327 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
c27eac48 328 pf_queue_id = i40e_get_real_pf_qid(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 329 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
330
331 wr32(hw, reg_idx, reg);
332
9bcc07f0 333 while (next_q < size) {
5c3c48ac
JB		 334 switch (qtype) {
335 case I40E_QUEUE_TYPE_RX:
336 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
337 itr_idx = vecmap->rxitr_idx;
338 break;
339 case I40E_QUEUE_TYPE_TX:
340 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
341 itr_idx = vecmap->txitr_idx;
342 break;
343 default:
344 break;
345 }
346
9bcc07f0
LY		 347 next_q = find_next_bit(&linklistmap, size, next_q + 1);
348 if (next_q < size) {
5c3c48ac
JB		 349 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
350 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
c27eac48
AD		 351 pf_queue_id = i40e_get_real_pf_qid(vf,
352 vsi_id,
353 vsi_queue_id);
5c3c48ac
JB		 354 } else {
355 pf_queue_id = I40E_QUEUE_END_OF_LIST;
356 qtype = 0;
357 }
358
359 /* format for the RQCTL & TQCTL regs is same */
360 reg = (vector_id) |
361 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
362 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
41a1d04b 363 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
5c3c48ac
JB		 364 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
365 wr32(hw, reg_idx, reg);
366 }
367
b8262a6d
ASJ		 368 /* if the vf is running in polling mode and using interrupt zero,
369 * need to disable auto-mask on enabling zero interrupt for VFs.
370 */
310a2ad9 371 if ((vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
b8262a6d
ASJ		 372 (vector_id == 0)) {
373 reg = rd32(hw, I40E_GLINT_CTL);
374 if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
375 reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
376 wr32(hw, I40E_GLINT_CTL, reg);
377 }
378 }
379
5c3c48ac
JB		 380irq_list_done:
381 i40e_flush(hw);
382}
383
e3219ce6
ASJ		 384/**
385 * i40e_release_iwarp_qvlist
386 * @vf: pointer to the VF.
387 *
388 **/
389static void i40e_release_iwarp_qvlist(struct i40e_vf *vf)
390{
391 struct i40e_pf *pf = vf->pf;
310a2ad9 392 struct virtchnl_iwarp_qvlist_info *qvlist_info = vf->qvlist_info;
e3219ce6
ASJ		 393 u32 msix_vf;
394 u32 i;
395
396 if (!vf->qvlist_info)
397 return;
398
399 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
400 for (i = 0; i < qvlist_info->num_vectors; i++) {
310a2ad9 401 struct virtchnl_iwarp_qv_info *qv_info;
e3219ce6
ASJ		 402 u32 next_q_index, next_q_type;
403 struct i40e_hw *hw = &pf->hw;
404 u32 v_idx, reg_idx, reg;
405
406 qv_info = &qvlist_info->qv_info[i];
407 if (!qv_info)
408 continue;
409 v_idx = qv_info->v_idx;
410 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
411 /* Figure out the queue after CEQ and make that the
412 * first queue.
413 */
414 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
415 reg = rd32(hw, I40E_VPINT_CEQCTL(reg_idx));
416 next_q_index = (reg & I40E_VPINT_CEQCTL_NEXTQ_INDX_MASK)
417 >> I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT;
418 next_q_type = (reg & I40E_VPINT_CEQCTL_NEXTQ_TYPE_MASK)
419 >> I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT;
420
421 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
422 reg = (next_q_index &
423 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
424 (next_q_type <<
425 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
426
427 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
428 }
429 }
430 kfree(vf->qvlist_info);
431 vf->qvlist_info = NULL;
432}
433
434/**
435 * i40e_config_iwarp_qvlist
436 * @vf: pointer to the VF info
437 * @qvlist_info: queue and vector list
438 *
439 * Return 0 on success or < 0 on error
440 **/
441static int i40e_config_iwarp_qvlist(struct i40e_vf *vf,
310a2ad9 442 struct virtchnl_iwarp_qvlist_info *qvlist_info)
e3219ce6
ASJ		 443{
444 struct i40e_pf *pf = vf->pf;
445 struct i40e_hw *hw = &pf->hw;
310a2ad9 446 struct virtchnl_iwarp_qv_info *qv_info;
e3219ce6
ASJ		 447 u32 v_idx, i, reg_idx, reg;
448 u32 next_q_idx, next_q_type;
fae6cad1 449 u32 msix_vf;
0b636446 450 int ret = 0;
e3219ce6 451
7015ca3d
SN		 452 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
453
454 if (qvlist_info->num_vectors > msix_vf) {
455 dev_warn(&pf->pdev->dev,
456 "Incorrect number of iwarp vectors %u. Maximum %u allowed.\n",
457 qvlist_info->num_vectors,
458 msix_vf);
0b636446
MS		 459 ret = -EINVAL;
460 goto err_out;
7015ca3d
SN		 461 }
462
0b636446 463 kfree(vf->qvlist_info);
fae6cad1
GS		 464 vf->qvlist_info = kzalloc(struct_size(vf->qvlist_info, qv_info,
465 qvlist_info->num_vectors - 1),
466 GFP_KERNEL);
0b636446
MS		 467 if (!vf->qvlist_info) {
468 ret = -ENOMEM;
469 goto err_out;
470 }
e3219ce6
ASJ		 471 vf->qvlist_info->num_vectors = qvlist_info->num_vectors;
472
473 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
474 for (i = 0; i < qvlist_info->num_vectors; i++) {
475 qv_info = &qvlist_info->qv_info[i];
476 if (!qv_info)
477 continue;
e3219ce6
ASJ		 478
479 /* Validate vector id belongs to this vf */
d510497b 480 if (!i40e_vc_isvalid_vector_id(vf, qv_info->v_idx)) {
0b636446
MS		 481 ret = -EINVAL;
482 goto err_free;
483 }
e3219ce6 484
d510497b
SN		 485 v_idx = qv_info->v_idx;
486
e3219ce6
ASJ		 487 vf->qvlist_info->qv_info[i] = *qv_info;
488
489 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
490 /* We might be sharing the interrupt, so get the first queue
491 * index and type, push it down the list by adding the new
492 * queue on top. Also link it with the new queue in CEQCTL.
493 */
494 reg = rd32(hw, I40E_VPINT_LNKLSTN(reg_idx));
495 next_q_idx = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) >>
496 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT);
497 next_q_type = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK) >>
498 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
499
500 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
501 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
502 reg = (I40E_VPINT_CEQCTL_CAUSE_ENA_MASK |
503 (v_idx << I40E_VPINT_CEQCTL_MSIX_INDX_SHIFT) |
504 (qv_info->itr_idx << I40E_VPINT_CEQCTL_ITR_INDX_SHIFT) |
505 (next_q_type << I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT) |
506 (next_q_idx << I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT));
507 wr32(hw, I40E_VPINT_CEQCTL(reg_idx), reg);
508
509 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
510 reg = (qv_info->ceq_idx &
511 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
512 (I40E_QUEUE_TYPE_PE_CEQ <<
513 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
514 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
515 }
516
517 if (qv_info->aeq_idx != I40E_QUEUE_INVALID_IDX) {
518 reg = (I40E_VPINT_AEQCTL_CAUSE_ENA_MASK |
519 (v_idx << I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT) |
520 (qv_info->itr_idx << I40E_VPINT_AEQCTL_ITR_INDX_SHIFT));
521
522 wr32(hw, I40E_VPINT_AEQCTL(vf->vf_id), reg);
523 }
524 }
525
526 return 0;
0b636446 527err_free:
e3219ce6
ASJ		 528 kfree(vf->qvlist_info);
529 vf->qvlist_info = NULL;
0b636446
MS		 530err_out:
531 return ret;
e3219ce6
ASJ		 532}
533
5c3c48ac
JB		 534/**
535 * i40e_config_vsi_tx_queue
b40c82e6 536 * @vf: pointer to the VF info
fdf0e0bf 537 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 538 * @vsi_queue_id: vsi relative queue index
539 * @info: config. info
540 *
541 * configure tx queue
542 **/
fdf0e0bf 543static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac 544 u16 vsi_queue_id,
310a2ad9 545 struct virtchnl_txq_info *info)
5c3c48ac
JB		 546{
547 struct i40e_pf *pf = vf->pf;
548 struct i40e_hw *hw = &pf->hw;
549 struct i40e_hmc_obj_txq tx_ctx;
fdf0e0bf 550 struct i40e_vsi *vsi;
5c3c48ac
JB		 551 u16 pf_queue_id;
552 u32 qtx_ctl;
553 int ret = 0;
554
d4a0658d
CW		 555 if (!i40e_vc_isvalid_vsi_id(vf, info->vsi_id)) {
556 ret = -ENOENT;
557 goto error_context;
558 }
fdf0e0bf
ASJ		 559 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
560 vsi = i40e_find_vsi_from_id(pf, vsi_id);
d4a0658d
CW		 561 if (!vsi) {
562 ret = -ENOENT;
563 goto error_context;
564 }
5c3c48ac
JB		 565
566 /* clear the context structure first */
567 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
568
569 /* only set the required fields */
570 tx_ctx.base = info->dma_ring_addr / 128;
571 tx_ctx.qlen = info->ring_len;
fdf0e0bf 572 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
5c3c48ac 573 tx_ctx.rdylist_act = 0;
5d29896a
AS		 574 tx_ctx.head_wb_ena = info->headwb_enabled;
575 tx_ctx.head_wb_addr = info->dma_headwb_addr;
5c3c48ac
JB		 576
577 /* clear the context in the HMC */
578 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
579 if (ret) {
580 dev_err(&pf->pdev->dev,
581 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
582 pf_queue_id, ret);
583 ret = -ENOENT;
584 goto error_context;
585 }
586
587 /* set the context in the HMC */
588 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
589 if (ret) {
590 dev_err(&pf->pdev->dev,
591 "Failed to set VF LAN Tx queue context %d error: %d\n",
592 pf_queue_id, ret);
593 ret = -ENOENT;
594 goto error_context;
595 }
596
597 /* associate this queue with the PCI VF function */
598 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
13fd9774 599 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
5c3c48ac
JB		 600 & I40E_QTX_CTL_PF_INDX_MASK);
601 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
602 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
603 & I40E_QTX_CTL_VFVM_INDX_MASK);
604 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
605 i40e_flush(hw);
606
607error_context:
608 return ret;
609}
610
611/**
612 * i40e_config_vsi_rx_queue
b40c82e6 613 * @vf: pointer to the VF info
fdf0e0bf 614 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 615 * @vsi_queue_id: vsi relative queue index
616 * @info: config. info
617 *
618 * configure rx queue
619 **/
fdf0e0bf 620static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac 621 u16 vsi_queue_id,
310a2ad9 622 struct virtchnl_rxq_info *info)
5c3c48ac
JB		 623{
624 struct i40e_pf *pf = vf->pf;
625 struct i40e_hw *hw = &pf->hw;
626 struct i40e_hmc_obj_rxq rx_ctx;
627 u16 pf_queue_id;
628 int ret = 0;
629
fdf0e0bf 630 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 631
632 /* clear the context structure first */
633 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
634
635 /* only set the required fields */
636 rx_ctx.base = info->dma_ring_addr / 128;
637 rx_ctx.qlen = info->ring_len;
638
639 if (info->splithdr_enabled) {
640 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
641 I40E_RX_SPLIT_IP |
642 I40E_RX_SPLIT_TCP_UDP |
643 I40E_RX_SPLIT_SCTP;
644 /* header length validation */
645 if (info->hdr_size > ((2 * 1024) - 64)) {
646 ret = -EINVAL;
647 goto error_param;
648 }
649 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
650
19b85e67 651 /* set split mode 10b */
d6b3bca1 652 rx_ctx.dtype = I40E_RX_DTYPE_HEADER_SPLIT;
5c3c48ac
JB		 653 }
654
655 /* databuffer length validation */
656 if (info->databuffer_size > ((16 * 1024) - 128)) {
657 ret = -EINVAL;
658 goto error_param;
659 }
660 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
661
662 /* max pkt. length validation */
663 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
664 ret = -EINVAL;
665 goto error_param;
666 }
667 rx_ctx.rxmax = info->max_pkt_size;
668
669 /* enable 32bytes desc always */
670 rx_ctx.dsize = 1;
671
672 /* default values */
7362be9e 673 rx_ctx.lrxqthresh = 1;
5c3c48ac 674 rx_ctx.crcstrip = 1;
50d41659 675 rx_ctx.prefena = 1;
c1d11cef 676 rx_ctx.l2tsel = 1;
5c3c48ac
JB		 677
678 /* clear the context in the HMC */
679 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
680 if (ret) {
681 dev_err(&pf->pdev->dev,
682 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
683 pf_queue_id, ret);
684 ret = -ENOENT;
685 goto error_param;
686 }
687
688 /* set the context in the HMC */
689 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
690 if (ret) {
691 dev_err(&pf->pdev->dev,
692 "Failed to set VF LAN Rx queue context %d error: %d\n",
693 pf_queue_id, ret);
694 ret = -ENOENT;
695 goto error_param;
696 }
697
698error_param:
699 return ret;
700}
701
702/**
703 * i40e_alloc_vsi_res
b40c82e6 704 * @vf: pointer to the VF info
c27eac48 705 * @idx: VSI index, applies only for ADq mode, zero otherwise
5c3c48ac 706 *
b40c82e6 707 * alloc VF vsi context & resources
5c3c48ac 708 **/
c27eac48 709static int i40e_alloc_vsi_res(struct i40e_vf *vf, u8 idx)
5c3c48ac
JB		 710{
711 struct i40e_mac_filter *f = NULL;
712 struct i40e_pf *pf = vf->pf;
5c3c48ac 713 struct i40e_vsi *vsi;
0c483bd4 714 u64 max_tx_rate = 0;
5c3c48ac
JB		 715 int ret = 0;
716
c27eac48
AD		 717 vsi = i40e_vsi_setup(pf, I40E_VSI_SRIOV, pf->vsi[pf->lan_vsi]->seid,
718 vf->vf_id);
5c3c48ac
JB		 719
720 if (!vsi) {
721 dev_err(&pf->pdev->dev,
b40c82e6 722 "add vsi failed for VF %d, aq_err %d\n",
5c3c48ac
JB		 723 vf->vf_id, pf->hw.aq.asq_last_status);
724 ret = -ENOENT;
725 goto error_alloc_vsi_res;
726 }
c27eac48
AD		 727
728 if (!idx) {
bb360717 729 u64 hena = i40e_pf_get_default_rss_hena(pf);
435c084a 730 u8 broadcast[ETH_ALEN];
bb360717 731
fdf0e0bf 732 vf->lan_vsi_idx = vsi->idx;
5c3c48ac 733 vf->lan_vsi_id = vsi->id;
6c12fcbf
GR		 734 /* If the port VLAN has been configured and then the
735 * VF driver was removed then the VSI port VLAN
736 * configuration was destroyed. Check if there is
737 * a port VLAN and restore the VSI configuration if
738 * needed.
739 */
740 if (vf->port_vlan_id)
741 i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
21659035 742
278e7d0b 743 spin_lock_bh(&vsi->mac_filter_hash_lock);
b7b713a8 744 if (is_valid_ether_addr(vf->default_lan_addr.addr)) {
9569a9a4
JK		 745 f = i40e_add_mac_filter(vsi,
746 vf->default_lan_addr.addr);
b7b713a8
MW		 747 if (!f)
748 dev_info(&pf->pdev->dev,
749 "Could not add MAC filter %pM for VF %d\n",
750 vf->default_lan_addr.addr, vf->vf_id);
751 }
435c084a 752 eth_broadcast_addr(broadcast);
9569a9a4 753 f = i40e_add_mac_filter(vsi, broadcast);
435c084a
JK		 754 if (!f)
755 dev_info(&pf->pdev->dev,
756 "Could not allocate VF broadcast filter\n");
278e7d0b 757 spin_unlock_bh(&vsi->mac_filter_hash_lock);
26f77e53
LY		 758 wr32(&pf->hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)hena);
759 wr32(&pf->hw, I40E_VFQF_HENA1(1, vf->vf_id), (u32)(hena >> 32));
c27eac48
AD		 760 /* program mac filter only for VF VSI */
761 ret = i40e_sync_vsi_filters(vsi);
762 if (ret)
763 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
5c3c48ac 764 }
6dbbbfb2 765
c27eac48
AD		 766 /* storing VSI index and id for ADq and don't apply the mac filter */
767 if (vf->adq_enabled) {
768 vf->ch[idx].vsi_idx = vsi->idx;
769 vf->ch[idx].vsi_id = vsi->id;
770 }
5c3c48ac 771
6b192891
MW		 772 /* Set VF bandwidth if specified */
773 if (vf->tx_rate) {
0c483bd4
AD		 774 max_tx_rate = vf->tx_rate;
775 } else if (vf->ch[idx].max_tx_rate) {
776 max_tx_rate = vf->ch[idx].max_tx_rate;
777 }
778
779 if (max_tx_rate) {
780 max_tx_rate = div_u64(max_tx_rate, I40E_BW_CREDIT_DIVISOR);
6b192891 781 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
0c483bd4 782 max_tx_rate, 0, NULL);
6b192891
MW		 783 if (ret)
784 dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
785 vf->vf_id, ret);
786 }
787
5c3c48ac
JB		 788error_alloc_vsi_res:
789 return ret;
790}
791
c27eac48
AD		 792/**
793 * i40e_map_pf_queues_to_vsi
794 * @vf: pointer to the VF info
795 *
796 * PF maps LQPs to a VF by programming VSILAN_QTABLE & VPLAN_QTABLE. This
797 * function takes care of first part VSILAN_QTABLE, mapping pf queues to VSI.
798 **/
799static void i40e_map_pf_queues_to_vsi(struct i40e_vf *vf)
800{
801 struct i40e_pf *pf = vf->pf;
802 struct i40e_hw *hw = &pf->hw;
803 u32 reg, num_tc = 1; /* VF has at least one traffic class */
804 u16 vsi_id, qps;
805 int i, j;
806
807 if (vf->adq_enabled)
808 num_tc = vf->num_tc;
809
810 for (i = 0; i < num_tc; i++) {
811 if (vf->adq_enabled) {
812 qps = vf->ch[i].num_qps;
813 vsi_id = vf->ch[i].vsi_id;
814 } else {
815 qps = pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
816 vsi_id = vf->lan_vsi_id;
817 }
818
819 for (j = 0; j < 7; j++) {
820 if (j * 2 >= qps) {
821 /* end of list */
822 reg = 0x07FF07FF;
823 } else {
824 u16 qid = i40e_vc_get_pf_queue_id(vf,
825 vsi_id,
826 j * 2);
827 reg = qid;
828 qid = i40e_vc_get_pf_queue_id(vf, vsi_id,
829 (j * 2) + 1);
830 reg |= qid << 16;
831 }
832 i40e_write_rx_ctl(hw,
833 I40E_VSILAN_QTABLE(j, vsi_id),
834 reg);
835 }
836 }
837}
838
839/**
840 * i40e_map_pf_to_vf_queues
841 * @vf: pointer to the VF info
842 *
843 * PF maps LQPs to a VF by programming VSILAN_QTABLE & VPLAN_QTABLE. This
844 * function takes care of the second part VPLAN_QTABLE & completes VF mappings.
845 **/
846static void i40e_map_pf_to_vf_queues(struct i40e_vf *vf)
847{
848 struct i40e_pf *pf = vf->pf;
849 struct i40e_hw *hw = &pf->hw;
850 u32 reg, total_qps = 0;
851 u32 qps, num_tc = 1; /* VF has at least one traffic class */
852 u16 vsi_id, qid;
853 int i, j;
854
855 if (vf->adq_enabled)
856 num_tc = vf->num_tc;
857
858 for (i = 0; i < num_tc; i++) {
859 if (vf->adq_enabled) {
860 qps = vf->ch[i].num_qps;
861 vsi_id = vf->ch[i].vsi_id;
862 } else {
863 qps = pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
864 vsi_id = vf->lan_vsi_id;
865 }
866
867 for (j = 0; j < qps; j++) {
868 qid = i40e_vc_get_pf_queue_id(vf, vsi_id, j);
869
870 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
871 wr32(hw, I40E_VPLAN_QTABLE(total_qps, vf->vf_id),
872 reg);
873 total_qps++;
874 }
875 }
876}
877
805bd5bd
MW		 878/**
879 * i40e_enable_vf_mappings
b40c82e6 880 * @vf: pointer to the VF info
805bd5bd 881 *
b40c82e6 882 * enable VF mappings
805bd5bd
MW		 883 **/
884static void i40e_enable_vf_mappings(struct i40e_vf *vf)
885{
886 struct i40e_pf *pf = vf->pf;
887 struct i40e_hw *hw = &pf->hw;
c27eac48 888 u32 reg;
805bd5bd
MW		 889
890 /* Tell the hardware we're using noncontiguous mapping. HW requires
891 * that VF queues be mapped using this method, even when they are
892 * contiguous in real life
893 */
272cdaf2
SN		 894 i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
895 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
805bd5bd
MW		 896
897 /* enable VF vplan_qtable mappings */
898 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
899 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
900
c27eac48
AD		 901 i40e_map_pf_to_vf_queues(vf);
902 i40e_map_pf_queues_to_vsi(vf);
805bd5bd
MW		 903
904 i40e_flush(hw);
905}
906
907/**
908 * i40e_disable_vf_mappings
b40c82e6 909 * @vf: pointer to the VF info
805bd5bd 910 *
b40c82e6 911 * disable VF mappings
805bd5bd
MW		 912 **/
913static void i40e_disable_vf_mappings(struct i40e_vf *vf)
914{
915 struct i40e_pf *pf = vf->pf;
916 struct i40e_hw *hw = &pf->hw;
917 int i;
918
919 /* disable qp mappings */
920 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
921 for (i = 0; i < I40E_MAX_VSI_QP; i++)
922 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
923 I40E_QUEUE_END_OF_LIST);
924 i40e_flush(hw);
925}
926
927/**
928 * i40e_free_vf_res
b40c82e6 929 * @vf: pointer to the VF info
805bd5bd 930 *
b40c82e6 931 * free VF resources
805bd5bd
MW		 932 **/
933static void i40e_free_vf_res(struct i40e_vf *vf)
934{
935 struct i40e_pf *pf = vf->pf;
fc18eaa0
MW		 936 struct i40e_hw *hw = &pf->hw;
937 u32 reg_idx, reg;
c27eac48 938 int i, j, msix_vf;
805bd5bd 939
beff3e9d
RK		 940 /* Start by disabling VF's configuration API to prevent the OS from
941 * accessing the VF's VSI after it's freed / invalidated.
942 */
6322e63c 943 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 944
a3f5aa90
AB		 945 /* It's possible the VF had requeuested more queues than the default so
946 * do the accounting here when we're about to free them.
947 */
948 if (vf->num_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF) {
949 pf->queues_left += vf->num_queue_pairs -
950 I40E_DEFAULT_QUEUES_PER_VF;
951 }
952
805bd5bd 953 /* free vsi & disconnect it from the parent uplink */
fdf0e0bf
ASJ		 954 if (vf->lan_vsi_idx) {
955 i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]);
956 vf->lan_vsi_idx = 0;
805bd5bd
MW		 957 vf->lan_vsi_id = 0;
958 }
c27eac48
AD		 959
960 /* do the accounting and remove additional ADq VSI's */
961 if (vf->adq_enabled && vf->ch[0].vsi_idx) {
962 for (j = 0; j < vf->num_tc; j++) {
963 /* At this point VSI0 is already released so don't
964 * release it again and only clear their values in
965 * structure variables
966 */
967 if (j)
968 i40e_vsi_release(pf->vsi[vf->ch[j].vsi_idx]);
969 vf->ch[j].vsi_idx = 0;
970 vf->ch[j].vsi_id = 0;
971 }
972 }
9347eb77
MW		 973 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
974
fc18eaa0
MW		 975 /* disable interrupts so the VF starts in a known state */
976 for (i = 0; i < msix_vf; i++) {
977 /* format is same for both registers */
978 if (0 == i)
979 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
980 else
981 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
982 (vf->vf_id))
983 + (i - 1));
984 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
985 i40e_flush(hw);
986 }
805bd5bd 987
fc18eaa0
MW		 988 /* clear the irq settings */
989 for (i = 0; i < msix_vf; i++) {
990 /* format is same for both registers */
991 if (0 == i)
992 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
993 else
994 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
995 (vf->vf_id))
996 + (i - 1));
997 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
998 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
999 wr32(hw, reg_idx, reg);
1000 i40e_flush(hw);
1001 }
b564d62e 1002 /* reset some of the state variables keeping track of the resources */
805bd5bd 1003 vf->num_queue_pairs = 0;
41d0a4d0
AB		 1004 clear_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
1005 clear_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
805bd5bd
MW		 1006}
1007
1008/**
1009 * i40e_alloc_vf_res
b40c82e6 1010 * @vf: pointer to the VF info
805bd5bd 1011 *
b40c82e6 1012 * allocate VF resources
805bd5bd
MW		 1013 **/
1014static int i40e_alloc_vf_res(struct i40e_vf *vf)
1015{
1016 struct i40e_pf *pf = vf->pf;
1017 int total_queue_pairs = 0;
c27eac48 1018 int ret, idx;
805bd5bd 1019
a3f5aa90
AB		 1020 if (vf->num_req_queues &&
1021 vf->num_req_queues <= pf->queues_left + I40E_DEFAULT_QUEUES_PER_VF)
1022 pf->num_vf_qps = vf->num_req_queues;
1023 else
1024 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
1025
805bd5bd 1026 /* allocate hw vsi context & associated resources */
c27eac48 1027 ret = i40e_alloc_vsi_res(vf, 0);
805bd5bd
MW		 1028 if (ret)
1029 goto error_alloc;
fdf0e0bf 1030 total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
692fb0a7 1031
c27eac48
AD		 1032 /* allocate additional VSIs based on tc information for ADq */
1033 if (vf->adq_enabled) {
1034 if (pf->queues_left >=
1035 (I40E_MAX_VF_QUEUES - I40E_DEFAULT_QUEUES_PER_VF)) {
1036 /* TC 0 always belongs to VF VSI */
1037 for (idx = 1; idx < vf->num_tc; idx++) {
1038 ret = i40e_alloc_vsi_res(vf, idx);
1039 if (ret)
1040 goto error_alloc;
1041 }
1042 /* send correct number of queues */
1043 total_queue_pairs = I40E_MAX_VF_QUEUES;
1044 } else {
1045 dev_info(&pf->pdev->dev, "VF %d: Not enough queues to allocate, disabling ADq\n",
1046 vf->vf_id);
1047 vf->adq_enabled = false;
1048 }
1049 }
1050
a3f5aa90
AB		 1051 /* We account for each VF to get a default number of queue pairs. If
1052 * the VF has now requested more, we need to account for that to make
1053 * certain we never request more queues than we actually have left in
1054 * HW.
1055 */
1056 if (total_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF)
1057 pf->queues_left -=
1058 total_queue_pairs - I40E_DEFAULT_QUEUES_PER_VF;
1059
692fb0a7
ASJ		 1060 if (vf->trusted)
1061 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
1062 else
1063 clear_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
805bd5bd
MW		 1064
1065 /* store the total qps number for the runtime
b40c82e6 1066 * VF req validation
805bd5bd
MW		 1067 */
1068 vf->num_queue_pairs = total_queue_pairs;
1069
b40c82e6 1070 /* VF is now completely initialized */
6322e63c 1071 set_bit(I40E_VF_STATE_INIT, &vf->vf_states);
805bd5bd
MW		 1072
1073error_alloc:
1074 if (ret)
1075 i40e_free_vf_res(vf);
1076
1077 return ret;
1078}
1079
fc18eaa0
MW		 1080#define VF_DEVICE_STATUS 0xAA
1081#define VF_TRANS_PENDING_MASK 0x20
1082/**
1083 * i40e_quiesce_vf_pci
b40c82e6 1084 * @vf: pointer to the VF structure
fc18eaa0
MW		 1085 *
1086 * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
1087 * if the transactions never clear.
1088 **/
1089static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
1090{
1091 struct i40e_pf *pf = vf->pf;
1092 struct i40e_hw *hw = &pf->hw;
1093 int vf_abs_id, i;
1094 u32 reg;
1095
b141d619 1096 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
fc18eaa0
MW		 1097
1098 wr32(hw, I40E_PF_PCI_CIAA,
1099 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
1100 for (i = 0; i < 100; i++) {
1101 reg = rd32(hw, I40E_PF_PCI_CIAD);
1102 if ((reg & VF_TRANS_PENDING_MASK) == 0)
1103 return 0;
1104 udelay(1);
1105 }
1106 return -EIO;
1107}
1108
37d318d7
AL		 1109/**
1110 * i40e_getnum_vf_vsi_vlan_filters
1111 * @vsi: pointer to the vsi
1112 *
1113 * called to get the number of VLANs offloaded on this VF
1114 **/
1115static int i40e_getnum_vf_vsi_vlan_filters(struct i40e_vsi *vsi)
1116{
1117 struct i40e_mac_filter *f;
1118 int num_vlans = 0, bkt;
1119
1120 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
1121 if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID)
1122 num_vlans++;
1123 }
1124
1125 return num_vlans;
1126}
0ce5233e
MS		 1127
1128/**
37d318d7
AL		 1129 * i40e_get_vlan_list_sync
1130 * @vsi: pointer to the VSI
1131 * @num_vlans: number of VLANs in mac_filter_hash, returned to caller
1132 * @vlan_list: list of VLANs present in mac_filter_hash, returned to caller.
1133 * This array is allocated here, but has to be freed in caller.
0ce5233e 1134 *
37d318d7 1135 * Called to get number of VLANs and VLAN list present in mac_filter_hash.
0ce5233e 1136 **/
37d318d7
AL		 1137static void i40e_get_vlan_list_sync(struct i40e_vsi *vsi, int *num_vlans,
1138 s16 **vlan_list)
0ce5233e 1139{
0ce5233e 1140 struct i40e_mac_filter *f;
37d318d7 1141 int i = 0;
0ce5233e
MS		 1142 int bkt;
1143
37d318d7
AL		 1144 spin_lock_bh(&vsi->mac_filter_hash_lock);
1145 *num_vlans = i40e_getnum_vf_vsi_vlan_filters(vsi);
1146 *vlan_list = kcalloc(*num_vlans, sizeof(**vlan_list), GFP_ATOMIC);
1147 if (!(*vlan_list))
1148 goto err;
0ce5233e 1149
37d318d7
AL		 1150 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
1151 if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
1152 continue;
1153 (*vlan_list)[i++] = f->vlan;
1154 }
1155err:
1156 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1157}
1158
1159/**
1160 * i40e_set_vsi_promisc
1161 * @vf: pointer to the VF struct
1162 * @seid: VSI number
1163 * @multi_enable: set MAC L2 layer multicast promiscuous enable/disable
1164 * for a given VLAN
1165 * @unicast_enable: set MAC L2 layer unicast promiscuous enable/disable
1166 * for a given VLAN
1167 * @vl: List of VLANs - apply filter for given VLANs
1168 * @num_vlans: Number of elements in @vl
1169 **/
1170static i40e_status
1171i40e_set_vsi_promisc(struct i40e_vf *vf, u16 seid, bool multi_enable,
1172 bool unicast_enable, s16 *vl, int num_vlans)
1173{
1174 struct i40e_pf *pf = vf->pf;
1175 struct i40e_hw *hw = &pf->hw;
1176 i40e_status aq_ret;
1177 int i;
1178
1179 /* No VLAN to set promisc on, set on VSI */
1180 if (!num_vlans || !vl) {
1181 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, seid,
1182 multi_enable,
1183 NULL);
0ce5233e
MS		 1184 if (aq_ret) {
1185 int aq_err = pf->hw.aq.asq_last_status;
1186
1187 dev_err(&pf->pdev->dev,
1188 "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n",
1189 vf->vf_id,
1190 i40e_stat_str(&pf->hw, aq_ret),
1191 i40e_aq_str(&pf->hw, aq_err));
37d318d7 1192
0ce5233e
MS		 1193 return aq_ret;
1194 }
1195
37d318d7
AL		 1196 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, seid,
1197 unicast_enable,
1198 NULL, true);
1199
0ce5233e
MS		 1200 if (aq_ret) {
1201 int aq_err = pf->hw.aq.asq_last_status;
1202
1203 dev_err(&pf->pdev->dev,
1204 "VF %d failed to set unicast promiscuous mode err %s aq_err %s\n",
1205 vf->vf_id,
1206 i40e_stat_str(&pf->hw, aq_ret),
1207 i40e_aq_str(&pf->hw, aq_err));
1208 }
37d318d7 1209
0ce5233e 1210 return aq_ret;
37d318d7 1211 }
0ce5233e 1212
37d318d7
AL		 1213 for (i = 0; i < num_vlans; i++) {
1214 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw, seid,
1215 multi_enable,
1216 vl[i], NULL);
1217 if (aq_ret) {
1218 int aq_err = pf->hw.aq.asq_last_status;
1219
1220 dev_err(&pf->pdev->dev,
1221 "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n",
1222 vf->vf_id,
1223 i40e_stat_str(&pf->hw, aq_ret),
1224 i40e_aq_str(&pf->hw, aq_err));
1225 }
1226
1227 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw, seid,
1228 unicast_enable,
1229 vl[i], NULL);
1230 if (aq_ret) {
1231 int aq_err = pf->hw.aq.asq_last_status;
1232
1233 dev_err(&pf->pdev->dev,
1234 "VF %d failed to set unicast promiscuous mode err %s aq_err %s\n",
1235 vf->vf_id,
1236 i40e_stat_str(&pf->hw, aq_ret),
1237 i40e_aq_str(&pf->hw, aq_err));
0ce5233e 1238 }
0ce5233e 1239 }
37d318d7
AL		 1240 return aq_ret;
1241}
0ce5233e 1242
37d318d7
AL		 1243/**
1244 * i40e_config_vf_promiscuous_mode
1245 * @vf: pointer to the VF info
1246 * @vsi_id: VSI id
1247 * @allmulti: set MAC L2 layer multicast promiscuous enable/disable
1248 * @alluni: set MAC L2 layer unicast promiscuous enable/disable
1249 *
1250 * Called from the VF to configure the promiscuous mode of
1251 * VF vsis and from the VF reset path to reset promiscuous mode.
1252 **/
1253static i40e_status i40e_config_vf_promiscuous_mode(struct i40e_vf *vf,
1254 u16 vsi_id,
1255 bool allmulti,
1256 bool alluni)
1257{
1258 i40e_status aq_ret = I40E_SUCCESS;
1259 struct i40e_pf *pf = vf->pf;
1260 struct i40e_vsi *vsi;
1261 int num_vlans;
1262 s16 *vl;
1263
1264 vsi = i40e_find_vsi_from_id(pf, vsi_id);
1265 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id) || !vsi)
1266 return I40E_ERR_PARAM;
1267
1268 if (vf->port_vlan_id) {
1269 aq_ret = i40e_set_vsi_promisc(vf, vsi->seid, allmulti,
1270 alluni, &vf->port_vlan_id, 1);
0ce5233e 1271 return aq_ret;
37d318d7
AL		 1272 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
1273 i40e_get_vlan_list_sync(vsi, &num_vlans, &vl);
0ce5233e 1274
37d318d7
AL		 1275 if (!vl)
1276 return I40E_ERR_NO_MEMORY;
0ce5233e 1277
37d318d7
AL		 1278 aq_ret = i40e_set_vsi_promisc(vf, vsi->seid, allmulti, alluni,
1279 vl, num_vlans);
1280 kfree(vl);
1281 return aq_ret;
0ce5233e
MS		 1282 }
1283
37d318d7
AL		 1284 /* no VLANs to set on, set on VSI */
1285 aq_ret = i40e_set_vsi_promisc(vf, vsi->seid, allmulti, alluni,
1286 NULL, 0);
0ce5233e
MS		 1287 return aq_ret;
1288}
1289
5c3c48ac 1290/**
9dc2e417 1291 * i40e_trigger_vf_reset
b40c82e6 1292 * @vf: pointer to the VF structure
5c3c48ac
JB		 1293 * @flr: VFLR was issued or not
1294 *
9dc2e417
JK		 1295 * Trigger hardware to start a reset for a particular VF. Expects the caller
1296 * to wait the proper amount of time to allow hardware to reset the VF before
1297 * it cleans up and restores VF functionality.
5c3c48ac 1298 **/
9dc2e417 1299static void i40e_trigger_vf_reset(struct i40e_vf *vf, bool flr)
5c3c48ac 1300{
5c3c48ac
JB		 1301 struct i40e_pf *pf = vf->pf;
1302 struct i40e_hw *hw = &pf->hw;
7e5a313e 1303 u32 reg, reg_idx, bit_idx;
3ba9bcb4 1304
5c3c48ac 1305 /* warn the VF */
6322e63c 1306 clear_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac 1307
beff3e9d
RK		 1308 /* Disable VF's configuration API during reset. The flag is re-enabled
1309 * in i40e_alloc_vf_res(), when it's safe again to access VF's VSI.
1310 * It's normally disabled in i40e_free_vf_res(), but it's safer
1311 * to do it earlier to give some time to finish to any VF config
1312 * functions that may still be running at this point.
1313 */
6322e63c 1314 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 1315
fc18eaa0
MW		 1316 /* In the case of a VFLR, the HW has already reset the VF and we
1317 * just need to clean up, so don't hit the VFRTRIG register.
5c3c48ac
JB		 1318 */
1319 if (!flr) {
b40c82e6 1320 /* reset VF using VPGEN_VFRTRIG reg */
fc18eaa0
MW		 1321 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1322 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
5c3c48ac
JB		 1323 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
1324 i40e_flush(hw);
1325 }
7369ca87
MW		 1326 /* clear the VFLR bit in GLGEN_VFLRSTAT */
1327 reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
1328 bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
1329 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
30728c5b 1330 i40e_flush(hw);
5c3c48ac 1331
fc18eaa0
MW		 1332 if (i40e_quiesce_vf_pci(vf))
1333 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
1334 vf->vf_id);
9dc2e417 1335}
fc18eaa0 1336
9dc2e417
JK		 1337/**
1338 * i40e_cleanup_reset_vf
1339 * @vf: pointer to the VF structure
1340 *
1341 * Cleanup a VF after the hardware reset is finished. Expects the caller to
1342 * have verified whether the reset is finished properly, and ensure the
1343 * minimum amount of wait time has passed.
1344 **/
1345static void i40e_cleanup_reset_vf(struct i40e_vf *vf)
1346{
1347 struct i40e_pf *pf = vf->pf;
1348 struct i40e_hw *hw = &pf->hw;
1349 u32 reg;
fc18eaa0 1350
0ce5233e
MS		 1351 /* disable promisc modes in case they were enabled */
1352 i40e_config_vf_promiscuous_mode(vf, vf->lan_vsi_id, false, false);
1353
beff3e9d 1354 /* free VF resources to begin resetting the VSI state */
fc18eaa0 1355 i40e_free_vf_res(vf);
beff3e9d
RK		 1356
1357 /* Enable hardware by clearing the reset bit in the VPGEN_VFRTRIG reg.
1358 * By doing this we allow HW to access VF memory at any point. If we
1359 * did it any sooner, HW could access memory while it was being freed
1360 * in i40e_free_vf_res(), causing an IOMMU fault.
1361 *
1362 * On the other hand, this needs to be done ASAP, because the VF driver
1363 * is waiting for this to happen and may report a timeout. It's
1364 * harmless, but it gets logged into Guest OS kernel log, so best avoid
1365 * it.
1366 */
1367 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1368 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
1369 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
1370
1371 /* reallocate VF resources to finish resetting the VSI state */
21be99ec 1372 if (!i40e_alloc_vf_res(vf)) {
e3219ce6 1373 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
21be99ec 1374 i40e_enable_vf_mappings(vf);
6322e63c
JK		 1375 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
1376 clear_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
6a23449a 1377 /* Do not notify the client during VF init */
c53d11f6
AB		 1378 if (!test_and_clear_bit(I40E_VF_STATE_PRE_ENABLE,
1379 &vf->vf_states))
6a23449a 1380 i40e_notify_client_of_vf_reset(pf, abs_vf_id);
dc5b4e9f 1381 vf->num_vlan = 0;
21be99ec 1382 }
beff3e9d
RK		 1383
1384 /* Tell the VF driver the reset is done. This needs to be done only
1385 * after VF has been fully initialized, because the VF driver may
1386 * request resources immediately after setting this flag.
1387 */
310a2ad9 1388 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), VIRTCHNL_VFR_VFACTIVE);
9dc2e417
JK		 1389}
1390
1391/**
1392 * i40e_reset_vf
1393 * @vf: pointer to the VF structure
1394 * @flr: VFLR was issued or not
1395 *
d43d60e5 1396 * Returns true if the VF is reset, false otherwise.
9dc2e417 1397 **/
d43d60e5 1398bool i40e_reset_vf(struct i40e_vf *vf, bool flr)
9dc2e417
JK		 1399{
1400 struct i40e_pf *pf = vf->pf;
1401 struct i40e_hw *hw = &pf->hw;
1402 bool rsd = false;
1403 u32 reg;
1404 int i;
1405
d43d60e5
JK		 1406 /* If the VFs have been disabled, this means something else is
1407 * resetting the VF, so we shouldn't continue.
1408 */
0da36b97 1409 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
d43d60e5 1410 return false;
9dc2e417
JK		 1411
1412 i40e_trigger_vf_reset(vf, flr);
1413
1414 /* poll VPGEN_VFRSTAT reg to make sure
1415 * that reset is complete
1416 */
1417 for (i = 0; i < 10; i++) {
1418 /* VF reset requires driver to first reset the VF and then
1419 * poll the status register to make sure that the reset
1420 * completed successfully. Due to internal HW FIFO flushes,
1421 * we must wait 10ms before the register will be valid.
1422 */
1423 usleep_range(10000, 20000);
1424 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1425 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
1426 rsd = true;
1427 break;
1428 }
1429 }
1430
1431 if (flr)
1432 usleep_range(10000, 20000);
1433
1434 if (!rsd)
1435 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1436 vf->vf_id);
1437 usleep_range(10000, 20000);
1438
1439 /* On initial reset, we don't have any queues to disable */
1440 if (vf->lan_vsi_idx != 0)
1441 i40e_vsi_stop_rings(pf->vsi[vf->lan_vsi_idx]);
1442
1443 i40e_cleanup_reset_vf(vf);
7e5a313e 1444
5c3c48ac 1445 i40e_flush(hw);
0da36b97 1446 clear_bit(__I40E_VF_DISABLE, pf->state);
d43d60e5
JK		 1447
1448 return true;
5c3c48ac 1449}
c354229f 1450
e4b433f4
JK		 1451/**
1452 * i40e_reset_all_vfs
1453 * @pf: pointer to the PF structure
1454 * @flr: VFLR was issued or not
1455 *
1456 * Reset all allocated VFs in one go. First, tell the hardware to reset each
1457 * VF, then do all the waiting in one chunk, and finally finish restoring each
1458 * VF after the wait. This is useful during PF routines which need to reset
1459 * all VFs, as otherwise it must perform these resets in a serialized fashion.
d43d60e5
JK		 1460 *
1461 * Returns true if any VFs were reset, and false otherwise.
e4b433f4 1462 **/
d43d60e5 1463bool i40e_reset_all_vfs(struct i40e_pf *pf, bool flr)
e4b433f4
JK		 1464{
1465 struct i40e_hw *hw = &pf->hw;
1466 struct i40e_vf *vf;
1467 int i, v;
1468 u32 reg;
1469
1470 /* If we don't have any VFs, then there is nothing to reset */
1471 if (!pf->num_alloc_vfs)
d43d60e5 1472 return false;
e4b433f4
JK		 1473
1474 /* If VFs have been disabled, there is no need to reset */
0da36b97 1475 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
d43d60e5 1476 return false;
e4b433f4
JK		 1477
1478 /* Begin reset on all VFs at once */
1479 for (v = 0; v < pf->num_alloc_vfs; v++)
1480 i40e_trigger_vf_reset(&pf->vf[v], flr);
1481
1482 /* HW requires some time to make sure it can flush the FIFO for a VF
1483 * when it resets it. Poll the VPGEN_VFRSTAT register for each VF in
1484 * sequence to make sure that it has completed. We'll keep track of
1485 * the VFs using a simple iterator that increments once that VF has
1486 * finished resetting.
1487 */
1488 for (i = 0, v = 0; i < 10 && v < pf->num_alloc_vfs; i++) {
1489 usleep_range(10000, 20000);
1490
1491 /* Check each VF in sequence, beginning with the VF to fail
1492 * the previous check.
1493 */
1494 while (v < pf->num_alloc_vfs) {
1495 vf = &pf->vf[v];
1496 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1497 if (!(reg & I40E_VPGEN_VFRSTAT_VFRD_MASK))
1498 break;
1499
1500 /* If the current VF has finished resetting, move on
1501 * to the next VF in sequence.
1502 */
1503 v++;
1504 }
1505 }
1506
1507 if (flr)
1508 usleep_range(10000, 20000);
1509
1510 /* Display a warning if at least one VF didn't manage to reset in
1511 * time, but continue on with the operation.
1512 */
1513 if (v < pf->num_alloc_vfs)
1514 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1515 pf->vf[v].vf_id);
1516 usleep_range(10000, 20000);
1517
1518 /* Begin disabling all the rings associated with VFs, but do not wait
1519 * between each VF.
1520 */
1521 for (v = 0; v < pf->num_alloc_vfs; v++) {
1522 /* On initial reset, we don't have any queues to disable */
1523 if (pf->vf[v].lan_vsi_idx == 0)
1524 continue;
1525
1526 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[v].lan_vsi_idx]);
1527 }
1528
1529 /* Now that we've notified HW to disable all of the VF rings, wait
1530 * until they finish.
1531 */
1532 for (v = 0; v < pf->num_alloc_vfs; v++) {
1533 /* On initial reset, we don't have any queues to disable */
1534 if (pf->vf[v].lan_vsi_idx == 0)
1535 continue;
1536
1537 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[v].lan_vsi_idx]);
1538 }
1539
1540 /* Hw may need up to 50ms to finish disabling the RX queues. We
1541 * minimize the wait by delaying only once for all VFs.
1542 */
1543 mdelay(50);
1544
1545 /* Finish the reset on each VF */
1546 for (v = 0; v < pf->num_alloc_vfs; v++)
1547 i40e_cleanup_reset_vf(&pf->vf[v]);
1548
1549 i40e_flush(hw);
0da36b97 1550 clear_bit(__I40E_VF_DISABLE, pf->state);
d43d60e5
JK		 1551
1552 return true;
e4b433f4
JK		 1553}
1554
5c3c48ac
JB		 1555/**
1556 * i40e_free_vfs
b40c82e6 1557 * @pf: pointer to the PF structure
5c3c48ac 1558 *
b40c82e6 1559 * free VF resources
5c3c48ac
JB		 1560 **/
1561void i40e_free_vfs(struct i40e_pf *pf)
1562{
f7414531
MW		 1563 struct i40e_hw *hw = &pf->hw;
1564 u32 reg_idx, bit_idx;
1565 int i, tmp, vf_id;
5c3c48ac
JB		 1566
1567 if (!pf->vf)
1568 return;
0da36b97 1569 while (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
3ba9bcb4 1570 usleep_range(1000, 2000);
5c3c48ac 1571
e3219ce6 1572 i40e_notify_client_of_vf_enable(pf, 0);
707d088a
JK		 1573
1574 /* Amortize wait time by stopping all VFs at the same time */
1575 for (i = 0; i < pf->num_alloc_vfs; i++) {
1576 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
1577 continue;
1578
1579 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[i].lan_vsi_idx]);
1580 }
1581
1582 for (i = 0; i < pf->num_alloc_vfs; i++) {
6322e63c 1583 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
707d088a
JK		 1584 continue;
1585
1586 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[i].lan_vsi_idx]);
1587 }
44434638 1588
6a9ddb36
MW		 1589 /* Disable IOV before freeing resources. This lets any VF drivers
1590 * running in the host get themselves cleaned up before we yank
1591 * the carpet out from underneath their feet.
1592 */
1593 if (!pci_vfs_assigned(pf->pdev))
1594 pci_disable_sriov(pf->pdev);
6d7b967d
MW		 1595 else
1596 dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
6a9ddb36 1597
b40c82e6 1598 /* free up VF resources */
6c1b5bff
MW		 1599 tmp = pf->num_alloc_vfs;
1600 pf->num_alloc_vfs = 0;
1601 for (i = 0; i < tmp; i++) {
6322e63c 1602 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
5c3c48ac
JB		 1603 i40e_free_vf_res(&pf->vf[i]);
1604 /* disable qp mappings */
1605 i40e_disable_vf_mappings(&pf->vf[i]);
1606 }
1607
1608 kfree(pf->vf);
1609 pf->vf = NULL;
5c3c48ac 1610
9e5634df
MW		 1611 /* This check is for when the driver is unloaded while VFs are
1612 * assigned. Setting the number of VFs to 0 through sysfs is caught
1613 * before this function ever gets called.
1614 */
c24817b6 1615 if (!pci_vfs_assigned(pf->pdev)) {
f7414531
MW		 1616 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
1617 * work correctly when SR-IOV gets re-enabled.
1618 */
1619 for (vf_id = 0; vf_id < tmp; vf_id++) {
1620 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
1621 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
41a1d04b 1622 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
f7414531 1623 }
c354229f 1624 }
0da36b97 1625 clear_bit(__I40E_VF_DISABLE, pf->state);
5c3c48ac
JB		 1626}
1627
1628#ifdef CONFIG_PCI_IOV
1629/**
1630 * i40e_alloc_vfs
b40c82e6
JK		 1631 * @pf: pointer to the PF structure
1632 * @num_alloc_vfs: number of VFs to allocate
5c3c48ac 1633 *
b40c82e6 1634 * allocate VF resources
5c3c48ac 1635 **/
4aeec010 1636int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
5c3c48ac
JB		 1637{
1638 struct i40e_vf *vfs;
1639 int i, ret = 0;
1640
6c1b5bff 1641 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW		 1642 i40e_irq_dynamic_disable_icr0(pf);
1643
4aeec010
MW		 1644 /* Check to see if we're just allocating resources for extant VFs */
1645 if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
1646 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
1647 if (ret) {
de445b3d 1648 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
4aeec010
MW		 1649 pf->num_alloc_vfs = 0;
1650 goto err_iov;
1651 }
5c3c48ac 1652 }
5c3c48ac 1653 /* allocate memory */
cc6456af 1654 vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL);
5c3c48ac
JB		 1655 if (!vfs) {
1656 ret = -ENOMEM;
1657 goto err_alloc;
1658 }
c674d125 1659 pf->vf = vfs;
5c3c48ac
JB		 1660
1661 /* apply default profile */
1662 for (i = 0; i < num_alloc_vfs; i++) {
1663 vfs[i].pf = pf;
1664 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
1665 vfs[i].vf_id = i;
1666
1667 /* assign default capabilities */
1668 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
c674d125 1669 vfs[i].spoofchk = true;
1b484370
JK		 1670
1671 set_bit(I40E_VF_STATE_PRE_ENABLE, &vfs[i].vf_states);
5c3c48ac 1672
5c3c48ac 1673 }
5c3c48ac
JB		 1674 pf->num_alloc_vfs = num_alloc_vfs;
1675
1b484370
JK		 1676 /* VF resources get allocated during reset */
1677 i40e_reset_all_vfs(pf, false);
1678
6a23449a
AD		 1679 i40e_notify_client_of_vf_enable(pf, num_alloc_vfs);
1680
5c3c48ac
JB		 1681err_alloc:
1682 if (ret)
1683 i40e_free_vfs(pf);
1684err_iov:
6c1b5bff 1685 /* Re-enable interrupt 0. */
dbadbbe2 1686 i40e_irq_dynamic_enable_icr0(pf);
5c3c48ac
JB		 1687 return ret;
1688}
1689
1690#endif
1691/**
1692 * i40e_pci_sriov_enable
1693 * @pdev: pointer to a pci_dev structure
b40c82e6 1694 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1695 *
1696 * Enable or change the number of VFs
1697 **/
1698static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
1699{
1700#ifdef CONFIG_PCI_IOV
1701 struct i40e_pf *pf = pci_get_drvdata(pdev);
1702 int pre_existing_vfs = pci_num_vf(pdev);
1703 int err = 0;
1704
0da36b97 1705 if (test_bit(__I40E_TESTING, pf->state)) {
e17bc411
GR		 1706 dev_warn(&pdev->dev,
1707 "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n");
1708 err = -EPERM;
1709 goto err_out;
1710 }
1711
5c3c48ac
JB		 1712 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
1713 i40e_free_vfs(pf);
1714 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
1715 goto out;
1716
1717 if (num_vfs > pf->num_req_vfs) {
96c8d073
MW		 1718 dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n",
1719 num_vfs, pf->num_req_vfs);
5c3c48ac
JB		 1720 err = -EPERM;
1721 goto err_out;
1722 }
1723
96c8d073 1724 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
5c3c48ac
JB		 1725 err = i40e_alloc_vfs(pf, num_vfs);
1726 if (err) {
1727 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
1728 goto err_out;
1729 }
1730
1731out:
1732 return num_vfs;
1733
1734err_out:
1735 return err;
1736#endif
1737 return 0;
1738}
1739
1740/**
1741 * i40e_pci_sriov_configure
1742 * @pdev: pointer to a pci_dev structure
b40c82e6 1743 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1744 *
1745 * Enable or change the number of VFs. Called when the user updates the number
1746 * of VFs in sysfs.
1747 **/
1748int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1749{
1750 struct i40e_pf *pf = pci_get_drvdata(pdev);
f5a7b21b
JS		 1751 int ret = 0;
1752
1753 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
1754 dev_warn(&pdev->dev, "Unable to configure VFs, other operation is pending.\n");
1755 return -EAGAIN;
1756 }
5c3c48ac 1757
fc60861e
ASJ		 1758 if (num_vfs) {
1759 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
1760 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
ff424188 1761 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
fc60861e 1762 }
f5a7b21b
JS		 1763 ret = i40e_pci_sriov_enable(pdev, num_vfs);
1764 goto sriov_configure_out;
fc60861e 1765 }
5c3c48ac 1766
c24817b6 1767 if (!pci_vfs_assigned(pf->pdev)) {
9e5634df 1768 i40e_free_vfs(pf);
fc60861e 1769 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
ff424188 1770 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
9e5634df
MW		 1771 } else {
1772 dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
f5a7b21b
JS		 1773 ret = -EINVAL;
1774 goto sriov_configure_out;
9e5634df 1775 }
f5a7b21b
JS		 1776sriov_configure_out:
1777 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
1778 return ret;
5c3c48ac
JB		 1779}
1780
1781/***********************virtual channel routines******************/
1782
1783/**
1784 * i40e_vc_send_msg_to_vf
b40c82e6 1785 * @vf: pointer to the VF info
5c3c48ac
JB		 1786 * @v_opcode: virtual channel opcode
1787 * @v_retval: virtual channel return value
1788 * @msg: pointer to the msg buffer
1789 * @msglen: msg length
1790 *
b40c82e6 1791 * send msg to VF
5c3c48ac
JB		 1792 **/
1793static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
1794 u32 v_retval, u8 *msg, u16 msglen)
1795{
6e7b5bd3
ASJ		 1796 struct i40e_pf *pf;
1797 struct i40e_hw *hw;
1798 int abs_vf_id;
5c3c48ac
JB		 1799 i40e_status aq_ret;
1800
6e7b5bd3
ASJ		 1801 /* validate the request */
1802 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
1803 return -EINVAL;
1804
1805 pf = vf->pf;
1806 hw = &pf->hw;
1807 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1808
5c3c48ac
JB		 1809 /* single place to detect unsuccessful return values */
1810 if (v_retval) {
1811 vf->num_invalid_msgs++;
18b7af57
MW		 1812 dev_info(&pf->pdev->dev, "VF %d failed opcode %d, retval: %d\n",
1813 vf->vf_id, v_opcode, v_retval);
5c3c48ac
JB		 1814 if (vf->num_invalid_msgs >
1815 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
1816 dev_err(&pf->pdev->dev,
1817 "Number of invalid messages exceeded for VF %d\n",
1818 vf->vf_id);
1819 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
6322e63c 1820 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
5c3c48ac
JB		 1821 }
1822 } else {
1823 vf->num_valid_msgs++;
5d38c93e
JW		 1824 /* reset the invalid counter, if a valid message is received. */
1825 vf->num_invalid_msgs = 0;
5c3c48ac
JB		 1826 }
1827
f19efbb5 1828 aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
7efa84b7 1829 msg, msglen, NULL);
5c3c48ac 1830 if (aq_ret) {
18b7af57
MW		 1831 dev_info(&pf->pdev->dev,
1832 "Unable to send the message to VF %d aq_err %d\n",
1833 vf->vf_id, pf->hw.aq.asq_last_status);
5c3c48ac
JB		 1834 return -EIO;
1835 }
1836
1837 return 0;
1838}
1839
1840/**
1841 * i40e_vc_send_resp_to_vf
b40c82e6 1842 * @vf: pointer to the VF info
5c3c48ac
JB		 1843 * @opcode: operation code
1844 * @retval: return value
1845 *
b40c82e6 1846 * send resp msg to VF
5c3c48ac
JB		 1847 **/
1848static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
310a2ad9 1849 enum virtchnl_ops opcode,
5c3c48ac
JB		 1850 i40e_status retval)
1851{
1852 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
1853}
1854
1855/**
1856 * i40e_vc_get_version_msg
b40c82e6 1857 * @vf: pointer to the VF info
f5254429 1858 * @msg: pointer to the msg buffer
5c3c48ac 1859 *
b40c82e6 1860 * called from the VF to request the API version used by the PF
5c3c48ac 1861 **/
f4ca1a22 1862static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 1863{
310a2ad9
JB		 1864 struct virtchnl_version_info info = {
1865 VIRTCHNL_VERSION_MAJOR, VIRTCHNL_VERSION_MINOR
5c3c48ac
JB		 1866 };
1867
310a2ad9 1868 vf->vf_ver = *(struct virtchnl_version_info *)msg;
606a5488 1869 /* VFs running the 1.0 API expect to get 1.0 back or they will cry. */
eedcfef8 1870 if (VF_IS_V10(&vf->vf_ver))
310a2ad9
JB		 1871 info.minor = VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
1872 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_VERSION,
5c3c48ac 1873 I40E_SUCCESS, (u8 *)&info,
f0adc6e8 1874 sizeof(struct virtchnl_version_info));
5c3c48ac
JB		 1875}
1876
c4998aa3
AD		 1877/**
1878 * i40e_del_qch - delete all the additional VSIs created as a part of ADq
1879 * @vf: pointer to VF structure
1880 **/
1881static void i40e_del_qch(struct i40e_vf *vf)
1882{
1883 struct i40e_pf *pf = vf->pf;
1884 int i;
1885
1886 /* first element in the array belongs to primary VF VSI and we shouldn't
1887 * delete it. We should however delete the rest of the VSIs created
1888 */
1889 for (i = 1; i < vf->num_tc; i++) {
1890 if (vf->ch[i].vsi_idx) {
1891 i40e_vsi_release(pf->vsi[vf->ch[i].vsi_idx]);
1892 vf->ch[i].vsi_idx = 0;
1893 vf->ch[i].vsi_id = 0;
1894 }
1895 }
1896}
1897
5c3c48ac
JB		 1898/**
1899 * i40e_vc_get_vf_resources_msg
b40c82e6 1900 * @vf: pointer to the VF info
5c3c48ac 1901 * @msg: pointer to the msg buffer
5c3c48ac 1902 *
b40c82e6 1903 * called from the VF to request its resources
5c3c48ac 1904 **/
f4ca1a22 1905static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 1906{
310a2ad9 1907 struct virtchnl_vf_resource *vfres = NULL;
5c3c48ac
JB		 1908 struct i40e_pf *pf = vf->pf;
1909 i40e_status aq_ret = 0;
1910 struct i40e_vsi *vsi;
5c3c48ac 1911 int num_vsis = 1;
fae6cad1 1912 size_t len = 0;
5c3c48ac
JB		 1913 int ret;
1914
6322e63c 1915 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
5c3c48ac
JB		 1916 aq_ret = I40E_ERR_PARAM;
1917 goto err;
1918 }
1919
fae6cad1 1920 len = struct_size(vfres, vsi_res, num_vsis);
5c3c48ac
JB		 1921 vfres = kzalloc(len, GFP_KERNEL);
1922 if (!vfres) {
1923 aq_ret = I40E_ERR_NO_MEMORY;
1924 len = 0;
1925 goto err;
1926 }
eedcfef8 1927 if (VF_IS_V11(&vf->vf_ver))
f4ca1a22
MW		 1928 vf->driver_caps = *(u32 *)msg;
1929 else
310a2ad9
JB		 1930 vf->driver_caps = VIRTCHNL_VF_OFFLOAD_L2 |
1931 VIRTCHNL_VF_OFFLOAD_RSS_REG |
1932 VIRTCHNL_VF_OFFLOAD_VLAN;
5c3c48ac 1933
fbb113f7 1934 vfres->vf_cap_flags = VIRTCHNL_VF_OFFLOAD_L2;
fdf0e0bf 1935 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1936 if (!vsi->info.pvid)
fbb113f7 1937 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_VLAN;
e3219ce6 1938
0ef2d5af 1939 if (i40e_vf_client_capable(pf, vf->vf_id) &&
310a2ad9 1940 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_IWARP)) {
fbb113f7 1941 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_IWARP;
6322e63c 1942 set_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
41d0a4d0
AB		 1943 } else {
1944 clear_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
e3219ce6
ASJ		 1945 }
1946
310a2ad9 1947 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
fbb113f7 1948 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_PF;
e25d00b8 1949 } else {
d36e41dc 1950 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
310a2ad9 1951 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_AQ))
fbb113f7 1952 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_AQ;
c4e1868c 1953 else
fbb113f7 1954 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_REG;
e25d00b8 1955 }
1f012279 1956
d36e41dc 1957 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
310a2ad9 1958 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
fbb113f7 1959 vfres->vf_cap_flags |=
310a2ad9 1960 VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
3d0da5b7
ASJ		 1961 }
1962
310a2ad9 1963 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP)
fbb113f7 1964 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP;
bacd75cf 1965
d36e41dc 1966 if ((pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE) &&
310a2ad9 1967 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM))
fbb113f7 1968 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM;
bacd75cf 1969
310a2ad9 1970 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) {
14c5f5d2
SN		 1971 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
1972 dev_err(&pf->pdev->dev,
1973 "VF %d requested polling mode: this feature is supported only when the device is running in single function per port (SFP) mode\n",
1974 vf->vf_id);
db1a8f8e 1975 aq_ret = I40E_ERR_PARAM;
14c5f5d2
SN		 1976 goto err;
1977 }
fbb113f7 1978 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RX_POLLING;
14c5f5d2 1979 }
1f012279 1980
d36e41dc 1981 if (pf->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) {
310a2ad9 1982 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
fbb113f7 1983 vfres->vf_cap_flags |=
310a2ad9 1984 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
f6d83d13
ASJ		 1985 }
1986
a3f5aa90
AB		 1987 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_REQ_QUEUES)
1988 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_REQ_QUEUES;
1989
c27eac48
AD		 1990 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ADQ)
1991 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ADQ;
1992
5c3c48ac
JB		 1993 vfres->num_vsis = num_vsis;
1994 vfres->num_queue_pairs = vf->num_queue_pairs;
1995 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
c4e1868c
MW		 1996 vfres->rss_key_size = I40E_HKEY_ARRAY_SIZE;
1997 vfres->rss_lut_size = I40E_VF_HLUT_ARRAY_SIZE;
1998
fdf0e0bf 1999 if (vf->lan_vsi_idx) {
442b25e4 2000 vfres->vsi_res[0].vsi_id = vf->lan_vsi_id;
ff3f4cc2 2001 vfres->vsi_res[0].vsi_type = VIRTCHNL_VSI_SRIOV;
442b25e4 2002 vfres->vsi_res[0].num_queue_pairs = vsi->alloc_queue_pairs;
f578f5f4 2003 /* VFs only use TC 0 */
442b25e4 2004 vfres->vsi_res[0].qset_handle
f578f5f4 2005 = le16_to_cpu(vsi->info.qs_handle[0]);
442b25e4 2006 ether_addr_copy(vfres->vsi_res[0].default_mac_addr,
6995b36c 2007 vf->default_lan_addr.addr);
5c3c48ac 2008 }
6322e63c 2009 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac
JB		 2010
2011err:
b40c82e6 2012 /* send the response back to the VF */
310a2ad9 2013 ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_VF_RESOURCES,
5c3c48ac
JB		 2014 aq_ret, (u8 *)vfres, len);
2015
2016 kfree(vfres);
2017 return ret;
2018}
2019
2020/**
2021 * i40e_vc_reset_vf_msg
b40c82e6 2022 * @vf: pointer to the VF info
5c3c48ac 2023 *
b40c82e6
JK		 2024 * called from the VF to reset itself,
2025 * unlike other virtchnl messages, PF driver
2026 * doesn't send the response back to the VF
5c3c48ac 2027 **/
fc18eaa0 2028static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
5c3c48ac 2029{
6322e63c 2030 if (test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
fc18eaa0 2031 i40e_reset_vf(vf, false);
5c3c48ac
JB		 2032}
2033
2034/**
2035 * i40e_vc_config_promiscuous_mode_msg
b40c82e6 2036 * @vf: pointer to the VF info
5c3c48ac 2037 * @msg: pointer to the msg buffer
5c3c48ac 2038 *
b40c82e6
JK		 2039 * called from the VF to configure the promiscuous mode of
2040 * VF vsis
5c3c48ac 2041 **/
679b05c0 2042static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2043{
310a2ad9
JB		 2044 struct virtchnl_promisc_info *info =
2045 (struct virtchnl_promisc_info *)msg;
5c3c48ac 2046 struct i40e_pf *pf = vf->pf;
5676a8b9 2047 i40e_status aq_ret = 0;
5c3c48ac 2048 bool allmulti = false;
5676a8b9 2049 bool alluni = false;
5c3c48ac 2050
1e846827
HR		 2051 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
2052 aq_ret = I40E_ERR_PARAM;
2053 goto err_out;
2054 }
2055 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2056 dev_err(&pf->pdev->dev,
2057 "Unprivileged VF %d is attempting to configure promiscuous mode\n",
2058 vf->vf_id);
2059
2060 /* Lie to the VF on purpose, because this is an error we can
2061 * ignore. Unprivileged VF is not a virtual channel error.
2062 */
2063 aq_ret = 0;
2064 goto err_out;
2065 }
0ce5233e 2066
d29e0d23
MS		 2067 if (info->flags > I40E_MAX_VF_PROMISC_FLAGS) {
2068 aq_ret = I40E_ERR_PARAM;
2069 goto err_out;
2070 }
2071
2072 if (!i40e_vc_isvalid_vsi_id(vf, info->vsi_id)) {
2073 aq_ret = I40E_ERR_PARAM;
2074 goto err_out;
2075 }
2076
5676a8b9 2077 /* Multicast promiscuous handling*/
ff3f4cc2 2078 if (info->flags & FLAG_VF_MULTICAST_PROMISC)
5c3c48ac 2079 allmulti = true;
5676a8b9 2080
0ce5233e
MS		 2081 if (info->flags & FLAG_VF_UNICAST_PROMISC)
2082 alluni = true;
2083 aq_ret = i40e_config_vf_promiscuous_mode(vf, info->vsi_id, allmulti,
2084 alluni);
558e93c9
CZ		 2085 if (aq_ret)
2086 goto err_out;
2087
2088 if (allmulti) {
2089 if (!test_and_set_bit(I40E_VF_STATE_MC_PROMISC,
2090 &vf->vf_states))
0ce5233e
MS		 2091 dev_info(&pf->pdev->dev,
2092 "VF %d successfully set multicast promiscuous mode\n",
2093 vf->vf_id);
558e93c9
CZ		 2094 } else if (test_and_clear_bit(I40E_VF_STATE_MC_PROMISC,
2095 &vf->vf_states))
2096 dev_info(&pf->pdev->dev,
2097 "VF %d successfully unset multicast promiscuous mode\n",
2098 vf->vf_id);
2099
2100 if (alluni) {
2101 if (!test_and_set_bit(I40E_VF_STATE_UC_PROMISC,
2102 &vf->vf_states))
0ce5233e
MS		 2103 dev_info(&pf->pdev->dev,
2104 "VF %d successfully set unicast promiscuous mode\n",
2105 vf->vf_id);
558e93c9
CZ		 2106 } else if (test_and_clear_bit(I40E_VF_STATE_UC_PROMISC,
2107 &vf->vf_states))
2108 dev_info(&pf->pdev->dev,
2109 "VF %d successfully unset unicast promiscuous mode\n",
2110 vf->vf_id);
2111
1e846827 2112err_out:
b40c82e6 2113 /* send the response to the VF */
5c3c48ac 2114 return i40e_vc_send_resp_to_vf(vf,
310a2ad9 2115 VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
5c3c48ac
JB		 2116 aq_ret);
2117}
2118
2119/**
2120 * i40e_vc_config_queues_msg
b40c82e6 2121 * @vf: pointer to the VF info
5c3c48ac 2122 * @msg: pointer to the msg buffer
5c3c48ac 2123 *
b40c82e6 2124 * called from the VF to configure the rx/tx
5c3c48ac
JB		 2125 * queues
2126 **/
679b05c0 2127static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2128{
310a2ad9
JB		 2129 struct virtchnl_vsi_queue_config_info *qci =
2130 (struct virtchnl_vsi_queue_config_info *)msg;
2131 struct virtchnl_queue_pair_info *qpi;
5f5e33b6 2132 struct i40e_pf *pf = vf->pf;
c27eac48 2133 u16 vsi_id, vsi_queue_id = 0;
d29e0d23 2134 u16 num_qps_all = 0;
5c3c48ac 2135 i40e_status aq_ret = 0;
c27eac48
AD		 2136 int i, j = 0, idx = 0;
2137
6322e63c 2138 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2139 aq_ret = I40E_ERR_PARAM;
2140 goto error_param;
2141 }
2142
d29e0d23 2143 if (!i40e_vc_isvalid_vsi_id(vf, qci->vsi_id)) {
5c3c48ac
JB		 2144 aq_ret = I40E_ERR_PARAM;
2145 goto error_param;
2146 }
c27eac48 2147
3f8af412
SN		 2148 if (qci->num_queue_pairs > I40E_MAX_VF_QUEUES) {
2149 aq_ret = I40E_ERR_PARAM;
2150 goto error_param;
2151 }
2152
d29e0d23
MS		 2153 if (vf->adq_enabled) {
2154 for (i = 0; i < I40E_MAX_VF_VSI; i++)
2155 num_qps_all += vf->ch[i].num_qps;
2156 if (num_qps_all != qci->num_queue_pairs) {
2157 aq_ret = I40E_ERR_PARAM;
2158 goto error_param;
2159 }
2160 }
2161
2162 vsi_id = qci->vsi_id;
2163
5c3c48ac
JB		 2164 for (i = 0; i < qci->num_queue_pairs; i++) {
2165 qpi = &qci->qpair[i];
c27eac48
AD		 2166
2167 if (!vf->adq_enabled) {
d29e0d23
MS		 2168 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
2169 qpi->txq.queue_id)) {
2170 aq_ret = I40E_ERR_PARAM;
2171 goto error_param;
2172 }
2173
c27eac48
AD		 2174 vsi_queue_id = qpi->txq.queue_id;
2175
2176 if (qpi->txq.vsi_id != qci->vsi_id ||
2177 qpi->rxq.vsi_id != qci->vsi_id ||
2178 qpi->rxq.queue_id != vsi_queue_id) {
2179 aq_ret = I40E_ERR_PARAM;
2180 goto error_param;
2181 }
2182 }
2183
f5a2b3ff
PK		 2184 if (vf->adq_enabled) {
2185 if (idx >= ARRAY_SIZE(vf->ch)) {
2186 aq_ret = I40E_ERR_NO_AVAILABLE_VSI;
2187 goto error_param;
2188 }
d29e0d23 2189 vsi_id = vf->ch[idx].vsi_id;
f5a2b3ff 2190 }
5c3c48ac
JB		 2191
2192 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
2193 &qpi->rxq) ||
2194 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
2195 &qpi->txq)) {
2196 aq_ret = I40E_ERR_PARAM;
2197 goto error_param;
2198 }
c27eac48
AD		 2199
2200 /* For ADq there can be up to 4 VSIs with max 4 queues each.
2201 * VF does not know about these additional VSIs and all
2202 * it cares is about its own queues. PF configures these queues
2203 * to its appropriate VSIs based on TC mapping
6db60322 2204 */
c27eac48 2205 if (vf->adq_enabled) {
f5a2b3ff
PK		 2206 if (idx >= ARRAY_SIZE(vf->ch)) {
2207 aq_ret = I40E_ERR_NO_AVAILABLE_VSI;
2208 goto error_param;
2209 }
c27eac48
AD		 2210 if (j == (vf->ch[idx].num_qps - 1)) {
2211 idx++;
2212 j = 0; /* resetting the queue count */
2213 vsi_queue_id = 0;
2214 } else {
2215 j++;
2216 vsi_queue_id++;
2217 }
c27eac48 2218 }
5c3c48ac 2219 }
b40c82e6 2220 /* set vsi num_queue_pairs in use to num configured by VF */
c27eac48
AD		 2221 if (!vf->adq_enabled) {
2222 pf->vsi[vf->lan_vsi_idx]->num_queue_pairs =
2223 qci->num_queue_pairs;
2224 } else {
2225 for (i = 0; i < vf->num_tc; i++)
2226 pf->vsi[vf->ch[i].vsi_idx]->num_queue_pairs =
2227 vf->ch[i].num_qps;
2228 }
5c3c48ac
JB		 2229
2230error_param:
b40c82e6 2231 /* send the response to the VF */
310a2ad9 2232 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES,
5c3c48ac
JB		 2233 aq_ret);
2234}
2235
c27eac48
AD		 2236/**
2237 * i40e_validate_queue_map
2238 * @vsi_id: vsi id
2239 * @queuemap: Tx or Rx queue map
2240 *
2241 * check if Tx or Rx queue map is valid
2242 **/
2243static int i40e_validate_queue_map(struct i40e_vf *vf, u16 vsi_id,
2244 unsigned long queuemap)
2245{
2246 u16 vsi_queue_id, queue_id;
2247
2248 for_each_set_bit(vsi_queue_id, &queuemap, I40E_MAX_VSI_QP) {
2249 if (vf->adq_enabled) {
2250 vsi_id = vf->ch[vsi_queue_id / I40E_MAX_VF_VSI].vsi_id;
2251 queue_id = (vsi_queue_id % I40E_DEFAULT_QUEUES_PER_VF);
2252 } else {
2253 queue_id = vsi_queue_id;
2254 }
2255
2256 if (!i40e_vc_isvalid_queue_id(vf, vsi_id, queue_id))
2257 return -EINVAL;
2258 }
2259
2260 return 0;
2261}
2262
5c3c48ac
JB		 2263/**
2264 * i40e_vc_config_irq_map_msg
b40c82e6 2265 * @vf: pointer to the VF info
5c3c48ac 2266 * @msg: pointer to the msg buffer
5c3c48ac 2267 *
b40c82e6 2268 * called from the VF to configure the irq to
5c3c48ac
JB		 2269 * queue map
2270 **/
679b05c0 2271static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2272{
310a2ad9
JB		 2273 struct virtchnl_irq_map_info *irqmap_info =
2274 (struct virtchnl_irq_map_info *)msg;
2275 struct virtchnl_vector_map *map;
d29e0d23 2276 u16 vsi_id;
5c3c48ac 2277 i40e_status aq_ret = 0;
5c3c48ac
JB		 2278 int i;
2279
6322e63c 2280 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2281 aq_ret = I40E_ERR_PARAM;
2282 goto error_param;
2283 }
2284
d29e0d23
MS		 2285 if (irqmap_info->num_vectors >
2286 vf->pf->hw.func_caps.num_msix_vectors_vf) {
2287 aq_ret = I40E_ERR_PARAM;
2288 goto error_param;
2289 }
2290
5c3c48ac
JB		 2291 for (i = 0; i < irqmap_info->num_vectors; i++) {
2292 map = &irqmap_info->vecmap[i];
5c3c48ac 2293 /* validate msg params */
d29e0d23
MS		 2294 if (!i40e_vc_isvalid_vector_id(vf, map->vector_id) ||
2295 !i40e_vc_isvalid_vsi_id(vf, map->vsi_id)) {
5c3c48ac
JB		 2296 aq_ret = I40E_ERR_PARAM;
2297 goto error_param;
2298 }
d29e0d23 2299 vsi_id = map->vsi_id;
5c3c48ac 2300
c27eac48
AD		 2301 if (i40e_validate_queue_map(vf, vsi_id, map->rxq_map)) {
2302 aq_ret = I40E_ERR_PARAM;
2303 goto error_param;
5c3c48ac
JB		 2304 }
2305
c27eac48
AD		 2306 if (i40e_validate_queue_map(vf, vsi_id, map->txq_map)) {
2307 aq_ret = I40E_ERR_PARAM;
2308 goto error_param;
5c3c48ac
JB		 2309 }
2310
2311 i40e_config_irq_link_list(vf, vsi_id, map);
2312 }
2313error_param:
b40c82e6 2314 /* send the response to the VF */
310a2ad9 2315 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_IRQ_MAP,
5c3c48ac
JB		 2316 aq_ret);
2317}
2318
d0fda04d
HR		 2319/**
2320 * i40e_ctrl_vf_tx_rings
2321 * @vsi: the SRIOV VSI being configured
2322 * @q_map: bit map of the queues to be enabled
2323 * @enable: start or stop the queue
2324 **/
2325static int i40e_ctrl_vf_tx_rings(struct i40e_vsi *vsi, unsigned long q_map,
2326 bool enable)
2327{
2328 struct i40e_pf *pf = vsi->back;
2329 int ret = 0;
2330 u16 q_id;
2331
2332 for_each_set_bit(q_id, &q_map, I40E_MAX_VF_QUEUES) {
2333 ret = i40e_control_wait_tx_q(vsi->seid, pf,
2334 vsi->base_queue + q_id,
2335 false /*is xdp*/, enable);
2336 if (ret)
2337 break;
2338 }
2339 return ret;
2340}
2341
2342/**
2343 * i40e_ctrl_vf_rx_rings
2344 * @vsi: the SRIOV VSI being configured
2345 * @q_map: bit map of the queues to be enabled
2346 * @enable: start or stop the queue
2347 **/
2348static int i40e_ctrl_vf_rx_rings(struct i40e_vsi *vsi, unsigned long q_map,
2349 bool enable)
2350{
2351 struct i40e_pf *pf = vsi->back;
2352 int ret = 0;
2353 u16 q_id;
2354
2355 for_each_set_bit(q_id, &q_map, I40E_MAX_VF_QUEUES) {
2356 ret = i40e_control_wait_rx_q(pf, vsi->base_queue + q_id,
2357 enable);
2358 if (ret)
2359 break;
2360 }
2361 return ret;
2362}
2363
d9d6a9ae
BC		 2364/**
2365 * i40e_vc_validate_vqs_bitmaps - validate Rx/Tx queue bitmaps from VIRTHCHNL
2366 * @vqs: virtchnl_queue_select structure containing bitmaps to validate
2367 *
2368 * Returns true if validation was successful, else false.
2369 */
2370static bool i40e_vc_validate_vqs_bitmaps(struct virtchnl_queue_select *vqs)
2371{
2372 if ((!vqs->rx_queues && !vqs->tx_queues) ||
2373 vqs->rx_queues >= BIT(I40E_MAX_VF_QUEUES) ||
2374 vqs->tx_queues >= BIT(I40E_MAX_VF_QUEUES))
2375 return false;
2376
2377 return true;
2378}
2379
5c3c48ac
JB		 2380/**
2381 * i40e_vc_enable_queues_msg
b40c82e6 2382 * @vf: pointer to the VF info
5c3c48ac 2383 * @msg: pointer to the msg buffer
5c3c48ac 2384 *
b40c82e6 2385 * called from the VF to enable all or specific queue(s)
5c3c48ac 2386 **/
679b05c0 2387static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2388{
310a2ad9
JB		 2389 struct virtchnl_queue_select *vqs =
2390 (struct virtchnl_queue_select *)msg;
5c3c48ac 2391 struct i40e_pf *pf = vf->pf;
5c3c48ac 2392 i40e_status aq_ret = 0;
c27eac48 2393 int i;
5c3c48ac 2394
6322e63c 2395 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2396 aq_ret = I40E_ERR_PARAM;
2397 goto error_param;
2398 }
2399
d510497b 2400 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
5c3c48ac
JB		 2401 aq_ret = I40E_ERR_PARAM;
2402 goto error_param;
2403 }
2404
f27f37a0 2405 if (!i40e_vc_validate_vqs_bitmaps(vqs)) {
5c3c48ac
JB		 2406 aq_ret = I40E_ERR_PARAM;
2407 goto error_param;
2408 }
fdf0e0bf 2409
d0fda04d
HR		 2410 /* Use the queue bit map sent by the VF */
2411 if (i40e_ctrl_vf_rx_rings(pf->vsi[vf->lan_vsi_idx], vqs->rx_queues,
2412 true)) {
88f6563d 2413 aq_ret = I40E_ERR_TIMEOUT;
d0fda04d
HR		 2414 goto error_param;
2415 }
2416 if (i40e_ctrl_vf_tx_rings(pf->vsi[vf->lan_vsi_idx], vqs->tx_queues,
2417 true)) {
2418 aq_ret = I40E_ERR_TIMEOUT;
2419 goto error_param;
2420 }
c27eac48
AD		 2421
2422 /* need to start the rings for additional ADq VSI's as well */
2423 if (vf->adq_enabled) {
2424 /* zero belongs to LAN VSI */
2425 for (i = 1; i < vf->num_tc; i++) {
2426 if (i40e_vsi_start_rings(pf->vsi[vf->ch[i].vsi_idx]))
2427 aq_ret = I40E_ERR_TIMEOUT;
2428 }
2429 }
2430
2ad1274f
JK		 2431 vf->queues_enabled = true;
2432
5c3c48ac 2433error_param:
b40c82e6 2434 /* send the response to the VF */
310a2ad9 2435 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_QUEUES,
5c3c48ac
JB		 2436 aq_ret);
2437}
2438
2439/**
2440 * i40e_vc_disable_queues_msg
b40c82e6 2441 * @vf: pointer to the VF info
5c3c48ac 2442 * @msg: pointer to the msg buffer
5c3c48ac 2443 *
b40c82e6 2444 * called from the VF to disable all or specific
5c3c48ac
JB		 2445 * queue(s)
2446 **/
679b05c0 2447static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2448{
310a2ad9
JB		 2449 struct virtchnl_queue_select *vqs =
2450 (struct virtchnl_queue_select *)msg;
5c3c48ac 2451 struct i40e_pf *pf = vf->pf;
5c3c48ac 2452 i40e_status aq_ret = 0;
5c3c48ac 2453
2ad1274f
JK		 2454 /* Immediately mark queues as disabled */
2455 vf->queues_enabled = false;
2456
6322e63c 2457 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2458 aq_ret = I40E_ERR_PARAM;
2459 goto error_param;
2460 }
2461
2462 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
2463 aq_ret = I40E_ERR_PARAM;
2464 goto error_param;
2465 }
2466
f27f37a0 2467 if (!i40e_vc_validate_vqs_bitmaps(vqs)) {
5c3c48ac
JB		 2468 aq_ret = I40E_ERR_PARAM;
2469 goto error_param;
2470 }
fdf0e0bf 2471
d0fda04d
HR		 2472 /* Use the queue bit map sent by the VF */
2473 if (i40e_ctrl_vf_tx_rings(pf->vsi[vf->lan_vsi_idx], vqs->tx_queues,
2474 false)) {
2475 aq_ret = I40E_ERR_TIMEOUT;
2476 goto error_param;
2477 }
2478 if (i40e_ctrl_vf_rx_rings(pf->vsi[vf->lan_vsi_idx], vqs->rx_queues,
2479 false)) {
2480 aq_ret = I40E_ERR_TIMEOUT;
2481 goto error_param;
2482 }
5c3c48ac 2483error_param:
b40c82e6 2484 /* send the response to the VF */
310a2ad9 2485 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_QUEUES,
5c3c48ac
JB		 2486 aq_ret);
2487}
2488
a3f5aa90
AB		 2489/**
2490 * i40e_vc_request_queues_msg
2491 * @vf: pointer to the VF info
2492 * @msg: pointer to the msg buffer
a3f5aa90
AB		 2493 *
2494 * VFs get a default number of queues but can use this message to request a
17a9422d
AB		 2495 * different number. If the request is successful, PF will reset the VF and
2496 * return 0. If unsuccessful, PF will send message informing VF of number of
2497 * available queues and return result of sending VF a message.
a3f5aa90 2498 **/
679b05c0 2499static int i40e_vc_request_queues_msg(struct i40e_vf *vf, u8 *msg)
a3f5aa90
AB		 2500{
2501 struct virtchnl_vf_res_request *vfres =
2502 (struct virtchnl_vf_res_request *)msg;
d510497b
SN		 2503 u16 req_pairs = vfres->num_queue_pairs;
2504 u8 cur_pairs = vf->num_queue_pairs;
a3f5aa90
AB		 2505 struct i40e_pf *pf = vf->pf;
2506
2507 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
2508 return -EINVAL;
2509
d510497b 2510 if (req_pairs > I40E_MAX_VF_QUEUES) {
a3f5aa90
AB		 2511 dev_err(&pf->pdev->dev,
2512 "VF %d tried to request more than %d queues.\n",
2513 vf->vf_id,
2514 I40E_MAX_VF_QUEUES);
2515 vfres->num_queue_pairs = I40E_MAX_VF_QUEUES;
2516 } else if (req_pairs - cur_pairs > pf->queues_left) {
2517 dev_warn(&pf->pdev->dev,
2518 "VF %d requested %d more queues, but only %d left.\n",
2519 vf->vf_id,
2520 req_pairs - cur_pairs,
2521 pf->queues_left);
2522 vfres->num_queue_pairs = pf->queues_left + cur_pairs;
2523 } else {
17a9422d 2524 /* successful request */
a3f5aa90 2525 vf->num_req_queues = req_pairs;
17a9422d
AB		 2526 i40e_vc_notify_vf_reset(vf);
2527 i40e_reset_vf(vf, false);
2528 return 0;
a3f5aa90
AB		 2529 }
2530
2531 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_REQUEST_QUEUES, 0,
c30bf8ce 2532 (u8 *)vfres, sizeof(*vfres));
a3f5aa90
AB		 2533}
2534
5c3c48ac
JB		 2535/**
2536 * i40e_vc_get_stats_msg
b40c82e6 2537 * @vf: pointer to the VF info
5c3c48ac 2538 * @msg: pointer to the msg buffer
5c3c48ac 2539 *
b40c82e6 2540 * called from the VF to get vsi stats
5c3c48ac 2541 **/
679b05c0 2542static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2543{
310a2ad9
JB		 2544 struct virtchnl_queue_select *vqs =
2545 (struct virtchnl_queue_select *)msg;
5c3c48ac
JB		 2546 struct i40e_pf *pf = vf->pf;
2547 struct i40e_eth_stats stats;
2548 i40e_status aq_ret = 0;
2549 struct i40e_vsi *vsi;
2550
2551 memset(&stats, 0, sizeof(struct i40e_eth_stats));
2552
6322e63c 2553 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2554 aq_ret = I40E_ERR_PARAM;
2555 goto error_param;
2556 }
2557
2558 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
2559 aq_ret = I40E_ERR_PARAM;
2560 goto error_param;
2561 }
2562
fdf0e0bf 2563 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2564 if (!vsi) {
2565 aq_ret = I40E_ERR_PARAM;
2566 goto error_param;
2567 }
2568 i40e_update_eth_stats(vsi);
5a9769c8 2569 stats = vsi->eth_stats;
5c3c48ac
JB		 2570
2571error_param:
b40c82e6 2572 /* send the response back to the VF */
310a2ad9 2573 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_STATS, aq_ret,
5c3c48ac
JB		 2574 (u8 *)&stats, sizeof(stats));
2575}
2576
06b6e2a2
AL		 2577/* If the VF is not trusted restrict the number of MAC/VLAN it can program
2578 * MAC filters: 16 for multicast, 1 for MAC, 1 for broadcast
2579 */
2580#define I40E_VC_MAX_MAC_ADDR_PER_VF (16 + 1 + 1)
51110f16 2581#define I40E_VC_MAX_VLAN_PER_VF 16
5f527ba9 2582
f657a6e1
GR		 2583/**
2584 * i40e_check_vf_permission
b40c82e6 2585 * @vf: pointer to the VF info
03ce7b1d 2586 * @al: MAC address list from virtchnl
f657a6e1 2587 *
03ce7b1d
FS		 2588 * Check that the given list of MAC addresses is allowed. Will return -EPERM
2589 * if any address in the list is not valid. Checks the following conditions:
2590 *
2591 * 1) broadcast and zero addresses are never valid
2592 * 2) unicast addresses are not allowed if the VMM has administratively set
2593 * the VF MAC address, unless the VF is marked as privileged.
2594 * 3) There is enough space to add all the addresses.
2595 *
2596 * Note that to guarantee consistency, it is expected this function be called
2597 * while holding the mac_filter_hash_lock, as otherwise the current number of
2598 * addresses might not be accurate.
f657a6e1 2599 **/
03ce7b1d
FS		 2600static inline int i40e_check_vf_permission(struct i40e_vf *vf,
2601 struct virtchnl_ether_addr_list *al)
f657a6e1
GR		 2602{
2603 struct i40e_pf *pf = vf->pf;
621650ca
AL		 2604 struct i40e_vsi *vsi = pf->vsi[vf->lan_vsi_idx];
2605 int mac2add_cnt = 0;
03ce7b1d
FS		 2606 int i;
2607
03ce7b1d 2608 for (i = 0; i < al->num_elements; i++) {
621650ca 2609 struct i40e_mac_filter *f;
03ce7b1d
FS		 2610 u8 *addr = al->list[i].addr;
2611
2612 if (is_broadcast_ether_addr(addr) ||
2613 is_zero_ether_addr(addr)) {
2614 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n",
2615 addr);
2616 return I40E_ERR_INVALID_MAC_ADDR;
2617 }
f657a6e1 2618
f657a6e1
GR		 2619 /* If the host VMM administrator has set the VF MAC address
2620 * administratively via the ndo_set_vf_mac command then deny
2621 * permission to the VF to add or delete unicast MAC addresses.
692fb0a7 2622 * Unless the VF is privileged and then it can do whatever.
5017c2a8
GR		 2623 * The VF may request to set the MAC address filter already
2624 * assigned to it so do not return an error in that case.
f657a6e1 2625 */
03ce7b1d
FS		 2626 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
2627 !is_multicast_ether_addr(addr) && vf->pf_set_mac &&
2628 !ether_addr_equal(addr, vf->default_lan_addr.addr)) {
2629 dev_err(&pf->pdev->dev,
ae1e29f6 2630 "VF attempting to override administratively set MAC address, bring down and up the VF interface to resume normal operation\n");
03ce7b1d
FS		 2631 return -EPERM;
2632 }
621650ca
AL		 2633
2634 /*count filters that really will be added*/
2635 f = i40e_find_mac(vsi, addr);
2636 if (!f)
2637 ++mac2add_cnt;
f657a6e1 2638 }
03ce7b1d 2639
621650ca
AL		 2640 /* If this VF is not privileged, then we can't add more than a limited
2641 * number of addresses. Check to make sure that the additions do not
2642 * push us over the limit.
2643 */
2644 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
2645 (i40e_count_filters(vsi) + mac2add_cnt) >
2646 I40E_VC_MAX_MAC_ADDR_PER_VF) {
2647 dev_err(&pf->pdev->dev,
2648 "Cannot add more MAC addresses, VF is not trusted, switch the VF to trusted to add more functionality\n");
2649 return -EPERM;
2650 }
03ce7b1d 2651 return 0;
f657a6e1
GR		 2652}
2653
5c3c48ac
JB		 2654/**
2655 * i40e_vc_add_mac_addr_msg
b40c82e6 2656 * @vf: pointer to the VF info
5c3c48ac 2657 * @msg: pointer to the msg buffer
5c3c48ac
JB		 2658 *
2659 * add guest mac address filter
2660 **/
679b05c0 2661static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2662{
310a2ad9
JB		 2663 struct virtchnl_ether_addr_list *al =
2664 (struct virtchnl_ether_addr_list *)msg;
5c3c48ac
JB		 2665 struct i40e_pf *pf = vf->pf;
2666 struct i40e_vsi *vsi = NULL;
f657a6e1 2667 i40e_status ret = 0;
5c3c48ac
JB		 2668 int i;
2669
6322e63c 2670 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d510497b 2671 !i40e_vc_isvalid_vsi_id(vf, al->vsi_id)) {
f657a6e1 2672 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2673 goto error_param;
2674 }
2675
fdf0e0bf 2676 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2677
21659035
KP		 2678 /* Lock once, because all function inside for loop accesses VSI's
2679 * MAC filter list which needs to be protected using same lock.
2680 */
278e7d0b 2681 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 2682
03ce7b1d
FS		 2683 ret = i40e_check_vf_permission(vf, al);
2684 if (ret) {
2685 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2686 goto error_param;
2687 }
2688
5c3c48ac
JB		 2689 /* add new addresses to the list */
2690 for (i = 0; i < al->num_elements; i++) {
2691 struct i40e_mac_filter *f;
2692
1bc87e80 2693 f = i40e_find_mac(vsi, al->list[i].addr);
34c164de 2694 if (!f) {
feffdbe4 2695 f = i40e_add_mac_filter(vsi, al->list[i].addr);
5c3c48ac 2696
34c164de
ZP		 2697 if (!f) {
2698 dev_err(&pf->pdev->dev,
2699 "Unable to add MAC filter %pM for VF %d\n",
2700 al->list[i].addr, vf->vf_id);
2701 ret = I40E_ERR_PARAM;
2702 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2703 goto error_param;
34c164de 2704 }
5c3c48ac
JB		 2705 }
2706 }
278e7d0b 2707 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2708
2709 /* program the updated filter list */
ea02e90b
MW		 2710 ret = i40e_sync_vsi_filters(vsi);
2711 if (ret)
2712 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2713 vf->vf_id, ret);
5c3c48ac
JB		 2714
2715error_param:
b40c82e6 2716 /* send the response to the VF */
310a2ad9 2717 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_ETH_ADDR,
f657a6e1 2718 ret);
5c3c48ac
JB		 2719}
2720
2721/**
2722 * i40e_vc_del_mac_addr_msg
b40c82e6 2723 * @vf: pointer to the VF info
5c3c48ac 2724 * @msg: pointer to the msg buffer
5c3c48ac
JB		 2725 *
2726 * remove guest mac address filter
2727 **/
679b05c0 2728static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2729{
310a2ad9
JB		 2730 struct virtchnl_ether_addr_list *al =
2731 (struct virtchnl_ether_addr_list *)msg;
5c3c48ac
JB		 2732 struct i40e_pf *pf = vf->pf;
2733 struct i40e_vsi *vsi = NULL;
f657a6e1 2734 i40e_status ret = 0;
5c3c48ac
JB		 2735 int i;
2736
6322e63c 2737 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d510497b 2738 !i40e_vc_isvalid_vsi_id(vf, al->vsi_id)) {
f657a6e1 2739 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2740 goto error_param;
2741 }
f657a6e1
GR		 2742
2743 for (i = 0; i < al->num_elements; i++) {
700bbf6c
MW		 2744 if (is_broadcast_ether_addr(al->list[i].addr) ||
2745 is_zero_ether_addr(al->list[i].addr)) {
8d8f2295
MW		 2746 dev_err(&pf->pdev->dev, "Invalid MAC addr %pM for VF %d\n",
2747 al->list[i].addr, vf->vf_id);
700bbf6c 2748 ret = I40E_ERR_INVALID_MAC_ADDR;
f657a6e1 2749 goto error_param;
700bbf6c 2750 }
f657a6e1 2751 }
fdf0e0bf 2752 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2753
278e7d0b 2754 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2755 /* delete addresses from the list */
2756 for (i = 0; i < al->num_elements; i++)
feffdbe4 2757 if (i40e_del_mac_filter(vsi, al->list[i].addr)) {
b36e9ab5 2758 ret = I40E_ERR_INVALID_MAC_ADDR;
278e7d0b 2759 spin_unlock_bh(&vsi->mac_filter_hash_lock);
b36e9ab5
MW		 2760 goto error_param;
2761 }
2762
278e7d0b 2763 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2764
2765 /* program the updated filter list */
ea02e90b
MW		 2766 ret = i40e_sync_vsi_filters(vsi);
2767 if (ret)
2768 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2769 vf->vf_id, ret);
5c3c48ac
JB		 2770
2771error_param:
b40c82e6 2772 /* send the response to the VF */
310a2ad9 2773 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_ETH_ADDR,
f657a6e1 2774 ret);
5c3c48ac
JB		 2775}
2776
2777/**
2778 * i40e_vc_add_vlan_msg
b40c82e6 2779 * @vf: pointer to the VF info
5c3c48ac 2780 * @msg: pointer to the msg buffer
5c3c48ac
JB		 2781 *
2782 * program guest vlan id
2783 **/
679b05c0 2784static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2785{
310a2ad9
JB		 2786 struct virtchnl_vlan_filter_list *vfl =
2787 (struct virtchnl_vlan_filter_list *)msg;
5c3c48ac
JB		 2788 struct i40e_pf *pf = vf->pf;
2789 struct i40e_vsi *vsi = NULL;
5c3c48ac
JB		 2790 i40e_status aq_ret = 0;
2791 int i;
2792
5f527ba9
ASJ		 2793 if ((vf->num_vlan >= I40E_VC_MAX_VLAN_PER_VF) &&
2794 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2795 dev_err(&pf->pdev->dev,
2796 "VF is not trusted, switch the VF to trusted to add more VLAN addresses\n");
2797 goto error_param;
2798 }
6322e63c 2799 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d510497b 2800 !i40e_vc_isvalid_vsi_id(vf, vfl->vsi_id)) {
5c3c48ac
JB		 2801 aq_ret = I40E_ERR_PARAM;
2802 goto error_param;
2803 }
2804
2805 for (i = 0; i < vfl->num_elements; i++) {
2806 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2807 aq_ret = I40E_ERR_PARAM;
2808 dev_err(&pf->pdev->dev,
2809 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
2810 goto error_param;
2811 }
2812 }
fdf0e0bf 2813 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2814 if (vsi->info.pvid) {
2815 aq_ret = I40E_ERR_PARAM;
2816 goto error_param;
2817 }
2818
2819 i40e_vlan_stripping_enable(vsi);
2820 for (i = 0; i < vfl->num_elements; i++) {
2821 /* add new VLAN filter */
2822 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
5f527ba9
ASJ		 2823 if (!ret)
2824 vf->num_vlan++;
6995b36c 2825
6322e63c 2826 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2827 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2828 true,
2829 vfl->vlan_id[i],
2830 NULL);
6322e63c 2831 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2832 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2833 true,
2834 vfl->vlan_id[i],
2835 NULL);
2836
5c3c48ac
JB		 2837 if (ret)
2838 dev_err(&pf->pdev->dev,
8d8f2295
MW		 2839 "Unable to add VLAN filter %d for VF %d, error %d\n",
2840 vfl->vlan_id[i], vf->vf_id, ret);
5c3c48ac
JB		 2841 }
2842
2843error_param:
b40c82e6 2844 /* send the response to the VF */
310a2ad9 2845 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_VLAN, aq_ret);
5c3c48ac
JB		 2846}
2847
2848/**
2849 * i40e_vc_remove_vlan_msg
b40c82e6 2850 * @vf: pointer to the VF info
5c3c48ac 2851 * @msg: pointer to the msg buffer
5c3c48ac
JB		 2852 *
2853 * remove programmed guest vlan id
2854 **/
679b05c0 2855static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2856{
310a2ad9
JB		 2857 struct virtchnl_vlan_filter_list *vfl =
2858 (struct virtchnl_vlan_filter_list *)msg;
5c3c48ac
JB		 2859 struct i40e_pf *pf = vf->pf;
2860 struct i40e_vsi *vsi = NULL;
5c3c48ac
JB		 2861 i40e_status aq_ret = 0;
2862 int i;
2863
6322e63c 2864 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d510497b 2865 !i40e_vc_isvalid_vsi_id(vf, vfl->vsi_id)) {
5c3c48ac
JB		 2866 aq_ret = I40E_ERR_PARAM;
2867 goto error_param;
2868 }
2869
2870 for (i = 0; i < vfl->num_elements; i++) {
2871 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2872 aq_ret = I40E_ERR_PARAM;
2873 goto error_param;
2874 }
2875 }
2876
fdf0e0bf 2877 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2878 if (vsi->info.pvid) {
5a189f15
AL		 2879 if (vfl->num_elements > 1 || vfl->vlan_id[0])
2880 aq_ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2881 goto error_param;
2882 }
2883
2884 for (i = 0; i < vfl->num_elements; i++) {
3aa7b74d
FS		 2885 i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
2886 vf->num_vlan--;
6995b36c 2887
6322e63c 2888 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2889 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2890 false,
2891 vfl->vlan_id[i],
2892 NULL);
6322e63c 2893 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2894 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2895 false,
2896 vfl->vlan_id[i],
2897 NULL);
5c3c48ac
JB		 2898 }
2899
2900error_param:
b40c82e6 2901 /* send the response to the VF */
310a2ad9 2902 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_VLAN, aq_ret);
5c3c48ac
JB		 2903}
2904
e3219ce6
ASJ		 2905/**
2906 * i40e_vc_iwarp_msg
2907 * @vf: pointer to the VF info
2908 * @msg: pointer to the msg buffer
2909 * @msglen: msg length
2910 *
2911 * called from the VF for the iwarp msgs
2912 **/
2913static int i40e_vc_iwarp_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2914{
2915 struct i40e_pf *pf = vf->pf;
2916 int abs_vf_id = vf->vf_id + pf->hw.func_caps.vf_base_id;
2917 i40e_status aq_ret = 0;
2918
6322e63c
JK		 2919 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2920 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2921 aq_ret = I40E_ERR_PARAM;
2922 goto error_param;
2923 }
2924
2925 i40e_notify_client_of_vf_msg(pf->vsi[pf->lan_vsi], abs_vf_id,
2926 msg, msglen);
2927
2928error_param:
2929 /* send the response to the VF */
310a2ad9 2930 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_IWARP,
e3219ce6
ASJ		 2931 aq_ret);
2932}
2933
2934/**
2935 * i40e_vc_iwarp_qvmap_msg
2936 * @vf: pointer to the VF info
2937 * @msg: pointer to the msg buffer
e3219ce6
ASJ		 2938 * @config: config qvmap or release it
2939 *
2940 * called from the VF for the iwarp msgs
2941 **/
679b05c0 2942static int i40e_vc_iwarp_qvmap_msg(struct i40e_vf *vf, u8 *msg, bool config)
e3219ce6 2943{
310a2ad9
JB		 2944 struct virtchnl_iwarp_qvlist_info *qvlist_info =
2945 (struct virtchnl_iwarp_qvlist_info *)msg;
e3219ce6
ASJ		 2946 i40e_status aq_ret = 0;
2947
6322e63c
JK		 2948 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2949 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2950 aq_ret = I40E_ERR_PARAM;
2951 goto error_param;
2952 }
2953
2954 if (config) {
2955 if (i40e_config_iwarp_qvlist(vf, qvlist_info))
2956 aq_ret = I40E_ERR_PARAM;
2957 } else {
2958 i40e_release_iwarp_qvlist(vf);
2959 }
2960
2961error_param:
2962 /* send the response to the VF */
2963 return i40e_vc_send_resp_to_vf(vf,
310a2ad9
JB		 2964 config ? VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP :
2965 VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP,
e3219ce6
ASJ		 2966 aq_ret);
2967}
2968
c4e1868c
MW		 2969/**
2970 * i40e_vc_config_rss_key
2971 * @vf: pointer to the VF info
2972 * @msg: pointer to the msg buffer
c4e1868c
MW		 2973 *
2974 * Configure the VF's RSS key
2975 **/
679b05c0 2976static int i40e_vc_config_rss_key(struct i40e_vf *vf, u8 *msg)
c4e1868c 2977{
310a2ad9
JB		 2978 struct virtchnl_rss_key *vrk =
2979 (struct virtchnl_rss_key *)msg;
c4e1868c
MW		 2980 struct i40e_pf *pf = vf->pf;
2981 struct i40e_vsi *vsi = NULL;
c4e1868c
MW		 2982 i40e_status aq_ret = 0;
2983
6322e63c 2984 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d510497b 2985 !i40e_vc_isvalid_vsi_id(vf, vrk->vsi_id) ||
c4e1868c
MW		 2986 (vrk->key_len != I40E_HKEY_ARRAY_SIZE)) {
2987 aq_ret = I40E_ERR_PARAM;
2988 goto err;
2989 }
2990
2991 vsi = pf->vsi[vf->lan_vsi_idx];
2992 aq_ret = i40e_config_rss(vsi, vrk->key, NULL, 0);
2993err:
2994 /* send the response to the VF */
310a2ad9 2995 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_KEY,
c4e1868c
MW		 2996 aq_ret);
2997}
2998
2999/**
3000 * i40e_vc_config_rss_lut
3001 * @vf: pointer to the VF info
3002 * @msg: pointer to the msg buffer
c4e1868c
MW		 3003 *
3004 * Configure the VF's RSS LUT
3005 **/
679b05c0 3006static int i40e_vc_config_rss_lut(struct i40e_vf *vf, u8 *msg)
c4e1868c 3007{
310a2ad9
JB		 3008 struct virtchnl_rss_lut *vrl =
3009 (struct virtchnl_rss_lut *)msg;
c4e1868c
MW		 3010 struct i40e_pf *pf = vf->pf;
3011 struct i40e_vsi *vsi = NULL;
c4e1868c 3012 i40e_status aq_ret = 0;
d510497b 3013 u16 i;
c4e1868c 3014
6322e63c 3015 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d510497b 3016 !i40e_vc_isvalid_vsi_id(vf, vrl->vsi_id) ||
c4e1868c
MW		 3017 (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)) {
3018 aq_ret = I40E_ERR_PARAM;
3019 goto err;
3020 }
3021
d510497b
SN		 3022 for (i = 0; i < vrl->lut_entries; i++)
3023 if (vrl->lut[i] >= vf->num_queue_pairs) {
3024 aq_ret = I40E_ERR_PARAM;
3025 goto err;
3026 }
3027
c4e1868c
MW		 3028 vsi = pf->vsi[vf->lan_vsi_idx];
3029 aq_ret = i40e_config_rss(vsi, NULL, vrl->lut, I40E_VF_HLUT_ARRAY_SIZE);
3030 /* send the response to the VF */
3031err:
310a2ad9 3032 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_LUT,
c4e1868c
MW		 3033 aq_ret);
3034}
3035
3036/**
3037 * i40e_vc_get_rss_hena
3038 * @vf: pointer to the VF info
3039 * @msg: pointer to the msg buffer
c4e1868c
MW		 3040 *
3041 * Return the RSS HENA bits allowed by the hardware
3042 **/
679b05c0 3043static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg)
c4e1868c 3044{
310a2ad9 3045 struct virtchnl_rss_hena *vrh = NULL;
c4e1868c
MW		 3046 struct i40e_pf *pf = vf->pf;
3047 i40e_status aq_ret = 0;
3048 int len = 0;
3049
6322e63c 3050 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 3051 aq_ret = I40E_ERR_PARAM;
3052 goto err;
3053 }
310a2ad9 3054 len = sizeof(struct virtchnl_rss_hena);
c4e1868c
MW		 3055
3056 vrh = kzalloc(len, GFP_KERNEL);
3057 if (!vrh) {
3058 aq_ret = I40E_ERR_NO_MEMORY;
3059 len = 0;
3060 goto err;
3061 }
3062 vrh->hena = i40e_pf_get_default_rss_hena(pf);
3063err:
3064 /* send the response back to the VF */
310a2ad9 3065 aq_ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_RSS_HENA_CAPS,
c4e1868c 3066 aq_ret, (u8 *)vrh, len);
b7d2cd95 3067 kfree(vrh);
c4e1868c
MW		 3068 return aq_ret;
3069}
3070
3071/**
3072 * i40e_vc_set_rss_hena
3073 * @vf: pointer to the VF info
3074 * @msg: pointer to the msg buffer
c4e1868c
MW		 3075 *
3076 * Set the RSS HENA bits for the VF
3077 **/
679b05c0 3078static int i40e_vc_set_rss_hena(struct i40e_vf *vf, u8 *msg)
c4e1868c 3079{
310a2ad9
JB		 3080 struct virtchnl_rss_hena *vrh =
3081 (struct virtchnl_rss_hena *)msg;
c4e1868c
MW		 3082 struct i40e_pf *pf = vf->pf;
3083 struct i40e_hw *hw = &pf->hw;
3084 i40e_status aq_ret = 0;
3085
6322e63c 3086 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 3087 aq_ret = I40E_ERR_PARAM;
3088 goto err;
3089 }
3090 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)vrh->hena);
3091 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_id),
3092 (u32)(vrh->hena >> 32));
3093
3094 /* send the response to the VF */
3095err:
f0adc6e8 3096 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_SET_RSS_HENA, aq_ret);
c4e1868c
MW		 3097}
3098
8774370d
MS		 3099/**
3100 * i40e_vc_enable_vlan_stripping
3101 * @vf: pointer to the VF info
3102 * @msg: pointer to the msg buffer
8774370d
MS		 3103 *
3104 * Enable vlan header stripping for the VF
3105 **/
679b05c0 3106static int i40e_vc_enable_vlan_stripping(struct i40e_vf *vf, u8 *msg)
8774370d 3107{
8774370d 3108 i40e_status aq_ret = 0;
d510497b 3109 struct i40e_vsi *vsi;
8774370d
MS		 3110
3111 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3112 aq_ret = I40E_ERR_PARAM;
3113 goto err;
3114 }
3115
d510497b 3116 vsi = vf->pf->vsi[vf->lan_vsi_idx];
8774370d
MS		 3117 i40e_vlan_stripping_enable(vsi);
3118
3119 /* send the response to the VF */
3120err:
3121 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_VLAN_STRIPPING,
3122 aq_ret);
3123}
3124
3125/**
3126 * i40e_vc_disable_vlan_stripping
3127 * @vf: pointer to the VF info
3128 * @msg: pointer to the msg buffer
8774370d
MS		 3129 *
3130 * Disable vlan header stripping for the VF
3131 **/
679b05c0 3132static int i40e_vc_disable_vlan_stripping(struct i40e_vf *vf, u8 *msg)
8774370d 3133{
8774370d 3134 i40e_status aq_ret = 0;
d510497b 3135 struct i40e_vsi *vsi;
8774370d
MS		 3136
3137 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3138 aq_ret = I40E_ERR_PARAM;
3139 goto err;
3140 }
3141
d510497b 3142 vsi = vf->pf->vsi[vf->lan_vsi_idx];
8774370d
MS		 3143 i40e_vlan_stripping_disable(vsi);
3144
3145 /* send the response to the VF */
3146err:
3147 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_VLAN_STRIPPING,
3148 aq_ret);
3149}
3150
e284fc28
AD		 3151/**
3152 * i40e_validate_cloud_filter
3153 * @mask: mask for TC filter
3154 * @data: data for TC filter
3155 *
3156 * This function validates cloud filter programmed as TC filter for ADq
3157 **/
3158static int i40e_validate_cloud_filter(struct i40e_vf *vf,
3159 struct virtchnl_filter *tc_filter)
3160{
3161 struct virtchnl_l4_spec mask = tc_filter->mask.tcp_spec;
3162 struct virtchnl_l4_spec data = tc_filter->data.tcp_spec;
3163 struct i40e_pf *pf = vf->pf;
3164 struct i40e_vsi *vsi = NULL;
3165 struct i40e_mac_filter *f;
3166 struct hlist_node *h;
3167 bool found = false;
3168 int bkt;
3169
3170 if (!tc_filter->action) {
3171 dev_info(&pf->pdev->dev,
3172 "VF %d: Currently ADq doesn't support Drop Action\n",
3173 vf->vf_id);
3174 goto err;
3175 }
3176
3177 /* action_meta is TC number here to which the filter is applied */
3178 if (!tc_filter->action_meta ||
3179 tc_filter->action_meta > I40E_MAX_VF_VSI) {
3180 dev_info(&pf->pdev->dev, "VF %d: Invalid TC number %u\n",
3181 vf->vf_id, tc_filter->action_meta);
3182 goto err;
3183 }
3184
3185 /* Check filter if it's programmed for advanced mode or basic mode.
3186 * There are two ADq modes (for VF only),
3187 * 1. Basic mode: intended to allow as many filter options as possible
3188 * to be added to a VF in Non-trusted mode. Main goal is
3189 * to add filters to its own MAC and VLAN id.
3190 * 2. Advanced mode: is for allowing filters to be applied other than
3191 * its own MAC or VLAN. This mode requires the VF to be
3192 * Trusted.
3193 */
3194 if (mask.dst_mac[0] && !mask.dst_ip[0]) {
3195 vsi = pf->vsi[vf->lan_vsi_idx];
3196 f = i40e_find_mac(vsi, data.dst_mac);
3197
3198 if (!f) {
3199 dev_info(&pf->pdev->dev,
3200 "Destination MAC %pM doesn't belong to VF %d\n",
3201 data.dst_mac, vf->vf_id);
3202 goto err;
3203 }
3204
3205 if (mask.vlan_id) {
3206 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f,
3207 hlist) {
3208 if (f->vlan == ntohs(data.vlan_id)) {
3209 found = true;
3210 break;
3211 }
3212 }
3213 if (!found) {
3214 dev_info(&pf->pdev->dev,
3215 "VF %d doesn't have any VLAN id %u\n",
3216 vf->vf_id, ntohs(data.vlan_id));
3217 goto err;
3218 }
3219 }
3220 } else {
3221 /* Check if VF is trusted */
3222 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
3223 dev_err(&pf->pdev->dev,
3224 "VF %d not trusted, make VF trusted to add advanced mode ADq cloud filters\n",
3225 vf->vf_id);
3226 return I40E_ERR_CONFIG;
3227 }
3228 }
3229
3230 if (mask.dst_mac[0] & data.dst_mac[0]) {
3231 if (is_broadcast_ether_addr(data.dst_mac) ||
3232 is_zero_ether_addr(data.dst_mac)) {
3233 dev_info(&pf->pdev->dev, "VF %d: Invalid Dest MAC addr %pM\n",
3234 vf->vf_id, data.dst_mac);
3235 goto err;
3236 }
3237 }
3238
3239 if (mask.src_mac[0] & data.src_mac[0]) {
3240 if (is_broadcast_ether_addr(data.src_mac) ||
3241 is_zero_ether_addr(data.src_mac)) {
3242 dev_info(&pf->pdev->dev, "VF %d: Invalid Source MAC addr %pM\n",
3243 vf->vf_id, data.src_mac);
3244 goto err;
3245 }
3246 }
3247
3248 if (mask.dst_port & data.dst_port) {
a01e5f22 3249 if (!data.dst_port) {
e284fc28
AD		 3250 dev_info(&pf->pdev->dev, "VF %d: Invalid Dest port\n",
3251 vf->vf_id);
3252 goto err;
3253 }
3254 }
3255
3256 if (mask.src_port & data.src_port) {
a01e5f22 3257 if (!data.src_port) {
e284fc28
AD		 3258 dev_info(&pf->pdev->dev, "VF %d: Invalid Source port\n",
3259 vf->vf_id);
3260 goto err;
3261 }
3262 }
3263
3264 if (tc_filter->flow_type != VIRTCHNL_TCP_V6_FLOW &&
3265 tc_filter->flow_type != VIRTCHNL_TCP_V4_FLOW) {
3266 dev_info(&pf->pdev->dev, "VF %d: Invalid Flow type\n",
3267 vf->vf_id);
3268 goto err;
3269 }
3270
3271 if (mask.vlan_id & data.vlan_id) {
3272 if (ntohs(data.vlan_id) > I40E_MAX_VLANID) {
3273 dev_info(&pf->pdev->dev, "VF %d: invalid VLAN ID\n",
3274 vf->vf_id);
3275 goto err;
3276 }
3277 }
3278
3279 return I40E_SUCCESS;
3280err:
3281 return I40E_ERR_CONFIG;
3282}
3283
3284/**
3285 * i40e_find_vsi_from_seid - searches for the vsi with the given seid
3286 * @vf: pointer to the VF info
3287 * @seid - seid of the vsi it is searching for
3288 **/
3289static struct i40e_vsi *i40e_find_vsi_from_seid(struct i40e_vf *vf, u16 seid)
3290{
3291 struct i40e_pf *pf = vf->pf;
3292 struct i40e_vsi *vsi = NULL;
3293 int i;
3294
3295 for (i = 0; i < vf->num_tc ; i++) {
3296 vsi = i40e_find_vsi_from_id(pf, vf->ch[i].vsi_id);
46345b38 3297 if (vsi && vsi->seid == seid)
e284fc28
AD		 3298 return vsi;
3299 }
3300 return NULL;
3301}
3302
3303/**
3304 * i40e_del_all_cloud_filters
3305 * @vf: pointer to the VF info
3306 *
3307 * This function deletes all cloud filters
3308 **/
3309static void i40e_del_all_cloud_filters(struct i40e_vf *vf)
3310{
3311 struct i40e_cloud_filter *cfilter = NULL;
3312 struct i40e_pf *pf = vf->pf;
3313 struct i40e_vsi *vsi = NULL;
3314 struct hlist_node *node;
3315 int ret;
3316
3317 hlist_for_each_entry_safe(cfilter, node,
3318 &vf->cloud_filter_list, cloud_node) {
3319 vsi = i40e_find_vsi_from_seid(vf, cfilter->seid);
3320
3321 if (!vsi) {
3322 dev_err(&pf->pdev->dev, "VF %d: no VSI found for matching %u seid, can't delete cloud filter\n",
3323 vf->vf_id, cfilter->seid);
3324 continue;
3325 }
3326
3327 if (cfilter->dst_port)
3328 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
3329 false);
3330 else
3331 ret = i40e_add_del_cloud_filter(vsi, cfilter, false);
3332 if (ret)
3333 dev_err(&pf->pdev->dev,
3334 "VF %d: Failed to delete cloud filter, err %s aq_err %s\n",
3335 vf->vf_id, i40e_stat_str(&pf->hw, ret),
3336 i40e_aq_str(&pf->hw,
3337 pf->hw.aq.asq_last_status));
3338
3339 hlist_del(&cfilter->cloud_node);
3340 kfree(cfilter);
3341 vf->num_cloud_filters--;
3342 }
3343}
3344
3345/**
3346 * i40e_vc_del_cloud_filter
3347 * @vf: pointer to the VF info
3348 * @msg: pointer to the msg buffer
3349 *
3350 * This function deletes a cloud filter programmed as TC filter for ADq
3351 **/
3352static int i40e_vc_del_cloud_filter(struct i40e_vf *vf, u8 *msg)
3353{
3354 struct virtchnl_filter *vcf = (struct virtchnl_filter *)msg;
3355 struct virtchnl_l4_spec mask = vcf->mask.tcp_spec;
3356 struct virtchnl_l4_spec tcf = vcf->data.tcp_spec;
3357 struct i40e_cloud_filter cfilter, *cf = NULL;
3358 struct i40e_pf *pf = vf->pf;
3359 struct i40e_vsi *vsi = NULL;
3360 struct hlist_node *node;
3361 i40e_status aq_ret = 0;
3362 int i, ret;
3363
3364 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3365 aq_ret = I40E_ERR_PARAM;
3366 goto err;
3367 }
3368
3369 if (!vf->adq_enabled) {
3370 dev_info(&pf->pdev->dev,
3371 "VF %d: ADq not enabled, can't apply cloud filter\n",
3372 vf->vf_id);
3373 aq_ret = I40E_ERR_PARAM;
3374 goto err;
3375 }
3376
3377 if (i40e_validate_cloud_filter(vf, vcf)) {
3378 dev_info(&pf->pdev->dev,
3379 "VF %d: Invalid input, can't apply cloud filter\n",
3380 vf->vf_id);
5dd3691c
DC		 3381 aq_ret = I40E_ERR_PARAM;
3382 goto err;
e284fc28
AD		 3383 }
3384
3385 memset(&cfilter, 0, sizeof(cfilter));
3386 /* parse destination mac address */
3387 for (i = 0; i < ETH_ALEN; i++)
3388 cfilter.dst_mac[i] = mask.dst_mac[i] & tcf.dst_mac[i];
3389
3390 /* parse source mac address */
3391 for (i = 0; i < ETH_ALEN; i++)
3392 cfilter.src_mac[i] = mask.src_mac[i] & tcf.src_mac[i];
3393
3394 cfilter.vlan_id = mask.vlan_id & tcf.vlan_id;
3395 cfilter.dst_port = mask.dst_port & tcf.dst_port;
3396 cfilter.src_port = mask.src_port & tcf.src_port;
3397
3398 switch (vcf->flow_type) {
3399 case VIRTCHNL_TCP_V4_FLOW:
3400 cfilter.n_proto = ETH_P_IP;
3401 if (mask.dst_ip[0] & tcf.dst_ip[0])
3402 memcpy(&cfilter.ip.v4.dst_ip, tcf.dst_ip,
3403 ARRAY_SIZE(tcf.dst_ip));
3404 else if (mask.src_ip[0] & tcf.dst_ip[0])
3405 memcpy(&cfilter.ip.v4.src_ip, tcf.src_ip,
3406 ARRAY_SIZE(tcf.dst_ip));
3407 break;
3408 case VIRTCHNL_TCP_V6_FLOW:
3409 cfilter.n_proto = ETH_P_IPV6;
3410 if (mask.dst_ip[3] & tcf.dst_ip[3])
3411 memcpy(&cfilter.ip.v6.dst_ip6, tcf.dst_ip,
3412 sizeof(cfilter.ip.v6.dst_ip6));
3413 if (mask.src_ip[3] & tcf.src_ip[3])
3414 memcpy(&cfilter.ip.v6.src_ip6, tcf.src_ip,
3415 sizeof(cfilter.ip.v6.src_ip6));
3416 break;
3417 default:
3418 /* TC filter can be configured based on different combinations
3419 * and in this case IP is not a part of filter config
3420 */
3421 dev_info(&pf->pdev->dev, "VF %d: Flow type not configured\n",
3422 vf->vf_id);
3423 }
3424
3425 /* get the vsi to which the tc belongs to */
3426 vsi = pf->vsi[vf->ch[vcf->action_meta].vsi_idx];
3427 cfilter.seid = vsi->seid;
3428 cfilter.flags = vcf->field_flags;
3429
3430 /* Deleting TC filter */
3431 if (tcf.dst_port)
3432 ret = i40e_add_del_cloud_filter_big_buf(vsi, &cfilter, false);
3433 else
3434 ret = i40e_add_del_cloud_filter(vsi, &cfilter, false);
3435 if (ret) {
3436 dev_err(&pf->pdev->dev,
3437 "VF %d: Failed to delete cloud filter, err %s aq_err %s\n",
3438 vf->vf_id, i40e_stat_str(&pf->hw, ret),
3439 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
3440 goto err;
3441 }
3442
3443 hlist_for_each_entry_safe(cf, node,
3444 &vf->cloud_filter_list, cloud_node) {
3445 if (cf->seid != cfilter.seid)
3446 continue;
3447 if (mask.dst_port)
3448 if (cfilter.dst_port != cf->dst_port)
3449 continue;
3450 if (mask.dst_mac[0])
3451 if (!ether_addr_equal(cf->src_mac, cfilter.src_mac))
3452 continue;
3453 /* for ipv4 data to be valid, only first byte of mask is set */
3454 if (cfilter.n_proto == ETH_P_IP && mask.dst_ip[0])
3455 if (memcmp(&cfilter.ip.v4.dst_ip, &cf->ip.v4.dst_ip,
3456 ARRAY_SIZE(tcf.dst_ip)))
3457 continue;
3458 /* for ipv6, mask is set for all sixteen bytes (4 words) */
3459 if (cfilter.n_proto == ETH_P_IPV6 && mask.dst_ip[3])
3460 if (memcmp(&cfilter.ip.v6.dst_ip6, &cf->ip.v6.dst_ip6,
3461 sizeof(cfilter.ip.v6.src_ip6)))
3462 continue;
3463 if (mask.vlan_id)
3464 if (cfilter.vlan_id != cf->vlan_id)
3465 continue;
3466
3467 hlist_del(&cf->cloud_node);
3468 kfree(cf);
3469 vf->num_cloud_filters--;
3470 }
3471
3472err:
3473 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_CLOUD_FILTER,
3474 aq_ret);
3475}
3476
3477/**
3478 * i40e_vc_add_cloud_filter
3479 * @vf: pointer to the VF info
3480 * @msg: pointer to the msg buffer
3481 *
3482 * This function adds a cloud filter programmed as TC filter for ADq
3483 **/
3484static int i40e_vc_add_cloud_filter(struct i40e_vf *vf, u8 *msg)
3485{
3486 struct virtchnl_filter *vcf = (struct virtchnl_filter *)msg;
3487 struct virtchnl_l4_spec mask = vcf->mask.tcp_spec;
3488 struct virtchnl_l4_spec tcf = vcf->data.tcp_spec;
3489 struct i40e_cloud_filter *cfilter = NULL;
3490 struct i40e_pf *pf = vf->pf;
3491 struct i40e_vsi *vsi = NULL;
3492 i40e_status aq_ret = 0;
3493 int i, ret;
3494
3495 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3496 aq_ret = I40E_ERR_PARAM;
24474f27 3497 goto err_out;
e284fc28
AD		 3498 }
3499
3500 if (!vf->adq_enabled) {
3501 dev_info(&pf->pdev->dev,
3502 "VF %d: ADq is not enabled, can't apply cloud filter\n",
3503 vf->vf_id);
3504 aq_ret = I40E_ERR_PARAM;
24474f27 3505 goto err_out;
e284fc28
AD		 3506 }
3507
3508 if (i40e_validate_cloud_filter(vf, vcf)) {
3509 dev_info(&pf->pdev->dev,
3510 "VF %d: Invalid input/s, can't apply cloud filter\n",
3511 vf->vf_id);
d1b3fa86 3512 aq_ret = I40E_ERR_PARAM;
24474f27 3513 goto err_out;
e284fc28
AD		 3514 }
3515
3516 cfilter = kzalloc(sizeof(*cfilter), GFP_KERNEL);
3517 if (!cfilter)
3518 return -ENOMEM;
3519
3520 /* parse destination mac address */
3521 for (i = 0; i < ETH_ALEN; i++)
3522 cfilter->dst_mac[i] = mask.dst_mac[i] & tcf.dst_mac[i];
3523
3524 /* parse source mac address */
3525 for (i = 0; i < ETH_ALEN; i++)
3526 cfilter->src_mac[i] = mask.src_mac[i] & tcf.src_mac[i];
3527
3528 cfilter->vlan_id = mask.vlan_id & tcf.vlan_id;
3529 cfilter->dst_port = mask.dst_port & tcf.dst_port;
3530 cfilter->src_port = mask.src_port & tcf.src_port;
3531
3532 switch (vcf->flow_type) {
3533 case VIRTCHNL_TCP_V4_FLOW:
3534 cfilter->n_proto = ETH_P_IP;
3535 if (mask.dst_ip[0] & tcf.dst_ip[0])
3536 memcpy(&cfilter->ip.v4.dst_ip, tcf.dst_ip,
3537 ARRAY_SIZE(tcf.dst_ip));
3538 else if (mask.src_ip[0] & tcf.dst_ip[0])
3539 memcpy(&cfilter->ip.v4.src_ip, tcf.src_ip,
3540 ARRAY_SIZE(tcf.dst_ip));
3541 break;
3542 case VIRTCHNL_TCP_V6_FLOW:
3543 cfilter->n_proto = ETH_P_IPV6;
3544 if (mask.dst_ip[3] & tcf.dst_ip[3])
3545 memcpy(&cfilter->ip.v6.dst_ip6, tcf.dst_ip,
3546 sizeof(cfilter->ip.v6.dst_ip6));
3547 if (mask.src_ip[3] & tcf.src_ip[3])
3548 memcpy(&cfilter->ip.v6.src_ip6, tcf.src_ip,
3549 sizeof(cfilter->ip.v6.src_ip6));
3550 break;
3551 default:
3552 /* TC filter can be configured based on different combinations
3553 * and in this case IP is not a part of filter config
3554 */
3555 dev_info(&pf->pdev->dev, "VF %d: Flow type not configured\n",
3556 vf->vf_id);
3557 }
3558
3559 /* get the VSI to which the TC belongs to */
3560 vsi = pf->vsi[vf->ch[vcf->action_meta].vsi_idx];
3561 cfilter->seid = vsi->seid;
3562 cfilter->flags = vcf->field_flags;
3563
3564 /* Adding cloud filter programmed as TC filter */
3565 if (tcf.dst_port)
3566 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter, true);
3567 else
3568 ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
3569 if (ret) {
3570 dev_err(&pf->pdev->dev,
3571 "VF %d: Failed to add cloud filter, err %s aq_err %s\n",
3572 vf->vf_id, i40e_stat_str(&pf->hw, ret),
3573 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
24474f27 3574 goto err_free;
e284fc28
AD		 3575 }
3576
3577 INIT_HLIST_NODE(&cfilter->cloud_node);
3578 hlist_add_head(&cfilter->cloud_node, &vf->cloud_filter_list);
24474f27
MS		 3579 /* release the pointer passing it to the collection */
3580 cfilter = NULL;
e284fc28 3581 vf->num_cloud_filters++;
24474f27
MS		 3582err_free:
3583 kfree(cfilter);
3584err_out:
e284fc28
AD		 3585 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_CLOUD_FILTER,
3586 aq_ret);
3587}
3588
c27eac48
AD		 3589/**
3590 * i40e_vc_add_qch_msg: Add queue channel and enable ADq
3591 * @vf: pointer to the VF info
3592 * @msg: pointer to the msg buffer
3593 **/
3594static int i40e_vc_add_qch_msg(struct i40e_vf *vf, u8 *msg)
3595{
3596 struct virtchnl_tc_info *tci =
3597 (struct virtchnl_tc_info *)msg;
3598 struct i40e_pf *pf = vf->pf;
0c483bd4 3599 struct i40e_link_status *ls = &pf->hw.phy.link_info;
d510497b 3600 int i, adq_request_qps = 0;
c27eac48 3601 i40e_status aq_ret = 0;
d510497b 3602 u64 speed = 0;
c27eac48
AD		 3603
3604 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3605 aq_ret = I40E_ERR_PARAM;
3606 goto err;
3607 }
3608
3609 /* ADq cannot be applied if spoof check is ON */
3610 if (vf->spoofchk) {
3611 dev_err(&pf->pdev->dev,
3612 "Spoof check is ON, turn it OFF to enable ADq\n");
3613 aq_ret = I40E_ERR_PARAM;
3614 goto err;
3615 }
3616
3617 if (!(vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ADQ)) {
3618 dev_err(&pf->pdev->dev,
3619 "VF %d attempting to enable ADq, but hasn't properly negotiated that capability\n",
3620 vf->vf_id);
3621 aq_ret = I40E_ERR_PARAM;
3622 goto err;
3623 }
3624
3625 /* max number of traffic classes for VF currently capped at 4 */
3626 if (!tci->num_tc || tci->num_tc > I40E_MAX_VF_VSI) {
3627 dev_err(&pf->pdev->dev,
d510497b
SN		 3628 "VF %d trying to set %u TCs, valid range 1-%u TCs per VF\n",
3629 vf->vf_id, tci->num_tc, I40E_MAX_VF_VSI);
c27eac48
AD		 3630 aq_ret = I40E_ERR_PARAM;
3631 goto err;
3632 }
3633
3634 /* validate queues for each TC */
3635 for (i = 0; i < tci->num_tc; i++)
3636 if (!tci->list[i].count ||
3637 tci->list[i].count > I40E_DEFAULT_QUEUES_PER_VF) {
3638 dev_err(&pf->pdev->dev,
d510497b
SN		 3639 "VF %d: TC %d trying to set %u queues, valid range 1-%u queues per TC\n",
3640 vf->vf_id, i, tci->list[i].count,
3641 I40E_DEFAULT_QUEUES_PER_VF);
c27eac48
AD		 3642 aq_ret = I40E_ERR_PARAM;
3643 goto err;
3644 }
3645
3646 /* need Max VF queues but already have default number of queues */
3647 adq_request_qps = I40E_MAX_VF_QUEUES - I40E_DEFAULT_QUEUES_PER_VF;
3648
3649 if (pf->queues_left < adq_request_qps) {
3650 dev_err(&pf->pdev->dev,
3651 "No queues left to allocate to VF %d\n",
3652 vf->vf_id);
3653 aq_ret = I40E_ERR_PARAM;
3654 goto err;
3655 } else {
3656 /* we need to allocate max VF queues to enable ADq so as to
3657 * make sure ADq enabled VF always gets back queues when it
3658 * goes through a reset.
3659 */
3660 vf->num_queue_pairs = I40E_MAX_VF_QUEUES;
3661 }
3662
0c483bd4
AD		 3663 /* get link speed in MB to validate rate limit */
3664 switch (ls->link_speed) {
3665 case VIRTCHNL_LINK_SPEED_100MB:
3666 speed = SPEED_100;
3667 break;
3668 case VIRTCHNL_LINK_SPEED_1GB:
3669 speed = SPEED_1000;
3670 break;
3671 case VIRTCHNL_LINK_SPEED_10GB:
3672 speed = SPEED_10000;
3673 break;
3674 case VIRTCHNL_LINK_SPEED_20GB:
3675 speed = SPEED_20000;
3676 break;
3677 case VIRTCHNL_LINK_SPEED_25GB:
3678 speed = SPEED_25000;
3679 break;
3680 case VIRTCHNL_LINK_SPEED_40GB:
3681 speed = SPEED_40000;
3682 break;
3683 default:
3684 dev_err(&pf->pdev->dev,
3685 "Cannot detect link speed\n");
3686 aq_ret = I40E_ERR_PARAM;
3687 goto err;
3688 }
3689
c27eac48
AD		 3690 /* parse data from the queue channel info */
3691 vf->num_tc = tci->num_tc;
0c483bd4
AD		 3692 for (i = 0; i < vf->num_tc; i++) {
3693 if (tci->list[i].max_tx_rate) {
3694 if (tci->list[i].max_tx_rate > speed) {
3695 dev_err(&pf->pdev->dev,
3696 "Invalid max tx rate %llu specified for VF %d.",
3697 tci->list[i].max_tx_rate,
3698 vf->vf_id);
3699 aq_ret = I40E_ERR_PARAM;
3700 goto err;
3701 } else {
3702 vf->ch[i].max_tx_rate =
3703 tci->list[i].max_tx_rate;
3704 }
3705 }
c27eac48 3706 vf->ch[i].num_qps = tci->list[i].count;
0c483bd4 3707 }
c27eac48
AD		 3708
3709 /* set this flag only after making sure all inputs are sane */
3710 vf->adq_enabled = true;
e284fc28
AD		 3711 /* num_req_queues is set when user changes number of queues via ethtool
3712 * and this causes issue for default VSI(which depends on this variable)
3713 * when ADq is enabled, hence reset it.
3714 */
3715 vf->num_req_queues = 0;
c27eac48
AD		 3716
3717 /* reset the VF in order to allocate resources */
3718 i40e_vc_notify_vf_reset(vf);
3719 i40e_reset_vf(vf, false);
3720
3721 return I40E_SUCCESS;
3722
3723 /* send the response to the VF */
3724err:
3725 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_CHANNELS,
3726 aq_ret);
3727}
3728
c4998aa3
AD		 3729/**
3730 * i40e_vc_del_qch_msg
3731 * @vf: pointer to the VF info
3732 * @msg: pointer to the msg buffer
3733 **/
3734static int i40e_vc_del_qch_msg(struct i40e_vf *vf, u8 *msg)
3735{
3736 struct i40e_pf *pf = vf->pf;
3737 i40e_status aq_ret = 0;
3738
3739 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3740 aq_ret = I40E_ERR_PARAM;
3741 goto err;
3742 }
3743
3744 if (vf->adq_enabled) {
e284fc28 3745 i40e_del_all_cloud_filters(vf);
c4998aa3
AD		 3746 i40e_del_qch(vf);
3747 vf->adq_enabled = false;
3748 vf->num_tc = 0;
3749 dev_info(&pf->pdev->dev,
e284fc28 3750 "Deleting Queue Channels and cloud filters for ADq on VF %d\n",
c4998aa3
AD		 3751 vf->vf_id);
3752 } else {
3753 dev_info(&pf->pdev->dev, "VF %d trying to delete queue channels but ADq isn't enabled\n",
3754 vf->vf_id);
3755 aq_ret = I40E_ERR_PARAM;
3756 }
3757
3758 /* reset the VF in order to allocate resources */
3759 i40e_vc_notify_vf_reset(vf);
3760 i40e_reset_vf(vf, false);
3761
3762 return I40E_SUCCESS;
3763
3764err:
3765 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_CHANNELS,
3766 aq_ret);
3767}
3768
5c3c48ac
JB		 3769/**
3770 * i40e_vc_process_vf_msg
b40c82e6
JK		 3771 * @pf: pointer to the PF structure
3772 * @vf_id: source VF id
f5254429
JK		 3773 * @v_opcode: operation code
3774 * @v_retval: unused return value code
5c3c48ac
JB		 3775 * @msg: pointer to the msg buffer
3776 * @msglen: msg length
5c3c48ac
JB		 3777 *
3778 * called from the common aeq/arq handler to
b40c82e6 3779 * process request from VF
5c3c48ac 3780 **/
a1b5a24f 3781int i40e_vc_process_vf_msg(struct i40e_pf *pf, s16 vf_id, u32 v_opcode,
f5254429 3782 u32 __always_unused v_retval, u8 *msg, u16 msglen)
5c3c48ac 3783{
5c3c48ac 3784 struct i40e_hw *hw = &pf->hw;
a1b5a24f 3785 int local_vf_id = vf_id - (s16)hw->func_caps.vf_base_id;
6c1b5bff 3786 struct i40e_vf *vf;
5c3c48ac
JB		 3787 int ret;
3788
3789 pf->vf_aq_requests++;
3f8af412 3790 if (local_vf_id < 0 || local_vf_id >= pf->num_alloc_vfs)
6c1b5bff 3791 return -EINVAL;
7efa84b7 3792 vf = &(pf->vf[local_vf_id]);
260e9382
JB		 3793
3794 /* Check if VF is disabled. */
3795 if (test_bit(I40E_VF_STATE_DISABLED, &vf->vf_states))
3796 return I40E_ERR_PARAM;
3797
5c3c48ac 3798 /* perform basic checks on the msg */
735e35c5 3799 ret = virtchnl_vc_validate_vf_msg(&vf->vf_ver, v_opcode, msg, msglen);
5c3c48ac
JB		 3800
3801 if (ret) {
764430ce 3802 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
b40c82e6 3803 dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n",
7efa84b7 3804 local_vf_id, v_opcode, msglen);
764430ce 3805 switch (ret) {
bb58fd7e 3806 case VIRTCHNL_STATUS_ERR_PARAM:
764430ce
JB		 3807 return -EPERM;
3808 default:
3809 return -EINVAL;
3810 }
5c3c48ac 3811 }
bae3cae4 3812
5c3c48ac 3813 switch (v_opcode) {
310a2ad9 3814 case VIRTCHNL_OP_VERSION:
f4ca1a22 3815 ret = i40e_vc_get_version_msg(vf, msg);
5c3c48ac 3816 break;
310a2ad9 3817 case VIRTCHNL_OP_GET_VF_RESOURCES:
f4ca1a22 3818 ret = i40e_vc_get_vf_resources_msg(vf, msg);
d3d657a9 3819 i40e_vc_notify_vf_link_state(vf);
5c3c48ac 3820 break;
310a2ad9 3821 case VIRTCHNL_OP_RESET_VF:
fc18eaa0
MW		 3822 i40e_vc_reset_vf_msg(vf);
3823 ret = 0;
5c3c48ac 3824 break;
310a2ad9 3825 case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
679b05c0 3826 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg);
5c3c48ac 3827 break;
310a2ad9 3828 case VIRTCHNL_OP_CONFIG_VSI_QUEUES:
679b05c0 3829 ret = i40e_vc_config_queues_msg(vf, msg);
5c3c48ac 3830 break;
310a2ad9 3831 case VIRTCHNL_OP_CONFIG_IRQ_MAP:
679b05c0 3832 ret = i40e_vc_config_irq_map_msg(vf, msg);
5c3c48ac 3833 break;
310a2ad9 3834 case VIRTCHNL_OP_ENABLE_QUEUES:
679b05c0 3835 ret = i40e_vc_enable_queues_msg(vf, msg);
055b295d 3836 i40e_vc_notify_vf_link_state(vf);
5c3c48ac 3837 break;
310a2ad9 3838 case VIRTCHNL_OP_DISABLE_QUEUES:
679b05c0 3839 ret = i40e_vc_disable_queues_msg(vf, msg);
5c3c48ac 3840 break;
310a2ad9 3841 case VIRTCHNL_OP_ADD_ETH_ADDR:
679b05c0 3842 ret = i40e_vc_add_mac_addr_msg(vf, msg);
5c3c48ac 3843 break;
310a2ad9 3844 case VIRTCHNL_OP_DEL_ETH_ADDR:
679b05c0 3845 ret = i40e_vc_del_mac_addr_msg(vf, msg);
5c3c48ac 3846 break;
310a2ad9 3847 case VIRTCHNL_OP_ADD_VLAN:
679b05c0 3848 ret = i40e_vc_add_vlan_msg(vf, msg);
5c3c48ac 3849 break;
310a2ad9 3850 case VIRTCHNL_OP_DEL_VLAN:
679b05c0 3851 ret = i40e_vc_remove_vlan_msg(vf, msg);
5c3c48ac 3852 break;
310a2ad9 3853 case VIRTCHNL_OP_GET_STATS:
679b05c0 3854 ret = i40e_vc_get_stats_msg(vf, msg);
5c3c48ac 3855 break;
310a2ad9 3856 case VIRTCHNL_OP_IWARP:
e3219ce6
ASJ		 3857 ret = i40e_vc_iwarp_msg(vf, msg, msglen);
3858 break;
310a2ad9 3859 case VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
679b05c0 3860 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, true);
e3219ce6 3861 break;
310a2ad9 3862 case VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
679b05c0 3863 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, false);
e3219ce6 3864 break;
310a2ad9 3865 case VIRTCHNL_OP_CONFIG_RSS_KEY:
679b05c0 3866 ret = i40e_vc_config_rss_key(vf, msg);
c4e1868c 3867 break;
310a2ad9 3868 case VIRTCHNL_OP_CONFIG_RSS_LUT:
679b05c0 3869 ret = i40e_vc_config_rss_lut(vf, msg);
c4e1868c 3870 break;
310a2ad9 3871 case VIRTCHNL_OP_GET_RSS_HENA_CAPS:
679b05c0 3872 ret = i40e_vc_get_rss_hena(vf, msg);
c4e1868c 3873 break;
310a2ad9 3874 case VIRTCHNL_OP_SET_RSS_HENA:
679b05c0 3875 ret = i40e_vc_set_rss_hena(vf, msg);
c4e1868c 3876 break;
8774370d 3877 case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING:
679b05c0 3878 ret = i40e_vc_enable_vlan_stripping(vf, msg);
8774370d
MS		 3879 break;
3880 case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING:
679b05c0 3881 ret = i40e_vc_disable_vlan_stripping(vf, msg);
8774370d 3882 break;
a3f5aa90 3883 case VIRTCHNL_OP_REQUEST_QUEUES:
679b05c0 3884 ret = i40e_vc_request_queues_msg(vf, msg);
a3f5aa90 3885 break;
c27eac48
AD		 3886 case VIRTCHNL_OP_ENABLE_CHANNELS:
3887 ret = i40e_vc_add_qch_msg(vf, msg);
3888 break;
c4998aa3
AD		 3889 case VIRTCHNL_OP_DISABLE_CHANNELS:
3890 ret = i40e_vc_del_qch_msg(vf, msg);
3891 break;
e284fc28
AD		 3892 case VIRTCHNL_OP_ADD_CLOUD_FILTER:
3893 ret = i40e_vc_add_cloud_filter(vf, msg);
3894 break;
3895 case VIRTCHNL_OP_DEL_CLOUD_FILTER:
3896 ret = i40e_vc_del_cloud_filter(vf, msg);
3897 break;
310a2ad9 3898 case VIRTCHNL_OP_UNKNOWN:
5c3c48ac 3899 default:
b40c82e6 3900 dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n",
7efa84b7 3901 v_opcode, local_vf_id);
5c3c48ac
JB		 3902 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
3903 I40E_ERR_NOT_IMPLEMENTED);
3904 break;
3905 }
3906
3907 return ret;
3908}
3909
3910/**
3911 * i40e_vc_process_vflr_event
b40c82e6 3912 * @pf: pointer to the PF structure
5c3c48ac
JB		 3913 *
3914 * called from the vlfr irq handler to
b40c82e6 3915 * free up VF resources and state variables
5c3c48ac
JB		 3916 **/
3917int i40e_vc_process_vflr_event(struct i40e_pf *pf)
3918{
5c3c48ac 3919 struct i40e_hw *hw = &pf->hw;
a1b5a24f 3920 u32 reg, reg_idx, bit_idx;
5c3c48ac 3921 struct i40e_vf *vf;
a1b5a24f 3922 int vf_id;
5c3c48ac 3923
0da36b97 3924 if (!test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
5c3c48ac
JB		 3925 return 0;
3926
0d790327
MW		 3927 /* Re-enable the VFLR interrupt cause here, before looking for which
3928 * VF got reset. Otherwise, if another VF gets a reset while the
3929 * first one is being processed, that interrupt will be lost, and
3930 * that VF will be stuck in reset forever.
3931 */
c5c2f7c3
MW		 3932 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
3933 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
3934 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
3935 i40e_flush(hw);
3936
0da36b97 3937 clear_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
5c3c48ac
JB		 3938 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
3939 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
3940 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
b40c82e6 3941 /* read GLGEN_VFLRSTAT register to find out the flr VFs */
5c3c48ac
JB		 3942 vf = &pf->vf[vf_id];
3943 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
7369ca87 3944 if (reg & BIT(bit_idx))
7e5a313e 3945 /* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */
7369ca87 3946 i40e_reset_vf(vf, true);
5c3c48ac
JB		 3947 }
3948
5c3c48ac
JB		 3949 return 0;
3950}
3951
ed277c50
HR		 3952/**
3953 * i40e_validate_vf
3954 * @pf: the physical function
3955 * @vf_id: VF identifier
3956 *
3957 * Check that the VF is enabled and the VSI exists.
3958 *
3959 * Returns 0 on success, negative on failure
3960 **/
3961static int i40e_validate_vf(struct i40e_pf *pf, int vf_id)
3962{
3963 struct i40e_vsi *vsi;
3964 struct i40e_vf *vf;
3965 int ret = 0;
3966
3967 if (vf_id >= pf->num_alloc_vfs) {
3968 dev_err(&pf->pdev->dev,
3969 "Invalid VF Identifier %d\n", vf_id);
3970 ret = -EINVAL;
3971 goto err_out;
3972 }
3973 vf = &pf->vf[vf_id];
3974 vsi = i40e_find_vsi_from_id(pf, vf->lan_vsi_id);
3975 if (!vsi)
3976 ret = -EINVAL;
3977err_out:
3978 return ret;
3979}
3980
5c3c48ac
JB		 3981/**
3982 * i40e_ndo_set_vf_mac
3983 * @netdev: network interface device structure
b40c82e6 3984 * @vf_id: VF identifier
5c3c48ac
JB		 3985 * @mac: mac address
3986 *
b40c82e6 3987 * program VF mac address
5c3c48ac
JB		 3988 **/
3989int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
3990{
3991 struct i40e_netdev_priv *np = netdev_priv(netdev);
3992 struct i40e_vsi *vsi = np->vsi;
3993 struct i40e_pf *pf = vsi->back;
3994 struct i40e_mac_filter *f;
3995 struct i40e_vf *vf;
3996 int ret = 0;
784548c4 3997 struct hlist_node *h;
278e7d0b 3998 int bkt;
028daf80 3999 u8 i;
5c3c48ac 4000
80598e62
LY		 4001 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4002 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4003 return -EAGAIN;
4004 }
4005
5c3c48ac 4006 /* validate the request */
ed277c50
HR		 4007 ret = i40e_validate_vf(pf, vf_id);
4008 if (ret)
5c3c48ac 4009 goto error_param;
5c3c48ac 4010
ed277c50 4011 vf = &pf->vf[vf_id];
fdf0e0bf 4012 vsi = pf->vsi[vf->lan_vsi_idx];
028daf80
PJ		 4013
4014 /* When the VF is resetting wait until it is done.
4015 * It can take up to 200 milliseconds,
4016 * but wait for up to 300 milliseconds to be safe.
9889707b
SL		 4017 * If the VF is indeed in reset, the vsi pointer has
4018 * to show on the newly loaded vsi under pf->vsi[id].
028daf80
PJ		 4019 */
4020 for (i = 0; i < 15; i++) {
9889707b
SL		 4021 if (test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
4022 if (i > 0)
4023 vsi = pf->vsi[vf->lan_vsi_idx];
028daf80 4024 break;
9889707b 4025 }
028daf80
PJ		 4026 msleep(20);
4027 }
6322e63c 4028 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4029 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4030 vf_id);
4031 ret = -EAGAIN;
5c3c48ac
JB		 4032 goto error_param;
4033 }
4034
efd8e39a 4035 if (is_multicast_ether_addr(mac)) {
5c3c48ac 4036 dev_err(&pf->pdev->dev,
efd8e39a 4037 "Invalid Ethernet address %pM for VF %d\n", mac, vf_id);
5c3c48ac
JB		 4038 ret = -EINVAL;
4039 goto error_param;
4040 }
4041
21659035 4042 /* Lock once because below invoked function add/del_filter requires
278e7d0b 4043 * mac_filter_hash_lock to be held
21659035 4044 */
278e7d0b 4045 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 4046
5c3c48ac 4047 /* delete the temporary mac address */
efd8e39a 4048 if (!is_zero_ether_addr(vf->default_lan_addr.addr))
9569a9a4 4049 i40e_del_mac_filter(vsi, vf->default_lan_addr.addr);
5c3c48ac 4050
29f71bb0
GR		 4051 /* Delete all the filters for this VSI - we're going to kill it
4052 * anyway.
4053 */
784548c4 4054 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
148141bb 4055 __i40e_del_filter(vsi, f);
5c3c48ac 4056
278e7d0b 4057 spin_unlock_bh(&vsi->mac_filter_hash_lock);
21659035 4058
5c3c48ac 4059 /* program mac filter */
17652c63 4060 if (i40e_sync_vsi_filters(vsi)) {
5c3c48ac
JB		 4061 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
4062 ret = -EIO;
4063 goto error_param;
4064 }
9a173901 4065 ether_addr_copy(vf->default_lan_addr.addr, mac);
2f1d86e4
SA		 4066
4067 if (is_zero_ether_addr(mac)) {
4068 vf->pf_set_mac = false;
4069 dev_info(&pf->pdev->dev, "Removing MAC on VF %d\n", vf_id);
4070 } else {
4071 vf->pf_set_mac = true;
4072 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n",
4073 mac, vf_id);
4074 }
4075
ae1e29f6
PJ		 4076 /* Force the VF interface down so it has to bring up with new MAC
4077 * address
4078 */
eeeddbb8 4079 i40e_vc_disable_vf(vf);
ae1e29f6 4080 dev_info(&pf->pdev->dev, "Bring down and up the VF interface to make this change effective.\n");
5c3c48ac
JB		 4081
4082error_param:
f5a7b21b 4083 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
5c3c48ac
JB		 4084 return ret;
4085}
4086
ba4e003d
JK		 4087/**
4088 * i40e_vsi_has_vlans - True if VSI has configured VLANs
4089 * @vsi: pointer to the vsi
4090 *
4091 * Check if a VSI has configured any VLANs. False if we have a port VLAN or if
4092 * we have no configured VLANs. Do not call while holding the
4093 * mac_filter_hash_lock.
4094 */
4095static bool i40e_vsi_has_vlans(struct i40e_vsi *vsi)
4096{
4097 bool have_vlans;
4098
4099 /* If we have a port VLAN, then the VSI cannot have any VLANs
4100 * configured, as all MAC/VLAN filters will be assigned to the PVID.
4101 */
4102 if (vsi->info.pvid)
4103 return false;
4104
4105 /* Since we don't have a PVID, we know that if the device is in VLAN
4106 * mode it must be because of a VLAN filter configured on this VSI.
4107 */
4108 spin_lock_bh(&vsi->mac_filter_hash_lock);
4109 have_vlans = i40e_is_vsi_in_vlan(vsi);
4110 spin_unlock_bh(&vsi->mac_filter_hash_lock);
4111
4112 return have_vlans;
4113}
4114
5c3c48ac
JB		 4115/**
4116 * i40e_ndo_set_vf_port_vlan
4117 * @netdev: network interface device structure
b40c82e6 4118 * @vf_id: VF identifier
5c3c48ac
JB		 4119 * @vlan_id: mac address
4120 * @qos: priority setting
79aab093 4121 * @vlan_proto: vlan protocol
5c3c48ac 4122 *
b40c82e6 4123 * program VF vlan id and/or qos
5c3c48ac 4124 **/
79aab093
MS		 4125int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, int vf_id,
4126 u16 vlan_id, u8 qos, __be16 vlan_proto)
5c3c48ac 4127{
f7fc2f2e 4128 u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT);
5c3c48ac 4129 struct i40e_netdev_priv *np = netdev_priv(netdev);
937f599a 4130 bool allmulti = false, alluni = false;
5c3c48ac
JB		 4131 struct i40e_pf *pf = np->vsi->back;
4132 struct i40e_vsi *vsi;
4133 struct i40e_vf *vf;
4134 int ret = 0;
4135
f5a7b21b
JS		 4136 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4137 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4138 return -EAGAIN;
4139 }
4140
5c3c48ac 4141 /* validate the request */
ed277c50
HR		 4142 ret = i40e_validate_vf(pf, vf_id);
4143 if (ret)
5c3c48ac 4144 goto error_pvid;
5c3c48ac
JB		 4145
4146 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
4147 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
4148 ret = -EINVAL;
4149 goto error_pvid;
4150 }
4151
79aab093
MS		 4152 if (vlan_proto != htons(ETH_P_8021Q)) {
4153 dev_err(&pf->pdev->dev, "VF VLAN protocol is not supported\n");
4154 ret = -EPROTONOSUPPORT;
4155 goto error_pvid;
4156 }
4157
ed277c50 4158 vf = &pf->vf[vf_id];
fdf0e0bf 4159 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 4160 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4161 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4162 vf_id);
4163 ret = -EAGAIN;
5c3c48ac
JB		 4164 goto error_pvid;
4165 }
4166
f7fc2f2e 4167 if (le16_to_cpu(vsi->info.pvid) == vlanprio)
85927ec1
MW		 4168 /* duplicate request, so just return success */
4169 goto error_pvid;
4170
ba4e003d 4171 if (i40e_vsi_has_vlans(vsi)) {
99a4973c
GR		 4172 dev_err(&pf->pdev->dev,
4173 "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
4174 vf_id);
f9b4b627
GR		 4175 /* Administrator Error - knock the VF offline until he does
4176 * the right thing by reconfiguring his network correctly
4177 * and then reloading the VF driver.
4178 */
eeeddbb8 4179 i40e_vc_disable_vf(vf);
35f3472a
MW		 4180 /* During reset the VF got a new VSI, so refresh the pointer. */
4181 vsi = pf->vsi[vf->lan_vsi_idx];
f9b4b627 4182 }
99a4973c 4183
ba4e003d
JK		 4184 /* Locked once because multiple functions below iterate list */
4185 spin_lock_bh(&vsi->mac_filter_hash_lock);
4186
8d82a7c5
GR		 4187 /* Check for condition where there was already a port VLAN ID
4188 * filter set and now it is being deleted by setting it to zero.
1315f7c3
GR		 4189 * Additionally check for the condition where there was a port
4190 * VLAN but now there is a new and different port VLAN being set.
8d82a7c5
GR		 4191 * Before deleting all the old VLAN filters we must add new ones
4192 * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our
4193 * MAC addresses deleted.
4194 */
1315f7c3 4195 if ((!(vlan_id || qos) ||
f7fc2f2e 4196 vlanprio != le16_to_cpu(vsi->info.pvid)) &&
9af52f60
JK		 4197 vsi->info.pvid) {
4198 ret = i40e_add_vlan_all_mac(vsi, I40E_VLAN_ANY);
4199 if (ret) {
4200 dev_info(&vsi->back->pdev->dev,
4201 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
4202 vsi->back->hw.aq.asq_last_status);
4203 spin_unlock_bh(&vsi->mac_filter_hash_lock);
4204 goto error_pvid;
4205 }
4206 }
8d82a7c5 4207
5c3c48ac 4208 if (vsi->info.pvid) {
9af52f60
JK		 4209 /* remove all filters on the old VLAN */
4210 i40e_rm_vlan_all_mac(vsi, (le16_to_cpu(vsi->info.pvid) &
4211 VLAN_VID_MASK));
5c3c48ac 4212 }
9af52f60 4213
640f93cc 4214 spin_unlock_bh(&vsi->mac_filter_hash_lock);
937f599a
GS		 4215
4216 /* disable promisc modes in case they were enabled */
4217 ret = i40e_config_vf_promiscuous_mode(vf, vf->lan_vsi_id,
4218 allmulti, alluni);
4219 if (ret) {
4220 dev_err(&pf->pdev->dev, "Unable to config VF promiscuous mode\n");
4221 goto error_pvid;
4222 }
4223
5c3c48ac 4224 if (vlan_id || qos)
f7fc2f2e 4225 ret = i40e_vsi_add_pvid(vsi, vlanprio);
5c3c48ac 4226 else
6c12fcbf 4227 i40e_vsi_remove_pvid(vsi);
640f93cc 4228 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 4229
4230 if (vlan_id) {
4231 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
4232 vlan_id, qos, vf_id);
4233
9af52f60
JK		 4234 /* add new VLAN filter for each MAC */
4235 ret = i40e_add_vlan_all_mac(vsi, vlan_id);
5c3c48ac
JB		 4236 if (ret) {
4237 dev_info(&vsi->back->pdev->dev,
4238 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
4239 vsi->back->hw.aq.asq_last_status);
9af52f60 4240 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 4241 goto error_pvid;
4242 }
9af52f60
JK		 4243
4244 /* remove the previously added non-VLAN MAC filters */
4245 i40e_rm_vlan_all_mac(vsi, I40E_VLAN_ANY);
5c3c48ac
JB		 4246 }
4247
9af52f60
JK		 4248 spin_unlock_bh(&vsi->mac_filter_hash_lock);
4249
937f599a
GS		 4250 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
4251 alluni = true;
4252
4253 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
4254 allmulti = true;
4255
9af52f60
JK		 4256 /* Schedule the worker thread to take care of applying changes */
4257 i40e_service_event_schedule(vsi->back);
4258
5c3c48ac
JB		 4259 if (ret) {
4260 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
4261 goto error_pvid;
4262 }
9af52f60 4263
6c12fcbf
GR		 4264 /* The Port VLAN needs to be saved across resets the same as the
4265 * default LAN MAC address.
4266 */
4267 vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
937f599a
GS		 4268
4269 ret = i40e_config_vf_promiscuous_mode(vf, vsi->id, allmulti, alluni);
4270 if (ret) {
4271 dev_err(&pf->pdev->dev, "Unable to config vf promiscuous mode\n");
4272 goto error_pvid;
4273 }
4274
5c3c48ac
JB		 4275 ret = 0;
4276
4277error_pvid:
f5a7b21b 4278 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
5c3c48ac
JB		 4279 return ret;
4280}
4281
4282/**
4283 * i40e_ndo_set_vf_bw
4284 * @netdev: network interface device structure
b40c82e6 4285 * @vf_id: VF identifier
f5254429
JK		 4286 * @min_tx_rate: Minimum Tx rate
4287 * @max_tx_rate: Maximum Tx rate
5c3c48ac 4288 *
b40c82e6 4289 * configure VF Tx rate
5c3c48ac 4290 **/
ed616689
SC		 4291int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
4292 int max_tx_rate)
5c3c48ac 4293{
6b192891
MW		 4294 struct i40e_netdev_priv *np = netdev_priv(netdev);
4295 struct i40e_pf *pf = np->vsi->back;
4296 struct i40e_vsi *vsi;
4297 struct i40e_vf *vf;
6b192891
MW		 4298 int ret = 0;
4299
f5a7b21b
JS		 4300 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4301 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4302 return -EAGAIN;
4303 }
4304
6b192891 4305 /* validate the request */
ed277c50
HR		 4306 ret = i40e_validate_vf(pf, vf_id);
4307 if (ret)
6b192891 4308 goto error;
6b192891 4309
ed616689 4310 if (min_tx_rate) {
b40c82e6 4311 dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n",
ed616689 4312 min_tx_rate, vf_id);
8ad2e298
SA		 4313 ret = -EINVAL;
4314 goto error;
ed616689
SC		 4315 }
4316
ed277c50 4317 vf = &pf->vf[vf_id];
fdf0e0bf 4318 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 4319 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4320 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4321 vf_id);
4322 ret = -EAGAIN;
6b192891
MW		 4323 goto error;
4324 }
4325
5ecae412
AN		 4326 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
4327 if (ret)
6b192891 4328 goto error;
dac9b31a 4329
ed616689 4330 vf->tx_rate = max_tx_rate;
6b192891 4331error:
f5a7b21b 4332 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
6b192891 4333 return ret;
5c3c48ac
JB		 4334}
4335
4336/**
4337 * i40e_ndo_get_vf_config
4338 * @netdev: network interface device structure
b40c82e6
JK		 4339 * @vf_id: VF identifier
4340 * @ivi: VF configuration structure
5c3c48ac 4341 *
b40c82e6 4342 * return VF configuration
5c3c48ac
JB		 4343 **/
4344int i40e_ndo_get_vf_config(struct net_device *netdev,
4345 int vf_id, struct ifla_vf_info *ivi)
4346{
4347 struct i40e_netdev_priv *np = netdev_priv(netdev);
5c3c48ac
JB		 4348 struct i40e_vsi *vsi = np->vsi;
4349 struct i40e_pf *pf = vsi->back;
4350 struct i40e_vf *vf;
4351 int ret = 0;
4352
f5a7b21b
JS		 4353 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4354 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4355 return -EAGAIN;
4356 }
4357
5c3c48ac 4358 /* validate the request */
ed277c50
HR		 4359 ret = i40e_validate_vf(pf, vf_id);
4360 if (ret)
5c3c48ac 4361 goto error_param;
5c3c48ac 4362
ed277c50 4363 vf = &pf->vf[vf_id];
5c3c48ac 4364 /* first vsi is always the LAN vsi */
fdf0e0bf 4365 vsi = pf->vsi[vf->lan_vsi_idx];
745b32c1
LY		 4366 if (!vsi) {
4367 ret = -ENOENT;
5c3c48ac
JB		 4368 goto error_param;
4369 }
4370
4371 ivi->vf = vf_id;
4372
6995b36c 4373 ether_addr_copy(ivi->mac, vf->default_lan_addr.addr);
5c3c48ac 4374
ed616689
SC		 4375 ivi->max_tx_rate = vf->tx_rate;
4376 ivi->min_tx_rate = 0;
5c3c48ac
JB		 4377 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
4378 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
4379 I40E_VLAN_PRIORITY_SHIFT;
84ca55a0
MW		 4380 if (vf->link_forced == false)
4381 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
4382 else if (vf->link_up == true)
4383 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
4384 else
4385 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
c674d125 4386 ivi->spoofchk = vf->spoofchk;
d40062f3 4387 ivi->trusted = vf->trusted;
5c3c48ac
JB		 4388 ret = 0;
4389
4390error_param:
f5a7b21b 4391 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
5c3c48ac
JB		 4392 return ret;
4393}
588aefa0
MW		 4394
4395/**
4396 * i40e_ndo_set_vf_link_state
4397 * @netdev: network interface device structure
b40c82e6 4398 * @vf_id: VF identifier
588aefa0
MW		 4399 * @link: required link state
4400 *
4401 * Set the link state of a specified VF, regardless of physical link state
4402 **/
4403int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
4404{
4405 struct i40e_netdev_priv *np = netdev_priv(netdev);
4406 struct i40e_pf *pf = np->vsi->back;
310a2ad9 4407 struct virtchnl_pf_event pfe;
588aefa0
MW		 4408 struct i40e_hw *hw = &pf->hw;
4409 struct i40e_vf *vf;
f19efbb5 4410 int abs_vf_id;
588aefa0
MW		 4411 int ret = 0;
4412
f5a7b21b
JS		 4413 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4414 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4415 return -EAGAIN;
4416 }
4417
588aefa0
MW		 4418 /* validate the request */
4419 if (vf_id >= pf->num_alloc_vfs) {
4420 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
4421 ret = -EINVAL;
4422 goto error_out;
4423 }
4424
4425 vf = &pf->vf[vf_id];
f19efbb5 4426 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
588aefa0 4427
310a2ad9 4428 pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
ff3f4cc2 4429 pfe.severity = PF_EVENT_SEVERITY_INFO;
588aefa0
MW		 4430
4431 switch (link) {
4432 case IFLA_VF_LINK_STATE_AUTO:
4433 vf->link_forced = false;
4434 pfe.event_data.link_event.link_status =
4435 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
4436 pfe.event_data.link_event.link_speed =
ff3f4cc2 4437 (enum virtchnl_link_speed)
588aefa0
MW		 4438 pf->hw.phy.link_info.link_speed;
4439 break;
4440 case IFLA_VF_LINK_STATE_ENABLE:
4441 vf->link_forced = true;
4442 vf->link_up = true;
4443 pfe.event_data.link_event.link_status = true;
43ade6ad 4444 pfe.event_data.link_event.link_speed = VIRTCHNL_LINK_SPEED_40GB;
588aefa0
MW		 4445 break;
4446 case IFLA_VF_LINK_STATE_DISABLE:
4447 vf->link_forced = true;
4448 vf->link_up = false;
4449 pfe.event_data.link_event.link_status = false;
4450 pfe.event_data.link_event.link_speed = 0;
4451 break;
4452 default:
4453 ret = -EINVAL;
4454 goto error_out;
4455 }
4456 /* Notify the VF of its new link state */
310a2ad9 4457 i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
588aefa0
MW		 4458 0, (u8 *)&pfe, sizeof(pfe), NULL);
4459
4460error_out:
f5a7b21b 4461 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
588aefa0
MW		 4462 return ret;
4463}
c674d125
MW		 4464
4465/**
4466 * i40e_ndo_set_vf_spoofchk
4467 * @netdev: network interface device structure
b40c82e6 4468 * @vf_id: VF identifier
c674d125
MW		 4469 * @enable: flag to enable or disable feature
4470 *
4471 * Enable or disable VF spoof checking
4472 **/
e6d9004d 4473int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable)
c674d125
MW		 4474{
4475 struct i40e_netdev_priv *np = netdev_priv(netdev);
4476 struct i40e_vsi *vsi = np->vsi;
4477 struct i40e_pf *pf = vsi->back;
4478 struct i40e_vsi_context ctxt;
4479 struct i40e_hw *hw = &pf->hw;
4480 struct i40e_vf *vf;
4481 int ret = 0;
4482
f5a7b21b
JS		 4483 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4484 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4485 return -EAGAIN;
4486 }
4487
c674d125
MW		 4488 /* validate the request */
4489 if (vf_id >= pf->num_alloc_vfs) {
4490 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
4491 ret = -EINVAL;
4492 goto out;
4493 }
4494
4495 vf = &(pf->vf[vf_id]);
6322e63c 4496 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4497 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4498 vf_id);
4499 ret = -EAGAIN;
4500 goto out;
4501 }
c674d125
MW		 4502
4503 if (enable == vf->spoofchk)
4504 goto out;
4505
4506 vf->spoofchk = enable;
4507 memset(&ctxt, 0, sizeof(ctxt));
fdf0e0bf 4508 ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid;
c674d125
MW		 4509 ctxt.pf_num = pf->hw.pf_id;
4510 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
4511 if (enable)
30d71af5
GR		 4512 ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
4513 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
c674d125
MW		 4514 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
4515 if (ret) {
4516 dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
4517 ret);
4518 ret = -EIO;
4519 }
4520out:
f5a7b21b 4521 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
c674d125
MW		 4522 return ret;
4523}
c3bbbd20
ASJ		 4524
4525/**
4526 * i40e_ndo_set_vf_trust
4527 * @netdev: network interface device structure of the pf
4528 * @vf_id: VF identifier
4529 * @setting: trust setting
4530 *
4531 * Enable or disable VF trust setting
4532 **/
4533int i40e_ndo_set_vf_trust(struct net_device *netdev, int vf_id, bool setting)
4534{
4535 struct i40e_netdev_priv *np = netdev_priv(netdev);
4536 struct i40e_pf *pf = np->vsi->back;
4537 struct i40e_vf *vf;
4538 int ret = 0;
4539
f5a7b21b
JS		 4540 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4541 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4542 return -EAGAIN;
4543 }
4544
c3bbbd20
ASJ		 4545 /* validate the request */
4546 if (vf_id >= pf->num_alloc_vfs) {
4547 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
f5a7b21b
JS		 4548 ret = -EINVAL;
4549 goto out;
c3bbbd20
ASJ		 4550 }
4551
4552 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4553 dev_err(&pf->pdev->dev, "Trusted VF not supported in MFP mode.\n");
f5a7b21b
JS		 4554 ret = -EINVAL;
4555 goto out;
c3bbbd20
ASJ		 4556 }
4557
4558 vf = &pf->vf[vf_id];
4559
c3bbbd20
ASJ		 4560 if (setting == vf->trusted)
4561 goto out;
4562
4563 vf->trusted = setting;
f18d2021 4564 i40e_vc_disable_vf(vf);
c3bbbd20
ASJ		 4565 dev_info(&pf->pdev->dev, "VF %u is now %strusted\n",
4566 vf_id, setting ? "" : "un");
e284fc28
AD		 4567
4568 if (vf->adq_enabled) {
4569 if (!vf->trusted) {
4570 dev_info(&pf->pdev->dev,
4571 "VF %u no longer Trusted, deleting all cloud filters\n",
4572 vf_id);
4573 i40e_del_all_cloud_filters(vf);
4574 }
4575 }
4576
c3bbbd20 4577out:
f5a7b21b 4578 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
c3bbbd20
ASJ		 4579 return ret;
4580}
dc645dae
JB		 4581
4582/**
4583 * i40e_get_vf_stats - populate some stats for the VF
4584 * @netdev: the netdev of the PF
4585 * @vf_id: the host OS identifier (0-127)
4586 * @vf_stats: pointer to the OS memory to be initialized
4587 */
4588int i40e_get_vf_stats(struct net_device *netdev, int vf_id,
4589 struct ifla_vf_stats *vf_stats)
4590{
4591 struct i40e_netdev_priv *np = netdev_priv(netdev);
4592 struct i40e_pf *pf = np->vsi->back;
4593 struct i40e_eth_stats *stats;
4594 struct i40e_vsi *vsi;
4595 struct i40e_vf *vf;
4596
4597 /* validate the request */
4598 if (i40e_validate_vf(pf, vf_id))
4599 return -EINVAL;
4600
4601 vf = &pf->vf[vf_id];
4602 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
4603 dev_err(&pf->pdev->dev, "VF %d in reset. Try again.\n", vf_id);
4604 return -EBUSY;
4605 }
4606
4607 vsi = pf->vsi[vf->lan_vsi_idx];
4608 if (!vsi)
4609 return -EINVAL;
4610
4611 i40e_update_eth_stats(vsi);
4612 stats = &vsi->eth_stats;
4613
4614 memset(vf_stats, 0, sizeof(*vf_stats));
4615
4616 vf_stats->rx_packets = stats->rx_unicast + stats->rx_broadcast +
4617 stats->rx_multicast;
4618 vf_stats->tx_packets = stats->tx_unicast + stats->tx_broadcast +
4619 stats->tx_multicast;
4620 vf_stats->rx_bytes = stats->rx_bytes;
4621 vf_stats->tx_bytes = stats->tx_bytes;
4622 vf_stats->broadcast = stats->rx_broadcast;
4623 vf_stats->multicast = stats->rx_multicast;
4624 vf_stats->rx_dropped = stats->rx_discards;
4625 vf_stats->tx_dropped = stats->tx_discards;
4626
4627 return 0;
4628}
Linux 6.x block layer and io_uring tree(s)