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5c3c48ac JB |
1 | /******************************************************************************* |
2 | * | |
3 | * Intel Ethernet Controller XL710 Family Linux Driver | |
4 | * Copyright(c) 2013 Intel Corporation. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License along with | |
16 | * this program; if not, write to the Free Software Foundation, Inc., | |
17 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | * | |
19 | * The full GNU General Public License is included in this distribution in | |
20 | * the file called "COPYING". | |
21 | * | |
22 | * Contact Information: | |
23 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
24 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
25 | * | |
26 | ******************************************************************************/ | |
27 | ||
28 | #include "i40e.h" | |
29 | ||
30 | /***********************misc routines*****************************/ | |
31 | ||
32 | /** | |
33 | * i40e_vc_isvalid_vsi_id | |
34 | * @vf: pointer to the vf info | |
35 | * @vsi_id: vf relative vsi id | |
36 | * | |
37 | * check for the valid vsi id | |
38 | **/ | |
39 | static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u8 vsi_id) | |
40 | { | |
41 | struct i40e_pf *pf = vf->pf; | |
42 | ||
43 | return pf->vsi[vsi_id]->vf_id == vf->vf_id; | |
44 | } | |
45 | ||
46 | /** | |
47 | * i40e_vc_isvalid_queue_id | |
48 | * @vf: pointer to the vf info | |
49 | * @vsi_id: vsi id | |
50 | * @qid: vsi relative queue id | |
51 | * | |
52 | * check for the valid queue id | |
53 | **/ | |
54 | static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u8 vsi_id, | |
55 | u8 qid) | |
56 | { | |
57 | struct i40e_pf *pf = vf->pf; | |
58 | ||
59 | return qid < pf->vsi[vsi_id]->num_queue_pairs; | |
60 | } | |
61 | ||
62 | /** | |
63 | * i40e_vc_isvalid_vector_id | |
64 | * @vf: pointer to the vf info | |
65 | * @vector_id: vf relative vector id | |
66 | * | |
67 | * check for the valid vector id | |
68 | **/ | |
69 | static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id) | |
70 | { | |
71 | struct i40e_pf *pf = vf->pf; | |
72 | ||
54692b40 | 73 | return vector_id <= pf->hw.func_caps.num_msix_vectors_vf; |
5c3c48ac JB |
74 | } |
75 | ||
76 | /***********************vf resource mgmt routines*****************/ | |
77 | ||
78 | /** | |
79 | * i40e_vc_get_pf_queue_id | |
80 | * @vf: pointer to the vf info | |
81 | * @vsi_idx: index of VSI in PF struct | |
82 | * @vsi_queue_id: vsi relative queue id | |
83 | * | |
84 | * return pf relative queue id | |
85 | **/ | |
86 | static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u8 vsi_idx, | |
87 | u8 vsi_queue_id) | |
88 | { | |
89 | struct i40e_pf *pf = vf->pf; | |
90 | struct i40e_vsi *vsi = pf->vsi[vsi_idx]; | |
91 | u16 pf_queue_id = I40E_QUEUE_END_OF_LIST; | |
92 | ||
93 | if (le16_to_cpu(vsi->info.mapping_flags) & | |
94 | I40E_AQ_VSI_QUE_MAP_NONCONTIG) | |
95 | pf_queue_id = | |
96 | le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]); | |
97 | else | |
98 | pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) + | |
99 | vsi_queue_id; | |
100 | ||
101 | return pf_queue_id; | |
102 | } | |
103 | ||
104 | /** | |
105 | * i40e_ctrl_vsi_tx_queue | |
106 | * @vf: pointer to the vf info | |
107 | * @vsi_idx: index of VSI in PF struct | |
108 | * @vsi_queue_id: vsi relative queue index | |
109 | * @ctrl: control flags | |
110 | * | |
111 | * enable/disable/enable check/disable check | |
112 | **/ | |
113 | static int i40e_ctrl_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_idx, | |
114 | u16 vsi_queue_id, | |
115 | enum i40e_queue_ctrl ctrl) | |
116 | { | |
117 | struct i40e_pf *pf = vf->pf; | |
118 | struct i40e_hw *hw = &pf->hw; | |
119 | bool writeback = false; | |
120 | u16 pf_queue_id; | |
121 | int ret = 0; | |
122 | u32 reg; | |
123 | ||
124 | pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id); | |
125 | reg = rd32(hw, I40E_QTX_ENA(pf_queue_id)); | |
126 | ||
127 | switch (ctrl) { | |
128 | case I40E_QUEUE_CTRL_ENABLE: | |
129 | reg |= I40E_QTX_ENA_QENA_REQ_MASK; | |
130 | writeback = true; | |
131 | break; | |
132 | case I40E_QUEUE_CTRL_ENABLECHECK: | |
133 | ret = (reg & I40E_QTX_ENA_QENA_STAT_MASK) ? 0 : -EPERM; | |
134 | break; | |
135 | case I40E_QUEUE_CTRL_DISABLE: | |
136 | reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; | |
137 | writeback = true; | |
138 | break; | |
139 | case I40E_QUEUE_CTRL_DISABLECHECK: | |
140 | ret = (reg & I40E_QTX_ENA_QENA_STAT_MASK) ? -EPERM : 0; | |
141 | break; | |
142 | case I40E_QUEUE_CTRL_FASTDISABLE: | |
143 | reg |= I40E_QTX_ENA_FAST_QDIS_MASK; | |
144 | writeback = true; | |
145 | break; | |
146 | case I40E_QUEUE_CTRL_FASTDISABLECHECK: | |
147 | ret = (reg & I40E_QTX_ENA_QENA_STAT_MASK) ? -EPERM : 0; | |
148 | if (!ret) { | |
149 | reg &= ~I40E_QTX_ENA_FAST_QDIS_MASK; | |
150 | writeback = true; | |
151 | } | |
152 | break; | |
153 | default: | |
154 | ret = -EINVAL; | |
155 | break; | |
156 | } | |
157 | ||
158 | if (writeback) { | |
159 | wr32(hw, I40E_QTX_ENA(pf_queue_id), reg); | |
160 | i40e_flush(hw); | |
161 | } | |
162 | ||
163 | return ret; | |
164 | } | |
165 | ||
166 | /** | |
167 | * i40e_ctrl_vsi_rx_queue | |
168 | * @vf: pointer to the vf info | |
169 | * @vsi_idx: index of VSI in PF struct | |
170 | * @vsi_queue_id: vsi relative queue index | |
171 | * @ctrl: control flags | |
172 | * | |
173 | * enable/disable/enable check/disable check | |
174 | **/ | |
175 | static int i40e_ctrl_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_idx, | |
176 | u16 vsi_queue_id, | |
177 | enum i40e_queue_ctrl ctrl) | |
178 | { | |
179 | struct i40e_pf *pf = vf->pf; | |
180 | struct i40e_hw *hw = &pf->hw; | |
181 | bool writeback = false; | |
182 | u16 pf_queue_id; | |
183 | int ret = 0; | |
184 | u32 reg; | |
185 | ||
186 | pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id); | |
187 | reg = rd32(hw, I40E_QRX_ENA(pf_queue_id)); | |
188 | ||
189 | switch (ctrl) { | |
190 | case I40E_QUEUE_CTRL_ENABLE: | |
191 | reg |= I40E_QRX_ENA_QENA_REQ_MASK; | |
192 | writeback = true; | |
193 | break; | |
194 | case I40E_QUEUE_CTRL_ENABLECHECK: | |
195 | ret = (reg & I40E_QRX_ENA_QENA_STAT_MASK) ? 0 : -EPERM; | |
196 | break; | |
197 | case I40E_QUEUE_CTRL_DISABLE: | |
198 | reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; | |
199 | writeback = true; | |
200 | break; | |
201 | case I40E_QUEUE_CTRL_DISABLECHECK: | |
202 | ret = (reg & I40E_QRX_ENA_QENA_STAT_MASK) ? -EPERM : 0; | |
203 | break; | |
204 | case I40E_QUEUE_CTRL_FASTDISABLE: | |
205 | reg |= I40E_QRX_ENA_FAST_QDIS_MASK; | |
206 | writeback = true; | |
207 | break; | |
208 | case I40E_QUEUE_CTRL_FASTDISABLECHECK: | |
209 | ret = (reg & I40E_QRX_ENA_QENA_STAT_MASK) ? -EPERM : 0; | |
210 | if (!ret) { | |
211 | reg &= ~I40E_QRX_ENA_FAST_QDIS_MASK; | |
212 | writeback = true; | |
213 | } | |
214 | break; | |
215 | default: | |
216 | ret = -EINVAL; | |
217 | break; | |
218 | } | |
219 | ||
220 | if (writeback) { | |
221 | wr32(hw, I40E_QRX_ENA(pf_queue_id), reg); | |
222 | i40e_flush(hw); | |
223 | } | |
224 | ||
225 | return ret; | |
226 | } | |
227 | ||
228 | /** | |
229 | * i40e_config_irq_link_list | |
230 | * @vf: pointer to the vf info | |
231 | * @vsi_idx: index of VSI in PF struct | |
232 | * @vecmap: irq map info | |
233 | * | |
234 | * configure irq link list from the map | |
235 | **/ | |
236 | static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_idx, | |
237 | struct i40e_virtchnl_vector_map *vecmap) | |
238 | { | |
239 | unsigned long linklistmap = 0, tempmap; | |
240 | struct i40e_pf *pf = vf->pf; | |
241 | struct i40e_hw *hw = &pf->hw; | |
242 | u16 vsi_queue_id, pf_queue_id; | |
243 | enum i40e_queue_type qtype; | |
244 | u16 next_q, vector_id; | |
245 | u32 reg, reg_idx; | |
246 | u16 itr_idx = 0; | |
247 | ||
248 | vector_id = vecmap->vector_id; | |
249 | /* setup the head */ | |
250 | if (0 == vector_id) | |
251 | reg_idx = I40E_VPINT_LNKLST0(vf->vf_id); | |
252 | else | |
253 | reg_idx = I40E_VPINT_LNKLSTN( | |
13c60b99 | 254 | (pf->hw.func_caps.num_msix_vectors_vf |
5c3c48ac JB |
255 | * vf->vf_id) + (vector_id - 1)); |
256 | ||
257 | if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) { | |
258 | /* Special case - No queues mapped on this vector */ | |
259 | wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK); | |
260 | goto irq_list_done; | |
261 | } | |
262 | tempmap = vecmap->rxq_map; | |
4836650b | 263 | for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
264 | linklistmap |= (1 << |
265 | (I40E_VIRTCHNL_SUPPORTED_QTYPES * | |
266 | vsi_queue_id)); | |
5c3c48ac JB |
267 | } |
268 | ||
269 | tempmap = vecmap->txq_map; | |
4836650b | 270 | for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
271 | linklistmap |= (1 << |
272 | (I40E_VIRTCHNL_SUPPORTED_QTYPES * vsi_queue_id | |
273 | + 1)); | |
5c3c48ac JB |
274 | } |
275 | ||
276 | next_q = find_first_bit(&linklistmap, | |
277 | (I40E_MAX_VSI_QP * | |
278 | I40E_VIRTCHNL_SUPPORTED_QTYPES)); | |
279 | vsi_queue_id = next_q/I40E_VIRTCHNL_SUPPORTED_QTYPES; | |
280 | qtype = next_q%I40E_VIRTCHNL_SUPPORTED_QTYPES; | |
281 | pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id); | |
282 | reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id); | |
283 | ||
284 | wr32(hw, reg_idx, reg); | |
285 | ||
286 | while (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) { | |
287 | switch (qtype) { | |
288 | case I40E_QUEUE_TYPE_RX: | |
289 | reg_idx = I40E_QINT_RQCTL(pf_queue_id); | |
290 | itr_idx = vecmap->rxitr_idx; | |
291 | break; | |
292 | case I40E_QUEUE_TYPE_TX: | |
293 | reg_idx = I40E_QINT_TQCTL(pf_queue_id); | |
294 | itr_idx = vecmap->txitr_idx; | |
295 | break; | |
296 | default: | |
297 | break; | |
298 | } | |
299 | ||
300 | next_q = find_next_bit(&linklistmap, | |
301 | (I40E_MAX_VSI_QP * | |
302 | I40E_VIRTCHNL_SUPPORTED_QTYPES), | |
303 | next_q + 1); | |
304 | if (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) { | |
305 | vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES; | |
306 | qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES; | |
307 | pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, | |
308 | vsi_queue_id); | |
309 | } else { | |
310 | pf_queue_id = I40E_QUEUE_END_OF_LIST; | |
311 | qtype = 0; | |
312 | } | |
313 | ||
314 | /* format for the RQCTL & TQCTL regs is same */ | |
315 | reg = (vector_id) | | |
316 | (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) | | |
317 | (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) | | |
318 | (1 << I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) | | |
319 | (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT); | |
320 | wr32(hw, reg_idx, reg); | |
321 | } | |
322 | ||
323 | irq_list_done: | |
324 | i40e_flush(hw); | |
325 | } | |
326 | ||
327 | /** | |
328 | * i40e_config_vsi_tx_queue | |
329 | * @vf: pointer to the vf info | |
330 | * @vsi_idx: index of VSI in PF struct | |
331 | * @vsi_queue_id: vsi relative queue index | |
332 | * @info: config. info | |
333 | * | |
334 | * configure tx queue | |
335 | **/ | |
336 | static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_idx, | |
337 | u16 vsi_queue_id, | |
338 | struct i40e_virtchnl_txq_info *info) | |
339 | { | |
340 | struct i40e_pf *pf = vf->pf; | |
341 | struct i40e_hw *hw = &pf->hw; | |
342 | struct i40e_hmc_obj_txq tx_ctx; | |
343 | u16 pf_queue_id; | |
344 | u32 qtx_ctl; | |
345 | int ret = 0; | |
346 | ||
347 | pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id); | |
348 | ||
349 | /* clear the context structure first */ | |
350 | memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq)); | |
351 | ||
352 | /* only set the required fields */ | |
353 | tx_ctx.base = info->dma_ring_addr / 128; | |
354 | tx_ctx.qlen = info->ring_len; | |
355 | tx_ctx.rdylist = le16_to_cpu(pf->vsi[vsi_idx]->info.qs_handle[0]); | |
356 | tx_ctx.rdylist_act = 0; | |
357 | ||
358 | /* clear the context in the HMC */ | |
359 | ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id); | |
360 | if (ret) { | |
361 | dev_err(&pf->pdev->dev, | |
362 | "Failed to clear VF LAN Tx queue context %d, error: %d\n", | |
363 | pf_queue_id, ret); | |
364 | ret = -ENOENT; | |
365 | goto error_context; | |
366 | } | |
367 | ||
368 | /* set the context in the HMC */ | |
369 | ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx); | |
370 | if (ret) { | |
371 | dev_err(&pf->pdev->dev, | |
372 | "Failed to set VF LAN Tx queue context %d error: %d\n", | |
373 | pf_queue_id, ret); | |
374 | ret = -ENOENT; | |
375 | goto error_context; | |
376 | } | |
377 | ||
378 | /* associate this queue with the PCI VF function */ | |
379 | qtx_ctl = I40E_QTX_CTL_VF_QUEUE; | |
13fd9774 | 380 | qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) |
5c3c48ac JB |
381 | & I40E_QTX_CTL_PF_INDX_MASK); |
382 | qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id) | |
383 | << I40E_QTX_CTL_VFVM_INDX_SHIFT) | |
384 | & I40E_QTX_CTL_VFVM_INDX_MASK); | |
385 | wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl); | |
386 | i40e_flush(hw); | |
387 | ||
388 | error_context: | |
389 | return ret; | |
390 | } | |
391 | ||
392 | /** | |
393 | * i40e_config_vsi_rx_queue | |
394 | * @vf: pointer to the vf info | |
395 | * @vsi_idx: index of VSI in PF struct | |
396 | * @vsi_queue_id: vsi relative queue index | |
397 | * @info: config. info | |
398 | * | |
399 | * configure rx queue | |
400 | **/ | |
401 | static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_idx, | |
402 | u16 vsi_queue_id, | |
403 | struct i40e_virtchnl_rxq_info *info) | |
404 | { | |
405 | struct i40e_pf *pf = vf->pf; | |
406 | struct i40e_hw *hw = &pf->hw; | |
407 | struct i40e_hmc_obj_rxq rx_ctx; | |
408 | u16 pf_queue_id; | |
409 | int ret = 0; | |
410 | ||
411 | pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id); | |
412 | ||
413 | /* clear the context structure first */ | |
414 | memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq)); | |
415 | ||
416 | /* only set the required fields */ | |
417 | rx_ctx.base = info->dma_ring_addr / 128; | |
418 | rx_ctx.qlen = info->ring_len; | |
419 | ||
420 | if (info->splithdr_enabled) { | |
421 | rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 | | |
422 | I40E_RX_SPLIT_IP | | |
423 | I40E_RX_SPLIT_TCP_UDP | | |
424 | I40E_RX_SPLIT_SCTP; | |
425 | /* header length validation */ | |
426 | if (info->hdr_size > ((2 * 1024) - 64)) { | |
427 | ret = -EINVAL; | |
428 | goto error_param; | |
429 | } | |
430 | rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT; | |
431 | ||
432 | /* set splitalways mode 10b */ | |
433 | rx_ctx.dtype = 0x2; | |
434 | } | |
435 | ||
436 | /* databuffer length validation */ | |
437 | if (info->databuffer_size > ((16 * 1024) - 128)) { | |
438 | ret = -EINVAL; | |
439 | goto error_param; | |
440 | } | |
441 | rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT; | |
442 | ||
443 | /* max pkt. length validation */ | |
444 | if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) { | |
445 | ret = -EINVAL; | |
446 | goto error_param; | |
447 | } | |
448 | rx_ctx.rxmax = info->max_pkt_size; | |
449 | ||
450 | /* enable 32bytes desc always */ | |
451 | rx_ctx.dsize = 1; | |
452 | ||
453 | /* default values */ | |
454 | rx_ctx.tphrdesc_ena = 1; | |
455 | rx_ctx.tphwdesc_ena = 1; | |
456 | rx_ctx.tphdata_ena = 1; | |
457 | rx_ctx.tphhead_ena = 1; | |
458 | rx_ctx.lrxqthresh = 2; | |
459 | rx_ctx.crcstrip = 1; | |
460 | ||
461 | /* clear the context in the HMC */ | |
462 | ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id); | |
463 | if (ret) { | |
464 | dev_err(&pf->pdev->dev, | |
465 | "Failed to clear VF LAN Rx queue context %d, error: %d\n", | |
466 | pf_queue_id, ret); | |
467 | ret = -ENOENT; | |
468 | goto error_param; | |
469 | } | |
470 | ||
471 | /* set the context in the HMC */ | |
472 | ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx); | |
473 | if (ret) { | |
474 | dev_err(&pf->pdev->dev, | |
475 | "Failed to set VF LAN Rx queue context %d error: %d\n", | |
476 | pf_queue_id, ret); | |
477 | ret = -ENOENT; | |
478 | goto error_param; | |
479 | } | |
480 | ||
481 | error_param: | |
482 | return ret; | |
483 | } | |
484 | ||
485 | /** | |
486 | * i40e_alloc_vsi_res | |
487 | * @vf: pointer to the vf info | |
488 | * @type: type of VSI to allocate | |
489 | * | |
490 | * alloc vf vsi context & resources | |
491 | **/ | |
492 | static int i40e_alloc_vsi_res(struct i40e_vf *vf, enum i40e_vsi_type type) | |
493 | { | |
494 | struct i40e_mac_filter *f = NULL; | |
495 | struct i40e_pf *pf = vf->pf; | |
496 | struct i40e_hw *hw = &pf->hw; | |
497 | struct i40e_vsi *vsi; | |
498 | int ret = 0; | |
499 | ||
500 | vsi = i40e_vsi_setup(pf, type, pf->vsi[pf->lan_vsi]->seid, vf->vf_id); | |
501 | ||
502 | if (!vsi) { | |
503 | dev_err(&pf->pdev->dev, | |
504 | "add vsi failed for vf %d, aq_err %d\n", | |
505 | vf->vf_id, pf->hw.aq.asq_last_status); | |
506 | ret = -ENOENT; | |
507 | goto error_alloc_vsi_res; | |
508 | } | |
509 | if (type == I40E_VSI_SRIOV) { | |
510 | vf->lan_vsi_index = vsi->idx; | |
511 | vf->lan_vsi_id = vsi->id; | |
512 | dev_info(&pf->pdev->dev, | |
513 | "LAN VSI index %d, VSI id %d\n", | |
514 | vsi->idx, vsi->id); | |
515 | f = i40e_add_filter(vsi, vf->default_lan_addr.addr, | |
516 | 0, true, false); | |
517 | } | |
6dbbbfb2 | 518 | |
5c3c48ac JB |
519 | if (!f) { |
520 | dev_err(&pf->pdev->dev, "Unable to add ucast filter\n"); | |
521 | ret = -ENOMEM; | |
522 | goto error_alloc_vsi_res; | |
523 | } | |
524 | ||
525 | /* program mac filter */ | |
526 | ret = i40e_sync_vsi_filters(vsi); | |
527 | if (ret) { | |
528 | dev_err(&pf->pdev->dev, "Unable to program ucast filters\n"); | |
529 | goto error_alloc_vsi_res; | |
530 | } | |
531 | ||
532 | /* accept bcast pkts. by default */ | |
533 | ret = i40e_aq_set_vsi_broadcast(hw, vsi->seid, true, NULL); | |
534 | if (ret) { | |
535 | dev_err(&pf->pdev->dev, | |
536 | "set vsi bcast failed for vf %d, vsi %d, aq_err %d\n", | |
537 | vf->vf_id, vsi->idx, pf->hw.aq.asq_last_status); | |
538 | ret = -EINVAL; | |
539 | } | |
540 | ||
541 | error_alloc_vsi_res: | |
542 | return ret; | |
543 | } | |
544 | ||
545 | /** | |
546 | * i40e_reset_vf | |
547 | * @vf: pointer to the vf structure | |
548 | * @flr: VFLR was issued or not | |
549 | * | |
550 | * reset the vf | |
551 | **/ | |
552 | int i40e_reset_vf(struct i40e_vf *vf, bool flr) | |
553 | { | |
554 | int ret = -ENOENT; | |
555 | struct i40e_pf *pf = vf->pf; | |
556 | struct i40e_hw *hw = &pf->hw; | |
557 | u32 reg, reg_idx, msix_vf; | |
558 | bool rsd = false; | |
559 | u16 pf_queue_id; | |
560 | int i, j; | |
561 | ||
562 | /* warn the VF */ | |
563 | wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_INPROGRESS); | |
564 | ||
565 | clear_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states); | |
566 | ||
567 | /* PF triggers VFR only when VF requests, in case of | |
568 | * VFLR, HW triggers VFR | |
569 | */ | |
570 | if (!flr) { | |
571 | /* reset vf using VPGEN_VFRTRIG reg */ | |
572 | reg = I40E_VPGEN_VFRTRIG_VFSWR_MASK; | |
573 | wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg); | |
574 | i40e_flush(hw); | |
575 | } | |
576 | ||
577 | /* poll VPGEN_VFRSTAT reg to make sure | |
578 | * that reset is complete | |
579 | */ | |
580 | for (i = 0; i < 4; i++) { | |
581 | /* vf reset requires driver to first reset the | |
582 | * vf & than poll the status register to make sure | |
583 | * that the requested op was completed | |
584 | * successfully | |
585 | */ | |
586 | udelay(10); | |
587 | reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id)); | |
588 | if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) { | |
589 | rsd = true; | |
590 | break; | |
591 | } | |
592 | } | |
593 | ||
594 | if (!rsd) | |
595 | dev_err(&pf->pdev->dev, "VF reset check timeout %d\n", | |
596 | vf->vf_id); | |
597 | ||
598 | /* fast disable qps */ | |
599 | for (j = 0; j < pf->vsi[vf->lan_vsi_index]->num_queue_pairs; j++) { | |
600 | ret = i40e_ctrl_vsi_tx_queue(vf, vf->lan_vsi_index, j, | |
601 | I40E_QUEUE_CTRL_FASTDISABLE); | |
602 | ret = i40e_ctrl_vsi_rx_queue(vf, vf->lan_vsi_index, j, | |
603 | I40E_QUEUE_CTRL_FASTDISABLE); | |
604 | } | |
605 | ||
606 | /* Queue enable/disable requires driver to | |
607 | * first reset the vf & than poll the status register | |
608 | * to make sure that the requested op was completed | |
609 | * successfully | |
610 | */ | |
611 | udelay(10); | |
612 | for (j = 0; j < pf->vsi[vf->lan_vsi_index]->num_queue_pairs; j++) { | |
613 | ret = i40e_ctrl_vsi_tx_queue(vf, vf->lan_vsi_index, j, | |
614 | I40E_QUEUE_CTRL_FASTDISABLECHECK); | |
615 | if (ret) | |
616 | dev_info(&pf->pdev->dev, | |
617 | "Queue control check failed on Tx queue %d of VSI %d VF %d\n", | |
4f28c727 | 618 | j, vf->lan_vsi_index, vf->vf_id); |
5c3c48ac JB |
619 | ret = i40e_ctrl_vsi_rx_queue(vf, vf->lan_vsi_index, j, |
620 | I40E_QUEUE_CTRL_FASTDISABLECHECK); | |
621 | if (ret) | |
622 | dev_info(&pf->pdev->dev, | |
623 | "Queue control check failed on Rx queue %d of VSI %d VF %d\n", | |
4f28c727 | 624 | j, vf->lan_vsi_index, vf->vf_id); |
5c3c48ac JB |
625 | } |
626 | ||
627 | /* clear the irq settings */ | |
628 | msix_vf = pf->hw.func_caps.num_msix_vectors_vf; | |
629 | for (i = 0; i < msix_vf; i++) { | |
630 | /* format is same for both registers */ | |
631 | if (0 == i) | |
632 | reg_idx = I40E_VPINT_LNKLST0(vf->vf_id); | |
633 | else | |
634 | reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) * | |
635 | (vf->vf_id)) | |
636 | + (i - 1)); | |
637 | reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK | | |
638 | I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK); | |
639 | wr32(hw, reg_idx, reg); | |
640 | i40e_flush(hw); | |
641 | } | |
642 | /* disable interrupts so the VF starts in a known state */ | |
643 | for (i = 0; i < msix_vf; i++) { | |
644 | /* format is same for both registers */ | |
645 | if (0 == i) | |
646 | reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id); | |
647 | else | |
648 | reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) * | |
649 | (vf->vf_id)) | |
650 | + (i - 1)); | |
651 | wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK); | |
652 | i40e_flush(hw); | |
653 | } | |
654 | ||
655 | /* set the defaults for the rqctl & tqctl registers */ | |
656 | reg = (I40E_QINT_RQCTL_NEXTQ_INDX_MASK | I40E_QINT_RQCTL_ITR_INDX_MASK | | |
657 | I40E_QINT_RQCTL_NEXTQ_TYPE_MASK); | |
658 | for (j = 0; j < pf->vsi[vf->lan_vsi_index]->num_queue_pairs; j++) { | |
659 | pf_queue_id = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index, j); | |
660 | wr32(hw, I40E_QINT_RQCTL(pf_queue_id), reg); | |
661 | wr32(hw, I40E_QINT_TQCTL(pf_queue_id), reg); | |
662 | } | |
663 | ||
664 | /* clear the reset bit in the VPGEN_VFRTRIG reg */ | |
665 | reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id)); | |
666 | reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK; | |
667 | wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg); | |
668 | /* tell the VF the reset is done */ | |
669 | wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_COMPLETED); | |
670 | i40e_flush(hw); | |
671 | ||
672 | return ret; | |
673 | } | |
674 | ||
675 | /** | |
676 | * i40e_enable_vf_mappings | |
677 | * @vf: pointer to the vf info | |
678 | * | |
679 | * enable vf mappings | |
680 | **/ | |
681 | static void i40e_enable_vf_mappings(struct i40e_vf *vf) | |
682 | { | |
683 | struct i40e_pf *pf = vf->pf; | |
684 | struct i40e_hw *hw = &pf->hw; | |
685 | u32 reg, total_queue_pairs = 0; | |
686 | int j; | |
687 | ||
688 | /* Tell the hardware we're using noncontiguous mapping. HW requires | |
689 | * that VF queues be mapped using this method, even when they are | |
690 | * contiguous in real life | |
691 | */ | |
692 | wr32(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id), | |
693 | I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK); | |
694 | ||
695 | /* enable VF vplan_qtable mappings */ | |
696 | reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK; | |
697 | wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg); | |
698 | ||
699 | /* map PF queues to VF queues */ | |
700 | for (j = 0; j < pf->vsi[vf->lan_vsi_index]->num_queue_pairs; j++) { | |
701 | u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index, j); | |
702 | reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK); | |
703 | wr32(hw, I40E_VPLAN_QTABLE(total_queue_pairs, vf->vf_id), reg); | |
704 | total_queue_pairs++; | |
705 | } | |
706 | ||
707 | /* map PF queues to VSI */ | |
708 | for (j = 0; j < 7; j++) { | |
709 | if (j * 2 >= pf->vsi[vf->lan_vsi_index]->num_queue_pairs) { | |
710 | reg = 0x07FF07FF; /* unused */ | |
711 | } else { | |
712 | u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index, | |
713 | j * 2); | |
714 | reg = qid; | |
715 | qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index, | |
716 | (j * 2) + 1); | |
717 | reg |= qid << 16; | |
718 | } | |
719 | wr32(hw, I40E_VSILAN_QTABLE(j, vf->lan_vsi_id), reg); | |
720 | } | |
721 | ||
722 | i40e_flush(hw); | |
723 | } | |
724 | ||
725 | /** | |
726 | * i40e_disable_vf_mappings | |
727 | * @vf: pointer to the vf info | |
728 | * | |
729 | * disable vf mappings | |
730 | **/ | |
731 | static void i40e_disable_vf_mappings(struct i40e_vf *vf) | |
732 | { | |
733 | struct i40e_pf *pf = vf->pf; | |
734 | struct i40e_hw *hw = &pf->hw; | |
735 | int i; | |
736 | ||
737 | /* disable qp mappings */ | |
738 | wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0); | |
739 | for (i = 0; i < I40E_MAX_VSI_QP; i++) | |
740 | wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id), | |
741 | I40E_QUEUE_END_OF_LIST); | |
742 | i40e_flush(hw); | |
743 | } | |
744 | ||
745 | /** | |
746 | * i40e_free_vf_res | |
747 | * @vf: pointer to the vf info | |
748 | * | |
749 | * free vf resources | |
750 | **/ | |
751 | static void i40e_free_vf_res(struct i40e_vf *vf) | |
752 | { | |
753 | struct i40e_pf *pf = vf->pf; | |
754 | ||
755 | /* free vsi & disconnect it from the parent uplink */ | |
756 | if (vf->lan_vsi_index) { | |
757 | i40e_vsi_release(pf->vsi[vf->lan_vsi_index]); | |
758 | vf->lan_vsi_index = 0; | |
759 | vf->lan_vsi_id = 0; | |
760 | } | |
6dbbbfb2 | 761 | |
5c3c48ac JB |
762 | /* reset some of the state varibles keeping |
763 | * track of the resources | |
764 | */ | |
765 | vf->num_queue_pairs = 0; | |
766 | vf->vf_states = 0; | |
767 | } | |
768 | ||
769 | /** | |
770 | * i40e_alloc_vf_res | |
771 | * @vf: pointer to the vf info | |
772 | * | |
773 | * allocate vf resources | |
774 | **/ | |
775 | static int i40e_alloc_vf_res(struct i40e_vf *vf) | |
776 | { | |
777 | struct i40e_pf *pf = vf->pf; | |
778 | int total_queue_pairs = 0; | |
779 | int ret; | |
780 | ||
781 | /* allocate hw vsi context & associated resources */ | |
782 | ret = i40e_alloc_vsi_res(vf, I40E_VSI_SRIOV); | |
783 | if (ret) | |
784 | goto error_alloc; | |
785 | total_queue_pairs += pf->vsi[vf->lan_vsi_index]->num_queue_pairs; | |
786 | set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps); | |
787 | ||
788 | /* store the total qps number for the runtime | |
789 | * vf req validation | |
790 | */ | |
791 | vf->num_queue_pairs = total_queue_pairs; | |
792 | ||
793 | /* vf is now completely initialized */ | |
794 | set_bit(I40E_VF_STAT_INIT, &vf->vf_states); | |
795 | ||
796 | error_alloc: | |
797 | if (ret) | |
798 | i40e_free_vf_res(vf); | |
799 | ||
800 | return ret; | |
801 | } | |
802 | ||
803 | /** | |
804 | * i40e_vfs_are_assigned | |
805 | * @pf: pointer to the pf structure | |
806 | * | |
807 | * Determine if any VFs are assigned to VMs | |
808 | **/ | |
809 | static bool i40e_vfs_are_assigned(struct i40e_pf *pf) | |
810 | { | |
811 | struct pci_dev *pdev = pf->pdev; | |
812 | struct pci_dev *vfdev; | |
813 | ||
814 | /* loop through all the VFs to see if we own any that are assigned */ | |
815 | vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, I40E_VF_DEVICE_ID , NULL); | |
816 | while (vfdev) { | |
817 | /* if we don't own it we don't care */ | |
818 | if (vfdev->is_virtfn && pci_physfn(vfdev) == pdev) { | |
819 | /* if it is assigned we cannot release it */ | |
820 | if (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED) | |
821 | return true; | |
822 | } | |
823 | ||
824 | vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, | |
825 | I40E_VF_DEVICE_ID, | |
826 | vfdev); | |
827 | } | |
828 | ||
829 | return false; | |
830 | } | |
831 | ||
832 | /** | |
833 | * i40e_free_vfs | |
834 | * @pf: pointer to the pf structure | |
835 | * | |
836 | * free vf resources | |
837 | **/ | |
838 | void i40e_free_vfs(struct i40e_pf *pf) | |
839 | { | |
840 | struct i40e_hw *hw = &pf->hw; | |
841 | int i; | |
842 | ||
843 | if (!pf->vf) | |
844 | return; | |
845 | ||
846 | /* Disable interrupt 0 so we don't try to handle the VFLR. */ | |
847 | wr32(hw, I40E_PFINT_DYN_CTL0, 0); | |
848 | i40e_flush(hw); | |
849 | ||
850 | /* free up vf resources */ | |
851 | for (i = 0; i < pf->num_alloc_vfs; i++) { | |
852 | if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states)) | |
853 | i40e_free_vf_res(&pf->vf[i]); | |
854 | /* disable qp mappings */ | |
855 | i40e_disable_vf_mappings(&pf->vf[i]); | |
856 | } | |
857 | ||
858 | kfree(pf->vf); | |
859 | pf->vf = NULL; | |
860 | pf->num_alloc_vfs = 0; | |
861 | ||
862 | if (!i40e_vfs_are_assigned(pf)) | |
863 | pci_disable_sriov(pf->pdev); | |
864 | else | |
865 | dev_warn(&pf->pdev->dev, | |
866 | "unable to disable SR-IOV because VFs are assigned.\n"); | |
867 | ||
868 | /* Re-enable interrupt 0. */ | |
869 | wr32(hw, I40E_PFINT_DYN_CTL0, | |
870 | I40E_PFINT_DYN_CTL0_INTENA_MASK | | |
871 | I40E_PFINT_DYN_CTL0_CLEARPBA_MASK | | |
872 | (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT)); | |
873 | i40e_flush(hw); | |
874 | } | |
875 | ||
876 | #ifdef CONFIG_PCI_IOV | |
877 | /** | |
878 | * i40e_alloc_vfs | |
879 | * @pf: pointer to the pf structure | |
880 | * @num_alloc_vfs: number of vfs to allocate | |
881 | * | |
882 | * allocate vf resources | |
883 | **/ | |
884 | static int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs) | |
885 | { | |
886 | struct i40e_vf *vfs; | |
887 | int i, ret = 0; | |
888 | ||
889 | ret = pci_enable_sriov(pf->pdev, num_alloc_vfs); | |
890 | if (ret) { | |
891 | dev_err(&pf->pdev->dev, | |
892 | "pci_enable_sriov failed with error %d!\n", ret); | |
893 | pf->num_alloc_vfs = 0; | |
894 | goto err_iov; | |
895 | } | |
896 | ||
897 | /* allocate memory */ | |
898 | vfs = kzalloc(num_alloc_vfs * sizeof(struct i40e_vf), GFP_KERNEL); | |
899 | if (!vfs) { | |
900 | ret = -ENOMEM; | |
901 | goto err_alloc; | |
902 | } | |
903 | ||
904 | /* apply default profile */ | |
905 | for (i = 0; i < num_alloc_vfs; i++) { | |
906 | vfs[i].pf = pf; | |
907 | vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB; | |
908 | vfs[i].vf_id = i; | |
909 | ||
910 | /* assign default capabilities */ | |
911 | set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps); | |
912 | ||
913 | ret = i40e_alloc_vf_res(&vfs[i]); | |
914 | i40e_reset_vf(&vfs[i], true); | |
915 | if (ret) | |
916 | break; | |
917 | ||
918 | /* enable vf vplan_qtable mappings */ | |
919 | i40e_enable_vf_mappings(&vfs[i]); | |
920 | } | |
921 | pf->vf = vfs; | |
922 | pf->num_alloc_vfs = num_alloc_vfs; | |
923 | ||
924 | err_alloc: | |
925 | if (ret) | |
926 | i40e_free_vfs(pf); | |
927 | err_iov: | |
928 | return ret; | |
929 | } | |
930 | ||
931 | #endif | |
932 | /** | |
933 | * i40e_pci_sriov_enable | |
934 | * @pdev: pointer to a pci_dev structure | |
935 | * @num_vfs: number of vfs to allocate | |
936 | * | |
937 | * Enable or change the number of VFs | |
938 | **/ | |
939 | static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs) | |
940 | { | |
941 | #ifdef CONFIG_PCI_IOV | |
942 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
943 | int pre_existing_vfs = pci_num_vf(pdev); | |
944 | int err = 0; | |
945 | ||
946 | dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs); | |
947 | if (pre_existing_vfs && pre_existing_vfs != num_vfs) | |
948 | i40e_free_vfs(pf); | |
949 | else if (pre_existing_vfs && pre_existing_vfs == num_vfs) | |
950 | goto out; | |
951 | ||
952 | if (num_vfs > pf->num_req_vfs) { | |
953 | err = -EPERM; | |
954 | goto err_out; | |
955 | } | |
956 | ||
957 | err = i40e_alloc_vfs(pf, num_vfs); | |
958 | if (err) { | |
959 | dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err); | |
960 | goto err_out; | |
961 | } | |
962 | ||
963 | out: | |
964 | return num_vfs; | |
965 | ||
966 | err_out: | |
967 | return err; | |
968 | #endif | |
969 | return 0; | |
970 | } | |
971 | ||
972 | /** | |
973 | * i40e_pci_sriov_configure | |
974 | * @pdev: pointer to a pci_dev structure | |
975 | * @num_vfs: number of vfs to allocate | |
976 | * | |
977 | * Enable or change the number of VFs. Called when the user updates the number | |
978 | * of VFs in sysfs. | |
979 | **/ | |
980 | int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs) | |
981 | { | |
982 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
983 | ||
984 | if (num_vfs) | |
985 | return i40e_pci_sriov_enable(pdev, num_vfs); | |
986 | ||
987 | i40e_free_vfs(pf); | |
988 | return 0; | |
989 | } | |
990 | ||
991 | /***********************virtual channel routines******************/ | |
992 | ||
993 | /** | |
994 | * i40e_vc_send_msg_to_vf | |
995 | * @vf: pointer to the vf info | |
996 | * @v_opcode: virtual channel opcode | |
997 | * @v_retval: virtual channel return value | |
998 | * @msg: pointer to the msg buffer | |
999 | * @msglen: msg length | |
1000 | * | |
1001 | * send msg to vf | |
1002 | **/ | |
1003 | static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode, | |
1004 | u32 v_retval, u8 *msg, u16 msglen) | |
1005 | { | |
1006 | struct i40e_pf *pf = vf->pf; | |
1007 | struct i40e_hw *hw = &pf->hw; | |
1008 | i40e_status aq_ret; | |
1009 | ||
1010 | /* single place to detect unsuccessful return values */ | |
1011 | if (v_retval) { | |
1012 | vf->num_invalid_msgs++; | |
1013 | dev_err(&pf->pdev->dev, "Failed opcode %d Error: %d\n", | |
1014 | v_opcode, v_retval); | |
1015 | if (vf->num_invalid_msgs > | |
1016 | I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) { | |
1017 | dev_err(&pf->pdev->dev, | |
1018 | "Number of invalid messages exceeded for VF %d\n", | |
1019 | vf->vf_id); | |
1020 | dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n"); | |
1021 | set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states); | |
1022 | } | |
1023 | } else { | |
1024 | vf->num_valid_msgs++; | |
1025 | } | |
1026 | ||
1027 | aq_ret = i40e_aq_send_msg_to_vf(hw, vf->vf_id, v_opcode, v_retval, | |
1028 | msg, msglen, NULL); | |
1029 | if (aq_ret) { | |
1030 | dev_err(&pf->pdev->dev, | |
1031 | "Unable to send the message to VF %d aq_err %d\n", | |
1032 | vf->vf_id, pf->hw.aq.asq_last_status); | |
1033 | return -EIO; | |
1034 | } | |
1035 | ||
1036 | return 0; | |
1037 | } | |
1038 | ||
1039 | /** | |
1040 | * i40e_vc_send_resp_to_vf | |
1041 | * @vf: pointer to the vf info | |
1042 | * @opcode: operation code | |
1043 | * @retval: return value | |
1044 | * | |
1045 | * send resp msg to vf | |
1046 | **/ | |
1047 | static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf, | |
1048 | enum i40e_virtchnl_ops opcode, | |
1049 | i40e_status retval) | |
1050 | { | |
1051 | return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0); | |
1052 | } | |
1053 | ||
1054 | /** | |
1055 | * i40e_vc_get_version_msg | |
1056 | * @vf: pointer to the vf info | |
1057 | * | |
1058 | * called from the vf to request the API version used by the PF | |
1059 | **/ | |
1060 | static int i40e_vc_get_version_msg(struct i40e_vf *vf) | |
1061 | { | |
1062 | struct i40e_virtchnl_version_info info = { | |
1063 | I40E_VIRTCHNL_VERSION_MAJOR, I40E_VIRTCHNL_VERSION_MINOR | |
1064 | }; | |
1065 | ||
1066 | return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION, | |
1067 | I40E_SUCCESS, (u8 *)&info, | |
1068 | sizeof(struct | |
1069 | i40e_virtchnl_version_info)); | |
1070 | } | |
1071 | ||
1072 | /** | |
1073 | * i40e_vc_get_vf_resources_msg | |
1074 | * @vf: pointer to the vf info | |
1075 | * @msg: pointer to the msg buffer | |
1076 | * @msglen: msg length | |
1077 | * | |
1078 | * called from the vf to request its resources | |
1079 | **/ | |
1080 | static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf) | |
1081 | { | |
1082 | struct i40e_virtchnl_vf_resource *vfres = NULL; | |
1083 | struct i40e_pf *pf = vf->pf; | |
1084 | i40e_status aq_ret = 0; | |
1085 | struct i40e_vsi *vsi; | |
1086 | int i = 0, len = 0; | |
1087 | int num_vsis = 1; | |
1088 | int ret; | |
1089 | ||
1090 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) { | |
1091 | aq_ret = I40E_ERR_PARAM; | |
1092 | goto err; | |
1093 | } | |
1094 | ||
1095 | len = (sizeof(struct i40e_virtchnl_vf_resource) + | |
1096 | sizeof(struct i40e_virtchnl_vsi_resource) * num_vsis); | |
1097 | ||
1098 | vfres = kzalloc(len, GFP_KERNEL); | |
1099 | if (!vfres) { | |
1100 | aq_ret = I40E_ERR_NO_MEMORY; | |
1101 | len = 0; | |
1102 | goto err; | |
1103 | } | |
1104 | ||
1105 | vfres->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2; | |
1106 | vsi = pf->vsi[vf->lan_vsi_index]; | |
1107 | if (!vsi->info.pvid) | |
1108 | vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_VLAN; | |
1109 | ||
1110 | vfres->num_vsis = num_vsis; | |
1111 | vfres->num_queue_pairs = vf->num_queue_pairs; | |
1112 | vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf; | |
1113 | if (vf->lan_vsi_index) { | |
1114 | vfres->vsi_res[i].vsi_id = vf->lan_vsi_index; | |
1115 | vfres->vsi_res[i].vsi_type = I40E_VSI_SRIOV; | |
1116 | vfres->vsi_res[i].num_queue_pairs = | |
1117 | pf->vsi[vf->lan_vsi_index]->num_queue_pairs; | |
1118 | memcpy(vfres->vsi_res[i].default_mac_addr, | |
1119 | vf->default_lan_addr.addr, ETH_ALEN); | |
1120 | i++; | |
1121 | } | |
1122 | set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states); | |
1123 | ||
1124 | err: | |
1125 | /* send the response back to the vf */ | |
1126 | ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES, | |
1127 | aq_ret, (u8 *)vfres, len); | |
1128 | ||
1129 | kfree(vfres); | |
1130 | return ret; | |
1131 | } | |
1132 | ||
1133 | /** | |
1134 | * i40e_vc_reset_vf_msg | |
1135 | * @vf: pointer to the vf info | |
1136 | * @msg: pointer to the msg buffer | |
1137 | * @msglen: msg length | |
1138 | * | |
1139 | * called from the vf to reset itself, | |
1140 | * unlike other virtchnl messages, pf driver | |
1141 | * doesn't send the response back to the vf | |
1142 | **/ | |
1143 | static int i40e_vc_reset_vf_msg(struct i40e_vf *vf) | |
1144 | { | |
1145 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) | |
1146 | return -ENOENT; | |
1147 | ||
1148 | return i40e_reset_vf(vf, false); | |
1149 | } | |
1150 | ||
1151 | /** | |
1152 | * i40e_vc_config_promiscuous_mode_msg | |
1153 | * @vf: pointer to the vf info | |
1154 | * @msg: pointer to the msg buffer | |
1155 | * @msglen: msg length | |
1156 | * | |
1157 | * called from the vf to configure the promiscuous mode of | |
1158 | * vf vsis | |
1159 | **/ | |
1160 | static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf, | |
1161 | u8 *msg, u16 msglen) | |
1162 | { | |
1163 | struct i40e_virtchnl_promisc_info *info = | |
1164 | (struct i40e_virtchnl_promisc_info *)msg; | |
1165 | struct i40e_pf *pf = vf->pf; | |
1166 | struct i40e_hw *hw = &pf->hw; | |
1167 | bool allmulti = false; | |
1168 | bool promisc = false; | |
1169 | i40e_status aq_ret; | |
1170 | ||
1171 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
1172 | !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) || | |
1173 | !i40e_vc_isvalid_vsi_id(vf, info->vsi_id) || | |
1174 | (pf->vsi[info->vsi_id]->type != I40E_VSI_FCOE)) { | |
1175 | aq_ret = I40E_ERR_PARAM; | |
1176 | goto error_param; | |
1177 | } | |
1178 | ||
1179 | if (info->flags & I40E_FLAG_VF_UNICAST_PROMISC) | |
1180 | promisc = true; | |
1181 | aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, info->vsi_id, | |
1182 | promisc, NULL); | |
1183 | if (aq_ret) | |
1184 | goto error_param; | |
1185 | ||
1186 | if (info->flags & I40E_FLAG_VF_MULTICAST_PROMISC) | |
1187 | allmulti = true; | |
1188 | aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, info->vsi_id, | |
1189 | allmulti, NULL); | |
1190 | ||
1191 | error_param: | |
1192 | /* send the response to the vf */ | |
1193 | return i40e_vc_send_resp_to_vf(vf, | |
1194 | I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, | |
1195 | aq_ret); | |
1196 | } | |
1197 | ||
1198 | /** | |
1199 | * i40e_vc_config_queues_msg | |
1200 | * @vf: pointer to the vf info | |
1201 | * @msg: pointer to the msg buffer | |
1202 | * @msglen: msg length | |
1203 | * | |
1204 | * called from the vf to configure the rx/tx | |
1205 | * queues | |
1206 | **/ | |
1207 | static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1208 | { | |
1209 | struct i40e_virtchnl_vsi_queue_config_info *qci = | |
1210 | (struct i40e_virtchnl_vsi_queue_config_info *)msg; | |
1211 | struct i40e_virtchnl_queue_pair_info *qpi; | |
1212 | u16 vsi_id, vsi_queue_id; | |
1213 | i40e_status aq_ret = 0; | |
1214 | int i; | |
1215 | ||
1216 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { | |
1217 | aq_ret = I40E_ERR_PARAM; | |
1218 | goto error_param; | |
1219 | } | |
1220 | ||
1221 | vsi_id = qci->vsi_id; | |
1222 | if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1223 | aq_ret = I40E_ERR_PARAM; | |
1224 | goto error_param; | |
1225 | } | |
1226 | for (i = 0; i < qci->num_queue_pairs; i++) { | |
1227 | qpi = &qci->qpair[i]; | |
1228 | vsi_queue_id = qpi->txq.queue_id; | |
1229 | if ((qpi->txq.vsi_id != vsi_id) || | |
1230 | (qpi->rxq.vsi_id != vsi_id) || | |
1231 | (qpi->rxq.queue_id != vsi_queue_id) || | |
1232 | !i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) { | |
1233 | aq_ret = I40E_ERR_PARAM; | |
1234 | goto error_param; | |
1235 | } | |
1236 | ||
1237 | if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id, | |
1238 | &qpi->rxq) || | |
1239 | i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id, | |
1240 | &qpi->txq)) { | |
1241 | aq_ret = I40E_ERR_PARAM; | |
1242 | goto error_param; | |
1243 | } | |
1244 | } | |
1245 | ||
1246 | error_param: | |
1247 | /* send the response to the vf */ | |
1248 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES, | |
1249 | aq_ret); | |
1250 | } | |
1251 | ||
1252 | /** | |
1253 | * i40e_vc_config_irq_map_msg | |
1254 | * @vf: pointer to the vf info | |
1255 | * @msg: pointer to the msg buffer | |
1256 | * @msglen: msg length | |
1257 | * | |
1258 | * called from the vf to configure the irq to | |
1259 | * queue map | |
1260 | **/ | |
1261 | static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1262 | { | |
1263 | struct i40e_virtchnl_irq_map_info *irqmap_info = | |
1264 | (struct i40e_virtchnl_irq_map_info *)msg; | |
1265 | struct i40e_virtchnl_vector_map *map; | |
1266 | u16 vsi_id, vsi_queue_id, vector_id; | |
1267 | i40e_status aq_ret = 0; | |
1268 | unsigned long tempmap; | |
1269 | int i; | |
1270 | ||
1271 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { | |
1272 | aq_ret = I40E_ERR_PARAM; | |
1273 | goto error_param; | |
1274 | } | |
1275 | ||
1276 | for (i = 0; i < irqmap_info->num_vectors; i++) { | |
1277 | map = &irqmap_info->vecmap[i]; | |
1278 | ||
1279 | vector_id = map->vector_id; | |
1280 | vsi_id = map->vsi_id; | |
1281 | /* validate msg params */ | |
1282 | if (!i40e_vc_isvalid_vector_id(vf, vector_id) || | |
1283 | !i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1284 | aq_ret = I40E_ERR_PARAM; | |
1285 | goto error_param; | |
1286 | } | |
1287 | ||
1288 | /* lookout for the invalid queue index */ | |
1289 | tempmap = map->rxq_map; | |
4836650b | 1290 | for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
1291 | if (!i40e_vc_isvalid_queue_id(vf, vsi_id, |
1292 | vsi_queue_id)) { | |
1293 | aq_ret = I40E_ERR_PARAM; | |
1294 | goto error_param; | |
1295 | } | |
5c3c48ac JB |
1296 | } |
1297 | ||
1298 | tempmap = map->txq_map; | |
4836650b | 1299 | for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
1300 | if (!i40e_vc_isvalid_queue_id(vf, vsi_id, |
1301 | vsi_queue_id)) { | |
1302 | aq_ret = I40E_ERR_PARAM; | |
1303 | goto error_param; | |
1304 | } | |
5c3c48ac JB |
1305 | } |
1306 | ||
1307 | i40e_config_irq_link_list(vf, vsi_id, map); | |
1308 | } | |
1309 | error_param: | |
1310 | /* send the response to the vf */ | |
1311 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP, | |
1312 | aq_ret); | |
1313 | } | |
1314 | ||
1315 | /** | |
1316 | * i40e_vc_enable_queues_msg | |
1317 | * @vf: pointer to the vf info | |
1318 | * @msg: pointer to the msg buffer | |
1319 | * @msglen: msg length | |
1320 | * | |
1321 | * called from the vf to enable all or specific queue(s) | |
1322 | **/ | |
1323 | static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1324 | { | |
1325 | struct i40e_virtchnl_queue_select *vqs = | |
1326 | (struct i40e_virtchnl_queue_select *)msg; | |
1327 | struct i40e_pf *pf = vf->pf; | |
1328 | u16 vsi_id = vqs->vsi_id; | |
1329 | i40e_status aq_ret = 0; | |
1330 | unsigned long tempmap; | |
1331 | u16 queue_id; | |
1332 | ||
1333 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { | |
1334 | aq_ret = I40E_ERR_PARAM; | |
1335 | goto error_param; | |
1336 | } | |
1337 | ||
1338 | if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1339 | aq_ret = I40E_ERR_PARAM; | |
1340 | goto error_param; | |
1341 | } | |
1342 | ||
1343 | if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) { | |
1344 | aq_ret = I40E_ERR_PARAM; | |
1345 | goto error_param; | |
1346 | } | |
1347 | ||
1348 | tempmap = vqs->rx_queues; | |
4836650b | 1349 | for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
1350 | if (!i40e_vc_isvalid_queue_id(vf, vsi_id, queue_id)) { |
1351 | aq_ret = I40E_ERR_PARAM; | |
1352 | goto error_param; | |
1353 | } | |
1354 | i40e_ctrl_vsi_rx_queue(vf, vsi_id, queue_id, | |
1355 | I40E_QUEUE_CTRL_ENABLE); | |
5c3c48ac JB |
1356 | } |
1357 | ||
1358 | tempmap = vqs->tx_queues; | |
4836650b | 1359 | for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
1360 | if (!i40e_vc_isvalid_queue_id(vf, vsi_id, queue_id)) { |
1361 | aq_ret = I40E_ERR_PARAM; | |
1362 | goto error_param; | |
1363 | } | |
1364 | i40e_ctrl_vsi_tx_queue(vf, vsi_id, queue_id, | |
1365 | I40E_QUEUE_CTRL_ENABLE); | |
5c3c48ac JB |
1366 | } |
1367 | ||
1368 | /* Poll the status register to make sure that the | |
1369 | * requested op was completed successfully | |
1370 | */ | |
1371 | udelay(10); | |
1372 | ||
1373 | tempmap = vqs->rx_queues; | |
4836650b | 1374 | for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
1375 | if (i40e_ctrl_vsi_rx_queue(vf, vsi_id, queue_id, |
1376 | I40E_QUEUE_CTRL_ENABLECHECK)) { | |
1377 | dev_err(&pf->pdev->dev, | |
1378 | "Queue control check failed on RX queue %d of VSI %d VF %d\n", | |
1379 | queue_id, vsi_id, vf->vf_id); | |
1380 | } | |
5c3c48ac JB |
1381 | } |
1382 | ||
1383 | tempmap = vqs->tx_queues; | |
4836650b | 1384 | for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
1385 | if (i40e_ctrl_vsi_tx_queue(vf, vsi_id, queue_id, |
1386 | I40E_QUEUE_CTRL_ENABLECHECK)) { | |
1387 | dev_err(&pf->pdev->dev, | |
1388 | "Queue control check failed on TX queue %d of VSI %d VF %d\n", | |
1389 | queue_id, vsi_id, vf->vf_id); | |
1390 | } | |
5c3c48ac JB |
1391 | } |
1392 | ||
1393 | error_param: | |
1394 | /* send the response to the vf */ | |
1395 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES, | |
1396 | aq_ret); | |
1397 | } | |
1398 | ||
1399 | /** | |
1400 | * i40e_vc_disable_queues_msg | |
1401 | * @vf: pointer to the vf info | |
1402 | * @msg: pointer to the msg buffer | |
1403 | * @msglen: msg length | |
1404 | * | |
1405 | * called from the vf to disable all or specific | |
1406 | * queue(s) | |
1407 | **/ | |
1408 | static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1409 | { | |
1410 | struct i40e_virtchnl_queue_select *vqs = | |
1411 | (struct i40e_virtchnl_queue_select *)msg; | |
1412 | struct i40e_pf *pf = vf->pf; | |
1413 | u16 vsi_id = vqs->vsi_id; | |
1414 | i40e_status aq_ret = 0; | |
1415 | unsigned long tempmap; | |
1416 | u16 queue_id; | |
1417 | ||
1418 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { | |
1419 | aq_ret = I40E_ERR_PARAM; | |
1420 | goto error_param; | |
1421 | } | |
1422 | ||
1423 | if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) { | |
1424 | aq_ret = I40E_ERR_PARAM; | |
1425 | goto error_param; | |
1426 | } | |
1427 | ||
1428 | if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) { | |
1429 | aq_ret = I40E_ERR_PARAM; | |
1430 | goto error_param; | |
1431 | } | |
1432 | ||
1433 | tempmap = vqs->rx_queues; | |
4836650b | 1434 | for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
1435 | if (!i40e_vc_isvalid_queue_id(vf, vsi_id, queue_id)) { |
1436 | aq_ret = I40E_ERR_PARAM; | |
1437 | goto error_param; | |
1438 | } | |
1439 | i40e_ctrl_vsi_rx_queue(vf, vsi_id, queue_id, | |
1440 | I40E_QUEUE_CTRL_DISABLE); | |
5c3c48ac JB |
1441 | } |
1442 | ||
1443 | tempmap = vqs->tx_queues; | |
4836650b | 1444 | for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
1445 | if (!i40e_vc_isvalid_queue_id(vf, vsi_id, queue_id)) { |
1446 | aq_ret = I40E_ERR_PARAM; | |
1447 | goto error_param; | |
1448 | } | |
1449 | i40e_ctrl_vsi_tx_queue(vf, vsi_id, queue_id, | |
1450 | I40E_QUEUE_CTRL_DISABLE); | |
5c3c48ac JB |
1451 | } |
1452 | ||
1453 | /* Poll the status register to make sure that the | |
1454 | * requested op was completed successfully | |
1455 | */ | |
1456 | udelay(10); | |
1457 | ||
1458 | tempmap = vqs->rx_queues; | |
4836650b | 1459 | for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
1460 | if (i40e_ctrl_vsi_rx_queue(vf, vsi_id, queue_id, |
1461 | I40E_QUEUE_CTRL_DISABLECHECK)) { | |
1462 | dev_err(&pf->pdev->dev, | |
1463 | "Queue control check failed on RX queue %d of VSI %d VF %d\n", | |
1464 | queue_id, vsi_id, vf->vf_id); | |
1465 | } | |
5c3c48ac JB |
1466 | } |
1467 | ||
1468 | tempmap = vqs->tx_queues; | |
4836650b | 1469 | for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
1470 | if (i40e_ctrl_vsi_tx_queue(vf, vsi_id, queue_id, |
1471 | I40E_QUEUE_CTRL_DISABLECHECK)) { | |
1472 | dev_err(&pf->pdev->dev, | |
1473 | "Queue control check failed on TX queue %d of VSI %d VF %d\n", | |
1474 | queue_id, vsi_id, vf->vf_id); | |
1475 | } | |
5c3c48ac JB |
1476 | } |
1477 | ||
1478 | error_param: | |
1479 | /* send the response to the vf */ | |
1480 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES, | |
1481 | aq_ret); | |
1482 | } | |
1483 | ||
1484 | /** | |
1485 | * i40e_vc_get_stats_msg | |
1486 | * @vf: pointer to the vf info | |
1487 | * @msg: pointer to the msg buffer | |
1488 | * @msglen: msg length | |
1489 | * | |
1490 | * called from the vf to get vsi stats | |
1491 | **/ | |
1492 | static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1493 | { | |
1494 | struct i40e_virtchnl_queue_select *vqs = | |
1495 | (struct i40e_virtchnl_queue_select *)msg; | |
1496 | struct i40e_pf *pf = vf->pf; | |
1497 | struct i40e_eth_stats stats; | |
1498 | i40e_status aq_ret = 0; | |
1499 | struct i40e_vsi *vsi; | |
1500 | ||
1501 | memset(&stats, 0, sizeof(struct i40e_eth_stats)); | |
1502 | ||
1503 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { | |
1504 | aq_ret = I40E_ERR_PARAM; | |
1505 | goto error_param; | |
1506 | } | |
1507 | ||
1508 | if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) { | |
1509 | aq_ret = I40E_ERR_PARAM; | |
1510 | goto error_param; | |
1511 | } | |
1512 | ||
1513 | vsi = pf->vsi[vqs->vsi_id]; | |
1514 | if (!vsi) { | |
1515 | aq_ret = I40E_ERR_PARAM; | |
1516 | goto error_param; | |
1517 | } | |
1518 | i40e_update_eth_stats(vsi); | |
1519 | memcpy(&stats, &vsi->eth_stats, sizeof(struct i40e_eth_stats)); | |
1520 | ||
1521 | error_param: | |
1522 | /* send the response back to the vf */ | |
1523 | return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS, aq_ret, | |
1524 | (u8 *)&stats, sizeof(stats)); | |
1525 | } | |
1526 | ||
1527 | /** | |
1528 | * i40e_vc_add_mac_addr_msg | |
1529 | * @vf: pointer to the vf info | |
1530 | * @msg: pointer to the msg buffer | |
1531 | * @msglen: msg length | |
1532 | * | |
1533 | * add guest mac address filter | |
1534 | **/ | |
1535 | static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1536 | { | |
1537 | struct i40e_virtchnl_ether_addr_list *al = | |
1538 | (struct i40e_virtchnl_ether_addr_list *)msg; | |
1539 | struct i40e_pf *pf = vf->pf; | |
1540 | struct i40e_vsi *vsi = NULL; | |
1541 | u16 vsi_id = al->vsi_id; | |
1542 | i40e_status aq_ret = 0; | |
1543 | int i; | |
1544 | ||
1545 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
1546 | !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) || | |
1547 | !i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1548 | aq_ret = I40E_ERR_PARAM; | |
1549 | goto error_param; | |
1550 | } | |
1551 | ||
1552 | for (i = 0; i < al->num_elements; i++) { | |
1553 | if (is_broadcast_ether_addr(al->list[i].addr) || | |
1554 | is_zero_ether_addr(al->list[i].addr)) { | |
1555 | dev_err(&pf->pdev->dev, "invalid VF MAC addr %pMAC\n", | |
1556 | al->list[i].addr); | |
1557 | aq_ret = I40E_ERR_PARAM; | |
1558 | goto error_param; | |
1559 | } | |
1560 | } | |
1561 | vsi = pf->vsi[vsi_id]; | |
1562 | ||
1563 | /* add new addresses to the list */ | |
1564 | for (i = 0; i < al->num_elements; i++) { | |
1565 | struct i40e_mac_filter *f; | |
1566 | ||
1567 | f = i40e_find_mac(vsi, al->list[i].addr, true, false); | |
7e68edf9 | 1568 | if (!f) { |
5c3c48ac JB |
1569 | if (i40e_is_vsi_in_vlan(vsi)) |
1570 | f = i40e_put_mac_in_vlan(vsi, al->list[i].addr, | |
1571 | true, false); | |
1572 | else | |
1573 | f = i40e_add_filter(vsi, al->list[i].addr, -1, | |
1574 | true, false); | |
1575 | } | |
1576 | ||
1577 | if (!f) { | |
1578 | dev_err(&pf->pdev->dev, | |
1579 | "Unable to add VF MAC filter\n"); | |
1580 | aq_ret = I40E_ERR_PARAM; | |
1581 | goto error_param; | |
1582 | } | |
1583 | } | |
1584 | ||
1585 | /* program the updated filter list */ | |
1586 | if (i40e_sync_vsi_filters(vsi)) | |
1587 | dev_err(&pf->pdev->dev, "Unable to program VF MAC filters\n"); | |
1588 | ||
1589 | error_param: | |
1590 | /* send the response to the vf */ | |
1591 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS, | |
1592 | aq_ret); | |
1593 | } | |
1594 | ||
1595 | /** | |
1596 | * i40e_vc_del_mac_addr_msg | |
1597 | * @vf: pointer to the vf info | |
1598 | * @msg: pointer to the msg buffer | |
1599 | * @msglen: msg length | |
1600 | * | |
1601 | * remove guest mac address filter | |
1602 | **/ | |
1603 | static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1604 | { | |
1605 | struct i40e_virtchnl_ether_addr_list *al = | |
1606 | (struct i40e_virtchnl_ether_addr_list *)msg; | |
1607 | struct i40e_pf *pf = vf->pf; | |
1608 | struct i40e_vsi *vsi = NULL; | |
1609 | u16 vsi_id = al->vsi_id; | |
1610 | i40e_status aq_ret = 0; | |
1611 | int i; | |
1612 | ||
1613 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
1614 | !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) || | |
1615 | !i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1616 | aq_ret = I40E_ERR_PARAM; | |
1617 | goto error_param; | |
1618 | } | |
1619 | vsi = pf->vsi[vsi_id]; | |
1620 | ||
1621 | /* delete addresses from the list */ | |
1622 | for (i = 0; i < al->num_elements; i++) | |
1623 | i40e_del_filter(vsi, al->list[i].addr, | |
1624 | I40E_VLAN_ANY, true, false); | |
1625 | ||
1626 | /* program the updated filter list */ | |
1627 | if (i40e_sync_vsi_filters(vsi)) | |
1628 | dev_err(&pf->pdev->dev, "Unable to program VF MAC filters\n"); | |
1629 | ||
1630 | error_param: | |
1631 | /* send the response to the vf */ | |
1632 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS, | |
1633 | aq_ret); | |
1634 | } | |
1635 | ||
1636 | /** | |
1637 | * i40e_vc_add_vlan_msg | |
1638 | * @vf: pointer to the vf info | |
1639 | * @msg: pointer to the msg buffer | |
1640 | * @msglen: msg length | |
1641 | * | |
1642 | * program guest vlan id | |
1643 | **/ | |
1644 | static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1645 | { | |
1646 | struct i40e_virtchnl_vlan_filter_list *vfl = | |
1647 | (struct i40e_virtchnl_vlan_filter_list *)msg; | |
1648 | struct i40e_pf *pf = vf->pf; | |
1649 | struct i40e_vsi *vsi = NULL; | |
1650 | u16 vsi_id = vfl->vsi_id; | |
1651 | i40e_status aq_ret = 0; | |
1652 | int i; | |
1653 | ||
1654 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
1655 | !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) || | |
1656 | !i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1657 | aq_ret = I40E_ERR_PARAM; | |
1658 | goto error_param; | |
1659 | } | |
1660 | ||
1661 | for (i = 0; i < vfl->num_elements; i++) { | |
1662 | if (vfl->vlan_id[i] > I40E_MAX_VLANID) { | |
1663 | aq_ret = I40E_ERR_PARAM; | |
1664 | dev_err(&pf->pdev->dev, | |
1665 | "invalid VF VLAN id %d\n", vfl->vlan_id[i]); | |
1666 | goto error_param; | |
1667 | } | |
1668 | } | |
1669 | vsi = pf->vsi[vsi_id]; | |
1670 | if (vsi->info.pvid) { | |
1671 | aq_ret = I40E_ERR_PARAM; | |
1672 | goto error_param; | |
1673 | } | |
1674 | ||
1675 | i40e_vlan_stripping_enable(vsi); | |
1676 | for (i = 0; i < vfl->num_elements; i++) { | |
1677 | /* add new VLAN filter */ | |
1678 | int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]); | |
1679 | if (ret) | |
1680 | dev_err(&pf->pdev->dev, | |
1681 | "Unable to add VF vlan filter %d, error %d\n", | |
1682 | vfl->vlan_id[i], ret); | |
1683 | } | |
1684 | ||
1685 | error_param: | |
1686 | /* send the response to the vf */ | |
1687 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN, aq_ret); | |
1688 | } | |
1689 | ||
1690 | /** | |
1691 | * i40e_vc_remove_vlan_msg | |
1692 | * @vf: pointer to the vf info | |
1693 | * @msg: pointer to the msg buffer | |
1694 | * @msglen: msg length | |
1695 | * | |
1696 | * remove programmed guest vlan id | |
1697 | **/ | |
1698 | static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1699 | { | |
1700 | struct i40e_virtchnl_vlan_filter_list *vfl = | |
1701 | (struct i40e_virtchnl_vlan_filter_list *)msg; | |
1702 | struct i40e_pf *pf = vf->pf; | |
1703 | struct i40e_vsi *vsi = NULL; | |
1704 | u16 vsi_id = vfl->vsi_id; | |
1705 | i40e_status aq_ret = 0; | |
1706 | int i; | |
1707 | ||
1708 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
1709 | !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) || | |
1710 | !i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1711 | aq_ret = I40E_ERR_PARAM; | |
1712 | goto error_param; | |
1713 | } | |
1714 | ||
1715 | for (i = 0; i < vfl->num_elements; i++) { | |
1716 | if (vfl->vlan_id[i] > I40E_MAX_VLANID) { | |
1717 | aq_ret = I40E_ERR_PARAM; | |
1718 | goto error_param; | |
1719 | } | |
1720 | } | |
1721 | ||
1722 | vsi = pf->vsi[vsi_id]; | |
1723 | if (vsi->info.pvid) { | |
1724 | aq_ret = I40E_ERR_PARAM; | |
1725 | goto error_param; | |
1726 | } | |
1727 | ||
1728 | for (i = 0; i < vfl->num_elements; i++) { | |
1729 | int ret = i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]); | |
1730 | if (ret) | |
1731 | dev_err(&pf->pdev->dev, | |
1732 | "Unable to delete VF vlan filter %d, error %d\n", | |
1733 | vfl->vlan_id[i], ret); | |
1734 | } | |
1735 | ||
1736 | error_param: | |
1737 | /* send the response to the vf */ | |
1738 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN, aq_ret); | |
1739 | } | |
1740 | ||
5c3c48ac JB |
1741 | /** |
1742 | * i40e_vc_validate_vf_msg | |
1743 | * @vf: pointer to the vf info | |
1744 | * @msg: pointer to the msg buffer | |
1745 | * @msglen: msg length | |
1746 | * @msghndl: msg handle | |
1747 | * | |
1748 | * validate msg | |
1749 | **/ | |
1750 | static int i40e_vc_validate_vf_msg(struct i40e_vf *vf, u32 v_opcode, | |
1751 | u32 v_retval, u8 *msg, u16 msglen) | |
1752 | { | |
1753 | bool err_msg_format = false; | |
1754 | int valid_len; | |
1755 | ||
1756 | /* Check if VF is disabled. */ | |
1757 | if (test_bit(I40E_VF_STAT_DISABLED, &vf->vf_states)) | |
1758 | return I40E_ERR_PARAM; | |
1759 | ||
1760 | /* Validate message length. */ | |
1761 | switch (v_opcode) { | |
1762 | case I40E_VIRTCHNL_OP_VERSION: | |
1763 | valid_len = sizeof(struct i40e_virtchnl_version_info); | |
1764 | break; | |
1765 | case I40E_VIRTCHNL_OP_RESET_VF: | |
1766 | case I40E_VIRTCHNL_OP_GET_VF_RESOURCES: | |
1767 | valid_len = 0; | |
1768 | break; | |
1769 | case I40E_VIRTCHNL_OP_CONFIG_TX_QUEUE: | |
1770 | valid_len = sizeof(struct i40e_virtchnl_txq_info); | |
1771 | break; | |
1772 | case I40E_VIRTCHNL_OP_CONFIG_RX_QUEUE: | |
1773 | valid_len = sizeof(struct i40e_virtchnl_rxq_info); | |
1774 | break; | |
1775 | case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES: | |
1776 | valid_len = sizeof(struct i40e_virtchnl_vsi_queue_config_info); | |
1777 | if (msglen >= valid_len) { | |
1778 | struct i40e_virtchnl_vsi_queue_config_info *vqc = | |
1779 | (struct i40e_virtchnl_vsi_queue_config_info *)msg; | |
1780 | valid_len += (vqc->num_queue_pairs * | |
1781 | sizeof(struct | |
1782 | i40e_virtchnl_queue_pair_info)); | |
1783 | if (vqc->num_queue_pairs == 0) | |
1784 | err_msg_format = true; | |
1785 | } | |
1786 | break; | |
1787 | case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP: | |
1788 | valid_len = sizeof(struct i40e_virtchnl_irq_map_info); | |
1789 | if (msglen >= valid_len) { | |
1790 | struct i40e_virtchnl_irq_map_info *vimi = | |
1791 | (struct i40e_virtchnl_irq_map_info *)msg; | |
1792 | valid_len += (vimi->num_vectors * | |
1793 | sizeof(struct i40e_virtchnl_vector_map)); | |
1794 | if (vimi->num_vectors == 0) | |
1795 | err_msg_format = true; | |
1796 | } | |
1797 | break; | |
1798 | case I40E_VIRTCHNL_OP_ENABLE_QUEUES: | |
1799 | case I40E_VIRTCHNL_OP_DISABLE_QUEUES: | |
1800 | valid_len = sizeof(struct i40e_virtchnl_queue_select); | |
1801 | break; | |
1802 | case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS: | |
1803 | case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS: | |
1804 | valid_len = sizeof(struct i40e_virtchnl_ether_addr_list); | |
1805 | if (msglen >= valid_len) { | |
1806 | struct i40e_virtchnl_ether_addr_list *veal = | |
1807 | (struct i40e_virtchnl_ether_addr_list *)msg; | |
1808 | valid_len += veal->num_elements * | |
1809 | sizeof(struct i40e_virtchnl_ether_addr); | |
1810 | if (veal->num_elements == 0) | |
1811 | err_msg_format = true; | |
1812 | } | |
1813 | break; | |
1814 | case I40E_VIRTCHNL_OP_ADD_VLAN: | |
1815 | case I40E_VIRTCHNL_OP_DEL_VLAN: | |
1816 | valid_len = sizeof(struct i40e_virtchnl_vlan_filter_list); | |
1817 | if (msglen >= valid_len) { | |
1818 | struct i40e_virtchnl_vlan_filter_list *vfl = | |
1819 | (struct i40e_virtchnl_vlan_filter_list *)msg; | |
1820 | valid_len += vfl->num_elements * sizeof(u16); | |
1821 | if (vfl->num_elements == 0) | |
1822 | err_msg_format = true; | |
1823 | } | |
1824 | break; | |
1825 | case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE: | |
1826 | valid_len = sizeof(struct i40e_virtchnl_promisc_info); | |
1827 | break; | |
1828 | case I40E_VIRTCHNL_OP_GET_STATS: | |
1829 | valid_len = sizeof(struct i40e_virtchnl_queue_select); | |
1830 | break; | |
1831 | /* These are always errors coming from the VF. */ | |
1832 | case I40E_VIRTCHNL_OP_EVENT: | |
1833 | case I40E_VIRTCHNL_OP_UNKNOWN: | |
1834 | default: | |
1835 | return -EPERM; | |
1836 | break; | |
1837 | } | |
1838 | /* few more checks */ | |
1839 | if ((valid_len != msglen) || (err_msg_format)) { | |
1840 | i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM); | |
1841 | return -EINVAL; | |
1842 | } else { | |
1843 | return 0; | |
1844 | } | |
1845 | } | |
1846 | ||
1847 | /** | |
1848 | * i40e_vc_process_vf_msg | |
1849 | * @pf: pointer to the pf structure | |
1850 | * @vf_id: source vf id | |
1851 | * @msg: pointer to the msg buffer | |
1852 | * @msglen: msg length | |
1853 | * @msghndl: msg handle | |
1854 | * | |
1855 | * called from the common aeq/arq handler to | |
1856 | * process request from vf | |
1857 | **/ | |
1858 | int i40e_vc_process_vf_msg(struct i40e_pf *pf, u16 vf_id, u32 v_opcode, | |
1859 | u32 v_retval, u8 *msg, u16 msglen) | |
1860 | { | |
1861 | struct i40e_vf *vf = &(pf->vf[vf_id]); | |
1862 | struct i40e_hw *hw = &pf->hw; | |
1863 | int ret; | |
1864 | ||
1865 | pf->vf_aq_requests++; | |
1866 | /* perform basic checks on the msg */ | |
1867 | ret = i40e_vc_validate_vf_msg(vf, v_opcode, v_retval, msg, msglen); | |
1868 | ||
1869 | if (ret) { | |
1870 | dev_err(&pf->pdev->dev, "invalid message from vf %d\n", vf_id); | |
1871 | return ret; | |
1872 | } | |
1873 | wr32(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_VFR_VFACTIVE); | |
1874 | switch (v_opcode) { | |
1875 | case I40E_VIRTCHNL_OP_VERSION: | |
1876 | ret = i40e_vc_get_version_msg(vf); | |
1877 | break; | |
1878 | case I40E_VIRTCHNL_OP_GET_VF_RESOURCES: | |
1879 | ret = i40e_vc_get_vf_resources_msg(vf); | |
1880 | break; | |
1881 | case I40E_VIRTCHNL_OP_RESET_VF: | |
1882 | ret = i40e_vc_reset_vf_msg(vf); | |
1883 | break; | |
1884 | case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE: | |
1885 | ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen); | |
1886 | break; | |
1887 | case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES: | |
1888 | ret = i40e_vc_config_queues_msg(vf, msg, msglen); | |
1889 | break; | |
1890 | case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP: | |
1891 | ret = i40e_vc_config_irq_map_msg(vf, msg, msglen); | |
1892 | break; | |
1893 | case I40E_VIRTCHNL_OP_ENABLE_QUEUES: | |
1894 | ret = i40e_vc_enable_queues_msg(vf, msg, msglen); | |
1895 | break; | |
1896 | case I40E_VIRTCHNL_OP_DISABLE_QUEUES: | |
1897 | ret = i40e_vc_disable_queues_msg(vf, msg, msglen); | |
1898 | break; | |
1899 | case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS: | |
1900 | ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen); | |
1901 | break; | |
1902 | case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS: | |
1903 | ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen); | |
1904 | break; | |
1905 | case I40E_VIRTCHNL_OP_ADD_VLAN: | |
1906 | ret = i40e_vc_add_vlan_msg(vf, msg, msglen); | |
1907 | break; | |
1908 | case I40E_VIRTCHNL_OP_DEL_VLAN: | |
1909 | ret = i40e_vc_remove_vlan_msg(vf, msg, msglen); | |
1910 | break; | |
1911 | case I40E_VIRTCHNL_OP_GET_STATS: | |
1912 | ret = i40e_vc_get_stats_msg(vf, msg, msglen); | |
1913 | break; | |
5c3c48ac JB |
1914 | case I40E_VIRTCHNL_OP_UNKNOWN: |
1915 | default: | |
1916 | dev_err(&pf->pdev->dev, | |
1917 | "Unsupported opcode %d from vf %d\n", v_opcode, vf_id); | |
1918 | ret = i40e_vc_send_resp_to_vf(vf, v_opcode, | |
1919 | I40E_ERR_NOT_IMPLEMENTED); | |
1920 | break; | |
1921 | } | |
1922 | ||
1923 | return ret; | |
1924 | } | |
1925 | ||
1926 | /** | |
1927 | * i40e_vc_process_vflr_event | |
1928 | * @pf: pointer to the pf structure | |
1929 | * | |
1930 | * called from the vlfr irq handler to | |
1931 | * free up vf resources and state variables | |
1932 | **/ | |
1933 | int i40e_vc_process_vflr_event(struct i40e_pf *pf) | |
1934 | { | |
1935 | u32 reg, reg_idx, bit_idx, vf_id; | |
1936 | struct i40e_hw *hw = &pf->hw; | |
1937 | struct i40e_vf *vf; | |
1938 | ||
1939 | if (!test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state)) | |
1940 | return 0; | |
1941 | ||
1942 | clear_bit(__I40E_VFLR_EVENT_PENDING, &pf->state); | |
1943 | for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) { | |
1944 | reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32; | |
1945 | bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32; | |
1946 | /* read GLGEN_VFLRSTAT register to find out the flr vfs */ | |
1947 | vf = &pf->vf[vf_id]; | |
1948 | reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx)); | |
1949 | if (reg & (1 << bit_idx)) { | |
1950 | /* clear the bit in GLGEN_VFLRSTAT */ | |
1951 | wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), (1 << bit_idx)); | |
1952 | ||
1953 | if (i40e_reset_vf(vf, true)) | |
1954 | dev_err(&pf->pdev->dev, | |
1955 | "Unable to reset the VF %d\n", vf_id); | |
1956 | /* free up vf resources to destroy vsi state */ | |
1957 | i40e_free_vf_res(vf); | |
1958 | ||
1959 | /* allocate new vf resources with the default state */ | |
1960 | if (i40e_alloc_vf_res(vf)) | |
1961 | dev_err(&pf->pdev->dev, | |
1962 | "Unable to allocate VF resources %d\n", | |
1963 | vf_id); | |
1964 | ||
1965 | i40e_enable_vf_mappings(vf); | |
1966 | } | |
1967 | } | |
1968 | ||
1969 | /* re-enable vflr interrupt cause */ | |
1970 | reg = rd32(hw, I40E_PFINT_ICR0_ENA); | |
1971 | reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK; | |
1972 | wr32(hw, I40E_PFINT_ICR0_ENA, reg); | |
1973 | i40e_flush(hw); | |
1974 | ||
1975 | return 0; | |
1976 | } | |
1977 | ||
1978 | /** | |
1979 | * i40e_vc_vf_broadcast | |
1980 | * @pf: pointer to the pf structure | |
1981 | * @opcode: operation code | |
1982 | * @retval: return value | |
1983 | * @msg: pointer to the msg buffer | |
1984 | * @msglen: msg length | |
1985 | * | |
1986 | * send a message to all VFs on a given PF | |
1987 | **/ | |
1988 | static void i40e_vc_vf_broadcast(struct i40e_pf *pf, | |
1989 | enum i40e_virtchnl_ops v_opcode, | |
1990 | i40e_status v_retval, u8 *msg, | |
1991 | u16 msglen) | |
1992 | { | |
1993 | struct i40e_hw *hw = &pf->hw; | |
1994 | struct i40e_vf *vf = pf->vf; | |
1995 | int i; | |
1996 | ||
1997 | for (i = 0; i < pf->num_alloc_vfs; i++) { | |
1998 | /* Ignore return value on purpose - a given VF may fail, but | |
1999 | * we need to keep going and send to all of them | |
2000 | */ | |
2001 | i40e_aq_send_msg_to_vf(hw, vf->vf_id, v_opcode, v_retval, | |
2002 | msg, msglen, NULL); | |
2003 | vf++; | |
2004 | } | |
2005 | } | |
2006 | ||
2007 | /** | |
2008 | * i40e_vc_notify_link_state | |
2009 | * @pf: pointer to the pf structure | |
2010 | * | |
2011 | * send a link status message to all VFs on a given PF | |
2012 | **/ | |
2013 | void i40e_vc_notify_link_state(struct i40e_pf *pf) | |
2014 | { | |
2015 | struct i40e_virtchnl_pf_event pfe; | |
2016 | ||
2017 | pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE; | |
2018 | pfe.severity = I40E_PF_EVENT_SEVERITY_INFO; | |
2019 | pfe.event_data.link_event.link_status = | |
2020 | pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP; | |
2021 | pfe.event_data.link_event.link_speed = pf->hw.phy.link_info.link_speed; | |
2022 | ||
2023 | i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, I40E_SUCCESS, | |
2024 | (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event)); | |
2025 | } | |
2026 | ||
2027 | /** | |
2028 | * i40e_vc_notify_reset | |
2029 | * @pf: pointer to the pf structure | |
2030 | * | |
2031 | * indicate a pending reset to all VFs on a given PF | |
2032 | **/ | |
2033 | void i40e_vc_notify_reset(struct i40e_pf *pf) | |
2034 | { | |
2035 | struct i40e_virtchnl_pf_event pfe; | |
2036 | ||
2037 | pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING; | |
2038 | pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM; | |
2039 | i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, I40E_SUCCESS, | |
2040 | (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event)); | |
2041 | } | |
2042 | ||
2043 | /** | |
2044 | * i40e_vc_notify_vf_reset | |
2045 | * @vf: pointer to the vf structure | |
2046 | * | |
2047 | * indicate a pending reset to the given VF | |
2048 | **/ | |
2049 | void i40e_vc_notify_vf_reset(struct i40e_vf *vf) | |
2050 | { | |
2051 | struct i40e_virtchnl_pf_event pfe; | |
2052 | ||
2053 | pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING; | |
2054 | pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM; | |
2055 | i40e_aq_send_msg_to_vf(&vf->pf->hw, vf->vf_id, I40E_VIRTCHNL_OP_EVENT, | |
2056 | I40E_SUCCESS, (u8 *)&pfe, | |
2057 | sizeof(struct i40e_virtchnl_pf_event), NULL); | |
2058 | } | |
2059 | ||
2060 | /** | |
2061 | * i40e_ndo_set_vf_mac | |
2062 | * @netdev: network interface device structure | |
2063 | * @vf_id: vf identifier | |
2064 | * @mac: mac address | |
2065 | * | |
2066 | * program vf mac address | |
2067 | **/ | |
2068 | int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac) | |
2069 | { | |
2070 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2071 | struct i40e_vsi *vsi = np->vsi; | |
2072 | struct i40e_pf *pf = vsi->back; | |
2073 | struct i40e_mac_filter *f; | |
2074 | struct i40e_vf *vf; | |
2075 | int ret = 0; | |
2076 | ||
2077 | /* validate the request */ | |
2078 | if (vf_id >= pf->num_alloc_vfs) { | |
2079 | dev_err(&pf->pdev->dev, | |
2080 | "Invalid VF Identifier %d\n", vf_id); | |
2081 | ret = -EINVAL; | |
2082 | goto error_param; | |
2083 | } | |
2084 | ||
2085 | vf = &(pf->vf[vf_id]); | |
2086 | vsi = pf->vsi[vf->lan_vsi_index]; | |
2087 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) { | |
2088 | dev_err(&pf->pdev->dev, | |
2089 | "Uninitialized VF %d\n", vf_id); | |
2090 | ret = -EINVAL; | |
2091 | goto error_param; | |
2092 | } | |
2093 | ||
2094 | if (!is_valid_ether_addr(mac)) { | |
2095 | dev_err(&pf->pdev->dev, | |
2096 | "Invalid VF ethernet address\n"); | |
2097 | ret = -EINVAL; | |
2098 | goto error_param; | |
2099 | } | |
2100 | ||
2101 | /* delete the temporary mac address */ | |
2102 | i40e_del_filter(vsi, vf->default_lan_addr.addr, 0, true, false); | |
2103 | ||
2104 | /* add the new mac address */ | |
2105 | f = i40e_add_filter(vsi, mac, 0, true, false); | |
2106 | if (!f) { | |
2107 | dev_err(&pf->pdev->dev, | |
2108 | "Unable to add VF ucast filter\n"); | |
2109 | ret = -ENOMEM; | |
2110 | goto error_param; | |
2111 | } | |
2112 | ||
2113 | dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n", mac, vf_id); | |
2114 | /* program mac filter */ | |
2115 | if (i40e_sync_vsi_filters(vsi)) { | |
2116 | dev_err(&pf->pdev->dev, "Unable to program ucast filters\n"); | |
2117 | ret = -EIO; | |
2118 | goto error_param; | |
2119 | } | |
2120 | memcpy(vf->default_lan_addr.addr, mac, ETH_ALEN); | |
2121 | dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n"); | |
2122 | ret = 0; | |
2123 | ||
2124 | error_param: | |
2125 | return ret; | |
2126 | } | |
2127 | ||
2128 | /** | |
2129 | * i40e_ndo_set_vf_port_vlan | |
2130 | * @netdev: network interface device structure | |
2131 | * @vf_id: vf identifier | |
2132 | * @vlan_id: mac address | |
2133 | * @qos: priority setting | |
2134 | * | |
2135 | * program vf vlan id and/or qos | |
2136 | **/ | |
2137 | int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, | |
2138 | int vf_id, u16 vlan_id, u8 qos) | |
2139 | { | |
2140 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2141 | struct i40e_pf *pf = np->vsi->back; | |
2142 | struct i40e_vsi *vsi; | |
2143 | struct i40e_vf *vf; | |
2144 | int ret = 0; | |
2145 | ||
2146 | /* validate the request */ | |
2147 | if (vf_id >= pf->num_alloc_vfs) { | |
2148 | dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id); | |
2149 | ret = -EINVAL; | |
2150 | goto error_pvid; | |
2151 | } | |
2152 | ||
2153 | if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) { | |
2154 | dev_err(&pf->pdev->dev, "Invalid VF Parameters\n"); | |
2155 | ret = -EINVAL; | |
2156 | goto error_pvid; | |
2157 | } | |
2158 | ||
2159 | vf = &(pf->vf[vf_id]); | |
2160 | vsi = pf->vsi[vf->lan_vsi_index]; | |
2161 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) { | |
2162 | dev_err(&pf->pdev->dev, "Uninitialized VF %d\n", vf_id); | |
2163 | ret = -EINVAL; | |
2164 | goto error_pvid; | |
2165 | } | |
2166 | ||
2167 | if (vsi->info.pvid) { | |
2168 | /* kill old VLAN */ | |
2169 | ret = i40e_vsi_kill_vlan(vsi, (le16_to_cpu(vsi->info.pvid) & | |
2170 | VLAN_VID_MASK)); | |
2171 | if (ret) { | |
2172 | dev_info(&vsi->back->pdev->dev, | |
2173 | "remove VLAN failed, ret=%d, aq_err=%d\n", | |
2174 | ret, pf->hw.aq.asq_last_status); | |
2175 | } | |
2176 | } | |
2177 | if (vlan_id || qos) | |
2178 | ret = i40e_vsi_add_pvid(vsi, | |
2179 | vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT)); | |
2180 | else | |
2181 | i40e_vlan_stripping_disable(vsi); | |
2182 | ||
2183 | if (vlan_id) { | |
2184 | dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n", | |
2185 | vlan_id, qos, vf_id); | |
2186 | ||
2187 | /* add new VLAN filter */ | |
2188 | ret = i40e_vsi_add_vlan(vsi, vlan_id); | |
2189 | if (ret) { | |
2190 | dev_info(&vsi->back->pdev->dev, | |
2191 | "add VF VLAN failed, ret=%d aq_err=%d\n", ret, | |
2192 | vsi->back->hw.aq.asq_last_status); | |
2193 | goto error_pvid; | |
2194 | } | |
2195 | } | |
2196 | ||
2197 | if (ret) { | |
2198 | dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n"); | |
2199 | goto error_pvid; | |
2200 | } | |
2201 | ret = 0; | |
2202 | ||
2203 | error_pvid: | |
2204 | return ret; | |
2205 | } | |
2206 | ||
2207 | /** | |
2208 | * i40e_ndo_set_vf_bw | |
2209 | * @netdev: network interface device structure | |
2210 | * @vf_id: vf identifier | |
2211 | * @tx_rate: tx rate | |
2212 | * | |
2213 | * configure vf tx rate | |
2214 | **/ | |
2215 | int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int tx_rate) | |
2216 | { | |
2217 | return -EOPNOTSUPP; | |
2218 | } | |
2219 | ||
2220 | /** | |
2221 | * i40e_ndo_get_vf_config | |
2222 | * @netdev: network interface device structure | |
2223 | * @vf_id: vf identifier | |
2224 | * @ivi: vf configuration structure | |
2225 | * | |
2226 | * return vf configuration | |
2227 | **/ | |
2228 | int i40e_ndo_get_vf_config(struct net_device *netdev, | |
2229 | int vf_id, struct ifla_vf_info *ivi) | |
2230 | { | |
2231 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2232 | struct i40e_mac_filter *f, *ftmp; | |
2233 | struct i40e_vsi *vsi = np->vsi; | |
2234 | struct i40e_pf *pf = vsi->back; | |
2235 | struct i40e_vf *vf; | |
2236 | int ret = 0; | |
2237 | ||
2238 | /* validate the request */ | |
2239 | if (vf_id >= pf->num_alloc_vfs) { | |
2240 | dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id); | |
2241 | ret = -EINVAL; | |
2242 | goto error_param; | |
2243 | } | |
2244 | ||
2245 | vf = &(pf->vf[vf_id]); | |
2246 | /* first vsi is always the LAN vsi */ | |
2247 | vsi = pf->vsi[vf->lan_vsi_index]; | |
2248 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) { | |
2249 | dev_err(&pf->pdev->dev, "Uninitialized VF %d\n", vf_id); | |
2250 | ret = -EINVAL; | |
2251 | goto error_param; | |
2252 | } | |
2253 | ||
2254 | ivi->vf = vf_id; | |
2255 | ||
2256 | /* first entry of the list is the default ethernet address */ | |
2257 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { | |
2258 | memcpy(&ivi->mac, f->macaddr, I40E_ETH_LENGTH_OF_ADDRESS); | |
2259 | break; | |
2260 | } | |
2261 | ||
2262 | ivi->tx_rate = 0; | |
2263 | ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK; | |
2264 | ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >> | |
2265 | I40E_VLAN_PRIORITY_SHIFT; | |
2266 | ret = 0; | |
2267 | ||
2268 | error_param: | |
2269 | return ret; | |
2270 | } |