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i40evf: Add support to configure bw via tc tool
[linux-2.6-block.git] / drivers / net / ethernet / intel / i40e / i40e_virtchnl_pf.c
CommitLineData
5c3c48ac
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
40d72a50 4 * Copyright(c) 2013 - 2016 Intel Corporation.
5c3c48ac
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
5c3c48ac
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#include "i40e.h"
28
532b0455
MW		 29/*********************notification routines***********************/
30
31/**
32 * i40e_vc_vf_broadcast
33 * @pf: pointer to the PF structure
34 * @opcode: operation code
35 * @retval: return value
36 * @msg: pointer to the msg buffer
37 * @msglen: msg length
38 *
39 * send a message to all VFs on a given PF
40 **/
41static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
310a2ad9 42 enum virtchnl_ops v_opcode,
532b0455
MW		 43 i40e_status v_retval, u8 *msg,
44 u16 msglen)
45{
46 struct i40e_hw *hw = &pf->hw;
47 struct i40e_vf *vf = pf->vf;
48 int i;
49
50 for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
a1b5a24f 51 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455 52 /* Not all vfs are enabled so skip the ones that are not */
6322e63c
JK		 53 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
54 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 55 continue;
56
57 /* Ignore return value on purpose - a given VF may fail, but
58 * we need to keep going and send to all of them
59 */
60 i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
61 msg, msglen, NULL);
62 }
63}
64
65/**
55f7d723 66 * i40e_vc_notify_vf_link_state
532b0455
MW		 67 * @vf: pointer to the VF structure
68 *
69 * send a link status message to a single VF
70 **/
71static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf)
72{
310a2ad9 73 struct virtchnl_pf_event pfe;
532b0455
MW		 74 struct i40e_pf *pf = vf->pf;
75 struct i40e_hw *hw = &pf->hw;
76 struct i40e_link_status *ls = &pf->hw.phy.link_info;
a1b5a24f 77 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455 78
310a2ad9 79 pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
ff3f4cc2 80 pfe.severity = PF_EVENT_SEVERITY_INFO;
532b0455
MW		 81 if (vf->link_forced) {
82 pfe.event_data.link_event.link_status = vf->link_up;
83 pfe.event_data.link_event.link_speed =
5b643479 84 (vf->link_up ? VIRTCHNL_LINK_SPEED_40GB : 0);
532b0455
MW		 85 } else {
86 pfe.event_data.link_event.link_status =
87 ls->link_info & I40E_AQ_LINK_UP;
ff3f4cc2 88 pfe.event_data.link_event.link_speed =
5b643479 89 i40e_virtchnl_link_speed(ls->link_speed);
532b0455 90 }
310a2ad9 91 i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
532b0455
MW		 92 0, (u8 *)&pfe, sizeof(pfe), NULL);
93}
94
95/**
96 * i40e_vc_notify_link_state
97 * @pf: pointer to the PF structure
98 *
99 * send a link status message to all VFs on a given PF
100 **/
101void i40e_vc_notify_link_state(struct i40e_pf *pf)
102{
103 int i;
104
105 for (i = 0; i < pf->num_alloc_vfs; i++)
106 i40e_vc_notify_vf_link_state(&pf->vf[i]);
107}
108
109/**
110 * i40e_vc_notify_reset
111 * @pf: pointer to the PF structure
112 *
113 * indicate a pending reset to all VFs on a given PF
114 **/
115void i40e_vc_notify_reset(struct i40e_pf *pf)
116{
310a2ad9 117 struct virtchnl_pf_event pfe;
532b0455 118
310a2ad9 119 pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
ff3f4cc2 120 pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
310a2ad9
JB		 121 i40e_vc_vf_broadcast(pf, VIRTCHNL_OP_EVENT, 0,
122 (u8 *)&pfe, sizeof(struct virtchnl_pf_event));
532b0455
MW		 123}
124
125/**
126 * i40e_vc_notify_vf_reset
127 * @vf: pointer to the VF structure
128 *
129 * indicate a pending reset to the given VF
130 **/
131void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
132{
310a2ad9 133 struct virtchnl_pf_event pfe;
532b0455
MW		 134 int abs_vf_id;
135
136 /* validate the request */
137 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
138 return;
139
140 /* verify if the VF is in either init or active before proceeding */
6322e63c
JK		 141 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
142 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 143 return;
144
a1b5a24f 145 abs_vf_id = vf->vf_id + (int)vf->pf->hw.func_caps.vf_base_id;
532b0455 146
310a2ad9 147 pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
ff3f4cc2 148 pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
310a2ad9 149 i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, VIRTCHNL_OP_EVENT,
532b0455 150 0, (u8 *)&pfe,
310a2ad9 151 sizeof(struct virtchnl_pf_event), NULL);
532b0455 152}
5c3c48ac
JB		 153/***********************misc routines*****************************/
154
f9b4b627
GR		 155/**
156 * i40e_vc_disable_vf
b40c82e6 157 * @vf: pointer to the VF info
f9b4b627 158 *
d43d60e5 159 * Disable the VF through a SW reset.
f9b4b627 160 **/
eeeddbb8 161static inline void i40e_vc_disable_vf(struct i40e_vf *vf)
f9b4b627 162{
d43d60e5
JK		 163 int i;
164
54f455ee 165 i40e_vc_notify_vf_reset(vf);
d43d60e5
JK		 166
167 /* We want to ensure that an actual reset occurs initiated after this
168 * function was called. However, we do not want to wait forever, so
169 * we'll give a reasonable time and print a message if we failed to
170 * ensure a reset.
171 */
172 for (i = 0; i < 20; i++) {
173 if (i40e_reset_vf(vf, false))
174 return;
175 usleep_range(10000, 20000);
176 }
177
178 dev_warn(&vf->pf->pdev->dev,
179 "Failed to initiate reset for VF %d after 200 milliseconds\n",
180 vf->vf_id);
f9b4b627
GR		 181}
182
5c3c48ac
JB		 183/**
184 * i40e_vc_isvalid_vsi_id
b40c82e6
JK		 185 * @vf: pointer to the VF info
186 * @vsi_id: VF relative VSI id
5c3c48ac 187 *
b40c82e6 188 * check for the valid VSI id
5c3c48ac 189 **/
fdf0e0bf 190static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id)
5c3c48ac
JB		 191{
192 struct i40e_pf *pf = vf->pf;
fdf0e0bf 193 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 194
fdf0e0bf 195 return (vsi && (vsi->vf_id == vf->vf_id));
5c3c48ac
JB		 196}
197
198/**
199 * i40e_vc_isvalid_queue_id
b40c82e6 200 * @vf: pointer to the VF info
5c3c48ac
JB		 201 * @vsi_id: vsi id
202 * @qid: vsi relative queue id
203 *
204 * check for the valid queue id
205 **/
fdf0e0bf 206static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 207 u8 qid)
208{
209 struct i40e_pf *pf = vf->pf;
fdf0e0bf 210 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 211
fdf0e0bf 212 return (vsi && (qid < vsi->alloc_queue_pairs));
5c3c48ac
JB		 213}
214
215/**
216 * i40e_vc_isvalid_vector_id
b40c82e6
JK		 217 * @vf: pointer to the VF info
218 * @vector_id: VF relative vector id
5c3c48ac
JB		 219 *
220 * check for the valid vector id
221 **/
222static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
223{
224 struct i40e_pf *pf = vf->pf;
225
9347eb77 226 return vector_id < pf->hw.func_caps.num_msix_vectors_vf;
5c3c48ac
JB		 227}
228
229/***********************vf resource mgmt routines*****************/
230
231/**
232 * i40e_vc_get_pf_queue_id
b40c82e6 233 * @vf: pointer to the VF info
fdf0e0bf 234 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 235 * @vsi_queue_id: vsi relative queue id
236 *
b40c82e6 237 * return PF relative queue id
5c3c48ac 238 **/
fdf0e0bf 239static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 240 u8 vsi_queue_id)
241{
242 struct i40e_pf *pf = vf->pf;
fdf0e0bf 243 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac
JB		 244 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
245
fdf0e0bf
ASJ		 246 if (!vsi)
247 return pf_queue_id;
248
5c3c48ac
JB		 249 if (le16_to_cpu(vsi->info.mapping_flags) &
250 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
251 pf_queue_id =
252 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
253 else
254 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
255 vsi_queue_id;
256
257 return pf_queue_id;
258}
259
c27eac48
AD		 260/**
261 * i40e_get_real_pf_qid
262 * @vf: pointer to the VF info
263 * @vsi_id: vsi id
264 * @queue_id: queue number
265 *
266 * wrapper function to get pf_queue_id handling ADq code as well
267 **/
268static u16 i40e_get_real_pf_qid(struct i40e_vf *vf, u16 vsi_id, u16 queue_id)
269{
270 int i;
271
272 if (vf->adq_enabled) {
273 /* Although VF considers all the queues(can be 1 to 16) as its
274 * own but they may actually belong to different VSIs(up to 4).
275 * We need to find which queues belongs to which VSI.
276 */
277 for (i = 0; i < vf->num_tc; i++) {
278 if (queue_id < vf->ch[i].num_qps) {
279 vsi_id = vf->ch[i].vsi_id;
280 break;
281 }
282 /* find right queue id which is relative to a
283 * given VSI.
284 */
285 queue_id -= vf->ch[i].num_qps;
286 }
287 }
288
289 return i40e_vc_get_pf_queue_id(vf, vsi_id, queue_id);
290}
291
5c3c48ac
JB		 292/**
293 * i40e_config_irq_link_list
b40c82e6 294 * @vf: pointer to the VF info
fdf0e0bf 295 * @vsi_id: id of VSI as given by the FW
5c3c48ac
JB		 296 * @vecmap: irq map info
297 *
298 * configure irq link list from the map
299 **/
fdf0e0bf 300static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
310a2ad9 301 struct virtchnl_vector_map *vecmap)
5c3c48ac
JB		 302{
303 unsigned long linklistmap = 0, tempmap;
304 struct i40e_pf *pf = vf->pf;
305 struct i40e_hw *hw = &pf->hw;
306 u16 vsi_queue_id, pf_queue_id;
307 enum i40e_queue_type qtype;
9bcc07f0 308 u16 next_q, vector_id, size;
5c3c48ac
JB		 309 u32 reg, reg_idx;
310 u16 itr_idx = 0;
311
312 vector_id = vecmap->vector_id;
313 /* setup the head */
314 if (0 == vector_id)
315 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
316 else
317 reg_idx = I40E_VPINT_LNKLSTN(
9347eb77
MW		 318 ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) +
319 (vector_id - 1));
5c3c48ac
JB		 320
321 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
322 /* Special case - No queues mapped on this vector */
323 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
324 goto irq_list_done;
325 }
326 tempmap = vecmap->rxq_map;
4836650b 327 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 328 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
329 vsi_queue_id));
5c3c48ac
JB		 330 }
331
332 tempmap = vecmap->txq_map;
4836650b 333 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 334 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
335 vsi_queue_id + 1));
5c3c48ac
JB		 336 }
337
9bcc07f0
LY		 338 size = I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES;
339 next_q = find_first_bit(&linklistmap, size);
340 if (unlikely(next_q == size))
b861fb76
LY		 341 goto irq_list_done;
342
b82bc49e
MW		 343 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
344 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
c27eac48 345 pf_queue_id = i40e_get_real_pf_qid(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 346 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
347
348 wr32(hw, reg_idx, reg);
349
9bcc07f0 350 while (next_q < size) {
5c3c48ac
JB		 351 switch (qtype) {
352 case I40E_QUEUE_TYPE_RX:
353 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
354 itr_idx = vecmap->rxitr_idx;
355 break;
356 case I40E_QUEUE_TYPE_TX:
357 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
358 itr_idx = vecmap->txitr_idx;
359 break;
360 default:
361 break;
362 }
363
9bcc07f0
LY		 364 next_q = find_next_bit(&linklistmap, size, next_q + 1);
365 if (next_q < size) {
5c3c48ac
JB		 366 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
367 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
c27eac48
AD		 368 pf_queue_id = i40e_get_real_pf_qid(vf,
369 vsi_id,
370 vsi_queue_id);
5c3c48ac
JB		 371 } else {
372 pf_queue_id = I40E_QUEUE_END_OF_LIST;
373 qtype = 0;
374 }
375
376 /* format for the RQCTL & TQCTL regs is same */
377 reg = (vector_id) |
378 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
379 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
41a1d04b 380 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
5c3c48ac
JB		 381 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
382 wr32(hw, reg_idx, reg);
383 }
384
b8262a6d
ASJ		 385 /* if the vf is running in polling mode and using interrupt zero,
386 * need to disable auto-mask on enabling zero interrupt for VFs.
387 */
310a2ad9 388 if ((vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
b8262a6d
ASJ		 389 (vector_id == 0)) {
390 reg = rd32(hw, I40E_GLINT_CTL);
391 if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
392 reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
393 wr32(hw, I40E_GLINT_CTL, reg);
394 }
395 }
396
5c3c48ac
JB		 397irq_list_done:
398 i40e_flush(hw);
399}
400
e3219ce6
ASJ		 401/**
402 * i40e_release_iwarp_qvlist
403 * @vf: pointer to the VF.
404 *
405 **/
406static void i40e_release_iwarp_qvlist(struct i40e_vf *vf)
407{
408 struct i40e_pf *pf = vf->pf;
310a2ad9 409 struct virtchnl_iwarp_qvlist_info *qvlist_info = vf->qvlist_info;
e3219ce6
ASJ		 410 u32 msix_vf;
411 u32 i;
412
413 if (!vf->qvlist_info)
414 return;
415
416 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
417 for (i = 0; i < qvlist_info->num_vectors; i++) {
310a2ad9 418 struct virtchnl_iwarp_qv_info *qv_info;
e3219ce6
ASJ		 419 u32 next_q_index, next_q_type;
420 struct i40e_hw *hw = &pf->hw;
421 u32 v_idx, reg_idx, reg;
422
423 qv_info = &qvlist_info->qv_info[i];
424 if (!qv_info)
425 continue;
426 v_idx = qv_info->v_idx;
427 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
428 /* Figure out the queue after CEQ and make that the
429 * first queue.
430 */
431 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
432 reg = rd32(hw, I40E_VPINT_CEQCTL(reg_idx));
433 next_q_index = (reg & I40E_VPINT_CEQCTL_NEXTQ_INDX_MASK)
434 >> I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT;
435 next_q_type = (reg & I40E_VPINT_CEQCTL_NEXTQ_TYPE_MASK)
436 >> I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT;
437
438 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
439 reg = (next_q_index &
440 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
441 (next_q_type <<
442 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
443
444 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
445 }
446 }
447 kfree(vf->qvlist_info);
448 vf->qvlist_info = NULL;
449}
450
451/**
452 * i40e_config_iwarp_qvlist
453 * @vf: pointer to the VF info
454 * @qvlist_info: queue and vector list
455 *
456 * Return 0 on success or < 0 on error
457 **/
458static int i40e_config_iwarp_qvlist(struct i40e_vf *vf,
310a2ad9 459 struct virtchnl_iwarp_qvlist_info *qvlist_info)
e3219ce6
ASJ		 460{
461 struct i40e_pf *pf = vf->pf;
462 struct i40e_hw *hw = &pf->hw;
310a2ad9 463 struct virtchnl_iwarp_qv_info *qv_info;
e3219ce6
ASJ		 464 u32 v_idx, i, reg_idx, reg;
465 u32 next_q_idx, next_q_type;
466 u32 msix_vf, size;
467
310a2ad9
JB		 468 size = sizeof(struct virtchnl_iwarp_qvlist_info) +
469 (sizeof(struct virtchnl_iwarp_qv_info) *
e3219ce6
ASJ		 470 (qvlist_info->num_vectors - 1));
471 vf->qvlist_info = kzalloc(size, GFP_KERNEL);
54902349
CJ		 472 if (!vf->qvlist_info)
473 return -ENOMEM;
474
e3219ce6
ASJ		 475 vf->qvlist_info->num_vectors = qvlist_info->num_vectors;
476
477 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
478 for (i = 0; i < qvlist_info->num_vectors; i++) {
479 qv_info = &qvlist_info->qv_info[i];
480 if (!qv_info)
481 continue;
482 v_idx = qv_info->v_idx;
483
484 /* Validate vector id belongs to this vf */
485 if (!i40e_vc_isvalid_vector_id(vf, v_idx))
486 goto err;
487
488 vf->qvlist_info->qv_info[i] = *qv_info;
489
490 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
491 /* We might be sharing the interrupt, so get the first queue
492 * index and type, push it down the list by adding the new
493 * queue on top. Also link it with the new queue in CEQCTL.
494 */
495 reg = rd32(hw, I40E_VPINT_LNKLSTN(reg_idx));
496 next_q_idx = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) >>
497 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT);
498 next_q_type = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK) >>
499 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
500
501 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
502 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
503 reg = (I40E_VPINT_CEQCTL_CAUSE_ENA_MASK |
504 (v_idx << I40E_VPINT_CEQCTL_MSIX_INDX_SHIFT) |
505 (qv_info->itr_idx << I40E_VPINT_CEQCTL_ITR_INDX_SHIFT) |
506 (next_q_type << I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT) |
507 (next_q_idx << I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT));
508 wr32(hw, I40E_VPINT_CEQCTL(reg_idx), reg);
509
510 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
511 reg = (qv_info->ceq_idx &
512 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
513 (I40E_QUEUE_TYPE_PE_CEQ <<
514 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
515 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
516 }
517
518 if (qv_info->aeq_idx != I40E_QUEUE_INVALID_IDX) {
519 reg = (I40E_VPINT_AEQCTL_CAUSE_ENA_MASK |
520 (v_idx << I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT) |
521 (qv_info->itr_idx << I40E_VPINT_AEQCTL_ITR_INDX_SHIFT));
522
523 wr32(hw, I40E_VPINT_AEQCTL(vf->vf_id), reg);
524 }
525 }
526
527 return 0;
528err:
529 kfree(vf->qvlist_info);
530 vf->qvlist_info = NULL;
531 return -EINVAL;
532}
533
5c3c48ac
JB		 534/**
535 * i40e_config_vsi_tx_queue
b40c82e6 536 * @vf: pointer to the VF info
fdf0e0bf 537 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 538 * @vsi_queue_id: vsi relative queue index
539 * @info: config. info
540 *
541 * configure tx queue
542 **/
fdf0e0bf 543static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac 544 u16 vsi_queue_id,
310a2ad9 545 struct virtchnl_txq_info *info)
5c3c48ac
JB		 546{
547 struct i40e_pf *pf = vf->pf;
548 struct i40e_hw *hw = &pf->hw;
549 struct i40e_hmc_obj_txq tx_ctx;
fdf0e0bf 550 struct i40e_vsi *vsi;
5c3c48ac
JB		 551 u16 pf_queue_id;
552 u32 qtx_ctl;
553 int ret = 0;
554
d4a0658d
CW		 555 if (!i40e_vc_isvalid_vsi_id(vf, info->vsi_id)) {
556 ret = -ENOENT;
557 goto error_context;
558 }
fdf0e0bf
ASJ		 559 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
560 vsi = i40e_find_vsi_from_id(pf, vsi_id);
d4a0658d
CW		 561 if (!vsi) {
562 ret = -ENOENT;
563 goto error_context;
564 }
5c3c48ac
JB		 565
566 /* clear the context structure first */
567 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
568
569 /* only set the required fields */
570 tx_ctx.base = info->dma_ring_addr / 128;
571 tx_ctx.qlen = info->ring_len;
fdf0e0bf 572 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
5c3c48ac 573 tx_ctx.rdylist_act = 0;
5d29896a
AS		 574 tx_ctx.head_wb_ena = info->headwb_enabled;
575 tx_ctx.head_wb_addr = info->dma_headwb_addr;
5c3c48ac
JB		 576
577 /* clear the context in the HMC */
578 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
579 if (ret) {
580 dev_err(&pf->pdev->dev,
581 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
582 pf_queue_id, ret);
583 ret = -ENOENT;
584 goto error_context;
585 }
586
587 /* set the context in the HMC */
588 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
589 if (ret) {
590 dev_err(&pf->pdev->dev,
591 "Failed to set VF LAN Tx queue context %d error: %d\n",
592 pf_queue_id, ret);
593 ret = -ENOENT;
594 goto error_context;
595 }
596
597 /* associate this queue with the PCI VF function */
598 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
13fd9774 599 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
5c3c48ac
JB		 600 & I40E_QTX_CTL_PF_INDX_MASK);
601 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
602 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
603 & I40E_QTX_CTL_VFVM_INDX_MASK);
604 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
605 i40e_flush(hw);
606
607error_context:
608 return ret;
609}
610
611/**
612 * i40e_config_vsi_rx_queue
b40c82e6 613 * @vf: pointer to the VF info
fdf0e0bf 614 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 615 * @vsi_queue_id: vsi relative queue index
616 * @info: config. info
617 *
618 * configure rx queue
619 **/
fdf0e0bf 620static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac 621 u16 vsi_queue_id,
310a2ad9 622 struct virtchnl_rxq_info *info)
5c3c48ac
JB		 623{
624 struct i40e_pf *pf = vf->pf;
625 struct i40e_hw *hw = &pf->hw;
626 struct i40e_hmc_obj_rxq rx_ctx;
627 u16 pf_queue_id;
628 int ret = 0;
629
fdf0e0bf 630 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 631
632 /* clear the context structure first */
633 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
634
635 /* only set the required fields */
636 rx_ctx.base = info->dma_ring_addr / 128;
637 rx_ctx.qlen = info->ring_len;
638
639 if (info->splithdr_enabled) {
640 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
641 I40E_RX_SPLIT_IP |
642 I40E_RX_SPLIT_TCP_UDP |
643 I40E_RX_SPLIT_SCTP;
644 /* header length validation */
645 if (info->hdr_size > ((2 * 1024) - 64)) {
646 ret = -EINVAL;
647 goto error_param;
648 }
649 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
650
19b85e67 651 /* set split mode 10b */
d6b3bca1 652 rx_ctx.dtype = I40E_RX_DTYPE_HEADER_SPLIT;
5c3c48ac
JB		 653 }
654
655 /* databuffer length validation */
656 if (info->databuffer_size > ((16 * 1024) - 128)) {
657 ret = -EINVAL;
658 goto error_param;
659 }
660 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
661
662 /* max pkt. length validation */
663 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
664 ret = -EINVAL;
665 goto error_param;
666 }
667 rx_ctx.rxmax = info->max_pkt_size;
668
669 /* enable 32bytes desc always */
670 rx_ctx.dsize = 1;
671
672 /* default values */
7362be9e 673 rx_ctx.lrxqthresh = 1;
5c3c48ac 674 rx_ctx.crcstrip = 1;
50d41659 675 rx_ctx.prefena = 1;
c1d11cef 676 rx_ctx.l2tsel = 1;
5c3c48ac
JB		 677
678 /* clear the context in the HMC */
679 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
680 if (ret) {
681 dev_err(&pf->pdev->dev,
682 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
683 pf_queue_id, ret);
684 ret = -ENOENT;
685 goto error_param;
686 }
687
688 /* set the context in the HMC */
689 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
690 if (ret) {
691 dev_err(&pf->pdev->dev,
692 "Failed to set VF LAN Rx queue context %d error: %d\n",
693 pf_queue_id, ret);
694 ret = -ENOENT;
695 goto error_param;
696 }
697
698error_param:
699 return ret;
700}
701
702/**
703 * i40e_alloc_vsi_res
b40c82e6 704 * @vf: pointer to the VF info
c27eac48 705 * @idx: VSI index, applies only for ADq mode, zero otherwise
5c3c48ac 706 *
b40c82e6 707 * alloc VF vsi context & resources
5c3c48ac 708 **/
c27eac48 709static int i40e_alloc_vsi_res(struct i40e_vf *vf, u8 idx)
5c3c48ac
JB		 710{
711 struct i40e_mac_filter *f = NULL;
712 struct i40e_pf *pf = vf->pf;
5c3c48ac
JB		 713 struct i40e_vsi *vsi;
714 int ret = 0;
715
c27eac48
AD		 716 vsi = i40e_vsi_setup(pf, I40E_VSI_SRIOV, pf->vsi[pf->lan_vsi]->seid,
717 vf->vf_id);
5c3c48ac
JB		 718
719 if (!vsi) {
720 dev_err(&pf->pdev->dev,
b40c82e6 721 "add vsi failed for VF %d, aq_err %d\n",
5c3c48ac
JB		 722 vf->vf_id, pf->hw.aq.asq_last_status);
723 ret = -ENOENT;
724 goto error_alloc_vsi_res;
725 }
c27eac48
AD		 726
727 if (!idx) {
bb360717 728 u64 hena = i40e_pf_get_default_rss_hena(pf);
435c084a 729 u8 broadcast[ETH_ALEN];
bb360717 730
fdf0e0bf 731 vf->lan_vsi_idx = vsi->idx;
5c3c48ac 732 vf->lan_vsi_id = vsi->id;
6c12fcbf
GR		 733 /* If the port VLAN has been configured and then the
734 * VF driver was removed then the VSI port VLAN
735 * configuration was destroyed. Check if there is
736 * a port VLAN and restore the VSI configuration if
737 * needed.
738 */
739 if (vf->port_vlan_id)
740 i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
21659035 741
278e7d0b 742 spin_lock_bh(&vsi->mac_filter_hash_lock);
b7b713a8 743 if (is_valid_ether_addr(vf->default_lan_addr.addr)) {
9569a9a4
JK		 744 f = i40e_add_mac_filter(vsi,
745 vf->default_lan_addr.addr);
b7b713a8
MW		 746 if (!f)
747 dev_info(&pf->pdev->dev,
748 "Could not add MAC filter %pM for VF %d\n",
749 vf->default_lan_addr.addr, vf->vf_id);
750 }
435c084a 751 eth_broadcast_addr(broadcast);
9569a9a4 752 f = i40e_add_mac_filter(vsi, broadcast);
435c084a
JK		 753 if (!f)
754 dev_info(&pf->pdev->dev,
755 "Could not allocate VF broadcast filter\n");
278e7d0b 756 spin_unlock_bh(&vsi->mac_filter_hash_lock);
26f77e53
LY		 757 wr32(&pf->hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)hena);
758 wr32(&pf->hw, I40E_VFQF_HENA1(1, vf->vf_id), (u32)(hena >> 32));
c27eac48
AD		 759 /* program mac filter only for VF VSI */
760 ret = i40e_sync_vsi_filters(vsi);
761 if (ret)
762 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
5c3c48ac 763 }
6dbbbfb2 764
c27eac48
AD		 765 /* storing VSI index and id for ADq and don't apply the mac filter */
766 if (vf->adq_enabled) {
767 vf->ch[idx].vsi_idx = vsi->idx;
768 vf->ch[idx].vsi_id = vsi->id;
769 }
5c3c48ac 770
6b192891
MW		 771 /* Set VF bandwidth if specified */
772 if (vf->tx_rate) {
773 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
774 vf->tx_rate / 50, 0, NULL);
775 if (ret)
776 dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
777 vf->vf_id, ret);
778 }
779
5c3c48ac
JB		 780error_alloc_vsi_res:
781 return ret;
782}
783
c27eac48
AD		 784/**
785 * i40e_map_pf_queues_to_vsi
786 * @vf: pointer to the VF info
787 *
788 * PF maps LQPs to a VF by programming VSILAN_QTABLE & VPLAN_QTABLE. This
789 * function takes care of first part VSILAN_QTABLE, mapping pf queues to VSI.
790 **/
791static void i40e_map_pf_queues_to_vsi(struct i40e_vf *vf)
792{
793 struct i40e_pf *pf = vf->pf;
794 struct i40e_hw *hw = &pf->hw;
795 u32 reg, num_tc = 1; /* VF has at least one traffic class */
796 u16 vsi_id, qps;
797 int i, j;
798
799 if (vf->adq_enabled)
800 num_tc = vf->num_tc;
801
802 for (i = 0; i < num_tc; i++) {
803 if (vf->adq_enabled) {
804 qps = vf->ch[i].num_qps;
805 vsi_id = vf->ch[i].vsi_id;
806 } else {
807 qps = pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
808 vsi_id = vf->lan_vsi_id;
809 }
810
811 for (j = 0; j < 7; j++) {
812 if (j * 2 >= qps) {
813 /* end of list */
814 reg = 0x07FF07FF;
815 } else {
816 u16 qid = i40e_vc_get_pf_queue_id(vf,
817 vsi_id,
818 j * 2);
819 reg = qid;
820 qid = i40e_vc_get_pf_queue_id(vf, vsi_id,
821 (j * 2) + 1);
822 reg |= qid << 16;
823 }
824 i40e_write_rx_ctl(hw,
825 I40E_VSILAN_QTABLE(j, vsi_id),
826 reg);
827 }
828 }
829}
830
831/**
832 * i40e_map_pf_to_vf_queues
833 * @vf: pointer to the VF info
834 *
835 * PF maps LQPs to a VF by programming VSILAN_QTABLE & VPLAN_QTABLE. This
836 * function takes care of the second part VPLAN_QTABLE & completes VF mappings.
837 **/
838static void i40e_map_pf_to_vf_queues(struct i40e_vf *vf)
839{
840 struct i40e_pf *pf = vf->pf;
841 struct i40e_hw *hw = &pf->hw;
842 u32 reg, total_qps = 0;
843 u32 qps, num_tc = 1; /* VF has at least one traffic class */
844 u16 vsi_id, qid;
845 int i, j;
846
847 if (vf->adq_enabled)
848 num_tc = vf->num_tc;
849
850 for (i = 0; i < num_tc; i++) {
851 if (vf->adq_enabled) {
852 qps = vf->ch[i].num_qps;
853 vsi_id = vf->ch[i].vsi_id;
854 } else {
855 qps = pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
856 vsi_id = vf->lan_vsi_id;
857 }
858
859 for (j = 0; j < qps; j++) {
860 qid = i40e_vc_get_pf_queue_id(vf, vsi_id, j);
861
862 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
863 wr32(hw, I40E_VPLAN_QTABLE(total_qps, vf->vf_id),
864 reg);
865 total_qps++;
866 }
867 }
868}
869
805bd5bd
MW		 870/**
871 * i40e_enable_vf_mappings
b40c82e6 872 * @vf: pointer to the VF info
805bd5bd 873 *
b40c82e6 874 * enable VF mappings
805bd5bd
MW		 875 **/
876static void i40e_enable_vf_mappings(struct i40e_vf *vf)
877{
878 struct i40e_pf *pf = vf->pf;
879 struct i40e_hw *hw = &pf->hw;
c27eac48 880 u32 reg;
805bd5bd
MW		 881
882 /* Tell the hardware we're using noncontiguous mapping. HW requires
883 * that VF queues be mapped using this method, even when they are
884 * contiguous in real life
885 */
272cdaf2
SN		 886 i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
887 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
805bd5bd
MW		 888
889 /* enable VF vplan_qtable mappings */
890 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
891 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
892
c27eac48
AD		 893 i40e_map_pf_to_vf_queues(vf);
894 i40e_map_pf_queues_to_vsi(vf);
805bd5bd
MW		 895
896 i40e_flush(hw);
897}
898
899/**
900 * i40e_disable_vf_mappings
b40c82e6 901 * @vf: pointer to the VF info
805bd5bd 902 *
b40c82e6 903 * disable VF mappings
805bd5bd
MW		 904 **/
905static void i40e_disable_vf_mappings(struct i40e_vf *vf)
906{
907 struct i40e_pf *pf = vf->pf;
908 struct i40e_hw *hw = &pf->hw;
909 int i;
910
911 /* disable qp mappings */
912 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
913 for (i = 0; i < I40E_MAX_VSI_QP; i++)
914 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
915 I40E_QUEUE_END_OF_LIST);
916 i40e_flush(hw);
917}
918
919/**
920 * i40e_free_vf_res
b40c82e6 921 * @vf: pointer to the VF info
805bd5bd 922 *
b40c82e6 923 * free VF resources
805bd5bd
MW		 924 **/
925static void i40e_free_vf_res(struct i40e_vf *vf)
926{
927 struct i40e_pf *pf = vf->pf;
fc18eaa0
MW		 928 struct i40e_hw *hw = &pf->hw;
929 u32 reg_idx, reg;
c27eac48 930 int i, j, msix_vf;
805bd5bd 931
beff3e9d
RK		 932 /* Start by disabling VF's configuration API to prevent the OS from
933 * accessing the VF's VSI after it's freed / invalidated.
934 */
6322e63c 935 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 936
a3f5aa90
AB		 937 /* It's possible the VF had requeuested more queues than the default so
938 * do the accounting here when we're about to free them.
939 */
940 if (vf->num_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF) {
941 pf->queues_left += vf->num_queue_pairs -
942 I40E_DEFAULT_QUEUES_PER_VF;
943 }
944
805bd5bd 945 /* free vsi & disconnect it from the parent uplink */
fdf0e0bf
ASJ		 946 if (vf->lan_vsi_idx) {
947 i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]);
948 vf->lan_vsi_idx = 0;
805bd5bd 949 vf->lan_vsi_id = 0;
13fd3f9c 950 vf->num_mac = 0;
805bd5bd 951 }
c27eac48
AD		 952
953 /* do the accounting and remove additional ADq VSI's */
954 if (vf->adq_enabled && vf->ch[0].vsi_idx) {
955 for (j = 0; j < vf->num_tc; j++) {
956 /* At this point VSI0 is already released so don't
957 * release it again and only clear their values in
958 * structure variables
959 */
960 if (j)
961 i40e_vsi_release(pf->vsi[vf->ch[j].vsi_idx]);
962 vf->ch[j].vsi_idx = 0;
963 vf->ch[j].vsi_id = 0;
964 }
965 }
9347eb77
MW		 966 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
967
fc18eaa0
MW		 968 /* disable interrupts so the VF starts in a known state */
969 for (i = 0; i < msix_vf; i++) {
970 /* format is same for both registers */
971 if (0 == i)
972 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
973 else
974 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
975 (vf->vf_id))
976 + (i - 1));
977 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
978 i40e_flush(hw);
979 }
805bd5bd 980
fc18eaa0
MW		 981 /* clear the irq settings */
982 for (i = 0; i < msix_vf; i++) {
983 /* format is same for both registers */
984 if (0 == i)
985 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
986 else
987 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
988 (vf->vf_id))
989 + (i - 1));
990 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
991 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
992 wr32(hw, reg_idx, reg);
993 i40e_flush(hw);
994 }
b564d62e 995 /* reset some of the state variables keeping track of the resources */
805bd5bd 996 vf->num_queue_pairs = 0;
41d0a4d0
AB		 997 clear_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
998 clear_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
805bd5bd
MW		 999}
1000
1001/**
1002 * i40e_alloc_vf_res
b40c82e6 1003 * @vf: pointer to the VF info
805bd5bd 1004 *
b40c82e6 1005 * allocate VF resources
805bd5bd
MW		 1006 **/
1007static int i40e_alloc_vf_res(struct i40e_vf *vf)
1008{
1009 struct i40e_pf *pf = vf->pf;
1010 int total_queue_pairs = 0;
c27eac48 1011 int ret, idx;
805bd5bd 1012
a3f5aa90
AB		 1013 if (vf->num_req_queues &&
1014 vf->num_req_queues <= pf->queues_left + I40E_DEFAULT_QUEUES_PER_VF)
1015 pf->num_vf_qps = vf->num_req_queues;
1016 else
1017 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
1018
805bd5bd 1019 /* allocate hw vsi context & associated resources */
c27eac48 1020 ret = i40e_alloc_vsi_res(vf, 0);
805bd5bd
MW		 1021 if (ret)
1022 goto error_alloc;
fdf0e0bf 1023 total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
692fb0a7 1024
c27eac48
AD		 1025 /* allocate additional VSIs based on tc information for ADq */
1026 if (vf->adq_enabled) {
1027 if (pf->queues_left >=
1028 (I40E_MAX_VF_QUEUES - I40E_DEFAULT_QUEUES_PER_VF)) {
1029 /* TC 0 always belongs to VF VSI */
1030 for (idx = 1; idx < vf->num_tc; idx++) {
1031 ret = i40e_alloc_vsi_res(vf, idx);
1032 if (ret)
1033 goto error_alloc;
1034 }
1035 /* send correct number of queues */
1036 total_queue_pairs = I40E_MAX_VF_QUEUES;
1037 } else {
1038 dev_info(&pf->pdev->dev, "VF %d: Not enough queues to allocate, disabling ADq\n",
1039 vf->vf_id);
1040 vf->adq_enabled = false;
1041 }
1042 }
1043
a3f5aa90
AB		 1044 /* We account for each VF to get a default number of queue pairs. If
1045 * the VF has now requested more, we need to account for that to make
1046 * certain we never request more queues than we actually have left in
1047 * HW.
1048 */
1049 if (total_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF)
1050 pf->queues_left -=
1051 total_queue_pairs - I40E_DEFAULT_QUEUES_PER_VF;
1052
692fb0a7
ASJ		 1053 if (vf->trusted)
1054 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
1055 else
1056 clear_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
805bd5bd
MW		 1057
1058 /* store the total qps number for the runtime
b40c82e6 1059 * VF req validation
805bd5bd
MW		 1060 */
1061 vf->num_queue_pairs = total_queue_pairs;
1062
b40c82e6 1063 /* VF is now completely initialized */
6322e63c 1064 set_bit(I40E_VF_STATE_INIT, &vf->vf_states);
805bd5bd
MW		 1065
1066error_alloc:
1067 if (ret)
1068 i40e_free_vf_res(vf);
1069
1070 return ret;
1071}
1072
fc18eaa0
MW		 1073#define VF_DEVICE_STATUS 0xAA
1074#define VF_TRANS_PENDING_MASK 0x20
1075/**
1076 * i40e_quiesce_vf_pci
b40c82e6 1077 * @vf: pointer to the VF structure
fc18eaa0
MW		 1078 *
1079 * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
1080 * if the transactions never clear.
1081 **/
1082static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
1083{
1084 struct i40e_pf *pf = vf->pf;
1085 struct i40e_hw *hw = &pf->hw;
1086 int vf_abs_id, i;
1087 u32 reg;
1088
b141d619 1089 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
fc18eaa0
MW		 1090
1091 wr32(hw, I40E_PF_PCI_CIAA,
1092 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
1093 for (i = 0; i < 100; i++) {
1094 reg = rd32(hw, I40E_PF_PCI_CIAD);
1095 if ((reg & VF_TRANS_PENDING_MASK) == 0)
1096 return 0;
1097 udelay(1);
1098 }
1099 return -EIO;
1100}
1101
5c3c48ac 1102/**
9dc2e417 1103 * i40e_trigger_vf_reset
b40c82e6 1104 * @vf: pointer to the VF structure
5c3c48ac
JB		 1105 * @flr: VFLR was issued or not
1106 *
9dc2e417
JK		 1107 * Trigger hardware to start a reset for a particular VF. Expects the caller
1108 * to wait the proper amount of time to allow hardware to reset the VF before
1109 * it cleans up and restores VF functionality.
5c3c48ac 1110 **/
9dc2e417 1111static void i40e_trigger_vf_reset(struct i40e_vf *vf, bool flr)
5c3c48ac 1112{
5c3c48ac
JB		 1113 struct i40e_pf *pf = vf->pf;
1114 struct i40e_hw *hw = &pf->hw;
7e5a313e 1115 u32 reg, reg_idx, bit_idx;
3ba9bcb4 1116
5c3c48ac 1117 /* warn the VF */
6322e63c 1118 clear_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac 1119
beff3e9d
RK		 1120 /* Disable VF's configuration API during reset. The flag is re-enabled
1121 * in i40e_alloc_vf_res(), when it's safe again to access VF's VSI.
1122 * It's normally disabled in i40e_free_vf_res(), but it's safer
1123 * to do it earlier to give some time to finish to any VF config
1124 * functions that may still be running at this point.
1125 */
6322e63c 1126 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 1127
fc18eaa0
MW		 1128 /* In the case of a VFLR, the HW has already reset the VF and we
1129 * just need to clean up, so don't hit the VFRTRIG register.
5c3c48ac
JB		 1130 */
1131 if (!flr) {
b40c82e6 1132 /* reset VF using VPGEN_VFRTRIG reg */
fc18eaa0
MW		 1133 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1134 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
5c3c48ac
JB		 1135 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
1136 i40e_flush(hw);
1137 }
7369ca87
MW		 1138 /* clear the VFLR bit in GLGEN_VFLRSTAT */
1139 reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
1140 bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
1141 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
30728c5b 1142 i40e_flush(hw);
5c3c48ac 1143
fc18eaa0
MW		 1144 if (i40e_quiesce_vf_pci(vf))
1145 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
1146 vf->vf_id);
9dc2e417 1147}
fc18eaa0 1148
9dc2e417
JK		 1149/**
1150 * i40e_cleanup_reset_vf
1151 * @vf: pointer to the VF structure
1152 *
1153 * Cleanup a VF after the hardware reset is finished. Expects the caller to
1154 * have verified whether the reset is finished properly, and ensure the
1155 * minimum amount of wait time has passed.
1156 **/
1157static void i40e_cleanup_reset_vf(struct i40e_vf *vf)
1158{
1159 struct i40e_pf *pf = vf->pf;
1160 struct i40e_hw *hw = &pf->hw;
1161 u32 reg;
fc18eaa0 1162
beff3e9d 1163 /* free VF resources to begin resetting the VSI state */
fc18eaa0 1164 i40e_free_vf_res(vf);
beff3e9d
RK		 1165
1166 /* Enable hardware by clearing the reset bit in the VPGEN_VFRTRIG reg.
1167 * By doing this we allow HW to access VF memory at any point. If we
1168 * did it any sooner, HW could access memory while it was being freed
1169 * in i40e_free_vf_res(), causing an IOMMU fault.
1170 *
1171 * On the other hand, this needs to be done ASAP, because the VF driver
1172 * is waiting for this to happen and may report a timeout. It's
1173 * harmless, but it gets logged into Guest OS kernel log, so best avoid
1174 * it.
1175 */
1176 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1177 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
1178 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
1179
1180 /* reallocate VF resources to finish resetting the VSI state */
21be99ec 1181 if (!i40e_alloc_vf_res(vf)) {
e3219ce6 1182 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
21be99ec 1183 i40e_enable_vf_mappings(vf);
6322e63c
JK		 1184 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
1185 clear_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
6a23449a 1186 /* Do not notify the client during VF init */
c53d11f6
AB		 1187 if (!test_and_clear_bit(I40E_VF_STATE_PRE_ENABLE,
1188 &vf->vf_states))
6a23449a 1189 i40e_notify_client_of_vf_reset(pf, abs_vf_id);
dc5b4e9f 1190 vf->num_vlan = 0;
21be99ec 1191 }
beff3e9d
RK		 1192
1193 /* Tell the VF driver the reset is done. This needs to be done only
1194 * after VF has been fully initialized, because the VF driver may
1195 * request resources immediately after setting this flag.
1196 */
310a2ad9 1197 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), VIRTCHNL_VFR_VFACTIVE);
9dc2e417
JK		 1198}
1199
1200/**
1201 * i40e_reset_vf
1202 * @vf: pointer to the VF structure
1203 * @flr: VFLR was issued or not
1204 *
d43d60e5 1205 * Returns true if the VF is reset, false otherwise.
9dc2e417 1206 **/
d43d60e5 1207bool i40e_reset_vf(struct i40e_vf *vf, bool flr)
9dc2e417
JK		 1208{
1209 struct i40e_pf *pf = vf->pf;
1210 struct i40e_hw *hw = &pf->hw;
1211 bool rsd = false;
1212 u32 reg;
1213 int i;
1214
d43d60e5
JK		 1215 /* If the VFs have been disabled, this means something else is
1216 * resetting the VF, so we shouldn't continue.
1217 */
0da36b97 1218 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
d43d60e5 1219 return false;
9dc2e417
JK		 1220
1221 i40e_trigger_vf_reset(vf, flr);
1222
1223 /* poll VPGEN_VFRSTAT reg to make sure
1224 * that reset is complete
1225 */
1226 for (i = 0; i < 10; i++) {
1227 /* VF reset requires driver to first reset the VF and then
1228 * poll the status register to make sure that the reset
1229 * completed successfully. Due to internal HW FIFO flushes,
1230 * we must wait 10ms before the register will be valid.
1231 */
1232 usleep_range(10000, 20000);
1233 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1234 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
1235 rsd = true;
1236 break;
1237 }
1238 }
1239
1240 if (flr)
1241 usleep_range(10000, 20000);
1242
1243 if (!rsd)
1244 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1245 vf->vf_id);
1246 usleep_range(10000, 20000);
1247
1248 /* On initial reset, we don't have any queues to disable */
1249 if (vf->lan_vsi_idx != 0)
1250 i40e_vsi_stop_rings(pf->vsi[vf->lan_vsi_idx]);
1251
1252 i40e_cleanup_reset_vf(vf);
7e5a313e 1253
5c3c48ac 1254 i40e_flush(hw);
0da36b97 1255 clear_bit(__I40E_VF_DISABLE, pf->state);
d43d60e5
JK		 1256
1257 return true;
5c3c48ac 1258}
c354229f 1259
e4b433f4
JK		 1260/**
1261 * i40e_reset_all_vfs
1262 * @pf: pointer to the PF structure
1263 * @flr: VFLR was issued or not
1264 *
1265 * Reset all allocated VFs in one go. First, tell the hardware to reset each
1266 * VF, then do all the waiting in one chunk, and finally finish restoring each
1267 * VF after the wait. This is useful during PF routines which need to reset
1268 * all VFs, as otherwise it must perform these resets in a serialized fashion.
d43d60e5
JK		 1269 *
1270 * Returns true if any VFs were reset, and false otherwise.
e4b433f4 1271 **/
d43d60e5 1272bool i40e_reset_all_vfs(struct i40e_pf *pf, bool flr)
e4b433f4
JK		 1273{
1274 struct i40e_hw *hw = &pf->hw;
1275 struct i40e_vf *vf;
1276 int i, v;
1277 u32 reg;
1278
1279 /* If we don't have any VFs, then there is nothing to reset */
1280 if (!pf->num_alloc_vfs)
d43d60e5 1281 return false;
e4b433f4
JK		 1282
1283 /* If VFs have been disabled, there is no need to reset */
0da36b97 1284 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
d43d60e5 1285 return false;
e4b433f4
JK		 1286
1287 /* Begin reset on all VFs at once */
1288 for (v = 0; v < pf->num_alloc_vfs; v++)
1289 i40e_trigger_vf_reset(&pf->vf[v], flr);
1290
1291 /* HW requires some time to make sure it can flush the FIFO for a VF
1292 * when it resets it. Poll the VPGEN_VFRSTAT register for each VF in
1293 * sequence to make sure that it has completed. We'll keep track of
1294 * the VFs using a simple iterator that increments once that VF has
1295 * finished resetting.
1296 */
1297 for (i = 0, v = 0; i < 10 && v < pf->num_alloc_vfs; i++) {
1298 usleep_range(10000, 20000);
1299
1300 /* Check each VF in sequence, beginning with the VF to fail
1301 * the previous check.
1302 */
1303 while (v < pf->num_alloc_vfs) {
1304 vf = &pf->vf[v];
1305 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1306 if (!(reg & I40E_VPGEN_VFRSTAT_VFRD_MASK))
1307 break;
1308
1309 /* If the current VF has finished resetting, move on
1310 * to the next VF in sequence.
1311 */
1312 v++;
1313 }
1314 }
1315
1316 if (flr)
1317 usleep_range(10000, 20000);
1318
1319 /* Display a warning if at least one VF didn't manage to reset in
1320 * time, but continue on with the operation.
1321 */
1322 if (v < pf->num_alloc_vfs)
1323 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1324 pf->vf[v].vf_id);
1325 usleep_range(10000, 20000);
1326
1327 /* Begin disabling all the rings associated with VFs, but do not wait
1328 * between each VF.
1329 */
1330 for (v = 0; v < pf->num_alloc_vfs; v++) {
1331 /* On initial reset, we don't have any queues to disable */
1332 if (pf->vf[v].lan_vsi_idx == 0)
1333 continue;
1334
1335 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[v].lan_vsi_idx]);
1336 }
1337
1338 /* Now that we've notified HW to disable all of the VF rings, wait
1339 * until they finish.
1340 */
1341 for (v = 0; v < pf->num_alloc_vfs; v++) {
1342 /* On initial reset, we don't have any queues to disable */
1343 if (pf->vf[v].lan_vsi_idx == 0)
1344 continue;
1345
1346 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[v].lan_vsi_idx]);
1347 }
1348
1349 /* Hw may need up to 50ms to finish disabling the RX queues. We
1350 * minimize the wait by delaying only once for all VFs.
1351 */
1352 mdelay(50);
1353
1354 /* Finish the reset on each VF */
1355 for (v = 0; v < pf->num_alloc_vfs; v++)
1356 i40e_cleanup_reset_vf(&pf->vf[v]);
1357
1358 i40e_flush(hw);
0da36b97 1359 clear_bit(__I40E_VF_DISABLE, pf->state);
d43d60e5
JK		 1360
1361 return true;
e4b433f4
JK		 1362}
1363
5c3c48ac
JB		 1364/**
1365 * i40e_free_vfs
b40c82e6 1366 * @pf: pointer to the PF structure
5c3c48ac 1367 *
b40c82e6 1368 * free VF resources
5c3c48ac
JB		 1369 **/
1370void i40e_free_vfs(struct i40e_pf *pf)
1371{
f7414531
MW		 1372 struct i40e_hw *hw = &pf->hw;
1373 u32 reg_idx, bit_idx;
1374 int i, tmp, vf_id;
5c3c48ac
JB		 1375
1376 if (!pf->vf)
1377 return;
0da36b97 1378 while (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
3ba9bcb4 1379 usleep_range(1000, 2000);
5c3c48ac 1380
e3219ce6 1381 i40e_notify_client_of_vf_enable(pf, 0);
707d088a
JK		 1382
1383 /* Amortize wait time by stopping all VFs at the same time */
1384 for (i = 0; i < pf->num_alloc_vfs; i++) {
1385 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
1386 continue;
1387
1388 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[i].lan_vsi_idx]);
1389 }
1390
1391 for (i = 0; i < pf->num_alloc_vfs; i++) {
6322e63c 1392 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
707d088a
JK		 1393 continue;
1394
1395 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[i].lan_vsi_idx]);
1396 }
44434638 1397
6a9ddb36
MW		 1398 /* Disable IOV before freeing resources. This lets any VF drivers
1399 * running in the host get themselves cleaned up before we yank
1400 * the carpet out from underneath their feet.
1401 */
1402 if (!pci_vfs_assigned(pf->pdev))
1403 pci_disable_sriov(pf->pdev);
6d7b967d
MW		 1404 else
1405 dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
6a9ddb36 1406
b40c82e6 1407 /* free up VF resources */
6c1b5bff
MW		 1408 tmp = pf->num_alloc_vfs;
1409 pf->num_alloc_vfs = 0;
1410 for (i = 0; i < tmp; i++) {
6322e63c 1411 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
5c3c48ac
JB		 1412 i40e_free_vf_res(&pf->vf[i]);
1413 /* disable qp mappings */
1414 i40e_disable_vf_mappings(&pf->vf[i]);
1415 }
1416
1417 kfree(pf->vf);
1418 pf->vf = NULL;
5c3c48ac 1419
9e5634df
MW		 1420 /* This check is for when the driver is unloaded while VFs are
1421 * assigned. Setting the number of VFs to 0 through sysfs is caught
1422 * before this function ever gets called.
1423 */
c24817b6 1424 if (!pci_vfs_assigned(pf->pdev)) {
f7414531
MW		 1425 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
1426 * work correctly when SR-IOV gets re-enabled.
1427 */
1428 for (vf_id = 0; vf_id < tmp; vf_id++) {
1429 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
1430 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
41a1d04b 1431 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
f7414531 1432 }
c354229f 1433 }
0da36b97 1434 clear_bit(__I40E_VF_DISABLE, pf->state);
5c3c48ac
JB		 1435}
1436
1437#ifdef CONFIG_PCI_IOV
1438/**
1439 * i40e_alloc_vfs
b40c82e6
JK		 1440 * @pf: pointer to the PF structure
1441 * @num_alloc_vfs: number of VFs to allocate
5c3c48ac 1442 *
b40c82e6 1443 * allocate VF resources
5c3c48ac 1444 **/
4aeec010 1445int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
5c3c48ac
JB		 1446{
1447 struct i40e_vf *vfs;
1448 int i, ret = 0;
1449
6c1b5bff 1450 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW		 1451 i40e_irq_dynamic_disable_icr0(pf);
1452
4aeec010
MW		 1453 /* Check to see if we're just allocating resources for extant VFs */
1454 if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
1455 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
1456 if (ret) {
de445b3d 1457 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
4aeec010
MW		 1458 pf->num_alloc_vfs = 0;
1459 goto err_iov;
1460 }
5c3c48ac 1461 }
5c3c48ac 1462 /* allocate memory */
cc6456af 1463 vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL);
5c3c48ac
JB		 1464 if (!vfs) {
1465 ret = -ENOMEM;
1466 goto err_alloc;
1467 }
c674d125 1468 pf->vf = vfs;
5c3c48ac
JB		 1469
1470 /* apply default profile */
1471 for (i = 0; i < num_alloc_vfs; i++) {
1472 vfs[i].pf = pf;
1473 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
1474 vfs[i].vf_id = i;
1475
1476 /* assign default capabilities */
1477 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
c674d125 1478 vfs[i].spoofchk = true;
1b484370
JK		 1479
1480 set_bit(I40E_VF_STATE_PRE_ENABLE, &vfs[i].vf_states);
5c3c48ac 1481
5c3c48ac 1482 }
5c3c48ac
JB		 1483 pf->num_alloc_vfs = num_alloc_vfs;
1484
1b484370
JK		 1485 /* VF resources get allocated during reset */
1486 i40e_reset_all_vfs(pf, false);
1487
6a23449a
AD		 1488 i40e_notify_client_of_vf_enable(pf, num_alloc_vfs);
1489
5c3c48ac
JB		 1490err_alloc:
1491 if (ret)
1492 i40e_free_vfs(pf);
1493err_iov:
6c1b5bff 1494 /* Re-enable interrupt 0. */
dbadbbe2 1495 i40e_irq_dynamic_enable_icr0(pf);
5c3c48ac
JB		 1496 return ret;
1497}
1498
1499#endif
1500/**
1501 * i40e_pci_sriov_enable
1502 * @pdev: pointer to a pci_dev structure
b40c82e6 1503 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1504 *
1505 * Enable or change the number of VFs
1506 **/
1507static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
1508{
1509#ifdef CONFIG_PCI_IOV
1510 struct i40e_pf *pf = pci_get_drvdata(pdev);
1511 int pre_existing_vfs = pci_num_vf(pdev);
1512 int err = 0;
1513
0da36b97 1514 if (test_bit(__I40E_TESTING, pf->state)) {
e17bc411
GR		 1515 dev_warn(&pdev->dev,
1516 "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n");
1517 err = -EPERM;
1518 goto err_out;
1519 }
1520
5c3c48ac
JB		 1521 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
1522 i40e_free_vfs(pf);
1523 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
1524 goto out;
1525
1526 if (num_vfs > pf->num_req_vfs) {
96c8d073
MW		 1527 dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n",
1528 num_vfs, pf->num_req_vfs);
5c3c48ac
JB		 1529 err = -EPERM;
1530 goto err_out;
1531 }
1532
96c8d073 1533 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
5c3c48ac
JB		 1534 err = i40e_alloc_vfs(pf, num_vfs);
1535 if (err) {
1536 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
1537 goto err_out;
1538 }
1539
1540out:
1541 return num_vfs;
1542
1543err_out:
1544 return err;
1545#endif
1546 return 0;
1547}
1548
1549/**
1550 * i40e_pci_sriov_configure
1551 * @pdev: pointer to a pci_dev structure
b40c82e6 1552 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1553 *
1554 * Enable or change the number of VFs. Called when the user updates the number
1555 * of VFs in sysfs.
1556 **/
1557int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1558{
1559 struct i40e_pf *pf = pci_get_drvdata(pdev);
1560
fc60861e
ASJ		 1561 if (num_vfs) {
1562 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
1563 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
ff424188 1564 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
fc60861e 1565 }
5c3c48ac 1566 return i40e_pci_sriov_enable(pdev, num_vfs);
fc60861e 1567 }
5c3c48ac 1568
c24817b6 1569 if (!pci_vfs_assigned(pf->pdev)) {
9e5634df 1570 i40e_free_vfs(pf);
fc60861e 1571 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
ff424188 1572 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
9e5634df
MW		 1573 } else {
1574 dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
1575 return -EINVAL;
1576 }
5c3c48ac
JB		 1577 return 0;
1578}
1579
1580/***********************virtual channel routines******************/
1581
1582/**
1583 * i40e_vc_send_msg_to_vf
b40c82e6 1584 * @vf: pointer to the VF info
5c3c48ac
JB		 1585 * @v_opcode: virtual channel opcode
1586 * @v_retval: virtual channel return value
1587 * @msg: pointer to the msg buffer
1588 * @msglen: msg length
1589 *
b40c82e6 1590 * send msg to VF
5c3c48ac
JB		 1591 **/
1592static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
1593 u32 v_retval, u8 *msg, u16 msglen)
1594{
6e7b5bd3
ASJ		 1595 struct i40e_pf *pf;
1596 struct i40e_hw *hw;
1597 int abs_vf_id;
5c3c48ac
JB		 1598 i40e_status aq_ret;
1599
6e7b5bd3
ASJ		 1600 /* validate the request */
1601 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
1602 return -EINVAL;
1603
1604 pf = vf->pf;
1605 hw = &pf->hw;
1606 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1607
5c3c48ac
JB		 1608 /* single place to detect unsuccessful return values */
1609 if (v_retval) {
1610 vf->num_invalid_msgs++;
18b7af57
MW		 1611 dev_info(&pf->pdev->dev, "VF %d failed opcode %d, retval: %d\n",
1612 vf->vf_id, v_opcode, v_retval);
5c3c48ac
JB		 1613 if (vf->num_invalid_msgs >
1614 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
1615 dev_err(&pf->pdev->dev,
1616 "Number of invalid messages exceeded for VF %d\n",
1617 vf->vf_id);
1618 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
6322e63c 1619 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
5c3c48ac
JB		 1620 }
1621 } else {
1622 vf->num_valid_msgs++;
5d38c93e
JW		 1623 /* reset the invalid counter, if a valid message is received. */
1624 vf->num_invalid_msgs = 0;
5c3c48ac
JB		 1625 }
1626
f19efbb5 1627 aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
7efa84b7 1628 msg, msglen, NULL);
5c3c48ac 1629 if (aq_ret) {
18b7af57
MW		 1630 dev_info(&pf->pdev->dev,
1631 "Unable to send the message to VF %d aq_err %d\n",
1632 vf->vf_id, pf->hw.aq.asq_last_status);
5c3c48ac
JB		 1633 return -EIO;
1634 }
1635
1636 return 0;
1637}
1638
1639/**
1640 * i40e_vc_send_resp_to_vf
b40c82e6 1641 * @vf: pointer to the VF info
5c3c48ac
JB		 1642 * @opcode: operation code
1643 * @retval: return value
1644 *
b40c82e6 1645 * send resp msg to VF
5c3c48ac
JB		 1646 **/
1647static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
310a2ad9 1648 enum virtchnl_ops opcode,
5c3c48ac
JB		 1649 i40e_status retval)
1650{
1651 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
1652}
1653
1654/**
1655 * i40e_vc_get_version_msg
b40c82e6 1656 * @vf: pointer to the VF info
5c3c48ac 1657 *
b40c82e6 1658 * called from the VF to request the API version used by the PF
5c3c48ac 1659 **/
f4ca1a22 1660static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 1661{
310a2ad9
JB		 1662 struct virtchnl_version_info info = {
1663 VIRTCHNL_VERSION_MAJOR, VIRTCHNL_VERSION_MINOR
5c3c48ac
JB		 1664 };
1665
310a2ad9 1666 vf->vf_ver = *(struct virtchnl_version_info *)msg;
606a5488 1667 /* VFs running the 1.0 API expect to get 1.0 back or they will cry. */
eedcfef8 1668 if (VF_IS_V10(&vf->vf_ver))
310a2ad9
JB		 1669 info.minor = VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
1670 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_VERSION,
5c3c48ac 1671 I40E_SUCCESS, (u8 *)&info,
f0adc6e8 1672 sizeof(struct virtchnl_version_info));
5c3c48ac
JB		 1673}
1674
c4998aa3
AD		 1675/**
1676 * i40e_del_qch - delete all the additional VSIs created as a part of ADq
1677 * @vf: pointer to VF structure
1678 **/
1679static void i40e_del_qch(struct i40e_vf *vf)
1680{
1681 struct i40e_pf *pf = vf->pf;
1682 int i;
1683
1684 /* first element in the array belongs to primary VF VSI and we shouldn't
1685 * delete it. We should however delete the rest of the VSIs created
1686 */
1687 for (i = 1; i < vf->num_tc; i++) {
1688 if (vf->ch[i].vsi_idx) {
1689 i40e_vsi_release(pf->vsi[vf->ch[i].vsi_idx]);
1690 vf->ch[i].vsi_idx = 0;
1691 vf->ch[i].vsi_id = 0;
1692 }
1693 }
1694}
1695
5c3c48ac
JB		 1696/**
1697 * i40e_vc_get_vf_resources_msg
b40c82e6 1698 * @vf: pointer to the VF info
5c3c48ac
JB		 1699 * @msg: pointer to the msg buffer
1700 * @msglen: msg length
1701 *
b40c82e6 1702 * called from the VF to request its resources
5c3c48ac 1703 **/
f4ca1a22 1704static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 1705{
310a2ad9 1706 struct virtchnl_vf_resource *vfres = NULL;
5c3c48ac
JB		 1707 struct i40e_pf *pf = vf->pf;
1708 i40e_status aq_ret = 0;
1709 struct i40e_vsi *vsi;
5c3c48ac 1710 int num_vsis = 1;
442b25e4 1711 int len = 0;
5c3c48ac
JB		 1712 int ret;
1713
6322e63c 1714 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
5c3c48ac
JB		 1715 aq_ret = I40E_ERR_PARAM;
1716 goto err;
1717 }
1718
310a2ad9
JB		 1719 len = (sizeof(struct virtchnl_vf_resource) +
1720 sizeof(struct virtchnl_vsi_resource) * num_vsis);
5c3c48ac
JB		 1721
1722 vfres = kzalloc(len, GFP_KERNEL);
1723 if (!vfres) {
1724 aq_ret = I40E_ERR_NO_MEMORY;
1725 len = 0;
1726 goto err;
1727 }
eedcfef8 1728 if (VF_IS_V11(&vf->vf_ver))
f4ca1a22
MW		 1729 vf->driver_caps = *(u32 *)msg;
1730 else
310a2ad9
JB		 1731 vf->driver_caps = VIRTCHNL_VF_OFFLOAD_L2 |
1732 VIRTCHNL_VF_OFFLOAD_RSS_REG |
1733 VIRTCHNL_VF_OFFLOAD_VLAN;
5c3c48ac 1734
fbb113f7 1735 vfres->vf_cap_flags = VIRTCHNL_VF_OFFLOAD_L2;
fdf0e0bf 1736 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1737 if (!vsi->info.pvid)
fbb113f7 1738 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_VLAN;
e3219ce6 1739
0ef2d5af 1740 if (i40e_vf_client_capable(pf, vf->vf_id) &&
310a2ad9 1741 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_IWARP)) {
fbb113f7 1742 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_IWARP;
6322e63c 1743 set_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
41d0a4d0
AB		 1744 } else {
1745 clear_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
e3219ce6
ASJ		 1746 }
1747
310a2ad9 1748 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
fbb113f7 1749 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_PF;
e25d00b8 1750 } else {
d36e41dc 1751 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
310a2ad9 1752 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_AQ))
fbb113f7 1753 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_AQ;
c4e1868c 1754 else
fbb113f7 1755 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_REG;
e25d00b8 1756 }
1f012279 1757
d36e41dc 1758 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
310a2ad9 1759 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
fbb113f7 1760 vfres->vf_cap_flags |=
310a2ad9 1761 VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
3d0da5b7
ASJ		 1762 }
1763
310a2ad9 1764 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP)
fbb113f7 1765 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP;
bacd75cf 1766
d36e41dc 1767 if ((pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE) &&
310a2ad9 1768 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM))
fbb113f7 1769 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM;
bacd75cf 1770
310a2ad9 1771 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) {
14c5f5d2
SN		 1772 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
1773 dev_err(&pf->pdev->dev,
1774 "VF %d requested polling mode: this feature is supported only when the device is running in single function per port (SFP) mode\n",
1775 vf->vf_id);
db1a8f8e 1776 aq_ret = I40E_ERR_PARAM;
14c5f5d2
SN		 1777 goto err;
1778 }
fbb113f7 1779 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RX_POLLING;
14c5f5d2 1780 }
1f012279 1781
d36e41dc 1782 if (pf->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) {
310a2ad9 1783 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
fbb113f7 1784 vfres->vf_cap_flags |=
310a2ad9 1785 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
f6d83d13
ASJ		 1786 }
1787
a3f5aa90
AB		 1788 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_REQ_QUEUES)
1789 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_REQ_QUEUES;
1790
c27eac48
AD		 1791 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ADQ)
1792 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ADQ;
1793
5c3c48ac
JB		 1794 vfres->num_vsis = num_vsis;
1795 vfres->num_queue_pairs = vf->num_queue_pairs;
1796 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
c4e1868c
MW		 1797 vfres->rss_key_size = I40E_HKEY_ARRAY_SIZE;
1798 vfres->rss_lut_size = I40E_VF_HLUT_ARRAY_SIZE;
1799
fdf0e0bf 1800 if (vf->lan_vsi_idx) {
442b25e4 1801 vfres->vsi_res[0].vsi_id = vf->lan_vsi_id;
ff3f4cc2 1802 vfres->vsi_res[0].vsi_type = VIRTCHNL_VSI_SRIOV;
442b25e4 1803 vfres->vsi_res[0].num_queue_pairs = vsi->alloc_queue_pairs;
f578f5f4 1804 /* VFs only use TC 0 */
442b25e4 1805 vfres->vsi_res[0].qset_handle
f578f5f4 1806 = le16_to_cpu(vsi->info.qs_handle[0]);
442b25e4 1807 ether_addr_copy(vfres->vsi_res[0].default_mac_addr,
6995b36c 1808 vf->default_lan_addr.addr);
5c3c48ac 1809 }
6322e63c 1810 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac
JB		 1811
1812err:
b40c82e6 1813 /* send the response back to the VF */
310a2ad9 1814 ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_VF_RESOURCES,
5c3c48ac
JB		 1815 aq_ret, (u8 *)vfres, len);
1816
1817 kfree(vfres);
1818 return ret;
1819}
1820
1821/**
1822 * i40e_vc_reset_vf_msg
b40c82e6 1823 * @vf: pointer to the VF info
5c3c48ac
JB		 1824 * @msg: pointer to the msg buffer
1825 * @msglen: msg length
1826 *
b40c82e6
JK		 1827 * called from the VF to reset itself,
1828 * unlike other virtchnl messages, PF driver
1829 * doesn't send the response back to the VF
5c3c48ac 1830 **/
fc18eaa0 1831static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
5c3c48ac 1832{
6322e63c 1833 if (test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
fc18eaa0 1834 i40e_reset_vf(vf, false);
5c3c48ac
JB		 1835}
1836
5676a8b9
ASJ		 1837/**
1838 * i40e_getnum_vf_vsi_vlan_filters
1839 * @vsi: pointer to the vsi
1840 *
1841 * called to get the number of VLANs offloaded on this VF
1842 **/
1843static inline int i40e_getnum_vf_vsi_vlan_filters(struct i40e_vsi *vsi)
1844{
1845 struct i40e_mac_filter *f;
278e7d0b 1846 int num_vlans = 0, bkt;
5676a8b9 1847
278e7d0b 1848 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
5676a8b9
ASJ		 1849 if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID)
1850 num_vlans++;
1851 }
1852
1853 return num_vlans;
1854}
1855
5c3c48ac
JB		 1856/**
1857 * i40e_vc_config_promiscuous_mode_msg
b40c82e6 1858 * @vf: pointer to the VF info
5c3c48ac
JB		 1859 * @msg: pointer to the msg buffer
1860 * @msglen: msg length
1861 *
b40c82e6
JK		 1862 * called from the VF to configure the promiscuous mode of
1863 * VF vsis
5c3c48ac
JB		 1864 **/
1865static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf,
1866 u8 *msg, u16 msglen)
1867{
310a2ad9
JB		 1868 struct virtchnl_promisc_info *info =
1869 (struct virtchnl_promisc_info *)msg;
5c3c48ac
JB		 1870 struct i40e_pf *pf = vf->pf;
1871 struct i40e_hw *hw = &pf->hw;
5676a8b9
ASJ		 1872 struct i40e_mac_filter *f;
1873 i40e_status aq_ret = 0;
5c3c48ac 1874 bool allmulti = false;
5676a8b9
ASJ		 1875 struct i40e_vsi *vsi;
1876 bool alluni = false;
1877 int aq_err = 0;
278e7d0b 1878 int bkt;
5c3c48ac 1879
fdf0e0bf 1880 vsi = i40e_find_vsi_from_id(pf, info->vsi_id);
6322e63c 1881 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d4a0658d
CW		 1882 !i40e_vc_isvalid_vsi_id(vf, info->vsi_id) ||
1883 !vsi) {
eee4172a
MW		 1884 aq_ret = I40E_ERR_PARAM;
1885 goto error_param;
1886 }
1887 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
5676a8b9 1888 dev_err(&pf->pdev->dev,
eee4172a 1889 "Unprivileged VF %d is attempting to configure promiscuous mode\n",
5676a8b9 1890 vf->vf_id);
eee4172a
MW		 1891 /* Lie to the VF on purpose. */
1892 aq_ret = 0;
5c3c48ac
JB		 1893 goto error_param;
1894 }
5676a8b9 1895 /* Multicast promiscuous handling*/
ff3f4cc2 1896 if (info->flags & FLAG_VF_MULTICAST_PROMISC)
5c3c48ac 1897 allmulti = true;
5676a8b9
ASJ		 1898
1899 if (vf->port_vlan_id) {
1900 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw, vsi->seid,
1901 allmulti,
1902 vf->port_vlan_id,
1903 NULL);
1904 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
278e7d0b 1905 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
47d34839
ASJ		 1906 if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
1907 continue;
1908 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw,
1909 vsi->seid,
1910 allmulti,
1911 f->vlan,
1912 NULL);
5676a8b9
ASJ		 1913 aq_err = pf->hw.aq.asq_last_status;
1914 if (aq_ret) {
1915 dev_err(&pf->pdev->dev,
1916 "Could not add VLAN %d to multicast promiscuous domain err %s aq_err %s\n",
1917 f->vlan,
1918 i40e_stat_str(&pf->hw, aq_ret),
1919 i40e_aq_str(&pf->hw, aq_err));
1920 break;
1921 }
1922 }
1923 } else {
1924 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid,
1925 allmulti, NULL);
1926 aq_err = pf->hw.aq.asq_last_status;
1927 if (aq_ret) {
1928 dev_err(&pf->pdev->dev,
1929 "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n",
1930 vf->vf_id,
1931 i40e_stat_str(&pf->hw, aq_ret),
1932 i40e_aq_str(&pf->hw, aq_err));
7429c0bd 1933 goto error_param;
5676a8b9
ASJ		 1934 }
1935 }
1936
1937 if (!aq_ret) {
1938 dev_info(&pf->pdev->dev,
1939 "VF %d successfully set multicast promiscuous mode\n",
1940 vf->vf_id);
1941 if (allmulti)
6322e63c 1942 set_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
5676a8b9 1943 else
6322e63c 1944 clear_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
5676a8b9
ASJ		 1945 }
1946
ff3f4cc2 1947 if (info->flags & FLAG_VF_UNICAST_PROMISC)
5676a8b9
ASJ		 1948 alluni = true;
1949 if (vf->port_vlan_id) {
1950 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw, vsi->seid,
1951 alluni,
1952 vf->port_vlan_id,
1953 NULL);
1954 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
278e7d0b 1955 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
4d433084
JB		 1956 if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
1957 continue;
1958 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw,
1959 vsi->seid,
1960 alluni,
1961 f->vlan,
1962 NULL);
1963 aq_err = pf->hw.aq.asq_last_status;
5676a8b9
ASJ		 1964 if (aq_ret)
1965 dev_err(&pf->pdev->dev,
1966 "Could not add VLAN %d to Unicast promiscuous domain err %s aq_err %s\n",
1967 f->vlan,
1968 i40e_stat_str(&pf->hw, aq_ret),
1969 i40e_aq_str(&pf->hw, aq_err));
1970 }
1971 } else {
1972 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, vsi->seid,
e53b382f 1973 alluni, NULL,
b5569892 1974 true);
5676a8b9 1975 aq_err = pf->hw.aq.asq_last_status;
7429c0bd 1976 if (aq_ret) {
5676a8b9
ASJ		 1977 dev_err(&pf->pdev->dev,
1978 "VF %d failed to set unicast promiscuous mode %8.8x err %s aq_err %s\n",
1979 vf->vf_id, info->flags,
1980 i40e_stat_str(&pf->hw, aq_ret),
1981 i40e_aq_str(&pf->hw, aq_err));
7429c0bd
JK		 1982 goto error_param;
1983 }
5676a8b9
ASJ		 1984 }
1985
5676a8b9
ASJ		 1986 if (!aq_ret) {
1987 dev_info(&pf->pdev->dev,
1988 "VF %d successfully set unicast promiscuous mode\n",
1989 vf->vf_id);
1990 if (alluni)
6322e63c 1991 set_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
5676a8b9 1992 else
6322e63c 1993 clear_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
5676a8b9 1994 }
5c3c48ac
JB		 1995
1996error_param:
b40c82e6 1997 /* send the response to the VF */
5c3c48ac 1998 return i40e_vc_send_resp_to_vf(vf,
310a2ad9 1999 VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
5c3c48ac
JB		 2000 aq_ret);
2001}
2002
2003/**
2004 * i40e_vc_config_queues_msg
b40c82e6 2005 * @vf: pointer to the VF info
5c3c48ac
JB		 2006 * @msg: pointer to the msg buffer
2007 * @msglen: msg length
2008 *
b40c82e6 2009 * called from the VF to configure the rx/tx
5c3c48ac
JB		 2010 * queues
2011 **/
2012static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2013{
310a2ad9
JB		 2014 struct virtchnl_vsi_queue_config_info *qci =
2015 (struct virtchnl_vsi_queue_config_info *)msg;
2016 struct virtchnl_queue_pair_info *qpi;
5f5e33b6 2017 struct i40e_pf *pf = vf->pf;
c27eac48 2018 u16 vsi_id, vsi_queue_id = 0;
5c3c48ac 2019 i40e_status aq_ret = 0;
c27eac48
AD		 2020 int i, j = 0, idx = 0;
2021
2022 vsi_id = qci->vsi_id;
5c3c48ac 2023
6322e63c 2024 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2025 aq_ret = I40E_ERR_PARAM;
2026 goto error_param;
2027 }
2028
5c3c48ac
JB		 2029 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2030 aq_ret = I40E_ERR_PARAM;
2031 goto error_param;
2032 }
c27eac48 2033
5c3c48ac
JB		 2034 for (i = 0; i < qci->num_queue_pairs; i++) {
2035 qpi = &qci->qpair[i];
c27eac48
AD		 2036
2037 if (!vf->adq_enabled) {
2038 vsi_queue_id = qpi->txq.queue_id;
2039
2040 if (qpi->txq.vsi_id != qci->vsi_id ||
2041 qpi->rxq.vsi_id != qci->vsi_id ||
2042 qpi->rxq.queue_id != vsi_queue_id) {
2043 aq_ret = I40E_ERR_PARAM;
2044 goto error_param;
2045 }
2046 }
2047
2048 if (!i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
5c3c48ac
JB		 2049 aq_ret = I40E_ERR_PARAM;
2050 goto error_param;
2051 }
2052
2053 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
2054 &qpi->rxq) ||
2055 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
2056 &qpi->txq)) {
2057 aq_ret = I40E_ERR_PARAM;
2058 goto error_param;
2059 }
c27eac48
AD		 2060
2061 /* For ADq there can be up to 4 VSIs with max 4 queues each.
2062 * VF does not know about these additional VSIs and all
2063 * it cares is about its own queues. PF configures these queues
2064 * to its appropriate VSIs based on TC mapping
2065 **/
2066 if (vf->adq_enabled) {
2067 if (j == (vf->ch[idx].num_qps - 1)) {
2068 idx++;
2069 j = 0; /* resetting the queue count */
2070 vsi_queue_id = 0;
2071 } else {
2072 j++;
2073 vsi_queue_id++;
2074 }
2075 vsi_id = vf->ch[idx].vsi_id;
2076 }
5c3c48ac 2077 }
b40c82e6 2078 /* set vsi num_queue_pairs in use to num configured by VF */
c27eac48
AD		 2079 if (!vf->adq_enabled) {
2080 pf->vsi[vf->lan_vsi_idx]->num_queue_pairs =
2081 qci->num_queue_pairs;
2082 } else {
2083 for (i = 0; i < vf->num_tc; i++)
2084 pf->vsi[vf->ch[i].vsi_idx]->num_queue_pairs =
2085 vf->ch[i].num_qps;
2086 }
5c3c48ac
JB		 2087
2088error_param:
b40c82e6 2089 /* send the response to the VF */
310a2ad9 2090 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES,
5c3c48ac
JB		 2091 aq_ret);
2092}
2093
c27eac48
AD		 2094/**
2095 * i40e_validate_queue_map
2096 * @vsi_id: vsi id
2097 * @queuemap: Tx or Rx queue map
2098 *
2099 * check if Tx or Rx queue map is valid
2100 **/
2101static int i40e_validate_queue_map(struct i40e_vf *vf, u16 vsi_id,
2102 unsigned long queuemap)
2103{
2104 u16 vsi_queue_id, queue_id;
2105
2106 for_each_set_bit(vsi_queue_id, &queuemap, I40E_MAX_VSI_QP) {
2107 if (vf->adq_enabled) {
2108 vsi_id = vf->ch[vsi_queue_id / I40E_MAX_VF_VSI].vsi_id;
2109 queue_id = (vsi_queue_id % I40E_DEFAULT_QUEUES_PER_VF);
2110 } else {
2111 queue_id = vsi_queue_id;
2112 }
2113
2114 if (!i40e_vc_isvalid_queue_id(vf, vsi_id, queue_id))
2115 return -EINVAL;
2116 }
2117
2118 return 0;
2119}
2120
5c3c48ac
JB		 2121/**
2122 * i40e_vc_config_irq_map_msg
b40c82e6 2123 * @vf: pointer to the VF info
5c3c48ac
JB		 2124 * @msg: pointer to the msg buffer
2125 * @msglen: msg length
2126 *
b40c82e6 2127 * called from the VF to configure the irq to
5c3c48ac
JB		 2128 * queue map
2129 **/
2130static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2131{
310a2ad9
JB		 2132 struct virtchnl_irq_map_info *irqmap_info =
2133 (struct virtchnl_irq_map_info *)msg;
2134 struct virtchnl_vector_map *map;
c27eac48 2135 u16 vsi_id, vector_id;
5c3c48ac 2136 i40e_status aq_ret = 0;
5c3c48ac
JB		 2137 int i;
2138
6322e63c 2139 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2140 aq_ret = I40E_ERR_PARAM;
2141 goto error_param;
2142 }
2143
2144 for (i = 0; i < irqmap_info->num_vectors; i++) {
2145 map = &irqmap_info->vecmap[i];
5c3c48ac
JB		 2146 vector_id = map->vector_id;
2147 vsi_id = map->vsi_id;
2148 /* validate msg params */
2149 if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
2150 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2151 aq_ret = I40E_ERR_PARAM;
2152 goto error_param;
2153 }
2154
c27eac48
AD		 2155 if (i40e_validate_queue_map(vf, vsi_id, map->rxq_map)) {
2156 aq_ret = I40E_ERR_PARAM;
2157 goto error_param;
5c3c48ac
JB		 2158 }
2159
c27eac48
AD		 2160 if (i40e_validate_queue_map(vf, vsi_id, map->txq_map)) {
2161 aq_ret = I40E_ERR_PARAM;
2162 goto error_param;
5c3c48ac
JB		 2163 }
2164
2165 i40e_config_irq_link_list(vf, vsi_id, map);
2166 }
2167error_param:
b40c82e6 2168 /* send the response to the VF */
310a2ad9 2169 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_IRQ_MAP,
5c3c48ac
JB		 2170 aq_ret);
2171}
2172
2173/**
2174 * i40e_vc_enable_queues_msg
b40c82e6 2175 * @vf: pointer to the VF info
5c3c48ac
JB		 2176 * @msg: pointer to the msg buffer
2177 * @msglen: msg length
2178 *
b40c82e6 2179 * called from the VF to enable all or specific queue(s)
5c3c48ac
JB		 2180 **/
2181static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2182{
310a2ad9
JB		 2183 struct virtchnl_queue_select *vqs =
2184 (struct virtchnl_queue_select *)msg;
5c3c48ac
JB		 2185 struct i40e_pf *pf = vf->pf;
2186 u16 vsi_id = vqs->vsi_id;
2187 i40e_status aq_ret = 0;
c27eac48 2188 int i;
5c3c48ac 2189
6322e63c 2190 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2191 aq_ret = I40E_ERR_PARAM;
2192 goto error_param;
2193 }
2194
2195 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2196 aq_ret = I40E_ERR_PARAM;
2197 goto error_param;
2198 }
2199
2200 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
2201 aq_ret = I40E_ERR_PARAM;
2202 goto error_param;
2203 }
fdf0e0bf 2204
3aa7b74d 2205 if (i40e_vsi_start_rings(pf->vsi[vf->lan_vsi_idx]))
88f6563d 2206 aq_ret = I40E_ERR_TIMEOUT;
c27eac48
AD		 2207
2208 /* need to start the rings for additional ADq VSI's as well */
2209 if (vf->adq_enabled) {
2210 /* zero belongs to LAN VSI */
2211 for (i = 1; i < vf->num_tc; i++) {
2212 if (i40e_vsi_start_rings(pf->vsi[vf->ch[i].vsi_idx]))
2213 aq_ret = I40E_ERR_TIMEOUT;
2214 }
2215 }
2216
5c3c48ac 2217error_param:
b40c82e6 2218 /* send the response to the VF */
310a2ad9 2219 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_QUEUES,
5c3c48ac
JB		 2220 aq_ret);
2221}
2222
2223/**
2224 * i40e_vc_disable_queues_msg
b40c82e6 2225 * @vf: pointer to the VF info
5c3c48ac
JB		 2226 * @msg: pointer to the msg buffer
2227 * @msglen: msg length
2228 *
b40c82e6 2229 * called from the VF to disable all or specific
5c3c48ac
JB		 2230 * queue(s)
2231 **/
2232static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2233{
310a2ad9
JB		 2234 struct virtchnl_queue_select *vqs =
2235 (struct virtchnl_queue_select *)msg;
5c3c48ac 2236 struct i40e_pf *pf = vf->pf;
5c3c48ac 2237 i40e_status aq_ret = 0;
5c3c48ac 2238
6322e63c 2239 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2240 aq_ret = I40E_ERR_PARAM;
2241 goto error_param;
2242 }
2243
2244 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
2245 aq_ret = I40E_ERR_PARAM;
2246 goto error_param;
2247 }
2248
2249 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
2250 aq_ret = I40E_ERR_PARAM;
2251 goto error_param;
2252 }
fdf0e0bf 2253
3aa7b74d 2254 i40e_vsi_stop_rings(pf->vsi[vf->lan_vsi_idx]);
5c3c48ac
JB		 2255
2256error_param:
b40c82e6 2257 /* send the response to the VF */
310a2ad9 2258 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_QUEUES,
5c3c48ac
JB		 2259 aq_ret);
2260}
2261
a3f5aa90
AB		 2262/**
2263 * i40e_vc_request_queues_msg
2264 * @vf: pointer to the VF info
2265 * @msg: pointer to the msg buffer
2266 * @msglen: msg length
2267 *
2268 * VFs get a default number of queues but can use this message to request a
17a9422d
AB		 2269 * different number. If the request is successful, PF will reset the VF and
2270 * return 0. If unsuccessful, PF will send message informing VF of number of
2271 * available queues and return result of sending VF a message.
a3f5aa90
AB		 2272 **/
2273static int i40e_vc_request_queues_msg(struct i40e_vf *vf, u8 *msg, int msglen)
2274{
2275 struct virtchnl_vf_res_request *vfres =
2276 (struct virtchnl_vf_res_request *)msg;
2277 int req_pairs = vfres->num_queue_pairs;
2278 int cur_pairs = vf->num_queue_pairs;
2279 struct i40e_pf *pf = vf->pf;
2280
2281 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
2282 return -EINVAL;
2283
2284 if (req_pairs <= 0) {
2285 dev_err(&pf->pdev->dev,
2286 "VF %d tried to request %d queues. Ignoring.\n",
2287 vf->vf_id, req_pairs);
2288 } else if (req_pairs > I40E_MAX_VF_QUEUES) {
2289 dev_err(&pf->pdev->dev,
2290 "VF %d tried to request more than %d queues.\n",
2291 vf->vf_id,
2292 I40E_MAX_VF_QUEUES);
2293 vfres->num_queue_pairs = I40E_MAX_VF_QUEUES;
2294 } else if (req_pairs - cur_pairs > pf->queues_left) {
2295 dev_warn(&pf->pdev->dev,
2296 "VF %d requested %d more queues, but only %d left.\n",
2297 vf->vf_id,
2298 req_pairs - cur_pairs,
2299 pf->queues_left);
2300 vfres->num_queue_pairs = pf->queues_left + cur_pairs;
2301 } else {
17a9422d 2302 /* successful request */
a3f5aa90 2303 vf->num_req_queues = req_pairs;
17a9422d
AB		 2304 i40e_vc_notify_vf_reset(vf);
2305 i40e_reset_vf(vf, false);
2306 return 0;
a3f5aa90
AB		 2307 }
2308
2309 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_REQUEST_QUEUES, 0,
c30bf8ce 2310 (u8 *)vfres, sizeof(*vfres));
a3f5aa90
AB		 2311}
2312
5c3c48ac
JB		 2313/**
2314 * i40e_vc_get_stats_msg
b40c82e6 2315 * @vf: pointer to the VF info
5c3c48ac
JB		 2316 * @msg: pointer to the msg buffer
2317 * @msglen: msg length
2318 *
b40c82e6 2319 * called from the VF to get vsi stats
5c3c48ac
JB		 2320 **/
2321static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2322{
310a2ad9
JB		 2323 struct virtchnl_queue_select *vqs =
2324 (struct virtchnl_queue_select *)msg;
5c3c48ac
JB		 2325 struct i40e_pf *pf = vf->pf;
2326 struct i40e_eth_stats stats;
2327 i40e_status aq_ret = 0;
2328 struct i40e_vsi *vsi;
2329
2330 memset(&stats, 0, sizeof(struct i40e_eth_stats));
2331
6322e63c 2332 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2333 aq_ret = I40E_ERR_PARAM;
2334 goto error_param;
2335 }
2336
2337 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
2338 aq_ret = I40E_ERR_PARAM;
2339 goto error_param;
2340 }
2341
fdf0e0bf 2342 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2343 if (!vsi) {
2344 aq_ret = I40E_ERR_PARAM;
2345 goto error_param;
2346 }
2347 i40e_update_eth_stats(vsi);
5a9769c8 2348 stats = vsi->eth_stats;
5c3c48ac
JB		 2349
2350error_param:
b40c82e6 2351 /* send the response back to the VF */
310a2ad9 2352 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_STATS, aq_ret,
5c3c48ac
JB		 2353 (u8 *)&stats, sizeof(stats));
2354}
2355
5f527ba9 2356/* If the VF is not trusted restrict the number of MAC/VLAN it can program */
4dbc5661 2357#define I40E_VC_MAX_MAC_ADDR_PER_VF 12
5f527ba9
ASJ		 2358#define I40E_VC_MAX_VLAN_PER_VF 8
2359
f657a6e1
GR		 2360/**
2361 * i40e_check_vf_permission
b40c82e6 2362 * @vf: pointer to the VF info
f657a6e1
GR		 2363 * @macaddr: pointer to the MAC Address being checked
2364 *
2365 * Check if the VF has permission to add or delete unicast MAC address
2366 * filters and return error code -EPERM if not. Then check if the
2367 * address filter requested is broadcast or zero and if so return
2368 * an invalid MAC address error code.
2369 **/
2370static inline int i40e_check_vf_permission(struct i40e_vf *vf, u8 *macaddr)
2371{
2372 struct i40e_pf *pf = vf->pf;
2373 int ret = 0;
2374
2375 if (is_broadcast_ether_addr(macaddr) ||
2376 is_zero_ether_addr(macaddr)) {
2377 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n", macaddr);
2378 ret = I40E_ERR_INVALID_MAC_ADDR;
5017c2a8 2379 } else if (vf->pf_set_mac && !is_multicast_ether_addr(macaddr) &&
692fb0a7 2380 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
5017c2a8 2381 !ether_addr_equal(macaddr, vf->default_lan_addr.addr)) {
f657a6e1
GR		 2382 /* If the host VMM administrator has set the VF MAC address
2383 * administratively via the ndo_set_vf_mac command then deny
2384 * permission to the VF to add or delete unicast MAC addresses.
692fb0a7 2385 * Unless the VF is privileged and then it can do whatever.
5017c2a8
GR		 2386 * The VF may request to set the MAC address filter already
2387 * assigned to it so do not return an error in that case.
f657a6e1
GR		 2388 */
2389 dev_err(&pf->pdev->dev,
692fb0a7 2390 "VF attempting to override administratively set MAC address, reload the VF driver to resume normal operation\n");
f657a6e1 2391 ret = -EPERM;
5f527ba9
ASJ		 2392 } else if ((vf->num_mac >= I40E_VC_MAX_MAC_ADDR_PER_VF) &&
2393 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2394 dev_err(&pf->pdev->dev,
2395 "VF is not trusted, switch the VF to trusted to add more functionality\n");
2396 ret = -EPERM;
f657a6e1
GR		 2397 }
2398 return ret;
2399}
2400
5c3c48ac
JB		 2401/**
2402 * i40e_vc_add_mac_addr_msg
b40c82e6 2403 * @vf: pointer to the VF info
5c3c48ac
JB		 2404 * @msg: pointer to the msg buffer
2405 * @msglen: msg length
2406 *
2407 * add guest mac address filter
2408 **/
2409static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2410{
310a2ad9
JB		 2411 struct virtchnl_ether_addr_list *al =
2412 (struct virtchnl_ether_addr_list *)msg;
5c3c48ac
JB		 2413 struct i40e_pf *pf = vf->pf;
2414 struct i40e_vsi *vsi = NULL;
2415 u16 vsi_id = al->vsi_id;
f657a6e1 2416 i40e_status ret = 0;
5c3c48ac
JB		 2417 int i;
2418
6322e63c 2419 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac 2420 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 2421 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2422 goto error_param;
2423 }
2424
2425 for (i = 0; i < al->num_elements; i++) {
f657a6e1
GR		 2426 ret = i40e_check_vf_permission(vf, al->list[i].addr);
2427 if (ret)
5c3c48ac 2428 goto error_param;
5c3c48ac 2429 }
fdf0e0bf 2430 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2431
21659035
KP		 2432 /* Lock once, because all function inside for loop accesses VSI's
2433 * MAC filter list which needs to be protected using same lock.
2434 */
278e7d0b 2435 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 2436
5c3c48ac
JB		 2437 /* add new addresses to the list */
2438 for (i = 0; i < al->num_elements; i++) {
2439 struct i40e_mac_filter *f;
2440
1bc87e80 2441 f = i40e_find_mac(vsi, al->list[i].addr);
34c164de 2442 if (!f) {
feffdbe4 2443 f = i40e_add_mac_filter(vsi, al->list[i].addr);
5c3c48ac 2444
34c164de
ZP		 2445 if (!f) {
2446 dev_err(&pf->pdev->dev,
2447 "Unable to add MAC filter %pM for VF %d\n",
2448 al->list[i].addr, vf->vf_id);
2449 ret = I40E_ERR_PARAM;
2450 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2451 goto error_param;
2452 } else {
2453 vf->num_mac++;
2454 }
5c3c48ac
JB		 2455 }
2456 }
278e7d0b 2457 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2458
2459 /* program the updated filter list */
ea02e90b
MW		 2460 ret = i40e_sync_vsi_filters(vsi);
2461 if (ret)
2462 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2463 vf->vf_id, ret);
5c3c48ac
JB		 2464
2465error_param:
b40c82e6 2466 /* send the response to the VF */
310a2ad9 2467 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_ETH_ADDR,
f657a6e1 2468 ret);
5c3c48ac
JB		 2469}
2470
2471/**
2472 * i40e_vc_del_mac_addr_msg
b40c82e6 2473 * @vf: pointer to the VF info
5c3c48ac
JB		 2474 * @msg: pointer to the msg buffer
2475 * @msglen: msg length
2476 *
2477 * remove guest mac address filter
2478 **/
2479static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2480{
310a2ad9
JB		 2481 struct virtchnl_ether_addr_list *al =
2482 (struct virtchnl_ether_addr_list *)msg;
5c3c48ac
JB		 2483 struct i40e_pf *pf = vf->pf;
2484 struct i40e_vsi *vsi = NULL;
2485 u16 vsi_id = al->vsi_id;
f657a6e1 2486 i40e_status ret = 0;
5c3c48ac
JB		 2487 int i;
2488
6322e63c 2489 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac 2490 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 2491 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2492 goto error_param;
2493 }
f657a6e1
GR		 2494
2495 for (i = 0; i < al->num_elements; i++) {
700bbf6c
MW		 2496 if (is_broadcast_ether_addr(al->list[i].addr) ||
2497 is_zero_ether_addr(al->list[i].addr)) {
8d8f2295
MW		 2498 dev_err(&pf->pdev->dev, "Invalid MAC addr %pM for VF %d\n",
2499 al->list[i].addr, vf->vf_id);
700bbf6c 2500 ret = I40E_ERR_INVALID_MAC_ADDR;
f657a6e1 2501 goto error_param;
700bbf6c 2502 }
f657a6e1 2503 }
fdf0e0bf 2504 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2505
278e7d0b 2506 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2507 /* delete addresses from the list */
2508 for (i = 0; i < al->num_elements; i++)
feffdbe4 2509 if (i40e_del_mac_filter(vsi, al->list[i].addr)) {
b36e9ab5 2510 ret = I40E_ERR_INVALID_MAC_ADDR;
278e7d0b 2511 spin_unlock_bh(&vsi->mac_filter_hash_lock);
b36e9ab5 2512 goto error_param;
5f527ba9
ASJ		 2513 } else {
2514 vf->num_mac--;
b36e9ab5
MW		 2515 }
2516
278e7d0b 2517 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2518
2519 /* program the updated filter list */
ea02e90b
MW		 2520 ret = i40e_sync_vsi_filters(vsi);
2521 if (ret)
2522 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2523 vf->vf_id, ret);
5c3c48ac
JB		 2524
2525error_param:
b40c82e6 2526 /* send the response to the VF */
310a2ad9 2527 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_ETH_ADDR,
f657a6e1 2528 ret);
5c3c48ac
JB		 2529}
2530
2531/**
2532 * i40e_vc_add_vlan_msg
b40c82e6 2533 * @vf: pointer to the VF info
5c3c48ac
JB		 2534 * @msg: pointer to the msg buffer
2535 * @msglen: msg length
2536 *
2537 * program guest vlan id
2538 **/
2539static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2540{
310a2ad9
JB		 2541 struct virtchnl_vlan_filter_list *vfl =
2542 (struct virtchnl_vlan_filter_list *)msg;
5c3c48ac
JB		 2543 struct i40e_pf *pf = vf->pf;
2544 struct i40e_vsi *vsi = NULL;
2545 u16 vsi_id = vfl->vsi_id;
2546 i40e_status aq_ret = 0;
2547 int i;
2548
5f527ba9
ASJ		 2549 if ((vf->num_vlan >= I40E_VC_MAX_VLAN_PER_VF) &&
2550 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2551 dev_err(&pf->pdev->dev,
2552 "VF is not trusted, switch the VF to trusted to add more VLAN addresses\n");
2553 goto error_param;
2554 }
6322e63c 2555 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2556 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2557 aq_ret = I40E_ERR_PARAM;
2558 goto error_param;
2559 }
2560
2561 for (i = 0; i < vfl->num_elements; i++) {
2562 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2563 aq_ret = I40E_ERR_PARAM;
2564 dev_err(&pf->pdev->dev,
2565 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
2566 goto error_param;
2567 }
2568 }
fdf0e0bf 2569 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2570 if (vsi->info.pvid) {
2571 aq_ret = I40E_ERR_PARAM;
2572 goto error_param;
2573 }
2574
2575 i40e_vlan_stripping_enable(vsi);
2576 for (i = 0; i < vfl->num_elements; i++) {
2577 /* add new VLAN filter */
2578 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
5f527ba9
ASJ		 2579 if (!ret)
2580 vf->num_vlan++;
6995b36c 2581
6322e63c 2582 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2583 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2584 true,
2585 vfl->vlan_id[i],
2586 NULL);
6322e63c 2587 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2588 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2589 true,
2590 vfl->vlan_id[i],
2591 NULL);
2592
5c3c48ac
JB		 2593 if (ret)
2594 dev_err(&pf->pdev->dev,
8d8f2295
MW		 2595 "Unable to add VLAN filter %d for VF %d, error %d\n",
2596 vfl->vlan_id[i], vf->vf_id, ret);
5c3c48ac
JB		 2597 }
2598
2599error_param:
b40c82e6 2600 /* send the response to the VF */
310a2ad9 2601 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_VLAN, aq_ret);
5c3c48ac
JB		 2602}
2603
2604/**
2605 * i40e_vc_remove_vlan_msg
b40c82e6 2606 * @vf: pointer to the VF info
5c3c48ac
JB		 2607 * @msg: pointer to the msg buffer
2608 * @msglen: msg length
2609 *
2610 * remove programmed guest vlan id
2611 **/
2612static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2613{
310a2ad9
JB		 2614 struct virtchnl_vlan_filter_list *vfl =
2615 (struct virtchnl_vlan_filter_list *)msg;
5c3c48ac
JB		 2616 struct i40e_pf *pf = vf->pf;
2617 struct i40e_vsi *vsi = NULL;
2618 u16 vsi_id = vfl->vsi_id;
2619 i40e_status aq_ret = 0;
2620 int i;
2621
6322e63c 2622 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2623 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2624 aq_ret = I40E_ERR_PARAM;
2625 goto error_param;
2626 }
2627
2628 for (i = 0; i < vfl->num_elements; i++) {
2629 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2630 aq_ret = I40E_ERR_PARAM;
2631 goto error_param;
2632 }
2633 }
2634
fdf0e0bf 2635 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2636 if (vsi->info.pvid) {
2637 aq_ret = I40E_ERR_PARAM;
2638 goto error_param;
2639 }
2640
2641 for (i = 0; i < vfl->num_elements; i++) {
3aa7b74d
FS		 2642 i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
2643 vf->num_vlan--;
6995b36c 2644
6322e63c 2645 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2646 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2647 false,
2648 vfl->vlan_id[i],
2649 NULL);
6322e63c 2650 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2651 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2652 false,
2653 vfl->vlan_id[i],
2654 NULL);
5c3c48ac
JB		 2655 }
2656
2657error_param:
b40c82e6 2658 /* send the response to the VF */
310a2ad9 2659 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_VLAN, aq_ret);
5c3c48ac
JB		 2660}
2661
e3219ce6
ASJ		 2662/**
2663 * i40e_vc_iwarp_msg
2664 * @vf: pointer to the VF info
2665 * @msg: pointer to the msg buffer
2666 * @msglen: msg length
2667 *
2668 * called from the VF for the iwarp msgs
2669 **/
2670static int i40e_vc_iwarp_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2671{
2672 struct i40e_pf *pf = vf->pf;
2673 int abs_vf_id = vf->vf_id + pf->hw.func_caps.vf_base_id;
2674 i40e_status aq_ret = 0;
2675
6322e63c
JK		 2676 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2677 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2678 aq_ret = I40E_ERR_PARAM;
2679 goto error_param;
2680 }
2681
2682 i40e_notify_client_of_vf_msg(pf->vsi[pf->lan_vsi], abs_vf_id,
2683 msg, msglen);
2684
2685error_param:
2686 /* send the response to the VF */
310a2ad9 2687 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_IWARP,
e3219ce6
ASJ		 2688 aq_ret);
2689}
2690
2691/**
2692 * i40e_vc_iwarp_qvmap_msg
2693 * @vf: pointer to the VF info
2694 * @msg: pointer to the msg buffer
2695 * @msglen: msg length
2696 * @config: config qvmap or release it
2697 *
2698 * called from the VF for the iwarp msgs
2699 **/
2700static int i40e_vc_iwarp_qvmap_msg(struct i40e_vf *vf, u8 *msg, u16 msglen,
2701 bool config)
2702{
310a2ad9
JB		 2703 struct virtchnl_iwarp_qvlist_info *qvlist_info =
2704 (struct virtchnl_iwarp_qvlist_info *)msg;
e3219ce6
ASJ		 2705 i40e_status aq_ret = 0;
2706
6322e63c
JK		 2707 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2708 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2709 aq_ret = I40E_ERR_PARAM;
2710 goto error_param;
2711 }
2712
2713 if (config) {
2714 if (i40e_config_iwarp_qvlist(vf, qvlist_info))
2715 aq_ret = I40E_ERR_PARAM;
2716 } else {
2717 i40e_release_iwarp_qvlist(vf);
2718 }
2719
2720error_param:
2721 /* send the response to the VF */
2722 return i40e_vc_send_resp_to_vf(vf,
310a2ad9
JB		 2723 config ? VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP :
2724 VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP,
e3219ce6
ASJ		 2725 aq_ret);
2726}
2727
c4e1868c
MW		 2728/**
2729 * i40e_vc_config_rss_key
2730 * @vf: pointer to the VF info
2731 * @msg: pointer to the msg buffer
2732 * @msglen: msg length
2733 *
2734 * Configure the VF's RSS key
2735 **/
2736static int i40e_vc_config_rss_key(struct i40e_vf *vf, u8 *msg, u16 msglen)
2737{
310a2ad9
JB		 2738 struct virtchnl_rss_key *vrk =
2739 (struct virtchnl_rss_key *)msg;
c4e1868c
MW		 2740 struct i40e_pf *pf = vf->pf;
2741 struct i40e_vsi *vsi = NULL;
2742 u16 vsi_id = vrk->vsi_id;
2743 i40e_status aq_ret = 0;
2744
6322e63c 2745 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2746 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2747 (vrk->key_len != I40E_HKEY_ARRAY_SIZE)) {
2748 aq_ret = I40E_ERR_PARAM;
2749 goto err;
2750 }
2751
2752 vsi = pf->vsi[vf->lan_vsi_idx];
2753 aq_ret = i40e_config_rss(vsi, vrk->key, NULL, 0);
2754err:
2755 /* send the response to the VF */
310a2ad9 2756 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_KEY,
c4e1868c
MW		 2757 aq_ret);
2758}
2759
2760/**
2761 * i40e_vc_config_rss_lut
2762 * @vf: pointer to the VF info
2763 * @msg: pointer to the msg buffer
2764 * @msglen: msg length
2765 *
2766 * Configure the VF's RSS LUT
2767 **/
2768static int i40e_vc_config_rss_lut(struct i40e_vf *vf, u8 *msg, u16 msglen)
2769{
310a2ad9
JB		 2770 struct virtchnl_rss_lut *vrl =
2771 (struct virtchnl_rss_lut *)msg;
c4e1868c
MW		 2772 struct i40e_pf *pf = vf->pf;
2773 struct i40e_vsi *vsi = NULL;
2774 u16 vsi_id = vrl->vsi_id;
2775 i40e_status aq_ret = 0;
2776
6322e63c 2777 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2778 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2779 (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)) {
2780 aq_ret = I40E_ERR_PARAM;
2781 goto err;
2782 }
2783
2784 vsi = pf->vsi[vf->lan_vsi_idx];
2785 aq_ret = i40e_config_rss(vsi, NULL, vrl->lut, I40E_VF_HLUT_ARRAY_SIZE);
2786 /* send the response to the VF */
2787err:
310a2ad9 2788 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_LUT,
c4e1868c
MW		 2789 aq_ret);
2790}
2791
2792/**
2793 * i40e_vc_get_rss_hena
2794 * @vf: pointer to the VF info
2795 * @msg: pointer to the msg buffer
2796 * @msglen: msg length
2797 *
2798 * Return the RSS HENA bits allowed by the hardware
2799 **/
2800static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
2801{
310a2ad9 2802 struct virtchnl_rss_hena *vrh = NULL;
c4e1868c
MW		 2803 struct i40e_pf *pf = vf->pf;
2804 i40e_status aq_ret = 0;
2805 int len = 0;
2806
6322e63c 2807 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2808 aq_ret = I40E_ERR_PARAM;
2809 goto err;
2810 }
310a2ad9 2811 len = sizeof(struct virtchnl_rss_hena);
c4e1868c
MW		 2812
2813 vrh = kzalloc(len, GFP_KERNEL);
2814 if (!vrh) {
2815 aq_ret = I40E_ERR_NO_MEMORY;
2816 len = 0;
2817 goto err;
2818 }
2819 vrh->hena = i40e_pf_get_default_rss_hena(pf);
2820err:
2821 /* send the response back to the VF */
310a2ad9 2822 aq_ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_RSS_HENA_CAPS,
c4e1868c 2823 aq_ret, (u8 *)vrh, len);
b7d2cd95 2824 kfree(vrh);
c4e1868c
MW		 2825 return aq_ret;
2826}
2827
2828/**
2829 * i40e_vc_set_rss_hena
2830 * @vf: pointer to the VF info
2831 * @msg: pointer to the msg buffer
2832 * @msglen: msg length
2833 *
2834 * Set the RSS HENA bits for the VF
2835 **/
2836static int i40e_vc_set_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
2837{
310a2ad9
JB		 2838 struct virtchnl_rss_hena *vrh =
2839 (struct virtchnl_rss_hena *)msg;
c4e1868c
MW		 2840 struct i40e_pf *pf = vf->pf;
2841 struct i40e_hw *hw = &pf->hw;
2842 i40e_status aq_ret = 0;
2843
6322e63c 2844 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2845 aq_ret = I40E_ERR_PARAM;
2846 goto err;
2847 }
2848 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)vrh->hena);
2849 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_id),
2850 (u32)(vrh->hena >> 32));
2851
2852 /* send the response to the VF */
2853err:
f0adc6e8 2854 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_SET_RSS_HENA, aq_ret);
c4e1868c
MW		 2855}
2856
8774370d
MS		 2857/**
2858 * i40e_vc_enable_vlan_stripping
2859 * @vf: pointer to the VF info
2860 * @msg: pointer to the msg buffer
2861 * @msglen: msg length
2862 *
2863 * Enable vlan header stripping for the VF
2864 **/
2865static int i40e_vc_enable_vlan_stripping(struct i40e_vf *vf, u8 *msg,
2866 u16 msglen)
2867{
2868 struct i40e_vsi *vsi = vf->pf->vsi[vf->lan_vsi_idx];
2869 i40e_status aq_ret = 0;
2870
2871 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
2872 aq_ret = I40E_ERR_PARAM;
2873 goto err;
2874 }
2875
2876 i40e_vlan_stripping_enable(vsi);
2877
2878 /* send the response to the VF */
2879err:
2880 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_VLAN_STRIPPING,
2881 aq_ret);
2882}
2883
2884/**
2885 * i40e_vc_disable_vlan_stripping
2886 * @vf: pointer to the VF info
2887 * @msg: pointer to the msg buffer
2888 * @msglen: msg length
2889 *
2890 * Disable vlan header stripping for the VF
2891 **/
2892static int i40e_vc_disable_vlan_stripping(struct i40e_vf *vf, u8 *msg,
2893 u16 msglen)
2894{
2895 struct i40e_vsi *vsi = vf->pf->vsi[vf->lan_vsi_idx];
2896 i40e_status aq_ret = 0;
2897
2898 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
2899 aq_ret = I40E_ERR_PARAM;
2900 goto err;
2901 }
2902
2903 i40e_vlan_stripping_disable(vsi);
2904
2905 /* send the response to the VF */
2906err:
2907 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_VLAN_STRIPPING,
2908 aq_ret);
2909}
2910
c27eac48
AD		 2911/**
2912 * i40e_vc_add_qch_msg: Add queue channel and enable ADq
2913 * @vf: pointer to the VF info
2914 * @msg: pointer to the msg buffer
2915 **/
2916static int i40e_vc_add_qch_msg(struct i40e_vf *vf, u8 *msg)
2917{
2918 struct virtchnl_tc_info *tci =
2919 (struct virtchnl_tc_info *)msg;
2920 struct i40e_pf *pf = vf->pf;
2921 int i, adq_request_qps = 0;
2922 i40e_status aq_ret = 0;
2923
2924 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
2925 aq_ret = I40E_ERR_PARAM;
2926 goto err;
2927 }
2928
2929 /* ADq cannot be applied if spoof check is ON */
2930 if (vf->spoofchk) {
2931 dev_err(&pf->pdev->dev,
2932 "Spoof check is ON, turn it OFF to enable ADq\n");
2933 aq_ret = I40E_ERR_PARAM;
2934 goto err;
2935 }
2936
2937 if (!(vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ADQ)) {
2938 dev_err(&pf->pdev->dev,
2939 "VF %d attempting to enable ADq, but hasn't properly negotiated that capability\n",
2940 vf->vf_id);
2941 aq_ret = I40E_ERR_PARAM;
2942 goto err;
2943 }
2944
2945 /* max number of traffic classes for VF currently capped at 4 */
2946 if (!tci->num_tc || tci->num_tc > I40E_MAX_VF_VSI) {
2947 dev_err(&pf->pdev->dev,
2948 "VF %d trying to set %u TCs, valid range 1-4 TCs per VF\n",
2949 vf->vf_id, tci->num_tc);
2950 aq_ret = I40E_ERR_PARAM;
2951 goto err;
2952 }
2953
2954 /* validate queues for each TC */
2955 for (i = 0; i < tci->num_tc; i++)
2956 if (!tci->list[i].count ||
2957 tci->list[i].count > I40E_DEFAULT_QUEUES_PER_VF) {
2958 dev_err(&pf->pdev->dev,
2959 "VF %d: TC %d trying to set %u queues, valid range 1-4 queues per TC\n",
2960 vf->vf_id, i, tci->list[i].count);
2961 aq_ret = I40E_ERR_PARAM;
2962 goto err;
2963 }
2964
2965 /* need Max VF queues but already have default number of queues */
2966 adq_request_qps = I40E_MAX_VF_QUEUES - I40E_DEFAULT_QUEUES_PER_VF;
2967
2968 if (pf->queues_left < adq_request_qps) {
2969 dev_err(&pf->pdev->dev,
2970 "No queues left to allocate to VF %d\n",
2971 vf->vf_id);
2972 aq_ret = I40E_ERR_PARAM;
2973 goto err;
2974 } else {
2975 /* we need to allocate max VF queues to enable ADq so as to
2976 * make sure ADq enabled VF always gets back queues when it
2977 * goes through a reset.
2978 */
2979 vf->num_queue_pairs = I40E_MAX_VF_QUEUES;
2980 }
2981
2982 /* parse data from the queue channel info */
2983 vf->num_tc = tci->num_tc;
2984 for (i = 0; i < vf->num_tc; i++)
2985 vf->ch[i].num_qps = tci->list[i].count;
2986
2987 /* set this flag only after making sure all inputs are sane */
2988 vf->adq_enabled = true;
2989
2990 /* reset the VF in order to allocate resources */
2991 i40e_vc_notify_vf_reset(vf);
2992 i40e_reset_vf(vf, false);
2993
2994 return I40E_SUCCESS;
2995
2996 /* send the response to the VF */
2997err:
2998 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_CHANNELS,
2999 aq_ret);
3000}
3001
c4998aa3
AD		 3002/**
3003 * i40e_vc_del_qch_msg
3004 * @vf: pointer to the VF info
3005 * @msg: pointer to the msg buffer
3006 **/
3007static int i40e_vc_del_qch_msg(struct i40e_vf *vf, u8 *msg)
3008{
3009 struct i40e_pf *pf = vf->pf;
3010 i40e_status aq_ret = 0;
3011
3012 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3013 aq_ret = I40E_ERR_PARAM;
3014 goto err;
3015 }
3016
3017 if (vf->adq_enabled) {
3018 i40e_del_qch(vf);
3019 vf->adq_enabled = false;
3020 vf->num_tc = 0;
3021 dev_info(&pf->pdev->dev,
3022 "Deleting Queue Channels for ADq on VF %d\n",
3023 vf->vf_id);
3024 } else {
3025 dev_info(&pf->pdev->dev, "VF %d trying to delete queue channels but ADq isn't enabled\n",
3026 vf->vf_id);
3027 aq_ret = I40E_ERR_PARAM;
3028 }
3029
3030 /* reset the VF in order to allocate resources */
3031 i40e_vc_notify_vf_reset(vf);
3032 i40e_reset_vf(vf, false);
3033
3034 return I40E_SUCCESS;
3035
3036err:
3037 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_CHANNELS,
3038 aq_ret);
3039}
3040
5c3c48ac
JB		 3041/**
3042 * i40e_vc_process_vf_msg
b40c82e6
JK		 3043 * @pf: pointer to the PF structure
3044 * @vf_id: source VF id
5c3c48ac
JB		 3045 * @msg: pointer to the msg buffer
3046 * @msglen: msg length
3047 * @msghndl: msg handle
3048 *
3049 * called from the common aeq/arq handler to
b40c82e6 3050 * process request from VF
5c3c48ac 3051 **/
a1b5a24f 3052int i40e_vc_process_vf_msg(struct i40e_pf *pf, s16 vf_id, u32 v_opcode,
5c3c48ac
JB		 3053 u32 v_retval, u8 *msg, u16 msglen)
3054{
5c3c48ac 3055 struct i40e_hw *hw = &pf->hw;
a1b5a24f 3056 int local_vf_id = vf_id - (s16)hw->func_caps.vf_base_id;
6c1b5bff 3057 struct i40e_vf *vf;
5c3c48ac
JB		 3058 int ret;
3059
3060 pf->vf_aq_requests++;
7efa84b7 3061 if (local_vf_id >= pf->num_alloc_vfs)
6c1b5bff 3062 return -EINVAL;
7efa84b7 3063 vf = &(pf->vf[local_vf_id]);
260e9382
JB		 3064
3065 /* Check if VF is disabled. */
3066 if (test_bit(I40E_VF_STATE_DISABLED, &vf->vf_states))
3067 return I40E_ERR_PARAM;
3068
5c3c48ac 3069 /* perform basic checks on the msg */
735e35c5 3070 ret = virtchnl_vc_validate_vf_msg(&vf->vf_ver, v_opcode, msg, msglen);
5c3c48ac 3071
260e9382
JB		 3072 /* perform additional checks specific to this driver */
3073 if (v_opcode == VIRTCHNL_OP_CONFIG_RSS_KEY) {
3074 struct virtchnl_rss_key *vrk = (struct virtchnl_rss_key *)msg;
3075
3076 if (vrk->key_len != I40E_HKEY_ARRAY_SIZE)
3077 ret = -EINVAL;
3078 } else if (v_opcode == VIRTCHNL_OP_CONFIG_RSS_LUT) {
3079 struct virtchnl_rss_lut *vrl = (struct virtchnl_rss_lut *)msg;
3080
3081 if (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)
3082 ret = -EINVAL;
3083 }
3084
5c3c48ac 3085 if (ret) {
764430ce 3086 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
b40c82e6 3087 dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n",
7efa84b7 3088 local_vf_id, v_opcode, msglen);
764430ce
JB		 3089 switch (ret) {
3090 case VIRTCHNL_ERR_PARAM:
3091 return -EPERM;
3092 default:
3093 return -EINVAL;
3094 }
5c3c48ac 3095 }
bae3cae4 3096
5c3c48ac 3097 switch (v_opcode) {
310a2ad9 3098 case VIRTCHNL_OP_VERSION:
f4ca1a22 3099 ret = i40e_vc_get_version_msg(vf, msg);
5c3c48ac 3100 break;
310a2ad9 3101 case VIRTCHNL_OP_GET_VF_RESOURCES:
f4ca1a22 3102 ret = i40e_vc_get_vf_resources_msg(vf, msg);
d3d657a9 3103 i40e_vc_notify_vf_link_state(vf);
5c3c48ac 3104 break;
310a2ad9 3105 case VIRTCHNL_OP_RESET_VF:
fc18eaa0
MW		 3106 i40e_vc_reset_vf_msg(vf);
3107 ret = 0;
5c3c48ac 3108 break;
310a2ad9 3109 case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
5c3c48ac
JB		 3110 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen);
3111 break;
310a2ad9 3112 case VIRTCHNL_OP_CONFIG_VSI_QUEUES:
5c3c48ac
JB		 3113 ret = i40e_vc_config_queues_msg(vf, msg, msglen);
3114 break;
310a2ad9 3115 case VIRTCHNL_OP_CONFIG_IRQ_MAP:
5c3c48ac
JB		 3116 ret = i40e_vc_config_irq_map_msg(vf, msg, msglen);
3117 break;
310a2ad9 3118 case VIRTCHNL_OP_ENABLE_QUEUES:
5c3c48ac 3119 ret = i40e_vc_enable_queues_msg(vf, msg, msglen);
055b295d 3120 i40e_vc_notify_vf_link_state(vf);
5c3c48ac 3121 break;
310a2ad9 3122 case VIRTCHNL_OP_DISABLE_QUEUES:
5c3c48ac
JB		 3123 ret = i40e_vc_disable_queues_msg(vf, msg, msglen);
3124 break;
310a2ad9 3125 case VIRTCHNL_OP_ADD_ETH_ADDR:
5c3c48ac
JB		 3126 ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen);
3127 break;
310a2ad9 3128 case VIRTCHNL_OP_DEL_ETH_ADDR:
5c3c48ac
JB		 3129 ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen);
3130 break;
310a2ad9 3131 case VIRTCHNL_OP_ADD_VLAN:
5c3c48ac
JB		 3132 ret = i40e_vc_add_vlan_msg(vf, msg, msglen);
3133 break;
310a2ad9 3134 case VIRTCHNL_OP_DEL_VLAN:
5c3c48ac
JB		 3135 ret = i40e_vc_remove_vlan_msg(vf, msg, msglen);
3136 break;
310a2ad9 3137 case VIRTCHNL_OP_GET_STATS:
5c3c48ac
JB		 3138 ret = i40e_vc_get_stats_msg(vf, msg, msglen);
3139 break;
310a2ad9 3140 case VIRTCHNL_OP_IWARP:
e3219ce6
ASJ		 3141 ret = i40e_vc_iwarp_msg(vf, msg, msglen);
3142 break;
310a2ad9 3143 case VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
e3219ce6
ASJ		 3144 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, true);
3145 break;
310a2ad9 3146 case VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
e3219ce6
ASJ		 3147 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, false);
3148 break;
310a2ad9 3149 case VIRTCHNL_OP_CONFIG_RSS_KEY:
c4e1868c
MW		 3150 ret = i40e_vc_config_rss_key(vf, msg, msglen);
3151 break;
310a2ad9 3152 case VIRTCHNL_OP_CONFIG_RSS_LUT:
c4e1868c
MW		 3153 ret = i40e_vc_config_rss_lut(vf, msg, msglen);
3154 break;
310a2ad9 3155 case VIRTCHNL_OP_GET_RSS_HENA_CAPS:
c4e1868c
MW		 3156 ret = i40e_vc_get_rss_hena(vf, msg, msglen);
3157 break;
310a2ad9 3158 case VIRTCHNL_OP_SET_RSS_HENA:
c4e1868c
MW		 3159 ret = i40e_vc_set_rss_hena(vf, msg, msglen);
3160 break;
8774370d
MS		 3161 case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING:
3162 ret = i40e_vc_enable_vlan_stripping(vf, msg, msglen);
3163 break;
3164 case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING:
3165 ret = i40e_vc_disable_vlan_stripping(vf, msg, msglen);
3166 break;
a3f5aa90
AB		 3167 case VIRTCHNL_OP_REQUEST_QUEUES:
3168 ret = i40e_vc_request_queues_msg(vf, msg, msglen);
3169 break;
c27eac48
AD		 3170 case VIRTCHNL_OP_ENABLE_CHANNELS:
3171 ret = i40e_vc_add_qch_msg(vf, msg);
3172 break;
c4998aa3
AD		 3173 case VIRTCHNL_OP_DISABLE_CHANNELS:
3174 ret = i40e_vc_del_qch_msg(vf, msg);
3175 break;
310a2ad9 3176 case VIRTCHNL_OP_UNKNOWN:
5c3c48ac 3177 default:
b40c82e6 3178 dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n",
7efa84b7 3179 v_opcode, local_vf_id);
5c3c48ac
JB		 3180 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
3181 I40E_ERR_NOT_IMPLEMENTED);
3182 break;
3183 }
3184
3185 return ret;
3186}
3187
3188/**
3189 * i40e_vc_process_vflr_event
b40c82e6 3190 * @pf: pointer to the PF structure
5c3c48ac
JB		 3191 *
3192 * called from the vlfr irq handler to
b40c82e6 3193 * free up VF resources and state variables
5c3c48ac
JB		 3194 **/
3195int i40e_vc_process_vflr_event(struct i40e_pf *pf)
3196{
5c3c48ac 3197 struct i40e_hw *hw = &pf->hw;
a1b5a24f 3198 u32 reg, reg_idx, bit_idx;
5c3c48ac 3199 struct i40e_vf *vf;
a1b5a24f 3200 int vf_id;
5c3c48ac 3201
0da36b97 3202 if (!test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
5c3c48ac
JB		 3203 return 0;
3204
0d790327
MW		 3205 /* Re-enable the VFLR interrupt cause here, before looking for which
3206 * VF got reset. Otherwise, if another VF gets a reset while the
3207 * first one is being processed, that interrupt will be lost, and
3208 * that VF will be stuck in reset forever.
3209 */
c5c2f7c3
MW		 3210 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
3211 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
3212 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
3213 i40e_flush(hw);
3214
0da36b97 3215 clear_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
5c3c48ac
JB		 3216 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
3217 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
3218 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
b40c82e6 3219 /* read GLGEN_VFLRSTAT register to find out the flr VFs */
5c3c48ac
JB		 3220 vf = &pf->vf[vf_id];
3221 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
7369ca87 3222 if (reg & BIT(bit_idx))
7e5a313e 3223 /* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */
7369ca87 3224 i40e_reset_vf(vf, true);
5c3c48ac
JB		 3225 }
3226
5c3c48ac
JB		 3227 return 0;
3228}
3229
5c3c48ac
JB		 3230/**
3231 * i40e_ndo_set_vf_mac
3232 * @netdev: network interface device structure
b40c82e6 3233 * @vf_id: VF identifier
5c3c48ac
JB		 3234 * @mac: mac address
3235 *
b40c82e6 3236 * program VF mac address
5c3c48ac
JB		 3237 **/
3238int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
3239{
3240 struct i40e_netdev_priv *np = netdev_priv(netdev);
3241 struct i40e_vsi *vsi = np->vsi;
3242 struct i40e_pf *pf = vsi->back;
3243 struct i40e_mac_filter *f;
3244 struct i40e_vf *vf;
3245 int ret = 0;
784548c4 3246 struct hlist_node *h;
278e7d0b 3247 int bkt;
5c3c48ac
JB		 3248
3249 /* validate the request */
3250 if (vf_id >= pf->num_alloc_vfs) {
3251 dev_err(&pf->pdev->dev,
3252 "Invalid VF Identifier %d\n", vf_id);
3253 ret = -EINVAL;
3254 goto error_param;
3255 }
3256
3257 vf = &(pf->vf[vf_id]);
fdf0e0bf 3258 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 3259 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3260 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3261 vf_id);
3262 ret = -EAGAIN;
5c3c48ac
JB		 3263 goto error_param;
3264 }
3265
efd8e39a 3266 if (is_multicast_ether_addr(mac)) {
5c3c48ac 3267 dev_err(&pf->pdev->dev,
efd8e39a 3268 "Invalid Ethernet address %pM for VF %d\n", mac, vf_id);
5c3c48ac
JB		 3269 ret = -EINVAL;
3270 goto error_param;
3271 }
3272
21659035 3273 /* Lock once because below invoked function add/del_filter requires
278e7d0b 3274 * mac_filter_hash_lock to be held
21659035 3275 */
278e7d0b 3276 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 3277
5c3c48ac 3278 /* delete the temporary mac address */
efd8e39a 3279 if (!is_zero_ether_addr(vf->default_lan_addr.addr))
9569a9a4 3280 i40e_del_mac_filter(vsi, vf->default_lan_addr.addr);
5c3c48ac 3281
29f71bb0
GR		 3282 /* Delete all the filters for this VSI - we're going to kill it
3283 * anyway.
3284 */
784548c4 3285 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
148141bb 3286 __i40e_del_filter(vsi, f);
5c3c48ac 3287
278e7d0b 3288 spin_unlock_bh(&vsi->mac_filter_hash_lock);
21659035 3289
5c3c48ac 3290 /* program mac filter */
17652c63 3291 if (i40e_sync_vsi_filters(vsi)) {
5c3c48ac
JB		 3292 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
3293 ret = -EIO;
3294 goto error_param;
3295 }
9a173901 3296 ether_addr_copy(vf->default_lan_addr.addr, mac);
2f1d86e4
SA		 3297
3298 if (is_zero_ether_addr(mac)) {
3299 vf->pf_set_mac = false;
3300 dev_info(&pf->pdev->dev, "Removing MAC on VF %d\n", vf_id);
3301 } else {
3302 vf->pf_set_mac = true;
3303 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n",
3304 mac, vf_id);
3305 }
3306
17413a80 3307 /* Force the VF driver stop so it has to reload with new MAC address */
eeeddbb8 3308 i40e_vc_disable_vf(vf);
5c3c48ac 3309 dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n");
5c3c48ac
JB		 3310
3311error_param:
3312 return ret;
3313}
3314
ba4e003d
JK		 3315/**
3316 * i40e_vsi_has_vlans - True if VSI has configured VLANs
3317 * @vsi: pointer to the vsi
3318 *
3319 * Check if a VSI has configured any VLANs. False if we have a port VLAN or if
3320 * we have no configured VLANs. Do not call while holding the
3321 * mac_filter_hash_lock.
3322 */
3323static bool i40e_vsi_has_vlans(struct i40e_vsi *vsi)
3324{
3325 bool have_vlans;
3326
3327 /* If we have a port VLAN, then the VSI cannot have any VLANs
3328 * configured, as all MAC/VLAN filters will be assigned to the PVID.
3329 */
3330 if (vsi->info.pvid)
3331 return false;
3332
3333 /* Since we don't have a PVID, we know that if the device is in VLAN
3334 * mode it must be because of a VLAN filter configured on this VSI.
3335 */
3336 spin_lock_bh(&vsi->mac_filter_hash_lock);
3337 have_vlans = i40e_is_vsi_in_vlan(vsi);
3338 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3339
3340 return have_vlans;
3341}
3342
5c3c48ac
JB		 3343/**
3344 * i40e_ndo_set_vf_port_vlan
3345 * @netdev: network interface device structure
b40c82e6 3346 * @vf_id: VF identifier
5c3c48ac
JB		 3347 * @vlan_id: mac address
3348 * @qos: priority setting
79aab093 3349 * @vlan_proto: vlan protocol
5c3c48ac 3350 *
b40c82e6 3351 * program VF vlan id and/or qos
5c3c48ac 3352 **/
79aab093
MS		 3353int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, int vf_id,
3354 u16 vlan_id, u8 qos, __be16 vlan_proto)
5c3c48ac 3355{
f7fc2f2e 3356 u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT);
5c3c48ac
JB		 3357 struct i40e_netdev_priv *np = netdev_priv(netdev);
3358 struct i40e_pf *pf = np->vsi->back;
3359 struct i40e_vsi *vsi;
3360 struct i40e_vf *vf;
3361 int ret = 0;
3362
3363 /* validate the request */
3364 if (vf_id >= pf->num_alloc_vfs) {
3365 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3366 ret = -EINVAL;
3367 goto error_pvid;
3368 }
3369
3370 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
3371 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
3372 ret = -EINVAL;
3373 goto error_pvid;
3374 }
3375
79aab093
MS		 3376 if (vlan_proto != htons(ETH_P_8021Q)) {
3377 dev_err(&pf->pdev->dev, "VF VLAN protocol is not supported\n");
3378 ret = -EPROTONOSUPPORT;
3379 goto error_pvid;
3380 }
3381
5c3c48ac 3382 vf = &(pf->vf[vf_id]);
fdf0e0bf 3383 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 3384 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3385 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3386 vf_id);
3387 ret = -EAGAIN;
5c3c48ac
JB		 3388 goto error_pvid;
3389 }
3390
f7fc2f2e 3391 if (le16_to_cpu(vsi->info.pvid) == vlanprio)
85927ec1
MW		 3392 /* duplicate request, so just return success */
3393 goto error_pvid;
3394
ba4e003d 3395 if (i40e_vsi_has_vlans(vsi)) {
99a4973c
GR		 3396 dev_err(&pf->pdev->dev,
3397 "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
3398 vf_id);
f9b4b627
GR		 3399 /* Administrator Error - knock the VF offline until he does
3400 * the right thing by reconfiguring his network correctly
3401 * and then reloading the VF driver.
3402 */
eeeddbb8 3403 i40e_vc_disable_vf(vf);
35f3472a
MW		 3404 /* During reset the VF got a new VSI, so refresh the pointer. */
3405 vsi = pf->vsi[vf->lan_vsi_idx];
f9b4b627 3406 }
99a4973c 3407
ba4e003d
JK		 3408 /* Locked once because multiple functions below iterate list */
3409 spin_lock_bh(&vsi->mac_filter_hash_lock);
3410
8d82a7c5
GR		 3411 /* Check for condition where there was already a port VLAN ID
3412 * filter set and now it is being deleted by setting it to zero.
1315f7c3
GR		 3413 * Additionally check for the condition where there was a port
3414 * VLAN but now there is a new and different port VLAN being set.
8d82a7c5
GR		 3415 * Before deleting all the old VLAN filters we must add new ones
3416 * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our
3417 * MAC addresses deleted.
3418 */
1315f7c3 3419 if ((!(vlan_id || qos) ||
f7fc2f2e 3420 vlanprio != le16_to_cpu(vsi->info.pvid)) &&
9af52f60
JK		 3421 vsi->info.pvid) {
3422 ret = i40e_add_vlan_all_mac(vsi, I40E_VLAN_ANY);
3423 if (ret) {
3424 dev_info(&vsi->back->pdev->dev,
3425 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
3426 vsi->back->hw.aq.asq_last_status);
3427 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3428 goto error_pvid;
3429 }
3430 }
8d82a7c5 3431
5c3c48ac 3432 if (vsi->info.pvid) {
9af52f60
JK		 3433 /* remove all filters on the old VLAN */
3434 i40e_rm_vlan_all_mac(vsi, (le16_to_cpu(vsi->info.pvid) &
3435 VLAN_VID_MASK));
5c3c48ac 3436 }
9af52f60 3437
640f93cc 3438 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac 3439 if (vlan_id || qos)
f7fc2f2e 3440 ret = i40e_vsi_add_pvid(vsi, vlanprio);
5c3c48ac 3441 else
6c12fcbf 3442 i40e_vsi_remove_pvid(vsi);
640f93cc 3443 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 3444
3445 if (vlan_id) {
3446 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
3447 vlan_id, qos, vf_id);
3448
9af52f60
JK		 3449 /* add new VLAN filter for each MAC */
3450 ret = i40e_add_vlan_all_mac(vsi, vlan_id);
5c3c48ac
JB		 3451 if (ret) {
3452 dev_info(&vsi->back->pdev->dev,
3453 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
3454 vsi->back->hw.aq.asq_last_status);
9af52f60 3455 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 3456 goto error_pvid;
3457 }
9af52f60
JK		 3458
3459 /* remove the previously added non-VLAN MAC filters */
3460 i40e_rm_vlan_all_mac(vsi, I40E_VLAN_ANY);
5c3c48ac
JB		 3461 }
3462
9af52f60
JK		 3463 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3464
3465 /* Schedule the worker thread to take care of applying changes */
3466 i40e_service_event_schedule(vsi->back);
3467
5c3c48ac
JB		 3468 if (ret) {
3469 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
3470 goto error_pvid;
3471 }
9af52f60 3472
6c12fcbf
GR		 3473 /* The Port VLAN needs to be saved across resets the same as the
3474 * default LAN MAC address.
3475 */
3476 vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
5c3c48ac
JB		 3477 ret = 0;
3478
3479error_pvid:
3480 return ret;
3481}
3482
3483/**
3484 * i40e_ndo_set_vf_bw
3485 * @netdev: network interface device structure
b40c82e6
JK		 3486 * @vf_id: VF identifier
3487 * @tx_rate: Tx rate
5c3c48ac 3488 *
b40c82e6 3489 * configure VF Tx rate
5c3c48ac 3490 **/
ed616689
SC		 3491int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
3492 int max_tx_rate)
5c3c48ac 3493{
6b192891
MW		 3494 struct i40e_netdev_priv *np = netdev_priv(netdev);
3495 struct i40e_pf *pf = np->vsi->back;
3496 struct i40e_vsi *vsi;
3497 struct i40e_vf *vf;
6b192891
MW		 3498 int ret = 0;
3499
3500 /* validate the request */
3501 if (vf_id >= pf->num_alloc_vfs) {
3502 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d.\n", vf_id);
3503 ret = -EINVAL;
3504 goto error;
3505 }
3506
ed616689 3507 if (min_tx_rate) {
b40c82e6 3508 dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n",
ed616689
SC		 3509 min_tx_rate, vf_id);
3510 return -EINVAL;
3511 }
3512
6b192891 3513 vf = &(pf->vf[vf_id]);
fdf0e0bf 3514 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 3515 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3516 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3517 vf_id);
3518 ret = -EAGAIN;
6b192891
MW		 3519 goto error;
3520 }
3521
5ecae412
AN		 3522 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
3523 if (ret)
6b192891 3524 goto error;
dac9b31a 3525
ed616689 3526 vf->tx_rate = max_tx_rate;
6b192891
MW		 3527error:
3528 return ret;
5c3c48ac
JB		 3529}
3530
3531/**
3532 * i40e_ndo_get_vf_config
3533 * @netdev: network interface device structure
b40c82e6
JK		 3534 * @vf_id: VF identifier
3535 * @ivi: VF configuration structure
5c3c48ac 3536 *
b40c82e6 3537 * return VF configuration
5c3c48ac
JB		 3538 **/
3539int i40e_ndo_get_vf_config(struct net_device *netdev,
3540 int vf_id, struct ifla_vf_info *ivi)
3541{
3542 struct i40e_netdev_priv *np = netdev_priv(netdev);
5c3c48ac
JB		 3543 struct i40e_vsi *vsi = np->vsi;
3544 struct i40e_pf *pf = vsi->back;
3545 struct i40e_vf *vf;
3546 int ret = 0;
3547
3548 /* validate the request */
3549 if (vf_id >= pf->num_alloc_vfs) {
3550 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3551 ret = -EINVAL;
3552 goto error_param;
3553 }
3554
3555 vf = &(pf->vf[vf_id]);
3556 /* first vsi is always the LAN vsi */
fdf0e0bf 3557 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 3558 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3559 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3560 vf_id);
3561 ret = -EAGAIN;
5c3c48ac
JB		 3562 goto error_param;
3563 }
3564
3565 ivi->vf = vf_id;
3566
6995b36c 3567 ether_addr_copy(ivi->mac, vf->default_lan_addr.addr);
5c3c48ac 3568
ed616689
SC		 3569 ivi->max_tx_rate = vf->tx_rate;
3570 ivi->min_tx_rate = 0;
5c3c48ac
JB		 3571 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
3572 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
3573 I40E_VLAN_PRIORITY_SHIFT;
84ca55a0
MW		 3574 if (vf->link_forced == false)
3575 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
3576 else if (vf->link_up == true)
3577 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
3578 else
3579 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
c674d125 3580 ivi->spoofchk = vf->spoofchk;
d40062f3 3581 ivi->trusted = vf->trusted;
5c3c48ac
JB		 3582 ret = 0;
3583
3584error_param:
3585 return ret;
3586}
588aefa0
MW		 3587
3588/**
3589 * i40e_ndo_set_vf_link_state
3590 * @netdev: network interface device structure
b40c82e6 3591 * @vf_id: VF identifier
588aefa0
MW		 3592 * @link: required link state
3593 *
3594 * Set the link state of a specified VF, regardless of physical link state
3595 **/
3596int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
3597{
3598 struct i40e_netdev_priv *np = netdev_priv(netdev);
3599 struct i40e_pf *pf = np->vsi->back;
310a2ad9 3600 struct virtchnl_pf_event pfe;
588aefa0
MW		 3601 struct i40e_hw *hw = &pf->hw;
3602 struct i40e_vf *vf;
f19efbb5 3603 int abs_vf_id;
588aefa0
MW		 3604 int ret = 0;
3605
3606 /* validate the request */
3607 if (vf_id >= pf->num_alloc_vfs) {
3608 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3609 ret = -EINVAL;
3610 goto error_out;
3611 }
3612
3613 vf = &pf->vf[vf_id];
f19efbb5 3614 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
588aefa0 3615
310a2ad9 3616 pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
ff3f4cc2 3617 pfe.severity = PF_EVENT_SEVERITY_INFO;
588aefa0
MW		 3618
3619 switch (link) {
3620 case IFLA_VF_LINK_STATE_AUTO:
3621 vf->link_forced = false;
3622 pfe.event_data.link_event.link_status =
3623 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
3624 pfe.event_data.link_event.link_speed =
ff3f4cc2 3625 (enum virtchnl_link_speed)
588aefa0
MW		 3626 pf->hw.phy.link_info.link_speed;
3627 break;
3628 case IFLA_VF_LINK_STATE_ENABLE:
3629 vf->link_forced = true;
3630 vf->link_up = true;
3631 pfe.event_data.link_event.link_status = true;
3632 pfe.event_data.link_event.link_speed = I40E_LINK_SPEED_40GB;
3633 break;
3634 case IFLA_VF_LINK_STATE_DISABLE:
3635 vf->link_forced = true;
3636 vf->link_up = false;
3637 pfe.event_data.link_event.link_status = false;
3638 pfe.event_data.link_event.link_speed = 0;
3639 break;
3640 default:
3641 ret = -EINVAL;
3642 goto error_out;
3643 }
3644 /* Notify the VF of its new link state */
310a2ad9 3645 i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
588aefa0
MW		 3646 0, (u8 *)&pfe, sizeof(pfe), NULL);
3647
3648error_out:
3649 return ret;
3650}
c674d125
MW		 3651
3652/**
3653 * i40e_ndo_set_vf_spoofchk
3654 * @netdev: network interface device structure
b40c82e6 3655 * @vf_id: VF identifier
c674d125
MW		 3656 * @enable: flag to enable or disable feature
3657 *
3658 * Enable or disable VF spoof checking
3659 **/
e6d9004d 3660int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable)
c674d125
MW		 3661{
3662 struct i40e_netdev_priv *np = netdev_priv(netdev);
3663 struct i40e_vsi *vsi = np->vsi;
3664 struct i40e_pf *pf = vsi->back;
3665 struct i40e_vsi_context ctxt;
3666 struct i40e_hw *hw = &pf->hw;
3667 struct i40e_vf *vf;
3668 int ret = 0;
3669
3670 /* validate the request */
3671 if (vf_id >= pf->num_alloc_vfs) {
3672 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3673 ret = -EINVAL;
3674 goto out;
3675 }
3676
3677 vf = &(pf->vf[vf_id]);
6322e63c 3678 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3679 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3680 vf_id);
3681 ret = -EAGAIN;
3682 goto out;
3683 }
c674d125
MW		 3684
3685 if (enable == vf->spoofchk)
3686 goto out;
3687
3688 vf->spoofchk = enable;
3689 memset(&ctxt, 0, sizeof(ctxt));
fdf0e0bf 3690 ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid;
c674d125
MW		 3691 ctxt.pf_num = pf->hw.pf_id;
3692 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
3693 if (enable)
30d71af5
GR		 3694 ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
3695 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
c674d125
MW		 3696 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
3697 if (ret) {
3698 dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
3699 ret);
3700 ret = -EIO;
3701 }
3702out:
3703 return ret;
3704}
c3bbbd20
ASJ		 3705
3706/**
3707 * i40e_ndo_set_vf_trust
3708 * @netdev: network interface device structure of the pf
3709 * @vf_id: VF identifier
3710 * @setting: trust setting
3711 *
3712 * Enable or disable VF trust setting
3713 **/
3714int i40e_ndo_set_vf_trust(struct net_device *netdev, int vf_id, bool setting)
3715{
3716 struct i40e_netdev_priv *np = netdev_priv(netdev);
3717 struct i40e_pf *pf = np->vsi->back;
3718 struct i40e_vf *vf;
3719 int ret = 0;
3720
3721 /* validate the request */
3722 if (vf_id >= pf->num_alloc_vfs) {
3723 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3724 return -EINVAL;
3725 }
3726
3727 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3728 dev_err(&pf->pdev->dev, "Trusted VF not supported in MFP mode.\n");
3729 return -EINVAL;
3730 }
3731
3732 vf = &pf->vf[vf_id];
3733
c3bbbd20
ASJ		 3734 if (setting == vf->trusted)
3735 goto out;
3736
3737 vf->trusted = setting;
f18d2021 3738 i40e_vc_disable_vf(vf);
c3bbbd20
ASJ		 3739 dev_info(&pf->pdev->dev, "VF %u is now %strusted\n",
3740 vf_id, setting ? "" : "un");
3741out:
3742 return ret;
3743}
Linux 6.x block layer and io_uring tree(s)