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i40e/i40evf: fix incorrect default ITR values on driver load
[linux-2.6-block.git] / drivers / net / ethernet / intel / i40e / i40e_virtchnl_pf.c
CommitLineData
5c3c48ac
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
40d72a50 4 * Copyright(c) 2013 - 2016 Intel Corporation.
5c3c48ac
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
5c3c48ac
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#include "i40e.h"
28
532b0455
MW		 29/*********************notification routines***********************/
30
31/**
32 * i40e_vc_vf_broadcast
33 * @pf: pointer to the PF structure
34 * @opcode: operation code
35 * @retval: return value
36 * @msg: pointer to the msg buffer
37 * @msglen: msg length
38 *
39 * send a message to all VFs on a given PF
40 **/
41static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
310a2ad9 42 enum virtchnl_ops v_opcode,
532b0455
MW		 43 i40e_status v_retval, u8 *msg,
44 u16 msglen)
45{
46 struct i40e_hw *hw = &pf->hw;
47 struct i40e_vf *vf = pf->vf;
48 int i;
49
50 for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
a1b5a24f 51 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455 52 /* Not all vfs are enabled so skip the ones that are not */
6322e63c
JK		 53 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
54 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 55 continue;
56
57 /* Ignore return value on purpose - a given VF may fail, but
58 * we need to keep going and send to all of them
59 */
60 i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
61 msg, msglen, NULL);
62 }
63}
64
65/**
55f7d723 66 * i40e_vc_notify_vf_link_state
532b0455
MW		 67 * @vf: pointer to the VF structure
68 *
69 * send a link status message to a single VF
70 **/
71static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf)
72{
310a2ad9 73 struct virtchnl_pf_event pfe;
532b0455
MW		 74 struct i40e_pf *pf = vf->pf;
75 struct i40e_hw *hw = &pf->hw;
76 struct i40e_link_status *ls = &pf->hw.phy.link_info;
a1b5a24f 77 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455 78
310a2ad9 79 pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
ff3f4cc2 80 pfe.severity = PF_EVENT_SEVERITY_INFO;
532b0455
MW		 81 if (vf->link_forced) {
82 pfe.event_data.link_event.link_status = vf->link_up;
83 pfe.event_data.link_event.link_speed =
84 (vf->link_up ? I40E_LINK_SPEED_40GB : 0);
85 } else {
86 pfe.event_data.link_event.link_status =
87 ls->link_info & I40E_AQ_LINK_UP;
ff3f4cc2
JB		 88 pfe.event_data.link_event.link_speed =
89 (enum virtchnl_link_speed)ls->link_speed;
532b0455 90 }
310a2ad9 91 i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
532b0455
MW		 92 0, (u8 *)&pfe, sizeof(pfe), NULL);
93}
94
95/**
96 * i40e_vc_notify_link_state
97 * @pf: pointer to the PF structure
98 *
99 * send a link status message to all VFs on a given PF
100 **/
101void i40e_vc_notify_link_state(struct i40e_pf *pf)
102{
103 int i;
104
105 for (i = 0; i < pf->num_alloc_vfs; i++)
106 i40e_vc_notify_vf_link_state(&pf->vf[i]);
107}
108
109/**
110 * i40e_vc_notify_reset
111 * @pf: pointer to the PF structure
112 *
113 * indicate a pending reset to all VFs on a given PF
114 **/
115void i40e_vc_notify_reset(struct i40e_pf *pf)
116{
310a2ad9 117 struct virtchnl_pf_event pfe;
532b0455 118
310a2ad9 119 pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
ff3f4cc2 120 pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
310a2ad9
JB		 121 i40e_vc_vf_broadcast(pf, VIRTCHNL_OP_EVENT, 0,
122 (u8 *)&pfe, sizeof(struct virtchnl_pf_event));
532b0455
MW		 123}
124
125/**
126 * i40e_vc_notify_vf_reset
127 * @vf: pointer to the VF structure
128 *
129 * indicate a pending reset to the given VF
130 **/
131void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
132{
310a2ad9 133 struct virtchnl_pf_event pfe;
532b0455
MW		 134 int abs_vf_id;
135
136 /* validate the request */
137 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
138 return;
139
140 /* verify if the VF is in either init or active before proceeding */
6322e63c
JK		 141 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
142 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 143 return;
144
a1b5a24f 145 abs_vf_id = vf->vf_id + (int)vf->pf->hw.func_caps.vf_base_id;
532b0455 146
310a2ad9 147 pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
ff3f4cc2 148 pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
310a2ad9 149 i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, VIRTCHNL_OP_EVENT,
532b0455 150 0, (u8 *)&pfe,
310a2ad9 151 sizeof(struct virtchnl_pf_event), NULL);
532b0455 152}
5c3c48ac
JB		 153/***********************misc routines*****************************/
154
f9b4b627
GR		 155/**
156 * i40e_vc_disable_vf
b40c82e6 157 * @vf: pointer to the VF info
f9b4b627 158 *
d43d60e5 159 * Disable the VF through a SW reset.
f9b4b627 160 **/
eeeddbb8 161static inline void i40e_vc_disable_vf(struct i40e_vf *vf)
f9b4b627 162{
d43d60e5
JK		 163 int i;
164
54f455ee 165 i40e_vc_notify_vf_reset(vf);
d43d60e5
JK		 166
167 /* We want to ensure that an actual reset occurs initiated after this
168 * function was called. However, we do not want to wait forever, so
169 * we'll give a reasonable time and print a message if we failed to
170 * ensure a reset.
171 */
172 for (i = 0; i < 20; i++) {
173 if (i40e_reset_vf(vf, false))
174 return;
175 usleep_range(10000, 20000);
176 }
177
178 dev_warn(&vf->pf->pdev->dev,
179 "Failed to initiate reset for VF %d after 200 milliseconds\n",
180 vf->vf_id);
f9b4b627
GR		 181}
182
5c3c48ac
JB		 183/**
184 * i40e_vc_isvalid_vsi_id
b40c82e6
JK		 185 * @vf: pointer to the VF info
186 * @vsi_id: VF relative VSI id
5c3c48ac 187 *
b40c82e6 188 * check for the valid VSI id
5c3c48ac 189 **/
fdf0e0bf 190static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id)
5c3c48ac
JB		 191{
192 struct i40e_pf *pf = vf->pf;
fdf0e0bf 193 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 194
fdf0e0bf 195 return (vsi && (vsi->vf_id == vf->vf_id));
5c3c48ac
JB		 196}
197
198/**
199 * i40e_vc_isvalid_queue_id
b40c82e6 200 * @vf: pointer to the VF info
5c3c48ac
JB		 201 * @vsi_id: vsi id
202 * @qid: vsi relative queue id
203 *
204 * check for the valid queue id
205 **/
fdf0e0bf 206static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 207 u8 qid)
208{
209 struct i40e_pf *pf = vf->pf;
fdf0e0bf 210 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 211
fdf0e0bf 212 return (vsi && (qid < vsi->alloc_queue_pairs));
5c3c48ac
JB		 213}
214
215/**
216 * i40e_vc_isvalid_vector_id
b40c82e6
JK		 217 * @vf: pointer to the VF info
218 * @vector_id: VF relative vector id
5c3c48ac
JB		 219 *
220 * check for the valid vector id
221 **/
222static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
223{
224 struct i40e_pf *pf = vf->pf;
225
9347eb77 226 return vector_id < pf->hw.func_caps.num_msix_vectors_vf;
5c3c48ac
JB		 227}
228
229/***********************vf resource mgmt routines*****************/
230
231/**
232 * i40e_vc_get_pf_queue_id
b40c82e6 233 * @vf: pointer to the VF info
fdf0e0bf 234 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 235 * @vsi_queue_id: vsi relative queue id
236 *
b40c82e6 237 * return PF relative queue id
5c3c48ac 238 **/
fdf0e0bf 239static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 240 u8 vsi_queue_id)
241{
242 struct i40e_pf *pf = vf->pf;
fdf0e0bf 243 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac
JB		 244 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
245
fdf0e0bf
ASJ		 246 if (!vsi)
247 return pf_queue_id;
248
5c3c48ac
JB		 249 if (le16_to_cpu(vsi->info.mapping_flags) &
250 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
251 pf_queue_id =
252 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
253 else
254 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
255 vsi_queue_id;
256
257 return pf_queue_id;
258}
259
5c3c48ac
JB		 260/**
261 * i40e_config_irq_link_list
b40c82e6 262 * @vf: pointer to the VF info
fdf0e0bf 263 * @vsi_id: id of VSI as given by the FW
5c3c48ac
JB		 264 * @vecmap: irq map info
265 *
266 * configure irq link list from the map
267 **/
fdf0e0bf 268static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
310a2ad9 269 struct virtchnl_vector_map *vecmap)
5c3c48ac
JB		 270{
271 unsigned long linklistmap = 0, tempmap;
272 struct i40e_pf *pf = vf->pf;
273 struct i40e_hw *hw = &pf->hw;
274 u16 vsi_queue_id, pf_queue_id;
275 enum i40e_queue_type qtype;
276 u16 next_q, vector_id;
277 u32 reg, reg_idx;
278 u16 itr_idx = 0;
279
280 vector_id = vecmap->vector_id;
281 /* setup the head */
282 if (0 == vector_id)
283 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
284 else
285 reg_idx = I40E_VPINT_LNKLSTN(
9347eb77
MW		 286 ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) +
287 (vector_id - 1));
5c3c48ac
JB		 288
289 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
290 /* Special case - No queues mapped on this vector */
291 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
292 goto irq_list_done;
293 }
294 tempmap = vecmap->rxq_map;
4836650b 295 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 296 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
297 vsi_queue_id));
5c3c48ac
JB		 298 }
299
300 tempmap = vecmap->txq_map;
4836650b 301 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 302 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
303 vsi_queue_id + 1));
5c3c48ac
JB		 304 }
305
306 next_q = find_first_bit(&linklistmap,
307 (I40E_MAX_VSI_QP *
308 I40E_VIRTCHNL_SUPPORTED_QTYPES));
b82bc49e
MW		 309 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
310 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
fdf0e0bf 311 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 312 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
313
314 wr32(hw, reg_idx, reg);
315
316 while (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
317 switch (qtype) {
318 case I40E_QUEUE_TYPE_RX:
319 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
320 itr_idx = vecmap->rxitr_idx;
321 break;
322 case I40E_QUEUE_TYPE_TX:
323 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
324 itr_idx = vecmap->txitr_idx;
325 break;
326 default:
327 break;
328 }
329
330 next_q = find_next_bit(&linklistmap,
331 (I40E_MAX_VSI_QP *
332 I40E_VIRTCHNL_SUPPORTED_QTYPES),
333 next_q + 1);
829af3ac
MW		 334 if (next_q <
335 (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
5c3c48ac
JB		 336 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
337 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
fdf0e0bf 338 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id,
5c3c48ac
JB		 339 vsi_queue_id);
340 } else {
341 pf_queue_id = I40E_QUEUE_END_OF_LIST;
342 qtype = 0;
343 }
344
345 /* format for the RQCTL & TQCTL regs is same */
346 reg = (vector_id) |
347 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
348 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
41a1d04b 349 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
5c3c48ac
JB		 350 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
351 wr32(hw, reg_idx, reg);
352 }
353
b8262a6d
ASJ		 354 /* if the vf is running in polling mode and using interrupt zero,
355 * need to disable auto-mask on enabling zero interrupt for VFs.
356 */
310a2ad9 357 if ((vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
b8262a6d
ASJ		 358 (vector_id == 0)) {
359 reg = rd32(hw, I40E_GLINT_CTL);
360 if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
361 reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
362 wr32(hw, I40E_GLINT_CTL, reg);
363 }
364 }
365
5c3c48ac
JB		 366irq_list_done:
367 i40e_flush(hw);
368}
369
e3219ce6
ASJ		 370/**
371 * i40e_release_iwarp_qvlist
372 * @vf: pointer to the VF.
373 *
374 **/
375static void i40e_release_iwarp_qvlist(struct i40e_vf *vf)
376{
377 struct i40e_pf *pf = vf->pf;
310a2ad9 378 struct virtchnl_iwarp_qvlist_info *qvlist_info = vf->qvlist_info;
e3219ce6
ASJ		 379 u32 msix_vf;
380 u32 i;
381
382 if (!vf->qvlist_info)
383 return;
384
385 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
386 for (i = 0; i < qvlist_info->num_vectors; i++) {
310a2ad9 387 struct virtchnl_iwarp_qv_info *qv_info;
e3219ce6
ASJ		 388 u32 next_q_index, next_q_type;
389 struct i40e_hw *hw = &pf->hw;
390 u32 v_idx, reg_idx, reg;
391
392 qv_info = &qvlist_info->qv_info[i];
393 if (!qv_info)
394 continue;
395 v_idx = qv_info->v_idx;
396 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
397 /* Figure out the queue after CEQ and make that the
398 * first queue.
399 */
400 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
401 reg = rd32(hw, I40E_VPINT_CEQCTL(reg_idx));
402 next_q_index = (reg & I40E_VPINT_CEQCTL_NEXTQ_INDX_MASK)
403 >> I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT;
404 next_q_type = (reg & I40E_VPINT_CEQCTL_NEXTQ_TYPE_MASK)
405 >> I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT;
406
407 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
408 reg = (next_q_index &
409 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
410 (next_q_type <<
411 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
412
413 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
414 }
415 }
416 kfree(vf->qvlist_info);
417 vf->qvlist_info = NULL;
418}
419
420/**
421 * i40e_config_iwarp_qvlist
422 * @vf: pointer to the VF info
423 * @qvlist_info: queue and vector list
424 *
425 * Return 0 on success or < 0 on error
426 **/
427static int i40e_config_iwarp_qvlist(struct i40e_vf *vf,
310a2ad9 428 struct virtchnl_iwarp_qvlist_info *qvlist_info)
e3219ce6
ASJ		 429{
430 struct i40e_pf *pf = vf->pf;
431 struct i40e_hw *hw = &pf->hw;
310a2ad9 432 struct virtchnl_iwarp_qv_info *qv_info;
e3219ce6
ASJ		 433 u32 v_idx, i, reg_idx, reg;
434 u32 next_q_idx, next_q_type;
435 u32 msix_vf, size;
436
310a2ad9
JB		 437 size = sizeof(struct virtchnl_iwarp_qvlist_info) +
438 (sizeof(struct virtchnl_iwarp_qv_info) *
e3219ce6
ASJ		 439 (qvlist_info->num_vectors - 1));
440 vf->qvlist_info = kzalloc(size, GFP_KERNEL);
54902349
CJ		 441 if (!vf->qvlist_info)
442 return -ENOMEM;
443
e3219ce6
ASJ		 444 vf->qvlist_info->num_vectors = qvlist_info->num_vectors;
445
446 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
447 for (i = 0; i < qvlist_info->num_vectors; i++) {
448 qv_info = &qvlist_info->qv_info[i];
449 if (!qv_info)
450 continue;
451 v_idx = qv_info->v_idx;
452
453 /* Validate vector id belongs to this vf */
454 if (!i40e_vc_isvalid_vector_id(vf, v_idx))
455 goto err;
456
457 vf->qvlist_info->qv_info[i] = *qv_info;
458
459 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
460 /* We might be sharing the interrupt, so get the first queue
461 * index and type, push it down the list by adding the new
462 * queue on top. Also link it with the new queue in CEQCTL.
463 */
464 reg = rd32(hw, I40E_VPINT_LNKLSTN(reg_idx));
465 next_q_idx = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) >>
466 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT);
467 next_q_type = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK) >>
468 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
469
470 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
471 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
472 reg = (I40E_VPINT_CEQCTL_CAUSE_ENA_MASK |
473 (v_idx << I40E_VPINT_CEQCTL_MSIX_INDX_SHIFT) |
474 (qv_info->itr_idx << I40E_VPINT_CEQCTL_ITR_INDX_SHIFT) |
475 (next_q_type << I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT) |
476 (next_q_idx << I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT));
477 wr32(hw, I40E_VPINT_CEQCTL(reg_idx), reg);
478
479 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
480 reg = (qv_info->ceq_idx &
481 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
482 (I40E_QUEUE_TYPE_PE_CEQ <<
483 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
484 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
485 }
486
487 if (qv_info->aeq_idx != I40E_QUEUE_INVALID_IDX) {
488 reg = (I40E_VPINT_AEQCTL_CAUSE_ENA_MASK |
489 (v_idx << I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT) |
490 (qv_info->itr_idx << I40E_VPINT_AEQCTL_ITR_INDX_SHIFT));
491
492 wr32(hw, I40E_VPINT_AEQCTL(vf->vf_id), reg);
493 }
494 }
495
496 return 0;
497err:
498 kfree(vf->qvlist_info);
499 vf->qvlist_info = NULL;
500 return -EINVAL;
501}
502
5c3c48ac
JB		 503/**
504 * i40e_config_vsi_tx_queue
b40c82e6 505 * @vf: pointer to the VF info
fdf0e0bf 506 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 507 * @vsi_queue_id: vsi relative queue index
508 * @info: config. info
509 *
510 * configure tx queue
511 **/
fdf0e0bf 512static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac 513 u16 vsi_queue_id,
310a2ad9 514 struct virtchnl_txq_info *info)
5c3c48ac
JB		 515{
516 struct i40e_pf *pf = vf->pf;
517 struct i40e_hw *hw = &pf->hw;
518 struct i40e_hmc_obj_txq tx_ctx;
fdf0e0bf 519 struct i40e_vsi *vsi;
5c3c48ac
JB		 520 u16 pf_queue_id;
521 u32 qtx_ctl;
522 int ret = 0;
523
d4a0658d
CW		 524 if (!i40e_vc_isvalid_vsi_id(vf, info->vsi_id)) {
525 ret = -ENOENT;
526 goto error_context;
527 }
fdf0e0bf
ASJ		 528 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
529 vsi = i40e_find_vsi_from_id(pf, vsi_id);
d4a0658d
CW		 530 if (!vsi) {
531 ret = -ENOENT;
532 goto error_context;
533 }
5c3c48ac
JB		 534
535 /* clear the context structure first */
536 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
537
538 /* only set the required fields */
539 tx_ctx.base = info->dma_ring_addr / 128;
540 tx_ctx.qlen = info->ring_len;
fdf0e0bf 541 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
5c3c48ac 542 tx_ctx.rdylist_act = 0;
5d29896a
AS		 543 tx_ctx.head_wb_ena = info->headwb_enabled;
544 tx_ctx.head_wb_addr = info->dma_headwb_addr;
5c3c48ac
JB		 545
546 /* clear the context in the HMC */
547 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
548 if (ret) {
549 dev_err(&pf->pdev->dev,
550 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
551 pf_queue_id, ret);
552 ret = -ENOENT;
553 goto error_context;
554 }
555
556 /* set the context in the HMC */
557 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
558 if (ret) {
559 dev_err(&pf->pdev->dev,
560 "Failed to set VF LAN Tx queue context %d error: %d\n",
561 pf_queue_id, ret);
562 ret = -ENOENT;
563 goto error_context;
564 }
565
566 /* associate this queue with the PCI VF function */
567 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
13fd9774 568 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
5c3c48ac
JB		 569 & I40E_QTX_CTL_PF_INDX_MASK);
570 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
571 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
572 & I40E_QTX_CTL_VFVM_INDX_MASK);
573 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
574 i40e_flush(hw);
575
576error_context:
577 return ret;
578}
579
580/**
581 * i40e_config_vsi_rx_queue
b40c82e6 582 * @vf: pointer to the VF info
fdf0e0bf 583 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 584 * @vsi_queue_id: vsi relative queue index
585 * @info: config. info
586 *
587 * configure rx queue
588 **/
fdf0e0bf 589static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac 590 u16 vsi_queue_id,
310a2ad9 591 struct virtchnl_rxq_info *info)
5c3c48ac
JB		 592{
593 struct i40e_pf *pf = vf->pf;
594 struct i40e_hw *hw = &pf->hw;
595 struct i40e_hmc_obj_rxq rx_ctx;
596 u16 pf_queue_id;
597 int ret = 0;
598
fdf0e0bf 599 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 600
601 /* clear the context structure first */
602 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
603
604 /* only set the required fields */
605 rx_ctx.base = info->dma_ring_addr / 128;
606 rx_ctx.qlen = info->ring_len;
607
608 if (info->splithdr_enabled) {
609 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
610 I40E_RX_SPLIT_IP |
611 I40E_RX_SPLIT_TCP_UDP |
612 I40E_RX_SPLIT_SCTP;
613 /* header length validation */
614 if (info->hdr_size > ((2 * 1024) - 64)) {
615 ret = -EINVAL;
616 goto error_param;
617 }
618 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
619
19b85e67 620 /* set split mode 10b */
d6b3bca1 621 rx_ctx.dtype = I40E_RX_DTYPE_HEADER_SPLIT;
5c3c48ac
JB		 622 }
623
624 /* databuffer length validation */
625 if (info->databuffer_size > ((16 * 1024) - 128)) {
626 ret = -EINVAL;
627 goto error_param;
628 }
629 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
630
631 /* max pkt. length validation */
632 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
633 ret = -EINVAL;
634 goto error_param;
635 }
636 rx_ctx.rxmax = info->max_pkt_size;
637
638 /* enable 32bytes desc always */
639 rx_ctx.dsize = 1;
640
641 /* default values */
5c3c48ac
JB		 642 rx_ctx.lrxqthresh = 2;
643 rx_ctx.crcstrip = 1;
50d41659 644 rx_ctx.prefena = 1;
c1d11cef 645 rx_ctx.l2tsel = 1;
5c3c48ac
JB		 646
647 /* clear the context in the HMC */
648 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
649 if (ret) {
650 dev_err(&pf->pdev->dev,
651 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
652 pf_queue_id, ret);
653 ret = -ENOENT;
654 goto error_param;
655 }
656
657 /* set the context in the HMC */
658 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
659 if (ret) {
660 dev_err(&pf->pdev->dev,
661 "Failed to set VF LAN Rx queue context %d error: %d\n",
662 pf_queue_id, ret);
663 ret = -ENOENT;
664 goto error_param;
665 }
666
667error_param:
668 return ret;
669}
670
671/**
672 * i40e_alloc_vsi_res
b40c82e6 673 * @vf: pointer to the VF info
5c3c48ac
JB		 674 * @type: type of VSI to allocate
675 *
b40c82e6 676 * alloc VF vsi context & resources
5c3c48ac
JB		 677 **/
678static int i40e_alloc_vsi_res(struct i40e_vf *vf, enum i40e_vsi_type type)
679{
680 struct i40e_mac_filter *f = NULL;
681 struct i40e_pf *pf = vf->pf;
5c3c48ac
JB		 682 struct i40e_vsi *vsi;
683 int ret = 0;
684
685 vsi = i40e_vsi_setup(pf, type, pf->vsi[pf->lan_vsi]->seid, vf->vf_id);
686
687 if (!vsi) {
688 dev_err(&pf->pdev->dev,
b40c82e6 689 "add vsi failed for VF %d, aq_err %d\n",
5c3c48ac
JB		 690 vf->vf_id, pf->hw.aq.asq_last_status);
691 ret = -ENOENT;
692 goto error_alloc_vsi_res;
693 }
694 if (type == I40E_VSI_SRIOV) {
bb360717 695 u64 hena = i40e_pf_get_default_rss_hena(pf);
435c084a 696 u8 broadcast[ETH_ALEN];
bb360717 697
fdf0e0bf 698 vf->lan_vsi_idx = vsi->idx;
5c3c48ac 699 vf->lan_vsi_id = vsi->id;
6c12fcbf
GR		 700 /* If the port VLAN has been configured and then the
701 * VF driver was removed then the VSI port VLAN
702 * configuration was destroyed. Check if there is
703 * a port VLAN and restore the VSI configuration if
704 * needed.
705 */
706 if (vf->port_vlan_id)
707 i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
21659035 708
278e7d0b 709 spin_lock_bh(&vsi->mac_filter_hash_lock);
b7b713a8 710 if (is_valid_ether_addr(vf->default_lan_addr.addr)) {
9569a9a4
JK		 711 f = i40e_add_mac_filter(vsi,
712 vf->default_lan_addr.addr);
b7b713a8
MW		 713 if (!f)
714 dev_info(&pf->pdev->dev,
715 "Could not add MAC filter %pM for VF %d\n",
716 vf->default_lan_addr.addr, vf->vf_id);
717 }
435c084a 718 eth_broadcast_addr(broadcast);
9569a9a4 719 f = i40e_add_mac_filter(vsi, broadcast);
435c084a
JK		 720 if (!f)
721 dev_info(&pf->pdev->dev,
722 "Could not allocate VF broadcast filter\n");
278e7d0b 723 spin_unlock_bh(&vsi->mac_filter_hash_lock);
26f77e53
LY		 724 wr32(&pf->hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)hena);
725 wr32(&pf->hw, I40E_VFQF_HENA1(1, vf->vf_id), (u32)(hena >> 32));
5c3c48ac 726 }
6dbbbfb2 727
5c3c48ac 728 /* program mac filter */
17652c63 729 ret = i40e_sync_vsi_filters(vsi);
fd1646ee 730 if (ret)
5c3c48ac 731 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
5c3c48ac 732
6b192891
MW		 733 /* Set VF bandwidth if specified */
734 if (vf->tx_rate) {
735 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
736 vf->tx_rate / 50, 0, NULL);
737 if (ret)
738 dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
739 vf->vf_id, ret);
740 }
741
5c3c48ac
JB		 742error_alloc_vsi_res:
743 return ret;
744}
745
805bd5bd
MW		 746/**
747 * i40e_enable_vf_mappings
b40c82e6 748 * @vf: pointer to the VF info
805bd5bd 749 *
b40c82e6 750 * enable VF mappings
805bd5bd
MW		 751 **/
752static void i40e_enable_vf_mappings(struct i40e_vf *vf)
753{
754 struct i40e_pf *pf = vf->pf;
755 struct i40e_hw *hw = &pf->hw;
756 u32 reg, total_queue_pairs = 0;
757 int j;
758
759 /* Tell the hardware we're using noncontiguous mapping. HW requires
760 * that VF queues be mapped using this method, even when they are
761 * contiguous in real life
762 */
272cdaf2
SN		 763 i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
764 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
805bd5bd
MW		 765
766 /* enable VF vplan_qtable mappings */
767 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
768 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
769
770 /* map PF queues to VF queues */
fdf0e0bf
ASJ		 771 for (j = 0; j < pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs; j++) {
772 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id, j);
6995b36c 773
805bd5bd
MW		 774 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
775 wr32(hw, I40E_VPLAN_QTABLE(total_queue_pairs, vf->vf_id), reg);
776 total_queue_pairs++;
777 }
778
779 /* map PF queues to VSI */
780 for (j = 0; j < 7; j++) {
fdf0e0bf 781 if (j * 2 >= pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs) {
805bd5bd
MW		 782 reg = 0x07FF07FF; /* unused */
783 } else {
fdf0e0bf 784 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
805bd5bd
MW		 785 j * 2);
786 reg = qid;
fdf0e0bf 787 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
805bd5bd
MW		 788 (j * 2) + 1);
789 reg |= qid << 16;
790 }
272cdaf2
SN		 791 i40e_write_rx_ctl(hw, I40E_VSILAN_QTABLE(j, vf->lan_vsi_id),
792 reg);
805bd5bd
MW		 793 }
794
795 i40e_flush(hw);
796}
797
798/**
799 * i40e_disable_vf_mappings
b40c82e6 800 * @vf: pointer to the VF info
805bd5bd 801 *
b40c82e6 802 * disable VF mappings
805bd5bd
MW		 803 **/
804static void i40e_disable_vf_mappings(struct i40e_vf *vf)
805{
806 struct i40e_pf *pf = vf->pf;
807 struct i40e_hw *hw = &pf->hw;
808 int i;
809
810 /* disable qp mappings */
811 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
812 for (i = 0; i < I40E_MAX_VSI_QP; i++)
813 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
814 I40E_QUEUE_END_OF_LIST);
815 i40e_flush(hw);
816}
817
818/**
819 * i40e_free_vf_res
b40c82e6 820 * @vf: pointer to the VF info
805bd5bd 821 *
b40c82e6 822 * free VF resources
805bd5bd
MW		 823 **/
824static void i40e_free_vf_res(struct i40e_vf *vf)
825{
826 struct i40e_pf *pf = vf->pf;
fc18eaa0
MW		 827 struct i40e_hw *hw = &pf->hw;
828 u32 reg_idx, reg;
829 int i, msix_vf;
805bd5bd 830
beff3e9d
RK		 831 /* Start by disabling VF's configuration API to prevent the OS from
832 * accessing the VF's VSI after it's freed / invalidated.
833 */
6322e63c 834 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 835
a3f5aa90
AB		 836 /* It's possible the VF had requeuested more queues than the default so
837 * do the accounting here when we're about to free them.
838 */
839 if (vf->num_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF) {
840 pf->queues_left += vf->num_queue_pairs -
841 I40E_DEFAULT_QUEUES_PER_VF;
842 }
843
805bd5bd 844 /* free vsi & disconnect it from the parent uplink */
fdf0e0bf
ASJ		 845 if (vf->lan_vsi_idx) {
846 i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]);
847 vf->lan_vsi_idx = 0;
805bd5bd 848 vf->lan_vsi_id = 0;
13fd3f9c 849 vf->num_mac = 0;
805bd5bd 850 }
9347eb77
MW		 851 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
852
fc18eaa0
MW		 853 /* disable interrupts so the VF starts in a known state */
854 for (i = 0; i < msix_vf; i++) {
855 /* format is same for both registers */
856 if (0 == i)
857 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
858 else
859 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
860 (vf->vf_id))
861 + (i - 1));
862 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
863 i40e_flush(hw);
864 }
805bd5bd 865
fc18eaa0
MW		 866 /* clear the irq settings */
867 for (i = 0; i < msix_vf; i++) {
868 /* format is same for both registers */
869 if (0 == i)
870 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
871 else
872 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
873 (vf->vf_id))
874 + (i - 1));
875 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
876 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
877 wr32(hw, reg_idx, reg);
878 i40e_flush(hw);
879 }
b564d62e 880 /* reset some of the state variables keeping track of the resources */
805bd5bd 881 vf->num_queue_pairs = 0;
41d0a4d0
AB		 882 clear_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
883 clear_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
805bd5bd
MW		 884}
885
886/**
887 * i40e_alloc_vf_res
b40c82e6 888 * @vf: pointer to the VF info
805bd5bd 889 *
b40c82e6 890 * allocate VF resources
805bd5bd
MW		 891 **/
892static int i40e_alloc_vf_res(struct i40e_vf *vf)
893{
894 struct i40e_pf *pf = vf->pf;
895 int total_queue_pairs = 0;
896 int ret;
897
a3f5aa90
AB		 898 if (vf->num_req_queues &&
899 vf->num_req_queues <= pf->queues_left + I40E_DEFAULT_QUEUES_PER_VF)
900 pf->num_vf_qps = vf->num_req_queues;
901 else
902 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
903
805bd5bd
MW		 904 /* allocate hw vsi context & associated resources */
905 ret = i40e_alloc_vsi_res(vf, I40E_VSI_SRIOV);
906 if (ret)
907 goto error_alloc;
fdf0e0bf 908 total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
692fb0a7 909
a3f5aa90
AB		 910 /* We account for each VF to get a default number of queue pairs. If
911 * the VF has now requested more, we need to account for that to make
912 * certain we never request more queues than we actually have left in
913 * HW.
914 */
915 if (total_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF)
916 pf->queues_left -=
917 total_queue_pairs - I40E_DEFAULT_QUEUES_PER_VF;
918
692fb0a7
ASJ		 919 if (vf->trusted)
920 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
921 else
922 clear_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
805bd5bd
MW		 923
924 /* store the total qps number for the runtime
b40c82e6 925 * VF req validation
805bd5bd
MW		 926 */
927 vf->num_queue_pairs = total_queue_pairs;
928
b40c82e6 929 /* VF is now completely initialized */
6322e63c 930 set_bit(I40E_VF_STATE_INIT, &vf->vf_states);
805bd5bd
MW		 931
932error_alloc:
933 if (ret)
934 i40e_free_vf_res(vf);
935
936 return ret;
937}
938
fc18eaa0
MW		 939#define VF_DEVICE_STATUS 0xAA
940#define VF_TRANS_PENDING_MASK 0x20
941/**
942 * i40e_quiesce_vf_pci
b40c82e6 943 * @vf: pointer to the VF structure
fc18eaa0
MW		 944 *
945 * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
946 * if the transactions never clear.
947 **/
948static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
949{
950 struct i40e_pf *pf = vf->pf;
951 struct i40e_hw *hw = &pf->hw;
952 int vf_abs_id, i;
953 u32 reg;
954
b141d619 955 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
fc18eaa0
MW		 956
957 wr32(hw, I40E_PF_PCI_CIAA,
958 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
959 for (i = 0; i < 100; i++) {
960 reg = rd32(hw, I40E_PF_PCI_CIAD);
961 if ((reg & VF_TRANS_PENDING_MASK) == 0)
962 return 0;
963 udelay(1);
964 }
965 return -EIO;
966}
967
5c3c48ac 968/**
9dc2e417 969 * i40e_trigger_vf_reset
b40c82e6 970 * @vf: pointer to the VF structure
5c3c48ac
JB		 971 * @flr: VFLR was issued or not
972 *
9dc2e417
JK		 973 * Trigger hardware to start a reset for a particular VF. Expects the caller
974 * to wait the proper amount of time to allow hardware to reset the VF before
975 * it cleans up and restores VF functionality.
5c3c48ac 976 **/
9dc2e417 977static void i40e_trigger_vf_reset(struct i40e_vf *vf, bool flr)
5c3c48ac 978{
5c3c48ac
JB		 979 struct i40e_pf *pf = vf->pf;
980 struct i40e_hw *hw = &pf->hw;
7e5a313e 981 u32 reg, reg_idx, bit_idx;
3ba9bcb4 982
5c3c48ac 983 /* warn the VF */
6322e63c 984 clear_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac 985
beff3e9d
RK		 986 /* Disable VF's configuration API during reset. The flag is re-enabled
987 * in i40e_alloc_vf_res(), when it's safe again to access VF's VSI.
988 * It's normally disabled in i40e_free_vf_res(), but it's safer
989 * to do it earlier to give some time to finish to any VF config
990 * functions that may still be running at this point.
991 */
6322e63c 992 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 993
fc18eaa0
MW		 994 /* In the case of a VFLR, the HW has already reset the VF and we
995 * just need to clean up, so don't hit the VFRTRIG register.
5c3c48ac
JB		 996 */
997 if (!flr) {
b40c82e6 998 /* reset VF using VPGEN_VFRTRIG reg */
fc18eaa0
MW		 999 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1000 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
5c3c48ac
JB		 1001 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
1002 i40e_flush(hw);
1003 }
7369ca87
MW		 1004 /* clear the VFLR bit in GLGEN_VFLRSTAT */
1005 reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
1006 bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
1007 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
30728c5b 1008 i40e_flush(hw);
5c3c48ac 1009
fc18eaa0
MW		 1010 if (i40e_quiesce_vf_pci(vf))
1011 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
1012 vf->vf_id);
9dc2e417 1013}
fc18eaa0 1014
9dc2e417
JK		 1015/**
1016 * i40e_cleanup_reset_vf
1017 * @vf: pointer to the VF structure
1018 *
1019 * Cleanup a VF after the hardware reset is finished. Expects the caller to
1020 * have verified whether the reset is finished properly, and ensure the
1021 * minimum amount of wait time has passed.
1022 **/
1023static void i40e_cleanup_reset_vf(struct i40e_vf *vf)
1024{
1025 struct i40e_pf *pf = vf->pf;
1026 struct i40e_hw *hw = &pf->hw;
1027 u32 reg;
fc18eaa0 1028
beff3e9d 1029 /* free VF resources to begin resetting the VSI state */
fc18eaa0 1030 i40e_free_vf_res(vf);
beff3e9d
RK		 1031
1032 /* Enable hardware by clearing the reset bit in the VPGEN_VFRTRIG reg.
1033 * By doing this we allow HW to access VF memory at any point. If we
1034 * did it any sooner, HW could access memory while it was being freed
1035 * in i40e_free_vf_res(), causing an IOMMU fault.
1036 *
1037 * On the other hand, this needs to be done ASAP, because the VF driver
1038 * is waiting for this to happen and may report a timeout. It's
1039 * harmless, but it gets logged into Guest OS kernel log, so best avoid
1040 * it.
1041 */
1042 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1043 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
1044 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
1045
1046 /* reallocate VF resources to finish resetting the VSI state */
21be99ec 1047 if (!i40e_alloc_vf_res(vf)) {
e3219ce6 1048 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
21be99ec 1049 i40e_enable_vf_mappings(vf);
6322e63c
JK		 1050 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
1051 clear_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
6a23449a 1052 /* Do not notify the client during VF init */
c53d11f6
AB		 1053 if (!test_and_clear_bit(I40E_VF_STATE_PRE_ENABLE,
1054 &vf->vf_states))
6a23449a 1055 i40e_notify_client_of_vf_reset(pf, abs_vf_id);
dc5b4e9f 1056 vf->num_vlan = 0;
21be99ec 1057 }
beff3e9d
RK		 1058
1059 /* Tell the VF driver the reset is done. This needs to be done only
1060 * after VF has been fully initialized, because the VF driver may
1061 * request resources immediately after setting this flag.
1062 */
310a2ad9 1063 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), VIRTCHNL_VFR_VFACTIVE);
9dc2e417
JK		 1064}
1065
1066/**
1067 * i40e_reset_vf
1068 * @vf: pointer to the VF structure
1069 * @flr: VFLR was issued or not
1070 *
d43d60e5 1071 * Returns true if the VF is reset, false otherwise.
9dc2e417 1072 **/
d43d60e5 1073bool i40e_reset_vf(struct i40e_vf *vf, bool flr)
9dc2e417
JK		 1074{
1075 struct i40e_pf *pf = vf->pf;
1076 struct i40e_hw *hw = &pf->hw;
1077 bool rsd = false;
1078 u32 reg;
1079 int i;
1080
d43d60e5
JK		 1081 /* If the VFs have been disabled, this means something else is
1082 * resetting the VF, so we shouldn't continue.
1083 */
0da36b97 1084 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
d43d60e5 1085 return false;
9dc2e417
JK		 1086
1087 i40e_trigger_vf_reset(vf, flr);
1088
1089 /* poll VPGEN_VFRSTAT reg to make sure
1090 * that reset is complete
1091 */
1092 for (i = 0; i < 10; i++) {
1093 /* VF reset requires driver to first reset the VF and then
1094 * poll the status register to make sure that the reset
1095 * completed successfully. Due to internal HW FIFO flushes,
1096 * we must wait 10ms before the register will be valid.
1097 */
1098 usleep_range(10000, 20000);
1099 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1100 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
1101 rsd = true;
1102 break;
1103 }
1104 }
1105
1106 if (flr)
1107 usleep_range(10000, 20000);
1108
1109 if (!rsd)
1110 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1111 vf->vf_id);
1112 usleep_range(10000, 20000);
1113
1114 /* On initial reset, we don't have any queues to disable */
1115 if (vf->lan_vsi_idx != 0)
1116 i40e_vsi_stop_rings(pf->vsi[vf->lan_vsi_idx]);
1117
1118 i40e_cleanup_reset_vf(vf);
7e5a313e 1119
5c3c48ac 1120 i40e_flush(hw);
0da36b97 1121 clear_bit(__I40E_VF_DISABLE, pf->state);
d43d60e5
JK		 1122
1123 return true;
5c3c48ac 1124}
c354229f 1125
e4b433f4
JK		 1126/**
1127 * i40e_reset_all_vfs
1128 * @pf: pointer to the PF structure
1129 * @flr: VFLR was issued or not
1130 *
1131 * Reset all allocated VFs in one go. First, tell the hardware to reset each
1132 * VF, then do all the waiting in one chunk, and finally finish restoring each
1133 * VF after the wait. This is useful during PF routines which need to reset
1134 * all VFs, as otherwise it must perform these resets in a serialized fashion.
d43d60e5
JK		 1135 *
1136 * Returns true if any VFs were reset, and false otherwise.
e4b433f4 1137 **/
d43d60e5 1138bool i40e_reset_all_vfs(struct i40e_pf *pf, bool flr)
e4b433f4
JK		 1139{
1140 struct i40e_hw *hw = &pf->hw;
1141 struct i40e_vf *vf;
1142 int i, v;
1143 u32 reg;
1144
1145 /* If we don't have any VFs, then there is nothing to reset */
1146 if (!pf->num_alloc_vfs)
d43d60e5 1147 return false;
e4b433f4
JK		 1148
1149 /* If VFs have been disabled, there is no need to reset */
0da36b97 1150 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
d43d60e5 1151 return false;
e4b433f4
JK		 1152
1153 /* Begin reset on all VFs at once */
1154 for (v = 0; v < pf->num_alloc_vfs; v++)
1155 i40e_trigger_vf_reset(&pf->vf[v], flr);
1156
1157 /* HW requires some time to make sure it can flush the FIFO for a VF
1158 * when it resets it. Poll the VPGEN_VFRSTAT register for each VF in
1159 * sequence to make sure that it has completed. We'll keep track of
1160 * the VFs using a simple iterator that increments once that VF has
1161 * finished resetting.
1162 */
1163 for (i = 0, v = 0; i < 10 && v < pf->num_alloc_vfs; i++) {
1164 usleep_range(10000, 20000);
1165
1166 /* Check each VF in sequence, beginning with the VF to fail
1167 * the previous check.
1168 */
1169 while (v < pf->num_alloc_vfs) {
1170 vf = &pf->vf[v];
1171 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1172 if (!(reg & I40E_VPGEN_VFRSTAT_VFRD_MASK))
1173 break;
1174
1175 /* If the current VF has finished resetting, move on
1176 * to the next VF in sequence.
1177 */
1178 v++;
1179 }
1180 }
1181
1182 if (flr)
1183 usleep_range(10000, 20000);
1184
1185 /* Display a warning if at least one VF didn't manage to reset in
1186 * time, but continue on with the operation.
1187 */
1188 if (v < pf->num_alloc_vfs)
1189 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1190 pf->vf[v].vf_id);
1191 usleep_range(10000, 20000);
1192
1193 /* Begin disabling all the rings associated with VFs, but do not wait
1194 * between each VF.
1195 */
1196 for (v = 0; v < pf->num_alloc_vfs; v++) {
1197 /* On initial reset, we don't have any queues to disable */
1198 if (pf->vf[v].lan_vsi_idx == 0)
1199 continue;
1200
1201 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[v].lan_vsi_idx]);
1202 }
1203
1204 /* Now that we've notified HW to disable all of the VF rings, wait
1205 * until they finish.
1206 */
1207 for (v = 0; v < pf->num_alloc_vfs; v++) {
1208 /* On initial reset, we don't have any queues to disable */
1209 if (pf->vf[v].lan_vsi_idx == 0)
1210 continue;
1211
1212 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[v].lan_vsi_idx]);
1213 }
1214
1215 /* Hw may need up to 50ms to finish disabling the RX queues. We
1216 * minimize the wait by delaying only once for all VFs.
1217 */
1218 mdelay(50);
1219
1220 /* Finish the reset on each VF */
1221 for (v = 0; v < pf->num_alloc_vfs; v++)
1222 i40e_cleanup_reset_vf(&pf->vf[v]);
1223
1224 i40e_flush(hw);
0da36b97 1225 clear_bit(__I40E_VF_DISABLE, pf->state);
d43d60e5
JK		 1226
1227 return true;
e4b433f4
JK		 1228}
1229
5c3c48ac
JB		 1230/**
1231 * i40e_free_vfs
b40c82e6 1232 * @pf: pointer to the PF structure
5c3c48ac 1233 *
b40c82e6 1234 * free VF resources
5c3c48ac
JB		 1235 **/
1236void i40e_free_vfs(struct i40e_pf *pf)
1237{
f7414531
MW		 1238 struct i40e_hw *hw = &pf->hw;
1239 u32 reg_idx, bit_idx;
1240 int i, tmp, vf_id;
5c3c48ac
JB		 1241
1242 if (!pf->vf)
1243 return;
0da36b97 1244 while (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
3ba9bcb4 1245 usleep_range(1000, 2000);
5c3c48ac 1246
e3219ce6 1247 i40e_notify_client_of_vf_enable(pf, 0);
707d088a
JK		 1248
1249 /* Amortize wait time by stopping all VFs at the same time */
1250 for (i = 0; i < pf->num_alloc_vfs; i++) {
1251 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
1252 continue;
1253
1254 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[i].lan_vsi_idx]);
1255 }
1256
1257 for (i = 0; i < pf->num_alloc_vfs; i++) {
6322e63c 1258 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
707d088a
JK		 1259 continue;
1260
1261 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[i].lan_vsi_idx]);
1262 }
44434638 1263
6a9ddb36
MW		 1264 /* Disable IOV before freeing resources. This lets any VF drivers
1265 * running in the host get themselves cleaned up before we yank
1266 * the carpet out from underneath their feet.
1267 */
1268 if (!pci_vfs_assigned(pf->pdev))
1269 pci_disable_sriov(pf->pdev);
6d7b967d
MW		 1270 else
1271 dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
6a9ddb36 1272
b40c82e6 1273 /* free up VF resources */
6c1b5bff
MW		 1274 tmp = pf->num_alloc_vfs;
1275 pf->num_alloc_vfs = 0;
1276 for (i = 0; i < tmp; i++) {
6322e63c 1277 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
5c3c48ac
JB		 1278 i40e_free_vf_res(&pf->vf[i]);
1279 /* disable qp mappings */
1280 i40e_disable_vf_mappings(&pf->vf[i]);
1281 }
1282
1283 kfree(pf->vf);
1284 pf->vf = NULL;
5c3c48ac 1285
9e5634df
MW		 1286 /* This check is for when the driver is unloaded while VFs are
1287 * assigned. Setting the number of VFs to 0 through sysfs is caught
1288 * before this function ever gets called.
1289 */
c24817b6 1290 if (!pci_vfs_assigned(pf->pdev)) {
f7414531
MW		 1291 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
1292 * work correctly when SR-IOV gets re-enabled.
1293 */
1294 for (vf_id = 0; vf_id < tmp; vf_id++) {
1295 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
1296 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
41a1d04b 1297 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
f7414531 1298 }
c354229f 1299 }
0da36b97 1300 clear_bit(__I40E_VF_DISABLE, pf->state);
5c3c48ac
JB		 1301}
1302
1303#ifdef CONFIG_PCI_IOV
1304/**
1305 * i40e_alloc_vfs
b40c82e6
JK		 1306 * @pf: pointer to the PF structure
1307 * @num_alloc_vfs: number of VFs to allocate
5c3c48ac 1308 *
b40c82e6 1309 * allocate VF resources
5c3c48ac 1310 **/
4aeec010 1311int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
5c3c48ac
JB		 1312{
1313 struct i40e_vf *vfs;
1314 int i, ret = 0;
1315
6c1b5bff 1316 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW		 1317 i40e_irq_dynamic_disable_icr0(pf);
1318
4aeec010
MW		 1319 /* Check to see if we're just allocating resources for extant VFs */
1320 if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
1321 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
1322 if (ret) {
de445b3d 1323 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
4aeec010
MW		 1324 pf->num_alloc_vfs = 0;
1325 goto err_iov;
1326 }
5c3c48ac 1327 }
5c3c48ac 1328 /* allocate memory */
cc6456af 1329 vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL);
5c3c48ac
JB		 1330 if (!vfs) {
1331 ret = -ENOMEM;
1332 goto err_alloc;
1333 }
c674d125 1334 pf->vf = vfs;
5c3c48ac
JB		 1335
1336 /* apply default profile */
1337 for (i = 0; i < num_alloc_vfs; i++) {
1338 vfs[i].pf = pf;
1339 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
1340 vfs[i].vf_id = i;
1341
1342 /* assign default capabilities */
1343 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
c674d125 1344 vfs[i].spoofchk = true;
1b484370
JK		 1345
1346 set_bit(I40E_VF_STATE_PRE_ENABLE, &vfs[i].vf_states);
5c3c48ac 1347
5c3c48ac 1348 }
5c3c48ac
JB		 1349 pf->num_alloc_vfs = num_alloc_vfs;
1350
1b484370
JK		 1351 /* VF resources get allocated during reset */
1352 i40e_reset_all_vfs(pf, false);
1353
6a23449a
AD		 1354 i40e_notify_client_of_vf_enable(pf, num_alloc_vfs);
1355
5c3c48ac
JB		 1356err_alloc:
1357 if (ret)
1358 i40e_free_vfs(pf);
1359err_iov:
6c1b5bff 1360 /* Re-enable interrupt 0. */
40d72a50 1361 i40e_irq_dynamic_enable_icr0(pf, false);
5c3c48ac
JB		 1362 return ret;
1363}
1364
1365#endif
1366/**
1367 * i40e_pci_sriov_enable
1368 * @pdev: pointer to a pci_dev structure
b40c82e6 1369 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1370 *
1371 * Enable or change the number of VFs
1372 **/
1373static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
1374{
1375#ifdef CONFIG_PCI_IOV
1376 struct i40e_pf *pf = pci_get_drvdata(pdev);
1377 int pre_existing_vfs = pci_num_vf(pdev);
1378 int err = 0;
1379
0da36b97 1380 if (test_bit(__I40E_TESTING, pf->state)) {
e17bc411
GR		 1381 dev_warn(&pdev->dev,
1382 "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n");
1383 err = -EPERM;
1384 goto err_out;
1385 }
1386
5c3c48ac
JB		 1387 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
1388 i40e_free_vfs(pf);
1389 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
1390 goto out;
1391
1392 if (num_vfs > pf->num_req_vfs) {
96c8d073
MW		 1393 dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n",
1394 num_vfs, pf->num_req_vfs);
5c3c48ac
JB		 1395 err = -EPERM;
1396 goto err_out;
1397 }
1398
96c8d073 1399 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
5c3c48ac
JB		 1400 err = i40e_alloc_vfs(pf, num_vfs);
1401 if (err) {
1402 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
1403 goto err_out;
1404 }
1405
1406out:
1407 return num_vfs;
1408
1409err_out:
1410 return err;
1411#endif
1412 return 0;
1413}
1414
1415/**
1416 * i40e_pci_sriov_configure
1417 * @pdev: pointer to a pci_dev structure
b40c82e6 1418 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1419 *
1420 * Enable or change the number of VFs. Called when the user updates the number
1421 * of VFs in sysfs.
1422 **/
1423int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1424{
1425 struct i40e_pf *pf = pci_get_drvdata(pdev);
1426
fc60861e
ASJ		 1427 if (num_vfs) {
1428 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
1429 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
1430 i40e_do_reset_safe(pf,
1431 BIT_ULL(__I40E_PF_RESET_REQUESTED));
1432 }
5c3c48ac 1433 return i40e_pci_sriov_enable(pdev, num_vfs);
fc60861e 1434 }
5c3c48ac 1435
c24817b6 1436 if (!pci_vfs_assigned(pf->pdev)) {
9e5634df 1437 i40e_free_vfs(pf);
fc60861e
ASJ		 1438 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
1439 i40e_do_reset_safe(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
9e5634df
MW		 1440 } else {
1441 dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
1442 return -EINVAL;
1443 }
5c3c48ac
JB		 1444 return 0;
1445}
1446
1447/***********************virtual channel routines******************/
1448
1449/**
1450 * i40e_vc_send_msg_to_vf
b40c82e6 1451 * @vf: pointer to the VF info
5c3c48ac
JB		 1452 * @v_opcode: virtual channel opcode
1453 * @v_retval: virtual channel return value
1454 * @msg: pointer to the msg buffer
1455 * @msglen: msg length
1456 *
b40c82e6 1457 * send msg to VF
5c3c48ac
JB		 1458 **/
1459static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
1460 u32 v_retval, u8 *msg, u16 msglen)
1461{
6e7b5bd3
ASJ		 1462 struct i40e_pf *pf;
1463 struct i40e_hw *hw;
1464 int abs_vf_id;
5c3c48ac
JB		 1465 i40e_status aq_ret;
1466
6e7b5bd3
ASJ		 1467 /* validate the request */
1468 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
1469 return -EINVAL;
1470
1471 pf = vf->pf;
1472 hw = &pf->hw;
1473 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1474
5c3c48ac
JB		 1475 /* single place to detect unsuccessful return values */
1476 if (v_retval) {
1477 vf->num_invalid_msgs++;
18b7af57
MW		 1478 dev_info(&pf->pdev->dev, "VF %d failed opcode %d, retval: %d\n",
1479 vf->vf_id, v_opcode, v_retval);
5c3c48ac
JB		 1480 if (vf->num_invalid_msgs >
1481 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
1482 dev_err(&pf->pdev->dev,
1483 "Number of invalid messages exceeded for VF %d\n",
1484 vf->vf_id);
1485 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
6322e63c 1486 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
5c3c48ac
JB		 1487 }
1488 } else {
1489 vf->num_valid_msgs++;
5d38c93e
JW		 1490 /* reset the invalid counter, if a valid message is received. */
1491 vf->num_invalid_msgs = 0;
5c3c48ac
JB		 1492 }
1493
f19efbb5 1494 aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
7efa84b7 1495 msg, msglen, NULL);
5c3c48ac 1496 if (aq_ret) {
18b7af57
MW		 1497 dev_info(&pf->pdev->dev,
1498 "Unable to send the message to VF %d aq_err %d\n",
1499 vf->vf_id, pf->hw.aq.asq_last_status);
5c3c48ac
JB		 1500 return -EIO;
1501 }
1502
1503 return 0;
1504}
1505
1506/**
1507 * i40e_vc_send_resp_to_vf
b40c82e6 1508 * @vf: pointer to the VF info
5c3c48ac
JB		 1509 * @opcode: operation code
1510 * @retval: return value
1511 *
b40c82e6 1512 * send resp msg to VF
5c3c48ac
JB		 1513 **/
1514static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
310a2ad9 1515 enum virtchnl_ops opcode,
5c3c48ac
JB		 1516 i40e_status retval)
1517{
1518 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
1519}
1520
1521/**
1522 * i40e_vc_get_version_msg
b40c82e6 1523 * @vf: pointer to the VF info
5c3c48ac 1524 *
b40c82e6 1525 * called from the VF to request the API version used by the PF
5c3c48ac 1526 **/
f4ca1a22 1527static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 1528{
310a2ad9
JB		 1529 struct virtchnl_version_info info = {
1530 VIRTCHNL_VERSION_MAJOR, VIRTCHNL_VERSION_MINOR
5c3c48ac
JB		 1531 };
1532
310a2ad9 1533 vf->vf_ver = *(struct virtchnl_version_info *)msg;
606a5488 1534 /* VFs running the 1.0 API expect to get 1.0 back or they will cry. */
eedcfef8 1535 if (VF_IS_V10(&vf->vf_ver))
310a2ad9
JB		 1536 info.minor = VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
1537 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_VERSION,
5c3c48ac 1538 I40E_SUCCESS, (u8 *)&info,
f0adc6e8 1539 sizeof(struct virtchnl_version_info));
5c3c48ac
JB		 1540}
1541
1542/**
1543 * i40e_vc_get_vf_resources_msg
b40c82e6 1544 * @vf: pointer to the VF info
5c3c48ac
JB		 1545 * @msg: pointer to the msg buffer
1546 * @msglen: msg length
1547 *
b40c82e6 1548 * called from the VF to request its resources
5c3c48ac 1549 **/
f4ca1a22 1550static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 1551{
310a2ad9 1552 struct virtchnl_vf_resource *vfres = NULL;
5c3c48ac
JB		 1553 struct i40e_pf *pf = vf->pf;
1554 i40e_status aq_ret = 0;
1555 struct i40e_vsi *vsi;
5c3c48ac 1556 int num_vsis = 1;
442b25e4 1557 int len = 0;
5c3c48ac
JB		 1558 int ret;
1559
6322e63c 1560 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
5c3c48ac
JB		 1561 aq_ret = I40E_ERR_PARAM;
1562 goto err;
1563 }
1564
310a2ad9
JB		 1565 len = (sizeof(struct virtchnl_vf_resource) +
1566 sizeof(struct virtchnl_vsi_resource) * num_vsis);
5c3c48ac
JB		 1567
1568 vfres = kzalloc(len, GFP_KERNEL);
1569 if (!vfres) {
1570 aq_ret = I40E_ERR_NO_MEMORY;
1571 len = 0;
1572 goto err;
1573 }
eedcfef8 1574 if (VF_IS_V11(&vf->vf_ver))
f4ca1a22
MW		 1575 vf->driver_caps = *(u32 *)msg;
1576 else
310a2ad9
JB		 1577 vf->driver_caps = VIRTCHNL_VF_OFFLOAD_L2 |
1578 VIRTCHNL_VF_OFFLOAD_RSS_REG |
1579 VIRTCHNL_VF_OFFLOAD_VLAN;
5c3c48ac 1580
fbb113f7 1581 vfres->vf_cap_flags = VIRTCHNL_VF_OFFLOAD_L2;
fdf0e0bf 1582 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1583 if (!vsi->info.pvid)
fbb113f7 1584 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_VLAN;
e3219ce6 1585
0ef2d5af 1586 if (i40e_vf_client_capable(pf, vf->vf_id) &&
310a2ad9 1587 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_IWARP)) {
fbb113f7 1588 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_IWARP;
6322e63c 1589 set_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
41d0a4d0
AB		 1590 } else {
1591 clear_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
e3219ce6
ASJ		 1592 }
1593
310a2ad9 1594 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
fbb113f7 1595 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_PF;
e25d00b8 1596 } else {
d36e41dc 1597 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
310a2ad9 1598 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_AQ))
fbb113f7 1599 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_AQ;
c4e1868c 1600 else
fbb113f7 1601 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_REG;
e25d00b8 1602 }
1f012279 1603
d36e41dc 1604 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
310a2ad9 1605 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
fbb113f7 1606 vfres->vf_cap_flags |=
310a2ad9 1607 VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
3d0da5b7
ASJ		 1608 }
1609
310a2ad9 1610 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP)
fbb113f7 1611 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP;
bacd75cf 1612
d36e41dc 1613 if ((pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE) &&
310a2ad9 1614 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM))
fbb113f7 1615 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM;
bacd75cf 1616
310a2ad9 1617 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) {
14c5f5d2
SN		 1618 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
1619 dev_err(&pf->pdev->dev,
1620 "VF %d requested polling mode: this feature is supported only when the device is running in single function per port (SFP) mode\n",
1621 vf->vf_id);
db1a8f8e 1622 aq_ret = I40E_ERR_PARAM;
14c5f5d2
SN		 1623 goto err;
1624 }
fbb113f7 1625 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RX_POLLING;
14c5f5d2 1626 }
1f012279 1627
d36e41dc 1628 if (pf->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) {
310a2ad9 1629 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
fbb113f7 1630 vfres->vf_cap_flags |=
310a2ad9 1631 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
f6d83d13
ASJ		 1632 }
1633
a3f5aa90
AB		 1634 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_REQ_QUEUES)
1635 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_REQ_QUEUES;
1636
5c3c48ac
JB		 1637 vfres->num_vsis = num_vsis;
1638 vfres->num_queue_pairs = vf->num_queue_pairs;
1639 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
c4e1868c
MW		 1640 vfres->rss_key_size = I40E_HKEY_ARRAY_SIZE;
1641 vfres->rss_lut_size = I40E_VF_HLUT_ARRAY_SIZE;
1642
fdf0e0bf 1643 if (vf->lan_vsi_idx) {
442b25e4 1644 vfres->vsi_res[0].vsi_id = vf->lan_vsi_id;
ff3f4cc2 1645 vfres->vsi_res[0].vsi_type = VIRTCHNL_VSI_SRIOV;
442b25e4 1646 vfres->vsi_res[0].num_queue_pairs = vsi->alloc_queue_pairs;
f578f5f4 1647 /* VFs only use TC 0 */
442b25e4 1648 vfres->vsi_res[0].qset_handle
f578f5f4 1649 = le16_to_cpu(vsi->info.qs_handle[0]);
442b25e4 1650 ether_addr_copy(vfres->vsi_res[0].default_mac_addr,
6995b36c 1651 vf->default_lan_addr.addr);
5c3c48ac 1652 }
6322e63c 1653 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac
JB		 1654
1655err:
b40c82e6 1656 /* send the response back to the VF */
310a2ad9 1657 ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_VF_RESOURCES,
5c3c48ac
JB		 1658 aq_ret, (u8 *)vfres, len);
1659
1660 kfree(vfres);
1661 return ret;
1662}
1663
1664/**
1665 * i40e_vc_reset_vf_msg
b40c82e6 1666 * @vf: pointer to the VF info
5c3c48ac
JB		 1667 * @msg: pointer to the msg buffer
1668 * @msglen: msg length
1669 *
b40c82e6
JK		 1670 * called from the VF to reset itself,
1671 * unlike other virtchnl messages, PF driver
1672 * doesn't send the response back to the VF
5c3c48ac 1673 **/
fc18eaa0 1674static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
5c3c48ac 1675{
6322e63c 1676 if (test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
fc18eaa0 1677 i40e_reset_vf(vf, false);
5c3c48ac
JB		 1678}
1679
5676a8b9
ASJ		 1680/**
1681 * i40e_getnum_vf_vsi_vlan_filters
1682 * @vsi: pointer to the vsi
1683 *
1684 * called to get the number of VLANs offloaded on this VF
1685 **/
1686static inline int i40e_getnum_vf_vsi_vlan_filters(struct i40e_vsi *vsi)
1687{
1688 struct i40e_mac_filter *f;
278e7d0b 1689 int num_vlans = 0, bkt;
5676a8b9 1690
278e7d0b 1691 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
5676a8b9
ASJ		 1692 if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID)
1693 num_vlans++;
1694 }
1695
1696 return num_vlans;
1697}
1698
5c3c48ac
JB		 1699/**
1700 * i40e_vc_config_promiscuous_mode_msg
b40c82e6 1701 * @vf: pointer to the VF info
5c3c48ac
JB		 1702 * @msg: pointer to the msg buffer
1703 * @msglen: msg length
1704 *
b40c82e6
JK		 1705 * called from the VF to configure the promiscuous mode of
1706 * VF vsis
5c3c48ac
JB		 1707 **/
1708static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf,
1709 u8 *msg, u16 msglen)
1710{
310a2ad9
JB		 1711 struct virtchnl_promisc_info *info =
1712 (struct virtchnl_promisc_info *)msg;
5c3c48ac
JB		 1713 struct i40e_pf *pf = vf->pf;
1714 struct i40e_hw *hw = &pf->hw;
5676a8b9
ASJ		 1715 struct i40e_mac_filter *f;
1716 i40e_status aq_ret = 0;
5c3c48ac 1717 bool allmulti = false;
5676a8b9
ASJ		 1718 struct i40e_vsi *vsi;
1719 bool alluni = false;
1720 int aq_err = 0;
278e7d0b 1721 int bkt;
5c3c48ac 1722
fdf0e0bf 1723 vsi = i40e_find_vsi_from_id(pf, info->vsi_id);
6322e63c 1724 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d4a0658d
CW		 1725 !i40e_vc_isvalid_vsi_id(vf, info->vsi_id) ||
1726 !vsi) {
eee4172a
MW		 1727 aq_ret = I40E_ERR_PARAM;
1728 goto error_param;
1729 }
1730 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
5676a8b9 1731 dev_err(&pf->pdev->dev,
eee4172a 1732 "Unprivileged VF %d is attempting to configure promiscuous mode\n",
5676a8b9 1733 vf->vf_id);
eee4172a
MW		 1734 /* Lie to the VF on purpose. */
1735 aq_ret = 0;
5c3c48ac
JB		 1736 goto error_param;
1737 }
5676a8b9 1738 /* Multicast promiscuous handling*/
ff3f4cc2 1739 if (info->flags & FLAG_VF_MULTICAST_PROMISC)
5c3c48ac 1740 allmulti = true;
5676a8b9
ASJ		 1741
1742 if (vf->port_vlan_id) {
1743 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw, vsi->seid,
1744 allmulti,
1745 vf->port_vlan_id,
1746 NULL);
1747 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
278e7d0b 1748 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
47d34839
ASJ		 1749 if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
1750 continue;
1751 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw,
1752 vsi->seid,
1753 allmulti,
1754 f->vlan,
1755 NULL);
5676a8b9
ASJ		 1756 aq_err = pf->hw.aq.asq_last_status;
1757 if (aq_ret) {
1758 dev_err(&pf->pdev->dev,
1759 "Could not add VLAN %d to multicast promiscuous domain err %s aq_err %s\n",
1760 f->vlan,
1761 i40e_stat_str(&pf->hw, aq_ret),
1762 i40e_aq_str(&pf->hw, aq_err));
1763 break;
1764 }
1765 }
1766 } else {
1767 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid,
1768 allmulti, NULL);
1769 aq_err = pf->hw.aq.asq_last_status;
1770 if (aq_ret) {
1771 dev_err(&pf->pdev->dev,
1772 "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n",
1773 vf->vf_id,
1774 i40e_stat_str(&pf->hw, aq_ret),
1775 i40e_aq_str(&pf->hw, aq_err));
7429c0bd 1776 goto error_param;
5676a8b9
ASJ		 1777 }
1778 }
1779
1780 if (!aq_ret) {
1781 dev_info(&pf->pdev->dev,
1782 "VF %d successfully set multicast promiscuous mode\n",
1783 vf->vf_id);
1784 if (allmulti)
6322e63c 1785 set_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
5676a8b9 1786 else
6322e63c 1787 clear_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
5676a8b9
ASJ		 1788 }
1789
ff3f4cc2 1790 if (info->flags & FLAG_VF_UNICAST_PROMISC)
5676a8b9
ASJ		 1791 alluni = true;
1792 if (vf->port_vlan_id) {
1793 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw, vsi->seid,
1794 alluni,
1795 vf->port_vlan_id,
1796 NULL);
1797 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
278e7d0b 1798 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
4d433084
JB		 1799 if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
1800 continue;
1801 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw,
1802 vsi->seid,
1803 alluni,
1804 f->vlan,
1805 NULL);
1806 aq_err = pf->hw.aq.asq_last_status;
5676a8b9
ASJ		 1807 if (aq_ret)
1808 dev_err(&pf->pdev->dev,
1809 "Could not add VLAN %d to Unicast promiscuous domain err %s aq_err %s\n",
1810 f->vlan,
1811 i40e_stat_str(&pf->hw, aq_ret),
1812 i40e_aq_str(&pf->hw, aq_err));
1813 }
1814 } else {
1815 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, vsi->seid,
e53b382f 1816 alluni, NULL,
b5569892 1817 true);
5676a8b9 1818 aq_err = pf->hw.aq.asq_last_status;
7429c0bd 1819 if (aq_ret) {
5676a8b9
ASJ		 1820 dev_err(&pf->pdev->dev,
1821 "VF %d failed to set unicast promiscuous mode %8.8x err %s aq_err %s\n",
1822 vf->vf_id, info->flags,
1823 i40e_stat_str(&pf->hw, aq_ret),
1824 i40e_aq_str(&pf->hw, aq_err));
7429c0bd
JK		 1825 goto error_param;
1826 }
5676a8b9
ASJ		 1827 }
1828
5676a8b9
ASJ		 1829 if (!aq_ret) {
1830 dev_info(&pf->pdev->dev,
1831 "VF %d successfully set unicast promiscuous mode\n",
1832 vf->vf_id);
1833 if (alluni)
6322e63c 1834 set_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
5676a8b9 1835 else
6322e63c 1836 clear_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
5676a8b9 1837 }
5c3c48ac
JB		 1838
1839error_param:
b40c82e6 1840 /* send the response to the VF */
5c3c48ac 1841 return i40e_vc_send_resp_to_vf(vf,
310a2ad9 1842 VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
5c3c48ac
JB		 1843 aq_ret);
1844}
1845
1846/**
1847 * i40e_vc_config_queues_msg
b40c82e6 1848 * @vf: pointer to the VF info
5c3c48ac
JB		 1849 * @msg: pointer to the msg buffer
1850 * @msglen: msg length
1851 *
b40c82e6 1852 * called from the VF to configure the rx/tx
5c3c48ac
JB		 1853 * queues
1854 **/
1855static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1856{
310a2ad9
JB		 1857 struct virtchnl_vsi_queue_config_info *qci =
1858 (struct virtchnl_vsi_queue_config_info *)msg;
1859 struct virtchnl_queue_pair_info *qpi;
5f5e33b6 1860 struct i40e_pf *pf = vf->pf;
5c3c48ac
JB		 1861 u16 vsi_id, vsi_queue_id;
1862 i40e_status aq_ret = 0;
1863 int i;
1864
6322e63c 1865 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 1866 aq_ret = I40E_ERR_PARAM;
1867 goto error_param;
1868 }
1869
1870 vsi_id = qci->vsi_id;
1871 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1872 aq_ret = I40E_ERR_PARAM;
1873 goto error_param;
1874 }
1875 for (i = 0; i < qci->num_queue_pairs; i++) {
1876 qpi = &qci->qpair[i];
1877 vsi_queue_id = qpi->txq.queue_id;
1878 if ((qpi->txq.vsi_id != vsi_id) ||
1879 (qpi->rxq.vsi_id != vsi_id) ||
1880 (qpi->rxq.queue_id != vsi_queue_id) ||
1881 !i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
1882 aq_ret = I40E_ERR_PARAM;
1883 goto error_param;
1884 }
1885
1886 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
1887 &qpi->rxq) ||
1888 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
1889 &qpi->txq)) {
1890 aq_ret = I40E_ERR_PARAM;
1891 goto error_param;
1892 }
1893 }
b40c82e6 1894 /* set vsi num_queue_pairs in use to num configured by VF */
fdf0e0bf 1895 pf->vsi[vf->lan_vsi_idx]->num_queue_pairs = qci->num_queue_pairs;
5c3c48ac
JB		 1896
1897error_param:
b40c82e6 1898 /* send the response to the VF */
310a2ad9 1899 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES,
5c3c48ac
JB		 1900 aq_ret);
1901}
1902
1903/**
1904 * i40e_vc_config_irq_map_msg
b40c82e6 1905 * @vf: pointer to the VF info
5c3c48ac
JB		 1906 * @msg: pointer to the msg buffer
1907 * @msglen: msg length
1908 *
b40c82e6 1909 * called from the VF to configure the irq to
5c3c48ac
JB		 1910 * queue map
1911 **/
1912static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1913{
310a2ad9
JB		 1914 struct virtchnl_irq_map_info *irqmap_info =
1915 (struct virtchnl_irq_map_info *)msg;
1916 struct virtchnl_vector_map *map;
5c3c48ac
JB		 1917 u16 vsi_id, vsi_queue_id, vector_id;
1918 i40e_status aq_ret = 0;
1919 unsigned long tempmap;
1920 int i;
1921
6322e63c 1922 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 1923 aq_ret = I40E_ERR_PARAM;
1924 goto error_param;
1925 }
1926
1927 for (i = 0; i < irqmap_info->num_vectors; i++) {
1928 map = &irqmap_info->vecmap[i];
1929
1930 vector_id = map->vector_id;
1931 vsi_id = map->vsi_id;
1932 /* validate msg params */
1933 if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
1934 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1935 aq_ret = I40E_ERR_PARAM;
1936 goto error_param;
1937 }
1938
1939 /* lookout for the invalid queue index */
1940 tempmap = map->rxq_map;
4836650b 1941 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 1942 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1943 vsi_queue_id)) {
1944 aq_ret = I40E_ERR_PARAM;
1945 goto error_param;
1946 }
5c3c48ac
JB		 1947 }
1948
1949 tempmap = map->txq_map;
4836650b 1950 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 1951 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1952 vsi_queue_id)) {
1953 aq_ret = I40E_ERR_PARAM;
1954 goto error_param;
1955 }
5c3c48ac
JB		 1956 }
1957
1958 i40e_config_irq_link_list(vf, vsi_id, map);
1959 }
1960error_param:
b40c82e6 1961 /* send the response to the VF */
310a2ad9 1962 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_IRQ_MAP,
5c3c48ac
JB		 1963 aq_ret);
1964}
1965
1966/**
1967 * i40e_vc_enable_queues_msg
b40c82e6 1968 * @vf: pointer to the VF info
5c3c48ac
JB		 1969 * @msg: pointer to the msg buffer
1970 * @msglen: msg length
1971 *
b40c82e6 1972 * called from the VF to enable all or specific queue(s)
5c3c48ac
JB		 1973 **/
1974static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1975{
310a2ad9
JB		 1976 struct virtchnl_queue_select *vqs =
1977 (struct virtchnl_queue_select *)msg;
5c3c48ac
JB		 1978 struct i40e_pf *pf = vf->pf;
1979 u16 vsi_id = vqs->vsi_id;
1980 i40e_status aq_ret = 0;
5c3c48ac 1981
6322e63c 1982 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 1983 aq_ret = I40E_ERR_PARAM;
1984 goto error_param;
1985 }
1986
1987 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1988 aq_ret = I40E_ERR_PARAM;
1989 goto error_param;
1990 }
1991
1992 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1993 aq_ret = I40E_ERR_PARAM;
1994 goto error_param;
1995 }
fdf0e0bf 1996
3aa7b74d 1997 if (i40e_vsi_start_rings(pf->vsi[vf->lan_vsi_idx]))
88f6563d 1998 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac 1999error_param:
b40c82e6 2000 /* send the response to the VF */
310a2ad9 2001 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_QUEUES,
5c3c48ac
JB		 2002 aq_ret);
2003}
2004
2005/**
2006 * i40e_vc_disable_queues_msg
b40c82e6 2007 * @vf: pointer to the VF info
5c3c48ac
JB		 2008 * @msg: pointer to the msg buffer
2009 * @msglen: msg length
2010 *
b40c82e6 2011 * called from the VF to disable all or specific
5c3c48ac
JB		 2012 * queue(s)
2013 **/
2014static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2015{
310a2ad9
JB		 2016 struct virtchnl_queue_select *vqs =
2017 (struct virtchnl_queue_select *)msg;
5c3c48ac 2018 struct i40e_pf *pf = vf->pf;
5c3c48ac 2019 i40e_status aq_ret = 0;
5c3c48ac 2020
6322e63c 2021 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2022 aq_ret = I40E_ERR_PARAM;
2023 goto error_param;
2024 }
2025
2026 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
2027 aq_ret = I40E_ERR_PARAM;
2028 goto error_param;
2029 }
2030
2031 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
2032 aq_ret = I40E_ERR_PARAM;
2033 goto error_param;
2034 }
fdf0e0bf 2035
3aa7b74d 2036 i40e_vsi_stop_rings(pf->vsi[vf->lan_vsi_idx]);
5c3c48ac
JB		 2037
2038error_param:
b40c82e6 2039 /* send the response to the VF */
310a2ad9 2040 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_QUEUES,
5c3c48ac
JB		 2041 aq_ret);
2042}
2043
a3f5aa90
AB		 2044/**
2045 * i40e_vc_request_queues_msg
2046 * @vf: pointer to the VF info
2047 * @msg: pointer to the msg buffer
2048 * @msglen: msg length
2049 *
2050 * VFs get a default number of queues but can use this message to request a
2051 * different number. Will respond with either the number requested or the
2052 * maximum we can support.
2053 **/
2054static int i40e_vc_request_queues_msg(struct i40e_vf *vf, u8 *msg, int msglen)
2055{
2056 struct virtchnl_vf_res_request *vfres =
2057 (struct virtchnl_vf_res_request *)msg;
2058 int req_pairs = vfres->num_queue_pairs;
2059 int cur_pairs = vf->num_queue_pairs;
2060 struct i40e_pf *pf = vf->pf;
2061
2062 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
2063 return -EINVAL;
2064
2065 if (req_pairs <= 0) {
2066 dev_err(&pf->pdev->dev,
2067 "VF %d tried to request %d queues. Ignoring.\n",
2068 vf->vf_id, req_pairs);
2069 } else if (req_pairs > I40E_MAX_VF_QUEUES) {
2070 dev_err(&pf->pdev->dev,
2071 "VF %d tried to request more than %d queues.\n",
2072 vf->vf_id,
2073 I40E_MAX_VF_QUEUES);
2074 vfres->num_queue_pairs = I40E_MAX_VF_QUEUES;
2075 } else if (req_pairs - cur_pairs > pf->queues_left) {
2076 dev_warn(&pf->pdev->dev,
2077 "VF %d requested %d more queues, but only %d left.\n",
2078 vf->vf_id,
2079 req_pairs - cur_pairs,
2080 pf->queues_left);
2081 vfres->num_queue_pairs = pf->queues_left + cur_pairs;
2082 } else {
2083 vf->num_req_queues = req_pairs;
2084 }
2085
2086 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_REQUEST_QUEUES, 0,
2087 (u8 *)vfres, sizeof(vfres));
2088}
2089
5c3c48ac
JB		 2090/**
2091 * i40e_vc_get_stats_msg
b40c82e6 2092 * @vf: pointer to the VF info
5c3c48ac
JB		 2093 * @msg: pointer to the msg buffer
2094 * @msglen: msg length
2095 *
b40c82e6 2096 * called from the VF to get vsi stats
5c3c48ac
JB		 2097 **/
2098static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2099{
310a2ad9
JB		 2100 struct virtchnl_queue_select *vqs =
2101 (struct virtchnl_queue_select *)msg;
5c3c48ac
JB		 2102 struct i40e_pf *pf = vf->pf;
2103 struct i40e_eth_stats stats;
2104 i40e_status aq_ret = 0;
2105 struct i40e_vsi *vsi;
2106
2107 memset(&stats, 0, sizeof(struct i40e_eth_stats));
2108
6322e63c 2109 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2110 aq_ret = I40E_ERR_PARAM;
2111 goto error_param;
2112 }
2113
2114 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
2115 aq_ret = I40E_ERR_PARAM;
2116 goto error_param;
2117 }
2118
fdf0e0bf 2119 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2120 if (!vsi) {
2121 aq_ret = I40E_ERR_PARAM;
2122 goto error_param;
2123 }
2124 i40e_update_eth_stats(vsi);
5a9769c8 2125 stats = vsi->eth_stats;
5c3c48ac
JB		 2126
2127error_param:
b40c82e6 2128 /* send the response back to the VF */
310a2ad9 2129 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_STATS, aq_ret,
5c3c48ac
JB		 2130 (u8 *)&stats, sizeof(stats));
2131}
2132
5f527ba9 2133/* If the VF is not trusted restrict the number of MAC/VLAN it can program */
4dbc5661 2134#define I40E_VC_MAX_MAC_ADDR_PER_VF 12
5f527ba9
ASJ		 2135#define I40E_VC_MAX_VLAN_PER_VF 8
2136
f657a6e1
GR		 2137/**
2138 * i40e_check_vf_permission
b40c82e6 2139 * @vf: pointer to the VF info
f657a6e1
GR		 2140 * @macaddr: pointer to the MAC Address being checked
2141 *
2142 * Check if the VF has permission to add or delete unicast MAC address
2143 * filters and return error code -EPERM if not. Then check if the
2144 * address filter requested is broadcast or zero and if so return
2145 * an invalid MAC address error code.
2146 **/
2147static inline int i40e_check_vf_permission(struct i40e_vf *vf, u8 *macaddr)
2148{
2149 struct i40e_pf *pf = vf->pf;
2150 int ret = 0;
2151
2152 if (is_broadcast_ether_addr(macaddr) ||
2153 is_zero_ether_addr(macaddr)) {
2154 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n", macaddr);
2155 ret = I40E_ERR_INVALID_MAC_ADDR;
5017c2a8 2156 } else if (vf->pf_set_mac && !is_multicast_ether_addr(macaddr) &&
692fb0a7 2157 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
5017c2a8 2158 !ether_addr_equal(macaddr, vf->default_lan_addr.addr)) {
f657a6e1
GR		 2159 /* If the host VMM administrator has set the VF MAC address
2160 * administratively via the ndo_set_vf_mac command then deny
2161 * permission to the VF to add or delete unicast MAC addresses.
692fb0a7 2162 * Unless the VF is privileged and then it can do whatever.
5017c2a8
GR		 2163 * The VF may request to set the MAC address filter already
2164 * assigned to it so do not return an error in that case.
f657a6e1
GR		 2165 */
2166 dev_err(&pf->pdev->dev,
692fb0a7 2167 "VF attempting to override administratively set MAC address, reload the VF driver to resume normal operation\n");
f657a6e1 2168 ret = -EPERM;
5f527ba9
ASJ		 2169 } else if ((vf->num_mac >= I40E_VC_MAX_MAC_ADDR_PER_VF) &&
2170 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2171 dev_err(&pf->pdev->dev,
2172 "VF is not trusted, switch the VF to trusted to add more functionality\n");
2173 ret = -EPERM;
f657a6e1
GR		 2174 }
2175 return ret;
2176}
2177
5c3c48ac
JB		 2178/**
2179 * i40e_vc_add_mac_addr_msg
b40c82e6 2180 * @vf: pointer to the VF info
5c3c48ac
JB		 2181 * @msg: pointer to the msg buffer
2182 * @msglen: msg length
2183 *
2184 * add guest mac address filter
2185 **/
2186static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2187{
310a2ad9
JB		 2188 struct virtchnl_ether_addr_list *al =
2189 (struct virtchnl_ether_addr_list *)msg;
5c3c48ac
JB		 2190 struct i40e_pf *pf = vf->pf;
2191 struct i40e_vsi *vsi = NULL;
2192 u16 vsi_id = al->vsi_id;
f657a6e1 2193 i40e_status ret = 0;
5c3c48ac
JB		 2194 int i;
2195
6322e63c 2196 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac 2197 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 2198 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2199 goto error_param;
2200 }
2201
2202 for (i = 0; i < al->num_elements; i++) {
f657a6e1
GR		 2203 ret = i40e_check_vf_permission(vf, al->list[i].addr);
2204 if (ret)
5c3c48ac 2205 goto error_param;
5c3c48ac 2206 }
fdf0e0bf 2207 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2208
21659035
KP		 2209 /* Lock once, because all function inside for loop accesses VSI's
2210 * MAC filter list which needs to be protected using same lock.
2211 */
278e7d0b 2212 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 2213
5c3c48ac
JB		 2214 /* add new addresses to the list */
2215 for (i = 0; i < al->num_elements; i++) {
2216 struct i40e_mac_filter *f;
2217
1bc87e80 2218 f = i40e_find_mac(vsi, al->list[i].addr);
7aaf9536 2219 if (!f)
feffdbe4 2220 f = i40e_add_mac_filter(vsi, al->list[i].addr);
5c3c48ac
JB		 2221
2222 if (!f) {
2223 dev_err(&pf->pdev->dev,
8d8f2295
MW		 2224 "Unable to add MAC filter %pM for VF %d\n",
2225 al->list[i].addr, vf->vf_id);
f657a6e1 2226 ret = I40E_ERR_PARAM;
278e7d0b 2227 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac 2228 goto error_param;
5f527ba9
ASJ		 2229 } else {
2230 vf->num_mac++;
5c3c48ac
JB		 2231 }
2232 }
278e7d0b 2233 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2234
2235 /* program the updated filter list */
ea02e90b
MW		 2236 ret = i40e_sync_vsi_filters(vsi);
2237 if (ret)
2238 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2239 vf->vf_id, ret);
5c3c48ac
JB		 2240
2241error_param:
b40c82e6 2242 /* send the response to the VF */
310a2ad9 2243 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_ETH_ADDR,
f657a6e1 2244 ret);
5c3c48ac
JB		 2245}
2246
2247/**
2248 * i40e_vc_del_mac_addr_msg
b40c82e6 2249 * @vf: pointer to the VF info
5c3c48ac
JB		 2250 * @msg: pointer to the msg buffer
2251 * @msglen: msg length
2252 *
2253 * remove guest mac address filter
2254 **/
2255static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2256{
310a2ad9
JB		 2257 struct virtchnl_ether_addr_list *al =
2258 (struct virtchnl_ether_addr_list *)msg;
5c3c48ac
JB		 2259 struct i40e_pf *pf = vf->pf;
2260 struct i40e_vsi *vsi = NULL;
2261 u16 vsi_id = al->vsi_id;
f657a6e1 2262 i40e_status ret = 0;
5c3c48ac
JB		 2263 int i;
2264
6322e63c 2265 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac 2266 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 2267 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2268 goto error_param;
2269 }
f657a6e1
GR		 2270
2271 for (i = 0; i < al->num_elements; i++) {
700bbf6c
MW		 2272 if (is_broadcast_ether_addr(al->list[i].addr) ||
2273 is_zero_ether_addr(al->list[i].addr)) {
8d8f2295
MW		 2274 dev_err(&pf->pdev->dev, "Invalid MAC addr %pM for VF %d\n",
2275 al->list[i].addr, vf->vf_id);
700bbf6c 2276 ret = I40E_ERR_INVALID_MAC_ADDR;
f657a6e1 2277 goto error_param;
700bbf6c 2278 }
f657a6e1 2279 }
fdf0e0bf 2280 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2281
278e7d0b 2282 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2283 /* delete addresses from the list */
2284 for (i = 0; i < al->num_elements; i++)
feffdbe4 2285 if (i40e_del_mac_filter(vsi, al->list[i].addr)) {
b36e9ab5 2286 ret = I40E_ERR_INVALID_MAC_ADDR;
278e7d0b 2287 spin_unlock_bh(&vsi->mac_filter_hash_lock);
b36e9ab5 2288 goto error_param;
5f527ba9
ASJ		 2289 } else {
2290 vf->num_mac--;
b36e9ab5
MW		 2291 }
2292
278e7d0b 2293 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2294
2295 /* program the updated filter list */
ea02e90b
MW		 2296 ret = i40e_sync_vsi_filters(vsi);
2297 if (ret)
2298 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2299 vf->vf_id, ret);
5c3c48ac
JB		 2300
2301error_param:
b40c82e6 2302 /* send the response to the VF */
310a2ad9 2303 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_ETH_ADDR,
f657a6e1 2304 ret);
5c3c48ac
JB		 2305}
2306
2307/**
2308 * i40e_vc_add_vlan_msg
b40c82e6 2309 * @vf: pointer to the VF info
5c3c48ac
JB		 2310 * @msg: pointer to the msg buffer
2311 * @msglen: msg length
2312 *
2313 * program guest vlan id
2314 **/
2315static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2316{
310a2ad9
JB		 2317 struct virtchnl_vlan_filter_list *vfl =
2318 (struct virtchnl_vlan_filter_list *)msg;
5c3c48ac
JB		 2319 struct i40e_pf *pf = vf->pf;
2320 struct i40e_vsi *vsi = NULL;
2321 u16 vsi_id = vfl->vsi_id;
2322 i40e_status aq_ret = 0;
2323 int i;
2324
5f527ba9
ASJ		 2325 if ((vf->num_vlan >= I40E_VC_MAX_VLAN_PER_VF) &&
2326 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2327 dev_err(&pf->pdev->dev,
2328 "VF is not trusted, switch the VF to trusted to add more VLAN addresses\n");
2329 goto error_param;
2330 }
6322e63c 2331 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2332 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2333 aq_ret = I40E_ERR_PARAM;
2334 goto error_param;
2335 }
2336
2337 for (i = 0; i < vfl->num_elements; i++) {
2338 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2339 aq_ret = I40E_ERR_PARAM;
2340 dev_err(&pf->pdev->dev,
2341 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
2342 goto error_param;
2343 }
2344 }
fdf0e0bf 2345 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2346 if (vsi->info.pvid) {
2347 aq_ret = I40E_ERR_PARAM;
2348 goto error_param;
2349 }
2350
2351 i40e_vlan_stripping_enable(vsi);
2352 for (i = 0; i < vfl->num_elements; i++) {
2353 /* add new VLAN filter */
2354 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
5f527ba9
ASJ		 2355 if (!ret)
2356 vf->num_vlan++;
6995b36c 2357
6322e63c 2358 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2359 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2360 true,
2361 vfl->vlan_id[i],
2362 NULL);
6322e63c 2363 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2364 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2365 true,
2366 vfl->vlan_id[i],
2367 NULL);
2368
5c3c48ac
JB		 2369 if (ret)
2370 dev_err(&pf->pdev->dev,
8d8f2295
MW		 2371 "Unable to add VLAN filter %d for VF %d, error %d\n",
2372 vfl->vlan_id[i], vf->vf_id, ret);
5c3c48ac
JB		 2373 }
2374
2375error_param:
b40c82e6 2376 /* send the response to the VF */
310a2ad9 2377 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_VLAN, aq_ret);
5c3c48ac
JB		 2378}
2379
2380/**
2381 * i40e_vc_remove_vlan_msg
b40c82e6 2382 * @vf: pointer to the VF info
5c3c48ac
JB		 2383 * @msg: pointer to the msg buffer
2384 * @msglen: msg length
2385 *
2386 * remove programmed guest vlan id
2387 **/
2388static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2389{
310a2ad9
JB		 2390 struct virtchnl_vlan_filter_list *vfl =
2391 (struct virtchnl_vlan_filter_list *)msg;
5c3c48ac
JB		 2392 struct i40e_pf *pf = vf->pf;
2393 struct i40e_vsi *vsi = NULL;
2394 u16 vsi_id = vfl->vsi_id;
2395 i40e_status aq_ret = 0;
2396 int i;
2397
6322e63c 2398 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2399 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2400 aq_ret = I40E_ERR_PARAM;
2401 goto error_param;
2402 }
2403
2404 for (i = 0; i < vfl->num_elements; i++) {
2405 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2406 aq_ret = I40E_ERR_PARAM;
2407 goto error_param;
2408 }
2409 }
2410
fdf0e0bf 2411 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2412 if (vsi->info.pvid) {
2413 aq_ret = I40E_ERR_PARAM;
2414 goto error_param;
2415 }
2416
2417 for (i = 0; i < vfl->num_elements; i++) {
3aa7b74d
FS		 2418 i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
2419 vf->num_vlan--;
6995b36c 2420
6322e63c 2421 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2422 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2423 false,
2424 vfl->vlan_id[i],
2425 NULL);
6322e63c 2426 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2427 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2428 false,
2429 vfl->vlan_id[i],
2430 NULL);
5c3c48ac
JB		 2431 }
2432
2433error_param:
b40c82e6 2434 /* send the response to the VF */
310a2ad9 2435 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_VLAN, aq_ret);
5c3c48ac
JB		 2436}
2437
e3219ce6
ASJ		 2438/**
2439 * i40e_vc_iwarp_msg
2440 * @vf: pointer to the VF info
2441 * @msg: pointer to the msg buffer
2442 * @msglen: msg length
2443 *
2444 * called from the VF for the iwarp msgs
2445 **/
2446static int i40e_vc_iwarp_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2447{
2448 struct i40e_pf *pf = vf->pf;
2449 int abs_vf_id = vf->vf_id + pf->hw.func_caps.vf_base_id;
2450 i40e_status aq_ret = 0;
2451
6322e63c
JK		 2452 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2453 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2454 aq_ret = I40E_ERR_PARAM;
2455 goto error_param;
2456 }
2457
2458 i40e_notify_client_of_vf_msg(pf->vsi[pf->lan_vsi], abs_vf_id,
2459 msg, msglen);
2460
2461error_param:
2462 /* send the response to the VF */
310a2ad9 2463 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_IWARP,
e3219ce6
ASJ		 2464 aq_ret);
2465}
2466
2467/**
2468 * i40e_vc_iwarp_qvmap_msg
2469 * @vf: pointer to the VF info
2470 * @msg: pointer to the msg buffer
2471 * @msglen: msg length
2472 * @config: config qvmap or release it
2473 *
2474 * called from the VF for the iwarp msgs
2475 **/
2476static int i40e_vc_iwarp_qvmap_msg(struct i40e_vf *vf, u8 *msg, u16 msglen,
2477 bool config)
2478{
310a2ad9
JB		 2479 struct virtchnl_iwarp_qvlist_info *qvlist_info =
2480 (struct virtchnl_iwarp_qvlist_info *)msg;
e3219ce6
ASJ		 2481 i40e_status aq_ret = 0;
2482
6322e63c
JK		 2483 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2484 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2485 aq_ret = I40E_ERR_PARAM;
2486 goto error_param;
2487 }
2488
2489 if (config) {
2490 if (i40e_config_iwarp_qvlist(vf, qvlist_info))
2491 aq_ret = I40E_ERR_PARAM;
2492 } else {
2493 i40e_release_iwarp_qvlist(vf);
2494 }
2495
2496error_param:
2497 /* send the response to the VF */
2498 return i40e_vc_send_resp_to_vf(vf,
310a2ad9
JB		 2499 config ? VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP :
2500 VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP,
e3219ce6
ASJ		 2501 aq_ret);
2502}
2503
c4e1868c
MW		 2504/**
2505 * i40e_vc_config_rss_key
2506 * @vf: pointer to the VF info
2507 * @msg: pointer to the msg buffer
2508 * @msglen: msg length
2509 *
2510 * Configure the VF's RSS key
2511 **/
2512static int i40e_vc_config_rss_key(struct i40e_vf *vf, u8 *msg, u16 msglen)
2513{
310a2ad9
JB		 2514 struct virtchnl_rss_key *vrk =
2515 (struct virtchnl_rss_key *)msg;
c4e1868c
MW		 2516 struct i40e_pf *pf = vf->pf;
2517 struct i40e_vsi *vsi = NULL;
2518 u16 vsi_id = vrk->vsi_id;
2519 i40e_status aq_ret = 0;
2520
6322e63c 2521 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2522 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2523 (vrk->key_len != I40E_HKEY_ARRAY_SIZE)) {
2524 aq_ret = I40E_ERR_PARAM;
2525 goto err;
2526 }
2527
2528 vsi = pf->vsi[vf->lan_vsi_idx];
2529 aq_ret = i40e_config_rss(vsi, vrk->key, NULL, 0);
2530err:
2531 /* send the response to the VF */
310a2ad9 2532 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_KEY,
c4e1868c
MW		 2533 aq_ret);
2534}
2535
2536/**
2537 * i40e_vc_config_rss_lut
2538 * @vf: pointer to the VF info
2539 * @msg: pointer to the msg buffer
2540 * @msglen: msg length
2541 *
2542 * Configure the VF's RSS LUT
2543 **/
2544static int i40e_vc_config_rss_lut(struct i40e_vf *vf, u8 *msg, u16 msglen)
2545{
310a2ad9
JB		 2546 struct virtchnl_rss_lut *vrl =
2547 (struct virtchnl_rss_lut *)msg;
c4e1868c
MW		 2548 struct i40e_pf *pf = vf->pf;
2549 struct i40e_vsi *vsi = NULL;
2550 u16 vsi_id = vrl->vsi_id;
2551 i40e_status aq_ret = 0;
2552
6322e63c 2553 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2554 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2555 (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)) {
2556 aq_ret = I40E_ERR_PARAM;
2557 goto err;
2558 }
2559
2560 vsi = pf->vsi[vf->lan_vsi_idx];
2561 aq_ret = i40e_config_rss(vsi, NULL, vrl->lut, I40E_VF_HLUT_ARRAY_SIZE);
2562 /* send the response to the VF */
2563err:
310a2ad9 2564 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_LUT,
c4e1868c
MW		 2565 aq_ret);
2566}
2567
2568/**
2569 * i40e_vc_get_rss_hena
2570 * @vf: pointer to the VF info
2571 * @msg: pointer to the msg buffer
2572 * @msglen: msg length
2573 *
2574 * Return the RSS HENA bits allowed by the hardware
2575 **/
2576static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
2577{
310a2ad9 2578 struct virtchnl_rss_hena *vrh = NULL;
c4e1868c
MW		 2579 struct i40e_pf *pf = vf->pf;
2580 i40e_status aq_ret = 0;
2581 int len = 0;
2582
6322e63c 2583 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2584 aq_ret = I40E_ERR_PARAM;
2585 goto err;
2586 }
310a2ad9 2587 len = sizeof(struct virtchnl_rss_hena);
c4e1868c
MW		 2588
2589 vrh = kzalloc(len, GFP_KERNEL);
2590 if (!vrh) {
2591 aq_ret = I40E_ERR_NO_MEMORY;
2592 len = 0;
2593 goto err;
2594 }
2595 vrh->hena = i40e_pf_get_default_rss_hena(pf);
2596err:
2597 /* send the response back to the VF */
310a2ad9 2598 aq_ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_RSS_HENA_CAPS,
c4e1868c 2599 aq_ret, (u8 *)vrh, len);
b7d2cd95 2600 kfree(vrh);
c4e1868c
MW		 2601 return aq_ret;
2602}
2603
2604/**
2605 * i40e_vc_set_rss_hena
2606 * @vf: pointer to the VF info
2607 * @msg: pointer to the msg buffer
2608 * @msglen: msg length
2609 *
2610 * Set the RSS HENA bits for the VF
2611 **/
2612static int i40e_vc_set_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
2613{
310a2ad9
JB		 2614 struct virtchnl_rss_hena *vrh =
2615 (struct virtchnl_rss_hena *)msg;
c4e1868c
MW		 2616 struct i40e_pf *pf = vf->pf;
2617 struct i40e_hw *hw = &pf->hw;
2618 i40e_status aq_ret = 0;
2619
6322e63c 2620 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2621 aq_ret = I40E_ERR_PARAM;
2622 goto err;
2623 }
2624 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)vrh->hena);
2625 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_id),
2626 (u32)(vrh->hena >> 32));
2627
2628 /* send the response to the VF */
2629err:
f0adc6e8 2630 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_SET_RSS_HENA, aq_ret);
c4e1868c
MW		 2631}
2632
8774370d
MS		 2633/**
2634 * i40e_vc_enable_vlan_stripping
2635 * @vf: pointer to the VF info
2636 * @msg: pointer to the msg buffer
2637 * @msglen: msg length
2638 *
2639 * Enable vlan header stripping for the VF
2640 **/
2641static int i40e_vc_enable_vlan_stripping(struct i40e_vf *vf, u8 *msg,
2642 u16 msglen)
2643{
2644 struct i40e_vsi *vsi = vf->pf->vsi[vf->lan_vsi_idx];
2645 i40e_status aq_ret = 0;
2646
2647 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
2648 aq_ret = I40E_ERR_PARAM;
2649 goto err;
2650 }
2651
2652 i40e_vlan_stripping_enable(vsi);
2653
2654 /* send the response to the VF */
2655err:
2656 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_VLAN_STRIPPING,
2657 aq_ret);
2658}
2659
2660/**
2661 * i40e_vc_disable_vlan_stripping
2662 * @vf: pointer to the VF info
2663 * @msg: pointer to the msg buffer
2664 * @msglen: msg length
2665 *
2666 * Disable vlan header stripping for the VF
2667 **/
2668static int i40e_vc_disable_vlan_stripping(struct i40e_vf *vf, u8 *msg,
2669 u16 msglen)
2670{
2671 struct i40e_vsi *vsi = vf->pf->vsi[vf->lan_vsi_idx];
2672 i40e_status aq_ret = 0;
2673
2674 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
2675 aq_ret = I40E_ERR_PARAM;
2676 goto err;
2677 }
2678
2679 i40e_vlan_stripping_disable(vsi);
2680
2681 /* send the response to the VF */
2682err:
2683 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_VLAN_STRIPPING,
2684 aq_ret);
2685}
2686
5c3c48ac
JB		 2687/**
2688 * i40e_vc_process_vf_msg
b40c82e6
JK		 2689 * @pf: pointer to the PF structure
2690 * @vf_id: source VF id
5c3c48ac
JB		 2691 * @msg: pointer to the msg buffer
2692 * @msglen: msg length
2693 * @msghndl: msg handle
2694 *
2695 * called from the common aeq/arq handler to
b40c82e6 2696 * process request from VF
5c3c48ac 2697 **/
a1b5a24f 2698int i40e_vc_process_vf_msg(struct i40e_pf *pf, s16 vf_id, u32 v_opcode,
5c3c48ac
JB		 2699 u32 v_retval, u8 *msg, u16 msglen)
2700{
5c3c48ac 2701 struct i40e_hw *hw = &pf->hw;
a1b5a24f 2702 int local_vf_id = vf_id - (s16)hw->func_caps.vf_base_id;
6c1b5bff 2703 struct i40e_vf *vf;
5c3c48ac
JB		 2704 int ret;
2705
2706 pf->vf_aq_requests++;
7efa84b7 2707 if (local_vf_id >= pf->num_alloc_vfs)
6c1b5bff 2708 return -EINVAL;
7efa84b7 2709 vf = &(pf->vf[local_vf_id]);
260e9382
JB		 2710
2711 /* Check if VF is disabled. */
2712 if (test_bit(I40E_VF_STATE_DISABLED, &vf->vf_states))
2713 return I40E_ERR_PARAM;
2714
5c3c48ac 2715 /* perform basic checks on the msg */
735e35c5 2716 ret = virtchnl_vc_validate_vf_msg(&vf->vf_ver, v_opcode, msg, msglen);
5c3c48ac 2717
260e9382
JB		 2718 /* perform additional checks specific to this driver */
2719 if (v_opcode == VIRTCHNL_OP_CONFIG_RSS_KEY) {
2720 struct virtchnl_rss_key *vrk = (struct virtchnl_rss_key *)msg;
2721
2722 if (vrk->key_len != I40E_HKEY_ARRAY_SIZE)
2723 ret = -EINVAL;
2724 } else if (v_opcode == VIRTCHNL_OP_CONFIG_RSS_LUT) {
2725 struct virtchnl_rss_lut *vrl = (struct virtchnl_rss_lut *)msg;
2726
2727 if (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)
2728 ret = -EINVAL;
2729 }
2730
5c3c48ac 2731 if (ret) {
764430ce 2732 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
b40c82e6 2733 dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n",
7efa84b7 2734 local_vf_id, v_opcode, msglen);
764430ce
JB		 2735 switch (ret) {
2736 case VIRTCHNL_ERR_PARAM:
2737 return -EPERM;
2738 default:
2739 return -EINVAL;
2740 }
5c3c48ac 2741 }
bae3cae4 2742
5c3c48ac 2743 switch (v_opcode) {
310a2ad9 2744 case VIRTCHNL_OP_VERSION:
f4ca1a22 2745 ret = i40e_vc_get_version_msg(vf, msg);
5c3c48ac 2746 break;
310a2ad9 2747 case VIRTCHNL_OP_GET_VF_RESOURCES:
f4ca1a22 2748 ret = i40e_vc_get_vf_resources_msg(vf, msg);
5c3c48ac 2749 break;
310a2ad9 2750 case VIRTCHNL_OP_RESET_VF:
fc18eaa0
MW		 2751 i40e_vc_reset_vf_msg(vf);
2752 ret = 0;
5c3c48ac 2753 break;
310a2ad9 2754 case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
5c3c48ac
JB		 2755 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen);
2756 break;
310a2ad9 2757 case VIRTCHNL_OP_CONFIG_VSI_QUEUES:
5c3c48ac
JB		 2758 ret = i40e_vc_config_queues_msg(vf, msg, msglen);
2759 break;
310a2ad9 2760 case VIRTCHNL_OP_CONFIG_IRQ_MAP:
5c3c48ac
JB		 2761 ret = i40e_vc_config_irq_map_msg(vf, msg, msglen);
2762 break;
310a2ad9 2763 case VIRTCHNL_OP_ENABLE_QUEUES:
5c3c48ac 2764 ret = i40e_vc_enable_queues_msg(vf, msg, msglen);
055b295d 2765 i40e_vc_notify_vf_link_state(vf);
5c3c48ac 2766 break;
310a2ad9 2767 case VIRTCHNL_OP_DISABLE_QUEUES:
5c3c48ac
JB		 2768 ret = i40e_vc_disable_queues_msg(vf, msg, msglen);
2769 break;
310a2ad9 2770 case VIRTCHNL_OP_ADD_ETH_ADDR:
5c3c48ac
JB		 2771 ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen);
2772 break;
310a2ad9 2773 case VIRTCHNL_OP_DEL_ETH_ADDR:
5c3c48ac
JB		 2774 ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen);
2775 break;
310a2ad9 2776 case VIRTCHNL_OP_ADD_VLAN:
5c3c48ac
JB		 2777 ret = i40e_vc_add_vlan_msg(vf, msg, msglen);
2778 break;
310a2ad9 2779 case VIRTCHNL_OP_DEL_VLAN:
5c3c48ac
JB		 2780 ret = i40e_vc_remove_vlan_msg(vf, msg, msglen);
2781 break;
310a2ad9 2782 case VIRTCHNL_OP_GET_STATS:
5c3c48ac
JB		 2783 ret = i40e_vc_get_stats_msg(vf, msg, msglen);
2784 break;
310a2ad9 2785 case VIRTCHNL_OP_IWARP:
e3219ce6
ASJ		 2786 ret = i40e_vc_iwarp_msg(vf, msg, msglen);
2787 break;
310a2ad9 2788 case VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
e3219ce6
ASJ		 2789 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, true);
2790 break;
310a2ad9 2791 case VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
e3219ce6
ASJ		 2792 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, false);
2793 break;
310a2ad9 2794 case VIRTCHNL_OP_CONFIG_RSS_KEY:
c4e1868c
MW		 2795 ret = i40e_vc_config_rss_key(vf, msg, msglen);
2796 break;
310a2ad9 2797 case VIRTCHNL_OP_CONFIG_RSS_LUT:
c4e1868c
MW		 2798 ret = i40e_vc_config_rss_lut(vf, msg, msglen);
2799 break;
310a2ad9 2800 case VIRTCHNL_OP_GET_RSS_HENA_CAPS:
c4e1868c
MW		 2801 ret = i40e_vc_get_rss_hena(vf, msg, msglen);
2802 break;
310a2ad9 2803 case VIRTCHNL_OP_SET_RSS_HENA:
c4e1868c
MW		 2804 ret = i40e_vc_set_rss_hena(vf, msg, msglen);
2805 break;
8774370d
MS		 2806 case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING:
2807 ret = i40e_vc_enable_vlan_stripping(vf, msg, msglen);
2808 break;
2809 case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING:
2810 ret = i40e_vc_disable_vlan_stripping(vf, msg, msglen);
2811 break;
a3f5aa90
AB		 2812 case VIRTCHNL_OP_REQUEST_QUEUES:
2813 ret = i40e_vc_request_queues_msg(vf, msg, msglen);
2814 break;
c4e1868c 2815
310a2ad9 2816 case VIRTCHNL_OP_UNKNOWN:
5c3c48ac 2817 default:
b40c82e6 2818 dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n",
7efa84b7 2819 v_opcode, local_vf_id);
5c3c48ac
JB		 2820 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
2821 I40E_ERR_NOT_IMPLEMENTED);
2822 break;
2823 }
2824
2825 return ret;
2826}
2827
2828/**
2829 * i40e_vc_process_vflr_event
b40c82e6 2830 * @pf: pointer to the PF structure
5c3c48ac
JB		 2831 *
2832 * called from the vlfr irq handler to
b40c82e6 2833 * free up VF resources and state variables
5c3c48ac
JB		 2834 **/
2835int i40e_vc_process_vflr_event(struct i40e_pf *pf)
2836{
5c3c48ac 2837 struct i40e_hw *hw = &pf->hw;
a1b5a24f 2838 u32 reg, reg_idx, bit_idx;
5c3c48ac 2839 struct i40e_vf *vf;
a1b5a24f 2840 int vf_id;
5c3c48ac 2841
0da36b97 2842 if (!test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
5c3c48ac
JB		 2843 return 0;
2844
0d790327
MW		 2845 /* Re-enable the VFLR interrupt cause here, before looking for which
2846 * VF got reset. Otherwise, if another VF gets a reset while the
2847 * first one is being processed, that interrupt will be lost, and
2848 * that VF will be stuck in reset forever.
2849 */
c5c2f7c3
MW		 2850 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
2851 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
2852 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
2853 i40e_flush(hw);
2854
0da36b97 2855 clear_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
5c3c48ac
JB		 2856 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
2857 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
2858 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
b40c82e6 2859 /* read GLGEN_VFLRSTAT register to find out the flr VFs */
5c3c48ac
JB		 2860 vf = &pf->vf[vf_id];
2861 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
7369ca87 2862 if (reg & BIT(bit_idx))
7e5a313e 2863 /* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */
7369ca87 2864 i40e_reset_vf(vf, true);
5c3c48ac
JB		 2865 }
2866
5c3c48ac
JB		 2867 return 0;
2868}
2869
5c3c48ac
JB		 2870/**
2871 * i40e_ndo_set_vf_mac
2872 * @netdev: network interface device structure
b40c82e6 2873 * @vf_id: VF identifier
5c3c48ac
JB		 2874 * @mac: mac address
2875 *
b40c82e6 2876 * program VF mac address
5c3c48ac
JB		 2877 **/
2878int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
2879{
2880 struct i40e_netdev_priv *np = netdev_priv(netdev);
2881 struct i40e_vsi *vsi = np->vsi;
2882 struct i40e_pf *pf = vsi->back;
2883 struct i40e_mac_filter *f;
2884 struct i40e_vf *vf;
2885 int ret = 0;
784548c4 2886 struct hlist_node *h;
278e7d0b 2887 int bkt;
5c3c48ac
JB		 2888
2889 /* validate the request */
2890 if (vf_id >= pf->num_alloc_vfs) {
2891 dev_err(&pf->pdev->dev,
2892 "Invalid VF Identifier %d\n", vf_id);
2893 ret = -EINVAL;
2894 goto error_param;
2895 }
2896
2897 vf = &(pf->vf[vf_id]);
fdf0e0bf 2898 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 2899 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 2900 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2901 vf_id);
2902 ret = -EAGAIN;
5c3c48ac
JB		 2903 goto error_param;
2904 }
2905
efd8e39a 2906 if (is_multicast_ether_addr(mac)) {
5c3c48ac 2907 dev_err(&pf->pdev->dev,
efd8e39a 2908 "Invalid Ethernet address %pM for VF %d\n", mac, vf_id);
5c3c48ac
JB		 2909 ret = -EINVAL;
2910 goto error_param;
2911 }
2912
21659035 2913 /* Lock once because below invoked function add/del_filter requires
278e7d0b 2914 * mac_filter_hash_lock to be held
21659035 2915 */
278e7d0b 2916 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 2917
5c3c48ac 2918 /* delete the temporary mac address */
efd8e39a 2919 if (!is_zero_ether_addr(vf->default_lan_addr.addr))
9569a9a4 2920 i40e_del_mac_filter(vsi, vf->default_lan_addr.addr);
5c3c48ac 2921
29f71bb0
GR		 2922 /* Delete all the filters for this VSI - we're going to kill it
2923 * anyway.
2924 */
784548c4 2925 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
148141bb 2926 __i40e_del_filter(vsi, f);
5c3c48ac 2927
278e7d0b 2928 spin_unlock_bh(&vsi->mac_filter_hash_lock);
21659035 2929
5c3c48ac 2930 /* program mac filter */
17652c63 2931 if (i40e_sync_vsi_filters(vsi)) {
5c3c48ac
JB		 2932 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
2933 ret = -EIO;
2934 goto error_param;
2935 }
9a173901 2936 ether_addr_copy(vf->default_lan_addr.addr, mac);
2f1d86e4
SA		 2937
2938 if (is_zero_ether_addr(mac)) {
2939 vf->pf_set_mac = false;
2940 dev_info(&pf->pdev->dev, "Removing MAC on VF %d\n", vf_id);
2941 } else {
2942 vf->pf_set_mac = true;
2943 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n",
2944 mac, vf_id);
2945 }
2946
17413a80 2947 /* Force the VF driver stop so it has to reload with new MAC address */
eeeddbb8 2948 i40e_vc_disable_vf(vf);
5c3c48ac 2949 dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n");
5c3c48ac
JB		 2950
2951error_param:
2952 return ret;
2953}
2954
ba4e003d
JK		 2955/**
2956 * i40e_vsi_has_vlans - True if VSI has configured VLANs
2957 * @vsi: pointer to the vsi
2958 *
2959 * Check if a VSI has configured any VLANs. False if we have a port VLAN or if
2960 * we have no configured VLANs. Do not call while holding the
2961 * mac_filter_hash_lock.
2962 */
2963static bool i40e_vsi_has_vlans(struct i40e_vsi *vsi)
2964{
2965 bool have_vlans;
2966
2967 /* If we have a port VLAN, then the VSI cannot have any VLANs
2968 * configured, as all MAC/VLAN filters will be assigned to the PVID.
2969 */
2970 if (vsi->info.pvid)
2971 return false;
2972
2973 /* Since we don't have a PVID, we know that if the device is in VLAN
2974 * mode it must be because of a VLAN filter configured on this VSI.
2975 */
2976 spin_lock_bh(&vsi->mac_filter_hash_lock);
2977 have_vlans = i40e_is_vsi_in_vlan(vsi);
2978 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2979
2980 return have_vlans;
2981}
2982
5c3c48ac
JB		 2983/**
2984 * i40e_ndo_set_vf_port_vlan
2985 * @netdev: network interface device structure
b40c82e6 2986 * @vf_id: VF identifier
5c3c48ac
JB		 2987 * @vlan_id: mac address
2988 * @qos: priority setting
79aab093 2989 * @vlan_proto: vlan protocol
5c3c48ac 2990 *
b40c82e6 2991 * program VF vlan id and/or qos
5c3c48ac 2992 **/
79aab093
MS		 2993int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, int vf_id,
2994 u16 vlan_id, u8 qos, __be16 vlan_proto)
5c3c48ac 2995{
f7fc2f2e 2996 u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT);
5c3c48ac
JB		 2997 struct i40e_netdev_priv *np = netdev_priv(netdev);
2998 struct i40e_pf *pf = np->vsi->back;
2999 struct i40e_vsi *vsi;
3000 struct i40e_vf *vf;
3001 int ret = 0;
3002
3003 /* validate the request */
3004 if (vf_id >= pf->num_alloc_vfs) {
3005 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3006 ret = -EINVAL;
3007 goto error_pvid;
3008 }
3009
3010 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
3011 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
3012 ret = -EINVAL;
3013 goto error_pvid;
3014 }
3015
79aab093
MS		 3016 if (vlan_proto != htons(ETH_P_8021Q)) {
3017 dev_err(&pf->pdev->dev, "VF VLAN protocol is not supported\n");
3018 ret = -EPROTONOSUPPORT;
3019 goto error_pvid;
3020 }
3021
5c3c48ac 3022 vf = &(pf->vf[vf_id]);
fdf0e0bf 3023 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 3024 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3025 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3026 vf_id);
3027 ret = -EAGAIN;
5c3c48ac
JB		 3028 goto error_pvid;
3029 }
3030
f7fc2f2e 3031 if (le16_to_cpu(vsi->info.pvid) == vlanprio)
85927ec1
MW		 3032 /* duplicate request, so just return success */
3033 goto error_pvid;
3034
ba4e003d 3035 if (i40e_vsi_has_vlans(vsi)) {
99a4973c
GR		 3036 dev_err(&pf->pdev->dev,
3037 "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
3038 vf_id);
f9b4b627
GR		 3039 /* Administrator Error - knock the VF offline until he does
3040 * the right thing by reconfiguring his network correctly
3041 * and then reloading the VF driver.
3042 */
eeeddbb8 3043 i40e_vc_disable_vf(vf);
35f3472a
MW		 3044 /* During reset the VF got a new VSI, so refresh the pointer. */
3045 vsi = pf->vsi[vf->lan_vsi_idx];
f9b4b627 3046 }
99a4973c 3047
ba4e003d
JK		 3048 /* Locked once because multiple functions below iterate list */
3049 spin_lock_bh(&vsi->mac_filter_hash_lock);
3050
8d82a7c5
GR		 3051 /* Check for condition where there was already a port VLAN ID
3052 * filter set and now it is being deleted by setting it to zero.
1315f7c3
GR		 3053 * Additionally check for the condition where there was a port
3054 * VLAN but now there is a new and different port VLAN being set.
8d82a7c5
GR		 3055 * Before deleting all the old VLAN filters we must add new ones
3056 * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our
3057 * MAC addresses deleted.
3058 */
1315f7c3 3059 if ((!(vlan_id || qos) ||
f7fc2f2e 3060 vlanprio != le16_to_cpu(vsi->info.pvid)) &&
9af52f60
JK		 3061 vsi->info.pvid) {
3062 ret = i40e_add_vlan_all_mac(vsi, I40E_VLAN_ANY);
3063 if (ret) {
3064 dev_info(&vsi->back->pdev->dev,
3065 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
3066 vsi->back->hw.aq.asq_last_status);
3067 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3068 goto error_pvid;
3069 }
3070 }
8d82a7c5 3071
5c3c48ac 3072 if (vsi->info.pvid) {
9af52f60
JK		 3073 /* remove all filters on the old VLAN */
3074 i40e_rm_vlan_all_mac(vsi, (le16_to_cpu(vsi->info.pvid) &
3075 VLAN_VID_MASK));
5c3c48ac 3076 }
9af52f60 3077
640f93cc 3078 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac 3079 if (vlan_id || qos)
f7fc2f2e 3080 ret = i40e_vsi_add_pvid(vsi, vlanprio);
5c3c48ac 3081 else
6c12fcbf 3082 i40e_vsi_remove_pvid(vsi);
640f93cc 3083 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 3084
3085 if (vlan_id) {
3086 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
3087 vlan_id, qos, vf_id);
3088
9af52f60
JK		 3089 /* add new VLAN filter for each MAC */
3090 ret = i40e_add_vlan_all_mac(vsi, vlan_id);
5c3c48ac
JB		 3091 if (ret) {
3092 dev_info(&vsi->back->pdev->dev,
3093 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
3094 vsi->back->hw.aq.asq_last_status);
9af52f60 3095 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 3096 goto error_pvid;
3097 }
9af52f60
JK		 3098
3099 /* remove the previously added non-VLAN MAC filters */
3100 i40e_rm_vlan_all_mac(vsi, I40E_VLAN_ANY);
5c3c48ac
JB		 3101 }
3102
9af52f60
JK		 3103 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3104
3105 /* Schedule the worker thread to take care of applying changes */
3106 i40e_service_event_schedule(vsi->back);
3107
5c3c48ac
JB		 3108 if (ret) {
3109 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
3110 goto error_pvid;
3111 }
9af52f60 3112
6c12fcbf
GR		 3113 /* The Port VLAN needs to be saved across resets the same as the
3114 * default LAN MAC address.
3115 */
3116 vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
5c3c48ac
JB		 3117 ret = 0;
3118
3119error_pvid:
3120 return ret;
3121}
3122
84590fd9
MW		 3123#define I40E_BW_CREDIT_DIVISOR 50 /* 50Mbps per BW credit */
3124#define I40E_MAX_BW_INACTIVE_ACCUM 4 /* device can accumulate 4 credits max */
5c3c48ac
JB		 3125/**
3126 * i40e_ndo_set_vf_bw
3127 * @netdev: network interface device structure
b40c82e6
JK		 3128 * @vf_id: VF identifier
3129 * @tx_rate: Tx rate
5c3c48ac 3130 *
b40c82e6 3131 * configure VF Tx rate
5c3c48ac 3132 **/
ed616689
SC		 3133int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
3134 int max_tx_rate)
5c3c48ac 3135{
6b192891
MW		 3136 struct i40e_netdev_priv *np = netdev_priv(netdev);
3137 struct i40e_pf *pf = np->vsi->back;
3138 struct i40e_vsi *vsi;
3139 struct i40e_vf *vf;
3140 int speed = 0;
3141 int ret = 0;
3142
3143 /* validate the request */
3144 if (vf_id >= pf->num_alloc_vfs) {
3145 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d.\n", vf_id);
3146 ret = -EINVAL;
3147 goto error;
3148 }
3149
ed616689 3150 if (min_tx_rate) {
b40c82e6 3151 dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n",
ed616689
SC		 3152 min_tx_rate, vf_id);
3153 return -EINVAL;
3154 }
3155
6b192891 3156 vf = &(pf->vf[vf_id]);
fdf0e0bf 3157 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 3158 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3159 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3160 vf_id);
3161 ret = -EAGAIN;
6b192891
MW		 3162 goto error;
3163 }
3164
3165 switch (pf->hw.phy.link_info.link_speed) {
3166 case I40E_LINK_SPEED_40GB:
3167 speed = 40000;
3168 break;
3123237a
CW		 3169 case I40E_LINK_SPEED_25GB:
3170 speed = 25000;
3171 break;
07f169c3
MW		 3172 case I40E_LINK_SPEED_20GB:
3173 speed = 20000;
3174 break;
6b192891
MW		 3175 case I40E_LINK_SPEED_10GB:
3176 speed = 10000;
3177 break;
3178 case I40E_LINK_SPEED_1GB:
3179 speed = 1000;
3180 break;
3181 default:
3182 break;
3183 }
3184
ed616689 3185 if (max_tx_rate > speed) {
ff00f3a9 3186 dev_err(&pf->pdev->dev, "Invalid max tx rate %d specified for VF %d.\n",
ed616689 3187 max_tx_rate, vf->vf_id);
6b192891
MW		 3188 ret = -EINVAL;
3189 goto error;
3190 }
3191
dac9b31a
MW		 3192 if ((max_tx_rate < 50) && (max_tx_rate > 0)) {
3193 dev_warn(&pf->pdev->dev, "Setting max Tx rate to minimum usable value of 50Mbps.\n");
3194 max_tx_rate = 50;
3195 }
3196
6b192891 3197 /* Tx rate credits are in values of 50Mbps, 0 is disabled*/
84590fd9
MW		 3198 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
3199 max_tx_rate / I40E_BW_CREDIT_DIVISOR,
3200 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
6b192891 3201 if (ret) {
ed616689 3202 dev_err(&pf->pdev->dev, "Unable to set max tx rate, error code %d.\n",
6b192891
MW		 3203 ret);
3204 ret = -EIO;
3205 goto error;
3206 }
ed616689 3207 vf->tx_rate = max_tx_rate;
6b192891
MW		 3208error:
3209 return ret;
5c3c48ac
JB		 3210}
3211
3212/**
3213 * i40e_ndo_get_vf_config
3214 * @netdev: network interface device structure
b40c82e6
JK		 3215 * @vf_id: VF identifier
3216 * @ivi: VF configuration structure
5c3c48ac 3217 *
b40c82e6 3218 * return VF configuration
5c3c48ac
JB		 3219 **/
3220int i40e_ndo_get_vf_config(struct net_device *netdev,
3221 int vf_id, struct ifla_vf_info *ivi)
3222{
3223 struct i40e_netdev_priv *np = netdev_priv(netdev);
5c3c48ac
JB		 3224 struct i40e_vsi *vsi = np->vsi;
3225 struct i40e_pf *pf = vsi->back;
3226 struct i40e_vf *vf;
3227 int ret = 0;
3228
3229 /* validate the request */
3230 if (vf_id >= pf->num_alloc_vfs) {
3231 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3232 ret = -EINVAL;
3233 goto error_param;
3234 }
3235
3236 vf = &(pf->vf[vf_id]);
3237 /* first vsi is always the LAN vsi */
fdf0e0bf 3238 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 3239 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3240 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3241 vf_id);
3242 ret = -EAGAIN;
5c3c48ac
JB		 3243 goto error_param;
3244 }
3245
3246 ivi->vf = vf_id;
3247
6995b36c 3248 ether_addr_copy(ivi->mac, vf->default_lan_addr.addr);
5c3c48ac 3249
ed616689
SC		 3250 ivi->max_tx_rate = vf->tx_rate;
3251 ivi->min_tx_rate = 0;
5c3c48ac
JB		 3252 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
3253 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
3254 I40E_VLAN_PRIORITY_SHIFT;
84ca55a0
MW		 3255 if (vf->link_forced == false)
3256 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
3257 else if (vf->link_up == true)
3258 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
3259 else
3260 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
c674d125 3261 ivi->spoofchk = vf->spoofchk;
d40062f3 3262 ivi->trusted = vf->trusted;
5c3c48ac
JB		 3263 ret = 0;
3264
3265error_param:
3266 return ret;
3267}
588aefa0
MW		 3268
3269/**
3270 * i40e_ndo_set_vf_link_state
3271 * @netdev: network interface device structure
b40c82e6 3272 * @vf_id: VF identifier
588aefa0
MW		 3273 * @link: required link state
3274 *
3275 * Set the link state of a specified VF, regardless of physical link state
3276 **/
3277int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
3278{
3279 struct i40e_netdev_priv *np = netdev_priv(netdev);
3280 struct i40e_pf *pf = np->vsi->back;
310a2ad9 3281 struct virtchnl_pf_event pfe;
588aefa0
MW		 3282 struct i40e_hw *hw = &pf->hw;
3283 struct i40e_vf *vf;
f19efbb5 3284 int abs_vf_id;
588aefa0
MW		 3285 int ret = 0;
3286
3287 /* validate the request */
3288 if (vf_id >= pf->num_alloc_vfs) {
3289 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3290 ret = -EINVAL;
3291 goto error_out;
3292 }
3293
3294 vf = &pf->vf[vf_id];
f19efbb5 3295 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
588aefa0 3296
310a2ad9 3297 pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
ff3f4cc2 3298 pfe.severity = PF_EVENT_SEVERITY_INFO;
588aefa0
MW		 3299
3300 switch (link) {
3301 case IFLA_VF_LINK_STATE_AUTO:
3302 vf->link_forced = false;
3303 pfe.event_data.link_event.link_status =
3304 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
3305 pfe.event_data.link_event.link_speed =
ff3f4cc2 3306 (enum virtchnl_link_speed)
588aefa0
MW		 3307 pf->hw.phy.link_info.link_speed;
3308 break;
3309 case IFLA_VF_LINK_STATE_ENABLE:
3310 vf->link_forced = true;
3311 vf->link_up = true;
3312 pfe.event_data.link_event.link_status = true;
3313 pfe.event_data.link_event.link_speed = I40E_LINK_SPEED_40GB;
3314 break;
3315 case IFLA_VF_LINK_STATE_DISABLE:
3316 vf->link_forced = true;
3317 vf->link_up = false;
3318 pfe.event_data.link_event.link_status = false;
3319 pfe.event_data.link_event.link_speed = 0;
3320 break;
3321 default:
3322 ret = -EINVAL;
3323 goto error_out;
3324 }
3325 /* Notify the VF of its new link state */
310a2ad9 3326 i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
588aefa0
MW		 3327 0, (u8 *)&pfe, sizeof(pfe), NULL);
3328
3329error_out:
3330 return ret;
3331}
c674d125
MW		 3332
3333/**
3334 * i40e_ndo_set_vf_spoofchk
3335 * @netdev: network interface device structure
b40c82e6 3336 * @vf_id: VF identifier
c674d125
MW		 3337 * @enable: flag to enable or disable feature
3338 *
3339 * Enable or disable VF spoof checking
3340 **/
e6d9004d 3341int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable)
c674d125
MW		 3342{
3343 struct i40e_netdev_priv *np = netdev_priv(netdev);
3344 struct i40e_vsi *vsi = np->vsi;
3345 struct i40e_pf *pf = vsi->back;
3346 struct i40e_vsi_context ctxt;
3347 struct i40e_hw *hw = &pf->hw;
3348 struct i40e_vf *vf;
3349 int ret = 0;
3350
3351 /* validate the request */
3352 if (vf_id >= pf->num_alloc_vfs) {
3353 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3354 ret = -EINVAL;
3355 goto out;
3356 }
3357
3358 vf = &(pf->vf[vf_id]);
6322e63c 3359 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3360 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3361 vf_id);
3362 ret = -EAGAIN;
3363 goto out;
3364 }
c674d125
MW		 3365
3366 if (enable == vf->spoofchk)
3367 goto out;
3368
3369 vf->spoofchk = enable;
3370 memset(&ctxt, 0, sizeof(ctxt));
fdf0e0bf 3371 ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid;
c674d125
MW		 3372 ctxt.pf_num = pf->hw.pf_id;
3373 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
3374 if (enable)
30d71af5
GR		 3375 ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
3376 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
c674d125
MW		 3377 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
3378 if (ret) {
3379 dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
3380 ret);
3381 ret = -EIO;
3382 }
3383out:
3384 return ret;
3385}
c3bbbd20
ASJ		 3386
3387/**
3388 * i40e_ndo_set_vf_trust
3389 * @netdev: network interface device structure of the pf
3390 * @vf_id: VF identifier
3391 * @setting: trust setting
3392 *
3393 * Enable or disable VF trust setting
3394 **/
3395int i40e_ndo_set_vf_trust(struct net_device *netdev, int vf_id, bool setting)
3396{
3397 struct i40e_netdev_priv *np = netdev_priv(netdev);
3398 struct i40e_pf *pf = np->vsi->back;
3399 struct i40e_vf *vf;
3400 int ret = 0;
3401
3402 /* validate the request */
3403 if (vf_id >= pf->num_alloc_vfs) {
3404 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3405 return -EINVAL;
3406 }
3407
3408 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3409 dev_err(&pf->pdev->dev, "Trusted VF not supported in MFP mode.\n");
3410 return -EINVAL;
3411 }
3412
3413 vf = &pf->vf[vf_id];
3414
c3bbbd20
ASJ		 3415 if (setting == vf->trusted)
3416 goto out;
3417
3418 vf->trusted = setting;
f18d2021 3419 i40e_vc_disable_vf(vf);
c3bbbd20
ASJ		 3420 dev_info(&pf->pdev->dev, "VF %u is now %strusted\n",
3421 vf_id, setting ? "" : "un");
3422out:
3423 return ret;
3424}
Linux 6.x block layer and io_uring tree(s)