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i40e/i40evf: Fix for UDP/TCP RSS for X722
[linux-2.6-block.git] / drivers / net / ethernet / intel / i40e / i40e_virtchnl_pf.c
CommitLineData
5c3c48ac
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
51616018 4 * Copyright(c) 2013 - 2015 Intel Corporation.
5c3c48ac
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
5c3c48ac
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#include "i40e.h"
28
532b0455
MW		 29/*********************notification routines***********************/
30
31/**
32 * i40e_vc_vf_broadcast
33 * @pf: pointer to the PF structure
34 * @opcode: operation code
35 * @retval: return value
36 * @msg: pointer to the msg buffer
37 * @msglen: msg length
38 *
39 * send a message to all VFs on a given PF
40 **/
41static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
42 enum i40e_virtchnl_ops v_opcode,
43 i40e_status v_retval, u8 *msg,
44 u16 msglen)
45{
46 struct i40e_hw *hw = &pf->hw;
47 struct i40e_vf *vf = pf->vf;
48 int i;
49
50 for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
51 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
52 /* Not all vfs are enabled so skip the ones that are not */
53 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) &&
54 !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
55 continue;
56
57 /* Ignore return value on purpose - a given VF may fail, but
58 * we need to keep going and send to all of them
59 */
60 i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
61 msg, msglen, NULL);
62 }
63}
64
65/**
66 * i40e_vc_notify_link_state
67 * @vf: pointer to the VF structure
68 *
69 * send a link status message to a single VF
70 **/
71static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf)
72{
73 struct i40e_virtchnl_pf_event pfe;
74 struct i40e_pf *pf = vf->pf;
75 struct i40e_hw *hw = &pf->hw;
76 struct i40e_link_status *ls = &pf->hw.phy.link_info;
77 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
78
79 pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
80 pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
81 if (vf->link_forced) {
82 pfe.event_data.link_event.link_status = vf->link_up;
83 pfe.event_data.link_event.link_speed =
84 (vf->link_up ? I40E_LINK_SPEED_40GB : 0);
85 } else {
86 pfe.event_data.link_event.link_status =
87 ls->link_info & I40E_AQ_LINK_UP;
88 pfe.event_data.link_event.link_speed = ls->link_speed;
89 }
90 i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
91 0, (u8 *)&pfe, sizeof(pfe), NULL);
92}
93
94/**
95 * i40e_vc_notify_link_state
96 * @pf: pointer to the PF structure
97 *
98 * send a link status message to all VFs on a given PF
99 **/
100void i40e_vc_notify_link_state(struct i40e_pf *pf)
101{
102 int i;
103
104 for (i = 0; i < pf->num_alloc_vfs; i++)
105 i40e_vc_notify_vf_link_state(&pf->vf[i]);
106}
107
108/**
109 * i40e_vc_notify_reset
110 * @pf: pointer to the PF structure
111 *
112 * indicate a pending reset to all VFs on a given PF
113 **/
114void i40e_vc_notify_reset(struct i40e_pf *pf)
115{
116 struct i40e_virtchnl_pf_event pfe;
117
118 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
119 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
120 i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, 0,
121 (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event));
122}
123
124/**
125 * i40e_vc_notify_vf_reset
126 * @vf: pointer to the VF structure
127 *
128 * indicate a pending reset to the given VF
129 **/
130void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
131{
132 struct i40e_virtchnl_pf_event pfe;
133 int abs_vf_id;
134
135 /* validate the request */
136 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
137 return;
138
139 /* verify if the VF is in either init or active before proceeding */
140 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) &&
141 !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
142 return;
143
144 abs_vf_id = vf->vf_id + vf->pf->hw.func_caps.vf_base_id;
145
146 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
147 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
148 i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
149 0, (u8 *)&pfe,
150 sizeof(struct i40e_virtchnl_pf_event), NULL);
151}
5c3c48ac
JB		 152/***********************misc routines*****************************/
153
f9b4b627
GR		 154/**
155 * i40e_vc_disable_vf
b40c82e6
JK		 156 * @pf: pointer to the PF info
157 * @vf: pointer to the VF info
f9b4b627
GR		 158 *
159 * Disable the VF through a SW reset
160 **/
161static inline void i40e_vc_disable_vf(struct i40e_pf *pf, struct i40e_vf *vf)
162{
54f455ee
MW		 163 i40e_vc_notify_vf_reset(vf);
164 i40e_reset_vf(vf, false);
f9b4b627
GR		 165}
166
5c3c48ac
JB		 167/**
168 * i40e_vc_isvalid_vsi_id
b40c82e6
JK		 169 * @vf: pointer to the VF info
170 * @vsi_id: VF relative VSI id
5c3c48ac 171 *
b40c82e6 172 * check for the valid VSI id
5c3c48ac 173 **/
fdf0e0bf 174static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id)
5c3c48ac
JB		 175{
176 struct i40e_pf *pf = vf->pf;
fdf0e0bf 177 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 178
fdf0e0bf 179 return (vsi && (vsi->vf_id == vf->vf_id));
5c3c48ac
JB		 180}
181
182/**
183 * i40e_vc_isvalid_queue_id
b40c82e6 184 * @vf: pointer to the VF info
5c3c48ac
JB		 185 * @vsi_id: vsi id
186 * @qid: vsi relative queue id
187 *
188 * check for the valid queue id
189 **/
fdf0e0bf 190static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 191 u8 qid)
192{
193 struct i40e_pf *pf = vf->pf;
fdf0e0bf 194 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 195
fdf0e0bf 196 return (vsi && (qid < vsi->alloc_queue_pairs));
5c3c48ac
JB		 197}
198
199/**
200 * i40e_vc_isvalid_vector_id
b40c82e6
JK		 201 * @vf: pointer to the VF info
202 * @vector_id: VF relative vector id
5c3c48ac
JB		 203 *
204 * check for the valid vector id
205 **/
206static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
207{
208 struct i40e_pf *pf = vf->pf;
209
9347eb77 210 return vector_id < pf->hw.func_caps.num_msix_vectors_vf;
5c3c48ac
JB		 211}
212
213/***********************vf resource mgmt routines*****************/
214
215/**
216 * i40e_vc_get_pf_queue_id
b40c82e6 217 * @vf: pointer to the VF info
fdf0e0bf 218 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 219 * @vsi_queue_id: vsi relative queue id
220 *
b40c82e6 221 * return PF relative queue id
5c3c48ac 222 **/
fdf0e0bf 223static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 224 u8 vsi_queue_id)
225{
226 struct i40e_pf *pf = vf->pf;
fdf0e0bf 227 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac
JB		 228 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
229
fdf0e0bf
ASJ		 230 if (!vsi)
231 return pf_queue_id;
232
5c3c48ac
JB		 233 if (le16_to_cpu(vsi->info.mapping_flags) &
234 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
235 pf_queue_id =
236 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
237 else
238 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
239 vsi_queue_id;
240
241 return pf_queue_id;
242}
243
5c3c48ac
JB		 244/**
245 * i40e_config_irq_link_list
b40c82e6 246 * @vf: pointer to the VF info
fdf0e0bf 247 * @vsi_id: id of VSI as given by the FW
5c3c48ac
JB		 248 * @vecmap: irq map info
249 *
250 * configure irq link list from the map
251 **/
fdf0e0bf 252static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 253 struct i40e_virtchnl_vector_map *vecmap)
254{
255 unsigned long linklistmap = 0, tempmap;
256 struct i40e_pf *pf = vf->pf;
257 struct i40e_hw *hw = &pf->hw;
258 u16 vsi_queue_id, pf_queue_id;
259 enum i40e_queue_type qtype;
260 u16 next_q, vector_id;
261 u32 reg, reg_idx;
262 u16 itr_idx = 0;
263
264 vector_id = vecmap->vector_id;
265 /* setup the head */
266 if (0 == vector_id)
267 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
268 else
269 reg_idx = I40E_VPINT_LNKLSTN(
9347eb77
MW		 270 ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) +
271 (vector_id - 1));
5c3c48ac
JB		 272
273 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
274 /* Special case - No queues mapped on this vector */
275 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
276 goto irq_list_done;
277 }
278 tempmap = vecmap->rxq_map;
4836650b 279 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 280 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
281 vsi_queue_id));
5c3c48ac
JB		 282 }
283
284 tempmap = vecmap->txq_map;
4836650b 285 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 286 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
287 vsi_queue_id + 1));
5c3c48ac
JB		 288 }
289
290 next_q = find_first_bit(&linklistmap,
291 (I40E_MAX_VSI_QP *
292 I40E_VIRTCHNL_SUPPORTED_QTYPES));
b82bc49e
MW		 293 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
294 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
fdf0e0bf 295 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 296 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
297
298 wr32(hw, reg_idx, reg);
299
300 while (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
301 switch (qtype) {
302 case I40E_QUEUE_TYPE_RX:
303 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
304 itr_idx = vecmap->rxitr_idx;
305 break;
306 case I40E_QUEUE_TYPE_TX:
307 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
308 itr_idx = vecmap->txitr_idx;
309 break;
310 default:
311 break;
312 }
313
314 next_q = find_next_bit(&linklistmap,
315 (I40E_MAX_VSI_QP *
316 I40E_VIRTCHNL_SUPPORTED_QTYPES),
317 next_q + 1);
829af3ac
MW		 318 if (next_q <
319 (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
5c3c48ac
JB		 320 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
321 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
fdf0e0bf 322 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id,
5c3c48ac
JB		 323 vsi_queue_id);
324 } else {
325 pf_queue_id = I40E_QUEUE_END_OF_LIST;
326 qtype = 0;
327 }
328
329 /* format for the RQCTL & TQCTL regs is same */
330 reg = (vector_id) |
331 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
332 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
41a1d04b 333 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
5c3c48ac
JB		 334 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
335 wr32(hw, reg_idx, reg);
336 }
337
b8262a6d
ASJ		 338 /* if the vf is running in polling mode and using interrupt zero,
339 * need to disable auto-mask on enabling zero interrupt for VFs.
340 */
341 if ((vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
342 (vector_id == 0)) {
343 reg = rd32(hw, I40E_GLINT_CTL);
344 if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
345 reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
346 wr32(hw, I40E_GLINT_CTL, reg);
347 }
348 }
349
5c3c48ac
JB		 350irq_list_done:
351 i40e_flush(hw);
352}
353
354/**
355 * i40e_config_vsi_tx_queue
b40c82e6 356 * @vf: pointer to the VF info
fdf0e0bf 357 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 358 * @vsi_queue_id: vsi relative queue index
359 * @info: config. info
360 *
361 * configure tx queue
362 **/
fdf0e0bf 363static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 364 u16 vsi_queue_id,
365 struct i40e_virtchnl_txq_info *info)
366{
367 struct i40e_pf *pf = vf->pf;
368 struct i40e_hw *hw = &pf->hw;
369 struct i40e_hmc_obj_txq tx_ctx;
fdf0e0bf 370 struct i40e_vsi *vsi;
5c3c48ac
JB		 371 u16 pf_queue_id;
372 u32 qtx_ctl;
373 int ret = 0;
374
fdf0e0bf
ASJ		 375 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
376 vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac
JB		 377
378 /* clear the context structure first */
379 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
380
381 /* only set the required fields */
382 tx_ctx.base = info->dma_ring_addr / 128;
383 tx_ctx.qlen = info->ring_len;
fdf0e0bf 384 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
5c3c48ac 385 tx_ctx.rdylist_act = 0;
5d29896a
AS		 386 tx_ctx.head_wb_ena = info->headwb_enabled;
387 tx_ctx.head_wb_addr = info->dma_headwb_addr;
5c3c48ac
JB		 388
389 /* clear the context in the HMC */
390 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
391 if (ret) {
392 dev_err(&pf->pdev->dev,
393 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
394 pf_queue_id, ret);
395 ret = -ENOENT;
396 goto error_context;
397 }
398
399 /* set the context in the HMC */
400 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
401 if (ret) {
402 dev_err(&pf->pdev->dev,
403 "Failed to set VF LAN Tx queue context %d error: %d\n",
404 pf_queue_id, ret);
405 ret = -ENOENT;
406 goto error_context;
407 }
408
409 /* associate this queue with the PCI VF function */
410 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
13fd9774 411 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
5c3c48ac
JB		 412 & I40E_QTX_CTL_PF_INDX_MASK);
413 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
414 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
415 & I40E_QTX_CTL_VFVM_INDX_MASK);
416 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
417 i40e_flush(hw);
418
419error_context:
420 return ret;
421}
422
423/**
424 * i40e_config_vsi_rx_queue
b40c82e6 425 * @vf: pointer to the VF info
fdf0e0bf 426 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 427 * @vsi_queue_id: vsi relative queue index
428 * @info: config. info
429 *
430 * configure rx queue
431 **/
fdf0e0bf 432static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 433 u16 vsi_queue_id,
434 struct i40e_virtchnl_rxq_info *info)
435{
436 struct i40e_pf *pf = vf->pf;
437 struct i40e_hw *hw = &pf->hw;
438 struct i40e_hmc_obj_rxq rx_ctx;
439 u16 pf_queue_id;
440 int ret = 0;
441
fdf0e0bf 442 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 443
444 /* clear the context structure first */
445 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
446
447 /* only set the required fields */
448 rx_ctx.base = info->dma_ring_addr / 128;
449 rx_ctx.qlen = info->ring_len;
450
451 if (info->splithdr_enabled) {
452 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
453 I40E_RX_SPLIT_IP |
454 I40E_RX_SPLIT_TCP_UDP |
455 I40E_RX_SPLIT_SCTP;
456 /* header length validation */
457 if (info->hdr_size > ((2 * 1024) - 64)) {
458 ret = -EINVAL;
459 goto error_param;
460 }
461 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
462
463 /* set splitalways mode 10b */
464 rx_ctx.dtype = 0x2;
465 }
466
467 /* databuffer length validation */
468 if (info->databuffer_size > ((16 * 1024) - 128)) {
469 ret = -EINVAL;
470 goto error_param;
471 }
472 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
473
474 /* max pkt. length validation */
475 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
476 ret = -EINVAL;
477 goto error_param;
478 }
479 rx_ctx.rxmax = info->max_pkt_size;
480
481 /* enable 32bytes desc always */
482 rx_ctx.dsize = 1;
483
484 /* default values */
5c3c48ac
JB		 485 rx_ctx.lrxqthresh = 2;
486 rx_ctx.crcstrip = 1;
50d41659 487 rx_ctx.prefena = 1;
c1d11cef 488 rx_ctx.l2tsel = 1;
5c3c48ac
JB		 489
490 /* clear the context in the HMC */
491 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
492 if (ret) {
493 dev_err(&pf->pdev->dev,
494 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
495 pf_queue_id, ret);
496 ret = -ENOENT;
497 goto error_param;
498 }
499
500 /* set the context in the HMC */
501 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
502 if (ret) {
503 dev_err(&pf->pdev->dev,
504 "Failed to set VF LAN Rx queue context %d error: %d\n",
505 pf_queue_id, ret);
506 ret = -ENOENT;
507 goto error_param;
508 }
509
510error_param:
511 return ret;
512}
513
514/**
515 * i40e_alloc_vsi_res
b40c82e6 516 * @vf: pointer to the VF info
5c3c48ac
JB		 517 * @type: type of VSI to allocate
518 *
b40c82e6 519 * alloc VF vsi context & resources
5c3c48ac
JB		 520 **/
521static int i40e_alloc_vsi_res(struct i40e_vf *vf, enum i40e_vsi_type type)
522{
523 struct i40e_mac_filter *f = NULL;
524 struct i40e_pf *pf = vf->pf;
5c3c48ac
JB		 525 struct i40e_vsi *vsi;
526 int ret = 0;
527
528 vsi = i40e_vsi_setup(pf, type, pf->vsi[pf->lan_vsi]->seid, vf->vf_id);
529
530 if (!vsi) {
531 dev_err(&pf->pdev->dev,
b40c82e6 532 "add vsi failed for VF %d, aq_err %d\n",
5c3c48ac
JB		 533 vf->vf_id, pf->hw.aq.asq_last_status);
534 ret = -ENOENT;
535 goto error_alloc_vsi_res;
536 }
537 if (type == I40E_VSI_SRIOV) {
1a10370a 538 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
6995b36c 539
fdf0e0bf 540 vf->lan_vsi_idx = vsi->idx;
5c3c48ac 541 vf->lan_vsi_id = vsi->id;
6c12fcbf
GR		 542 /* If the port VLAN has been configured and then the
543 * VF driver was removed then the VSI port VLAN
544 * configuration was destroyed. Check if there is
545 * a port VLAN and restore the VSI configuration if
546 * needed.
547 */
548 if (vf->port_vlan_id)
549 i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
21659035
KP		 550
551 spin_lock_bh(&vsi->mac_filter_list_lock);
b7b713a8
MW		 552 if (is_valid_ether_addr(vf->default_lan_addr.addr)) {
553 f = i40e_add_filter(vsi, vf->default_lan_addr.addr,
554 vf->port_vlan_id ? vf->port_vlan_id : -1,
555 true, false);
556 if (!f)
557 dev_info(&pf->pdev->dev,
558 "Could not add MAC filter %pM for VF %d\n",
559 vf->default_lan_addr.addr, vf->vf_id);
560 }
e995163c
MW		 561 f = i40e_add_filter(vsi, brdcast,
562 vf->port_vlan_id ? vf->port_vlan_id : -1,
1a10370a
GR		 563 true, false);
564 if (!f)
565 dev_info(&pf->pdev->dev,
566 "Could not allocate VF broadcast filter\n");
21659035 567 spin_unlock_bh(&vsi->mac_filter_list_lock);
5c3c48ac 568 }
6dbbbfb2 569
5c3c48ac 570 /* program mac filter */
17652c63 571 ret = i40e_sync_vsi_filters(vsi);
fd1646ee 572 if (ret)
5c3c48ac 573 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
5c3c48ac 574
6b192891
MW		 575 /* Set VF bandwidth if specified */
576 if (vf->tx_rate) {
577 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
578 vf->tx_rate / 50, 0, NULL);
579 if (ret)
580 dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
581 vf->vf_id, ret);
582 }
583
5c3c48ac
JB		 584error_alloc_vsi_res:
585 return ret;
586}
587
805bd5bd
MW		 588/**
589 * i40e_enable_vf_mappings
b40c82e6 590 * @vf: pointer to the VF info
805bd5bd 591 *
b40c82e6 592 * enable VF mappings
805bd5bd
MW		 593 **/
594static void i40e_enable_vf_mappings(struct i40e_vf *vf)
595{
596 struct i40e_pf *pf = vf->pf;
597 struct i40e_hw *hw = &pf->hw;
598 u32 reg, total_queue_pairs = 0;
599 int j;
600
601 /* Tell the hardware we're using noncontiguous mapping. HW requires
602 * that VF queues be mapped using this method, even when they are
603 * contiguous in real life
604 */
605 wr32(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
606 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
607
608 /* enable VF vplan_qtable mappings */
609 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
610 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
611
612 /* map PF queues to VF queues */
fdf0e0bf
ASJ		 613 for (j = 0; j < pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs; j++) {
614 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id, j);
6995b36c 615
805bd5bd
MW		 616 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
617 wr32(hw, I40E_VPLAN_QTABLE(total_queue_pairs, vf->vf_id), reg);
618 total_queue_pairs++;
619 }
620
621 /* map PF queues to VSI */
622 for (j = 0; j < 7; j++) {
fdf0e0bf 623 if (j * 2 >= pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs) {
805bd5bd
MW		 624 reg = 0x07FF07FF; /* unused */
625 } else {
fdf0e0bf 626 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
805bd5bd
MW		 627 j * 2);
628 reg = qid;
fdf0e0bf 629 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
805bd5bd
MW		 630 (j * 2) + 1);
631 reg |= qid << 16;
632 }
633 wr32(hw, I40E_VSILAN_QTABLE(j, vf->lan_vsi_id), reg);
634 }
635
636 i40e_flush(hw);
637}
638
639/**
640 * i40e_disable_vf_mappings
b40c82e6 641 * @vf: pointer to the VF info
805bd5bd 642 *
b40c82e6 643 * disable VF mappings
805bd5bd
MW		 644 **/
645static void i40e_disable_vf_mappings(struct i40e_vf *vf)
646{
647 struct i40e_pf *pf = vf->pf;
648 struct i40e_hw *hw = &pf->hw;
649 int i;
650
651 /* disable qp mappings */
652 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
653 for (i = 0; i < I40E_MAX_VSI_QP; i++)
654 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
655 I40E_QUEUE_END_OF_LIST);
656 i40e_flush(hw);
657}
658
659/**
660 * i40e_free_vf_res
b40c82e6 661 * @vf: pointer to the VF info
805bd5bd 662 *
b40c82e6 663 * free VF resources
805bd5bd
MW		 664 **/
665static void i40e_free_vf_res(struct i40e_vf *vf)
666{
667 struct i40e_pf *pf = vf->pf;
fc18eaa0
MW		 668 struct i40e_hw *hw = &pf->hw;
669 u32 reg_idx, reg;
670 int i, msix_vf;
805bd5bd
MW		 671
672 /* free vsi & disconnect it from the parent uplink */
fdf0e0bf
ASJ		 673 if (vf->lan_vsi_idx) {
674 i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]);
675 vf->lan_vsi_idx = 0;
805bd5bd
MW		 676 vf->lan_vsi_id = 0;
677 }
9347eb77
MW		 678 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
679
fc18eaa0
MW		 680 /* disable interrupts so the VF starts in a known state */
681 for (i = 0; i < msix_vf; i++) {
682 /* format is same for both registers */
683 if (0 == i)
684 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
685 else
686 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
687 (vf->vf_id))
688 + (i - 1));
689 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
690 i40e_flush(hw);
691 }
805bd5bd 692
fc18eaa0
MW		 693 /* clear the irq settings */
694 for (i = 0; i < msix_vf; i++) {
695 /* format is same for both registers */
696 if (0 == i)
697 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
698 else
699 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
700 (vf->vf_id))
701 + (i - 1));
702 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
703 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
704 wr32(hw, reg_idx, reg);
705 i40e_flush(hw);
706 }
805bd5bd
MW		 707 /* reset some of the state varibles keeping
708 * track of the resources
709 */
710 vf->num_queue_pairs = 0;
711 vf->vf_states = 0;
21be99ec 712 clear_bit(I40E_VF_STAT_INIT, &vf->vf_states);
805bd5bd
MW		 713}
714
715/**
716 * i40e_alloc_vf_res
b40c82e6 717 * @vf: pointer to the VF info
805bd5bd 718 *
b40c82e6 719 * allocate VF resources
805bd5bd
MW		 720 **/
721static int i40e_alloc_vf_res(struct i40e_vf *vf)
722{
723 struct i40e_pf *pf = vf->pf;
724 int total_queue_pairs = 0;
725 int ret;
726
727 /* allocate hw vsi context & associated resources */
728 ret = i40e_alloc_vsi_res(vf, I40E_VSI_SRIOV);
729 if (ret)
730 goto error_alloc;
fdf0e0bf 731 total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
805bd5bd
MW		 732 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
733
734 /* store the total qps number for the runtime
b40c82e6 735 * VF req validation
805bd5bd
MW		 736 */
737 vf->num_queue_pairs = total_queue_pairs;
738
b40c82e6 739 /* VF is now completely initialized */
805bd5bd
MW		 740 set_bit(I40E_VF_STAT_INIT, &vf->vf_states);
741
742error_alloc:
743 if (ret)
744 i40e_free_vf_res(vf);
745
746 return ret;
747}
748
fc18eaa0
MW		 749#define VF_DEVICE_STATUS 0xAA
750#define VF_TRANS_PENDING_MASK 0x20
751/**
752 * i40e_quiesce_vf_pci
b40c82e6 753 * @vf: pointer to the VF structure
fc18eaa0
MW		 754 *
755 * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
756 * if the transactions never clear.
757 **/
758static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
759{
760 struct i40e_pf *pf = vf->pf;
761 struct i40e_hw *hw = &pf->hw;
762 int vf_abs_id, i;
763 u32 reg;
764
b141d619 765 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
fc18eaa0
MW		 766
767 wr32(hw, I40E_PF_PCI_CIAA,
768 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
769 for (i = 0; i < 100; i++) {
770 reg = rd32(hw, I40E_PF_PCI_CIAD);
771 if ((reg & VF_TRANS_PENDING_MASK) == 0)
772 return 0;
773 udelay(1);
774 }
775 return -EIO;
776}
777
5c3c48ac
JB		 778/**
779 * i40e_reset_vf
b40c82e6 780 * @vf: pointer to the VF structure
5c3c48ac
JB		 781 * @flr: VFLR was issued or not
782 *
b40c82e6 783 * reset the VF
5c3c48ac 784 **/
fc18eaa0 785void i40e_reset_vf(struct i40e_vf *vf, bool flr)
5c3c48ac 786{
5c3c48ac
JB		 787 struct i40e_pf *pf = vf->pf;
788 struct i40e_hw *hw = &pf->hw;
5c3c48ac 789 bool rsd = false;
fc18eaa0
MW		 790 int i;
791 u32 reg;
5c3c48ac 792
3ba9bcb4
MW		 793 if (test_and_set_bit(__I40E_VF_DISABLE, &pf->state))
794 return;
795
5c3c48ac 796 /* warn the VF */
5c3c48ac
JB		 797 clear_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
798
fc18eaa0
MW		 799 /* In the case of a VFLR, the HW has already reset the VF and we
800 * just need to clean up, so don't hit the VFRTRIG register.
5c3c48ac
JB		 801 */
802 if (!flr) {
b40c82e6 803 /* reset VF using VPGEN_VFRTRIG reg */
fc18eaa0
MW		 804 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
805 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
5c3c48ac
JB		 806 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
807 i40e_flush(hw);
808 }
809
fc18eaa0
MW		 810 if (i40e_quiesce_vf_pci(vf))
811 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
812 vf->vf_id);
813
5c3c48ac
JB		 814 /* poll VPGEN_VFRSTAT reg to make sure
815 * that reset is complete
816 */
1750a22f
MW		 817 for (i = 0; i < 10; i++) {
818 /* VF reset requires driver to first reset the VF and then
819 * poll the status register to make sure that the reset
820 * completed successfully. Due to internal HW FIFO flushes,
821 * we must wait 10ms before the register will be valid.
5c3c48ac 822 */
1750a22f 823 usleep_range(10000, 20000);
5c3c48ac
JB		 824 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
825 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
826 rsd = true;
827 break;
828 }
829 }
830
57175ac1
ASJ		 831 if (flr)
832 usleep_range(10000, 20000);
833
5c3c48ac 834 if (!rsd)
fc18eaa0 835 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
5c3c48ac 836 vf->vf_id);
fc18eaa0 837 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_COMPLETED);
5c3c48ac
JB		 838 /* clear the reset bit in the VPGEN_VFRTRIG reg */
839 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
840 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
841 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
fc18eaa0
MW		 842
843 /* On initial reset, we won't have any queues */
fdf0e0bf 844 if (vf->lan_vsi_idx == 0)
fc18eaa0
MW		 845 goto complete_reset;
846
fdf0e0bf 847 i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], false);
fc18eaa0 848complete_reset:
b40c82e6 849 /* reallocate VF resources to reset the VSI state */
fc18eaa0 850 i40e_free_vf_res(vf);
21be99ec
MW		 851 if (!i40e_alloc_vf_res(vf)) {
852 i40e_enable_vf_mappings(vf);
853 set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
854 clear_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
855 }
5c3c48ac 856 /* tell the VF the reset is done */
fc18eaa0 857 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_VFACTIVE);
5c3c48ac 858 i40e_flush(hw);
3ba9bcb4 859 clear_bit(__I40E_VF_DISABLE, &pf->state);
5c3c48ac 860}
c354229f 861
5c3c48ac
JB		 862/**
863 * i40e_free_vfs
b40c82e6 864 * @pf: pointer to the PF structure
5c3c48ac 865 *
b40c82e6 866 * free VF resources
5c3c48ac
JB		 867 **/
868void i40e_free_vfs(struct i40e_pf *pf)
869{
f7414531
MW		 870 struct i40e_hw *hw = &pf->hw;
871 u32 reg_idx, bit_idx;
872 int i, tmp, vf_id;
5c3c48ac
JB		 873
874 if (!pf->vf)
875 return;
3ba9bcb4
MW		 876 while (test_and_set_bit(__I40E_VF_DISABLE, &pf->state))
877 usleep_range(1000, 2000);
5c3c48ac 878
44434638
MW		 879 for (i = 0; i < pf->num_alloc_vfs; i++)
880 if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
881 i40e_vsi_control_rings(pf->vsi[pf->vf[i].lan_vsi_idx],
882 false);
0325fca7
MW		 883
884 for (i = 0; i < pf->num_alloc_vfs; i++)
885 if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
886 i40e_vsi_control_rings(pf->vsi[pf->vf[i].lan_vsi_idx],
887 false);
44434638 888
6a9ddb36
MW		 889 /* Disable IOV before freeing resources. This lets any VF drivers
890 * running in the host get themselves cleaned up before we yank
891 * the carpet out from underneath their feet.
892 */
893 if (!pci_vfs_assigned(pf->pdev))
894 pci_disable_sriov(pf->pdev);
6d7b967d
MW		 895 else
896 dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
6a9ddb36
MW		 897
898 msleep(20); /* let any messages in transit get finished up */
899
b40c82e6 900 /* free up VF resources */
6c1b5bff
MW		 901 tmp = pf->num_alloc_vfs;
902 pf->num_alloc_vfs = 0;
903 for (i = 0; i < tmp; i++) {
5c3c48ac
JB		 904 if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
905 i40e_free_vf_res(&pf->vf[i]);
906 /* disable qp mappings */
907 i40e_disable_vf_mappings(&pf->vf[i]);
908 }
909
910 kfree(pf->vf);
911 pf->vf = NULL;
5c3c48ac 912
9e5634df
MW		 913 /* This check is for when the driver is unloaded while VFs are
914 * assigned. Setting the number of VFs to 0 through sysfs is caught
915 * before this function ever gets called.
916 */
c24817b6 917 if (!pci_vfs_assigned(pf->pdev)) {
f7414531
MW		 918 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
919 * work correctly when SR-IOV gets re-enabled.
920 */
921 for (vf_id = 0; vf_id < tmp; vf_id++) {
922 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
923 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
41a1d04b 924 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
f7414531 925 }
c354229f 926 }
3ba9bcb4 927 clear_bit(__I40E_VF_DISABLE, &pf->state);
5c3c48ac
JB		 928}
929
930#ifdef CONFIG_PCI_IOV
931/**
932 * i40e_alloc_vfs
b40c82e6
JK		 933 * @pf: pointer to the PF structure
934 * @num_alloc_vfs: number of VFs to allocate
5c3c48ac 935 *
b40c82e6 936 * allocate VF resources
5c3c48ac 937 **/
4aeec010 938int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
5c3c48ac
JB		 939{
940 struct i40e_vf *vfs;
941 int i, ret = 0;
942
6c1b5bff 943 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW		 944 i40e_irq_dynamic_disable_icr0(pf);
945
4aeec010
MW		 946 /* Check to see if we're just allocating resources for extant VFs */
947 if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
948 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
949 if (ret) {
de445b3d 950 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
4aeec010
MW		 951 pf->num_alloc_vfs = 0;
952 goto err_iov;
953 }
5c3c48ac 954 }
5c3c48ac 955 /* allocate memory */
cc6456af 956 vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL);
5c3c48ac
JB		 957 if (!vfs) {
958 ret = -ENOMEM;
959 goto err_alloc;
960 }
c674d125 961 pf->vf = vfs;
5c3c48ac
JB		 962
963 /* apply default profile */
964 for (i = 0; i < num_alloc_vfs; i++) {
965 vfs[i].pf = pf;
966 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
967 vfs[i].vf_id = i;
968
969 /* assign default capabilities */
970 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
c674d125 971 vfs[i].spoofchk = true;
b40c82e6 972 /* VF resources get allocated during reset */
fc18eaa0 973 i40e_reset_vf(&vfs[i], false);
5c3c48ac 974
5c3c48ac 975 }
5c3c48ac
JB		 976 pf->num_alloc_vfs = num_alloc_vfs;
977
978err_alloc:
979 if (ret)
980 i40e_free_vfs(pf);
981err_iov:
6c1b5bff 982 /* Re-enable interrupt 0. */
2ef28cfb 983 i40e_irq_dynamic_enable_icr0(pf);
5c3c48ac
JB		 984 return ret;
985}
986
987#endif
988/**
989 * i40e_pci_sriov_enable
990 * @pdev: pointer to a pci_dev structure
b40c82e6 991 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 992 *
993 * Enable or change the number of VFs
994 **/
995static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
996{
997#ifdef CONFIG_PCI_IOV
998 struct i40e_pf *pf = pci_get_drvdata(pdev);
999 int pre_existing_vfs = pci_num_vf(pdev);
1000 int err = 0;
1001
6995b36c 1002 if (test_bit(__I40E_TESTING, &pf->state)) {
e17bc411
GR		 1003 dev_warn(&pdev->dev,
1004 "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n");
1005 err = -EPERM;
1006 goto err_out;
1007 }
1008
5c3c48ac
JB		 1009 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
1010 i40e_free_vfs(pf);
1011 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
1012 goto out;
1013
1014 if (num_vfs > pf->num_req_vfs) {
96c8d073
MW		 1015 dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n",
1016 num_vfs, pf->num_req_vfs);
5c3c48ac
JB		 1017 err = -EPERM;
1018 goto err_out;
1019 }
1020
96c8d073 1021 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
5c3c48ac
JB		 1022 err = i40e_alloc_vfs(pf, num_vfs);
1023 if (err) {
1024 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
1025 goto err_out;
1026 }
1027
1028out:
1029 return num_vfs;
1030
1031err_out:
1032 return err;
1033#endif
1034 return 0;
1035}
1036
1037/**
1038 * i40e_pci_sriov_configure
1039 * @pdev: pointer to a pci_dev structure
b40c82e6 1040 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1041 *
1042 * Enable or change the number of VFs. Called when the user updates the number
1043 * of VFs in sysfs.
1044 **/
1045int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1046{
1047 struct i40e_pf *pf = pci_get_drvdata(pdev);
1048
fc60861e
ASJ		 1049 if (num_vfs) {
1050 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
1051 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
1052 i40e_do_reset_safe(pf,
1053 BIT_ULL(__I40E_PF_RESET_REQUESTED));
1054 }
5c3c48ac 1055 return i40e_pci_sriov_enable(pdev, num_vfs);
fc60861e 1056 }
5c3c48ac 1057
c24817b6 1058 if (!pci_vfs_assigned(pf->pdev)) {
9e5634df 1059 i40e_free_vfs(pf);
fc60861e
ASJ		 1060 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
1061 i40e_do_reset_safe(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
9e5634df
MW		 1062 } else {
1063 dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
1064 return -EINVAL;
1065 }
5c3c48ac
JB		 1066 return 0;
1067}
1068
1069/***********************virtual channel routines******************/
1070
1071/**
1072 * i40e_vc_send_msg_to_vf
b40c82e6 1073 * @vf: pointer to the VF info
5c3c48ac
JB		 1074 * @v_opcode: virtual channel opcode
1075 * @v_retval: virtual channel return value
1076 * @msg: pointer to the msg buffer
1077 * @msglen: msg length
1078 *
b40c82e6 1079 * send msg to VF
5c3c48ac
JB		 1080 **/
1081static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
1082 u32 v_retval, u8 *msg, u16 msglen)
1083{
6e7b5bd3
ASJ		 1084 struct i40e_pf *pf;
1085 struct i40e_hw *hw;
1086 int abs_vf_id;
5c3c48ac
JB		 1087 i40e_status aq_ret;
1088
6e7b5bd3
ASJ		 1089 /* validate the request */
1090 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
1091 return -EINVAL;
1092
1093 pf = vf->pf;
1094 hw = &pf->hw;
1095 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1096
5c3c48ac
JB		 1097 /* single place to detect unsuccessful return values */
1098 if (v_retval) {
1099 vf->num_invalid_msgs++;
e7ffb72d
MW		 1100 dev_err(&pf->pdev->dev, "VF %d failed opcode %d, error: %d\n",
1101 vf->vf_id, v_opcode, v_retval);
5c3c48ac
JB		 1102 if (vf->num_invalid_msgs >
1103 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
1104 dev_err(&pf->pdev->dev,
1105 "Number of invalid messages exceeded for VF %d\n",
1106 vf->vf_id);
1107 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
1108 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
1109 }
1110 } else {
1111 vf->num_valid_msgs++;
5d38c93e
JW		 1112 /* reset the invalid counter, if a valid message is received. */
1113 vf->num_invalid_msgs = 0;
5c3c48ac
JB		 1114 }
1115
f19efbb5 1116 aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
7efa84b7 1117 msg, msglen, NULL);
5c3c48ac
JB		 1118 if (aq_ret) {
1119 dev_err(&pf->pdev->dev,
1120 "Unable to send the message to VF %d aq_err %d\n",
1121 vf->vf_id, pf->hw.aq.asq_last_status);
1122 return -EIO;
1123 }
1124
1125 return 0;
1126}
1127
1128/**
1129 * i40e_vc_send_resp_to_vf
b40c82e6 1130 * @vf: pointer to the VF info
5c3c48ac
JB		 1131 * @opcode: operation code
1132 * @retval: return value
1133 *
b40c82e6 1134 * send resp msg to VF
5c3c48ac
JB		 1135 **/
1136static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
1137 enum i40e_virtchnl_ops opcode,
1138 i40e_status retval)
1139{
1140 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
1141}
1142
1143/**
1144 * i40e_vc_get_version_msg
b40c82e6 1145 * @vf: pointer to the VF info
5c3c48ac 1146 *
b40c82e6 1147 * called from the VF to request the API version used by the PF
5c3c48ac 1148 **/
f4ca1a22 1149static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac
JB		 1150{
1151 struct i40e_virtchnl_version_info info = {
1152 I40E_VIRTCHNL_VERSION_MAJOR, I40E_VIRTCHNL_VERSION_MINOR
1153 };
1154
f4ca1a22 1155 vf->vf_ver = *(struct i40e_virtchnl_version_info *)msg;
606a5488
MW		 1156 /* VFs running the 1.0 API expect to get 1.0 back or they will cry. */
1157 if (VF_IS_V10(vf))
1158 info.minor = I40E_VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
5c3c48ac
JB		 1159 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
1160 I40E_SUCCESS, (u8 *)&info,
1161 sizeof(struct
1162 i40e_virtchnl_version_info));
1163}
1164
1165/**
1166 * i40e_vc_get_vf_resources_msg
b40c82e6 1167 * @vf: pointer to the VF info
5c3c48ac
JB		 1168 * @msg: pointer to the msg buffer
1169 * @msglen: msg length
1170 *
b40c82e6 1171 * called from the VF to request its resources
5c3c48ac 1172 **/
f4ca1a22 1173static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac
JB		 1174{
1175 struct i40e_virtchnl_vf_resource *vfres = NULL;
1176 struct i40e_pf *pf = vf->pf;
1177 i40e_status aq_ret = 0;
1178 struct i40e_vsi *vsi;
1179 int i = 0, len = 0;
1180 int num_vsis = 1;
1181 int ret;
1182
1183 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
1184 aq_ret = I40E_ERR_PARAM;
1185 goto err;
1186 }
1187
1188 len = (sizeof(struct i40e_virtchnl_vf_resource) +
1189 sizeof(struct i40e_virtchnl_vsi_resource) * num_vsis);
1190
1191 vfres = kzalloc(len, GFP_KERNEL);
1192 if (!vfres) {
1193 aq_ret = I40E_ERR_NO_MEMORY;
1194 len = 0;
1195 goto err;
1196 }
f4ca1a22
MW		 1197 if (VF_IS_V11(vf))
1198 vf->driver_caps = *(u32 *)msg;
1199 else
1200 vf->driver_caps = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
1201 I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG |
1202 I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
5c3c48ac
JB		 1203
1204 vfres->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2;
fdf0e0bf 1205 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1206 if (!vsi->info.pvid)
e25d00b8
ASJ		 1207 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
1208 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
1209 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ)
1210 vfres->vf_offload_flags |=
1211 I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ;
1212 } else {
1213 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG;
1214 }
1f012279 1215
3d0da5b7
ASJ		 1216 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
1217 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
1218 vfres->vf_offload_flags |=
1219 I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
1220 }
1221
1f012279
ASJ		 1222 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING)
1223 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING;
1224
5c3c48ac
JB		 1225 vfres->num_vsis = num_vsis;
1226 vfres->num_queue_pairs = vf->num_queue_pairs;
1227 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
fdf0e0bf
ASJ		 1228 if (vf->lan_vsi_idx) {
1229 vfres->vsi_res[i].vsi_id = vf->lan_vsi_id;
5c3c48ac 1230 vfres->vsi_res[i].vsi_type = I40E_VSI_SRIOV;
f578f5f4
MW		 1231 vfres->vsi_res[i].num_queue_pairs = vsi->alloc_queue_pairs;
1232 /* VFs only use TC 0 */
1233 vfres->vsi_res[i].qset_handle
1234 = le16_to_cpu(vsi->info.qs_handle[0]);
6995b36c
JB		 1235 ether_addr_copy(vfres->vsi_res[i].default_mac_addr,
1236 vf->default_lan_addr.addr);
5c3c48ac
JB		 1237 i++;
1238 }
1239 set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
1240
1241err:
b40c82e6 1242 /* send the response back to the VF */
5c3c48ac
JB		 1243 ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
1244 aq_ret, (u8 *)vfres, len);
1245
1246 kfree(vfres);
1247 return ret;
1248}
1249
1250/**
1251 * i40e_vc_reset_vf_msg
b40c82e6 1252 * @vf: pointer to the VF info
5c3c48ac
JB		 1253 * @msg: pointer to the msg buffer
1254 * @msglen: msg length
1255 *
b40c82e6
JK		 1256 * called from the VF to reset itself,
1257 * unlike other virtchnl messages, PF driver
1258 * doesn't send the response back to the VF
5c3c48ac 1259 **/
fc18eaa0 1260static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
5c3c48ac 1261{
fc18eaa0
MW		 1262 if (test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
1263 i40e_reset_vf(vf, false);
5c3c48ac
JB		 1264}
1265
1266/**
1267 * i40e_vc_config_promiscuous_mode_msg
b40c82e6 1268 * @vf: pointer to the VF info
5c3c48ac
JB		 1269 * @msg: pointer to the msg buffer
1270 * @msglen: msg length
1271 *
b40c82e6
JK		 1272 * called from the VF to configure the promiscuous mode of
1273 * VF vsis
5c3c48ac
JB		 1274 **/
1275static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf,
1276 u8 *msg, u16 msglen)
1277{
1278 struct i40e_virtchnl_promisc_info *info =
1279 (struct i40e_virtchnl_promisc_info *)msg;
1280 struct i40e_pf *pf = vf->pf;
1281 struct i40e_hw *hw = &pf->hw;
89cb86c3 1282 struct i40e_vsi *vsi;
5c3c48ac 1283 bool allmulti = false;
5c3c48ac
JB		 1284 i40e_status aq_ret;
1285
fdf0e0bf 1286 vsi = i40e_find_vsi_from_id(pf, info->vsi_id);
5c3c48ac
JB		 1287 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1288 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1289 !i40e_vc_isvalid_vsi_id(vf, info->vsi_id) ||
fdf0e0bf 1290 (vsi->type != I40E_VSI_FCOE)) {
5c3c48ac
JB		 1291 aq_ret = I40E_ERR_PARAM;
1292 goto error_param;
1293 }
5c3c48ac
JB		 1294 if (info->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
1295 allmulti = true;
89cb86c3 1296 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid,
5c3c48ac
JB		 1297 allmulti, NULL);
1298
1299error_param:
b40c82e6 1300 /* send the response to the VF */
5c3c48ac
JB		 1301 return i40e_vc_send_resp_to_vf(vf,
1302 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
1303 aq_ret);
1304}
1305
1306/**
1307 * i40e_vc_config_queues_msg
b40c82e6 1308 * @vf: pointer to the VF info
5c3c48ac
JB		 1309 * @msg: pointer to the msg buffer
1310 * @msglen: msg length
1311 *
b40c82e6 1312 * called from the VF to configure the rx/tx
5c3c48ac
JB		 1313 * queues
1314 **/
1315static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1316{
1317 struct i40e_virtchnl_vsi_queue_config_info *qci =
1318 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
1319 struct i40e_virtchnl_queue_pair_info *qpi;
5f5e33b6 1320 struct i40e_pf *pf = vf->pf;
5c3c48ac
JB		 1321 u16 vsi_id, vsi_queue_id;
1322 i40e_status aq_ret = 0;
1323 int i;
1324
1325 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1326 aq_ret = I40E_ERR_PARAM;
1327 goto error_param;
1328 }
1329
1330 vsi_id = qci->vsi_id;
1331 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1332 aq_ret = I40E_ERR_PARAM;
1333 goto error_param;
1334 }
1335 for (i = 0; i < qci->num_queue_pairs; i++) {
1336 qpi = &qci->qpair[i];
1337 vsi_queue_id = qpi->txq.queue_id;
1338 if ((qpi->txq.vsi_id != vsi_id) ||
1339 (qpi->rxq.vsi_id != vsi_id) ||
1340 (qpi->rxq.queue_id != vsi_queue_id) ||
1341 !i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
1342 aq_ret = I40E_ERR_PARAM;
1343 goto error_param;
1344 }
1345
1346 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
1347 &qpi->rxq) ||
1348 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
1349 &qpi->txq)) {
1350 aq_ret = I40E_ERR_PARAM;
1351 goto error_param;
1352 }
1353 }
b40c82e6 1354 /* set vsi num_queue_pairs in use to num configured by VF */
fdf0e0bf 1355 pf->vsi[vf->lan_vsi_idx]->num_queue_pairs = qci->num_queue_pairs;
5c3c48ac
JB		 1356
1357error_param:
b40c82e6 1358 /* send the response to the VF */
5c3c48ac
JB		 1359 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
1360 aq_ret);
1361}
1362
1363/**
1364 * i40e_vc_config_irq_map_msg
b40c82e6 1365 * @vf: pointer to the VF info
5c3c48ac
JB		 1366 * @msg: pointer to the msg buffer
1367 * @msglen: msg length
1368 *
b40c82e6 1369 * called from the VF to configure the irq to
5c3c48ac
JB		 1370 * queue map
1371 **/
1372static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1373{
1374 struct i40e_virtchnl_irq_map_info *irqmap_info =
1375 (struct i40e_virtchnl_irq_map_info *)msg;
1376 struct i40e_virtchnl_vector_map *map;
1377 u16 vsi_id, vsi_queue_id, vector_id;
1378 i40e_status aq_ret = 0;
1379 unsigned long tempmap;
1380 int i;
1381
1382 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1383 aq_ret = I40E_ERR_PARAM;
1384 goto error_param;
1385 }
1386
1387 for (i = 0; i < irqmap_info->num_vectors; i++) {
1388 map = &irqmap_info->vecmap[i];
1389
1390 vector_id = map->vector_id;
1391 vsi_id = map->vsi_id;
1392 /* validate msg params */
1393 if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
1394 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1395 aq_ret = I40E_ERR_PARAM;
1396 goto error_param;
1397 }
1398
1399 /* lookout for the invalid queue index */
1400 tempmap = map->rxq_map;
4836650b 1401 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 1402 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1403 vsi_queue_id)) {
1404 aq_ret = I40E_ERR_PARAM;
1405 goto error_param;
1406 }
5c3c48ac
JB		 1407 }
1408
1409 tempmap = map->txq_map;
4836650b 1410 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 1411 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1412 vsi_queue_id)) {
1413 aq_ret = I40E_ERR_PARAM;
1414 goto error_param;
1415 }
5c3c48ac
JB		 1416 }
1417
1418 i40e_config_irq_link_list(vf, vsi_id, map);
1419 }
1420error_param:
b40c82e6 1421 /* send the response to the VF */
5c3c48ac
JB		 1422 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
1423 aq_ret);
1424}
1425
1426/**
1427 * i40e_vc_enable_queues_msg
b40c82e6 1428 * @vf: pointer to the VF info
5c3c48ac
JB		 1429 * @msg: pointer to the msg buffer
1430 * @msglen: msg length
1431 *
b40c82e6 1432 * called from the VF to enable all or specific queue(s)
5c3c48ac
JB		 1433 **/
1434static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1435{
1436 struct i40e_virtchnl_queue_select *vqs =
1437 (struct i40e_virtchnl_queue_select *)msg;
1438 struct i40e_pf *pf = vf->pf;
1439 u16 vsi_id = vqs->vsi_id;
1440 i40e_status aq_ret = 0;
5c3c48ac
JB		 1441
1442 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1443 aq_ret = I40E_ERR_PARAM;
1444 goto error_param;
1445 }
1446
1447 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1448 aq_ret = I40E_ERR_PARAM;
1449 goto error_param;
1450 }
1451
1452 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1453 aq_ret = I40E_ERR_PARAM;
1454 goto error_param;
1455 }
fdf0e0bf
ASJ		 1456
1457 if (i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], true))
88f6563d 1458 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac 1459error_param:
b40c82e6 1460 /* send the response to the VF */
5c3c48ac
JB		 1461 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
1462 aq_ret);
1463}
1464
1465/**
1466 * i40e_vc_disable_queues_msg
b40c82e6 1467 * @vf: pointer to the VF info
5c3c48ac
JB		 1468 * @msg: pointer to the msg buffer
1469 * @msglen: msg length
1470 *
b40c82e6 1471 * called from the VF to disable all or specific
5c3c48ac
JB		 1472 * queue(s)
1473 **/
1474static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1475{
1476 struct i40e_virtchnl_queue_select *vqs =
1477 (struct i40e_virtchnl_queue_select *)msg;
1478 struct i40e_pf *pf = vf->pf;
5c3c48ac 1479 i40e_status aq_ret = 0;
5c3c48ac
JB		 1480
1481 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1482 aq_ret = I40E_ERR_PARAM;
1483 goto error_param;
1484 }
1485
1486 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1487 aq_ret = I40E_ERR_PARAM;
1488 goto error_param;
1489 }
1490
1491 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1492 aq_ret = I40E_ERR_PARAM;
1493 goto error_param;
1494 }
fdf0e0bf
ASJ		 1495
1496 if (i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], false))
88f6563d 1497 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac
JB		 1498
1499error_param:
b40c82e6 1500 /* send the response to the VF */
5c3c48ac
JB		 1501 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
1502 aq_ret);
1503}
1504
1505/**
1506 * i40e_vc_get_stats_msg
b40c82e6 1507 * @vf: pointer to the VF info
5c3c48ac
JB		 1508 * @msg: pointer to the msg buffer
1509 * @msglen: msg length
1510 *
b40c82e6 1511 * called from the VF to get vsi stats
5c3c48ac
JB		 1512 **/
1513static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1514{
1515 struct i40e_virtchnl_queue_select *vqs =
1516 (struct i40e_virtchnl_queue_select *)msg;
1517 struct i40e_pf *pf = vf->pf;
1518 struct i40e_eth_stats stats;
1519 i40e_status aq_ret = 0;
1520 struct i40e_vsi *vsi;
1521
1522 memset(&stats, 0, sizeof(struct i40e_eth_stats));
1523
1524 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1525 aq_ret = I40E_ERR_PARAM;
1526 goto error_param;
1527 }
1528
1529 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1530 aq_ret = I40E_ERR_PARAM;
1531 goto error_param;
1532 }
1533
fdf0e0bf 1534 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 1535 if (!vsi) {
1536 aq_ret = I40E_ERR_PARAM;
1537 goto error_param;
1538 }
1539 i40e_update_eth_stats(vsi);
5a9769c8 1540 stats = vsi->eth_stats;
5c3c48ac
JB		 1541
1542error_param:
b40c82e6 1543 /* send the response back to the VF */
5c3c48ac
JB		 1544 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS, aq_ret,
1545 (u8 *)&stats, sizeof(stats));
1546}
1547
f657a6e1
GR		 1548/**
1549 * i40e_check_vf_permission
b40c82e6 1550 * @vf: pointer to the VF info
f657a6e1
GR		 1551 * @macaddr: pointer to the MAC Address being checked
1552 *
1553 * Check if the VF has permission to add or delete unicast MAC address
1554 * filters and return error code -EPERM if not. Then check if the
1555 * address filter requested is broadcast or zero and if so return
1556 * an invalid MAC address error code.
1557 **/
1558static inline int i40e_check_vf_permission(struct i40e_vf *vf, u8 *macaddr)
1559{
1560 struct i40e_pf *pf = vf->pf;
1561 int ret = 0;
1562
1563 if (is_broadcast_ether_addr(macaddr) ||
1564 is_zero_ether_addr(macaddr)) {
1565 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n", macaddr);
1566 ret = I40E_ERR_INVALID_MAC_ADDR;
5017c2a8
GR		 1567 } else if (vf->pf_set_mac && !is_multicast_ether_addr(macaddr) &&
1568 !ether_addr_equal(macaddr, vf->default_lan_addr.addr)) {
f657a6e1
GR		 1569 /* If the host VMM administrator has set the VF MAC address
1570 * administratively via the ndo_set_vf_mac command then deny
1571 * permission to the VF to add or delete unicast MAC addresses.
5017c2a8
GR		 1572 * The VF may request to set the MAC address filter already
1573 * assigned to it so do not return an error in that case.
f657a6e1
GR		 1574 */
1575 dev_err(&pf->pdev->dev,
1576 "VF attempting to override administratively set MAC address\nPlease reload the VF driver to resume normal operation\n");
1577 ret = -EPERM;
1578 }
1579 return ret;
1580}
1581
5c3c48ac
JB		 1582/**
1583 * i40e_vc_add_mac_addr_msg
b40c82e6 1584 * @vf: pointer to the VF info
5c3c48ac
JB		 1585 * @msg: pointer to the msg buffer
1586 * @msglen: msg length
1587 *
1588 * add guest mac address filter
1589 **/
1590static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1591{
1592 struct i40e_virtchnl_ether_addr_list *al =
1593 (struct i40e_virtchnl_ether_addr_list *)msg;
1594 struct i40e_pf *pf = vf->pf;
1595 struct i40e_vsi *vsi = NULL;
1596 u16 vsi_id = al->vsi_id;
f657a6e1 1597 i40e_status ret = 0;
5c3c48ac
JB		 1598 int i;
1599
1600 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1601 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1602 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 1603 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 1604 goto error_param;
1605 }
1606
1607 for (i = 0; i < al->num_elements; i++) {
f657a6e1
GR		 1608 ret = i40e_check_vf_permission(vf, al->list[i].addr);
1609 if (ret)
5c3c48ac 1610 goto error_param;
5c3c48ac 1611 }
fdf0e0bf 1612 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1613
21659035
KP		 1614 /* Lock once, because all function inside for loop accesses VSI's
1615 * MAC filter list which needs to be protected using same lock.
1616 */
1617 spin_lock_bh(&vsi->mac_filter_list_lock);
1618
5c3c48ac
JB		 1619 /* add new addresses to the list */
1620 for (i = 0; i < al->num_elements; i++) {
1621 struct i40e_mac_filter *f;
1622
1623 f = i40e_find_mac(vsi, al->list[i].addr, true, false);
7e68edf9 1624 if (!f) {
5c3c48ac
JB		 1625 if (i40e_is_vsi_in_vlan(vsi))
1626 f = i40e_put_mac_in_vlan(vsi, al->list[i].addr,
1627 true, false);
1628 else
1629 f = i40e_add_filter(vsi, al->list[i].addr, -1,
1630 true, false);
1631 }
1632
1633 if (!f) {
1634 dev_err(&pf->pdev->dev,
8d8f2295
MW		 1635 "Unable to add MAC filter %pM for VF %d\n",
1636 al->list[i].addr, vf->vf_id);
f657a6e1 1637 ret = I40E_ERR_PARAM;
21659035 1638 spin_unlock_bh(&vsi->mac_filter_list_lock);
5c3c48ac
JB		 1639 goto error_param;
1640 }
1641 }
21659035 1642 spin_unlock_bh(&vsi->mac_filter_list_lock);
5c3c48ac
JB		 1643
1644 /* program the updated filter list */
ea02e90b
MW		 1645 ret = i40e_sync_vsi_filters(vsi);
1646 if (ret)
1647 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
1648 vf->vf_id, ret);
5c3c48ac
JB		 1649
1650error_param:
b40c82e6 1651 /* send the response to the VF */
5c3c48ac 1652 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
f657a6e1 1653 ret);
5c3c48ac
JB		 1654}
1655
1656/**
1657 * i40e_vc_del_mac_addr_msg
b40c82e6 1658 * @vf: pointer to the VF info
5c3c48ac
JB		 1659 * @msg: pointer to the msg buffer
1660 * @msglen: msg length
1661 *
1662 * remove guest mac address filter
1663 **/
1664static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1665{
1666 struct i40e_virtchnl_ether_addr_list *al =
1667 (struct i40e_virtchnl_ether_addr_list *)msg;
1668 struct i40e_pf *pf = vf->pf;
1669 struct i40e_vsi *vsi = NULL;
1670 u16 vsi_id = al->vsi_id;
f657a6e1 1671 i40e_status ret = 0;
5c3c48ac
JB		 1672 int i;
1673
1674 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1675 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1676 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 1677 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 1678 goto error_param;
1679 }
f657a6e1
GR		 1680
1681 for (i = 0; i < al->num_elements; i++) {
700bbf6c
MW		 1682 if (is_broadcast_ether_addr(al->list[i].addr) ||
1683 is_zero_ether_addr(al->list[i].addr)) {
8d8f2295
MW		 1684 dev_err(&pf->pdev->dev, "Invalid MAC addr %pM for VF %d\n",
1685 al->list[i].addr, vf->vf_id);
700bbf6c 1686 ret = I40E_ERR_INVALID_MAC_ADDR;
f657a6e1 1687 goto error_param;
700bbf6c 1688 }
f657a6e1 1689 }
fdf0e0bf 1690 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1691
21659035 1692 spin_lock_bh(&vsi->mac_filter_list_lock);
5c3c48ac
JB		 1693 /* delete addresses from the list */
1694 for (i = 0; i < al->num_elements; i++)
b36e9ab5
MW		 1695 if (i40e_del_mac_all_vlan(vsi, al->list[i].addr, true, false)) {
1696 ret = I40E_ERR_INVALID_MAC_ADDR;
1697 spin_unlock_bh(&vsi->mac_filter_list_lock);
1698 goto error_param;
1699 }
1700
21659035 1701 spin_unlock_bh(&vsi->mac_filter_list_lock);
5c3c48ac
JB		 1702
1703 /* program the updated filter list */
ea02e90b
MW		 1704 ret = i40e_sync_vsi_filters(vsi);
1705 if (ret)
1706 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
1707 vf->vf_id, ret);
5c3c48ac
JB		 1708
1709error_param:
b40c82e6 1710 /* send the response to the VF */
5c3c48ac 1711 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
f657a6e1 1712 ret);
5c3c48ac
JB		 1713}
1714
1715/**
1716 * i40e_vc_add_vlan_msg
b40c82e6 1717 * @vf: pointer to the VF info
5c3c48ac
JB		 1718 * @msg: pointer to the msg buffer
1719 * @msglen: msg length
1720 *
1721 * program guest vlan id
1722 **/
1723static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1724{
1725 struct i40e_virtchnl_vlan_filter_list *vfl =
1726 (struct i40e_virtchnl_vlan_filter_list *)msg;
1727 struct i40e_pf *pf = vf->pf;
1728 struct i40e_vsi *vsi = NULL;
1729 u16 vsi_id = vfl->vsi_id;
1730 i40e_status aq_ret = 0;
1731 int i;
1732
1733 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1734 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1735 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1736 aq_ret = I40E_ERR_PARAM;
1737 goto error_param;
1738 }
1739
1740 for (i = 0; i < vfl->num_elements; i++) {
1741 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
1742 aq_ret = I40E_ERR_PARAM;
1743 dev_err(&pf->pdev->dev,
1744 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
1745 goto error_param;
1746 }
1747 }
fdf0e0bf 1748 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 1749 if (vsi->info.pvid) {
1750 aq_ret = I40E_ERR_PARAM;
1751 goto error_param;
1752 }
1753
1754 i40e_vlan_stripping_enable(vsi);
1755 for (i = 0; i < vfl->num_elements; i++) {
1756 /* add new VLAN filter */
1757 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
6995b36c 1758
5c3c48ac
JB		 1759 if (ret)
1760 dev_err(&pf->pdev->dev,
8d8f2295
MW		 1761 "Unable to add VLAN filter %d for VF %d, error %d\n",
1762 vfl->vlan_id[i], vf->vf_id, ret);
5c3c48ac
JB		 1763 }
1764
1765error_param:
b40c82e6 1766 /* send the response to the VF */
5c3c48ac
JB		 1767 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN, aq_ret);
1768}
1769
1770/**
1771 * i40e_vc_remove_vlan_msg
b40c82e6 1772 * @vf: pointer to the VF info
5c3c48ac
JB		 1773 * @msg: pointer to the msg buffer
1774 * @msglen: msg length
1775 *
1776 * remove programmed guest vlan id
1777 **/
1778static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1779{
1780 struct i40e_virtchnl_vlan_filter_list *vfl =
1781 (struct i40e_virtchnl_vlan_filter_list *)msg;
1782 struct i40e_pf *pf = vf->pf;
1783 struct i40e_vsi *vsi = NULL;
1784 u16 vsi_id = vfl->vsi_id;
1785 i40e_status aq_ret = 0;
1786 int i;
1787
1788 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1789 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1790 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1791 aq_ret = I40E_ERR_PARAM;
1792 goto error_param;
1793 }
1794
1795 for (i = 0; i < vfl->num_elements; i++) {
1796 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
1797 aq_ret = I40E_ERR_PARAM;
1798 goto error_param;
1799 }
1800 }
1801
fdf0e0bf 1802 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 1803 if (vsi->info.pvid) {
1804 aq_ret = I40E_ERR_PARAM;
1805 goto error_param;
1806 }
1807
1808 for (i = 0; i < vfl->num_elements; i++) {
1809 int ret = i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
6995b36c 1810
5c3c48ac
JB		 1811 if (ret)
1812 dev_err(&pf->pdev->dev,
8d8f2295
MW		 1813 "Unable to delete VLAN filter %d for VF %d, error %d\n",
1814 vfl->vlan_id[i], vf->vf_id, ret);
5c3c48ac
JB		 1815 }
1816
1817error_param:
b40c82e6 1818 /* send the response to the VF */
5c3c48ac
JB		 1819 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN, aq_ret);
1820}
1821
5c3c48ac
JB		 1822/**
1823 * i40e_vc_validate_vf_msg
b40c82e6 1824 * @vf: pointer to the VF info
5c3c48ac
JB		 1825 * @msg: pointer to the msg buffer
1826 * @msglen: msg length
1827 * @msghndl: msg handle
1828 *
1829 * validate msg
1830 **/
1831static int i40e_vc_validate_vf_msg(struct i40e_vf *vf, u32 v_opcode,
1832 u32 v_retval, u8 *msg, u16 msglen)
1833{
1834 bool err_msg_format = false;
1835 int valid_len;
1836
1837 /* Check if VF is disabled. */
1838 if (test_bit(I40E_VF_STAT_DISABLED, &vf->vf_states))
1839 return I40E_ERR_PARAM;
1840
1841 /* Validate message length. */
1842 switch (v_opcode) {
1843 case I40E_VIRTCHNL_OP_VERSION:
1844 valid_len = sizeof(struct i40e_virtchnl_version_info);
1845 break;
1846 case I40E_VIRTCHNL_OP_RESET_VF:
5c3c48ac
JB		 1847 valid_len = 0;
1848 break;
f4ca1a22
MW		 1849 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
1850 if (VF_IS_V11(vf))
1851 valid_len = sizeof(u32);
1852 else
1853 valid_len = 0;
1854 break;
5c3c48ac
JB		 1855 case I40E_VIRTCHNL_OP_CONFIG_TX_QUEUE:
1856 valid_len = sizeof(struct i40e_virtchnl_txq_info);
1857 break;
1858 case I40E_VIRTCHNL_OP_CONFIG_RX_QUEUE:
1859 valid_len = sizeof(struct i40e_virtchnl_rxq_info);
1860 break;
1861 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
1862 valid_len = sizeof(struct i40e_virtchnl_vsi_queue_config_info);
1863 if (msglen >= valid_len) {
1864 struct i40e_virtchnl_vsi_queue_config_info *vqc =
1865 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
1866 valid_len += (vqc->num_queue_pairs *
1867 sizeof(struct
1868 i40e_virtchnl_queue_pair_info));
1869 if (vqc->num_queue_pairs == 0)
1870 err_msg_format = true;
1871 }
1872 break;
1873 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
1874 valid_len = sizeof(struct i40e_virtchnl_irq_map_info);
1875 if (msglen >= valid_len) {
1876 struct i40e_virtchnl_irq_map_info *vimi =
1877 (struct i40e_virtchnl_irq_map_info *)msg;
1878 valid_len += (vimi->num_vectors *
1879 sizeof(struct i40e_virtchnl_vector_map));
1880 if (vimi->num_vectors == 0)
1881 err_msg_format = true;
1882 }
1883 break;
1884 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
1885 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
1886 valid_len = sizeof(struct i40e_virtchnl_queue_select);
1887 break;
1888 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
1889 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
1890 valid_len = sizeof(struct i40e_virtchnl_ether_addr_list);
1891 if (msglen >= valid_len) {
1892 struct i40e_virtchnl_ether_addr_list *veal =
1893 (struct i40e_virtchnl_ether_addr_list *)msg;
1894 valid_len += veal->num_elements *
1895 sizeof(struct i40e_virtchnl_ether_addr);
1896 if (veal->num_elements == 0)
1897 err_msg_format = true;
1898 }
1899 break;
1900 case I40E_VIRTCHNL_OP_ADD_VLAN:
1901 case I40E_VIRTCHNL_OP_DEL_VLAN:
1902 valid_len = sizeof(struct i40e_virtchnl_vlan_filter_list);
1903 if (msglen >= valid_len) {
1904 struct i40e_virtchnl_vlan_filter_list *vfl =
1905 (struct i40e_virtchnl_vlan_filter_list *)msg;
1906 valid_len += vfl->num_elements * sizeof(u16);
1907 if (vfl->num_elements == 0)
1908 err_msg_format = true;
1909 }
1910 break;
1911 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
1912 valid_len = sizeof(struct i40e_virtchnl_promisc_info);
1913 break;
1914 case I40E_VIRTCHNL_OP_GET_STATS:
1915 valid_len = sizeof(struct i40e_virtchnl_queue_select);
1916 break;
1917 /* These are always errors coming from the VF. */
1918 case I40E_VIRTCHNL_OP_EVENT:
1919 case I40E_VIRTCHNL_OP_UNKNOWN:
1920 default:
1921 return -EPERM;
5c3c48ac
JB		 1922 }
1923 /* few more checks */
1924 if ((valid_len != msglen) || (err_msg_format)) {
1925 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
1926 return -EINVAL;
1927 } else {
1928 return 0;
1929 }
1930}
1931
1932/**
1933 * i40e_vc_process_vf_msg
b40c82e6
JK		 1934 * @pf: pointer to the PF structure
1935 * @vf_id: source VF id
5c3c48ac
JB		 1936 * @msg: pointer to the msg buffer
1937 * @msglen: msg length
1938 * @msghndl: msg handle
1939 *
1940 * called from the common aeq/arq handler to
b40c82e6 1941 * process request from VF
5c3c48ac
JB		 1942 **/
1943int i40e_vc_process_vf_msg(struct i40e_pf *pf, u16 vf_id, u32 v_opcode,
1944 u32 v_retval, u8 *msg, u16 msglen)
1945{
5c3c48ac 1946 struct i40e_hw *hw = &pf->hw;
c243e963 1947 unsigned int local_vf_id = vf_id - hw->func_caps.vf_base_id;
6c1b5bff 1948 struct i40e_vf *vf;
5c3c48ac
JB		 1949 int ret;
1950
1951 pf->vf_aq_requests++;
7efa84b7 1952 if (local_vf_id >= pf->num_alloc_vfs)
6c1b5bff 1953 return -EINVAL;
7efa84b7 1954 vf = &(pf->vf[local_vf_id]);
5c3c48ac
JB		 1955 /* perform basic checks on the msg */
1956 ret = i40e_vc_validate_vf_msg(vf, v_opcode, v_retval, msg, msglen);
1957
1958 if (ret) {
b40c82e6 1959 dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n",
7efa84b7 1960 local_vf_id, v_opcode, msglen);
5c3c48ac
JB		 1961 return ret;
1962 }
bae3cae4 1963
5c3c48ac
JB		 1964 switch (v_opcode) {
1965 case I40E_VIRTCHNL_OP_VERSION:
f4ca1a22 1966 ret = i40e_vc_get_version_msg(vf, msg);
5c3c48ac
JB		 1967 break;
1968 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
f4ca1a22 1969 ret = i40e_vc_get_vf_resources_msg(vf, msg);
5c3c48ac
JB		 1970 break;
1971 case I40E_VIRTCHNL_OP_RESET_VF:
fc18eaa0
MW		 1972 i40e_vc_reset_vf_msg(vf);
1973 ret = 0;
5c3c48ac
JB		 1974 break;
1975 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
1976 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen);
1977 break;
1978 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
1979 ret = i40e_vc_config_queues_msg(vf, msg, msglen);
1980 break;
1981 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
1982 ret = i40e_vc_config_irq_map_msg(vf, msg, msglen);
1983 break;
1984 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
1985 ret = i40e_vc_enable_queues_msg(vf, msg, msglen);
055b295d 1986 i40e_vc_notify_vf_link_state(vf);
5c3c48ac
JB		 1987 break;
1988 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
1989 ret = i40e_vc_disable_queues_msg(vf, msg, msglen);
1990 break;
1991 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
1992 ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen);
1993 break;
1994 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
1995 ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen);
1996 break;
1997 case I40E_VIRTCHNL_OP_ADD_VLAN:
1998 ret = i40e_vc_add_vlan_msg(vf, msg, msglen);
1999 break;
2000 case I40E_VIRTCHNL_OP_DEL_VLAN:
2001 ret = i40e_vc_remove_vlan_msg(vf, msg, msglen);
2002 break;
2003 case I40E_VIRTCHNL_OP_GET_STATS:
2004 ret = i40e_vc_get_stats_msg(vf, msg, msglen);
2005 break;
5c3c48ac
JB		 2006 case I40E_VIRTCHNL_OP_UNKNOWN:
2007 default:
b40c82e6 2008 dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n",
7efa84b7 2009 v_opcode, local_vf_id);
5c3c48ac
JB		 2010 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
2011 I40E_ERR_NOT_IMPLEMENTED);
2012 break;
2013 }
2014
2015 return ret;
2016}
2017
2018/**
2019 * i40e_vc_process_vflr_event
b40c82e6 2020 * @pf: pointer to the PF structure
5c3c48ac
JB		 2021 *
2022 * called from the vlfr irq handler to
b40c82e6 2023 * free up VF resources and state variables
5c3c48ac
JB		 2024 **/
2025int i40e_vc_process_vflr_event(struct i40e_pf *pf)
2026{
2027 u32 reg, reg_idx, bit_idx, vf_id;
2028 struct i40e_hw *hw = &pf->hw;
2029 struct i40e_vf *vf;
2030
2031 if (!test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
2032 return 0;
2033
c5c2f7c3
MW		 2034 /* re-enable vflr interrupt cause */
2035 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
2036 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
2037 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
2038 i40e_flush(hw);
2039
5c3c48ac
JB		 2040 clear_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
2041 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
2042 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
2043 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
b40c82e6 2044 /* read GLGEN_VFLRSTAT register to find out the flr VFs */
5c3c48ac
JB		 2045 vf = &pf->vf[vf_id];
2046 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
41a1d04b 2047 if (reg & BIT(bit_idx)) {
5c3c48ac 2048 /* clear the bit in GLGEN_VFLRSTAT */
41a1d04b 2049 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
5c3c48ac 2050
eb2d80bc
MW		 2051 if (!test_bit(__I40E_DOWN, &pf->state))
2052 i40e_reset_vf(vf, true);
5c3c48ac
JB		 2053 }
2054 }
2055
5c3c48ac
JB		 2056 return 0;
2057}
2058
5c3c48ac
JB		 2059/**
2060 * i40e_ndo_set_vf_mac
2061 * @netdev: network interface device structure
b40c82e6 2062 * @vf_id: VF identifier
5c3c48ac
JB		 2063 * @mac: mac address
2064 *
b40c82e6 2065 * program VF mac address
5c3c48ac
JB		 2066 **/
2067int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
2068{
2069 struct i40e_netdev_priv *np = netdev_priv(netdev);
2070 struct i40e_vsi *vsi = np->vsi;
2071 struct i40e_pf *pf = vsi->back;
2072 struct i40e_mac_filter *f;
2073 struct i40e_vf *vf;
2074 int ret = 0;
2075
2076 /* validate the request */
2077 if (vf_id >= pf->num_alloc_vfs) {
2078 dev_err(&pf->pdev->dev,
2079 "Invalid VF Identifier %d\n", vf_id);
2080 ret = -EINVAL;
2081 goto error_param;
2082 }
2083
2084 vf = &(pf->vf[vf_id]);
fdf0e0bf 2085 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2086 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2d166c30
MW		 2087 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2088 vf_id);
2089 ret = -EAGAIN;
5c3c48ac
JB		 2090 goto error_param;
2091 }
2092
efd8e39a 2093 if (is_multicast_ether_addr(mac)) {
5c3c48ac 2094 dev_err(&pf->pdev->dev,
efd8e39a 2095 "Invalid Ethernet address %pM for VF %d\n", mac, vf_id);
5c3c48ac
JB		 2096 ret = -EINVAL;
2097 goto error_param;
2098 }
2099
21659035
KP		 2100 /* Lock once because below invoked function add/del_filter requires
2101 * mac_filter_list_lock to be held
2102 */
2103 spin_lock_bh(&vsi->mac_filter_list_lock);
2104
5c3c48ac 2105 /* delete the temporary mac address */
efd8e39a
MW		 2106 if (!is_zero_ether_addr(vf->default_lan_addr.addr))
2107 i40e_del_filter(vsi, vf->default_lan_addr.addr,
2108 vf->port_vlan_id ? vf->port_vlan_id : -1,
2109 true, false);
5c3c48ac 2110
29f71bb0
GR		 2111 /* Delete all the filters for this VSI - we're going to kill it
2112 * anyway.
2113 */
2114 list_for_each_entry(f, &vsi->mac_filter_list, list)
2115 i40e_del_filter(vsi, f->macaddr, f->vlan, true, false);
5c3c48ac 2116
21659035
KP		 2117 spin_unlock_bh(&vsi->mac_filter_list_lock);
2118
5c3c48ac
JB		 2119 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n", mac, vf_id);
2120 /* program mac filter */
17652c63 2121 if (i40e_sync_vsi_filters(vsi)) {
5c3c48ac
JB		 2122 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
2123 ret = -EIO;
2124 goto error_param;
2125 }
9a173901 2126 ether_addr_copy(vf->default_lan_addr.addr, mac);
f657a6e1 2127 vf->pf_set_mac = true;
17413a80
GR		 2128 /* Force the VF driver stop so it has to reload with new MAC address */
2129 i40e_vc_disable_vf(pf, vf);
5c3c48ac 2130 dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n");
5c3c48ac
JB		 2131
2132error_param:
2133 return ret;
2134}
2135
2136/**
2137 * i40e_ndo_set_vf_port_vlan
2138 * @netdev: network interface device structure
b40c82e6 2139 * @vf_id: VF identifier
5c3c48ac
JB		 2140 * @vlan_id: mac address
2141 * @qos: priority setting
2142 *
b40c82e6 2143 * program VF vlan id and/or qos
5c3c48ac
JB		 2144 **/
2145int i40e_ndo_set_vf_port_vlan(struct net_device *netdev,
2146 int vf_id, u16 vlan_id, u8 qos)
2147{
f7fc2f2e 2148 u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT);
5c3c48ac
JB		 2149 struct i40e_netdev_priv *np = netdev_priv(netdev);
2150 struct i40e_pf *pf = np->vsi->back;
21659035 2151 bool is_vsi_in_vlan = false;
5c3c48ac
JB		 2152 struct i40e_vsi *vsi;
2153 struct i40e_vf *vf;
2154 int ret = 0;
2155
2156 /* validate the request */
2157 if (vf_id >= pf->num_alloc_vfs) {
2158 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2159 ret = -EINVAL;
2160 goto error_pvid;
2161 }
2162
2163 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
2164 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
2165 ret = -EINVAL;
2166 goto error_pvid;
2167 }
2168
2169 vf = &(pf->vf[vf_id]);
fdf0e0bf 2170 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2171 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2d166c30
MW		 2172 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2173 vf_id);
2174 ret = -EAGAIN;
5c3c48ac
JB		 2175 goto error_pvid;
2176 }
2177
f7fc2f2e 2178 if (le16_to_cpu(vsi->info.pvid) == vlanprio)
85927ec1
MW		 2179 /* duplicate request, so just return success */
2180 goto error_pvid;
2181
21659035
KP		 2182 spin_lock_bh(&vsi->mac_filter_list_lock);
2183 is_vsi_in_vlan = i40e_is_vsi_in_vlan(vsi);
2184 spin_unlock_bh(&vsi->mac_filter_list_lock);
2185
2186 if (le16_to_cpu(vsi->info.pvid) == 0 && is_vsi_in_vlan) {
99a4973c
GR		 2187 dev_err(&pf->pdev->dev,
2188 "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
2189 vf_id);
f9b4b627
GR		 2190 /* Administrator Error - knock the VF offline until he does
2191 * the right thing by reconfiguring his network correctly
2192 * and then reloading the VF driver.
2193 */
2194 i40e_vc_disable_vf(pf, vf);
2195 }
99a4973c 2196
8d82a7c5
GR		 2197 /* Check for condition where there was already a port VLAN ID
2198 * filter set and now it is being deleted by setting it to zero.
1315f7c3
GR		 2199 * Additionally check for the condition where there was a port
2200 * VLAN but now there is a new and different port VLAN being set.
8d82a7c5
GR		 2201 * Before deleting all the old VLAN filters we must add new ones
2202 * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our
2203 * MAC addresses deleted.
2204 */
1315f7c3 2205 if ((!(vlan_id || qos) ||
f7fc2f2e 2206 vlanprio != le16_to_cpu(vsi->info.pvid)) &&
1315f7c3 2207 vsi->info.pvid)
8d82a7c5
GR		 2208 ret = i40e_vsi_add_vlan(vsi, I40E_VLAN_ANY);
2209
5c3c48ac
JB		 2210 if (vsi->info.pvid) {
2211 /* kill old VLAN */
2212 ret = i40e_vsi_kill_vlan(vsi, (le16_to_cpu(vsi->info.pvid) &
2213 VLAN_VID_MASK));
2214 if (ret) {
2215 dev_info(&vsi->back->pdev->dev,
2216 "remove VLAN failed, ret=%d, aq_err=%d\n",
2217 ret, pf->hw.aq.asq_last_status);
2218 }
2219 }
2220 if (vlan_id || qos)
f7fc2f2e 2221 ret = i40e_vsi_add_pvid(vsi, vlanprio);
5c3c48ac 2222 else
6c12fcbf 2223 i40e_vsi_remove_pvid(vsi);
5c3c48ac
JB		 2224
2225 if (vlan_id) {
2226 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
2227 vlan_id, qos, vf_id);
2228
2229 /* add new VLAN filter */
2230 ret = i40e_vsi_add_vlan(vsi, vlan_id);
2231 if (ret) {
2232 dev_info(&vsi->back->pdev->dev,
2233 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
2234 vsi->back->hw.aq.asq_last_status);
2235 goto error_pvid;
2236 }
8d82a7c5
GR		 2237 /* Kill non-vlan MAC filters - ignore error return since
2238 * there might not be any non-vlan MAC filters.
2239 */
2240 i40e_vsi_kill_vlan(vsi, I40E_VLAN_ANY);
5c3c48ac
JB		 2241 }
2242
2243 if (ret) {
2244 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
2245 goto error_pvid;
2246 }
6c12fcbf
GR		 2247 /* The Port VLAN needs to be saved across resets the same as the
2248 * default LAN MAC address.
2249 */
2250 vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
5c3c48ac
JB		 2251 ret = 0;
2252
2253error_pvid:
2254 return ret;
2255}
2256
84590fd9
MW		 2257#define I40E_BW_CREDIT_DIVISOR 50 /* 50Mbps per BW credit */
2258#define I40E_MAX_BW_INACTIVE_ACCUM 4 /* device can accumulate 4 credits max */
5c3c48ac
JB		 2259/**
2260 * i40e_ndo_set_vf_bw
2261 * @netdev: network interface device structure
b40c82e6
JK		 2262 * @vf_id: VF identifier
2263 * @tx_rate: Tx rate
5c3c48ac 2264 *
b40c82e6 2265 * configure VF Tx rate
5c3c48ac 2266 **/
ed616689
SC		 2267int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
2268 int max_tx_rate)
5c3c48ac 2269{
6b192891
MW		 2270 struct i40e_netdev_priv *np = netdev_priv(netdev);
2271 struct i40e_pf *pf = np->vsi->back;
2272 struct i40e_vsi *vsi;
2273 struct i40e_vf *vf;
2274 int speed = 0;
2275 int ret = 0;
2276
2277 /* validate the request */
2278 if (vf_id >= pf->num_alloc_vfs) {
2279 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d.\n", vf_id);
2280 ret = -EINVAL;
2281 goto error;
2282 }
2283
ed616689 2284 if (min_tx_rate) {
b40c82e6 2285 dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n",
ed616689
SC		 2286 min_tx_rate, vf_id);
2287 return -EINVAL;
2288 }
2289
6b192891 2290 vf = &(pf->vf[vf_id]);
fdf0e0bf 2291 vsi = pf->vsi[vf->lan_vsi_idx];
6b192891 2292 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2d166c30
MW		 2293 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2294 vf_id);
2295 ret = -EAGAIN;
6b192891
MW		 2296 goto error;
2297 }
2298
2299 switch (pf->hw.phy.link_info.link_speed) {
2300 case I40E_LINK_SPEED_40GB:
2301 speed = 40000;
2302 break;
2303 case I40E_LINK_SPEED_10GB:
2304 speed = 10000;
2305 break;
2306 case I40E_LINK_SPEED_1GB:
2307 speed = 1000;
2308 break;
2309 default:
2310 break;
2311 }
2312
ed616689 2313 if (max_tx_rate > speed) {
b40c82e6 2314 dev_err(&pf->pdev->dev, "Invalid max tx rate %d specified for VF %d.",
ed616689 2315 max_tx_rate, vf->vf_id);
6b192891
MW		 2316 ret = -EINVAL;
2317 goto error;
2318 }
2319
dac9b31a
MW		 2320 if ((max_tx_rate < 50) && (max_tx_rate > 0)) {
2321 dev_warn(&pf->pdev->dev, "Setting max Tx rate to minimum usable value of 50Mbps.\n");
2322 max_tx_rate = 50;
2323 }
2324
6b192891 2325 /* Tx rate credits are in values of 50Mbps, 0 is disabled*/
84590fd9
MW		 2326 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
2327 max_tx_rate / I40E_BW_CREDIT_DIVISOR,
2328 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
6b192891 2329 if (ret) {
ed616689 2330 dev_err(&pf->pdev->dev, "Unable to set max tx rate, error code %d.\n",
6b192891
MW		 2331 ret);
2332 ret = -EIO;
2333 goto error;
2334 }
ed616689 2335 vf->tx_rate = max_tx_rate;
6b192891
MW		 2336error:
2337 return ret;
5c3c48ac
JB		 2338}
2339
2340/**
2341 * i40e_ndo_get_vf_config
2342 * @netdev: network interface device structure
b40c82e6
JK		 2343 * @vf_id: VF identifier
2344 * @ivi: VF configuration structure
5c3c48ac 2345 *
b40c82e6 2346 * return VF configuration
5c3c48ac
JB		 2347 **/
2348int i40e_ndo_get_vf_config(struct net_device *netdev,
2349 int vf_id, struct ifla_vf_info *ivi)
2350{
2351 struct i40e_netdev_priv *np = netdev_priv(netdev);
5c3c48ac
JB		 2352 struct i40e_vsi *vsi = np->vsi;
2353 struct i40e_pf *pf = vsi->back;
2354 struct i40e_vf *vf;
2355 int ret = 0;
2356
2357 /* validate the request */
2358 if (vf_id >= pf->num_alloc_vfs) {
2359 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2360 ret = -EINVAL;
2361 goto error_param;
2362 }
2363
2364 vf = &(pf->vf[vf_id]);
2365 /* first vsi is always the LAN vsi */
fdf0e0bf 2366 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2367 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2d166c30
MW		 2368 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2369 vf_id);
2370 ret = -EAGAIN;
5c3c48ac
JB		 2371 goto error_param;
2372 }
2373
2374 ivi->vf = vf_id;
2375
6995b36c 2376 ether_addr_copy(ivi->mac, vf->default_lan_addr.addr);
5c3c48ac 2377
ed616689
SC		 2378 ivi->max_tx_rate = vf->tx_rate;
2379 ivi->min_tx_rate = 0;
5c3c48ac
JB		 2380 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
2381 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
2382 I40E_VLAN_PRIORITY_SHIFT;
84ca55a0
MW		 2383 if (vf->link_forced == false)
2384 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
2385 else if (vf->link_up == true)
2386 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
2387 else
2388 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
c674d125 2389 ivi->spoofchk = vf->spoofchk;
5c3c48ac
JB		 2390 ret = 0;
2391
2392error_param:
2393 return ret;
2394}
588aefa0
MW		 2395
2396/**
2397 * i40e_ndo_set_vf_link_state
2398 * @netdev: network interface device structure
b40c82e6 2399 * @vf_id: VF identifier
588aefa0
MW		 2400 * @link: required link state
2401 *
2402 * Set the link state of a specified VF, regardless of physical link state
2403 **/
2404int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
2405{
2406 struct i40e_netdev_priv *np = netdev_priv(netdev);
2407 struct i40e_pf *pf = np->vsi->back;
2408 struct i40e_virtchnl_pf_event pfe;
2409 struct i40e_hw *hw = &pf->hw;
2410 struct i40e_vf *vf;
f19efbb5 2411 int abs_vf_id;
588aefa0
MW		 2412 int ret = 0;
2413
2414 /* validate the request */
2415 if (vf_id >= pf->num_alloc_vfs) {
2416 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2417 ret = -EINVAL;
2418 goto error_out;
2419 }
2420
2421 vf = &pf->vf[vf_id];
f19efbb5 2422 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
588aefa0
MW		 2423
2424 pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
2425 pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
2426
2427 switch (link) {
2428 case IFLA_VF_LINK_STATE_AUTO:
2429 vf->link_forced = false;
2430 pfe.event_data.link_event.link_status =
2431 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
2432 pfe.event_data.link_event.link_speed =
2433 pf->hw.phy.link_info.link_speed;
2434 break;
2435 case IFLA_VF_LINK_STATE_ENABLE:
2436 vf->link_forced = true;
2437 vf->link_up = true;
2438 pfe.event_data.link_event.link_status = true;
2439 pfe.event_data.link_event.link_speed = I40E_LINK_SPEED_40GB;
2440 break;
2441 case IFLA_VF_LINK_STATE_DISABLE:
2442 vf->link_forced = true;
2443 vf->link_up = false;
2444 pfe.event_data.link_event.link_status = false;
2445 pfe.event_data.link_event.link_speed = 0;
2446 break;
2447 default:
2448 ret = -EINVAL;
2449 goto error_out;
2450 }
2451 /* Notify the VF of its new link state */
f19efbb5 2452 i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
588aefa0
MW		 2453 0, (u8 *)&pfe, sizeof(pfe), NULL);
2454
2455error_out:
2456 return ret;
2457}
c674d125
MW		 2458
2459/**
2460 * i40e_ndo_set_vf_spoofchk
2461 * @netdev: network interface device structure
b40c82e6 2462 * @vf_id: VF identifier
c674d125
MW		 2463 * @enable: flag to enable or disable feature
2464 *
2465 * Enable or disable VF spoof checking
2466 **/
e6d9004d 2467int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable)
c674d125
MW		 2468{
2469 struct i40e_netdev_priv *np = netdev_priv(netdev);
2470 struct i40e_vsi *vsi = np->vsi;
2471 struct i40e_pf *pf = vsi->back;
2472 struct i40e_vsi_context ctxt;
2473 struct i40e_hw *hw = &pf->hw;
2474 struct i40e_vf *vf;
2475 int ret = 0;
2476
2477 /* validate the request */
2478 if (vf_id >= pf->num_alloc_vfs) {
2479 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2480 ret = -EINVAL;
2481 goto out;
2482 }
2483
2484 vf = &(pf->vf[vf_id]);
2d166c30
MW		 2485 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2486 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2487 vf_id);
2488 ret = -EAGAIN;
2489 goto out;
2490 }
c674d125
MW		 2491
2492 if (enable == vf->spoofchk)
2493 goto out;
2494
2495 vf->spoofchk = enable;
2496 memset(&ctxt, 0, sizeof(ctxt));
fdf0e0bf 2497 ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid;
c674d125
MW		 2498 ctxt.pf_num = pf->hw.pf_id;
2499 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
2500 if (enable)
30d71af5
GR		 2501 ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
2502 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
c674d125
MW		 2503 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
2504 if (ret) {
2505 dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
2506 ret);
2507 ret = -EIO;
2508 }
2509out:
2510 return ret;
2511}
Linux 6.x block layer and io_uring tree(s)