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Merge tag 'clk-for-linus-3.14-part2' of git://git.linaro.org/people/mike.turquette...
[linux-2.6-block.git] / drivers / net / ethernet / intel / i40e / i40e_dcb.c
CommitLineData
afb3ff0d
NP		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#include "i40e_adminq.h"
28#include "i40e_prototype.h"
29#include "i40e_dcb.h"
30
31/**
32 * i40e_get_dcbx_status
33 * @hw: pointer to the hw struct
34 * @status: Embedded DCBX Engine Status
35 *
36 * Get the DCBX status from the Firmware
37 **/
38i40e_status i40e_get_dcbx_status(struct i40e_hw *hw, u16 *status)
39{
40 u32 reg;
41
42 if (!status)
43 return I40E_ERR_PARAM;
44
45 reg = rd32(hw, I40E_PRTDCB_GENS);
46 *status = (u16)((reg & I40E_PRTDCB_GENS_DCBX_STATUS_MASK) >>
47 I40E_PRTDCB_GENS_DCBX_STATUS_SHIFT);
48
49 return 0;
50}
51
52/**
53 * i40e_parse_ieee_etscfg_tlv
54 * @tlv: IEEE 802.1Qaz ETS CFG TLV
55 * @dcbcfg: Local store to update ETS CFG data
56 *
57 * Parses IEEE 802.1Qaz ETS CFG TLV
58 **/
59static void i40e_parse_ieee_etscfg_tlv(struct i40e_lldp_org_tlv *tlv,
60 struct i40e_dcbx_config *dcbcfg)
61{
62 struct i40e_ieee_ets_config *etscfg;
63 u8 *buf = tlv->tlvinfo;
64 u16 offset = 0;
65 u8 priority;
66 int i;
67
68 /* First Octet post subtype
69 * --------------------------
70 * |will-|CBS | Re- | Max |
71 * |ing | |served| TCs |
72 * --------------------------
73 * |1bit | 1bit|3 bits|3bits|
74 */
75 etscfg = &dcbcfg->etscfg;
76 etscfg->willing = (u8)((buf[offset] & I40E_IEEE_ETS_WILLING_MASK) >>
77 I40E_IEEE_ETS_WILLING_SHIFT);
78 etscfg->cbs = (u8)((buf[offset] & I40E_IEEE_ETS_CBS_MASK) >>
79 I40E_IEEE_ETS_CBS_SHIFT);
80 etscfg->maxtcs = (u8)((buf[offset] & I40E_IEEE_ETS_MAXTC_MASK) >>
81 I40E_IEEE_ETS_MAXTC_SHIFT);
82
83 /* Move offset to Priority Assignment Table */
84 offset++;
85
86 /* Priority Assignment Table (4 octets)
87 * Octets:| 1 | 2 | 3 | 4 |
88 * -----------------------------------------
89 * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
90 * -----------------------------------------
91 * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
92 * -----------------------------------------
93 */
94 for (i = 0; i < 4; i++) {
95 priority = (u8)((buf[offset] & I40E_IEEE_ETS_PRIO_1_MASK) >>
96 I40E_IEEE_ETS_PRIO_1_SHIFT);
97 etscfg->prioritytable[i * 2] = priority;
98 priority = (u8)((buf[offset] & I40E_IEEE_ETS_PRIO_0_MASK) >>
99 I40E_IEEE_ETS_PRIO_0_SHIFT);
100 etscfg->prioritytable[i * 2 + 1] = priority;
101 offset++;
102 }
103
104 /* TC Bandwidth Table (8 octets)
105 * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
106 * ---------------------------------
107 * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
108 * ---------------------------------
109 */
110 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
111 etscfg->tcbwtable[i] = buf[offset++];
112
113 /* TSA Assignment Table (8 octets)
114 * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
115 * ---------------------------------
116 * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
117 * ---------------------------------
118 */
119 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
120 etscfg->tsatable[i] = buf[offset++];
121}
122
123/**
124 * i40e_parse_ieee_etsrec_tlv
125 * @tlv: IEEE 802.1Qaz ETS REC TLV
126 * @dcbcfg: Local store to update ETS REC data
127 *
128 * Parses IEEE 802.1Qaz ETS REC TLV
129 **/
130static void i40e_parse_ieee_etsrec_tlv(struct i40e_lldp_org_tlv *tlv,
131 struct i40e_dcbx_config *dcbcfg)
132{
133 u8 *buf = tlv->tlvinfo;
134 u16 offset = 0;
135 u8 priority;
136 int i;
137
138 /* Move offset to priority table */
139 offset++;
140
141 /* Priority Assignment Table (4 octets)
142 * Octets:| 1 | 2 | 3 | 4 |
143 * -----------------------------------------
144 * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
145 * -----------------------------------------
146 * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
147 * -----------------------------------------
148 */
149 for (i = 0; i < 4; i++) {
150 priority = (u8)((buf[offset] & I40E_IEEE_ETS_PRIO_1_MASK) >>
151 I40E_IEEE_ETS_PRIO_1_SHIFT);
152 dcbcfg->etsrec.prioritytable[i*2] = priority;
153 priority = (u8)((buf[offset] & I40E_IEEE_ETS_PRIO_0_MASK) >>
154 I40E_IEEE_ETS_PRIO_0_SHIFT);
155 dcbcfg->etsrec.prioritytable[i*2 + 1] = priority;
156 offset++;
157 }
158
159 /* TC Bandwidth Table (8 octets)
160 * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
161 * ---------------------------------
162 * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
163 * ---------------------------------
164 */
165 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
166 dcbcfg->etsrec.tcbwtable[i] = buf[offset++];
167
168 /* TSA Assignment Table (8 octets)
169 * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
170 * ---------------------------------
171 * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
172 * ---------------------------------
173 */
174 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
175 dcbcfg->etsrec.tsatable[i] = buf[offset++];
176}
177
178/**
179 * i40e_parse_ieee_pfccfg_tlv
180 * @tlv: IEEE 802.1Qaz PFC CFG TLV
181 * @dcbcfg: Local store to update PFC CFG data
182 *
183 * Parses IEEE 802.1Qaz PFC CFG TLV
184 **/
185static void i40e_parse_ieee_pfccfg_tlv(struct i40e_lldp_org_tlv *tlv,
186 struct i40e_dcbx_config *dcbcfg)
187{
188 u8 *buf = tlv->tlvinfo;
189
190 /* ----------------------------------------
191 * |will-|MBC | Re- | PFC | PFC Enable |
192 * |ing | |served| cap | |
193 * -----------------------------------------
194 * |1bit | 1bit|2 bits|4bits| 1 octet |
195 */
196 dcbcfg->pfc.willing = (u8)((buf[0] & I40E_IEEE_PFC_WILLING_MASK) >>
197 I40E_IEEE_PFC_WILLING_SHIFT);
198 dcbcfg->pfc.mbc = (u8)((buf[0] & I40E_IEEE_PFC_MBC_MASK) >>
199 I40E_IEEE_PFC_MBC_SHIFT);
200 dcbcfg->pfc.pfccap = (u8)((buf[0] & I40E_IEEE_PFC_CAP_MASK) >>
201 I40E_IEEE_PFC_CAP_SHIFT);
202 dcbcfg->pfc.pfcenable = buf[1];
203}
204
205/**
206 * i40e_parse_ieee_app_tlv
207 * @tlv: IEEE 802.1Qaz APP TLV
208 * @dcbcfg: Local store to update APP PRIO data
209 *
210 * Parses IEEE 802.1Qaz APP PRIO TLV
211 **/
212static void i40e_parse_ieee_app_tlv(struct i40e_lldp_org_tlv *tlv,
213 struct i40e_dcbx_config *dcbcfg)
214{
215 u16 typelength;
216 u16 offset = 0;
217 u16 length;
218 int i = 0;
219 u8 *buf;
220
221 typelength = ntohs(tlv->typelength);
222 length = (u16)((typelength & I40E_LLDP_TLV_LEN_MASK) >>
223 I40E_LLDP_TLV_LEN_SHIFT);
224 buf = tlv->tlvinfo;
225
226 /* The App priority table starts 5 octets after TLV header */
227 length -= (sizeof(tlv->ouisubtype) + 1);
228
229 /* Move offset to App Priority Table */
230 offset++;
231
232 /* Application Priority Table (3 octets)
233 * Octets:| 1 | 2 | 3 |
234 * -----------------------------------------
235 * |Priority|Rsrvd| Sel | Protocol ID |
236 * -----------------------------------------
237 * Bits:|23 21|20 19|18 16|15 0|
238 * -----------------------------------------
239 */
240 while (offset < length) {
241 dcbcfg->app[i].priority = (u8)((buf[offset] &
242 I40E_IEEE_APP_PRIO_MASK) >>
243 I40E_IEEE_APP_PRIO_SHIFT);
244 dcbcfg->app[i].selector = (u8)((buf[offset] &
245 I40E_IEEE_APP_SEL_MASK) >>
246 I40E_IEEE_APP_SEL_SHIFT);
247 dcbcfg->app[i].protocolid = (buf[offset + 1] << 0x8) |
248 buf[offset + 2];
249 /* Move to next app */
250 offset += 3;
251 i++;
252 if (i >= I40E_DCBX_MAX_APPS)
253 break;
254 }
255
256 dcbcfg->numapps = i;
257}
258
259/**
260 * i40e_parse_ieee_etsrec_tlv
261 * @tlv: IEEE 802.1Qaz TLV
262 * @dcbcfg: Local store to update ETS REC data
263 *
264 * Get the TLV subtype and send it to parsing function
265 * based on the subtype value
266 **/
267static void i40e_parse_ieee_tlv(struct i40e_lldp_org_tlv *tlv,
268 struct i40e_dcbx_config *dcbcfg)
269{
270 u32 ouisubtype;
271 u8 subtype;
272
273 ouisubtype = ntohl(tlv->ouisubtype);
274 subtype = (u8)((ouisubtype & I40E_LLDP_TLV_SUBTYPE_MASK) >>
275 I40E_LLDP_TLV_SUBTYPE_SHIFT);
276 switch (subtype) {
277 case I40E_IEEE_SUBTYPE_ETS_CFG:
278 i40e_parse_ieee_etscfg_tlv(tlv, dcbcfg);
279 break;
280 case I40E_IEEE_SUBTYPE_ETS_REC:
281 i40e_parse_ieee_etsrec_tlv(tlv, dcbcfg);
282 break;
283 case I40E_IEEE_SUBTYPE_PFC_CFG:
284 i40e_parse_ieee_pfccfg_tlv(tlv, dcbcfg);
285 break;
286 case I40E_IEEE_SUBTYPE_APP_PRI:
287 i40e_parse_ieee_app_tlv(tlv, dcbcfg);
288 break;
289 default:
290 break;
291 }
292}
293
294/**
295 * i40e_parse_org_tlv
296 * @tlv: Organization specific TLV
297 * @dcbcfg: Local store to update ETS REC data
298 *
299 * Currently only IEEE 802.1Qaz TLV is supported, all others
300 * will be returned
301 **/
302static void i40e_parse_org_tlv(struct i40e_lldp_org_tlv *tlv,
303 struct i40e_dcbx_config *dcbcfg)
304{
305 u32 ouisubtype;
306 u32 oui;
307
308 ouisubtype = ntohl(tlv->ouisubtype);
309 oui = (u32)((ouisubtype & I40E_LLDP_TLV_OUI_MASK) >>
310 I40E_LLDP_TLV_OUI_SHIFT);
311 switch (oui) {
312 case I40E_IEEE_8021QAZ_OUI:
313 i40e_parse_ieee_tlv(tlv, dcbcfg);
314 break;
315 default:
316 break;
317 }
318}
319
320/**
321 * i40e_lldp_to_dcb_config
322 * @lldpmib: LLDPDU to be parsed
323 * @dcbcfg: store for LLDPDU data
324 *
325 * Parse DCB configuration from the LLDPDU
326 **/
327i40e_status i40e_lldp_to_dcb_config(u8 *lldpmib,
328 struct i40e_dcbx_config *dcbcfg)
329{
330 i40e_status ret = 0;
331 struct i40e_lldp_org_tlv *tlv;
332 u16 type;
333 u16 length;
334 u16 typelength;
335
336 if (!lldpmib || !dcbcfg)
337 return I40E_ERR_PARAM;
338
339 /* set to the start of LLDPDU */
340 lldpmib += ETH_HLEN;
341 tlv = (struct i40e_lldp_org_tlv *)lldpmib;
342 while (tlv) {
343 typelength = ntohs(tlv->typelength);
344 type = (u16)((typelength & I40E_LLDP_TLV_TYPE_MASK) >>
345 I40E_LLDP_TLV_TYPE_SHIFT);
346 length = (u16)((typelength & I40E_LLDP_TLV_LEN_MASK) >>
347 I40E_LLDP_TLV_LEN_SHIFT);
348
349 if (type == I40E_TLV_TYPE_END)
350 break;/* END TLV break out */
351
352 switch (type) {
353 case I40E_TLV_TYPE_ORG:
354 i40e_parse_org_tlv(tlv, dcbcfg);
355 break;
356 default:
357 break;
358 }
359
360 /* Move to next TLV */
361 tlv = (struct i40e_lldp_org_tlv *)((char *)tlv +
362 sizeof(tlv->typelength) +
363 length);
364 }
365
366 return ret;
367}
368
369/**
370 * i40e_aq_get_dcb_config
371 * @hw: pointer to the hw struct
372 * @mib_type: mib type for the query
373 * @bridgetype: bridge type for the query (remote)
374 * @dcbcfg: store for LLDPDU data
375 *
376 * Query DCB configuration from the Firmware
377 **/
378i40e_status i40e_aq_get_dcb_config(struct i40e_hw *hw, u8 mib_type,
379 u8 bridgetype,
380 struct i40e_dcbx_config *dcbcfg)
381{
382 i40e_status ret = 0;
383 struct i40e_virt_mem mem;
384 u8 *lldpmib;
385
386 /* Allocate the LLDPDU */
387 ret = i40e_allocate_virt_mem(hw, &mem, I40E_LLDPDU_SIZE);
388 if (ret)
389 return ret;
390
391 lldpmib = (u8 *)mem.va;
392 ret = i40e_aq_get_lldp_mib(hw, bridgetype, mib_type,
393 (void *)lldpmib, I40E_LLDPDU_SIZE,
394 NULL, NULL, NULL);
395 if (ret)
396 goto free_mem;
397
398 /* Parse LLDP MIB to get dcb configuration */
399 ret = i40e_lldp_to_dcb_config(lldpmib, dcbcfg);
400
401free_mem:
402 i40e_free_virt_mem(hw, &mem);
403 return ret;
404}
405
406/**
407 * i40e_get_dcb_config
408 * @hw: pointer to the hw struct
409 *
410 * Get DCB configuration from the Firmware
411 **/
412i40e_status i40e_get_dcb_config(struct i40e_hw *hw)
413{
414 i40e_status ret = 0;
415
416 /* Get Local DCB Config */
417 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_LOCAL, 0,
418 &hw->local_dcbx_config);
419 if (ret)
420 goto out;
421
422 /* Get Remote DCB Config */
423 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
424 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
425 &hw->remote_dcbx_config);
426out:
427 return ret;
428}
429
430/**
431 * i40e_init_dcb
432 * @hw: pointer to the hw struct
433 *
434 * Update DCB configuration from the Firmware
435 **/
436i40e_status i40e_init_dcb(struct i40e_hw *hw)
437{
438 i40e_status ret = 0;
439
440 if (!hw->func_caps.dcb)
441 return ret;
442
443 /* Get DCBX status */
444 ret = i40e_get_dcbx_status(hw, &hw->dcbx_status);
445 if (ret)
446 return ret;
447
448 /* Check the DCBX Status */
449 switch (hw->dcbx_status) {
450 case I40E_DCBX_STATUS_DONE:
451 case I40E_DCBX_STATUS_IN_PROGRESS:
452 /* Get current DCBX configuration */
453 ret = i40e_get_dcb_config(hw);
454 break;
455 case I40E_DCBX_STATUS_DISABLED:
456 return ret;
457 case I40E_DCBX_STATUS_NOT_STARTED:
458 case I40E_DCBX_STATUS_MULTIPLE_PEERS:
459 default:
460 break;
461 }
462
463 /* Configure the LLDP MIB change event */
464 ret = i40e_aq_cfg_lldp_mib_change_event(hw, true, NULL);
465 if (ret)
466 return ret;
467
468 return ret;
469}
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