e1000e: Cleanup - Update GPL header and Copyright
[linux-2.6-block.git] / drivers / net / ethernet / intel / e1000e / ethtool.c
CommitLineData
e78b80b1
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1/* Intel PRO/1000 Linux driver
2 * Copyright(c) 1999 - 2014 Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
15 *
16 * Contact Information:
17 * Linux NICS <linux.nics@intel.com>
18 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
19 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
20 */
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21
22/* ethtool support for e1000 */
23
24#include <linux/netdevice.h>
9fb7a5f7 25#include <linux/interrupt.h>
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26#include <linux/ethtool.h>
27#include <linux/pci.h>
5a0e3ad6 28#include <linux/slab.h>
bc7f75fa 29#include <linux/delay.h>
c85c21ad 30#include <linux/vmalloc.h>
e60b22c5 31#include <linux/pm_runtime.h>
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32
33#include "e1000.h"
34
362e20ca 35enum { NETDEV_STATS, E1000_STATS };
e0f36a95 36
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37struct e1000_stats {
38 char stat_string[ETH_GSTRING_LEN];
e0f36a95 39 int type;
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40 int sizeof_stat;
41 int stat_offset;
42};
43
f0f1a172 44#define E1000_STAT(str, m) { \
67fd4fcb
JK
45 .stat_string = str, \
46 .type = E1000_STATS, \
47 .sizeof_stat = sizeof(((struct e1000_adapter *)0)->m), \
48 .stat_offset = offsetof(struct e1000_adapter, m) }
f0f1a172 49#define E1000_NETDEV_STAT(str, m) { \
67fd4fcb
JK
50 .stat_string = str, \
51 .type = NETDEV_STATS, \
52 .sizeof_stat = sizeof(((struct rtnl_link_stats64 *)0)->m), \
53 .stat_offset = offsetof(struct rtnl_link_stats64, m) }
e0f36a95 54
bc7f75fa 55static const struct e1000_stats e1000_gstrings_stats[] = {
f0f1a172
BA
56 E1000_STAT("rx_packets", stats.gprc),
57 E1000_STAT("tx_packets", stats.gptc),
58 E1000_STAT("rx_bytes", stats.gorc),
59 E1000_STAT("tx_bytes", stats.gotc),
60 E1000_STAT("rx_broadcast", stats.bprc),
61 E1000_STAT("tx_broadcast", stats.bptc),
62 E1000_STAT("rx_multicast", stats.mprc),
63 E1000_STAT("tx_multicast", stats.mptc),
67fd4fcb
JK
64 E1000_NETDEV_STAT("rx_errors", rx_errors),
65 E1000_NETDEV_STAT("tx_errors", tx_errors),
66 E1000_NETDEV_STAT("tx_dropped", tx_dropped),
f0f1a172
BA
67 E1000_STAT("multicast", stats.mprc),
68 E1000_STAT("collisions", stats.colc),
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JK
69 E1000_NETDEV_STAT("rx_length_errors", rx_length_errors),
70 E1000_NETDEV_STAT("rx_over_errors", rx_over_errors),
f0f1a172 71 E1000_STAT("rx_crc_errors", stats.crcerrs),
67fd4fcb 72 E1000_NETDEV_STAT("rx_frame_errors", rx_frame_errors),
f0f1a172
BA
73 E1000_STAT("rx_no_buffer_count", stats.rnbc),
74 E1000_STAT("rx_missed_errors", stats.mpc),
75 E1000_STAT("tx_aborted_errors", stats.ecol),
76 E1000_STAT("tx_carrier_errors", stats.tncrs),
67fd4fcb
JK
77 E1000_NETDEV_STAT("tx_fifo_errors", tx_fifo_errors),
78 E1000_NETDEV_STAT("tx_heartbeat_errors", tx_heartbeat_errors),
f0f1a172
BA
79 E1000_STAT("tx_window_errors", stats.latecol),
80 E1000_STAT("tx_abort_late_coll", stats.latecol),
81 E1000_STAT("tx_deferred_ok", stats.dc),
82 E1000_STAT("tx_single_coll_ok", stats.scc),
83 E1000_STAT("tx_multi_coll_ok", stats.mcc),
84 E1000_STAT("tx_timeout_count", tx_timeout_count),
85 E1000_STAT("tx_restart_queue", restart_queue),
86 E1000_STAT("rx_long_length_errors", stats.roc),
87 E1000_STAT("rx_short_length_errors", stats.ruc),
88 E1000_STAT("rx_align_errors", stats.algnerrc),
89 E1000_STAT("tx_tcp_seg_good", stats.tsctc),
90 E1000_STAT("tx_tcp_seg_failed", stats.tsctfc),
91 E1000_STAT("rx_flow_control_xon", stats.xonrxc),
92 E1000_STAT("rx_flow_control_xoff", stats.xoffrxc),
93 E1000_STAT("tx_flow_control_xon", stats.xontxc),
94 E1000_STAT("tx_flow_control_xoff", stats.xofftxc),
f0f1a172
BA
95 E1000_STAT("rx_csum_offload_good", hw_csum_good),
96 E1000_STAT("rx_csum_offload_errors", hw_csum_err),
97 E1000_STAT("rx_header_split", rx_hdr_split),
98 E1000_STAT("alloc_rx_buff_failed", alloc_rx_buff_failed),
99 E1000_STAT("tx_smbus", stats.mgptc),
100 E1000_STAT("rx_smbus", stats.mgprc),
101 E1000_STAT("dropped_smbus", stats.mgpdc),
102 E1000_STAT("rx_dma_failed", rx_dma_failed),
103 E1000_STAT("tx_dma_failed", tx_dma_failed),
b67e1913 104 E1000_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
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BA
105 E1000_STAT("uncorr_ecc_errors", uncorr_errors),
106 E1000_STAT("corr_ecc_errors", corr_errors),
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107};
108
c00acf46 109#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
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110#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN)
111static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
112 "Register test (offline)", "Eeprom test (offline)",
113 "Interrupt test (offline)", "Loopback test (offline)",
114 "Link test (on/offline)"
115};
fc830b78 116
ad68076e 117#define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
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118
119static int e1000_get_settings(struct net_device *netdev,
120 struct ethtool_cmd *ecmd)
121{
122 struct e1000_adapter *adapter = netdev_priv(netdev);
123 struct e1000_hw *hw = &adapter->hw;
70739497 124 u32 speed;
bc7f75fa 125
318a94d6 126 if (hw->phy.media_type == e1000_media_type_copper) {
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127 ecmd->supported = (SUPPORTED_10baseT_Half |
128 SUPPORTED_10baseT_Full |
129 SUPPORTED_100baseT_Half |
130 SUPPORTED_100baseT_Full |
131 SUPPORTED_1000baseT_Full |
132 SUPPORTED_Autoneg |
133 SUPPORTED_TP);
134 if (hw->phy.type == e1000_phy_ife)
135 ecmd->supported &= ~SUPPORTED_1000baseT_Full;
136 ecmd->advertising = ADVERTISED_TP;
137
138 if (hw->mac.autoneg == 1) {
139 ecmd->advertising |= ADVERTISED_Autoneg;
140 /* the e1000 autoneg seems to match ethtool nicely */
141 ecmd->advertising |= hw->phy.autoneg_advertised;
142 }
143
144 ecmd->port = PORT_TP;
145 ecmd->phy_address = hw->phy.addr;
146 ecmd->transceiver = XCVR_INTERNAL;
147
148 } else {
149 ecmd->supported = (SUPPORTED_1000baseT_Full |
150 SUPPORTED_FIBRE |
151 SUPPORTED_Autoneg);
152
153 ecmd->advertising = (ADVERTISED_1000baseT_Full |
154 ADVERTISED_FIBRE |
155 ADVERTISED_Autoneg);
156
157 ecmd->port = PORT_FIBRE;
158 ecmd->transceiver = XCVR_EXTERNAL;
159 }
160
70739497 161 speed = -1;
0c6bdb30
BA
162 ecmd->duplex = -1;
163
164 if (netif_running(netdev)) {
165 if (netif_carrier_ok(netdev)) {
70739497 166 speed = adapter->link_speed;
0c6bdb30
BA
167 ecmd->duplex = adapter->link_duplex - 1;
168 }
3ef672ab 169 } else if (!pm_runtime_suspended(netdev->dev.parent)) {
0c6bdb30
BA
170 u32 status = er32(STATUS);
171 if (status & E1000_STATUS_LU) {
172 if (status & E1000_STATUS_SPEED_1000)
70739497 173 speed = SPEED_1000;
0c6bdb30 174 else if (status & E1000_STATUS_SPEED_100)
70739497 175 speed = SPEED_100;
0c6bdb30 176 else
70739497 177 speed = SPEED_10;
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BA
178
179 if (status & E1000_STATUS_FD)
180 ecmd->duplex = DUPLEX_FULL;
181 else
182 ecmd->duplex = DUPLEX_HALF;
183 }
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184 }
185
70739497 186 ethtool_cmd_speed_set(ecmd, speed);
318a94d6 187 ecmd->autoneg = ((hw->phy.media_type == e1000_media_type_fiber) ||
bc7f75fa 188 hw->mac.autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
18760f1e
CL
189
190 /* MDI-X => 2; MDI =>1; Invalid =>0 */
191 if ((hw->phy.media_type == e1000_media_type_copper) &&
0c6bdb30 192 netif_carrier_ok(netdev))
f0ff4398 193 ecmd->eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X : ETH_TP_MDI;
18760f1e
CL
194 else
195 ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
196
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JB
197 if (hw->phy.mdix == AUTO_ALL_MODES)
198 ecmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
199 else
200 ecmd->eth_tp_mdix_ctrl = hw->phy.mdix;
201
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202 return 0;
203}
204
14ad2513 205static int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
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206{
207 struct e1000_mac_info *mac = &adapter->hw.mac;
208
209 mac->autoneg = 0;
210
14ad2513 211 /* Make sure dplx is at most 1 bit and lsb of speed is not set
e921eb1a
BA
212 * for the switch() below to work
213 */
14ad2513
DD
214 if ((spd & 1) || (dplx & ~1))
215 goto err_inval;
216
bc7f75fa 217 /* Fiber NICs only allow 1000 gbps Full duplex */
318a94d6 218 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
e5fe2541 219 (spd != SPEED_1000) && (dplx != DUPLEX_FULL)) {
14ad2513 220 goto err_inval;
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221 }
222
14ad2513 223 switch (spd + dplx) {
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224 case SPEED_10 + DUPLEX_HALF:
225 mac->forced_speed_duplex = ADVERTISE_10_HALF;
226 break;
227 case SPEED_10 + DUPLEX_FULL:
228 mac->forced_speed_duplex = ADVERTISE_10_FULL;
229 break;
230 case SPEED_100 + DUPLEX_HALF:
231 mac->forced_speed_duplex = ADVERTISE_100_HALF;
232 break;
233 case SPEED_100 + DUPLEX_FULL:
234 mac->forced_speed_duplex = ADVERTISE_100_FULL;
235 break;
236 case SPEED_1000 + DUPLEX_FULL:
237 mac->autoneg = 1;
238 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
239 break;
e80bd1d1 240 case SPEED_1000 + DUPLEX_HALF: /* not supported */
bc7f75fa 241 default:
14ad2513 242 goto err_inval;
bc7f75fa 243 }
4e8186b6
JB
244
245 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
246 adapter->hw.phy.mdix = AUTO_ALL_MODES;
247
bc7f75fa 248 return 0;
14ad2513
DD
249
250err_inval:
251 e_err("Unsupported Speed/Duplex configuration\n");
252 return -EINVAL;
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AK
253}
254
255static int e1000_set_settings(struct net_device *netdev,
256 struct ethtool_cmd *ecmd)
257{
258 struct e1000_adapter *adapter = netdev_priv(netdev);
259 struct e1000_hw *hw = &adapter->hw;
3ef672ab
BA
260 int ret_val = 0;
261
262 pm_runtime_get_sync(netdev->dev.parent);
bc7f75fa 263
e921eb1a 264 /* When SoL/IDER sessions are active, autoneg/speed/duplex
ad68076e
BA
265 * cannot be changed
266 */
470a5420
BA
267 if (hw->phy.ops.check_reset_block &&
268 hw->phy.ops.check_reset_block(hw)) {
6ad65145 269 e_err("Cannot change link characteristics when SoL/IDER is active.\n");
3ef672ab
BA
270 ret_val = -EINVAL;
271 goto out;
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272 }
273
e921eb1a 274 /* MDI setting is only allowed when autoneg enabled because
4e8186b6
JB
275 * some hardware doesn't allow MDI setting when speed or
276 * duplex is forced.
277 */
278 if (ecmd->eth_tp_mdix_ctrl) {
3ef672ab
BA
279 if (hw->phy.media_type != e1000_media_type_copper) {
280 ret_val = -EOPNOTSUPP;
281 goto out;
282 }
4e8186b6
JB
283
284 if ((ecmd->eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
285 (ecmd->autoneg != AUTONEG_ENABLE)) {
286 e_err("forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
3ef672ab
BA
287 ret_val = -EINVAL;
288 goto out;
4e8186b6
JB
289 }
290 }
291
bc7f75fa 292 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 293 usleep_range(1000, 2000);
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294
295 if (ecmd->autoneg == AUTONEG_ENABLE) {
296 hw->mac.autoneg = 1;
318a94d6 297 if (hw->phy.media_type == e1000_media_type_fiber)
bc7f75fa 298 hw->phy.autoneg_advertised = ADVERTISED_1000baseT_Full |
f0ff4398 299 ADVERTISED_FIBRE | ADVERTISED_Autoneg;
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300 else
301 hw->phy.autoneg_advertised = ecmd->advertising |
f0ff4398 302 ADVERTISED_TP | ADVERTISED_Autoneg;
bc7f75fa 303 ecmd->advertising = hw->phy.autoneg_advertised;
318a94d6 304 if (adapter->fc_autoneg)
5c48ef3e 305 hw->fc.requested_mode = e1000_fc_default;
bc7f75fa 306 } else {
25db0338 307 u32 speed = ethtool_cmd_speed(ecmd);
4e8186b6 308 /* calling this overrides forced MDI setting */
14ad2513 309 if (e1000_set_spd_dplx(adapter, speed, ecmd->duplex)) {
3ef672ab
BA
310 ret_val = -EINVAL;
311 goto out;
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AK
312 }
313 }
314
4e8186b6
JB
315 /* MDI-X => 2; MDI => 1; Auto => 3 */
316 if (ecmd->eth_tp_mdix_ctrl) {
e921eb1a 317 /* fix up the value for auto (3 => 0) as zero is mapped
4e8186b6
JB
318 * internally to auto
319 */
320 if (ecmd->eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
321 hw->phy.mdix = AUTO_ALL_MODES;
322 else
323 hw->phy.mdix = ecmd->eth_tp_mdix_ctrl;
324 }
325
bc7f75fa 326 /* reset the link */
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AK
327 if (netif_running(adapter->netdev)) {
328 e1000e_down(adapter);
329 e1000e_up(adapter);
a7a1d9da 330 } else {
bc7f75fa 331 e1000e_reset(adapter);
a7a1d9da 332 }
bc7f75fa 333
3ef672ab
BA
334out:
335 pm_runtime_put_sync(netdev->dev.parent);
bc7f75fa 336 clear_bit(__E1000_RESETTING, &adapter->state);
3ef672ab 337 return ret_val;
bc7f75fa
AK
338}
339
340static void e1000_get_pauseparam(struct net_device *netdev,
341 struct ethtool_pauseparam *pause)
342{
343 struct e1000_adapter *adapter = netdev_priv(netdev);
344 struct e1000_hw *hw = &adapter->hw;
345
346 pause->autoneg =
f0ff4398 347 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
bc7f75fa 348
5c48ef3e 349 if (hw->fc.current_mode == e1000_fc_rx_pause) {
bc7f75fa 350 pause->rx_pause = 1;
5c48ef3e 351 } else if (hw->fc.current_mode == e1000_fc_tx_pause) {
bc7f75fa 352 pause->tx_pause = 1;
5c48ef3e 353 } else if (hw->fc.current_mode == e1000_fc_full) {
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AK
354 pause->rx_pause = 1;
355 pause->tx_pause = 1;
356 }
357}
358
359static int e1000_set_pauseparam(struct net_device *netdev,
360 struct ethtool_pauseparam *pause)
361{
362 struct e1000_adapter *adapter = netdev_priv(netdev);
363 struct e1000_hw *hw = &adapter->hw;
364 int retval = 0;
365
366 adapter->fc_autoneg = pause->autoneg;
367
368 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 369 usleep_range(1000, 2000);
bc7f75fa 370
3ef672ab
BA
371 pm_runtime_get_sync(netdev->dev.parent);
372
bc7f75fa 373 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
5c48ef3e 374 hw->fc.requested_mode = e1000_fc_default;
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AK
375 if (netif_running(adapter->netdev)) {
376 e1000e_down(adapter);
377 e1000e_up(adapter);
378 } else {
379 e1000e_reset(adapter);
380 }
381 } else {
5c48ef3e
BA
382 if (pause->rx_pause && pause->tx_pause)
383 hw->fc.requested_mode = e1000_fc_full;
384 else if (pause->rx_pause && !pause->tx_pause)
385 hw->fc.requested_mode = e1000_fc_rx_pause;
386 else if (!pause->rx_pause && pause->tx_pause)
387 hw->fc.requested_mode = e1000_fc_tx_pause;
388 else if (!pause->rx_pause && !pause->tx_pause)
389 hw->fc.requested_mode = e1000_fc_none;
390
391 hw->fc.current_mode = hw->fc.requested_mode;
392
945eb313
BA
393 if (hw->phy.media_type == e1000_media_type_fiber) {
394 retval = hw->mac.ops.setup_link(hw);
395 /* implicit goto out */
396 } else {
397 retval = e1000e_force_mac_fc(hw);
398 if (retval)
399 goto out;
400 e1000e_set_fc_watermarks(hw);
401 }
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AK
402 }
403
945eb313 404out:
3ef672ab 405 pm_runtime_put_sync(netdev->dev.parent);
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406 clear_bit(__E1000_RESETTING, &adapter->state);
407 return retval;
408}
409
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410static u32 e1000_get_msglevel(struct net_device *netdev)
411{
412 struct e1000_adapter *adapter = netdev_priv(netdev);
413 return adapter->msg_enable;
414}
415
416static void e1000_set_msglevel(struct net_device *netdev, u32 data)
417{
418 struct e1000_adapter *adapter = netdev_priv(netdev);
419 adapter->msg_enable = data;
420}
421
8bb62869 422static int e1000_get_regs_len(struct net_device __always_unused *netdev)
bc7f75fa 423{
e80bd1d1 424#define E1000_REGS_LEN 32 /* overestimate */
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AK
425 return E1000_REGS_LEN * sizeof(u32);
426}
427
428static void e1000_get_regs(struct net_device *netdev,
429 struct ethtool_regs *regs, void *p)
430{
431 struct e1000_adapter *adapter = netdev_priv(netdev);
432 struct e1000_hw *hw = &adapter->hw;
433 u32 *regs_buff = p;
434 u16 phy_data;
bc7f75fa 435
3ef672ab
BA
436 pm_runtime_get_sync(netdev->dev.parent);
437
bc7f75fa
AK
438 memset(p, 0, E1000_REGS_LEN * sizeof(u32));
439
ff938e43 440 regs->version = (1 << 24) | (adapter->pdev->revision << 16) |
f0ff4398 441 adapter->pdev->device;
bc7f75fa 442
e80bd1d1
BA
443 regs_buff[0] = er32(CTRL);
444 regs_buff[1] = er32(STATUS);
bc7f75fa 445
e80bd1d1
BA
446 regs_buff[2] = er32(RCTL);
447 regs_buff[3] = er32(RDLEN(0));
448 regs_buff[4] = er32(RDH(0));
449 regs_buff[5] = er32(RDT(0));
450 regs_buff[6] = er32(RDTR);
bc7f75fa 451
e80bd1d1
BA
452 regs_buff[7] = er32(TCTL);
453 regs_buff[8] = er32(TDLEN(0));
454 regs_buff[9] = er32(TDH(0));
1e36052e 455 regs_buff[10] = er32(TDT(0));
bc7f75fa
AK
456 regs_buff[11] = er32(TIDV);
457
e80bd1d1 458 regs_buff[12] = adapter->hw.phy.type; /* PHY type (IGP=1, M88=0) */
23033fad
JB
459
460 /* ethtool doesn't use anything past this point, so all this
e921eb1a
BA
461 * code is likely legacy junk for apps that may or may not exist
462 */
bc7f75fa
AK
463 if (hw->phy.type == e1000_phy_m88) {
464 e1e_rphy(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
465 regs_buff[13] = (u32)phy_data; /* cable length */
466 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
467 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
468 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
469 e1e_rphy(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
470 regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
471 regs_buff[18] = regs_buff[13]; /* cable polarity */
472 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
473 regs_buff[20] = regs_buff[17]; /* polarity correction */
474 /* phy receive errors */
475 regs_buff[22] = adapter->phy_stats.receive_errors;
476 regs_buff[23] = regs_buff[13]; /* mdix mode */
477 }
c2ade1a4
BA
478 regs_buff[21] = 0; /* was idle_errors */
479 e1e_rphy(hw, MII_STAT1000, &phy_data);
480 regs_buff[24] = (u32)phy_data; /* phy local receiver status */
481 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
3ef672ab
BA
482
483 pm_runtime_put_sync(netdev->dev.parent);
bc7f75fa
AK
484}
485
486static int e1000_get_eeprom_len(struct net_device *netdev)
487{
488 struct e1000_adapter *adapter = netdev_priv(netdev);
489 return adapter->hw.nvm.word_size * 2;
490}
491
492static int e1000_get_eeprom(struct net_device *netdev,
493 struct ethtool_eeprom *eeprom, u8 *bytes)
494{
495 struct e1000_adapter *adapter = netdev_priv(netdev);
496 struct e1000_hw *hw = &adapter->hw;
497 u16 *eeprom_buff;
498 int first_word;
499 int last_word;
500 int ret_val = 0;
501 u16 i;
502
503 if (eeprom->len == 0)
504 return -EINVAL;
505
506 eeprom->magic = adapter->pdev->vendor | (adapter->pdev->device << 16);
507
508 first_word = eeprom->offset >> 1;
509 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
510
17e813ec
BA
511 eeprom_buff = kmalloc(sizeof(u16) * (last_word - first_word + 1),
512 GFP_KERNEL);
bc7f75fa
AK
513 if (!eeprom_buff)
514 return -ENOMEM;
515
3ef672ab
BA
516 pm_runtime_get_sync(netdev->dev.parent);
517
bc7f75fa
AK
518 if (hw->nvm.type == e1000_nvm_eeprom_spi) {
519 ret_val = e1000_read_nvm(hw, first_word,
520 last_word - first_word + 1,
521 eeprom_buff);
522 } else {
523 for (i = 0; i < last_word - first_word + 1; i++) {
524 ret_val = e1000_read_nvm(hw, first_word + i, 1,
17e813ec 525 &eeprom_buff[i]);
e243455d 526 if (ret_val)
bc7f75fa
AK
527 break;
528 }
529 }
530
3ef672ab
BA
531 pm_runtime_put_sync(netdev->dev.parent);
532
e243455d
BA
533 if (ret_val) {
534 /* a read error occurred, throw away the result */
8528b016
RK
535 memset(eeprom_buff, 0xff, sizeof(u16) *
536 (last_word - first_word + 1));
e243455d
BA
537 } else {
538 /* Device's eeprom is always little-endian, word addressable */
539 for (i = 0; i < last_word - first_word + 1; i++)
540 le16_to_cpus(&eeprom_buff[i]);
541 }
bc7f75fa
AK
542
543 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
544 kfree(eeprom_buff);
545
546 return ret_val;
547}
548
549static int e1000_set_eeprom(struct net_device *netdev,
550 struct ethtool_eeprom *eeprom, u8 *bytes)
551{
552 struct e1000_adapter *adapter = netdev_priv(netdev);
553 struct e1000_hw *hw = &adapter->hw;
554 u16 *eeprom_buff;
555 void *ptr;
556 int max_len;
557 int first_word;
558 int last_word;
559 int ret_val = 0;
560 u16 i;
561
562 if (eeprom->len == 0)
563 return -EOPNOTSUPP;
564
c29c3ba5
BA
565 if (eeprom->magic !=
566 (adapter->pdev->vendor | (adapter->pdev->device << 16)))
bc7f75fa
AK
567 return -EFAULT;
568
4a770358
BA
569 if (adapter->flags & FLAG_READ_ONLY_NVM)
570 return -EINVAL;
571
bc7f75fa
AK
572 max_len = hw->nvm.word_size * 2;
573
574 first_word = eeprom->offset >> 1;
575 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
576 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
577 if (!eeprom_buff)
578 return -ENOMEM;
579
580 ptr = (void *)eeprom_buff;
581
3ef672ab
BA
582 pm_runtime_get_sync(netdev->dev.parent);
583
bc7f75fa
AK
584 if (eeprom->offset & 1) {
585 /* need read/modify/write of first changed EEPROM word */
586 /* only the second byte of the word is being modified */
587 ret_val = e1000_read_nvm(hw, first_word, 1, &eeprom_buff[0]);
588 ptr++;
589 }
9e2d7657 590 if (((eeprom->offset + eeprom->len) & 1) && (!ret_val))
bc7f75fa
AK
591 /* need read/modify/write of last changed EEPROM word */
592 /* only the first byte of the word is being modified */
593 ret_val = e1000_read_nvm(hw, last_word, 1,
17e813ec 594 &eeprom_buff[last_word - first_word]);
bc7f75fa 595
e243455d
BA
596 if (ret_val)
597 goto out;
598
bc7f75fa
AK
599 /* Device's eeprom is always little-endian, word addressable */
600 for (i = 0; i < last_word - first_word + 1; i++)
601 le16_to_cpus(&eeprom_buff[i]);
602
603 memcpy(ptr, bytes, eeprom->len);
604
605 for (i = 0; i < last_word - first_word + 1; i++)
e885d762 606 cpu_to_le16s(&eeprom_buff[i]);
bc7f75fa
AK
607
608 ret_val = e1000_write_nvm(hw, first_word,
609 last_word - first_word + 1, eeprom_buff);
610
e243455d
BA
611 if (ret_val)
612 goto out;
613
e921eb1a 614 /* Update the checksum over the first part of the EEPROM if needed
e243455d 615 * and flush shadow RAM for applicable controllers
ad68076e 616 */
e243455d 617 if ((first_word <= NVM_CHECKSUM_REG) ||
f89271dd
BA
618 (hw->mac.type == e1000_82583) ||
619 (hw->mac.type == e1000_82574) ||
620 (hw->mac.type == e1000_82573))
e243455d 621 ret_val = e1000e_update_nvm_checksum(hw);
bc7f75fa 622
e243455d 623out:
3ef672ab 624 pm_runtime_put_sync(netdev->dev.parent);
bc7f75fa
AK
625 kfree(eeprom_buff);
626 return ret_val;
627}
628
629static void e1000_get_drvinfo(struct net_device *netdev,
630 struct ethtool_drvinfo *drvinfo)
631{
632 struct e1000_adapter *adapter = netdev_priv(netdev);
bc7f75fa 633
e5fe2541 634 strlcpy(drvinfo->driver, e1000e_driver_name, sizeof(drvinfo->driver));
33a5ba14 635 strlcpy(drvinfo->version, e1000e_driver_version,
612a94d6 636 sizeof(drvinfo->version));
bc7f75fa 637
e921eb1a 638 /* EEPROM image version # is reported as firmware version # for
ad68076e
BA
639 * PCI-E controllers
640 */
612a94d6 641 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
17e813ec
BA
642 "%d.%d-%d",
643 (adapter->eeprom_vers & 0xF000) >> 12,
644 (adapter->eeprom_vers & 0x0FF0) >> 4,
645 (adapter->eeprom_vers & 0x000F));
bc7f75fa 646
612a94d6
RJ
647 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
648 sizeof(drvinfo->bus_info));
bc7f75fa
AK
649 drvinfo->regdump_len = e1000_get_regs_len(netdev);
650 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
651}
652
653static void e1000_get_ringparam(struct net_device *netdev,
654 struct ethtool_ringparam *ring)
655{
656 struct e1000_adapter *adapter = netdev_priv(netdev);
bc7f75fa
AK
657
658 ring->rx_max_pending = E1000_MAX_RXD;
659 ring->tx_max_pending = E1000_MAX_TXD;
508da426
BA
660 ring->rx_pending = adapter->rx_ring_count;
661 ring->tx_pending = adapter->tx_ring_count;
bc7f75fa
AK
662}
663
664static int e1000_set_ringparam(struct net_device *netdev,
665 struct ethtool_ringparam *ring)
666{
667 struct e1000_adapter *adapter = netdev_priv(netdev);
508da426
BA
668 struct e1000_ring *temp_tx = NULL, *temp_rx = NULL;
669 int err = 0, size = sizeof(struct e1000_ring);
670 bool set_tx = false, set_rx = false;
671 u16 new_rx_count, new_tx_count;
bc7f75fa
AK
672
673 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
674 return -EINVAL;
675
508da426
BA
676 new_rx_count = clamp_t(u32, ring->rx_pending, E1000_MIN_RXD,
677 E1000_MAX_RXD);
678 new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
bc7f75fa 679
508da426
BA
680 new_tx_count = clamp_t(u32, ring->tx_pending, E1000_MIN_TXD,
681 E1000_MAX_TXD);
682 new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
bc7f75fa 683
508da426
BA
684 if ((new_tx_count == adapter->tx_ring_count) &&
685 (new_rx_count == adapter->rx_ring_count))
686 /* nothing to do */
687 return 0;
bc7f75fa 688
508da426
BA
689 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
690 usleep_range(1000, 2000);
bc7f75fa 691
508da426
BA
692 if (!netif_running(adapter->netdev)) {
693 /* Set counts now and allocate resources during open() */
694 adapter->tx_ring->count = new_tx_count;
695 adapter->rx_ring->count = new_rx_count;
696 adapter->tx_ring_count = new_tx_count;
697 adapter->rx_ring_count = new_rx_count;
698 goto clear_reset;
699 }
bc7f75fa 700
508da426
BA
701 set_tx = (new_tx_count != adapter->tx_ring_count);
702 set_rx = (new_rx_count != adapter->rx_ring_count);
bc7f75fa 703
508da426
BA
704 /* Allocate temporary storage for ring updates */
705 if (set_tx) {
706 temp_tx = vmalloc(size);
707 if (!temp_tx) {
708 err = -ENOMEM;
709 goto free_temp;
710 }
711 }
712 if (set_rx) {
713 temp_rx = vmalloc(size);
714 if (!temp_rx) {
715 err = -ENOMEM;
716 goto free_temp;
717 }
718 }
bc7f75fa 719
3ef672ab
BA
720 pm_runtime_get_sync(netdev->dev.parent);
721
508da426 722 e1000e_down(adapter);
bc7f75fa 723
e921eb1a 724 /* We can't just free everything and then setup again, because the
508da426
BA
725 * ISRs in MSI-X mode get passed pointers to the Tx and Rx ring
726 * structs. First, attempt to allocate new resources...
727 */
728 if (set_tx) {
729 memcpy(temp_tx, adapter->tx_ring, size);
730 temp_tx->count = new_tx_count;
731 err = e1000e_setup_tx_resources(temp_tx);
bc7f75fa 732 if (err)
508da426
BA
733 goto err_setup;
734 }
735 if (set_rx) {
736 memcpy(temp_rx, adapter->rx_ring, size);
737 temp_rx->count = new_rx_count;
738 err = e1000e_setup_rx_resources(temp_rx);
bc7f75fa 739 if (err)
508da426
BA
740 goto err_setup_rx;
741 }
742
743 /* ...then free the old resources and copy back any new ring data */
744 if (set_tx) {
55aa6985 745 e1000e_free_tx_resources(adapter->tx_ring);
508da426
BA
746 memcpy(adapter->tx_ring, temp_tx, size);
747 adapter->tx_ring_count = new_tx_count;
748 }
749 if (set_rx) {
750 e1000e_free_rx_resources(adapter->rx_ring);
751 memcpy(adapter->rx_ring, temp_rx, size);
752 adapter->rx_ring_count = new_rx_count;
bc7f75fa
AK
753 }
754
bc7f75fa 755err_setup_rx:
508da426
BA
756 if (err && set_tx)
757 e1000e_free_tx_resources(temp_tx);
bc7f75fa 758err_setup:
508da426 759 e1000e_up(adapter);
3ef672ab 760 pm_runtime_put_sync(netdev->dev.parent);
508da426
BA
761free_temp:
762 vfree(temp_tx);
763 vfree(temp_rx);
764clear_reset:
bc7f75fa
AK
765 clear_bit(__E1000_RESETTING, &adapter->state);
766 return err;
767}
768
cef8c793
BA
769static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,
770 int reg, int offset, u32 mask, u32 write)
2a887191 771{
cef8c793 772 u32 pat, val;
6480641e 773 static const u32 test[] = {
04e115cf
BA
774 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF
775 };
cef8c793 776 for (pat = 0; pat < ARRAY_SIZE(test); pat++) {
2a887191 777 E1000_WRITE_REG_ARRAY(&adapter->hw, reg, offset,
cef8c793
BA
778 (test[pat] & write));
779 val = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset);
780 if (val != (test[pat] & write & mask)) {
a8fc1891
BA
781 e_err("pattern test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n",
782 reg + (offset << 2), val,
783 (test[pat] & write & mask));
2a887191 784 *data = reg;
cef8c793 785 return 1;
2a887191
JP
786 }
787 }
cef8c793 788 return 0;
bc7f75fa
AK
789}
790
2a887191
JP
791static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,
792 int reg, u32 mask, u32 write)
793{
cef8c793 794 u32 val;
2a887191 795 __ew32(&adapter->hw, reg, write & mask);
cef8c793
BA
796 val = __er32(&adapter->hw, reg);
797 if ((write & mask) != (val & mask)) {
a8fc1891 798 e_err("set/check test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n",
6ad65145 799 reg, (val & mask), (write & mask));
2a887191 800 *data = reg;
cef8c793 801 return 1;
2a887191 802 }
cef8c793 803 return 0;
bc7f75fa 804}
fc830b78 805
cef8c793
BA
806#define REG_PATTERN_TEST_ARRAY(reg, offset, mask, write) \
807 do { \
808 if (reg_pattern_test(adapter, data, reg, offset, mask, write)) \
809 return 1; \
2a887191 810 } while (0)
cef8c793
BA
811#define REG_PATTERN_TEST(reg, mask, write) \
812 REG_PATTERN_TEST_ARRAY(reg, 0, mask, write)
2a887191 813
cef8c793
BA
814#define REG_SET_AND_CHECK(reg, mask, write) \
815 do { \
816 if (reg_set_and_check(adapter, data, reg, mask, write)) \
817 return 1; \
2a887191
JP
818 } while (0)
819
bc7f75fa
AK
820static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
821{
822 struct e1000_hw *hw = &adapter->hw;
823 struct e1000_mac_info *mac = &adapter->hw.mac;
bc7f75fa
AK
824 u32 value;
825 u32 before;
826 u32 after;
827 u32 i;
828 u32 toggle;
a4f58f54 829 u32 mask;
2fbe4526 830 u32 wlock_mac = 0;
bc7f75fa 831
e921eb1a 832 /* The status register is Read Only, so a write should fail.
33550cec
BA
833 * Some bits that get toggled are ignored. There are several bits
834 * on newer hardware that are r/w.
bc7f75fa
AK
835 */
836 switch (mac->type) {
bc7f75fa
AK
837 case e1000_82571:
838 case e1000_82572:
839 case e1000_80003es2lan:
840 toggle = 0x7FFFF3FF;
841 break;
f0ff4398 842 default:
bc7f75fa
AK
843 toggle = 0x7FFFF033;
844 break;
bc7f75fa
AK
845 }
846
847 before = er32(STATUS);
848 value = (er32(STATUS) & toggle);
849 ew32(STATUS, toggle);
850 after = er32(STATUS) & toggle;
851 if (value != after) {
6ad65145
BA
852 e_err("failed STATUS register test got: 0x%08X expected: 0x%08X\n",
853 after, value);
bc7f75fa
AK
854 *data = 1;
855 return 1;
856 }
857 /* restore previous status */
858 ew32(STATUS, before);
859
97ac8cae 860 if (!(adapter->flags & FLAG_IS_ICH)) {
bc7f75fa
AK
861 REG_PATTERN_TEST(E1000_FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
862 REG_PATTERN_TEST(E1000_FCAH, 0x0000FFFF, 0xFFFFFFFF);
863 REG_PATTERN_TEST(E1000_FCT, 0x0000FFFF, 0xFFFFFFFF);
864 REG_PATTERN_TEST(E1000_VET, 0x0000FFFF, 0xFFFFFFFF);
865 }
866
867 REG_PATTERN_TEST(E1000_RDTR, 0x0000FFFF, 0xFFFFFFFF);
1e36052e
BA
868 REG_PATTERN_TEST(E1000_RDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
869 REG_PATTERN_TEST(E1000_RDLEN(0), 0x000FFF80, 0x000FFFFF);
870 REG_PATTERN_TEST(E1000_RDH(0), 0x0000FFFF, 0x0000FFFF);
871 REG_PATTERN_TEST(E1000_RDT(0), 0x0000FFFF, 0x0000FFFF);
bc7f75fa
AK
872 REG_PATTERN_TEST(E1000_FCRTH, 0x0000FFF8, 0x0000FFF8);
873 REG_PATTERN_TEST(E1000_FCTTV, 0x0000FFFF, 0x0000FFFF);
874 REG_PATTERN_TEST(E1000_TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
1e36052e
BA
875 REG_PATTERN_TEST(E1000_TDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
876 REG_PATTERN_TEST(E1000_TDLEN(0), 0x000FFF80, 0x000FFFFF);
bc7f75fa
AK
877
878 REG_SET_AND_CHECK(E1000_RCTL, 0xFFFFFFFF, 0x00000000);
879
97ac8cae 880 before = ((adapter->flags & FLAG_IS_ICH) ? 0x06C3B33E : 0x06DFB3FE);
bc7f75fa
AK
881 REG_SET_AND_CHECK(E1000_RCTL, before, 0x003FFFFB);
882 REG_SET_AND_CHECK(E1000_TCTL, 0xFFFFFFFF, 0x00000000);
883
8658251d 884 REG_SET_AND_CHECK(E1000_RCTL, before, 0xFFFFFFFF);
1e36052e 885 REG_PATTERN_TEST(E1000_RDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
97ac8cae 886 if (!(adapter->flags & FLAG_IS_ICH))
8658251d 887 REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF);
1e36052e 888 REG_PATTERN_TEST(E1000_TDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
8658251d 889 REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF);
a4f58f54
BA
890 mask = 0x8003FFFF;
891 switch (mac->type) {
892 case e1000_ich10lan:
893 case e1000_pchlan:
d3738bb8 894 case e1000_pch2lan:
2fbe4526 895 case e1000_pch_lpt:
a4f58f54
BA
896 mask |= (1 << 18);
897 break;
898 default:
899 break;
900 }
2fbe4526
BA
901
902 if (mac->type == e1000_pch_lpt)
903 wlock_mac = (er32(FWSM) & E1000_FWSM_WLOCK_MAC_MASK) >>
904 E1000_FWSM_WLOCK_MAC_SHIFT;
905
906 for (i = 0; i < mac->rar_entry_count; i++) {
a8fc1891
BA
907 if (mac->type == e1000_pch_lpt) {
908 /* Cannot test write-protected SHRAL[n] registers */
909 if ((wlock_mac == 1) || (wlock_mac && (i > wlock_mac)))
910 continue;
911
912 /* SHRAH[9] different than the others */
913 if (i == 10)
914 mask |= (1 << 30);
915 else
916 mask &= ~(1 << 30);
917 }
c3a0dce3
DE
918 if (mac->type == e1000_pch2lan) {
919 /* SHRAH[0,1,2] different than previous */
920 if (i == 7)
921 mask &= 0xFFF4FFFF;
922 /* SHRAH[3] different than SHRAH[0,1,2] */
923 if (i == 10)
924 mask |= (1 << 30);
925 }
2fbe4526 926
a8fc1891
BA
927 REG_PATTERN_TEST_ARRAY(E1000_RA, ((i << 1) + 1), mask,
928 0xFFFFFFFF);
2fbe4526 929 }
bc7f75fa
AK
930
931 for (i = 0; i < mac->mta_reg_count; i++)
932 REG_PATTERN_TEST_ARRAY(E1000_MTA, i, 0xFFFFFFFF, 0xFFFFFFFF);
933
934 *data = 0;
2fbe4526 935
bc7f75fa
AK
936 return 0;
937}
938
939static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
940{
941 u16 temp;
942 u16 checksum = 0;
943 u16 i;
944
945 *data = 0;
946 /* Read and add up the contents of the EEPROM */
947 for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
948 if ((e1000_read_nvm(&adapter->hw, i, 1, &temp)) < 0) {
949 *data = 1;
e243455d 950 return *data;
bc7f75fa
AK
951 }
952 checksum += temp;
953 }
954
955 /* If Checksum is not Correct return error else test passed */
53aa82da 956 if ((checksum != (u16)NVM_SUM) && !(*data))
bc7f75fa
AK
957 *data = 2;
958
959 return *data;
960}
961
8bb62869 962static irqreturn_t e1000_test_intr(int __always_unused irq, void *data)
bc7f75fa 963{
53aa82da 964 struct net_device *netdev = (struct net_device *)data;
bc7f75fa
AK
965 struct e1000_adapter *adapter = netdev_priv(netdev);
966 struct e1000_hw *hw = &adapter->hw;
967
968 adapter->test_icr |= er32(ICR);
969
970 return IRQ_HANDLED;
971}
972
973static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
974{
975 struct net_device *netdev = adapter->netdev;
976 struct e1000_hw *hw = &adapter->hw;
977 u32 mask;
978 u32 shared_int = 1;
979 u32 irq = adapter->pdev->irq;
980 int i;
4662e82b
BA
981 int ret_val = 0;
982 int int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK
983
984 *data = 0;
985
4662e82b
BA
986 /* NOTE: we don't test MSI/MSI-X interrupts here, yet */
987 if (adapter->int_mode == E1000E_INT_MODE_MSIX) {
988 int_mode = adapter->int_mode;
989 e1000e_reset_interrupt_capability(adapter);
990 adapter->int_mode = E1000E_INT_MODE_LEGACY;
991 e1000e_set_interrupt_capability(adapter);
992 }
bc7f75fa 993 /* Hook up test interrupt handler just for this test */
a0607fd3 994 if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
bc7f75fa
AK
995 netdev)) {
996 shared_int = 0;
17e813ec
BA
997 } else if (request_irq(irq, e1000_test_intr, IRQF_SHARED, netdev->name,
998 netdev)) {
bc7f75fa 999 *data = 1;
4662e82b
BA
1000 ret_val = -1;
1001 goto out;
bc7f75fa 1002 }
44defeb3 1003 e_info("testing %s interrupt\n", (shared_int ? "shared" : "unshared"));
bc7f75fa
AK
1004
1005 /* Disable all the interrupts */
1006 ew32(IMC, 0xFFFFFFFF);
945a5151 1007 e1e_flush();
1bba4386 1008 usleep_range(10000, 20000);
bc7f75fa
AK
1009
1010 /* Test each interrupt */
1011 for (i = 0; i < 10; i++) {
bc7f75fa
AK
1012 /* Interrupt to test */
1013 mask = 1 << i;
1014
f4187b56
BA
1015 if (adapter->flags & FLAG_IS_ICH) {
1016 switch (mask) {
1017 case E1000_ICR_RXSEQ:
1018 continue;
1019 case 0x00000100:
1020 if (adapter->hw.mac.type == e1000_ich8lan ||
1021 adapter->hw.mac.type == e1000_ich9lan)
1022 continue;
1023 break;
1024 default:
1025 break;
1026 }
1027 }
1028
bc7f75fa 1029 if (!shared_int) {
e921eb1a 1030 /* Disable the interrupt to be reported in
bc7f75fa
AK
1031 * the cause register and then force the same
1032 * interrupt and see if one gets posted. If
1033 * an interrupt was posted to the bus, the
1034 * test failed.
1035 */
1036 adapter->test_icr = 0;
1037 ew32(IMC, mask);
1038 ew32(ICS, mask);
945a5151 1039 e1e_flush();
1bba4386 1040 usleep_range(10000, 20000);
bc7f75fa
AK
1041
1042 if (adapter->test_icr & mask) {
1043 *data = 3;
1044 break;
1045 }
1046 }
1047
e921eb1a 1048 /* Enable the interrupt to be reported in
bc7f75fa
AK
1049 * the cause register and then force the same
1050 * interrupt and see if one gets posted. If
1051 * an interrupt was not posted to the bus, the
1052 * test failed.
1053 */
1054 adapter->test_icr = 0;
1055 ew32(IMS, mask);
1056 ew32(ICS, mask);
945a5151 1057 e1e_flush();
1bba4386 1058 usleep_range(10000, 20000);
bc7f75fa
AK
1059
1060 if (!(adapter->test_icr & mask)) {
1061 *data = 4;
1062 break;
1063 }
1064
1065 if (!shared_int) {
e921eb1a 1066 /* Disable the other interrupts to be reported in
bc7f75fa
AK
1067 * the cause register and then force the other
1068 * interrupts and see if any get posted. If
1069 * an interrupt was posted to the bus, the
1070 * test failed.
1071 */
1072 adapter->test_icr = 0;
1073 ew32(IMC, ~mask & 0x00007FFF);
1074 ew32(ICS, ~mask & 0x00007FFF);
945a5151 1075 e1e_flush();
1bba4386 1076 usleep_range(10000, 20000);
bc7f75fa
AK
1077
1078 if (adapter->test_icr) {
1079 *data = 5;
1080 break;
1081 }
1082 }
1083 }
1084
1085 /* Disable all the interrupts */
1086 ew32(IMC, 0xFFFFFFFF);
945a5151 1087 e1e_flush();
1bba4386 1088 usleep_range(10000, 20000);
bc7f75fa
AK
1089
1090 /* Unhook test interrupt handler */
1091 free_irq(irq, netdev);
1092
4662e82b
BA
1093out:
1094 if (int_mode == E1000E_INT_MODE_MSIX) {
1095 e1000e_reset_interrupt_capability(adapter);
1096 adapter->int_mode = int_mode;
1097 e1000e_set_interrupt_capability(adapter);
1098 }
1099
1100 return ret_val;
bc7f75fa
AK
1101}
1102
1103static void e1000_free_desc_rings(struct e1000_adapter *adapter)
1104{
1105 struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1106 struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1107 struct pci_dev *pdev = adapter->pdev;
17e813ec 1108 struct e1000_buffer *buffer_info;
bc7f75fa
AK
1109 int i;
1110
1111 if (tx_ring->desc && tx_ring->buffer_info) {
1112 for (i = 0; i < tx_ring->count; i++) {
17e813ec
BA
1113 buffer_info = &tx_ring->buffer_info[i];
1114
1115 if (buffer_info->dma)
0be3f55f 1116 dma_unmap_single(&pdev->dev,
17e813ec
BA
1117 buffer_info->dma,
1118 buffer_info->length,
1119 DMA_TO_DEVICE);
1120 if (buffer_info->skb)
1121 dev_kfree_skb(buffer_info->skb);
bc7f75fa
AK
1122 }
1123 }
1124
1125 if (rx_ring->desc && rx_ring->buffer_info) {
1126 for (i = 0; i < rx_ring->count; i++) {
17e813ec
BA
1127 buffer_info = &rx_ring->buffer_info[i];
1128
1129 if (buffer_info->dma)
0be3f55f 1130 dma_unmap_single(&pdev->dev,
17e813ec
BA
1131 buffer_info->dma,
1132 2048, DMA_FROM_DEVICE);
1133 if (buffer_info->skb)
1134 dev_kfree_skb(buffer_info->skb);
bc7f75fa
AK
1135 }
1136 }
1137
1138 if (tx_ring->desc) {
1139 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1140 tx_ring->dma);
1141 tx_ring->desc = NULL;
1142 }
1143 if (rx_ring->desc) {
1144 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1145 rx_ring->dma);
1146 rx_ring->desc = NULL;
1147 }
1148
1149 kfree(tx_ring->buffer_info);
1150 tx_ring->buffer_info = NULL;
1151 kfree(rx_ring->buffer_info);
1152 rx_ring->buffer_info = NULL;
1153}
1154
1155static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
1156{
1157 struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1158 struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1159 struct pci_dev *pdev = adapter->pdev;
1160 struct e1000_hw *hw = &adapter->hw;
1161 u32 rctl;
bc7f75fa
AK
1162 int i;
1163 int ret_val;
1164
1165 /* Setup Tx descriptor ring and Tx buffers */
1166
1167 if (!tx_ring->count)
1168 tx_ring->count = E1000_DEFAULT_TXD;
1169
cef8c793 1170 tx_ring->buffer_info = kcalloc(tx_ring->count,
e5fe2541 1171 sizeof(struct e1000_buffer), GFP_KERNEL);
668018d7 1172 if (!tx_ring->buffer_info) {
bc7f75fa
AK
1173 ret_val = 1;
1174 goto err_nomem;
1175 }
bc7f75fa
AK
1176
1177 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1178 tx_ring->size = ALIGN(tx_ring->size, 4096);
1179 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
1180 &tx_ring->dma, GFP_KERNEL);
1181 if (!tx_ring->desc) {
1182 ret_val = 2;
1183 goto err_nomem;
1184 }
bc7f75fa
AK
1185 tx_ring->next_to_use = 0;
1186 tx_ring->next_to_clean = 0;
1187
53aa82da
BA
1188 ew32(TDBAL(0), ((u64)tx_ring->dma & 0x00000000FFFFFFFF));
1189 ew32(TDBAH(0), ((u64)tx_ring->dma >> 32));
1e36052e
BA
1190 ew32(TDLEN(0), tx_ring->count * sizeof(struct e1000_tx_desc));
1191 ew32(TDH(0), 0);
1192 ew32(TDT(0), 0);
cef8c793
BA
1193 ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | E1000_TCTL_MULR |
1194 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1195 E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT);
bc7f75fa
AK
1196
1197 for (i = 0; i < tx_ring->count; i++) {
1198 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
1199 struct sk_buff *skb;
1200 unsigned int skb_size = 1024;
1201
1202 skb = alloc_skb(skb_size, GFP_KERNEL);
1203 if (!skb) {
1204 ret_val = 3;
1205 goto err_nomem;
1206 }
1207 skb_put(skb, skb_size);
1208 tx_ring->buffer_info[i].skb = skb;
1209 tx_ring->buffer_info[i].length = skb->len;
1210 tx_ring->buffer_info[i].dma =
f0ff4398
BA
1211 dma_map_single(&pdev->dev, skb->data, skb->len,
1212 DMA_TO_DEVICE);
0be3f55f
NN
1213 if (dma_mapping_error(&pdev->dev,
1214 tx_ring->buffer_info[i].dma)) {
bc7f75fa
AK
1215 ret_val = 4;
1216 goto err_nomem;
1217 }
cef8c793 1218 tx_desc->buffer_addr = cpu_to_le64(tx_ring->buffer_info[i].dma);
bc7f75fa
AK
1219 tx_desc->lower.data = cpu_to_le32(skb->len);
1220 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1221 E1000_TXD_CMD_IFCS |
cef8c793 1222 E1000_TXD_CMD_RS);
bc7f75fa
AK
1223 tx_desc->upper.data = 0;
1224 }
1225
1226 /* Setup Rx descriptor ring and Rx buffers */
1227
1228 if (!rx_ring->count)
1229 rx_ring->count = E1000_DEFAULT_RXD;
1230
cef8c793 1231 rx_ring->buffer_info = kcalloc(rx_ring->count,
e5fe2541 1232 sizeof(struct e1000_buffer), GFP_KERNEL);
668018d7 1233 if (!rx_ring->buffer_info) {
bc7f75fa
AK
1234 ret_val = 5;
1235 goto err_nomem;
1236 }
bc7f75fa 1237
5f450212 1238 rx_ring->size = rx_ring->count * sizeof(union e1000_rx_desc_extended);
bc7f75fa
AK
1239 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
1240 &rx_ring->dma, GFP_KERNEL);
1241 if (!rx_ring->desc) {
1242 ret_val = 6;
1243 goto err_nomem;
1244 }
bc7f75fa
AK
1245 rx_ring->next_to_use = 0;
1246 rx_ring->next_to_clean = 0;
1247
1248 rctl = er32(RCTL);
7f99ae63
BA
1249 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
1250 ew32(RCTL, rctl & ~E1000_RCTL_EN);
53aa82da
BA
1251 ew32(RDBAL(0), ((u64)rx_ring->dma & 0xFFFFFFFF));
1252 ew32(RDBAH(0), ((u64)rx_ring->dma >> 32));
1e36052e
BA
1253 ew32(RDLEN(0), rx_ring->size);
1254 ew32(RDH(0), 0);
1255 ew32(RDT(0), 0);
bc7f75fa 1256 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
f0ff4398
BA
1257 E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_LPE |
1258 E1000_RCTL_SBP | E1000_RCTL_SECRC |
1259 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1260 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
bc7f75fa
AK
1261 ew32(RCTL, rctl);
1262
1263 for (i = 0; i < rx_ring->count; i++) {
5f450212 1264 union e1000_rx_desc_extended *rx_desc;
bc7f75fa
AK
1265 struct sk_buff *skb;
1266
1267 skb = alloc_skb(2048 + NET_IP_ALIGN, GFP_KERNEL);
1268 if (!skb) {
1269 ret_val = 7;
1270 goto err_nomem;
1271 }
1272 skb_reserve(skb, NET_IP_ALIGN);
1273 rx_ring->buffer_info[i].skb = skb;
1274 rx_ring->buffer_info[i].dma =
f0ff4398
BA
1275 dma_map_single(&pdev->dev, skb->data, 2048,
1276 DMA_FROM_DEVICE);
0be3f55f
NN
1277 if (dma_mapping_error(&pdev->dev,
1278 rx_ring->buffer_info[i].dma)) {
bc7f75fa
AK
1279 ret_val = 8;
1280 goto err_nomem;
1281 }
5f450212
BA
1282 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1283 rx_desc->read.buffer_addr =
1284 cpu_to_le64(rx_ring->buffer_info[i].dma);
bc7f75fa
AK
1285 memset(skb->data, 0x00, skb->len);
1286 }
1287
1288 return 0;
1289
1290err_nomem:
1291 e1000_free_desc_rings(adapter);
1292 return ret_val;
1293}
1294
1295static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1296{
1297 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1298 e1e_wphy(&adapter->hw, 29, 0x001F);
1299 e1e_wphy(&adapter->hw, 30, 0x8FFC);
1300 e1e_wphy(&adapter->hw, 29, 0x001A);
1301 e1e_wphy(&adapter->hw, 30, 0x8FF0);
1302}
1303
1304static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1305{
1306 struct e1000_hw *hw = &adapter->hw;
1307 u32 ctrl_reg = 0;
97ac8cae 1308 u16 phy_reg = 0;
cbd006cb 1309 s32 ret_val = 0;
bc7f75fa 1310
318a94d6 1311 hw->mac.autoneg = 0;
bc7f75fa 1312
3af50481 1313 if (hw->phy.type == e1000_phy_ife) {
bc7f75fa 1314 /* force 100, set loopback */
c2ade1a4 1315 e1e_wphy(hw, MII_BMCR, 0x6100);
bc7f75fa
AK
1316
1317 /* Now set up the MAC to the same speed/duplex as the PHY. */
3af50481 1318 ctrl_reg = er32(CTRL);
bc7f75fa
AK
1319 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1320 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1321 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1322 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1323 E1000_CTRL_FD); /* Force Duplex to FULL */
3af50481
BA
1324
1325 ew32(CTRL, ctrl_reg);
945a5151 1326 e1e_flush();
ce43a216 1327 usleep_range(500, 1000);
3af50481
BA
1328
1329 return 0;
1330 }
1331
1332 /* Specific PHY configuration for loopback */
1333 switch (hw->phy.type) {
1334 case e1000_phy_m88:
1335 /* Auto-MDI/MDIX Off */
1336 e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1337 /* reset to update Auto-MDI/MDIX */
c2ade1a4 1338 e1e_wphy(hw, MII_BMCR, 0x9140);
3af50481 1339 /* autoneg off */
c2ade1a4 1340 e1e_wphy(hw, MII_BMCR, 0x8140);
3af50481
BA
1341 break;
1342 case e1000_phy_gg82563:
1343 e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x1CC);
cef8c793 1344 break;
97ac8cae
BA
1345 case e1000_phy_bm:
1346 /* Set Default MAC Interface speed to 1GB */
1347 e1e_rphy(hw, PHY_REG(2, 21), &phy_reg);
1348 phy_reg &= ~0x0007;
1349 phy_reg |= 0x006;
1350 e1e_wphy(hw, PHY_REG(2, 21), phy_reg);
1351 /* Assert SW reset for above settings to take effect */
6b598e1e 1352 hw->phy.ops.commit(hw);
ce43a216 1353 usleep_range(1000, 2000);
97ac8cae
BA
1354 /* Force Full Duplex */
1355 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1356 e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x000C);
1357 /* Set Link Up (in force link) */
1358 e1e_rphy(hw, PHY_REG(776, 16), &phy_reg);
1359 e1e_wphy(hw, PHY_REG(776, 16), phy_reg | 0x0040);
1360 /* Force Link */
1361 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1362 e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x0040);
1363 /* Set Early Link Enable */
1364 e1e_rphy(hw, PHY_REG(769, 20), &phy_reg);
1365 e1e_wphy(hw, PHY_REG(769, 20), phy_reg | 0x0400);
3af50481
BA
1366 break;
1367 case e1000_phy_82577:
1368 case e1000_phy_82578:
1369 /* Workaround: K1 must be disabled for stable 1Gbps operation */
cbd006cb
BA
1370 ret_val = hw->phy.ops.acquire(hw);
1371 if (ret_val) {
1372 e_err("Cannot setup 1Gbps loopback.\n");
1373 return ret_val;
1374 }
3af50481 1375 e1000_configure_k1_ich8lan(hw, false);
cbd006cb 1376 hw->phy.ops.release(hw);
3af50481 1377 break;
d3738bb8
BA
1378 case e1000_phy_82579:
1379 /* Disable PHY energy detect power down */
1380 e1e_rphy(hw, PHY_REG(0, 21), &phy_reg);
1381 e1e_wphy(hw, PHY_REG(0, 21), phy_reg & ~(1 << 3));
1382 /* Disable full chip energy detect */
1383 e1e_rphy(hw, PHY_REG(776, 18), &phy_reg);
1384 e1e_wphy(hw, PHY_REG(776, 18), phy_reg | 1);
1385 /* Enable loopback on the PHY */
d3738bb8
BA
1386 e1e_wphy(hw, I82577_PHY_LBK_CTRL, 0x8001);
1387 break;
cef8c793 1388 default:
3af50481
BA
1389 break;
1390 }
bc7f75fa 1391
3af50481 1392 /* force 1000, set loopback */
c2ade1a4 1393 e1e_wphy(hw, MII_BMCR, 0x4140);
ce43a216 1394 msleep(250);
cef8c793 1395
3af50481
BA
1396 /* Now set up the MAC to the same speed/duplex as the PHY. */
1397 ctrl_reg = er32(CTRL);
1398 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1399 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1400 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1401 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1402 E1000_CTRL_FD); /* Force Duplex to FULL */
1403
1404 if (adapter->flags & FLAG_IS_ICH)
1405 ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */
bc7f75fa 1406
318a94d6
JK
1407 if (hw->phy.media_type == e1000_media_type_copper &&
1408 hw->phy.type == e1000_phy_m88) {
e80bd1d1 1409 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
bc7f75fa 1410 } else {
e921eb1a 1411 /* Set the ILOS bit on the fiber Nic if half duplex link is
ad68076e
BA
1412 * detected.
1413 */
90da0669 1414 if ((er32(STATUS) & E1000_STATUS_FD) == 0)
bc7f75fa
AK
1415 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1416 }
1417
1418 ew32(CTRL, ctrl_reg);
1419
e921eb1a 1420 /* Disable the receiver on the PHY so when a cable is plugged in, the
bc7f75fa
AK
1421 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1422 */
318a94d6 1423 if (hw->phy.type == e1000_phy_m88)
bc7f75fa
AK
1424 e1000_phy_disable_receiver(adapter);
1425
ce43a216 1426 usleep_range(500, 1000);
bc7f75fa
AK
1427
1428 return 0;
1429}
1430
1431static int e1000_set_82571_fiber_loopback(struct e1000_adapter *adapter)
1432{
1433 struct e1000_hw *hw = &adapter->hw;
1434 u32 ctrl = er32(CTRL);
70806a7f 1435 int link;
bc7f75fa
AK
1436
1437 /* special requirements for 82571/82572 fiber adapters */
1438
e921eb1a 1439 /* jump through hoops to make sure link is up because serdes
ad68076e
BA
1440 * link is hardwired up
1441 */
bc7f75fa
AK
1442 ctrl |= E1000_CTRL_SLU;
1443 ew32(CTRL, ctrl);
1444
1445 /* disable autoneg */
1446 ctrl = er32(TXCW);
1447 ctrl &= ~(1 << 31);
1448 ew32(TXCW, ctrl);
1449
1450 link = (er32(STATUS) & E1000_STATUS_LU);
1451
1452 if (!link) {
1453 /* set invert loss of signal */
1454 ctrl = er32(CTRL);
1455 ctrl |= E1000_CTRL_ILOS;
1456 ew32(CTRL, ctrl);
1457 }
1458
e921eb1a 1459 /* special write to serdes control register to enable SerDes analog
ad68076e
BA
1460 * loopback
1461 */
3ffcf2cb 1462 ew32(SCTL, E1000_SCTL_ENABLE_SERDES_LOOPBACK);
945a5151 1463 e1e_flush();
1bba4386 1464 usleep_range(10000, 20000);
bc7f75fa
AK
1465
1466 return 0;
1467}
1468
1469/* only call this for fiber/serdes connections to es2lan */
1470static int e1000_set_es2lan_mac_loopback(struct e1000_adapter *adapter)
1471{
1472 struct e1000_hw *hw = &adapter->hw;
1473 u32 ctrlext = er32(CTRL_EXT);
1474 u32 ctrl = er32(CTRL);
1475
e921eb1a 1476 /* save CTRL_EXT to restore later, reuse an empty variable (unused
ad68076e
BA
1477 * on mac_type 80003es2lan)
1478 */
bc7f75fa
AK
1479 adapter->tx_fifo_head = ctrlext;
1480
1481 /* clear the serdes mode bits, putting the device into mac loopback */
1482 ctrlext &= ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1483 ew32(CTRL_EXT, ctrlext);
1484
1485 /* force speed to 1000/FD, link up */
1486 ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100);
1487 ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX |
1488 E1000_CTRL_SPD_1000 | E1000_CTRL_FD);
1489 ew32(CTRL, ctrl);
1490
1491 /* set mac loopback */
1492 ctrl = er32(RCTL);
1493 ctrl |= E1000_RCTL_LBM_MAC;
1494 ew32(RCTL, ctrl);
1495
1496 /* set testing mode parameters (no need to reset later) */
1497#define KMRNCTRLSTA_OPMODE (0x1F << 16)
1498#define KMRNCTRLSTA_OPMODE_1GB_FD_GMII 0x0582
1499 ew32(KMRNCTRLSTA,
cef8c793 1500 (KMRNCTRLSTA_OPMODE | KMRNCTRLSTA_OPMODE_1GB_FD_GMII));
bc7f75fa
AK
1501
1502 return 0;
1503}
1504
1505static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
1506{
1507 struct e1000_hw *hw = &adapter->hw;
1508 u32 rctl;
1509
318a94d6
JK
1510 if (hw->phy.media_type == e1000_media_type_fiber ||
1511 hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa
AK
1512 switch (hw->mac.type) {
1513 case e1000_80003es2lan:
1514 return e1000_set_es2lan_mac_loopback(adapter);
1515 break;
1516 case e1000_82571:
1517 case e1000_82572:
1518 return e1000_set_82571_fiber_loopback(adapter);
1519 break;
1520 default:
1521 rctl = er32(RCTL);
1522 rctl |= E1000_RCTL_LBM_TCVR;
1523 ew32(RCTL, rctl);
1524 return 0;
1525 }
318a94d6 1526 } else if (hw->phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK
1527 return e1000_integrated_phy_loopback(adapter);
1528 }
1529
1530 return 7;
1531}
1532
1533static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
1534{
1535 struct e1000_hw *hw = &adapter->hw;
1536 u32 rctl;
1537 u16 phy_reg;
1538
1539 rctl = er32(RCTL);
1540 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1541 ew32(RCTL, rctl);
1542
1543 switch (hw->mac.type) {
1544 case e1000_80003es2lan:
318a94d6
JK
1545 if (hw->phy.media_type == e1000_media_type_fiber ||
1546 hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa 1547 /* restore CTRL_EXT, stealing space from tx_fifo_head */
ad68076e 1548 ew32(CTRL_EXT, adapter->tx_fifo_head);
bc7f75fa
AK
1549 adapter->tx_fifo_head = 0;
1550 }
1551 /* fall through */
1552 case e1000_82571:
1553 case e1000_82572:
318a94d6
JK
1554 if (hw->phy.media_type == e1000_media_type_fiber ||
1555 hw->phy.media_type == e1000_media_type_internal_serdes) {
3ffcf2cb 1556 ew32(SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK);
945a5151 1557 e1e_flush();
1bba4386 1558 usleep_range(10000, 20000);
bc7f75fa
AK
1559 break;
1560 }
1561 /* Fall Through */
1562 default:
1563 hw->mac.autoneg = 1;
1564 if (hw->phy.type == e1000_phy_gg82563)
1565 e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x180);
c2ade1a4
BA
1566 e1e_rphy(hw, MII_BMCR, &phy_reg);
1567 if (phy_reg & BMCR_LOOPBACK) {
1568 phy_reg &= ~BMCR_LOOPBACK;
1569 e1e_wphy(hw, MII_BMCR, phy_reg);
6b598e1e
BA
1570 if (hw->phy.ops.commit)
1571 hw->phy.ops.commit(hw);
bc7f75fa
AK
1572 }
1573 break;
1574 }
1575}
1576
1577static void e1000_create_lbtest_frame(struct sk_buff *skb,
1578 unsigned int frame_size)
1579{
1580 memset(skb->data, 0xFF, frame_size);
1581 frame_size &= ~1;
1582 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1583 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1584 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1585}
1586
1587static int e1000_check_lbtest_frame(struct sk_buff *skb,
1588 unsigned int frame_size)
1589{
1590 frame_size &= ~1;
1591 if (*(skb->data + 3) == 0xFF)
1592 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
17e813ec 1593 (*(skb->data + frame_size / 2 + 12) == 0xAF))
bc7f75fa
AK
1594 return 0;
1595 return 13;
1596}
1597
1598static int e1000_run_loopback_test(struct e1000_adapter *adapter)
1599{
1600 struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1601 struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1602 struct pci_dev *pdev = adapter->pdev;
1603 struct e1000_hw *hw = &adapter->hw;
17e813ec 1604 struct e1000_buffer *buffer_info;
bc7f75fa
AK
1605 int i, j, k, l;
1606 int lc;
1607 int good_cnt;
1608 int ret_val = 0;
1609 unsigned long time;
1610
1e36052e 1611 ew32(RDT(0), rx_ring->count - 1);
bc7f75fa 1612
e921eb1a 1613 /* Calculate the loop count based on the largest descriptor ring
bc7f75fa
AK
1614 * The idea is to wrap the largest ring a number of times using 64
1615 * send/receive pairs during each loop
1616 */
1617
1618 if (rx_ring->count <= tx_ring->count)
1619 lc = ((tx_ring->count / 64) * 2) + 1;
1620 else
1621 lc = ((rx_ring->count / 64) * 2) + 1;
1622
1623 k = 0;
1624 l = 0;
33550cec
BA
1625 /* loop count loop */
1626 for (j = 0; j <= lc; j++) {
1627 /* send the packets */
1628 for (i = 0; i < 64; i++) {
17e813ec
BA
1629 buffer_info = &tx_ring->buffer_info[k];
1630
1631 e1000_create_lbtest_frame(buffer_info->skb, 1024);
0be3f55f 1632 dma_sync_single_for_device(&pdev->dev,
17e813ec
BA
1633 buffer_info->dma,
1634 buffer_info->length,
1635 DMA_TO_DEVICE);
bc7f75fa
AK
1636 k++;
1637 if (k == tx_ring->count)
1638 k = 0;
1639 }
1e36052e 1640 ew32(TDT(0), k);
945a5151 1641 e1e_flush();
bc7f75fa 1642 msleep(200);
e80bd1d1 1643 time = jiffies; /* set the start time for the receive */
bc7f75fa 1644 good_cnt = 0;
33550cec
BA
1645 /* receive the sent packets */
1646 do {
17e813ec
BA
1647 buffer_info = &rx_ring->buffer_info[l];
1648
0be3f55f 1649 dma_sync_single_for_cpu(&pdev->dev,
17e813ec
BA
1650 buffer_info->dma, 2048,
1651 DMA_FROM_DEVICE);
bc7f75fa 1652
17e813ec
BA
1653 ret_val = e1000_check_lbtest_frame(buffer_info->skb,
1654 1024);
bc7f75fa
AK
1655 if (!ret_val)
1656 good_cnt++;
1657 l++;
1658 if (l == rx_ring->count)
1659 l = 0;
e921eb1a 1660 /* time + 20 msecs (200 msecs on 2.4) is more than
bc7f75fa
AK
1661 * enough time to complete the receives, if it's
1662 * exceeded, break and error off
1663 */
1664 } while ((good_cnt < 64) && !time_after(jiffies, time + 20));
1665 if (good_cnt != 64) {
e80bd1d1 1666 ret_val = 13; /* ret_val is the same as mis-compare */
bc7f75fa
AK
1667 break;
1668 }
22f8abaa 1669 if (time_after(jiffies, time + 20)) {
e80bd1d1 1670 ret_val = 14; /* error code for time out error */
bc7f75fa
AK
1671 break;
1672 }
33550cec 1673 }
bc7f75fa
AK
1674 return ret_val;
1675}
1676
1677static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
1678{
44abd5c1
BA
1679 struct e1000_hw *hw = &adapter->hw;
1680
e921eb1a 1681 /* PHY loopback cannot be performed if SoL/IDER sessions are active */
470a5420
BA
1682 if (hw->phy.ops.check_reset_block &&
1683 hw->phy.ops.check_reset_block(hw)) {
44defeb3 1684 e_err("Cannot do PHY loopback test when SoL/IDER is active.\n");
bc7f75fa
AK
1685 *data = 0;
1686 goto out;
1687 }
1688
1689 *data = e1000_setup_desc_rings(adapter);
e265522c 1690 if (*data)
bc7f75fa
AK
1691 goto out;
1692
1693 *data = e1000_setup_loopback_test(adapter);
e265522c 1694 if (*data)
bc7f75fa
AK
1695 goto err_loopback;
1696
1697 *data = e1000_run_loopback_test(adapter);
1698 e1000_loopback_cleanup(adapter);
1699
1700err_loopback:
1701 e1000_free_desc_rings(adapter);
1702out:
1703 return *data;
1704}
1705
1706static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
1707{
1708 struct e1000_hw *hw = &adapter->hw;
1709
1710 *data = 0;
318a94d6 1711 if (hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa 1712 int i = 0;
612e244c 1713 hw->mac.serdes_has_link = false;
bc7f75fa 1714
e921eb1a 1715 /* On some blade server designs, link establishment
ad68076e
BA
1716 * could take as long as 2-3 minutes
1717 */
bc7f75fa
AK
1718 do {
1719 hw->mac.ops.check_for_link(hw);
1720 if (hw->mac.serdes_has_link)
1721 return *data;
1722 msleep(20);
1723 } while (i++ < 3750);
1724
1725 *data = 1;
1726 } else {
1727 hw->mac.ops.check_for_link(hw);
1728 if (hw->mac.autoneg)
e921eb1a 1729 /* On some Phy/switch combinations, link establishment
5661aeb0
BA
1730 * can take a few seconds more than expected.
1731 */
ce43a216 1732 msleep_interruptible(5000);
bc7f75fa 1733
5661aeb0 1734 if (!(er32(STATUS) & E1000_STATUS_LU))
bc7f75fa
AK
1735 *data = 1;
1736 }
1737 return *data;
1738}
1739
8bb62869
BA
1740static int e1000e_get_sset_count(struct net_device __always_unused *netdev,
1741 int sset)
bc7f75fa 1742{
b9f2c044
JG
1743 switch (sset) {
1744 case ETH_SS_TEST:
1745 return E1000_TEST_LEN;
1746 case ETH_SS_STATS:
1747 return E1000_STATS_LEN;
1748 default:
1749 return -EOPNOTSUPP;
1750 }
bc7f75fa
AK
1751}
1752
1753static void e1000_diag_test(struct net_device *netdev,
1754 struct ethtool_test *eth_test, u64 *data)
1755{
1756 struct e1000_adapter *adapter = netdev_priv(netdev);
1757 u16 autoneg_advertised;
1758 u8 forced_speed_duplex;
1759 u8 autoneg;
1760 bool if_running = netif_running(netdev);
1761
3ef672ab
BA
1762 pm_runtime_get_sync(netdev->dev.parent);
1763
bc7f75fa 1764 set_bit(__E1000_TESTING, &adapter->state);
31dbe5b4
BA
1765
1766 if (!if_running) {
1767 /* Get control of and reset hardware */
1768 if (adapter->flags & FLAG_HAS_AMT)
1769 e1000e_get_hw_control(adapter);
1770
1771 e1000e_power_up_phy(adapter);
1772
1773 adapter->hw.phy.autoneg_wait_to_complete = 1;
1774 e1000e_reset(adapter);
1775 adapter->hw.phy.autoneg_wait_to_complete = 0;
1776 }
1777
bc7f75fa
AK
1778 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1779 /* Offline tests */
1780
1781 /* save speed, duplex, autoneg settings */
1782 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1783 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1784 autoneg = adapter->hw.mac.autoneg;
1785
44defeb3 1786 e_info("offline testing starting\n");
bc7f75fa 1787
bc7f75fa
AK
1788 if (if_running)
1789 /* indicate we're in test mode */
1790 dev_close(netdev);
bc7f75fa
AK
1791
1792 if (e1000_reg_test(adapter, &data[0]))
1793 eth_test->flags |= ETH_TEST_FL_FAILED;
1794
1795 e1000e_reset(adapter);
1796 if (e1000_eeprom_test(adapter, &data[1]))
1797 eth_test->flags |= ETH_TEST_FL_FAILED;
1798
1799 e1000e_reset(adapter);
1800 if (e1000_intr_test(adapter, &data[2]))
1801 eth_test->flags |= ETH_TEST_FL_FAILED;
1802
1803 e1000e_reset(adapter);
bc7f75fa
AK
1804 if (e1000_loopback_test(adapter, &data[3]))
1805 eth_test->flags |= ETH_TEST_FL_FAILED;
1806
c6ce3854
CW
1807 /* force this routine to wait until autoneg complete/timeout */
1808 adapter->hw.phy.autoneg_wait_to_complete = 1;
1809 e1000e_reset(adapter);
1810 adapter->hw.phy.autoneg_wait_to_complete = 0;
1811
1812 if (e1000_link_test(adapter, &data[4]))
1813 eth_test->flags |= ETH_TEST_FL_FAILED;
1814
bc7f75fa
AK
1815 /* restore speed, duplex, autoneg settings */
1816 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1817 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1818 adapter->hw.mac.autoneg = autoneg;
bc7f75fa 1819 e1000e_reset(adapter);
bc7f75fa
AK
1820
1821 clear_bit(__E1000_TESTING, &adapter->state);
1822 if (if_running)
1823 dev_open(netdev);
1824 } else {
31dbe5b4 1825 /* Online tests */
11b08be8 1826
44defeb3 1827 e_info("online testing starting\n");
bc7f75fa 1828
31dbe5b4 1829 /* register, eeprom, intr and loopback tests not run online */
bc7f75fa
AK
1830 data[0] = 0;
1831 data[1] = 0;
1832 data[2] = 0;
1833 data[3] = 0;
1834
31dbe5b4
BA
1835 if (e1000_link_test(adapter, &data[4]))
1836 eth_test->flags |= ETH_TEST_FL_FAILED;
11b08be8 1837
bc7f75fa
AK
1838 clear_bit(__E1000_TESTING, &adapter->state);
1839 }
31dbe5b4
BA
1840
1841 if (!if_running) {
1842 e1000e_reset(adapter);
1843
1844 if (adapter->flags & FLAG_HAS_AMT)
1845 e1000e_release_hw_control(adapter);
1846 }
1847
bc7f75fa 1848 msleep_interruptible(4 * 1000);
3ef672ab
BA
1849
1850 pm_runtime_put_sync(netdev->dev.parent);
bc7f75fa
AK
1851}
1852
1853static void e1000_get_wol(struct net_device *netdev,
1854 struct ethtool_wolinfo *wol)
1855{
1856 struct e1000_adapter *adapter = netdev_priv(netdev);
1857
1858 wol->supported = 0;
1859 wol->wolopts = 0;
1860
6ff68026
RW
1861 if (!(adapter->flags & FLAG_HAS_WOL) ||
1862 !device_can_wakeup(&adapter->pdev->dev))
bc7f75fa
AK
1863 return;
1864
1865 wol->supported = WAKE_UCAST | WAKE_MCAST |
4a29e155 1866 WAKE_BCAST | WAKE_MAGIC | WAKE_PHY;
bc7f75fa
AK
1867
1868 /* apply any specific unsupported masks here */
1869 if (adapter->flags & FLAG_NO_WAKE_UCAST) {
1870 wol->supported &= ~WAKE_UCAST;
1871
1872 if (adapter->wol & E1000_WUFC_EX)
6ad65145 1873 e_err("Interface does not support directed (unicast) frame wake-up packets\n");
bc7f75fa
AK
1874 }
1875
1876 if (adapter->wol & E1000_WUFC_EX)
1877 wol->wolopts |= WAKE_UCAST;
1878 if (adapter->wol & E1000_WUFC_MC)
1879 wol->wolopts |= WAKE_MCAST;
1880 if (adapter->wol & E1000_WUFC_BC)
1881 wol->wolopts |= WAKE_BCAST;
1882 if (adapter->wol & E1000_WUFC_MAG)
1883 wol->wolopts |= WAKE_MAGIC;
efb90e43
MW
1884 if (adapter->wol & E1000_WUFC_LNKC)
1885 wol->wolopts |= WAKE_PHY;
bc7f75fa
AK
1886}
1887
4a29e155 1888static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
bc7f75fa
AK
1889{
1890 struct e1000_adapter *adapter = netdev_priv(netdev);
1891
6ff68026 1892 if (!(adapter->flags & FLAG_HAS_WOL) ||
1fbfca32
BA
1893 !device_can_wakeup(&adapter->pdev->dev) ||
1894 (wol->wolopts & ~(WAKE_UCAST | WAKE_MCAST | WAKE_BCAST |
4a29e155 1895 WAKE_MAGIC | WAKE_PHY)))
1fbfca32 1896 return -EOPNOTSUPP;
bc7f75fa
AK
1897
1898 /* these settings will always override what we currently have */
1899 adapter->wol = 0;
1900
1901 if (wol->wolopts & WAKE_UCAST)
1902 adapter->wol |= E1000_WUFC_EX;
1903 if (wol->wolopts & WAKE_MCAST)
1904 adapter->wol |= E1000_WUFC_MC;
1905 if (wol->wolopts & WAKE_BCAST)
1906 adapter->wol |= E1000_WUFC_BC;
1907 if (wol->wolopts & WAKE_MAGIC)
1908 adapter->wol |= E1000_WUFC_MAG;
efb90e43
MW
1909 if (wol->wolopts & WAKE_PHY)
1910 adapter->wol |= E1000_WUFC_LNKC;
bc7f75fa 1911
6ff68026
RW
1912 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1913
bc7f75fa
AK
1914 return 0;
1915}
1916
dbf80dcb
BA
1917static int e1000_set_phys_id(struct net_device *netdev,
1918 enum ethtool_phys_id_state state)
bc7f75fa
AK
1919{
1920 struct e1000_adapter *adapter = netdev_priv(netdev);
4662e82b 1921 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1922
dbf80dcb
BA
1923 switch (state) {
1924 case ETHTOOL_ID_ACTIVE:
3ef672ab
BA
1925 pm_runtime_get_sync(netdev->dev.parent);
1926
dbf80dcb
BA
1927 if (!hw->mac.ops.blink_led)
1928 return 2; /* cycle on/off twice per second */
bc7f75fa 1929
dbf80dcb
BA
1930 hw->mac.ops.blink_led(hw);
1931 break;
1932
1933 case ETHTOOL_ID_INACTIVE:
4662e82b
BA
1934 if (hw->phy.type == e1000_phy_ife)
1935 e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, 0);
dbf80dcb
BA
1936 hw->mac.ops.led_off(hw);
1937 hw->mac.ops.cleanup_led(hw);
3ef672ab 1938 pm_runtime_put_sync(netdev->dev.parent);
dbf80dcb 1939 break;
bc7f75fa 1940
dbf80dcb 1941 case ETHTOOL_ID_ON:
f23efdff 1942 hw->mac.ops.led_on(hw);
dbf80dcb 1943 break;
bc7f75fa 1944
dbf80dcb 1945 case ETHTOOL_ID_OFF:
f23efdff 1946 hw->mac.ops.led_off(hw);
dbf80dcb
BA
1947 break;
1948 }
3ef672ab 1949
bc7f75fa
AK
1950 return 0;
1951}
1952
de5b3077
AK
1953static int e1000_get_coalesce(struct net_device *netdev,
1954 struct ethtool_coalesce *ec)
1955{
1956 struct e1000_adapter *adapter = netdev_priv(netdev);
1957
eab2abf5 1958 if (adapter->itr_setting <= 4)
de5b3077
AK
1959 ec->rx_coalesce_usecs = adapter->itr_setting;
1960 else
1961 ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
1962
1963 return 0;
1964}
1965
1966static int e1000_set_coalesce(struct net_device *netdev,
1967 struct ethtool_coalesce *ec)
1968{
1969 struct e1000_adapter *adapter = netdev_priv(netdev);
de5b3077
AK
1970
1971 if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
eab2abf5 1972 ((ec->rx_coalesce_usecs > 4) &&
de5b3077
AK
1973 (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
1974 (ec->rx_coalesce_usecs == 2))
1975 return -EINVAL;
1976
eab2abf5 1977 if (ec->rx_coalesce_usecs == 4) {
06a402ef
BA
1978 adapter->itr_setting = 4;
1979 adapter->itr = adapter->itr_setting;
eab2abf5 1980 } else if (ec->rx_coalesce_usecs <= 3) {
de5b3077
AK
1981 adapter->itr = 20000;
1982 adapter->itr_setting = ec->rx_coalesce_usecs;
1983 } else {
1984 adapter->itr = (1000000 / ec->rx_coalesce_usecs);
1985 adapter->itr_setting = adapter->itr & ~3;
1986 }
1987
3ef672ab
BA
1988 pm_runtime_get_sync(netdev->dev.parent);
1989
de5b3077 1990 if (adapter->itr_setting != 0)
22a4cca2 1991 e1000e_write_itr(adapter, adapter->itr);
de5b3077 1992 else
22a4cca2 1993 e1000e_write_itr(adapter, 0);
de5b3077 1994
3ef672ab
BA
1995 pm_runtime_put_sync(netdev->dev.parent);
1996
de5b3077
AK
1997 return 0;
1998}
1999
bc7f75fa
AK
2000static int e1000_nway_reset(struct net_device *netdev)
2001{
2002 struct e1000_adapter *adapter = netdev_priv(netdev);
5962bc21
BA
2003
2004 if (!netif_running(netdev))
2005 return -EAGAIN;
2006
2007 if (!adapter->hw.mac.autoneg)
2008 return -EINVAL;
2009
3ef672ab 2010 pm_runtime_get_sync(netdev->dev.parent);
5962bc21 2011 e1000e_reinit_locked(adapter);
3ef672ab 2012 pm_runtime_put_sync(netdev->dev.parent);
5962bc21 2013
bc7f75fa
AK
2014 return 0;
2015}
2016
bc7f75fa 2017static void e1000_get_ethtool_stats(struct net_device *netdev,
8bb62869 2018 struct ethtool_stats __always_unused *stats,
bc7f75fa
AK
2019 u64 *data)
2020{
2021 struct e1000_adapter *adapter = netdev_priv(netdev);
67fd4fcb 2022 struct rtnl_link_stats64 net_stats;
bc7f75fa 2023 int i;
e0f36a95 2024 char *p = NULL;
bc7f75fa 2025
3ef672ab
BA
2026 pm_runtime_get_sync(netdev->dev.parent);
2027
67fd4fcb 2028 e1000e_get_stats64(netdev, &net_stats);
3ef672ab
BA
2029
2030 pm_runtime_put_sync(netdev->dev.parent);
2031
bc7f75fa 2032 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
e0f36a95
AK
2033 switch (e1000_gstrings_stats[i].type) {
2034 case NETDEV_STATS:
53aa82da 2035 p = (char *)&net_stats +
f0ff4398 2036 e1000_gstrings_stats[i].stat_offset;
e0f36a95
AK
2037 break;
2038 case E1000_STATS:
53aa82da 2039 p = (char *)adapter +
f0ff4398 2040 e1000_gstrings_stats[i].stat_offset;
e0f36a95 2041 break;
61c75816
BA
2042 default:
2043 data[i] = 0;
2044 continue;
e0f36a95
AK
2045 }
2046
bc7f75fa 2047 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
f0ff4398 2048 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
bc7f75fa
AK
2049 }
2050}
2051
8bb62869
BA
2052static void e1000_get_strings(struct net_device __always_unused *netdev,
2053 u32 stringset, u8 *data)
bc7f75fa
AK
2054{
2055 u8 *p = data;
2056 int i;
2057
2058 switch (stringset) {
2059 case ETH_SS_TEST:
5c1bda0a 2060 memcpy(data, e1000_gstrings_test, sizeof(e1000_gstrings_test));
bc7f75fa
AK
2061 break;
2062 case ETH_SS_STATS:
2063 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
2064 memcpy(p, e1000_gstrings_stats[i].stat_string,
2065 ETH_GSTRING_LEN);
2066 p += ETH_GSTRING_LEN;
2067 }
2068 break;
2069 }
2070}
2071
70495a50 2072static int e1000_get_rxnfc(struct net_device *netdev,
8bb62869
BA
2073 struct ethtool_rxnfc *info,
2074 u32 __always_unused *rule_locs)
70495a50
BA
2075{
2076 info->data = 0;
2077
2078 switch (info->cmd) {
2079 case ETHTOOL_GRXFH: {
2080 struct e1000_adapter *adapter = netdev_priv(netdev);
2081 struct e1000_hw *hw = &adapter->hw;
3ef672ab
BA
2082 u32 mrqc;
2083
2084 pm_runtime_get_sync(netdev->dev.parent);
2085 mrqc = er32(MRQC);
2086 pm_runtime_put_sync(netdev->dev.parent);
70495a50
BA
2087
2088 if (!(mrqc & E1000_MRQC_RSS_FIELD_MASK))
2089 return 0;
2090
2091 switch (info->flow_type) {
2092 case TCP_V4_FLOW:
2093 if (mrqc & E1000_MRQC_RSS_FIELD_IPV4_TCP)
2094 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2095 /* fall through */
2096 case UDP_V4_FLOW:
2097 case SCTP_V4_FLOW:
2098 case AH_ESP_V4_FLOW:
2099 case IPV4_FLOW:
2100 if (mrqc & E1000_MRQC_RSS_FIELD_IPV4)
2101 info->data |= RXH_IP_SRC | RXH_IP_DST;
2102 break;
2103 case TCP_V6_FLOW:
2104 if (mrqc & E1000_MRQC_RSS_FIELD_IPV6_TCP)
2105 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2106 /* fall through */
2107 case UDP_V6_FLOW:
2108 case SCTP_V6_FLOW:
2109 case AH_ESP_V6_FLOW:
2110 case IPV6_FLOW:
2111 if (mrqc & E1000_MRQC_RSS_FIELD_IPV6)
2112 info->data |= RXH_IP_SRC | RXH_IP_DST;
2113 break;
2114 default:
2115 break;
2116 }
2117 return 0;
2118 }
2119 default:
2120 return -EOPNOTSUPP;
2121 }
2122}
2123
203e4151
BA
2124static int e1000e_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2125{
2126 struct e1000_adapter *adapter = netdev_priv(netdev);
2127 struct e1000_hw *hw = &adapter->hw;
d495bcb8
BA
2128 u16 cap_addr, lpa_addr, pcs_stat_addr, phy_data;
2129 u32 ret_val;
203e4151 2130
d495bcb8 2131 if (!(adapter->flags2 & FLAG2_HAS_EEE))
203e4151
BA
2132 return -EOPNOTSUPP;
2133
2134 switch (hw->phy.type) {
2135 case e1000_phy_82579:
2136 cap_addr = I82579_EEE_CAPABILITY;
203e4151
BA
2137 lpa_addr = I82579_EEE_LP_ABILITY;
2138 pcs_stat_addr = I82579_EEE_PCS_STATUS;
2139 break;
2140 case e1000_phy_i217:
2141 cap_addr = I217_EEE_CAPABILITY;
203e4151
BA
2142 lpa_addr = I217_EEE_LP_ABILITY;
2143 pcs_stat_addr = I217_EEE_PCS_STATUS;
2144 break;
2145 default:
2146 return -EOPNOTSUPP;
2147 }
2148
3ef672ab
BA
2149 pm_runtime_get_sync(netdev->dev.parent);
2150
203e4151 2151 ret_val = hw->phy.ops.acquire(hw);
3ef672ab
BA
2152 if (ret_val) {
2153 pm_runtime_put_sync(netdev->dev.parent);
203e4151 2154 return -EBUSY;
3ef672ab 2155 }
203e4151
BA
2156
2157 /* EEE Capability */
2158 ret_val = e1000_read_emi_reg_locked(hw, cap_addr, &phy_data);
2159 if (ret_val)
2160 goto release;
2161 edata->supported = mmd_eee_cap_to_ethtool_sup_t(phy_data);
2162
2163 /* EEE Advertised */
d495bcb8 2164 edata->advertised = mmd_eee_adv_to_ethtool_adv_t(adapter->eee_advert);
203e4151
BA
2165
2166 /* EEE Link Partner Advertised */
2167 ret_val = e1000_read_emi_reg_locked(hw, lpa_addr, &phy_data);
2168 if (ret_val)
2169 goto release;
2170 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2171
2172 /* EEE PCS Status */
2173 ret_val = e1000_read_emi_reg_locked(hw, pcs_stat_addr, &phy_data);
3ef672ab
BA
2174 if (ret_val)
2175 goto release;
203e4151
BA
2176 if (hw->phy.type == e1000_phy_82579)
2177 phy_data <<= 8;
2178
203e4151
BA
2179 /* Result of the EEE auto negotiation - there is no register that
2180 * has the status of the EEE negotiation so do a best-guess based
d495bcb8 2181 * on whether Tx or Rx LPI indications have been received.
203e4151 2182 */
d495bcb8 2183 if (phy_data & (E1000_EEE_TX_LPI_RCVD | E1000_EEE_RX_LPI_RCVD))
203e4151
BA
2184 edata->eee_active = true;
2185
2186 edata->eee_enabled = !hw->dev_spec.ich8lan.eee_disable;
2187 edata->tx_lpi_enabled = true;
2188 edata->tx_lpi_timer = er32(LPIC) >> E1000_LPIC_LPIET_SHIFT;
2189
3ef672ab
BA
2190release:
2191 hw->phy.ops.release(hw);
2192 if (ret_val)
2193 ret_val = -ENODATA;
2194
2195 pm_runtime_put_sync(netdev->dev.parent);
2196
2197 return ret_val;
203e4151
BA
2198}
2199
2200static int e1000e_set_eee(struct net_device *netdev, struct ethtool_eee *edata)
2201{
2202 struct e1000_adapter *adapter = netdev_priv(netdev);
2203 struct e1000_hw *hw = &adapter->hw;
2204 struct ethtool_eee eee_curr;
2205 s32 ret_val;
2206
203e4151
BA
2207 ret_val = e1000e_get_eee(netdev, &eee_curr);
2208 if (ret_val)
2209 return ret_val;
2210
203e4151
BA
2211 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
2212 e_err("Setting EEE tx-lpi is not supported\n");
2213 return -EINVAL;
2214 }
2215
2216 if (eee_curr.tx_lpi_timer != edata->tx_lpi_timer) {
2217 e_err("Setting EEE Tx LPI timer is not supported\n");
2218 return -EINVAL;
2219 }
2220
d495bcb8
BA
2221 if (edata->advertised & ~(ADVERTISE_100_FULL | ADVERTISE_1000_FULL)) {
2222 e_err("EEE advertisement supports only 100TX and/or 1000T full-duplex\n");
2223 return -EINVAL;
203e4151
BA
2224 }
2225
d495bcb8
BA
2226 adapter->eee_advert = ethtool_adv_to_mmd_eee_adv_t(edata->advertised);
2227
2228 hw->dev_spec.ich8lan.eee_disable = !edata->eee_enabled;
2229
3ef672ab
BA
2230 pm_runtime_get_sync(netdev->dev.parent);
2231
d495bcb8
BA
2232 /* reset the link */
2233 if (netif_running(netdev))
2234 e1000e_reinit_locked(adapter);
2235 else
2236 e1000e_reset(adapter);
2237
3ef672ab
BA
2238 pm_runtime_put_sync(netdev->dev.parent);
2239
203e4151
BA
2240 return 0;
2241}
2242
b67e1913
BA
2243static int e1000e_get_ts_info(struct net_device *netdev,
2244 struct ethtool_ts_info *info)
2245{
2246 struct e1000_adapter *adapter = netdev_priv(netdev);
2247
2248 ethtool_op_get_ts_info(netdev, info);
2249
2250 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
2251 return 0;
2252
2253 info->so_timestamping |= (SOF_TIMESTAMPING_TX_HARDWARE |
2254 SOF_TIMESTAMPING_RX_HARDWARE |
2255 SOF_TIMESTAMPING_RAW_HARDWARE);
2256
2257 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
2258
2259 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
d89777bf
BA
2260 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2261 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2262 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2263 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
2264 (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2265 (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
2266 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
2267 (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
2268 (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
b67e1913
BA
2269 (1 << HWTSTAMP_FILTER_ALL));
2270
d89777bf
BA
2271 if (adapter->ptp_clock)
2272 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2273
b67e1913
BA
2274 return 0;
2275}
2276
bc7f75fa
AK
2277static const struct ethtool_ops e1000_ethtool_ops = {
2278 .get_settings = e1000_get_settings,
2279 .set_settings = e1000_set_settings,
2280 .get_drvinfo = e1000_get_drvinfo,
2281 .get_regs_len = e1000_get_regs_len,
2282 .get_regs = e1000_get_regs,
2283 .get_wol = e1000_get_wol,
2284 .set_wol = e1000_set_wol,
2285 .get_msglevel = e1000_get_msglevel,
2286 .set_msglevel = e1000_set_msglevel,
2287 .nway_reset = e1000_nway_reset,
ed4ba4b5 2288 .get_link = ethtool_op_get_link,
bc7f75fa
AK
2289 .get_eeprom_len = e1000_get_eeprom_len,
2290 .get_eeprom = e1000_get_eeprom,
2291 .set_eeprom = e1000_set_eeprom,
2292 .get_ringparam = e1000_get_ringparam,
2293 .set_ringparam = e1000_set_ringparam,
2294 .get_pauseparam = e1000_get_pauseparam,
2295 .set_pauseparam = e1000_set_pauseparam,
bc7f75fa
AK
2296 .self_test = e1000_diag_test,
2297 .get_strings = e1000_get_strings,
dbf80dcb 2298 .set_phys_id = e1000_set_phys_id,
bc7f75fa 2299 .get_ethtool_stats = e1000_get_ethtool_stats,
b9f2c044 2300 .get_sset_count = e1000e_get_sset_count,
de5b3077
AK
2301 .get_coalesce = e1000_get_coalesce,
2302 .set_coalesce = e1000_set_coalesce,
70495a50 2303 .get_rxnfc = e1000_get_rxnfc,
b67e1913 2304 .get_ts_info = e1000e_get_ts_info,
203e4151
BA
2305 .get_eee = e1000e_get_eee,
2306 .set_eee = e1000e_set_eee,
bc7f75fa
AK
2307};
2308
2309void e1000e_set_ethtool_ops(struct net_device *netdev)
2310{
2311 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
2312}