projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
e1000e: add support for IEEE-1588 PTP
[linux-2.6-block.git] / drivers / net / ethernet / intel / e1000e / ethtool.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
f5e261e6 4 Copyright(c) 1999 - 2012 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include <linux/netdevice.h>
9fb7a5f7 32#include <linux/interrupt.h>
bc7f75fa
AK		 33#include <linux/ethtool.h>
34#include <linux/pci.h>
5a0e3ad6 35#include <linux/slab.h>
bc7f75fa 36#include <linux/delay.h>
c85c21ad 37#include <linux/vmalloc.h>
203e4151 38#include <linux/mdio.h>
bc7f75fa
AK		 39
40#include "e1000.h"
41
e0f36a95
AK		 42enum {NETDEV_STATS, E1000_STATS};
43
bc7f75fa
AK		 44struct e1000_stats {
45 char stat_string[ETH_GSTRING_LEN];
e0f36a95 46 int type;
bc7f75fa
AK		 47 int sizeof_stat;
48 int stat_offset;
49};
50
f0f1a172 51#define E1000_STAT(str, m) { \
67fd4fcb
JK		 52 .stat_string = str, \
53 .type = E1000_STATS, \
54 .sizeof_stat = sizeof(((struct e1000_adapter *)0)->m), \
55 .stat_offset = offsetof(struct e1000_adapter, m) }
f0f1a172 56#define E1000_NETDEV_STAT(str, m) { \
67fd4fcb
JK		 57 .stat_string = str, \
58 .type = NETDEV_STATS, \
59 .sizeof_stat = sizeof(((struct rtnl_link_stats64 *)0)->m), \
60 .stat_offset = offsetof(struct rtnl_link_stats64, m) }
e0f36a95 61
bc7f75fa 62static const struct e1000_stats e1000_gstrings_stats[] = {
f0f1a172
BA		 63 E1000_STAT("rx_packets", stats.gprc),
64 E1000_STAT("tx_packets", stats.gptc),
65 E1000_STAT("rx_bytes", stats.gorc),
66 E1000_STAT("tx_bytes", stats.gotc),
67 E1000_STAT("rx_broadcast", stats.bprc),
68 E1000_STAT("tx_broadcast", stats.bptc),
69 E1000_STAT("rx_multicast", stats.mprc),
70 E1000_STAT("tx_multicast", stats.mptc),
67fd4fcb
JK		 71 E1000_NETDEV_STAT("rx_errors", rx_errors),
72 E1000_NETDEV_STAT("tx_errors", tx_errors),
73 E1000_NETDEV_STAT("tx_dropped", tx_dropped),
f0f1a172
BA		 74 E1000_STAT("multicast", stats.mprc),
75 E1000_STAT("collisions", stats.colc),
67fd4fcb
JK		 76 E1000_NETDEV_STAT("rx_length_errors", rx_length_errors),
77 E1000_NETDEV_STAT("rx_over_errors", rx_over_errors),
f0f1a172 78 E1000_STAT("rx_crc_errors", stats.crcerrs),
67fd4fcb 79 E1000_NETDEV_STAT("rx_frame_errors", rx_frame_errors),
f0f1a172
BA		 80 E1000_STAT("rx_no_buffer_count", stats.rnbc),
81 E1000_STAT("rx_missed_errors", stats.mpc),
82 E1000_STAT("tx_aborted_errors", stats.ecol),
83 E1000_STAT("tx_carrier_errors", stats.tncrs),
67fd4fcb
JK		 84 E1000_NETDEV_STAT("tx_fifo_errors", tx_fifo_errors),
85 E1000_NETDEV_STAT("tx_heartbeat_errors", tx_heartbeat_errors),
f0f1a172
BA		 86 E1000_STAT("tx_window_errors", stats.latecol),
87 E1000_STAT("tx_abort_late_coll", stats.latecol),
88 E1000_STAT("tx_deferred_ok", stats.dc),
89 E1000_STAT("tx_single_coll_ok", stats.scc),
90 E1000_STAT("tx_multi_coll_ok", stats.mcc),
91 E1000_STAT("tx_timeout_count", tx_timeout_count),
92 E1000_STAT("tx_restart_queue", restart_queue),
93 E1000_STAT("rx_long_length_errors", stats.roc),
94 E1000_STAT("rx_short_length_errors", stats.ruc),
95 E1000_STAT("rx_align_errors", stats.algnerrc),
96 E1000_STAT("tx_tcp_seg_good", stats.tsctc),
97 E1000_STAT("tx_tcp_seg_failed", stats.tsctfc),
98 E1000_STAT("rx_flow_control_xon", stats.xonrxc),
99 E1000_STAT("rx_flow_control_xoff", stats.xoffrxc),
100 E1000_STAT("tx_flow_control_xon", stats.xontxc),
101 E1000_STAT("tx_flow_control_xoff", stats.xofftxc),
f0f1a172
BA		 102 E1000_STAT("rx_csum_offload_good", hw_csum_good),
103 E1000_STAT("rx_csum_offload_errors", hw_csum_err),
104 E1000_STAT("rx_header_split", rx_hdr_split),
105 E1000_STAT("alloc_rx_buff_failed", alloc_rx_buff_failed),
106 E1000_STAT("tx_smbus", stats.mgptc),
107 E1000_STAT("rx_smbus", stats.mgprc),
108 E1000_STAT("dropped_smbus", stats.mgpdc),
109 E1000_STAT("rx_dma_failed", rx_dma_failed),
110 E1000_STAT("tx_dma_failed", tx_dma_failed),
b67e1913 111 E1000_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
bc7f75fa
AK		 112};
113
c00acf46 114#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
bc7f75fa
AK		 115#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN)
116static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
117 "Register test (offline)", "Eeprom test (offline)",
118 "Interrupt test (offline)", "Loopback test (offline)",
119 "Link test (on/offline)"
120};
ad68076e 121#define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
bc7f75fa
AK		 122
123static int e1000_get_settings(struct net_device *netdev,
124 struct ethtool_cmd *ecmd)
125{
126 struct e1000_adapter *adapter = netdev_priv(netdev);
127 struct e1000_hw *hw = &adapter->hw;
70739497 128 u32 speed;
bc7f75fa 129
318a94d6 130 if (hw->phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 131
132 ecmd->supported = (SUPPORTED_10baseT_Half |
133 SUPPORTED_10baseT_Full |
134 SUPPORTED_100baseT_Half |
135 SUPPORTED_100baseT_Full |
136 SUPPORTED_1000baseT_Full |
137 SUPPORTED_Autoneg |
138 SUPPORTED_TP);
139 if (hw->phy.type == e1000_phy_ife)
140 ecmd->supported &= ~SUPPORTED_1000baseT_Full;
141 ecmd->advertising = ADVERTISED_TP;
142
143 if (hw->mac.autoneg == 1) {
144 ecmd->advertising |= ADVERTISED_Autoneg;
145 /* the e1000 autoneg seems to match ethtool nicely */
146 ecmd->advertising |= hw->phy.autoneg_advertised;
147 }
148
149 ecmd->port = PORT_TP;
150 ecmd->phy_address = hw->phy.addr;
151 ecmd->transceiver = XCVR_INTERNAL;
152
153 } else {
154 ecmd->supported = (SUPPORTED_1000baseT_Full |
155 SUPPORTED_FIBRE |
156 SUPPORTED_Autoneg);
157
158 ecmd->advertising = (ADVERTISED_1000baseT_Full |
159 ADVERTISED_FIBRE |
160 ADVERTISED_Autoneg);
161
162 ecmd->port = PORT_FIBRE;
163 ecmd->transceiver = XCVR_EXTERNAL;
164 }
165
70739497 166 speed = -1;
0c6bdb30
BA		 167 ecmd->duplex = -1;
168
169 if (netif_running(netdev)) {
170 if (netif_carrier_ok(netdev)) {
70739497 171 speed = adapter->link_speed;
0c6bdb30
BA		 172 ecmd->duplex = adapter->link_duplex - 1;
173 }
bc7f75fa 174 } else {
0c6bdb30
BA		 175 u32 status = er32(STATUS);
176 if (status & E1000_STATUS_LU) {
177 if (status & E1000_STATUS_SPEED_1000)
70739497 178 speed = SPEED_1000;
0c6bdb30 179 else if (status & E1000_STATUS_SPEED_100)
70739497 180 speed = SPEED_100;
0c6bdb30 181 else
70739497 182 speed = SPEED_10;
0c6bdb30
BA		 183
184 if (status & E1000_STATUS_FD)
185 ecmd->duplex = DUPLEX_FULL;
186 else
187 ecmd->duplex = DUPLEX_HALF;
188 }
bc7f75fa
AK		 189 }
190
70739497 191 ethtool_cmd_speed_set(ecmd, speed);
318a94d6 192 ecmd->autoneg = ((hw->phy.media_type == e1000_media_type_fiber) ||
bc7f75fa 193 hw->mac.autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
18760f1e
CL		 194
195 /* MDI-X => 2; MDI =>1; Invalid =>0 */
196 if ((hw->phy.media_type == e1000_media_type_copper) &&
0c6bdb30 197 netif_carrier_ok(netdev))
18760f1e
CL		 198 ecmd->eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X :
199 ETH_TP_MDI;
200 else
201 ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
202
4e8186b6
JB		 203 if (hw->phy.mdix == AUTO_ALL_MODES)
204 ecmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
205 else
206 ecmd->eth_tp_mdix_ctrl = hw->phy.mdix;
207
bc7f75fa
AK		 208 return 0;
209}
210
14ad2513 211static int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
bc7f75fa
AK		 212{
213 struct e1000_mac_info *mac = &adapter->hw.mac;
214
215 mac->autoneg = 0;
216
14ad2513 217 /* Make sure dplx is at most 1 bit and lsb of speed is not set
e921eb1a
BA		 218 * for the switch() below to work
219 */
14ad2513
DD		 220 if ((spd & 1) || (dplx & ~1))
221 goto err_inval;
222
bc7f75fa 223 /* Fiber NICs only allow 1000 gbps Full duplex */
318a94d6 224 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
14ad2513
DD		 225 spd != SPEED_1000 &&
226 dplx != DUPLEX_FULL) {
227 goto err_inval;
bc7f75fa
AK		 228 }
229
14ad2513 230 switch (spd + dplx) {
bc7f75fa
AK		 231 case SPEED_10 + DUPLEX_HALF:
232 mac->forced_speed_duplex = ADVERTISE_10_HALF;
233 break;
234 case SPEED_10 + DUPLEX_FULL:
235 mac->forced_speed_duplex = ADVERTISE_10_FULL;
236 break;
237 case SPEED_100 + DUPLEX_HALF:
238 mac->forced_speed_duplex = ADVERTISE_100_HALF;
239 break;
240 case SPEED_100 + DUPLEX_FULL:
241 mac->forced_speed_duplex = ADVERTISE_100_FULL;
242 break;
243 case SPEED_1000 + DUPLEX_FULL:
244 mac->autoneg = 1;
245 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
246 break;
247 case SPEED_1000 + DUPLEX_HALF: /* not supported */
248 default:
14ad2513 249 goto err_inval;
bc7f75fa 250 }
4e8186b6
JB		 251
252 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
253 adapter->hw.phy.mdix = AUTO_ALL_MODES;
254
bc7f75fa 255 return 0;
14ad2513
DD		 256
257err_inval:
258 e_err("Unsupported Speed/Duplex configuration\n");
259 return -EINVAL;
bc7f75fa
AK		 260}
261
262static int e1000_set_settings(struct net_device *netdev,
263 struct ethtool_cmd *ecmd)
264{
265 struct e1000_adapter *adapter = netdev_priv(netdev);
266 struct e1000_hw *hw = &adapter->hw;
267
e921eb1a 268 /* When SoL/IDER sessions are active, autoneg/speed/duplex
ad68076e
BA		 269 * cannot be changed
270 */
470a5420
BA		 271 if (hw->phy.ops.check_reset_block &&
272 hw->phy.ops.check_reset_block(hw)) {
6ad65145 273 e_err("Cannot change link characteristics when SoL/IDER is active.\n");
bc7f75fa
AK		 274 return -EINVAL;
275 }
276
e921eb1a 277 /* MDI setting is only allowed when autoneg enabled because
4e8186b6
JB		 278 * some hardware doesn't allow MDI setting when speed or
279 * duplex is forced.
280 */
281 if (ecmd->eth_tp_mdix_ctrl) {
282 if (hw->phy.media_type != e1000_media_type_copper)
283 return -EOPNOTSUPP;
284
285 if ((ecmd->eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
286 (ecmd->autoneg != AUTONEG_ENABLE)) {
287 e_err("forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
288 return -EINVAL;
289 }
290 }
291
bc7f75fa 292 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 293 usleep_range(1000, 2000);
bc7f75fa
AK		 294
295 if (ecmd->autoneg == AUTONEG_ENABLE) {
296 hw->mac.autoneg = 1;
318a94d6 297 if (hw->phy.media_type == e1000_media_type_fiber)
bc7f75fa
AK		 298 hw->phy.autoneg_advertised = ADVERTISED_1000baseT_Full |
299 ADVERTISED_FIBRE |
300 ADVERTISED_Autoneg;
301 else
302 hw->phy.autoneg_advertised = ecmd->advertising |
303 ADVERTISED_TP |
304 ADVERTISED_Autoneg;
305 ecmd->advertising = hw->phy.autoneg_advertised;
318a94d6 306 if (adapter->fc_autoneg)
5c48ef3e 307 hw->fc.requested_mode = e1000_fc_default;
bc7f75fa 308 } else {
25db0338 309 u32 speed = ethtool_cmd_speed(ecmd);
4e8186b6 310 /* calling this overrides forced MDI setting */
14ad2513 311 if (e1000_set_spd_dplx(adapter, speed, ecmd->duplex)) {
bc7f75fa
AK		 312 clear_bit(__E1000_RESETTING, &adapter->state);
313 return -EINVAL;
314 }
315 }
316
4e8186b6
JB		 317 /* MDI-X => 2; MDI => 1; Auto => 3 */
318 if (ecmd->eth_tp_mdix_ctrl) {
e921eb1a 319 /* fix up the value for auto (3 => 0) as zero is mapped
4e8186b6
JB		 320 * internally to auto
321 */
322 if (ecmd->eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
323 hw->phy.mdix = AUTO_ALL_MODES;
324 else
325 hw->phy.mdix = ecmd->eth_tp_mdix_ctrl;
326 }
327
bc7f75fa
AK		 328 /* reset the link */
329
330 if (netif_running(adapter->netdev)) {
331 e1000e_down(adapter);
332 e1000e_up(adapter);
4e8186b6 333 } else
bc7f75fa 334 e1000e_reset(adapter);
bc7f75fa
AK		 335
336 clear_bit(__E1000_RESETTING, &adapter->state);
337 return 0;
338}
339
340static void e1000_get_pauseparam(struct net_device *netdev,
341 struct ethtool_pauseparam *pause)
342{
343 struct e1000_adapter *adapter = netdev_priv(netdev);
344 struct e1000_hw *hw = &adapter->hw;
345
346 pause->autoneg =
347 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
348
5c48ef3e 349 if (hw->fc.current_mode == e1000_fc_rx_pause) {
bc7f75fa 350 pause->rx_pause = 1;
5c48ef3e 351 } else if (hw->fc.current_mode == e1000_fc_tx_pause) {
bc7f75fa 352 pause->tx_pause = 1;
5c48ef3e 353 } else if (hw->fc.current_mode == e1000_fc_full) {
bc7f75fa
AK		 354 pause->rx_pause = 1;
355 pause->tx_pause = 1;
356 }
357}
358
359static int e1000_set_pauseparam(struct net_device *netdev,
360 struct ethtool_pauseparam *pause)
361{
362 struct e1000_adapter *adapter = netdev_priv(netdev);
363 struct e1000_hw *hw = &adapter->hw;
364 int retval = 0;
365
366 adapter->fc_autoneg = pause->autoneg;
367
368 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 369 usleep_range(1000, 2000);
bc7f75fa 370
bc7f75fa 371 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
5c48ef3e 372 hw->fc.requested_mode = e1000_fc_default;
bc7f75fa
AK		 373 if (netif_running(adapter->netdev)) {
374 e1000e_down(adapter);
375 e1000e_up(adapter);
376 } else {
377 e1000e_reset(adapter);
378 }
379 } else {
5c48ef3e
BA		 380 if (pause->rx_pause && pause->tx_pause)
381 hw->fc.requested_mode = e1000_fc_full;
382 else if (pause->rx_pause && !pause->tx_pause)
383 hw->fc.requested_mode = e1000_fc_rx_pause;
384 else if (!pause->rx_pause && pause->tx_pause)
385 hw->fc.requested_mode = e1000_fc_tx_pause;
386 else if (!pause->rx_pause && !pause->tx_pause)
387 hw->fc.requested_mode = e1000_fc_none;
388
389 hw->fc.current_mode = hw->fc.requested_mode;
390
945eb313
BA		 391 if (hw->phy.media_type == e1000_media_type_fiber) {
392 retval = hw->mac.ops.setup_link(hw);
393 /* implicit goto out */
394 } else {
395 retval = e1000e_force_mac_fc(hw);
396 if (retval)
397 goto out;
398 e1000e_set_fc_watermarks(hw);
399 }
bc7f75fa
AK		 400 }
401
945eb313 402out:
bc7f75fa
AK		 403 clear_bit(__E1000_RESETTING, &adapter->state);
404 return retval;
405}
406
bc7f75fa
AK		 407static u32 e1000_get_msglevel(struct net_device *netdev)
408{
409 struct e1000_adapter *adapter = netdev_priv(netdev);
410 return adapter->msg_enable;
411}
412
413static void e1000_set_msglevel(struct net_device *netdev, u32 data)
414{
415 struct e1000_adapter *adapter = netdev_priv(netdev);
416 adapter->msg_enable = data;
417}
418
419static int e1000_get_regs_len(struct net_device *netdev)
420{
421#define E1000_REGS_LEN 32 /* overestimate */
422 return E1000_REGS_LEN * sizeof(u32);
423}
424
425static void e1000_get_regs(struct net_device *netdev,
426 struct ethtool_regs *regs, void *p)
427{
428 struct e1000_adapter *adapter = netdev_priv(netdev);
429 struct e1000_hw *hw = &adapter->hw;
430 u32 *regs_buff = p;
431 u16 phy_data;
bc7f75fa
AK		 432
433 memset(p, 0, E1000_REGS_LEN * sizeof(u32));
434
ff938e43
SS		 435 regs->version = (1 << 24) | (adapter->pdev->revision << 16) |
436 adapter->pdev->device;
bc7f75fa
AK		 437
438 regs_buff[0] = er32(CTRL);
439 regs_buff[1] = er32(STATUS);
440
441 regs_buff[2] = er32(RCTL);
1e36052e
BA		 442 regs_buff[3] = er32(RDLEN(0));
443 regs_buff[4] = er32(RDH(0));
444 regs_buff[5] = er32(RDT(0));
bc7f75fa
AK		 445 regs_buff[6] = er32(RDTR);
446
447 regs_buff[7] = er32(TCTL);
1e36052e
BA		 448 regs_buff[8] = er32(TDLEN(0));
449 regs_buff[9] = er32(TDH(0));
450 regs_buff[10] = er32(TDT(0));
bc7f75fa
AK		 451 regs_buff[11] = er32(TIDV);
452
453 regs_buff[12] = adapter->hw.phy.type; /* PHY type (IGP=1, M88=0) */
23033fad
JB		 454
455 /* ethtool doesn't use anything past this point, so all this
e921eb1a
BA		 456 * code is likely legacy junk for apps that may or may not exist
457 */
bc7f75fa
AK		 458 if (hw->phy.type == e1000_phy_m88) {
459 e1e_rphy(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
460 regs_buff[13] = (u32)phy_data; /* cable length */
461 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
462 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
463 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
464 e1e_rphy(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
465 regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
466 regs_buff[18] = regs_buff[13]; /* cable polarity */
467 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
468 regs_buff[20] = regs_buff[17]; /* polarity correction */
469 /* phy receive errors */
470 regs_buff[22] = adapter->phy_stats.receive_errors;
471 regs_buff[23] = regs_buff[13]; /* mdix mode */
472 }
23033fad 473 regs_buff[21] = 0; /* was idle_errors */
bc7f75fa
AK		 474 e1e_rphy(hw, PHY_1000T_STATUS, &phy_data);
475 regs_buff[24] = (u32)phy_data; /* phy local receiver status */
476 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
477}
478
479static int e1000_get_eeprom_len(struct net_device *netdev)
480{
481 struct e1000_adapter *adapter = netdev_priv(netdev);
482 return adapter->hw.nvm.word_size * 2;
483}
484
485static int e1000_get_eeprom(struct net_device *netdev,
486 struct ethtool_eeprom *eeprom, u8 *bytes)
487{
488 struct e1000_adapter *adapter = netdev_priv(netdev);
489 struct e1000_hw *hw = &adapter->hw;
490 u16 *eeprom_buff;
491 int first_word;
492 int last_word;
493 int ret_val = 0;
494 u16 i;
495
496 if (eeprom->len == 0)
497 return -EINVAL;
498
499 eeprom->magic = adapter->pdev->vendor | (adapter->pdev->device << 16);
500
501 first_word = eeprom->offset >> 1;
502 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
503
504 eeprom_buff = kmalloc(sizeof(u16) *
505 (last_word - first_word + 1), GFP_KERNEL);
506 if (!eeprom_buff)
507 return -ENOMEM;
508
509 if (hw->nvm.type == e1000_nvm_eeprom_spi) {
510 ret_val = e1000_read_nvm(hw, first_word,
511 last_word - first_word + 1,
512 eeprom_buff);
513 } else {
514 for (i = 0; i < last_word - first_word + 1; i++) {
515 ret_val = e1000_read_nvm(hw, first_word + i, 1,
516 &eeprom_buff[i]);
e243455d 517 if (ret_val)
bc7f75fa
AK		 518 break;
519 }
520 }
521
e243455d
BA		 522 if (ret_val) {
523 /* a read error occurred, throw away the result */
8528b016
RK		 524 memset(eeprom_buff, 0xff, sizeof(u16) *
525 (last_word - first_word + 1));
e243455d
BA		 526 } else {
527 /* Device's eeprom is always little-endian, word addressable */
528 for (i = 0; i < last_word - first_word + 1; i++)
529 le16_to_cpus(&eeprom_buff[i]);
530 }
bc7f75fa
AK		 531
532 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
533 kfree(eeprom_buff);
534
535 return ret_val;
536}
537
538static int e1000_set_eeprom(struct net_device *netdev,
539 struct ethtool_eeprom *eeprom, u8 *bytes)
540{
541 struct e1000_adapter *adapter = netdev_priv(netdev);
542 struct e1000_hw *hw = &adapter->hw;
543 u16 *eeprom_buff;
544 void *ptr;
545 int max_len;
546 int first_word;
547 int last_word;
548 int ret_val = 0;
549 u16 i;
550
551 if (eeprom->len == 0)
552 return -EOPNOTSUPP;
553
554 if (eeprom->magic != (adapter->pdev->vendor | (adapter->pdev->device << 16)))
555 return -EFAULT;
556
4a770358
BA		 557 if (adapter->flags & FLAG_READ_ONLY_NVM)
558 return -EINVAL;
559
bc7f75fa
AK		 560 max_len = hw->nvm.word_size * 2;
561
562 first_word = eeprom->offset >> 1;
563 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
564 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
565 if (!eeprom_buff)
566 return -ENOMEM;
567
568 ptr = (void *)eeprom_buff;
569
570 if (eeprom->offset & 1) {
571 /* need read/modify/write of first changed EEPROM word */
572 /* only the second byte of the word is being modified */
573 ret_val = e1000_read_nvm(hw, first_word, 1, &eeprom_buff[0]);
574 ptr++;
575 }
9e2d7657 576 if (((eeprom->offset + eeprom->len) & 1) && (!ret_val))
bc7f75fa
AK		 577 /* need read/modify/write of last changed EEPROM word */
578 /* only the first byte of the word is being modified */
579 ret_val = e1000_read_nvm(hw, last_word, 1,
580 &eeprom_buff[last_word - first_word]);
581
e243455d
BA		 582 if (ret_val)
583 goto out;
584
bc7f75fa
AK		 585 /* Device's eeprom is always little-endian, word addressable */
586 for (i = 0; i < last_word - first_word + 1; i++)
587 le16_to_cpus(&eeprom_buff[i]);
588
589 memcpy(ptr, bytes, eeprom->len);
590
591 for (i = 0; i < last_word - first_word + 1; i++)
e885d762 592 cpu_to_le16s(&eeprom_buff[i]);
bc7f75fa
AK		 593
594 ret_val = e1000_write_nvm(hw, first_word,
595 last_word - first_word + 1, eeprom_buff);
596
e243455d
BA		 597 if (ret_val)
598 goto out;
599
e921eb1a 600 /* Update the checksum over the first part of the EEPROM if needed
e243455d 601 * and flush shadow RAM for applicable controllers
ad68076e 602 */
e243455d 603 if ((first_word <= NVM_CHECKSUM_REG) ||
f89271dd
BA		 604 (hw->mac.type == e1000_82583) ||
605 (hw->mac.type == e1000_82574) ||
606 (hw->mac.type == e1000_82573))
e243455d 607 ret_val = e1000e_update_nvm_checksum(hw);
bc7f75fa 608
e243455d 609out:
bc7f75fa
AK		 610 kfree(eeprom_buff);
611 return ret_val;
612}
613
614static void e1000_get_drvinfo(struct net_device *netdev,
615 struct ethtool_drvinfo *drvinfo)
616{
617 struct e1000_adapter *adapter = netdev_priv(netdev);
bc7f75fa 618
612a94d6
RJ		 619 strlcpy(drvinfo->driver, e1000e_driver_name,
620 sizeof(drvinfo->driver));
33a5ba14 621 strlcpy(drvinfo->version, e1000e_driver_version,
612a94d6 622 sizeof(drvinfo->version));
bc7f75fa 623
e921eb1a 624 /* EEPROM image version # is reported as firmware version # for
ad68076e
BA		 625 * PCI-E controllers
626 */
612a94d6
RJ		 627 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
628 "%d.%d-%d",
84527590
BA		 629 (adapter->eeprom_vers & 0xF000) >> 12,
630 (adapter->eeprom_vers & 0x0FF0) >> 4,
631 (adapter->eeprom_vers & 0x000F));
bc7f75fa 632
612a94d6
RJ		 633 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
634 sizeof(drvinfo->bus_info));
bc7f75fa
AK		 635 drvinfo->regdump_len = e1000_get_regs_len(netdev);
636 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
637}
638
639static void e1000_get_ringparam(struct net_device *netdev,
640 struct ethtool_ringparam *ring)
641{
642 struct e1000_adapter *adapter = netdev_priv(netdev);
bc7f75fa
AK		 643
644 ring->rx_max_pending = E1000_MAX_RXD;
645 ring->tx_max_pending = E1000_MAX_TXD;
508da426
BA		 646 ring->rx_pending = adapter->rx_ring_count;
647 ring->tx_pending = adapter->tx_ring_count;
bc7f75fa
AK		 648}
649
650static int e1000_set_ringparam(struct net_device *netdev,
651 struct ethtool_ringparam *ring)
652{
653 struct e1000_adapter *adapter = netdev_priv(netdev);
508da426
BA		 654 struct e1000_ring *temp_tx = NULL, *temp_rx = NULL;
655 int err = 0, size = sizeof(struct e1000_ring);
656 bool set_tx = false, set_rx = false;
657 u16 new_rx_count, new_tx_count;
bc7f75fa
AK		 658
659 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
660 return -EINVAL;
661
508da426
BA		 662 new_rx_count = clamp_t(u32, ring->rx_pending, E1000_MIN_RXD,
663 E1000_MAX_RXD);
664 new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
bc7f75fa 665
508da426
BA		 666 new_tx_count = clamp_t(u32, ring->tx_pending, E1000_MIN_TXD,
667 E1000_MAX_TXD);
668 new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
bc7f75fa 669
508da426
BA		 670 if ((new_tx_count == adapter->tx_ring_count) &&
671 (new_rx_count == adapter->rx_ring_count))
672 /* nothing to do */
673 return 0;
bc7f75fa 674
508da426
BA		 675 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
676 usleep_range(1000, 2000);
bc7f75fa 677
508da426
BA		 678 if (!netif_running(adapter->netdev)) {
679 /* Set counts now and allocate resources during open() */
680 adapter->tx_ring->count = new_tx_count;
681 adapter->rx_ring->count = new_rx_count;
682 adapter->tx_ring_count = new_tx_count;
683 adapter->rx_ring_count = new_rx_count;
684 goto clear_reset;
685 }
bc7f75fa 686
508da426
BA		 687 set_tx = (new_tx_count != adapter->tx_ring_count);
688 set_rx = (new_rx_count != adapter->rx_ring_count);
bc7f75fa 689
508da426
BA		 690 /* Allocate temporary storage for ring updates */
691 if (set_tx) {
692 temp_tx = vmalloc(size);
693 if (!temp_tx) {
694 err = -ENOMEM;
695 goto free_temp;
696 }
697 }
698 if (set_rx) {
699 temp_rx = vmalloc(size);
700 if (!temp_rx) {
701 err = -ENOMEM;
702 goto free_temp;
703 }
704 }
bc7f75fa 705
508da426 706 e1000e_down(adapter);
bc7f75fa 707
e921eb1a 708 /* We can't just free everything and then setup again, because the
508da426
BA		 709 * ISRs in MSI-X mode get passed pointers to the Tx and Rx ring
710 * structs. First, attempt to allocate new resources...
711 */
712 if (set_tx) {
713 memcpy(temp_tx, adapter->tx_ring, size);
714 temp_tx->count = new_tx_count;
715 err = e1000e_setup_tx_resources(temp_tx);
bc7f75fa 716 if (err)
508da426
BA		 717 goto err_setup;
718 }
719 if (set_rx) {
720 memcpy(temp_rx, adapter->rx_ring, size);
721 temp_rx->count = new_rx_count;
722 err = e1000e_setup_rx_resources(temp_rx);
bc7f75fa 723 if (err)
508da426
BA		 724 goto err_setup_rx;
725 }
726
727 /* ...then free the old resources and copy back any new ring data */
728 if (set_tx) {
55aa6985 729 e1000e_free_tx_resources(adapter->tx_ring);
508da426
BA		 730 memcpy(adapter->tx_ring, temp_tx, size);
731 adapter->tx_ring_count = new_tx_count;
732 }
733 if (set_rx) {
734 e1000e_free_rx_resources(adapter->rx_ring);
735 memcpy(adapter->rx_ring, temp_rx, size);
736 adapter->rx_ring_count = new_rx_count;
bc7f75fa
AK		 737 }
738
bc7f75fa 739err_setup_rx:
508da426
BA		 740 if (err && set_tx)
741 e1000e_free_tx_resources(temp_tx);
bc7f75fa 742err_setup:
508da426
BA		 743 e1000e_up(adapter);
744free_temp:
745 vfree(temp_tx);
746 vfree(temp_rx);
747clear_reset:
bc7f75fa
AK		 748 clear_bit(__E1000_RESETTING, &adapter->state);
749 return err;
750}
751
cef8c793
BA		 752static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,
753 int reg, int offset, u32 mask, u32 write)
2a887191 754{
cef8c793 755 u32 pat, val;
6480641e
BA		 756 static const u32 test[] = {
757 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
cef8c793 758 for (pat = 0; pat < ARRAY_SIZE(test); pat++) {
2a887191 759 E1000_WRITE_REG_ARRAY(&adapter->hw, reg, offset,
cef8c793
BA		 760 (test[pat] & write));
761 val = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset);
762 if (val != (test[pat] & write & mask)) {
a8fc1891
BA		 763 e_err("pattern test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n",
764 reg + (offset << 2), val,
765 (test[pat] & write & mask));
2a887191 766 *data = reg;
cef8c793 767 return 1;
2a887191
JP		 768 }
769 }
cef8c793 770 return 0;
bc7f75fa
AK		 771}
772
2a887191
JP		 773static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,
774 int reg, u32 mask, u32 write)
775{
cef8c793 776 u32 val;
2a887191 777 __ew32(&adapter->hw, reg, write & mask);
cef8c793
BA		 778 val = __er32(&adapter->hw, reg);
779 if ((write & mask) != (val & mask)) {
a8fc1891 780 e_err("set/check test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n",
6ad65145 781 reg, (val & mask), (write & mask));
2a887191 782 *data = reg;
cef8c793 783 return 1;
2a887191 784 }
cef8c793 785 return 0;
bc7f75fa 786}
cef8c793
BA		 787#define REG_PATTERN_TEST_ARRAY(reg, offset, mask, write) \
788 do { \
789 if (reg_pattern_test(adapter, data, reg, offset, mask, write)) \
790 return 1; \
2a887191 791 } while (0)
cef8c793
BA		 792#define REG_PATTERN_TEST(reg, mask, write) \
793 REG_PATTERN_TEST_ARRAY(reg, 0, mask, write)
2a887191 794
cef8c793
BA		 795#define REG_SET_AND_CHECK(reg, mask, write) \
796 do { \
797 if (reg_set_and_check(adapter, data, reg, mask, write)) \
798 return 1; \
2a887191
JP		 799 } while (0)
800
bc7f75fa
AK		 801static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
802{
803 struct e1000_hw *hw = &adapter->hw;
804 struct e1000_mac_info *mac = &adapter->hw.mac;
bc7f75fa
AK		 805 u32 value;
806 u32 before;
807 u32 after;
808 u32 i;
809 u32 toggle;
a4f58f54 810 u32 mask;
2fbe4526 811 u32 wlock_mac = 0;
bc7f75fa 812
e921eb1a 813 /* The status register is Read Only, so a write should fail.
bc7f75fa
AK		 814 * Some bits that get toggled are ignored.
815 */
816 switch (mac->type) {
817 /* there are several bits on newer hardware that are r/w */
818 case e1000_82571:
819 case e1000_82572:
820 case e1000_80003es2lan:
821 toggle = 0x7FFFF3FF;
822 break;
a4f58f54 823 default:
bc7f75fa
AK		 824 toggle = 0x7FFFF033;
825 break;
bc7f75fa
AK		 826 }
827
828 before = er32(STATUS);
829 value = (er32(STATUS) & toggle);
830 ew32(STATUS, toggle);
831 after = er32(STATUS) & toggle;
832 if (value != after) {
6ad65145
BA		 833 e_err("failed STATUS register test got: 0x%08X expected: 0x%08X\n",
834 after, value);
bc7f75fa
AK		 835 *data = 1;
836 return 1;
837 }
838 /* restore previous status */
839 ew32(STATUS, before);
840
97ac8cae 841 if (!(adapter->flags & FLAG_IS_ICH)) {
bc7f75fa
AK		 842 REG_PATTERN_TEST(E1000_FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
843 REG_PATTERN_TEST(E1000_FCAH, 0x0000FFFF, 0xFFFFFFFF);
844 REG_PATTERN_TEST(E1000_FCT, 0x0000FFFF, 0xFFFFFFFF);
845 REG_PATTERN_TEST(E1000_VET, 0x0000FFFF, 0xFFFFFFFF);
846 }
847
848 REG_PATTERN_TEST(E1000_RDTR, 0x0000FFFF, 0xFFFFFFFF);
1e36052e
BA		 849 REG_PATTERN_TEST(E1000_RDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
850 REG_PATTERN_TEST(E1000_RDLEN(0), 0x000FFF80, 0x000FFFFF);
851 REG_PATTERN_TEST(E1000_RDH(0), 0x0000FFFF, 0x0000FFFF);
852 REG_PATTERN_TEST(E1000_RDT(0), 0x0000FFFF, 0x0000FFFF);
bc7f75fa
AK		 853 REG_PATTERN_TEST(E1000_FCRTH, 0x0000FFF8, 0x0000FFF8);
854 REG_PATTERN_TEST(E1000_FCTTV, 0x0000FFFF, 0x0000FFFF);
855 REG_PATTERN_TEST(E1000_TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
1e36052e
BA		 856 REG_PATTERN_TEST(E1000_TDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
857 REG_PATTERN_TEST(E1000_TDLEN(0), 0x000FFF80, 0x000FFFFF);
bc7f75fa
AK		 858
859 REG_SET_AND_CHECK(E1000_RCTL, 0xFFFFFFFF, 0x00000000);
860
97ac8cae 861 before = ((adapter->flags & FLAG_IS_ICH) ? 0x06C3B33E : 0x06DFB3FE);
bc7f75fa
AK		 862 REG_SET_AND_CHECK(E1000_RCTL, before, 0x003FFFFB);
863 REG_SET_AND_CHECK(E1000_TCTL, 0xFFFFFFFF, 0x00000000);
864
8658251d 865 REG_SET_AND_CHECK(E1000_RCTL, before, 0xFFFFFFFF);
1e36052e 866 REG_PATTERN_TEST(E1000_RDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
97ac8cae 867 if (!(adapter->flags & FLAG_IS_ICH))
8658251d 868 REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF);
1e36052e 869 REG_PATTERN_TEST(E1000_TDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
8658251d 870 REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF);
a4f58f54
BA		 871 mask = 0x8003FFFF;
872 switch (mac->type) {
873 case e1000_ich10lan:
874 case e1000_pchlan:
d3738bb8 875 case e1000_pch2lan:
2fbe4526 876 case e1000_pch_lpt:
a4f58f54
BA		 877 mask |= (1 << 18);
878 break;
879 default:
880 break;
881 }
2fbe4526
BA		 882
883 if (mac->type == e1000_pch_lpt)
884 wlock_mac = (er32(FWSM) & E1000_FWSM_WLOCK_MAC_MASK) >>
885 E1000_FWSM_WLOCK_MAC_SHIFT;
886
887 for (i = 0; i < mac->rar_entry_count; i++) {
a8fc1891
BA		 888 if (mac->type == e1000_pch_lpt) {
889 /* Cannot test write-protected SHRAL[n] registers */
890 if ((wlock_mac == 1) || (wlock_mac && (i > wlock_mac)))
891 continue;
892
893 /* SHRAH[9] different than the others */
894 if (i == 10)
895 mask |= (1 << 30);
896 else
897 mask &= ~(1 << 30);
898 }
2fbe4526 899
a8fc1891
BA		 900 REG_PATTERN_TEST_ARRAY(E1000_RA, ((i << 1) + 1), mask,
901 0xFFFFFFFF);
2fbe4526 902 }
bc7f75fa
AK		 903
904 for (i = 0; i < mac->mta_reg_count; i++)
905 REG_PATTERN_TEST_ARRAY(E1000_MTA, i, 0xFFFFFFFF, 0xFFFFFFFF);
906
907 *data = 0;
2fbe4526 908
bc7f75fa
AK		 909 return 0;
910}
911
912static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
913{
914 u16 temp;
915 u16 checksum = 0;
916 u16 i;
917
918 *data = 0;
919 /* Read and add up the contents of the EEPROM */
920 for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
921 if ((e1000_read_nvm(&adapter->hw, i, 1, &temp)) < 0) {
922 *data = 1;
e243455d 923 return *data;
bc7f75fa
AK		 924 }
925 checksum += temp;
926 }
927
928 /* If Checksum is not Correct return error else test passed */
929 if ((checksum != (u16) NVM_SUM) && !(*data))
930 *data = 2;
931
932 return *data;
933}
934
935static irqreturn_t e1000_test_intr(int irq, void *data)
936{
937 struct net_device *netdev = (struct net_device *) data;
938 struct e1000_adapter *adapter = netdev_priv(netdev);
939 struct e1000_hw *hw = &adapter->hw;
940
941 adapter->test_icr |= er32(ICR);
942
943 return IRQ_HANDLED;
944}
945
946static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
947{
948 struct net_device *netdev = adapter->netdev;
949 struct e1000_hw *hw = &adapter->hw;
950 u32 mask;
951 u32 shared_int = 1;
952 u32 irq = adapter->pdev->irq;
953 int i;
4662e82b
BA		 954 int ret_val = 0;
955 int int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 956
957 *data = 0;
958
4662e82b
BA		 959 /* NOTE: we don't test MSI/MSI-X interrupts here, yet */
960 if (adapter->int_mode == E1000E_INT_MODE_MSIX) {
961 int_mode = adapter->int_mode;
962 e1000e_reset_interrupt_capability(adapter);
963 adapter->int_mode = E1000E_INT_MODE_LEGACY;
964 e1000e_set_interrupt_capability(adapter);
965 }
bc7f75fa 966 /* Hook up test interrupt handler just for this test */
a0607fd3 967 if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
bc7f75fa
AK		 968 netdev)) {
969 shared_int = 0;
a0607fd3 970 } else if (request_irq(irq, e1000_test_intr, IRQF_SHARED,
bc7f75fa
AK		 971 netdev->name, netdev)) {
972 *data = 1;
4662e82b
BA		 973 ret_val = -1;
974 goto out;
bc7f75fa 975 }
44defeb3 976 e_info("testing %s interrupt\n", (shared_int ? "shared" : "unshared"));
bc7f75fa
AK		 977
978 /* Disable all the interrupts */
979 ew32(IMC, 0xFFFFFFFF);
945a5151 980 e1e_flush();
1bba4386 981 usleep_range(10000, 20000);
bc7f75fa
AK		 982
983 /* Test each interrupt */
984 for (i = 0; i < 10; i++) {
bc7f75fa
AK		 985 /* Interrupt to test */
986 mask = 1 << i;
987
f4187b56
BA		 988 if (adapter->flags & FLAG_IS_ICH) {
989 switch (mask) {
990 case E1000_ICR_RXSEQ:
991 continue;
992 case 0x00000100:
993 if (adapter->hw.mac.type == e1000_ich8lan ||
994 adapter->hw.mac.type == e1000_ich9lan)
995 continue;
996 break;
997 default:
998 break;
999 }
1000 }
1001
bc7f75fa 1002 if (!shared_int) {
e921eb1a 1003 /* Disable the interrupt to be reported in
bc7f75fa
AK		 1004 * the cause register and then force the same
1005 * interrupt and see if one gets posted. If
1006 * an interrupt was posted to the bus, the
1007 * test failed.
1008 */
1009 adapter->test_icr = 0;
1010 ew32(IMC, mask);
1011 ew32(ICS, mask);
945a5151 1012 e1e_flush();
1bba4386 1013 usleep_range(10000, 20000);
bc7f75fa
AK		 1014
1015 if (adapter->test_icr & mask) {
1016 *data = 3;
1017 break;
1018 }
1019 }
1020
e921eb1a 1021 /* Enable the interrupt to be reported in
bc7f75fa
AK		 1022 * the cause register and then force the same
1023 * interrupt and see if one gets posted. If
1024 * an interrupt was not posted to the bus, the
1025 * test failed.
1026 */
1027 adapter->test_icr = 0;
1028 ew32(IMS, mask);
1029 ew32(ICS, mask);
945a5151 1030 e1e_flush();
1bba4386 1031 usleep_range(10000, 20000);
bc7f75fa
AK		 1032
1033 if (!(adapter->test_icr & mask)) {
1034 *data = 4;
1035 break;
1036 }
1037
1038 if (!shared_int) {
e921eb1a 1039 /* Disable the other interrupts to be reported in
bc7f75fa
AK		 1040 * the cause register and then force the other
1041 * interrupts and see if any get posted. If
1042 * an interrupt was posted to the bus, the
1043 * test failed.
1044 */
1045 adapter->test_icr = 0;
1046 ew32(IMC, ~mask & 0x00007FFF);
1047 ew32(ICS, ~mask & 0x00007FFF);
945a5151 1048 e1e_flush();
1bba4386 1049 usleep_range(10000, 20000);
bc7f75fa
AK		 1050
1051 if (adapter->test_icr) {
1052 *data = 5;
1053 break;
1054 }
1055 }
1056 }
1057
1058 /* Disable all the interrupts */
1059 ew32(IMC, 0xFFFFFFFF);
945a5151 1060 e1e_flush();
1bba4386 1061 usleep_range(10000, 20000);
bc7f75fa
AK		 1062
1063 /* Unhook test interrupt handler */
1064 free_irq(irq, netdev);
1065
4662e82b
BA		 1066out:
1067 if (int_mode == E1000E_INT_MODE_MSIX) {
1068 e1000e_reset_interrupt_capability(adapter);
1069 adapter->int_mode = int_mode;
1070 e1000e_set_interrupt_capability(adapter);
1071 }
1072
1073 return ret_val;
bc7f75fa
AK		 1074}
1075
1076static void e1000_free_desc_rings(struct e1000_adapter *adapter)
1077{
1078 struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1079 struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1080 struct pci_dev *pdev = adapter->pdev;
1081 int i;
1082
1083 if (tx_ring->desc && tx_ring->buffer_info) {
1084 for (i = 0; i < tx_ring->count; i++) {
1085 if (tx_ring->buffer_info[i].dma)
0be3f55f 1086 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 1087 tx_ring->buffer_info[i].dma,
1088 tx_ring->buffer_info[i].length,
0be3f55f 1089 DMA_TO_DEVICE);
bc7f75fa
AK		 1090 if (tx_ring->buffer_info[i].skb)
1091 dev_kfree_skb(tx_ring->buffer_info[i].skb);
1092 }
1093 }
1094
1095 if (rx_ring->desc && rx_ring->buffer_info) {
1096 for (i = 0; i < rx_ring->count; i++) {
1097 if (rx_ring->buffer_info[i].dma)
0be3f55f 1098 dma_unmap_single(&pdev->dev,
bc7f75fa 1099 rx_ring->buffer_info[i].dma,
0be3f55f 1100 2048, DMA_FROM_DEVICE);
bc7f75fa
AK		 1101 if (rx_ring->buffer_info[i].skb)
1102 dev_kfree_skb(rx_ring->buffer_info[i].skb);
1103 }
1104 }
1105
1106 if (tx_ring->desc) {
1107 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1108 tx_ring->dma);
1109 tx_ring->desc = NULL;
1110 }
1111 if (rx_ring->desc) {
1112 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1113 rx_ring->dma);
1114 rx_ring->desc = NULL;
1115 }
1116
1117 kfree(tx_ring->buffer_info);
1118 tx_ring->buffer_info = NULL;
1119 kfree(rx_ring->buffer_info);
1120 rx_ring->buffer_info = NULL;
1121}
1122
1123static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
1124{
1125 struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1126 struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1127 struct pci_dev *pdev = adapter->pdev;
1128 struct e1000_hw *hw = &adapter->hw;
1129 u32 rctl;
bc7f75fa
AK		 1130 int i;
1131 int ret_val;
1132
1133 /* Setup Tx descriptor ring and Tx buffers */
1134
1135 if (!tx_ring->count)
1136 tx_ring->count = E1000_DEFAULT_TXD;
1137
cef8c793
BA		 1138 tx_ring->buffer_info = kcalloc(tx_ring->count,
1139 sizeof(struct e1000_buffer),
1140 GFP_KERNEL);
668018d7 1141 if (!tx_ring->buffer_info) {
bc7f75fa
AK		 1142 ret_val = 1;
1143 goto err_nomem;
1144 }
bc7f75fa
AK		 1145
1146 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1147 tx_ring->size = ALIGN(tx_ring->size, 4096);
1148 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
1149 &tx_ring->dma, GFP_KERNEL);
1150 if (!tx_ring->desc) {
1151 ret_val = 2;
1152 goto err_nomem;
1153 }
bc7f75fa
AK		 1154 tx_ring->next_to_use = 0;
1155 tx_ring->next_to_clean = 0;
1156
1e36052e
BA		 1157 ew32(TDBAL(0), ((u64) tx_ring->dma & 0x00000000FFFFFFFF));
1158 ew32(TDBAH(0), ((u64) tx_ring->dma >> 32));
1159 ew32(TDLEN(0), tx_ring->count * sizeof(struct e1000_tx_desc));
1160 ew32(TDH(0), 0);
1161 ew32(TDT(0), 0);
cef8c793
BA		 1162 ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | E1000_TCTL_MULR |
1163 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1164 E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT);
bc7f75fa
AK		 1165
1166 for (i = 0; i < tx_ring->count; i++) {
1167 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
1168 struct sk_buff *skb;
1169 unsigned int skb_size = 1024;
1170
1171 skb = alloc_skb(skb_size, GFP_KERNEL);
1172 if (!skb) {
1173 ret_val = 3;
1174 goto err_nomem;
1175 }
1176 skb_put(skb, skb_size);
1177 tx_ring->buffer_info[i].skb = skb;
1178 tx_ring->buffer_info[i].length = skb->len;
1179 tx_ring->buffer_info[i].dma =
0be3f55f
NN		 1180 dma_map_single(&pdev->dev, skb->data, skb->len,
1181 DMA_TO_DEVICE);
1182 if (dma_mapping_error(&pdev->dev,
1183 tx_ring->buffer_info[i].dma)) {
bc7f75fa
AK		 1184 ret_val = 4;
1185 goto err_nomem;
1186 }
cef8c793 1187 tx_desc->buffer_addr = cpu_to_le64(tx_ring->buffer_info[i].dma);
bc7f75fa
AK		 1188 tx_desc->lower.data = cpu_to_le32(skb->len);
1189 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1190 E1000_TXD_CMD_IFCS |
cef8c793 1191 E1000_TXD_CMD_RS);
bc7f75fa
AK		 1192 tx_desc->upper.data = 0;
1193 }
1194
1195 /* Setup Rx descriptor ring and Rx buffers */
1196
1197 if (!rx_ring->count)
1198 rx_ring->count = E1000_DEFAULT_RXD;
1199
cef8c793
BA		 1200 rx_ring->buffer_info = kcalloc(rx_ring->count,
1201 sizeof(struct e1000_buffer),
1202 GFP_KERNEL);
668018d7 1203 if (!rx_ring->buffer_info) {
bc7f75fa
AK		 1204 ret_val = 5;
1205 goto err_nomem;
1206 }
bc7f75fa 1207
5f450212 1208 rx_ring->size = rx_ring->count * sizeof(union e1000_rx_desc_extended);
bc7f75fa
AK		 1209 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
1210 &rx_ring->dma, GFP_KERNEL);
1211 if (!rx_ring->desc) {
1212 ret_val = 6;
1213 goto err_nomem;
1214 }
bc7f75fa
AK		 1215 rx_ring->next_to_use = 0;
1216 rx_ring->next_to_clean = 0;
1217
1218 rctl = er32(RCTL);
7f99ae63
BA		 1219 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
1220 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1e36052e
BA		 1221 ew32(RDBAL(0), ((u64) rx_ring->dma & 0xFFFFFFFF));
1222 ew32(RDBAH(0), ((u64) rx_ring->dma >> 32));
1223 ew32(RDLEN(0), rx_ring->size);
1224 ew32(RDH(0), 0);
1225 ew32(RDT(0), 0);
bc7f75fa 1226 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
cef8c793
BA		 1227 E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_LPE |
1228 E1000_RCTL_SBP | E1000_RCTL_SECRC |
bc7f75fa
AK		 1229 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1230 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1231 ew32(RCTL, rctl);
1232
1233 for (i = 0; i < rx_ring->count; i++) {
5f450212 1234 union e1000_rx_desc_extended *rx_desc;
bc7f75fa
AK		 1235 struct sk_buff *skb;
1236
1237 skb = alloc_skb(2048 + NET_IP_ALIGN, GFP_KERNEL);
1238 if (!skb) {
1239 ret_val = 7;
1240 goto err_nomem;
1241 }
1242 skb_reserve(skb, NET_IP_ALIGN);
1243 rx_ring->buffer_info[i].skb = skb;
1244 rx_ring->buffer_info[i].dma =
0be3f55f
NN		 1245 dma_map_single(&pdev->dev, skb->data, 2048,
1246 DMA_FROM_DEVICE);
1247 if (dma_mapping_error(&pdev->dev,
1248 rx_ring->buffer_info[i].dma)) {
bc7f75fa
AK		 1249 ret_val = 8;
1250 goto err_nomem;
1251 }
5f450212
BA		 1252 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1253 rx_desc->read.buffer_addr =
1254 cpu_to_le64(rx_ring->buffer_info[i].dma);
bc7f75fa
AK		 1255 memset(skb->data, 0x00, skb->len);
1256 }
1257
1258 return 0;
1259
1260err_nomem:
1261 e1000_free_desc_rings(adapter);
1262 return ret_val;
1263}
1264
1265static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1266{
1267 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1268 e1e_wphy(&adapter->hw, 29, 0x001F);
1269 e1e_wphy(&adapter->hw, 30, 0x8FFC);
1270 e1e_wphy(&adapter->hw, 29, 0x001A);
1271 e1e_wphy(&adapter->hw, 30, 0x8FF0);
1272}
1273
1274static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1275{
1276 struct e1000_hw *hw = &adapter->hw;
1277 u32 ctrl_reg = 0;
97ac8cae 1278 u16 phy_reg = 0;
cbd006cb 1279 s32 ret_val = 0;
bc7f75fa 1280
318a94d6 1281 hw->mac.autoneg = 0;
bc7f75fa 1282
3af50481 1283 if (hw->phy.type == e1000_phy_ife) {
bc7f75fa
AK		 1284 /* force 100, set loopback */
1285 e1e_wphy(hw, PHY_CONTROL, 0x6100);
1286
1287 /* Now set up the MAC to the same speed/duplex as the PHY. */
3af50481 1288 ctrl_reg = er32(CTRL);
bc7f75fa
AK		 1289 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1290 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1291 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1292 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1293 E1000_CTRL_FD); /* Force Duplex to FULL */
3af50481
BA		 1294
1295 ew32(CTRL, ctrl_reg);
945a5151 1296 e1e_flush();
3af50481
BA		 1297 udelay(500);
1298
1299 return 0;
1300 }
1301
1302 /* Specific PHY configuration for loopback */
1303 switch (hw->phy.type) {
1304 case e1000_phy_m88:
1305 /* Auto-MDI/MDIX Off */
1306 e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1307 /* reset to update Auto-MDI/MDIX */
1308 e1e_wphy(hw, PHY_CONTROL, 0x9140);
1309 /* autoneg off */
1310 e1e_wphy(hw, PHY_CONTROL, 0x8140);
1311 break;
1312 case e1000_phy_gg82563:
1313 e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x1CC);
cef8c793 1314 break;
97ac8cae
BA		 1315 case e1000_phy_bm:
1316 /* Set Default MAC Interface speed to 1GB */
1317 e1e_rphy(hw, PHY_REG(2, 21), &phy_reg);
1318 phy_reg &= ~0x0007;
1319 phy_reg |= 0x006;
1320 e1e_wphy(hw, PHY_REG(2, 21), phy_reg);
1321 /* Assert SW reset for above settings to take effect */
1322 e1000e_commit_phy(hw);
1323 mdelay(1);
1324 /* Force Full Duplex */
1325 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1326 e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x000C);
1327 /* Set Link Up (in force link) */
1328 e1e_rphy(hw, PHY_REG(776, 16), &phy_reg);
1329 e1e_wphy(hw, PHY_REG(776, 16), phy_reg | 0x0040);
1330 /* Force Link */
1331 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1332 e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x0040);
1333 /* Set Early Link Enable */
1334 e1e_rphy(hw, PHY_REG(769, 20), &phy_reg);
1335 e1e_wphy(hw, PHY_REG(769, 20), phy_reg | 0x0400);
3af50481
BA		 1336 break;
1337 case e1000_phy_82577:
1338 case e1000_phy_82578:
1339 /* Workaround: K1 must be disabled for stable 1Gbps operation */
cbd006cb
BA		 1340 ret_val = hw->phy.ops.acquire(hw);
1341 if (ret_val) {
1342 e_err("Cannot setup 1Gbps loopback.\n");
1343 return ret_val;
1344 }
3af50481 1345 e1000_configure_k1_ich8lan(hw, false);
cbd006cb 1346 hw->phy.ops.release(hw);
3af50481 1347 break;
d3738bb8
BA		 1348 case e1000_phy_82579:
1349 /* Disable PHY energy detect power down */
1350 e1e_rphy(hw, PHY_REG(0, 21), &phy_reg);
1351 e1e_wphy(hw, PHY_REG(0, 21), phy_reg & ~(1 << 3));
1352 /* Disable full chip energy detect */
1353 e1e_rphy(hw, PHY_REG(776, 18), &phy_reg);
1354 e1e_wphy(hw, PHY_REG(776, 18), phy_reg | 1);
1355 /* Enable loopback on the PHY */
1356#define I82577_PHY_LBK_CTRL 19
1357 e1e_wphy(hw, I82577_PHY_LBK_CTRL, 0x8001);
1358 break;
cef8c793 1359 default:
3af50481
BA		 1360 break;
1361 }
bc7f75fa 1362
3af50481
BA		 1363 /* force 1000, set loopback */
1364 e1e_wphy(hw, PHY_CONTROL, 0x4140);
1365 mdelay(250);
cef8c793 1366
3af50481
BA		 1367 /* Now set up the MAC to the same speed/duplex as the PHY. */
1368 ctrl_reg = er32(CTRL);
1369 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1370 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1371 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1372 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1373 E1000_CTRL_FD); /* Force Duplex to FULL */
1374
1375 if (adapter->flags & FLAG_IS_ICH)
1376 ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */
bc7f75fa 1377
318a94d6
JK		 1378 if (hw->phy.media_type == e1000_media_type_copper &&
1379 hw->phy.type == e1000_phy_m88) {
bc7f75fa
AK		 1380 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1381 } else {
e921eb1a 1382 /* Set the ILOS bit on the fiber Nic if half duplex link is
ad68076e
BA		 1383 * detected.
1384 */
90da0669 1385 if ((er32(STATUS) & E1000_STATUS_FD) == 0)
bc7f75fa
AK		 1386 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1387 }
1388
1389 ew32(CTRL, ctrl_reg);
1390
e921eb1a 1391 /* Disable the receiver on the PHY so when a cable is plugged in, the
bc7f75fa
AK		 1392 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1393 */
318a94d6 1394 if (hw->phy.type == e1000_phy_m88)
bc7f75fa
AK		 1395 e1000_phy_disable_receiver(adapter);
1396
1397 udelay(500);
1398
1399 return 0;
1400}
1401
1402static int e1000_set_82571_fiber_loopback(struct e1000_adapter *adapter)
1403{
1404 struct e1000_hw *hw = &adapter->hw;
1405 u32 ctrl = er32(CTRL);
1406 int link = 0;
1407
1408 /* special requirements for 82571/82572 fiber adapters */
1409
e921eb1a 1410 /* jump through hoops to make sure link is up because serdes
ad68076e
BA		 1411 * link is hardwired up
1412 */
bc7f75fa
AK		 1413 ctrl |= E1000_CTRL_SLU;
1414 ew32(CTRL, ctrl);
1415
1416 /* disable autoneg */
1417 ctrl = er32(TXCW);
1418 ctrl &= ~(1 << 31);
1419 ew32(TXCW, ctrl);
1420
1421 link = (er32(STATUS) & E1000_STATUS_LU);
1422
1423 if (!link) {
1424 /* set invert loss of signal */
1425 ctrl = er32(CTRL);
1426 ctrl |= E1000_CTRL_ILOS;
1427 ew32(CTRL, ctrl);
1428 }
1429
e921eb1a 1430 /* special write to serdes control register to enable SerDes analog
ad68076e
BA		 1431 * loopback
1432 */
bc7f75fa
AK		 1433#define E1000_SERDES_LB_ON 0x410
1434 ew32(SCTL, E1000_SERDES_LB_ON);
945a5151 1435 e1e_flush();
1bba4386 1436 usleep_range(10000, 20000);
bc7f75fa
AK		 1437
1438 return 0;
1439}
1440
1441/* only call this for fiber/serdes connections to es2lan */
1442static int e1000_set_es2lan_mac_loopback(struct e1000_adapter *adapter)
1443{
1444 struct e1000_hw *hw = &adapter->hw;
1445 u32 ctrlext = er32(CTRL_EXT);
1446 u32 ctrl = er32(CTRL);
1447
e921eb1a 1448 /* save CTRL_EXT to restore later, reuse an empty variable (unused
ad68076e
BA		 1449 * on mac_type 80003es2lan)
1450 */
bc7f75fa
AK		 1451 adapter->tx_fifo_head = ctrlext;
1452
1453 /* clear the serdes mode bits, putting the device into mac loopback */
1454 ctrlext &= ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1455 ew32(CTRL_EXT, ctrlext);
1456
1457 /* force speed to 1000/FD, link up */
1458 ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100);
1459 ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX |
1460 E1000_CTRL_SPD_1000 | E1000_CTRL_FD);
1461 ew32(CTRL, ctrl);
1462
1463 /* set mac loopback */
1464 ctrl = er32(RCTL);
1465 ctrl |= E1000_RCTL_LBM_MAC;
1466 ew32(RCTL, ctrl);
1467
1468 /* set testing mode parameters (no need to reset later) */
1469#define KMRNCTRLSTA_OPMODE (0x1F << 16)
1470#define KMRNCTRLSTA_OPMODE_1GB_FD_GMII 0x0582
1471 ew32(KMRNCTRLSTA,
cef8c793 1472 (KMRNCTRLSTA_OPMODE | KMRNCTRLSTA_OPMODE_1GB_FD_GMII));
bc7f75fa
AK		 1473
1474 return 0;
1475}
1476
1477static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
1478{
1479 struct e1000_hw *hw = &adapter->hw;
1480 u32 rctl;
1481
318a94d6
JK		 1482 if (hw->phy.media_type == e1000_media_type_fiber ||
1483 hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa
AK		 1484 switch (hw->mac.type) {
1485 case e1000_80003es2lan:
1486 return e1000_set_es2lan_mac_loopback(adapter);
1487 break;
1488 case e1000_82571:
1489 case e1000_82572:
1490 return e1000_set_82571_fiber_loopback(adapter);
1491 break;
1492 default:
1493 rctl = er32(RCTL);
1494 rctl |= E1000_RCTL_LBM_TCVR;
1495 ew32(RCTL, rctl);
1496 return 0;
1497 }
318a94d6 1498 } else if (hw->phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 1499 return e1000_integrated_phy_loopback(adapter);
1500 }
1501
1502 return 7;
1503}
1504
1505static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
1506{
1507 struct e1000_hw *hw = &adapter->hw;
1508 u32 rctl;
1509 u16 phy_reg;
1510
1511 rctl = er32(RCTL);
1512 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1513 ew32(RCTL, rctl);
1514
1515 switch (hw->mac.type) {
1516 case e1000_80003es2lan:
318a94d6
JK		 1517 if (hw->phy.media_type == e1000_media_type_fiber ||
1518 hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa 1519 /* restore CTRL_EXT, stealing space from tx_fifo_head */
ad68076e 1520 ew32(CTRL_EXT, adapter->tx_fifo_head);
bc7f75fa
AK		 1521 adapter->tx_fifo_head = 0;
1522 }
1523 /* fall through */
1524 case e1000_82571:
1525 case e1000_82572:
318a94d6
JK		 1526 if (hw->phy.media_type == e1000_media_type_fiber ||
1527 hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa
AK		 1528#define E1000_SERDES_LB_OFF 0x400
1529 ew32(SCTL, E1000_SERDES_LB_OFF);
945a5151 1530 e1e_flush();
1bba4386 1531 usleep_range(10000, 20000);
bc7f75fa
AK		 1532 break;
1533 }
1534 /* Fall Through */
1535 default:
1536 hw->mac.autoneg = 1;
1537 if (hw->phy.type == e1000_phy_gg82563)
1538 e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x180);
1539 e1e_rphy(hw, PHY_CONTROL, &phy_reg);
1540 if (phy_reg & MII_CR_LOOPBACK) {
1541 phy_reg &= ~MII_CR_LOOPBACK;
1542 e1e_wphy(hw, PHY_CONTROL, phy_reg);
1543 e1000e_commit_phy(hw);
1544 }
1545 break;
1546 }
1547}
1548
1549static void e1000_create_lbtest_frame(struct sk_buff *skb,
1550 unsigned int frame_size)
1551{
1552 memset(skb->data, 0xFF, frame_size);
1553 frame_size &= ~1;
1554 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1555 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1556 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1557}
1558
1559static int e1000_check_lbtest_frame(struct sk_buff *skb,
1560 unsigned int frame_size)
1561{
1562 frame_size &= ~1;
1563 if (*(skb->data + 3) == 0xFF)
1564 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1565 (*(skb->data + frame_size / 2 + 12) == 0xAF))
1566 return 0;
1567 return 13;
1568}
1569
1570static int e1000_run_loopback_test(struct e1000_adapter *adapter)
1571{
1572 struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1573 struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1574 struct pci_dev *pdev = adapter->pdev;
1575 struct e1000_hw *hw = &adapter->hw;
1576 int i, j, k, l;
1577 int lc;
1578 int good_cnt;
1579 int ret_val = 0;
1580 unsigned long time;
1581
1e36052e 1582 ew32(RDT(0), rx_ring->count - 1);
bc7f75fa 1583
e921eb1a 1584 /* Calculate the loop count based on the largest descriptor ring
bc7f75fa
AK		 1585 * The idea is to wrap the largest ring a number of times using 64
1586 * send/receive pairs during each loop
1587 */
1588
1589 if (rx_ring->count <= tx_ring->count)
1590 lc = ((tx_ring->count / 64) * 2) + 1;
1591 else
1592 lc = ((rx_ring->count / 64) * 2) + 1;
1593
1594 k = 0;
1595 l = 0;
1596 for (j = 0; j <= lc; j++) { /* loop count loop */
1597 for (i = 0; i < 64; i++) { /* send the packets */
cef8c793
BA		 1598 e1000_create_lbtest_frame(tx_ring->buffer_info[k].skb,
1599 1024);
0be3f55f 1600 dma_sync_single_for_device(&pdev->dev,
bc7f75fa
AK		 1601 tx_ring->buffer_info[k].dma,
1602 tx_ring->buffer_info[k].length,
0be3f55f 1603 DMA_TO_DEVICE);
bc7f75fa
AK		 1604 k++;
1605 if (k == tx_ring->count)
1606 k = 0;
1607 }
1e36052e 1608 ew32(TDT(0), k);
945a5151 1609 e1e_flush();
bc7f75fa
AK		 1610 msleep(200);
1611 time = jiffies; /* set the start time for the receive */
1612 good_cnt = 0;
1613 do { /* receive the sent packets */
0be3f55f 1614 dma_sync_single_for_cpu(&pdev->dev,
bc7f75fa 1615 rx_ring->buffer_info[l].dma, 2048,
0be3f55f 1616 DMA_FROM_DEVICE);
bc7f75fa
AK		 1617
1618 ret_val = e1000_check_lbtest_frame(
1619 rx_ring->buffer_info[l].skb, 1024);
1620 if (!ret_val)
1621 good_cnt++;
1622 l++;
1623 if (l == rx_ring->count)
1624 l = 0;
e921eb1a 1625 /* time + 20 msecs (200 msecs on 2.4) is more than
bc7f75fa
AK		 1626 * enough time to complete the receives, if it's
1627 * exceeded, break and error off
1628 */
1629 } while ((good_cnt < 64) && !time_after(jiffies, time + 20));
1630 if (good_cnt != 64) {
1631 ret_val = 13; /* ret_val is the same as mis-compare */
1632 break;
1633 }
cef8c793 1634 if (jiffies >= (time + 20)) {
bc7f75fa
AK		 1635 ret_val = 14; /* error code for time out error */
1636 break;
1637 }
1638 } /* end loop count loop */
1639 return ret_val;
1640}
1641
1642static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
1643{
44abd5c1
BA		 1644 struct e1000_hw *hw = &adapter->hw;
1645
e921eb1a 1646 /* PHY loopback cannot be performed if SoL/IDER sessions are active */
470a5420
BA		 1647 if (hw->phy.ops.check_reset_block &&
1648 hw->phy.ops.check_reset_block(hw)) {
44defeb3 1649 e_err("Cannot do PHY loopback test when SoL/IDER is active.\n");
bc7f75fa
AK		 1650 *data = 0;
1651 goto out;
1652 }
1653
1654 *data = e1000_setup_desc_rings(adapter);
e265522c 1655 if (*data)
bc7f75fa
AK		 1656 goto out;
1657
1658 *data = e1000_setup_loopback_test(adapter);
e265522c 1659 if (*data)
bc7f75fa
AK		 1660 goto err_loopback;
1661
1662 *data = e1000_run_loopback_test(adapter);
1663 e1000_loopback_cleanup(adapter);
1664
1665err_loopback:
1666 e1000_free_desc_rings(adapter);
1667out:
1668 return *data;
1669}
1670
1671static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
1672{
1673 struct e1000_hw *hw = &adapter->hw;
1674
1675 *data = 0;
318a94d6 1676 if (hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa 1677 int i = 0;
612e244c 1678 hw->mac.serdes_has_link = false;
bc7f75fa 1679
e921eb1a 1680 /* On some blade server designs, link establishment
ad68076e
BA		 1681 * could take as long as 2-3 minutes
1682 */
bc7f75fa
AK		 1683 do {
1684 hw->mac.ops.check_for_link(hw);
1685 if (hw->mac.serdes_has_link)
1686 return *data;
1687 msleep(20);
1688 } while (i++ < 3750);
1689
1690 *data = 1;
1691 } else {
1692 hw->mac.ops.check_for_link(hw);
1693 if (hw->mac.autoneg)
e921eb1a 1694 /* On some Phy/switch combinations, link establishment
5661aeb0
BA		 1695 * can take a few seconds more than expected.
1696 */
1697 msleep(5000);
bc7f75fa 1698
5661aeb0 1699 if (!(er32(STATUS) & E1000_STATUS_LU))
bc7f75fa
AK		 1700 *data = 1;
1701 }
1702 return *data;
1703}
1704
b9f2c044 1705static int e1000e_get_sset_count(struct net_device *netdev, int sset)
bc7f75fa 1706{
b9f2c044
JG		 1707 switch (sset) {
1708 case ETH_SS_TEST:
1709 return E1000_TEST_LEN;
1710 case ETH_SS_STATS:
1711 return E1000_STATS_LEN;
1712 default:
1713 return -EOPNOTSUPP;
1714 }
bc7f75fa
AK		 1715}
1716
1717static void e1000_diag_test(struct net_device *netdev,
1718 struct ethtool_test *eth_test, u64 *data)
1719{
1720 struct e1000_adapter *adapter = netdev_priv(netdev);
1721 u16 autoneg_advertised;
1722 u8 forced_speed_duplex;
1723 u8 autoneg;
1724 bool if_running = netif_running(netdev);
1725
1726 set_bit(__E1000_TESTING, &adapter->state);
31dbe5b4
BA		 1727
1728 if (!if_running) {
1729 /* Get control of and reset hardware */
1730 if (adapter->flags & FLAG_HAS_AMT)
1731 e1000e_get_hw_control(adapter);
1732
1733 e1000e_power_up_phy(adapter);
1734
1735 adapter->hw.phy.autoneg_wait_to_complete = 1;
1736 e1000e_reset(adapter);
1737 adapter->hw.phy.autoneg_wait_to_complete = 0;
1738 }
1739
bc7f75fa
AK		 1740 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1741 /* Offline tests */
1742
1743 /* save speed, duplex, autoneg settings */
1744 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1745 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1746 autoneg = adapter->hw.mac.autoneg;
1747
44defeb3 1748 e_info("offline testing starting\n");
bc7f75fa 1749
bc7f75fa
AK		 1750 if (if_running)
1751 /* indicate we're in test mode */
1752 dev_close(netdev);
bc7f75fa
AK		 1753
1754 if (e1000_reg_test(adapter, &data[0]))
1755 eth_test->flags |= ETH_TEST_FL_FAILED;
1756
1757 e1000e_reset(adapter);
1758 if (e1000_eeprom_test(adapter, &data[1]))
1759 eth_test->flags |= ETH_TEST_FL_FAILED;
1760
1761 e1000e_reset(adapter);
1762 if (e1000_intr_test(adapter, &data[2]))
1763 eth_test->flags |= ETH_TEST_FL_FAILED;
1764
1765 e1000e_reset(adapter);
bc7f75fa
AK		 1766 if (e1000_loopback_test(adapter, &data[3]))
1767 eth_test->flags |= ETH_TEST_FL_FAILED;
1768
c6ce3854
CW		 1769 /* force this routine to wait until autoneg complete/timeout */
1770 adapter->hw.phy.autoneg_wait_to_complete = 1;
1771 e1000e_reset(adapter);
1772 adapter->hw.phy.autoneg_wait_to_complete = 0;
1773
1774 if (e1000_link_test(adapter, &data[4]))
1775 eth_test->flags |= ETH_TEST_FL_FAILED;
1776
bc7f75fa
AK		 1777 /* restore speed, duplex, autoneg settings */
1778 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1779 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1780 adapter->hw.mac.autoneg = autoneg;
bc7f75fa 1781 e1000e_reset(adapter);
bc7f75fa
AK		 1782
1783 clear_bit(__E1000_TESTING, &adapter->state);
1784 if (if_running)
1785 dev_open(netdev);
1786 } else {
31dbe5b4 1787 /* Online tests */
11b08be8 1788
44defeb3 1789 e_info("online testing starting\n");
bc7f75fa 1790
31dbe5b4 1791 /* register, eeprom, intr and loopback tests not run online */
bc7f75fa
AK		 1792 data[0] = 0;
1793 data[1] = 0;
1794 data[2] = 0;
1795 data[3] = 0;
1796
31dbe5b4
BA		 1797 if (e1000_link_test(adapter, &data[4]))
1798 eth_test->flags |= ETH_TEST_FL_FAILED;
11b08be8 1799
bc7f75fa
AK		 1800 clear_bit(__E1000_TESTING, &adapter->state);
1801 }
31dbe5b4
BA		 1802
1803 if (!if_running) {
1804 e1000e_reset(adapter);
1805
1806 if (adapter->flags & FLAG_HAS_AMT)
1807 e1000e_release_hw_control(adapter);
1808 }
1809
bc7f75fa
AK		 1810 msleep_interruptible(4 * 1000);
1811}
1812
1813static void e1000_get_wol(struct net_device *netdev,
1814 struct ethtool_wolinfo *wol)
1815{
1816 struct e1000_adapter *adapter = netdev_priv(netdev);
1817
1818 wol->supported = 0;
1819 wol->wolopts = 0;
1820
6ff68026
RW		 1821 if (!(adapter->flags & FLAG_HAS_WOL) ||
1822 !device_can_wakeup(&adapter->pdev->dev))
bc7f75fa
AK		 1823 return;
1824
1825 wol->supported = WAKE_UCAST | WAKE_MCAST |
4a29e155 1826 WAKE_BCAST | WAKE_MAGIC | WAKE_PHY;
bc7f75fa
AK		 1827
1828 /* apply any specific unsupported masks here */
1829 if (adapter->flags & FLAG_NO_WAKE_UCAST) {
1830 wol->supported &= ~WAKE_UCAST;
1831
1832 if (adapter->wol & E1000_WUFC_EX)
6ad65145 1833 e_err("Interface does not support directed (unicast) frame wake-up packets\n");
bc7f75fa
AK		 1834 }
1835
1836 if (adapter->wol & E1000_WUFC_EX)
1837 wol->wolopts |= WAKE_UCAST;
1838 if (adapter->wol & E1000_WUFC_MC)
1839 wol->wolopts |= WAKE_MCAST;
1840 if (adapter->wol & E1000_WUFC_BC)
1841 wol->wolopts |= WAKE_BCAST;
1842 if (adapter->wol & E1000_WUFC_MAG)
1843 wol->wolopts |= WAKE_MAGIC;
efb90e43
MW		 1844 if (adapter->wol & E1000_WUFC_LNKC)
1845 wol->wolopts |= WAKE_PHY;
bc7f75fa
AK		 1846}
1847
4a29e155 1848static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
bc7f75fa
AK		 1849{
1850 struct e1000_adapter *adapter = netdev_priv(netdev);
1851
6ff68026 1852 if (!(adapter->flags & FLAG_HAS_WOL) ||
1fbfca32
BA		 1853 !device_can_wakeup(&adapter->pdev->dev) ||
1854 (wol->wolopts & ~(WAKE_UCAST | WAKE_MCAST | WAKE_BCAST |
4a29e155 1855 WAKE_MAGIC | WAKE_PHY)))
1fbfca32 1856 return -EOPNOTSUPP;
bc7f75fa
AK		 1857
1858 /* these settings will always override what we currently have */
1859 adapter->wol = 0;
1860
1861 if (wol->wolopts & WAKE_UCAST)
1862 adapter->wol |= E1000_WUFC_EX;
1863 if (wol->wolopts & WAKE_MCAST)
1864 adapter->wol |= E1000_WUFC_MC;
1865 if (wol->wolopts & WAKE_BCAST)
1866 adapter->wol |= E1000_WUFC_BC;
1867 if (wol->wolopts & WAKE_MAGIC)
1868 adapter->wol |= E1000_WUFC_MAG;
efb90e43
MW		 1869 if (wol->wolopts & WAKE_PHY)
1870 adapter->wol |= E1000_WUFC_LNKC;
bc7f75fa 1871
6ff68026
RW		 1872 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1873
bc7f75fa
AK		 1874 return 0;
1875}
1876
dbf80dcb
BA		 1877static int e1000_set_phys_id(struct net_device *netdev,
1878 enum ethtool_phys_id_state state)
bc7f75fa
AK		 1879{
1880 struct e1000_adapter *adapter = netdev_priv(netdev);
4662e82b 1881 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1882
dbf80dcb
BA		 1883 switch (state) {
1884 case ETHTOOL_ID_ACTIVE:
1885 if (!hw->mac.ops.blink_led)
1886 return 2; /* cycle on/off twice per second */
bc7f75fa 1887
dbf80dcb
BA		 1888 hw->mac.ops.blink_led(hw);
1889 break;
1890
1891 case ETHTOOL_ID_INACTIVE:
4662e82b
BA		 1892 if (hw->phy.type == e1000_phy_ife)
1893 e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, 0);
dbf80dcb
BA		 1894 hw->mac.ops.led_off(hw);
1895 hw->mac.ops.cleanup_led(hw);
1896 break;
bc7f75fa 1897
dbf80dcb 1898 case ETHTOOL_ID_ON:
f23efdff 1899 hw->mac.ops.led_on(hw);
dbf80dcb 1900 break;
bc7f75fa 1901
dbf80dcb 1902 case ETHTOOL_ID_OFF:
f23efdff 1903 hw->mac.ops.led_off(hw);
dbf80dcb
BA		 1904 break;
1905 }
bc7f75fa
AK		 1906 return 0;
1907}
1908
de5b3077
AK		 1909static int e1000_get_coalesce(struct net_device *netdev,
1910 struct ethtool_coalesce *ec)
1911{
1912 struct e1000_adapter *adapter = netdev_priv(netdev);
1913
eab2abf5 1914 if (adapter->itr_setting <= 4)
de5b3077
AK		 1915 ec->rx_coalesce_usecs = adapter->itr_setting;
1916 else
1917 ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
1918
1919 return 0;
1920}
1921
1922static int e1000_set_coalesce(struct net_device *netdev,
1923 struct ethtool_coalesce *ec)
1924{
1925 struct e1000_adapter *adapter = netdev_priv(netdev);
de5b3077
AK		 1926
1927 if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
eab2abf5 1928 ((ec->rx_coalesce_usecs > 4) &&
de5b3077
AK		 1929 (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
1930 (ec->rx_coalesce_usecs == 2))
1931 return -EINVAL;
1932
eab2abf5 1933 if (ec->rx_coalesce_usecs == 4) {
06a402ef
BA		 1934 adapter->itr_setting = 4;
1935 adapter->itr = adapter->itr_setting;
eab2abf5 1936 } else if (ec->rx_coalesce_usecs <= 3) {
de5b3077
AK		 1937 adapter->itr = 20000;
1938 adapter->itr_setting = ec->rx_coalesce_usecs;
1939 } else {
1940 adapter->itr = (1000000 / ec->rx_coalesce_usecs);
1941 adapter->itr_setting = adapter->itr & ~3;
1942 }
1943
1944 if (adapter->itr_setting != 0)
22a4cca2 1945 e1000e_write_itr(adapter, adapter->itr);
de5b3077 1946 else
22a4cca2 1947 e1000e_write_itr(adapter, 0);
de5b3077
AK		 1948
1949 return 0;
1950}
1951
bc7f75fa
AK		 1952static int e1000_nway_reset(struct net_device *netdev)
1953{
1954 struct e1000_adapter *adapter = netdev_priv(netdev);
5962bc21
BA		 1955
1956 if (!netif_running(netdev))
1957 return -EAGAIN;
1958
1959 if (!adapter->hw.mac.autoneg)
1960 return -EINVAL;
1961
1962 e1000e_reinit_locked(adapter);
1963
bc7f75fa
AK		 1964 return 0;
1965}
1966
bc7f75fa
AK		 1967static void e1000_get_ethtool_stats(struct net_device *netdev,
1968 struct ethtool_stats *stats,
1969 u64 *data)
1970{
1971 struct e1000_adapter *adapter = netdev_priv(netdev);
67fd4fcb 1972 struct rtnl_link_stats64 net_stats;
bc7f75fa 1973 int i;
e0f36a95 1974 char *p = NULL;
bc7f75fa 1975
67fd4fcb 1976 e1000e_get_stats64(netdev, &net_stats);
bc7f75fa 1977 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
e0f36a95
AK		 1978 switch (e1000_gstrings_stats[i].type) {
1979 case NETDEV_STATS:
67fd4fcb 1980 p = (char *) &net_stats +
e0f36a95
AK		 1981 e1000_gstrings_stats[i].stat_offset;
1982 break;
1983 case E1000_STATS:
1984 p = (char *) adapter +
1985 e1000_gstrings_stats[i].stat_offset;
1986 break;
61c75816
BA		 1987 default:
1988 data[i] = 0;
1989 continue;
e0f36a95
AK		 1990 }
1991
bc7f75fa
AK		 1992 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1993 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1994 }
1995}
1996
1997static void e1000_get_strings(struct net_device *netdev, u32 stringset,
1998 u8 *data)
1999{
2000 u8 *p = data;
2001 int i;
2002
2003 switch (stringset) {
2004 case ETH_SS_TEST:
5c1bda0a 2005 memcpy(data, e1000_gstrings_test, sizeof(e1000_gstrings_test));
bc7f75fa
AK		 2006 break;
2007 case ETH_SS_STATS:
2008 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
2009 memcpy(p, e1000_gstrings_stats[i].stat_string,
2010 ETH_GSTRING_LEN);
2011 p += ETH_GSTRING_LEN;
2012 }
2013 break;
2014 }
2015}
2016
70495a50
BA		 2017static int e1000_get_rxnfc(struct net_device *netdev,
2018 struct ethtool_rxnfc *info, u32 *rule_locs)
2019{
2020 info->data = 0;
2021
2022 switch (info->cmd) {
2023 case ETHTOOL_GRXFH: {
2024 struct e1000_adapter *adapter = netdev_priv(netdev);
2025 struct e1000_hw *hw = &adapter->hw;
2026 u32 mrqc = er32(MRQC);
2027
2028 if (!(mrqc & E1000_MRQC_RSS_FIELD_MASK))
2029 return 0;
2030
2031 switch (info->flow_type) {
2032 case TCP_V4_FLOW:
2033 if (mrqc & E1000_MRQC_RSS_FIELD_IPV4_TCP)
2034 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2035 /* fall through */
2036 case UDP_V4_FLOW:
2037 case SCTP_V4_FLOW:
2038 case AH_ESP_V4_FLOW:
2039 case IPV4_FLOW:
2040 if (mrqc & E1000_MRQC_RSS_FIELD_IPV4)
2041 info->data |= RXH_IP_SRC | RXH_IP_DST;
2042 break;
2043 case TCP_V6_FLOW:
2044 if (mrqc & E1000_MRQC_RSS_FIELD_IPV6_TCP)
2045 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2046 /* fall through */
2047 case UDP_V6_FLOW:
2048 case SCTP_V6_FLOW:
2049 case AH_ESP_V6_FLOW:
2050 case IPV6_FLOW:
2051 if (mrqc & E1000_MRQC_RSS_FIELD_IPV6)
2052 info->data |= RXH_IP_SRC | RXH_IP_DST;
2053 break;
2054 default:
2055 break;
2056 }
2057 return 0;
2058 }
2059 default:
2060 return -EOPNOTSUPP;
2061 }
2062}
2063
203e4151
BA		 2064static int e1000e_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2065{
2066 struct e1000_adapter *adapter = netdev_priv(netdev);
2067 struct e1000_hw *hw = &adapter->hw;
2068 u16 cap_addr, adv_addr, lpa_addr, pcs_stat_addr, phy_data, lpi_ctrl;
2069 u32 status, ret_val;
2070
2071 if (!(adapter->flags & FLAG_IS_ICH) ||
2072 !(adapter->flags2 & FLAG2_HAS_EEE))
2073 return -EOPNOTSUPP;
2074
2075 switch (hw->phy.type) {
2076 case e1000_phy_82579:
2077 cap_addr = I82579_EEE_CAPABILITY;
2078 adv_addr = I82579_EEE_ADVERTISEMENT;
2079 lpa_addr = I82579_EEE_LP_ABILITY;
2080 pcs_stat_addr = I82579_EEE_PCS_STATUS;
2081 break;
2082 case e1000_phy_i217:
2083 cap_addr = I217_EEE_CAPABILITY;
2084 adv_addr = I217_EEE_ADVERTISEMENT;
2085 lpa_addr = I217_EEE_LP_ABILITY;
2086 pcs_stat_addr = I217_EEE_PCS_STATUS;
2087 break;
2088 default:
2089 return -EOPNOTSUPP;
2090 }
2091
2092 ret_val = hw->phy.ops.acquire(hw);
2093 if (ret_val)
2094 return -EBUSY;
2095
2096 /* EEE Capability */
2097 ret_val = e1000_read_emi_reg_locked(hw, cap_addr, &phy_data);
2098 if (ret_val)
2099 goto release;
2100 edata->supported = mmd_eee_cap_to_ethtool_sup_t(phy_data);
2101
2102 /* EEE Advertised */
2103 ret_val = e1000_read_emi_reg_locked(hw, adv_addr, &phy_data);
2104 if (ret_val)
2105 goto release;
2106 edata->advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2107
2108 /* EEE Link Partner Advertised */
2109 ret_val = e1000_read_emi_reg_locked(hw, lpa_addr, &phy_data);
2110 if (ret_val)
2111 goto release;
2112 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2113
2114 /* EEE PCS Status */
2115 ret_val = e1000_read_emi_reg_locked(hw, pcs_stat_addr, &phy_data);
2116 if (hw->phy.type == e1000_phy_82579)
2117 phy_data <<= 8;
2118
2119release:
2120 hw->phy.ops.release(hw);
2121 if (ret_val)
2122 return -ENODATA;
2123
2124 e1e_rphy(hw, I82579_LPI_CTRL, &lpi_ctrl);
2125 status = er32(STATUS);
2126
2127 /* Result of the EEE auto negotiation - there is no register that
2128 * has the status of the EEE negotiation so do a best-guess based
2129 * on whether both Tx and Rx LPI indications have been received or
2130 * base it on the link speed, the EEE advertised speeds on both ends
2131 * and the speeds on which EEE is enabled locally.
2132 */
2133 if (((phy_data & E1000_EEE_TX_LPI_RCVD) &&
2134 (phy_data & E1000_EEE_RX_LPI_RCVD)) ||
2135 ((status & E1000_STATUS_SPEED_100) &&
2136 (edata->advertised & ADVERTISED_100baseT_Full) &&
2137 (edata->lp_advertised & ADVERTISED_100baseT_Full) &&
2138 (lpi_ctrl & I82579_LPI_CTRL_100_ENABLE)) ||
2139 ((status & E1000_STATUS_SPEED_1000) &&
2140 (edata->advertised & ADVERTISED_1000baseT_Full) &&
2141 (edata->lp_advertised & ADVERTISED_1000baseT_Full) &&
2142 (lpi_ctrl & I82579_LPI_CTRL_1000_ENABLE)))
2143 edata->eee_active = true;
2144
2145 edata->eee_enabled = !hw->dev_spec.ich8lan.eee_disable;
2146 edata->tx_lpi_enabled = true;
2147 edata->tx_lpi_timer = er32(LPIC) >> E1000_LPIC_LPIET_SHIFT;
2148
2149 return 0;
2150}
2151
2152static int e1000e_set_eee(struct net_device *netdev, struct ethtool_eee *edata)
2153{
2154 struct e1000_adapter *adapter = netdev_priv(netdev);
2155 struct e1000_hw *hw = &adapter->hw;
2156 struct ethtool_eee eee_curr;
2157 s32 ret_val;
2158
2159 if (!(adapter->flags & FLAG_IS_ICH) ||
2160 !(adapter->flags2 & FLAG2_HAS_EEE))
2161 return -EOPNOTSUPP;
2162
2163 ret_val = e1000e_get_eee(netdev, &eee_curr);
2164 if (ret_val)
2165 return ret_val;
2166
2167 if (eee_curr.advertised != edata->advertised) {
2168 e_err("Setting EEE advertisement is not supported\n");
2169 return -EINVAL;
2170 }
2171
2172 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
2173 e_err("Setting EEE tx-lpi is not supported\n");
2174 return -EINVAL;
2175 }
2176
2177 if (eee_curr.tx_lpi_timer != edata->tx_lpi_timer) {
2178 e_err("Setting EEE Tx LPI timer is not supported\n");
2179 return -EINVAL;
2180 }
2181
2182 if (hw->dev_spec.ich8lan.eee_disable != !edata->eee_enabled) {
2183 hw->dev_spec.ich8lan.eee_disable = !edata->eee_enabled;
2184
2185 /* reset the link */
2186 if (netif_running(netdev))
2187 e1000e_reinit_locked(adapter);
2188 else
2189 e1000e_reset(adapter);
2190 }
2191
2192 return 0;
2193}
2194
b67e1913
BA		 2195static int e1000e_get_ts_info(struct net_device *netdev,
2196 struct ethtool_ts_info *info)
2197{
2198 struct e1000_adapter *adapter = netdev_priv(netdev);
2199
2200 ethtool_op_get_ts_info(netdev, info);
2201
2202 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
2203 return 0;
2204
2205 info->so_timestamping |= (SOF_TIMESTAMPING_TX_HARDWARE |
2206 SOF_TIMESTAMPING_RX_HARDWARE |
2207 SOF_TIMESTAMPING_RAW_HARDWARE);
2208
2209 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
2210
2211 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
d89777bf
BA		 2212 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2213 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2214 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2215 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
2216 (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2217 (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
2218 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
2219 (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
2220 (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
b67e1913
BA		 2221 (1 << HWTSTAMP_FILTER_ALL));
2222
d89777bf
BA		 2223 if (adapter->ptp_clock)
2224 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2225
b67e1913
BA		 2226 return 0;
2227}
2228
bc7f75fa
AK		 2229static const struct ethtool_ops e1000_ethtool_ops = {
2230 .get_settings = e1000_get_settings,
2231 .set_settings = e1000_set_settings,
2232 .get_drvinfo = e1000_get_drvinfo,
2233 .get_regs_len = e1000_get_regs_len,
2234 .get_regs = e1000_get_regs,
2235 .get_wol = e1000_get_wol,
2236 .set_wol = e1000_set_wol,
2237 .get_msglevel = e1000_get_msglevel,
2238 .set_msglevel = e1000_set_msglevel,
2239 .nway_reset = e1000_nway_reset,
ed4ba4b5 2240 .get_link = ethtool_op_get_link,
bc7f75fa
AK		 2241 .get_eeprom_len = e1000_get_eeprom_len,
2242 .get_eeprom = e1000_get_eeprom,
2243 .set_eeprom = e1000_set_eeprom,
2244 .get_ringparam = e1000_get_ringparam,
2245 .set_ringparam = e1000_set_ringparam,
2246 .get_pauseparam = e1000_get_pauseparam,
2247 .set_pauseparam = e1000_set_pauseparam,
bc7f75fa
AK		 2248 .self_test = e1000_diag_test,
2249 .get_strings = e1000_get_strings,
dbf80dcb 2250 .set_phys_id = e1000_set_phys_id,
bc7f75fa 2251 .get_ethtool_stats = e1000_get_ethtool_stats,
b9f2c044 2252 .get_sset_count = e1000e_get_sset_count,
de5b3077
AK		 2253 .get_coalesce = e1000_get_coalesce,
2254 .set_coalesce = e1000_set_coalesce,
70495a50 2255 .get_rxnfc = e1000_get_rxnfc,
b67e1913 2256 .get_ts_info = e1000e_get_ts_info,
203e4151
BA		 2257 .get_eee = e1000e_get_eee,
2258 .set_eee = e1000e_set_eee,
bc7f75fa
AK		 2259};
2260
2261void e1000e_set_ethtool_ops(struct net_device *netdev)
2262{
2263 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
2264}
Linux 6.x block layer and io_uring tree(s)