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e1000e: enable ECC on I217/I218 to catch packet buffer memory errors
[linux-2.6-block.git] / drivers / net / ethernet / intel / e1000e / ethtool.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
f5e261e6 4 Copyright(c) 1999 - 2012 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include <linux/netdevice.h>
9fb7a5f7 32#include <linux/interrupt.h>
bc7f75fa
AK		 33#include <linux/ethtool.h>
34#include <linux/pci.h>
5a0e3ad6 35#include <linux/slab.h>
bc7f75fa 36#include <linux/delay.h>
c85c21ad 37#include <linux/vmalloc.h>
203e4151 38#include <linux/mdio.h>
bc7f75fa
AK		 39
40#include "e1000.h"
41
e0f36a95
AK		 42enum {NETDEV_STATS, E1000_STATS};
43
bc7f75fa
AK		 44struct e1000_stats {
45 char stat_string[ETH_GSTRING_LEN];
e0f36a95 46 int type;
bc7f75fa
AK		 47 int sizeof_stat;
48 int stat_offset;
49};
50
f0f1a172 51#define E1000_STAT(str, m) { \
67fd4fcb
JK		 52 .stat_string = str, \
53 .type = E1000_STATS, \
54 .sizeof_stat = sizeof(((struct e1000_adapter *)0)->m), \
55 .stat_offset = offsetof(struct e1000_adapter, m) }
f0f1a172 56#define E1000_NETDEV_STAT(str, m) { \
67fd4fcb
JK		 57 .stat_string = str, \
58 .type = NETDEV_STATS, \
59 .sizeof_stat = sizeof(((struct rtnl_link_stats64 *)0)->m), \
60 .stat_offset = offsetof(struct rtnl_link_stats64, m) }
e0f36a95 61
bc7f75fa 62static const struct e1000_stats e1000_gstrings_stats[] = {
f0f1a172
BA		 63 E1000_STAT("rx_packets", stats.gprc),
64 E1000_STAT("tx_packets", stats.gptc),
65 E1000_STAT("rx_bytes", stats.gorc),
66 E1000_STAT("tx_bytes", stats.gotc),
67 E1000_STAT("rx_broadcast", stats.bprc),
68 E1000_STAT("tx_broadcast", stats.bptc),
69 E1000_STAT("rx_multicast", stats.mprc),
70 E1000_STAT("tx_multicast", stats.mptc),
67fd4fcb
JK		 71 E1000_NETDEV_STAT("rx_errors", rx_errors),
72 E1000_NETDEV_STAT("tx_errors", tx_errors),
73 E1000_NETDEV_STAT("tx_dropped", tx_dropped),
f0f1a172
BA		 74 E1000_STAT("multicast", stats.mprc),
75 E1000_STAT("collisions", stats.colc),
67fd4fcb
JK		 76 E1000_NETDEV_STAT("rx_length_errors", rx_length_errors),
77 E1000_NETDEV_STAT("rx_over_errors", rx_over_errors),
f0f1a172 78 E1000_STAT("rx_crc_errors", stats.crcerrs),
67fd4fcb 79 E1000_NETDEV_STAT("rx_frame_errors", rx_frame_errors),
f0f1a172
BA		 80 E1000_STAT("rx_no_buffer_count", stats.rnbc),
81 E1000_STAT("rx_missed_errors", stats.mpc),
82 E1000_STAT("tx_aborted_errors", stats.ecol),
83 E1000_STAT("tx_carrier_errors", stats.tncrs),
67fd4fcb
JK		 84 E1000_NETDEV_STAT("tx_fifo_errors", tx_fifo_errors),
85 E1000_NETDEV_STAT("tx_heartbeat_errors", tx_heartbeat_errors),
f0f1a172
BA		 86 E1000_STAT("tx_window_errors", stats.latecol),
87 E1000_STAT("tx_abort_late_coll", stats.latecol),
88 E1000_STAT("tx_deferred_ok", stats.dc),
89 E1000_STAT("tx_single_coll_ok", stats.scc),
90 E1000_STAT("tx_multi_coll_ok", stats.mcc),
91 E1000_STAT("tx_timeout_count", tx_timeout_count),
92 E1000_STAT("tx_restart_queue", restart_queue),
93 E1000_STAT("rx_long_length_errors", stats.roc),
94 E1000_STAT("rx_short_length_errors", stats.ruc),
95 E1000_STAT("rx_align_errors", stats.algnerrc),
96 E1000_STAT("tx_tcp_seg_good", stats.tsctc),
97 E1000_STAT("tx_tcp_seg_failed", stats.tsctfc),
98 E1000_STAT("rx_flow_control_xon", stats.xonrxc),
99 E1000_STAT("rx_flow_control_xoff", stats.xoffrxc),
100 E1000_STAT("tx_flow_control_xon", stats.xontxc),
101 E1000_STAT("tx_flow_control_xoff", stats.xofftxc),
f0f1a172
BA		 102 E1000_STAT("rx_csum_offload_good", hw_csum_good),
103 E1000_STAT("rx_csum_offload_errors", hw_csum_err),
104 E1000_STAT("rx_header_split", rx_hdr_split),
105 E1000_STAT("alloc_rx_buff_failed", alloc_rx_buff_failed),
106 E1000_STAT("tx_smbus", stats.mgptc),
107 E1000_STAT("rx_smbus", stats.mgprc),
108 E1000_STAT("dropped_smbus", stats.mgpdc),
109 E1000_STAT("rx_dma_failed", rx_dma_failed),
110 E1000_STAT("tx_dma_failed", tx_dma_failed),
b67e1913 111 E1000_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
94fb848b
BA		 112 E1000_STAT("uncorr_ecc_errors", uncorr_errors),
113 E1000_STAT("corr_ecc_errors", corr_errors),
bc7f75fa
AK		 114};
115
c00acf46 116#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
bc7f75fa
AK		 117#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN)
118static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
119 "Register test (offline)", "Eeprom test (offline)",
120 "Interrupt test (offline)", "Loopback test (offline)",
121 "Link test (on/offline)"
122};
ad68076e 123#define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
bc7f75fa
AK		 124
125static int e1000_get_settings(struct net_device *netdev,
126 struct ethtool_cmd *ecmd)
127{
128 struct e1000_adapter *adapter = netdev_priv(netdev);
129 struct e1000_hw *hw = &adapter->hw;
70739497 130 u32 speed;
bc7f75fa 131
318a94d6 132 if (hw->phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 133
134 ecmd->supported = (SUPPORTED_10baseT_Half |
135 SUPPORTED_10baseT_Full |
136 SUPPORTED_100baseT_Half |
137 SUPPORTED_100baseT_Full |
138 SUPPORTED_1000baseT_Full |
139 SUPPORTED_Autoneg |
140 SUPPORTED_TP);
141 if (hw->phy.type == e1000_phy_ife)
142 ecmd->supported &= ~SUPPORTED_1000baseT_Full;
143 ecmd->advertising = ADVERTISED_TP;
144
145 if (hw->mac.autoneg == 1) {
146 ecmd->advertising |= ADVERTISED_Autoneg;
147 /* the e1000 autoneg seems to match ethtool nicely */
148 ecmd->advertising |= hw->phy.autoneg_advertised;
149 }
150
151 ecmd->port = PORT_TP;
152 ecmd->phy_address = hw->phy.addr;
153 ecmd->transceiver = XCVR_INTERNAL;
154
155 } else {
156 ecmd->supported = (SUPPORTED_1000baseT_Full |
157 SUPPORTED_FIBRE |
158 SUPPORTED_Autoneg);
159
160 ecmd->advertising = (ADVERTISED_1000baseT_Full |
161 ADVERTISED_FIBRE |
162 ADVERTISED_Autoneg);
163
164 ecmd->port = PORT_FIBRE;
165 ecmd->transceiver = XCVR_EXTERNAL;
166 }
167
70739497 168 speed = -1;
0c6bdb30
BA		 169 ecmd->duplex = -1;
170
171 if (netif_running(netdev)) {
172 if (netif_carrier_ok(netdev)) {
70739497 173 speed = adapter->link_speed;
0c6bdb30
BA		 174 ecmd->duplex = adapter->link_duplex - 1;
175 }
bc7f75fa 176 } else {
0c6bdb30
BA		 177 u32 status = er32(STATUS);
178 if (status & E1000_STATUS_LU) {
179 if (status & E1000_STATUS_SPEED_1000)
70739497 180 speed = SPEED_1000;
0c6bdb30 181 else if (status & E1000_STATUS_SPEED_100)
70739497 182 speed = SPEED_100;
0c6bdb30 183 else
70739497 184 speed = SPEED_10;
0c6bdb30
BA		 185
186 if (status & E1000_STATUS_FD)
187 ecmd->duplex = DUPLEX_FULL;
188 else
189 ecmd->duplex = DUPLEX_HALF;
190 }
bc7f75fa
AK		 191 }
192
70739497 193 ethtool_cmd_speed_set(ecmd, speed);
318a94d6 194 ecmd->autoneg = ((hw->phy.media_type == e1000_media_type_fiber) ||
bc7f75fa 195 hw->mac.autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
18760f1e
CL		 196
197 /* MDI-X => 2; MDI =>1; Invalid =>0 */
198 if ((hw->phy.media_type == e1000_media_type_copper) &&
0c6bdb30 199 netif_carrier_ok(netdev))
18760f1e
CL		 200 ecmd->eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X :
201 ETH_TP_MDI;
202 else
203 ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
204
4e8186b6
JB		 205 if (hw->phy.mdix == AUTO_ALL_MODES)
206 ecmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
207 else
208 ecmd->eth_tp_mdix_ctrl = hw->phy.mdix;
209
bc7f75fa
AK		 210 return 0;
211}
212
14ad2513 213static int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
bc7f75fa
AK		 214{
215 struct e1000_mac_info *mac = &adapter->hw.mac;
216
217 mac->autoneg = 0;
218
14ad2513 219 /* Make sure dplx is at most 1 bit and lsb of speed is not set
e921eb1a
BA		 220 * for the switch() below to work
221 */
14ad2513
DD		 222 if ((spd & 1) || (dplx & ~1))
223 goto err_inval;
224
bc7f75fa 225 /* Fiber NICs only allow 1000 gbps Full duplex */
318a94d6 226 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
14ad2513
DD		 227 spd != SPEED_1000 &&
228 dplx != DUPLEX_FULL) {
229 goto err_inval;
bc7f75fa
AK		 230 }
231
14ad2513 232 switch (spd + dplx) {
bc7f75fa
AK		 233 case SPEED_10 + DUPLEX_HALF:
234 mac->forced_speed_duplex = ADVERTISE_10_HALF;
235 break;
236 case SPEED_10 + DUPLEX_FULL:
237 mac->forced_speed_duplex = ADVERTISE_10_FULL;
238 break;
239 case SPEED_100 + DUPLEX_HALF:
240 mac->forced_speed_duplex = ADVERTISE_100_HALF;
241 break;
242 case SPEED_100 + DUPLEX_FULL:
243 mac->forced_speed_duplex = ADVERTISE_100_FULL;
244 break;
245 case SPEED_1000 + DUPLEX_FULL:
246 mac->autoneg = 1;
247 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
248 break;
249 case SPEED_1000 + DUPLEX_HALF: /* not supported */
250 default:
14ad2513 251 goto err_inval;
bc7f75fa 252 }
4e8186b6
JB		 253
254 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
255 adapter->hw.phy.mdix = AUTO_ALL_MODES;
256
bc7f75fa 257 return 0;
14ad2513
DD		 258
259err_inval:
260 e_err("Unsupported Speed/Duplex configuration\n");
261 return -EINVAL;
bc7f75fa
AK		 262}
263
264static int e1000_set_settings(struct net_device *netdev,
265 struct ethtool_cmd *ecmd)
266{
267 struct e1000_adapter *adapter = netdev_priv(netdev);
268 struct e1000_hw *hw = &adapter->hw;
269
e921eb1a 270 /* When SoL/IDER sessions are active, autoneg/speed/duplex
ad68076e
BA		 271 * cannot be changed
272 */
470a5420
BA		 273 if (hw->phy.ops.check_reset_block &&
274 hw->phy.ops.check_reset_block(hw)) {
6ad65145 275 e_err("Cannot change link characteristics when SoL/IDER is active.\n");
bc7f75fa
AK		 276 return -EINVAL;
277 }
278
e921eb1a 279 /* MDI setting is only allowed when autoneg enabled because
4e8186b6
JB		 280 * some hardware doesn't allow MDI setting when speed or
281 * duplex is forced.
282 */
283 if (ecmd->eth_tp_mdix_ctrl) {
284 if (hw->phy.media_type != e1000_media_type_copper)
285 return -EOPNOTSUPP;
286
287 if ((ecmd->eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
288 (ecmd->autoneg != AUTONEG_ENABLE)) {
289 e_err("forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
290 return -EINVAL;
291 }
292 }
293
bc7f75fa 294 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 295 usleep_range(1000, 2000);
bc7f75fa
AK		 296
297 if (ecmd->autoneg == AUTONEG_ENABLE) {
298 hw->mac.autoneg = 1;
318a94d6 299 if (hw->phy.media_type == e1000_media_type_fiber)
bc7f75fa
AK		 300 hw->phy.autoneg_advertised = ADVERTISED_1000baseT_Full |
301 ADVERTISED_FIBRE |
302 ADVERTISED_Autoneg;
303 else
304 hw->phy.autoneg_advertised = ecmd->advertising |
305 ADVERTISED_TP |
306 ADVERTISED_Autoneg;
307 ecmd->advertising = hw->phy.autoneg_advertised;
318a94d6 308 if (adapter->fc_autoneg)
5c48ef3e 309 hw->fc.requested_mode = e1000_fc_default;
bc7f75fa 310 } else {
25db0338 311 u32 speed = ethtool_cmd_speed(ecmd);
4e8186b6 312 /* calling this overrides forced MDI setting */
14ad2513 313 if (e1000_set_spd_dplx(adapter, speed, ecmd->duplex)) {
bc7f75fa
AK		 314 clear_bit(__E1000_RESETTING, &adapter->state);
315 return -EINVAL;
316 }
317 }
318
4e8186b6
JB		 319 /* MDI-X => 2; MDI => 1; Auto => 3 */
320 if (ecmd->eth_tp_mdix_ctrl) {
e921eb1a 321 /* fix up the value for auto (3 => 0) as zero is mapped
4e8186b6
JB		 322 * internally to auto
323 */
324 if (ecmd->eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
325 hw->phy.mdix = AUTO_ALL_MODES;
326 else
327 hw->phy.mdix = ecmd->eth_tp_mdix_ctrl;
328 }
329
bc7f75fa
AK		 330 /* reset the link */
331
332 if (netif_running(adapter->netdev)) {
333 e1000e_down(adapter);
334 e1000e_up(adapter);
4e8186b6 335 } else
bc7f75fa 336 e1000e_reset(adapter);
bc7f75fa
AK		 337
338 clear_bit(__E1000_RESETTING, &adapter->state);
339 return 0;
340}
341
342static void e1000_get_pauseparam(struct net_device *netdev,
343 struct ethtool_pauseparam *pause)
344{
345 struct e1000_adapter *adapter = netdev_priv(netdev);
346 struct e1000_hw *hw = &adapter->hw;
347
348 pause->autoneg =
349 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
350
5c48ef3e 351 if (hw->fc.current_mode == e1000_fc_rx_pause) {
bc7f75fa 352 pause->rx_pause = 1;
5c48ef3e 353 } else if (hw->fc.current_mode == e1000_fc_tx_pause) {
bc7f75fa 354 pause->tx_pause = 1;
5c48ef3e 355 } else if (hw->fc.current_mode == e1000_fc_full) {
bc7f75fa
AK		 356 pause->rx_pause = 1;
357 pause->tx_pause = 1;
358 }
359}
360
361static int e1000_set_pauseparam(struct net_device *netdev,
362 struct ethtool_pauseparam *pause)
363{
364 struct e1000_adapter *adapter = netdev_priv(netdev);
365 struct e1000_hw *hw = &adapter->hw;
366 int retval = 0;
367
368 adapter->fc_autoneg = pause->autoneg;
369
370 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 371 usleep_range(1000, 2000);
bc7f75fa 372
bc7f75fa 373 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
5c48ef3e 374 hw->fc.requested_mode = e1000_fc_default;
bc7f75fa
AK		 375 if (netif_running(adapter->netdev)) {
376 e1000e_down(adapter);
377 e1000e_up(adapter);
378 } else {
379 e1000e_reset(adapter);
380 }
381 } else {
5c48ef3e
BA		 382 if (pause->rx_pause && pause->tx_pause)
383 hw->fc.requested_mode = e1000_fc_full;
384 else if (pause->rx_pause && !pause->tx_pause)
385 hw->fc.requested_mode = e1000_fc_rx_pause;
386 else if (!pause->rx_pause && pause->tx_pause)
387 hw->fc.requested_mode = e1000_fc_tx_pause;
388 else if (!pause->rx_pause && !pause->tx_pause)
389 hw->fc.requested_mode = e1000_fc_none;
390
391 hw->fc.current_mode = hw->fc.requested_mode;
392
945eb313
BA		 393 if (hw->phy.media_type == e1000_media_type_fiber) {
394 retval = hw->mac.ops.setup_link(hw);
395 /* implicit goto out */
396 } else {
397 retval = e1000e_force_mac_fc(hw);
398 if (retval)
399 goto out;
400 e1000e_set_fc_watermarks(hw);
401 }
bc7f75fa
AK		 402 }
403
945eb313 404out:
bc7f75fa
AK		 405 clear_bit(__E1000_RESETTING, &adapter->state);
406 return retval;
407}
408
bc7f75fa
AK		 409static u32 e1000_get_msglevel(struct net_device *netdev)
410{
411 struct e1000_adapter *adapter = netdev_priv(netdev);
412 return adapter->msg_enable;
413}
414
415static void e1000_set_msglevel(struct net_device *netdev, u32 data)
416{
417 struct e1000_adapter *adapter = netdev_priv(netdev);
418 adapter->msg_enable = data;
419}
420
421static int e1000_get_regs_len(struct net_device *netdev)
422{
423#define E1000_REGS_LEN 32 /* overestimate */
424 return E1000_REGS_LEN * sizeof(u32);
425}
426
427static void e1000_get_regs(struct net_device *netdev,
428 struct ethtool_regs *regs, void *p)
429{
430 struct e1000_adapter *adapter = netdev_priv(netdev);
431 struct e1000_hw *hw = &adapter->hw;
432 u32 *regs_buff = p;
433 u16 phy_data;
bc7f75fa
AK		 434
435 memset(p, 0, E1000_REGS_LEN * sizeof(u32));
436
ff938e43
SS		 437 regs->version = (1 << 24) | (adapter->pdev->revision << 16) |
438 adapter->pdev->device;
bc7f75fa
AK		 439
440 regs_buff[0] = er32(CTRL);
441 regs_buff[1] = er32(STATUS);
442
443 regs_buff[2] = er32(RCTL);
1e36052e
BA		 444 regs_buff[3] = er32(RDLEN(0));
445 regs_buff[4] = er32(RDH(0));
446 regs_buff[5] = er32(RDT(0));
bc7f75fa
AK		 447 regs_buff[6] = er32(RDTR);
448
449 regs_buff[7] = er32(TCTL);
1e36052e
BA		 450 regs_buff[8] = er32(TDLEN(0));
451 regs_buff[9] = er32(TDH(0));
452 regs_buff[10] = er32(TDT(0));
bc7f75fa
AK		 453 regs_buff[11] = er32(TIDV);
454
455 regs_buff[12] = adapter->hw.phy.type; /* PHY type (IGP=1, M88=0) */
23033fad
JB		 456
457 /* ethtool doesn't use anything past this point, so all this
e921eb1a
BA		 458 * code is likely legacy junk for apps that may or may not exist
459 */
bc7f75fa
AK		 460 if (hw->phy.type == e1000_phy_m88) {
461 e1e_rphy(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
462 regs_buff[13] = (u32)phy_data; /* cable length */
463 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
464 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
465 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
466 e1e_rphy(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
467 regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
468 regs_buff[18] = regs_buff[13]; /* cable polarity */
469 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
470 regs_buff[20] = regs_buff[17]; /* polarity correction */
471 /* phy receive errors */
472 regs_buff[22] = adapter->phy_stats.receive_errors;
473 regs_buff[23] = regs_buff[13]; /* mdix mode */
474 }
23033fad 475 regs_buff[21] = 0; /* was idle_errors */
bc7f75fa
AK		 476 e1e_rphy(hw, PHY_1000T_STATUS, &phy_data);
477 regs_buff[24] = (u32)phy_data; /* phy local receiver status */
478 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
479}
480
481static int e1000_get_eeprom_len(struct net_device *netdev)
482{
483 struct e1000_adapter *adapter = netdev_priv(netdev);
484 return adapter->hw.nvm.word_size * 2;
485}
486
487static int e1000_get_eeprom(struct net_device *netdev,
488 struct ethtool_eeprom *eeprom, u8 *bytes)
489{
490 struct e1000_adapter *adapter = netdev_priv(netdev);
491 struct e1000_hw *hw = &adapter->hw;
492 u16 *eeprom_buff;
493 int first_word;
494 int last_word;
495 int ret_val = 0;
496 u16 i;
497
498 if (eeprom->len == 0)
499 return -EINVAL;
500
501 eeprom->magic = adapter->pdev->vendor | (adapter->pdev->device << 16);
502
503 first_word = eeprom->offset >> 1;
504 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
505
506 eeprom_buff = kmalloc(sizeof(u16) *
507 (last_word - first_word + 1), GFP_KERNEL);
508 if (!eeprom_buff)
509 return -ENOMEM;
510
511 if (hw->nvm.type == e1000_nvm_eeprom_spi) {
512 ret_val = e1000_read_nvm(hw, first_word,
513 last_word - first_word + 1,
514 eeprom_buff);
515 } else {
516 for (i = 0; i < last_word - first_word + 1; i++) {
517 ret_val = e1000_read_nvm(hw, first_word + i, 1,
518 &eeprom_buff[i]);
e243455d 519 if (ret_val)
bc7f75fa
AK		 520 break;
521 }
522 }
523
e243455d
BA		 524 if (ret_val) {
525 /* a read error occurred, throw away the result */
8528b016
RK		 526 memset(eeprom_buff, 0xff, sizeof(u16) *
527 (last_word - first_word + 1));
e243455d
BA		 528 } else {
529 /* Device's eeprom is always little-endian, word addressable */
530 for (i = 0; i < last_word - first_word + 1; i++)
531 le16_to_cpus(&eeprom_buff[i]);
532 }
bc7f75fa
AK		 533
534 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
535 kfree(eeprom_buff);
536
537 return ret_val;
538}
539
540static int e1000_set_eeprom(struct net_device *netdev,
541 struct ethtool_eeprom *eeprom, u8 *bytes)
542{
543 struct e1000_adapter *adapter = netdev_priv(netdev);
544 struct e1000_hw *hw = &adapter->hw;
545 u16 *eeprom_buff;
546 void *ptr;
547 int max_len;
548 int first_word;
549 int last_word;
550 int ret_val = 0;
551 u16 i;
552
553 if (eeprom->len == 0)
554 return -EOPNOTSUPP;
555
556 if (eeprom->magic != (adapter->pdev->vendor | (adapter->pdev->device << 16)))
557 return -EFAULT;
558
4a770358
BA		 559 if (adapter->flags & FLAG_READ_ONLY_NVM)
560 return -EINVAL;
561
bc7f75fa
AK		 562 max_len = hw->nvm.word_size * 2;
563
564 first_word = eeprom->offset >> 1;
565 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
566 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
567 if (!eeprom_buff)
568 return -ENOMEM;
569
570 ptr = (void *)eeprom_buff;
571
572 if (eeprom->offset & 1) {
573 /* need read/modify/write of first changed EEPROM word */
574 /* only the second byte of the word is being modified */
575 ret_val = e1000_read_nvm(hw, first_word, 1, &eeprom_buff[0]);
576 ptr++;
577 }
9e2d7657 578 if (((eeprom->offset + eeprom->len) & 1) && (!ret_val))
bc7f75fa
AK		 579 /* need read/modify/write of last changed EEPROM word */
580 /* only the first byte of the word is being modified */
581 ret_val = e1000_read_nvm(hw, last_word, 1,
582 &eeprom_buff[last_word - first_word]);
583
e243455d
BA		 584 if (ret_val)
585 goto out;
586
bc7f75fa
AK		 587 /* Device's eeprom is always little-endian, word addressable */
588 for (i = 0; i < last_word - first_word + 1; i++)
589 le16_to_cpus(&eeprom_buff[i]);
590
591 memcpy(ptr, bytes, eeprom->len);
592
593 for (i = 0; i < last_word - first_word + 1; i++)
e885d762 594 cpu_to_le16s(&eeprom_buff[i]);
bc7f75fa
AK		 595
596 ret_val = e1000_write_nvm(hw, first_word,
597 last_word - first_word + 1, eeprom_buff);
598
e243455d
BA		 599 if (ret_val)
600 goto out;
601
e921eb1a 602 /* Update the checksum over the first part of the EEPROM if needed
e243455d 603 * and flush shadow RAM for applicable controllers
ad68076e 604 */
e243455d 605 if ((first_word <= NVM_CHECKSUM_REG) ||
f89271dd
BA		 606 (hw->mac.type == e1000_82583) ||
607 (hw->mac.type == e1000_82574) ||
608 (hw->mac.type == e1000_82573))
e243455d 609 ret_val = e1000e_update_nvm_checksum(hw);
bc7f75fa 610
e243455d 611out:
bc7f75fa
AK		 612 kfree(eeprom_buff);
613 return ret_val;
614}
615
616static void e1000_get_drvinfo(struct net_device *netdev,
617 struct ethtool_drvinfo *drvinfo)
618{
619 struct e1000_adapter *adapter = netdev_priv(netdev);
bc7f75fa 620
612a94d6
RJ		 621 strlcpy(drvinfo->driver, e1000e_driver_name,
622 sizeof(drvinfo->driver));
33a5ba14 623 strlcpy(drvinfo->version, e1000e_driver_version,
612a94d6 624 sizeof(drvinfo->version));
bc7f75fa 625
e921eb1a 626 /* EEPROM image version # is reported as firmware version # for
ad68076e
BA		 627 * PCI-E controllers
628 */
612a94d6
RJ		 629 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
630 "%d.%d-%d",
84527590
BA		 631 (adapter->eeprom_vers & 0xF000) >> 12,
632 (adapter->eeprom_vers & 0x0FF0) >> 4,
633 (adapter->eeprom_vers & 0x000F));
bc7f75fa 634
612a94d6
RJ		 635 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
636 sizeof(drvinfo->bus_info));
bc7f75fa
AK		 637 drvinfo->regdump_len = e1000_get_regs_len(netdev);
638 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
639}
640
641static void e1000_get_ringparam(struct net_device *netdev,
642 struct ethtool_ringparam *ring)
643{
644 struct e1000_adapter *adapter = netdev_priv(netdev);
bc7f75fa
AK		 645
646 ring->rx_max_pending = E1000_MAX_RXD;
647 ring->tx_max_pending = E1000_MAX_TXD;
508da426
BA		 648 ring->rx_pending = adapter->rx_ring_count;
649 ring->tx_pending = adapter->tx_ring_count;
bc7f75fa
AK		 650}
651
652static int e1000_set_ringparam(struct net_device *netdev,
653 struct ethtool_ringparam *ring)
654{
655 struct e1000_adapter *adapter = netdev_priv(netdev);
508da426
BA		 656 struct e1000_ring *temp_tx = NULL, *temp_rx = NULL;
657 int err = 0, size = sizeof(struct e1000_ring);
658 bool set_tx = false, set_rx = false;
659 u16 new_rx_count, new_tx_count;
bc7f75fa
AK		 660
661 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
662 return -EINVAL;
663
508da426
BA		 664 new_rx_count = clamp_t(u32, ring->rx_pending, E1000_MIN_RXD,
665 E1000_MAX_RXD);
666 new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
bc7f75fa 667
508da426
BA		 668 new_tx_count = clamp_t(u32, ring->tx_pending, E1000_MIN_TXD,
669 E1000_MAX_TXD);
670 new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
bc7f75fa 671
508da426
BA		 672 if ((new_tx_count == adapter->tx_ring_count) &&
673 (new_rx_count == adapter->rx_ring_count))
674 /* nothing to do */
675 return 0;
bc7f75fa 676
508da426
BA		 677 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
678 usleep_range(1000, 2000);
bc7f75fa 679
508da426
BA		 680 if (!netif_running(adapter->netdev)) {
681 /* Set counts now and allocate resources during open() */
682 adapter->tx_ring->count = new_tx_count;
683 adapter->rx_ring->count = new_rx_count;
684 adapter->tx_ring_count = new_tx_count;
685 adapter->rx_ring_count = new_rx_count;
686 goto clear_reset;
687 }
bc7f75fa 688
508da426
BA		 689 set_tx = (new_tx_count != adapter->tx_ring_count);
690 set_rx = (new_rx_count != adapter->rx_ring_count);
bc7f75fa 691
508da426
BA		 692 /* Allocate temporary storage for ring updates */
693 if (set_tx) {
694 temp_tx = vmalloc(size);
695 if (!temp_tx) {
696 err = -ENOMEM;
697 goto free_temp;
698 }
699 }
700 if (set_rx) {
701 temp_rx = vmalloc(size);
702 if (!temp_rx) {
703 err = -ENOMEM;
704 goto free_temp;
705 }
706 }
bc7f75fa 707
508da426 708 e1000e_down(adapter);
bc7f75fa 709
e921eb1a 710 /* We can't just free everything and then setup again, because the
508da426
BA		 711 * ISRs in MSI-X mode get passed pointers to the Tx and Rx ring
712 * structs. First, attempt to allocate new resources...
713 */
714 if (set_tx) {
715 memcpy(temp_tx, adapter->tx_ring, size);
716 temp_tx->count = new_tx_count;
717 err = e1000e_setup_tx_resources(temp_tx);
bc7f75fa 718 if (err)
508da426
BA		 719 goto err_setup;
720 }
721 if (set_rx) {
722 memcpy(temp_rx, adapter->rx_ring, size);
723 temp_rx->count = new_rx_count;
724 err = e1000e_setup_rx_resources(temp_rx);
bc7f75fa 725 if (err)
508da426
BA		 726 goto err_setup_rx;
727 }
728
729 /* ...then free the old resources and copy back any new ring data */
730 if (set_tx) {
55aa6985 731 e1000e_free_tx_resources(adapter->tx_ring);
508da426
BA		 732 memcpy(adapter->tx_ring, temp_tx, size);
733 adapter->tx_ring_count = new_tx_count;
734 }
735 if (set_rx) {
736 e1000e_free_rx_resources(adapter->rx_ring);
737 memcpy(adapter->rx_ring, temp_rx, size);
738 adapter->rx_ring_count = new_rx_count;
bc7f75fa
AK		 739 }
740
bc7f75fa 741err_setup_rx:
508da426
BA		 742 if (err && set_tx)
743 e1000e_free_tx_resources(temp_tx);
bc7f75fa 744err_setup:
508da426
BA		 745 e1000e_up(adapter);
746free_temp:
747 vfree(temp_tx);
748 vfree(temp_rx);
749clear_reset:
bc7f75fa
AK		 750 clear_bit(__E1000_RESETTING, &adapter->state);
751 return err;
752}
753
cef8c793
BA		 754static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,
755 int reg, int offset, u32 mask, u32 write)
2a887191 756{
cef8c793 757 u32 pat, val;
6480641e
BA		 758 static const u32 test[] = {
759 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
cef8c793 760 for (pat = 0; pat < ARRAY_SIZE(test); pat++) {
2a887191 761 E1000_WRITE_REG_ARRAY(&adapter->hw, reg, offset,
cef8c793
BA		 762 (test[pat] & write));
763 val = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset);
764 if (val != (test[pat] & write & mask)) {
a8fc1891
BA		 765 e_err("pattern test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n",
766 reg + (offset << 2), val,
767 (test[pat] & write & mask));
2a887191 768 *data = reg;
cef8c793 769 return 1;
2a887191
JP		 770 }
771 }
cef8c793 772 return 0;
bc7f75fa
AK		 773}
774
2a887191
JP		 775static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,
776 int reg, u32 mask, u32 write)
777{
cef8c793 778 u32 val;
2a887191 779 __ew32(&adapter->hw, reg, write & mask);
cef8c793
BA		 780 val = __er32(&adapter->hw, reg);
781 if ((write & mask) != (val & mask)) {
a8fc1891 782 e_err("set/check test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n",
6ad65145 783 reg, (val & mask), (write & mask));
2a887191 784 *data = reg;
cef8c793 785 return 1;
2a887191 786 }
cef8c793 787 return 0;
bc7f75fa 788}
cef8c793
BA		 789#define REG_PATTERN_TEST_ARRAY(reg, offset, mask, write) \
790 do { \
791 if (reg_pattern_test(adapter, data, reg, offset, mask, write)) \
792 return 1; \
2a887191 793 } while (0)
cef8c793
BA		 794#define REG_PATTERN_TEST(reg, mask, write) \
795 REG_PATTERN_TEST_ARRAY(reg, 0, mask, write)
2a887191 796
cef8c793
BA		 797#define REG_SET_AND_CHECK(reg, mask, write) \
798 do { \
799 if (reg_set_and_check(adapter, data, reg, mask, write)) \
800 return 1; \
2a887191
JP		 801 } while (0)
802
bc7f75fa
AK		 803static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
804{
805 struct e1000_hw *hw = &adapter->hw;
806 struct e1000_mac_info *mac = &adapter->hw.mac;
bc7f75fa
AK		 807 u32 value;
808 u32 before;
809 u32 after;
810 u32 i;
811 u32 toggle;
a4f58f54 812 u32 mask;
2fbe4526 813 u32 wlock_mac = 0;
bc7f75fa 814
e921eb1a 815 /* The status register is Read Only, so a write should fail.
bc7f75fa
AK		 816 * Some bits that get toggled are ignored.
817 */
818 switch (mac->type) {
819 /* there are several bits on newer hardware that are r/w */
820 case e1000_82571:
821 case e1000_82572:
822 case e1000_80003es2lan:
823 toggle = 0x7FFFF3FF;
824 break;
a4f58f54 825 default:
bc7f75fa
AK		 826 toggle = 0x7FFFF033;
827 break;
bc7f75fa
AK		 828 }
829
830 before = er32(STATUS);
831 value = (er32(STATUS) & toggle);
832 ew32(STATUS, toggle);
833 after = er32(STATUS) & toggle;
834 if (value != after) {
6ad65145
BA		 835 e_err("failed STATUS register test got: 0x%08X expected: 0x%08X\n",
836 after, value);
bc7f75fa
AK		 837 *data = 1;
838 return 1;
839 }
840 /* restore previous status */
841 ew32(STATUS, before);
842
97ac8cae 843 if (!(adapter->flags & FLAG_IS_ICH)) {
bc7f75fa
AK		 844 REG_PATTERN_TEST(E1000_FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
845 REG_PATTERN_TEST(E1000_FCAH, 0x0000FFFF, 0xFFFFFFFF);
846 REG_PATTERN_TEST(E1000_FCT, 0x0000FFFF, 0xFFFFFFFF);
847 REG_PATTERN_TEST(E1000_VET, 0x0000FFFF, 0xFFFFFFFF);
848 }
849
850 REG_PATTERN_TEST(E1000_RDTR, 0x0000FFFF, 0xFFFFFFFF);
1e36052e
BA		 851 REG_PATTERN_TEST(E1000_RDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
852 REG_PATTERN_TEST(E1000_RDLEN(0), 0x000FFF80, 0x000FFFFF);
853 REG_PATTERN_TEST(E1000_RDH(0), 0x0000FFFF, 0x0000FFFF);
854 REG_PATTERN_TEST(E1000_RDT(0), 0x0000FFFF, 0x0000FFFF);
bc7f75fa
AK		 855 REG_PATTERN_TEST(E1000_FCRTH, 0x0000FFF8, 0x0000FFF8);
856 REG_PATTERN_TEST(E1000_FCTTV, 0x0000FFFF, 0x0000FFFF);
857 REG_PATTERN_TEST(E1000_TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
1e36052e
BA		 858 REG_PATTERN_TEST(E1000_TDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
859 REG_PATTERN_TEST(E1000_TDLEN(0), 0x000FFF80, 0x000FFFFF);
bc7f75fa
AK		 860
861 REG_SET_AND_CHECK(E1000_RCTL, 0xFFFFFFFF, 0x00000000);
862
97ac8cae 863 before = ((adapter->flags & FLAG_IS_ICH) ? 0x06C3B33E : 0x06DFB3FE);
bc7f75fa
AK		 864 REG_SET_AND_CHECK(E1000_RCTL, before, 0x003FFFFB);
865 REG_SET_AND_CHECK(E1000_TCTL, 0xFFFFFFFF, 0x00000000);
866
8658251d 867 REG_SET_AND_CHECK(E1000_RCTL, before, 0xFFFFFFFF);
1e36052e 868 REG_PATTERN_TEST(E1000_RDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
97ac8cae 869 if (!(adapter->flags & FLAG_IS_ICH))
8658251d 870 REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF);
1e36052e 871 REG_PATTERN_TEST(E1000_TDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
8658251d 872 REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF);
a4f58f54
BA		 873 mask = 0x8003FFFF;
874 switch (mac->type) {
875 case e1000_ich10lan:
876 case e1000_pchlan:
d3738bb8 877 case e1000_pch2lan:
2fbe4526 878 case e1000_pch_lpt:
a4f58f54
BA		 879 mask |= (1 << 18);
880 break;
881 default:
882 break;
883 }
2fbe4526
BA		 884
885 if (mac->type == e1000_pch_lpt)
886 wlock_mac = (er32(FWSM) & E1000_FWSM_WLOCK_MAC_MASK) >>
887 E1000_FWSM_WLOCK_MAC_SHIFT;
888
889 for (i = 0; i < mac->rar_entry_count; i++) {
a8fc1891
BA		 890 if (mac->type == e1000_pch_lpt) {
891 /* Cannot test write-protected SHRAL[n] registers */
892 if ((wlock_mac == 1) || (wlock_mac && (i > wlock_mac)))
893 continue;
894
895 /* SHRAH[9] different than the others */
896 if (i == 10)
897 mask |= (1 << 30);
898 else
899 mask &= ~(1 << 30);
900 }
2fbe4526 901
a8fc1891
BA		 902 REG_PATTERN_TEST_ARRAY(E1000_RA, ((i << 1) + 1), mask,
903 0xFFFFFFFF);
2fbe4526 904 }
bc7f75fa
AK		 905
906 for (i = 0; i < mac->mta_reg_count; i++)
907 REG_PATTERN_TEST_ARRAY(E1000_MTA, i, 0xFFFFFFFF, 0xFFFFFFFF);
908
909 *data = 0;
2fbe4526 910
bc7f75fa
AK		 911 return 0;
912}
913
914static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
915{
916 u16 temp;
917 u16 checksum = 0;
918 u16 i;
919
920 *data = 0;
921 /* Read and add up the contents of the EEPROM */
922 for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
923 if ((e1000_read_nvm(&adapter->hw, i, 1, &temp)) < 0) {
924 *data = 1;
e243455d 925 return *data;
bc7f75fa
AK		 926 }
927 checksum += temp;
928 }
929
930 /* If Checksum is not Correct return error else test passed */
931 if ((checksum != (u16) NVM_SUM) && !(*data))
932 *data = 2;
933
934 return *data;
935}
936
937static irqreturn_t e1000_test_intr(int irq, void *data)
938{
939 struct net_device *netdev = (struct net_device *) data;
940 struct e1000_adapter *adapter = netdev_priv(netdev);
941 struct e1000_hw *hw = &adapter->hw;
942
943 adapter->test_icr |= er32(ICR);
944
945 return IRQ_HANDLED;
946}
947
948static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
949{
950 struct net_device *netdev = adapter->netdev;
951 struct e1000_hw *hw = &adapter->hw;
952 u32 mask;
953 u32 shared_int = 1;
954 u32 irq = adapter->pdev->irq;
955 int i;
4662e82b
BA		 956 int ret_val = 0;
957 int int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 958
959 *data = 0;
960
4662e82b
BA		 961 /* NOTE: we don't test MSI/MSI-X interrupts here, yet */
962 if (adapter->int_mode == E1000E_INT_MODE_MSIX) {
963 int_mode = adapter->int_mode;
964 e1000e_reset_interrupt_capability(adapter);
965 adapter->int_mode = E1000E_INT_MODE_LEGACY;
966 e1000e_set_interrupt_capability(adapter);
967 }
bc7f75fa 968 /* Hook up test interrupt handler just for this test */
a0607fd3 969 if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
bc7f75fa
AK		 970 netdev)) {
971 shared_int = 0;
a0607fd3 972 } else if (request_irq(irq, e1000_test_intr, IRQF_SHARED,
bc7f75fa
AK		 973 netdev->name, netdev)) {
974 *data = 1;
4662e82b
BA		 975 ret_val = -1;
976 goto out;
bc7f75fa 977 }
44defeb3 978 e_info("testing %s interrupt\n", (shared_int ? "shared" : "unshared"));
bc7f75fa
AK		 979
980 /* Disable all the interrupts */
981 ew32(IMC, 0xFFFFFFFF);
945a5151 982 e1e_flush();
1bba4386 983 usleep_range(10000, 20000);
bc7f75fa
AK		 984
985 /* Test each interrupt */
986 for (i = 0; i < 10; i++) {
bc7f75fa
AK		 987 /* Interrupt to test */
988 mask = 1 << i;
989
f4187b56
BA		 990 if (adapter->flags & FLAG_IS_ICH) {
991 switch (mask) {
992 case E1000_ICR_RXSEQ:
993 continue;
994 case 0x00000100:
995 if (adapter->hw.mac.type == e1000_ich8lan ||
996 adapter->hw.mac.type == e1000_ich9lan)
997 continue;
998 break;
999 default:
1000 break;
1001 }
1002 }
1003
bc7f75fa 1004 if (!shared_int) {
e921eb1a 1005 /* Disable the interrupt to be reported in
bc7f75fa
AK		 1006 * the cause register and then force the same
1007 * interrupt and see if one gets posted. If
1008 * an interrupt was posted to the bus, the
1009 * test failed.
1010 */
1011 adapter->test_icr = 0;
1012 ew32(IMC, mask);
1013 ew32(ICS, mask);
945a5151 1014 e1e_flush();
1bba4386 1015 usleep_range(10000, 20000);
bc7f75fa
AK		 1016
1017 if (adapter->test_icr & mask) {
1018 *data = 3;
1019 break;
1020 }
1021 }
1022
e921eb1a 1023 /* Enable the interrupt to be reported in
bc7f75fa
AK		 1024 * the cause register and then force the same
1025 * interrupt and see if one gets posted. If
1026 * an interrupt was not posted to the bus, the
1027 * test failed.
1028 */
1029 adapter->test_icr = 0;
1030 ew32(IMS, mask);
1031 ew32(ICS, mask);
945a5151 1032 e1e_flush();
1bba4386 1033 usleep_range(10000, 20000);
bc7f75fa
AK		 1034
1035 if (!(adapter->test_icr & mask)) {
1036 *data = 4;
1037 break;
1038 }
1039
1040 if (!shared_int) {
e921eb1a 1041 /* Disable the other interrupts to be reported in
bc7f75fa
AK		 1042 * the cause register and then force the other
1043 * interrupts and see if any get posted. If
1044 * an interrupt was posted to the bus, the
1045 * test failed.
1046 */
1047 adapter->test_icr = 0;
1048 ew32(IMC, ~mask & 0x00007FFF);
1049 ew32(ICS, ~mask & 0x00007FFF);
945a5151 1050 e1e_flush();
1bba4386 1051 usleep_range(10000, 20000);
bc7f75fa
AK		 1052
1053 if (adapter->test_icr) {
1054 *data = 5;
1055 break;
1056 }
1057 }
1058 }
1059
1060 /* Disable all the interrupts */
1061 ew32(IMC, 0xFFFFFFFF);
945a5151 1062 e1e_flush();
1bba4386 1063 usleep_range(10000, 20000);
bc7f75fa
AK		 1064
1065 /* Unhook test interrupt handler */
1066 free_irq(irq, netdev);
1067
4662e82b
BA		 1068out:
1069 if (int_mode == E1000E_INT_MODE_MSIX) {
1070 e1000e_reset_interrupt_capability(adapter);
1071 adapter->int_mode = int_mode;
1072 e1000e_set_interrupt_capability(adapter);
1073 }
1074
1075 return ret_val;
bc7f75fa
AK		 1076}
1077
1078static void e1000_free_desc_rings(struct e1000_adapter *adapter)
1079{
1080 struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1081 struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1082 struct pci_dev *pdev = adapter->pdev;
1083 int i;
1084
1085 if (tx_ring->desc && tx_ring->buffer_info) {
1086 for (i = 0; i < tx_ring->count; i++) {
1087 if (tx_ring->buffer_info[i].dma)
0be3f55f 1088 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 1089 tx_ring->buffer_info[i].dma,
1090 tx_ring->buffer_info[i].length,
0be3f55f 1091 DMA_TO_DEVICE);
bc7f75fa
AK		 1092 if (tx_ring->buffer_info[i].skb)
1093 dev_kfree_skb(tx_ring->buffer_info[i].skb);
1094 }
1095 }
1096
1097 if (rx_ring->desc && rx_ring->buffer_info) {
1098 for (i = 0; i < rx_ring->count; i++) {
1099 if (rx_ring->buffer_info[i].dma)
0be3f55f 1100 dma_unmap_single(&pdev->dev,
bc7f75fa 1101 rx_ring->buffer_info[i].dma,
0be3f55f 1102 2048, DMA_FROM_DEVICE);
bc7f75fa
AK		 1103 if (rx_ring->buffer_info[i].skb)
1104 dev_kfree_skb(rx_ring->buffer_info[i].skb);
1105 }
1106 }
1107
1108 if (tx_ring->desc) {
1109 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1110 tx_ring->dma);
1111 tx_ring->desc = NULL;
1112 }
1113 if (rx_ring->desc) {
1114 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1115 rx_ring->dma);
1116 rx_ring->desc = NULL;
1117 }
1118
1119 kfree(tx_ring->buffer_info);
1120 tx_ring->buffer_info = NULL;
1121 kfree(rx_ring->buffer_info);
1122 rx_ring->buffer_info = NULL;
1123}
1124
1125static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
1126{
1127 struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1128 struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1129 struct pci_dev *pdev = adapter->pdev;
1130 struct e1000_hw *hw = &adapter->hw;
1131 u32 rctl;
bc7f75fa
AK		 1132 int i;
1133 int ret_val;
1134
1135 /* Setup Tx descriptor ring and Tx buffers */
1136
1137 if (!tx_ring->count)
1138 tx_ring->count = E1000_DEFAULT_TXD;
1139
cef8c793
BA		 1140 tx_ring->buffer_info = kcalloc(tx_ring->count,
1141 sizeof(struct e1000_buffer),
1142 GFP_KERNEL);
668018d7 1143 if (!tx_ring->buffer_info) {
bc7f75fa
AK		 1144 ret_val = 1;
1145 goto err_nomem;
1146 }
bc7f75fa
AK		 1147
1148 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1149 tx_ring->size = ALIGN(tx_ring->size, 4096);
1150 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
1151 &tx_ring->dma, GFP_KERNEL);
1152 if (!tx_ring->desc) {
1153 ret_val = 2;
1154 goto err_nomem;
1155 }
bc7f75fa
AK		 1156 tx_ring->next_to_use = 0;
1157 tx_ring->next_to_clean = 0;
1158
1e36052e
BA		 1159 ew32(TDBAL(0), ((u64) tx_ring->dma & 0x00000000FFFFFFFF));
1160 ew32(TDBAH(0), ((u64) tx_ring->dma >> 32));
1161 ew32(TDLEN(0), tx_ring->count * sizeof(struct e1000_tx_desc));
1162 ew32(TDH(0), 0);
1163 ew32(TDT(0), 0);
cef8c793
BA		 1164 ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | E1000_TCTL_MULR |
1165 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1166 E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT);
bc7f75fa
AK		 1167
1168 for (i = 0; i < tx_ring->count; i++) {
1169 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
1170 struct sk_buff *skb;
1171 unsigned int skb_size = 1024;
1172
1173 skb = alloc_skb(skb_size, GFP_KERNEL);
1174 if (!skb) {
1175 ret_val = 3;
1176 goto err_nomem;
1177 }
1178 skb_put(skb, skb_size);
1179 tx_ring->buffer_info[i].skb = skb;
1180 tx_ring->buffer_info[i].length = skb->len;
1181 tx_ring->buffer_info[i].dma =
0be3f55f
NN		 1182 dma_map_single(&pdev->dev, skb->data, skb->len,
1183 DMA_TO_DEVICE);
1184 if (dma_mapping_error(&pdev->dev,
1185 tx_ring->buffer_info[i].dma)) {
bc7f75fa
AK		 1186 ret_val = 4;
1187 goto err_nomem;
1188 }
cef8c793 1189 tx_desc->buffer_addr = cpu_to_le64(tx_ring->buffer_info[i].dma);
bc7f75fa
AK		 1190 tx_desc->lower.data = cpu_to_le32(skb->len);
1191 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1192 E1000_TXD_CMD_IFCS |
cef8c793 1193 E1000_TXD_CMD_RS);
bc7f75fa
AK		 1194 tx_desc->upper.data = 0;
1195 }
1196
1197 /* Setup Rx descriptor ring and Rx buffers */
1198
1199 if (!rx_ring->count)
1200 rx_ring->count = E1000_DEFAULT_RXD;
1201
cef8c793
BA		 1202 rx_ring->buffer_info = kcalloc(rx_ring->count,
1203 sizeof(struct e1000_buffer),
1204 GFP_KERNEL);
668018d7 1205 if (!rx_ring->buffer_info) {
bc7f75fa
AK		 1206 ret_val = 5;
1207 goto err_nomem;
1208 }
bc7f75fa 1209
5f450212 1210 rx_ring->size = rx_ring->count * sizeof(union e1000_rx_desc_extended);
bc7f75fa
AK		 1211 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
1212 &rx_ring->dma, GFP_KERNEL);
1213 if (!rx_ring->desc) {
1214 ret_val = 6;
1215 goto err_nomem;
1216 }
bc7f75fa
AK		 1217 rx_ring->next_to_use = 0;
1218 rx_ring->next_to_clean = 0;
1219
1220 rctl = er32(RCTL);
7f99ae63
BA		 1221 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
1222 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1e36052e
BA		 1223 ew32(RDBAL(0), ((u64) rx_ring->dma & 0xFFFFFFFF));
1224 ew32(RDBAH(0), ((u64) rx_ring->dma >> 32));
1225 ew32(RDLEN(0), rx_ring->size);
1226 ew32(RDH(0), 0);
1227 ew32(RDT(0), 0);
bc7f75fa 1228 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
cef8c793
BA		 1229 E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_LPE |
1230 E1000_RCTL_SBP | E1000_RCTL_SECRC |
bc7f75fa
AK		 1231 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1232 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1233 ew32(RCTL, rctl);
1234
1235 for (i = 0; i < rx_ring->count; i++) {
5f450212 1236 union e1000_rx_desc_extended *rx_desc;
bc7f75fa
AK		 1237 struct sk_buff *skb;
1238
1239 skb = alloc_skb(2048 + NET_IP_ALIGN, GFP_KERNEL);
1240 if (!skb) {
1241 ret_val = 7;
1242 goto err_nomem;
1243 }
1244 skb_reserve(skb, NET_IP_ALIGN);
1245 rx_ring->buffer_info[i].skb = skb;
1246 rx_ring->buffer_info[i].dma =
0be3f55f
NN		 1247 dma_map_single(&pdev->dev, skb->data, 2048,
1248 DMA_FROM_DEVICE);
1249 if (dma_mapping_error(&pdev->dev,
1250 rx_ring->buffer_info[i].dma)) {
bc7f75fa
AK		 1251 ret_val = 8;
1252 goto err_nomem;
1253 }
5f450212
BA		 1254 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1255 rx_desc->read.buffer_addr =
1256 cpu_to_le64(rx_ring->buffer_info[i].dma);
bc7f75fa
AK		 1257 memset(skb->data, 0x00, skb->len);
1258 }
1259
1260 return 0;
1261
1262err_nomem:
1263 e1000_free_desc_rings(adapter);
1264 return ret_val;
1265}
1266
1267static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1268{
1269 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1270 e1e_wphy(&adapter->hw, 29, 0x001F);
1271 e1e_wphy(&adapter->hw, 30, 0x8FFC);
1272 e1e_wphy(&adapter->hw, 29, 0x001A);
1273 e1e_wphy(&adapter->hw, 30, 0x8FF0);
1274}
1275
1276static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1277{
1278 struct e1000_hw *hw = &adapter->hw;
1279 u32 ctrl_reg = 0;
97ac8cae 1280 u16 phy_reg = 0;
cbd006cb 1281 s32 ret_val = 0;
bc7f75fa 1282
318a94d6 1283 hw->mac.autoneg = 0;
bc7f75fa 1284
3af50481 1285 if (hw->phy.type == e1000_phy_ife) {
bc7f75fa
AK		 1286 /* force 100, set loopback */
1287 e1e_wphy(hw, PHY_CONTROL, 0x6100);
1288
1289 /* Now set up the MAC to the same speed/duplex as the PHY. */
3af50481 1290 ctrl_reg = er32(CTRL);
bc7f75fa
AK		 1291 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1292 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1293 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1294 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1295 E1000_CTRL_FD); /* Force Duplex to FULL */
3af50481
BA		 1296
1297 ew32(CTRL, ctrl_reg);
945a5151 1298 e1e_flush();
3af50481
BA		 1299 udelay(500);
1300
1301 return 0;
1302 }
1303
1304 /* Specific PHY configuration for loopback */
1305 switch (hw->phy.type) {
1306 case e1000_phy_m88:
1307 /* Auto-MDI/MDIX Off */
1308 e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1309 /* reset to update Auto-MDI/MDIX */
1310 e1e_wphy(hw, PHY_CONTROL, 0x9140);
1311 /* autoneg off */
1312 e1e_wphy(hw, PHY_CONTROL, 0x8140);
1313 break;
1314 case e1000_phy_gg82563:
1315 e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x1CC);
cef8c793 1316 break;
97ac8cae
BA		 1317 case e1000_phy_bm:
1318 /* Set Default MAC Interface speed to 1GB */
1319 e1e_rphy(hw, PHY_REG(2, 21), &phy_reg);
1320 phy_reg &= ~0x0007;
1321 phy_reg |= 0x006;
1322 e1e_wphy(hw, PHY_REG(2, 21), phy_reg);
1323 /* Assert SW reset for above settings to take effect */
1324 e1000e_commit_phy(hw);
1325 mdelay(1);
1326 /* Force Full Duplex */
1327 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1328 e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x000C);
1329 /* Set Link Up (in force link) */
1330 e1e_rphy(hw, PHY_REG(776, 16), &phy_reg);
1331 e1e_wphy(hw, PHY_REG(776, 16), phy_reg | 0x0040);
1332 /* Force Link */
1333 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1334 e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x0040);
1335 /* Set Early Link Enable */
1336 e1e_rphy(hw, PHY_REG(769, 20), &phy_reg);
1337 e1e_wphy(hw, PHY_REG(769, 20), phy_reg | 0x0400);
3af50481
BA		 1338 break;
1339 case e1000_phy_82577:
1340 case e1000_phy_82578:
1341 /* Workaround: K1 must be disabled for stable 1Gbps operation */
cbd006cb
BA		 1342 ret_val = hw->phy.ops.acquire(hw);
1343 if (ret_val) {
1344 e_err("Cannot setup 1Gbps loopback.\n");
1345 return ret_val;
1346 }
3af50481 1347 e1000_configure_k1_ich8lan(hw, false);
cbd006cb 1348 hw->phy.ops.release(hw);
3af50481 1349 break;
d3738bb8
BA		 1350 case e1000_phy_82579:
1351 /* Disable PHY energy detect power down */
1352 e1e_rphy(hw, PHY_REG(0, 21), &phy_reg);
1353 e1e_wphy(hw, PHY_REG(0, 21), phy_reg & ~(1 << 3));
1354 /* Disable full chip energy detect */
1355 e1e_rphy(hw, PHY_REG(776, 18), &phy_reg);
1356 e1e_wphy(hw, PHY_REG(776, 18), phy_reg | 1);
1357 /* Enable loopback on the PHY */
1358#define I82577_PHY_LBK_CTRL 19
1359 e1e_wphy(hw, I82577_PHY_LBK_CTRL, 0x8001);
1360 break;
cef8c793 1361 default:
3af50481
BA		 1362 break;
1363 }
bc7f75fa 1364
3af50481
BA		 1365 /* force 1000, set loopback */
1366 e1e_wphy(hw, PHY_CONTROL, 0x4140);
1367 mdelay(250);
cef8c793 1368
3af50481
BA		 1369 /* Now set up the MAC to the same speed/duplex as the PHY. */
1370 ctrl_reg = er32(CTRL);
1371 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1372 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1373 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1374 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1375 E1000_CTRL_FD); /* Force Duplex to FULL */
1376
1377 if (adapter->flags & FLAG_IS_ICH)
1378 ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */
bc7f75fa 1379
318a94d6
JK		 1380 if (hw->phy.media_type == e1000_media_type_copper &&
1381 hw->phy.type == e1000_phy_m88) {
bc7f75fa
AK		 1382 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1383 } else {
e921eb1a 1384 /* Set the ILOS bit on the fiber Nic if half duplex link is
ad68076e
BA		 1385 * detected.
1386 */
90da0669 1387 if ((er32(STATUS) & E1000_STATUS_FD) == 0)
bc7f75fa
AK		 1388 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1389 }
1390
1391 ew32(CTRL, ctrl_reg);
1392
e921eb1a 1393 /* Disable the receiver on the PHY so when a cable is plugged in, the
bc7f75fa
AK		 1394 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1395 */
318a94d6 1396 if (hw->phy.type == e1000_phy_m88)
bc7f75fa
AK		 1397 e1000_phy_disable_receiver(adapter);
1398
1399 udelay(500);
1400
1401 return 0;
1402}
1403
1404static int e1000_set_82571_fiber_loopback(struct e1000_adapter *adapter)
1405{
1406 struct e1000_hw *hw = &adapter->hw;
1407 u32 ctrl = er32(CTRL);
1408 int link = 0;
1409
1410 /* special requirements for 82571/82572 fiber adapters */
1411
e921eb1a 1412 /* jump through hoops to make sure link is up because serdes
ad68076e
BA		 1413 * link is hardwired up
1414 */
bc7f75fa
AK		 1415 ctrl |= E1000_CTRL_SLU;
1416 ew32(CTRL, ctrl);
1417
1418 /* disable autoneg */
1419 ctrl = er32(TXCW);
1420 ctrl &= ~(1 << 31);
1421 ew32(TXCW, ctrl);
1422
1423 link = (er32(STATUS) & E1000_STATUS_LU);
1424
1425 if (!link) {
1426 /* set invert loss of signal */
1427 ctrl = er32(CTRL);
1428 ctrl |= E1000_CTRL_ILOS;
1429 ew32(CTRL, ctrl);
1430 }
1431
e921eb1a 1432 /* special write to serdes control register to enable SerDes analog
ad68076e
BA		 1433 * loopback
1434 */
bc7f75fa
AK		 1435#define E1000_SERDES_LB_ON 0x410
1436 ew32(SCTL, E1000_SERDES_LB_ON);
945a5151 1437 e1e_flush();
1bba4386 1438 usleep_range(10000, 20000);
bc7f75fa
AK		 1439
1440 return 0;
1441}
1442
1443/* only call this for fiber/serdes connections to es2lan */
1444static int e1000_set_es2lan_mac_loopback(struct e1000_adapter *adapter)
1445{
1446 struct e1000_hw *hw = &adapter->hw;
1447 u32 ctrlext = er32(CTRL_EXT);
1448 u32 ctrl = er32(CTRL);
1449
e921eb1a 1450 /* save CTRL_EXT to restore later, reuse an empty variable (unused
ad68076e
BA		 1451 * on mac_type 80003es2lan)
1452 */
bc7f75fa
AK		 1453 adapter->tx_fifo_head = ctrlext;
1454
1455 /* clear the serdes mode bits, putting the device into mac loopback */
1456 ctrlext &= ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1457 ew32(CTRL_EXT, ctrlext);
1458
1459 /* force speed to 1000/FD, link up */
1460 ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100);
1461 ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX |
1462 E1000_CTRL_SPD_1000 | E1000_CTRL_FD);
1463 ew32(CTRL, ctrl);
1464
1465 /* set mac loopback */
1466 ctrl = er32(RCTL);
1467 ctrl |= E1000_RCTL_LBM_MAC;
1468 ew32(RCTL, ctrl);
1469
1470 /* set testing mode parameters (no need to reset later) */
1471#define KMRNCTRLSTA_OPMODE (0x1F << 16)
1472#define KMRNCTRLSTA_OPMODE_1GB_FD_GMII 0x0582
1473 ew32(KMRNCTRLSTA,
cef8c793 1474 (KMRNCTRLSTA_OPMODE | KMRNCTRLSTA_OPMODE_1GB_FD_GMII));
bc7f75fa
AK		 1475
1476 return 0;
1477}
1478
1479static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
1480{
1481 struct e1000_hw *hw = &adapter->hw;
1482 u32 rctl;
1483
318a94d6
JK		 1484 if (hw->phy.media_type == e1000_media_type_fiber ||
1485 hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa
AK		 1486 switch (hw->mac.type) {
1487 case e1000_80003es2lan:
1488 return e1000_set_es2lan_mac_loopback(adapter);
1489 break;
1490 case e1000_82571:
1491 case e1000_82572:
1492 return e1000_set_82571_fiber_loopback(adapter);
1493 break;
1494 default:
1495 rctl = er32(RCTL);
1496 rctl |= E1000_RCTL_LBM_TCVR;
1497 ew32(RCTL, rctl);
1498 return 0;
1499 }
318a94d6 1500 } else if (hw->phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 1501 return e1000_integrated_phy_loopback(adapter);
1502 }
1503
1504 return 7;
1505}
1506
1507static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
1508{
1509 struct e1000_hw *hw = &adapter->hw;
1510 u32 rctl;
1511 u16 phy_reg;
1512
1513 rctl = er32(RCTL);
1514 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1515 ew32(RCTL, rctl);
1516
1517 switch (hw->mac.type) {
1518 case e1000_80003es2lan:
318a94d6
JK		 1519 if (hw->phy.media_type == e1000_media_type_fiber ||
1520 hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa 1521 /* restore CTRL_EXT, stealing space from tx_fifo_head */
ad68076e 1522 ew32(CTRL_EXT, adapter->tx_fifo_head);
bc7f75fa
AK		 1523 adapter->tx_fifo_head = 0;
1524 }
1525 /* fall through */
1526 case e1000_82571:
1527 case e1000_82572:
318a94d6
JK		 1528 if (hw->phy.media_type == e1000_media_type_fiber ||
1529 hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa
AK		 1530#define E1000_SERDES_LB_OFF 0x400
1531 ew32(SCTL, E1000_SERDES_LB_OFF);
945a5151 1532 e1e_flush();
1bba4386 1533 usleep_range(10000, 20000);
bc7f75fa
AK		 1534 break;
1535 }
1536 /* Fall Through */
1537 default:
1538 hw->mac.autoneg = 1;
1539 if (hw->phy.type == e1000_phy_gg82563)
1540 e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x180);
1541 e1e_rphy(hw, PHY_CONTROL, &phy_reg);
1542 if (phy_reg & MII_CR_LOOPBACK) {
1543 phy_reg &= ~MII_CR_LOOPBACK;
1544 e1e_wphy(hw, PHY_CONTROL, phy_reg);
1545 e1000e_commit_phy(hw);
1546 }
1547 break;
1548 }
1549}
1550
1551static void e1000_create_lbtest_frame(struct sk_buff *skb,
1552 unsigned int frame_size)
1553{
1554 memset(skb->data, 0xFF, frame_size);
1555 frame_size &= ~1;
1556 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1557 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1558 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1559}
1560
1561static int e1000_check_lbtest_frame(struct sk_buff *skb,
1562 unsigned int frame_size)
1563{
1564 frame_size &= ~1;
1565 if (*(skb->data + 3) == 0xFF)
1566 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1567 (*(skb->data + frame_size / 2 + 12) == 0xAF))
1568 return 0;
1569 return 13;
1570}
1571
1572static int e1000_run_loopback_test(struct e1000_adapter *adapter)
1573{
1574 struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1575 struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1576 struct pci_dev *pdev = adapter->pdev;
1577 struct e1000_hw *hw = &adapter->hw;
1578 int i, j, k, l;
1579 int lc;
1580 int good_cnt;
1581 int ret_val = 0;
1582 unsigned long time;
1583
1e36052e 1584 ew32(RDT(0), rx_ring->count - 1);
bc7f75fa 1585
e921eb1a 1586 /* Calculate the loop count based on the largest descriptor ring
bc7f75fa
AK		 1587 * The idea is to wrap the largest ring a number of times using 64
1588 * send/receive pairs during each loop
1589 */
1590
1591 if (rx_ring->count <= tx_ring->count)
1592 lc = ((tx_ring->count / 64) * 2) + 1;
1593 else
1594 lc = ((rx_ring->count / 64) * 2) + 1;
1595
1596 k = 0;
1597 l = 0;
1598 for (j = 0; j <= lc; j++) { /* loop count loop */
1599 for (i = 0; i < 64; i++) { /* send the packets */
cef8c793
BA		 1600 e1000_create_lbtest_frame(tx_ring->buffer_info[k].skb,
1601 1024);
0be3f55f 1602 dma_sync_single_for_device(&pdev->dev,
bc7f75fa
AK		 1603 tx_ring->buffer_info[k].dma,
1604 tx_ring->buffer_info[k].length,
0be3f55f 1605 DMA_TO_DEVICE);
bc7f75fa
AK		 1606 k++;
1607 if (k == tx_ring->count)
1608 k = 0;
1609 }
1e36052e 1610 ew32(TDT(0), k);
945a5151 1611 e1e_flush();
bc7f75fa
AK		 1612 msleep(200);
1613 time = jiffies; /* set the start time for the receive */
1614 good_cnt = 0;
1615 do { /* receive the sent packets */
0be3f55f 1616 dma_sync_single_for_cpu(&pdev->dev,
bc7f75fa 1617 rx_ring->buffer_info[l].dma, 2048,
0be3f55f 1618 DMA_FROM_DEVICE);
bc7f75fa
AK		 1619
1620 ret_val = e1000_check_lbtest_frame(
1621 rx_ring->buffer_info[l].skb, 1024);
1622 if (!ret_val)
1623 good_cnt++;
1624 l++;
1625 if (l == rx_ring->count)
1626 l = 0;
e921eb1a 1627 /* time + 20 msecs (200 msecs on 2.4) is more than
bc7f75fa
AK		 1628 * enough time to complete the receives, if it's
1629 * exceeded, break and error off
1630 */
1631 } while ((good_cnt < 64) && !time_after(jiffies, time + 20));
1632 if (good_cnt != 64) {
1633 ret_val = 13; /* ret_val is the same as mis-compare */
1634 break;
1635 }
cef8c793 1636 if (jiffies >= (time + 20)) {
bc7f75fa
AK		 1637 ret_val = 14; /* error code for time out error */
1638 break;
1639 }
1640 } /* end loop count loop */
1641 return ret_val;
1642}
1643
1644static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
1645{
44abd5c1
BA		 1646 struct e1000_hw *hw = &adapter->hw;
1647
e921eb1a 1648 /* PHY loopback cannot be performed if SoL/IDER sessions are active */
470a5420
BA		 1649 if (hw->phy.ops.check_reset_block &&
1650 hw->phy.ops.check_reset_block(hw)) {
44defeb3 1651 e_err("Cannot do PHY loopback test when SoL/IDER is active.\n");
bc7f75fa
AK		 1652 *data = 0;
1653 goto out;
1654 }
1655
1656 *data = e1000_setup_desc_rings(adapter);
e265522c 1657 if (*data)
bc7f75fa
AK		 1658 goto out;
1659
1660 *data = e1000_setup_loopback_test(adapter);
e265522c 1661 if (*data)
bc7f75fa
AK		 1662 goto err_loopback;
1663
1664 *data = e1000_run_loopback_test(adapter);
1665 e1000_loopback_cleanup(adapter);
1666
1667err_loopback:
1668 e1000_free_desc_rings(adapter);
1669out:
1670 return *data;
1671}
1672
1673static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
1674{
1675 struct e1000_hw *hw = &adapter->hw;
1676
1677 *data = 0;
318a94d6 1678 if (hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa 1679 int i = 0;
612e244c 1680 hw->mac.serdes_has_link = false;
bc7f75fa 1681
e921eb1a 1682 /* On some blade server designs, link establishment
ad68076e
BA		 1683 * could take as long as 2-3 minutes
1684 */
bc7f75fa
AK		 1685 do {
1686 hw->mac.ops.check_for_link(hw);
1687 if (hw->mac.serdes_has_link)
1688 return *data;
1689 msleep(20);
1690 } while (i++ < 3750);
1691
1692 *data = 1;
1693 } else {
1694 hw->mac.ops.check_for_link(hw);
1695 if (hw->mac.autoneg)
e921eb1a 1696 /* On some Phy/switch combinations, link establishment
5661aeb0
BA		 1697 * can take a few seconds more than expected.
1698 */
1699 msleep(5000);
bc7f75fa 1700
5661aeb0 1701 if (!(er32(STATUS) & E1000_STATUS_LU))
bc7f75fa
AK		 1702 *data = 1;
1703 }
1704 return *data;
1705}
1706
b9f2c044 1707static int e1000e_get_sset_count(struct net_device *netdev, int sset)
bc7f75fa 1708{
b9f2c044
JG		 1709 switch (sset) {
1710 case ETH_SS_TEST:
1711 return E1000_TEST_LEN;
1712 case ETH_SS_STATS:
1713 return E1000_STATS_LEN;
1714 default:
1715 return -EOPNOTSUPP;
1716 }
bc7f75fa
AK		 1717}
1718
1719static void e1000_diag_test(struct net_device *netdev,
1720 struct ethtool_test *eth_test, u64 *data)
1721{
1722 struct e1000_adapter *adapter = netdev_priv(netdev);
1723 u16 autoneg_advertised;
1724 u8 forced_speed_duplex;
1725 u8 autoneg;
1726 bool if_running = netif_running(netdev);
1727
1728 set_bit(__E1000_TESTING, &adapter->state);
31dbe5b4
BA		 1729
1730 if (!if_running) {
1731 /* Get control of and reset hardware */
1732 if (adapter->flags & FLAG_HAS_AMT)
1733 e1000e_get_hw_control(adapter);
1734
1735 e1000e_power_up_phy(adapter);
1736
1737 adapter->hw.phy.autoneg_wait_to_complete = 1;
1738 e1000e_reset(adapter);
1739 adapter->hw.phy.autoneg_wait_to_complete = 0;
1740 }
1741
bc7f75fa
AK		 1742 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1743 /* Offline tests */
1744
1745 /* save speed, duplex, autoneg settings */
1746 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1747 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1748 autoneg = adapter->hw.mac.autoneg;
1749
44defeb3 1750 e_info("offline testing starting\n");
bc7f75fa 1751
bc7f75fa
AK		 1752 if (if_running)
1753 /* indicate we're in test mode */
1754 dev_close(netdev);
bc7f75fa
AK		 1755
1756 if (e1000_reg_test(adapter, &data[0]))
1757 eth_test->flags |= ETH_TEST_FL_FAILED;
1758
1759 e1000e_reset(adapter);
1760 if (e1000_eeprom_test(adapter, &data[1]))
1761 eth_test->flags |= ETH_TEST_FL_FAILED;
1762
1763 e1000e_reset(adapter);
1764 if (e1000_intr_test(adapter, &data[2]))
1765 eth_test->flags |= ETH_TEST_FL_FAILED;
1766
1767 e1000e_reset(adapter);
bc7f75fa
AK		 1768 if (e1000_loopback_test(adapter, &data[3]))
1769 eth_test->flags |= ETH_TEST_FL_FAILED;
1770
c6ce3854
CW		 1771 /* force this routine to wait until autoneg complete/timeout */
1772 adapter->hw.phy.autoneg_wait_to_complete = 1;
1773 e1000e_reset(adapter);
1774 adapter->hw.phy.autoneg_wait_to_complete = 0;
1775
1776 if (e1000_link_test(adapter, &data[4]))
1777 eth_test->flags |= ETH_TEST_FL_FAILED;
1778
bc7f75fa
AK		 1779 /* restore speed, duplex, autoneg settings */
1780 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1781 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1782 adapter->hw.mac.autoneg = autoneg;
bc7f75fa 1783 e1000e_reset(adapter);
bc7f75fa
AK		 1784
1785 clear_bit(__E1000_TESTING, &adapter->state);
1786 if (if_running)
1787 dev_open(netdev);
1788 } else {
31dbe5b4 1789 /* Online tests */
11b08be8 1790
44defeb3 1791 e_info("online testing starting\n");
bc7f75fa 1792
31dbe5b4 1793 /* register, eeprom, intr and loopback tests not run online */
bc7f75fa
AK		 1794 data[0] = 0;
1795 data[1] = 0;
1796 data[2] = 0;
1797 data[3] = 0;
1798
31dbe5b4
BA		 1799 if (e1000_link_test(adapter, &data[4]))
1800 eth_test->flags |= ETH_TEST_FL_FAILED;
11b08be8 1801
bc7f75fa
AK		 1802 clear_bit(__E1000_TESTING, &adapter->state);
1803 }
31dbe5b4
BA		 1804
1805 if (!if_running) {
1806 e1000e_reset(adapter);
1807
1808 if (adapter->flags & FLAG_HAS_AMT)
1809 e1000e_release_hw_control(adapter);
1810 }
1811
bc7f75fa
AK		 1812 msleep_interruptible(4 * 1000);
1813}
1814
1815static void e1000_get_wol(struct net_device *netdev,
1816 struct ethtool_wolinfo *wol)
1817{
1818 struct e1000_adapter *adapter = netdev_priv(netdev);
1819
1820 wol->supported = 0;
1821 wol->wolopts = 0;
1822
6ff68026
RW		 1823 if (!(adapter->flags & FLAG_HAS_WOL) ||
1824 !device_can_wakeup(&adapter->pdev->dev))
bc7f75fa
AK		 1825 return;
1826
1827 wol->supported = WAKE_UCAST | WAKE_MCAST |
4a29e155 1828 WAKE_BCAST | WAKE_MAGIC | WAKE_PHY;
bc7f75fa
AK		 1829
1830 /* apply any specific unsupported masks here */
1831 if (adapter->flags & FLAG_NO_WAKE_UCAST) {
1832 wol->supported &= ~WAKE_UCAST;
1833
1834 if (adapter->wol & E1000_WUFC_EX)
6ad65145 1835 e_err("Interface does not support directed (unicast) frame wake-up packets\n");
bc7f75fa
AK		 1836 }
1837
1838 if (adapter->wol & E1000_WUFC_EX)
1839 wol->wolopts |= WAKE_UCAST;
1840 if (adapter->wol & E1000_WUFC_MC)
1841 wol->wolopts |= WAKE_MCAST;
1842 if (adapter->wol & E1000_WUFC_BC)
1843 wol->wolopts |= WAKE_BCAST;
1844 if (adapter->wol & E1000_WUFC_MAG)
1845 wol->wolopts |= WAKE_MAGIC;
efb90e43
MW		 1846 if (adapter->wol & E1000_WUFC_LNKC)
1847 wol->wolopts |= WAKE_PHY;
bc7f75fa
AK		 1848}
1849
4a29e155 1850static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
bc7f75fa
AK		 1851{
1852 struct e1000_adapter *adapter = netdev_priv(netdev);
1853
6ff68026 1854 if (!(adapter->flags & FLAG_HAS_WOL) ||
1fbfca32
BA		 1855 !device_can_wakeup(&adapter->pdev->dev) ||
1856 (wol->wolopts & ~(WAKE_UCAST | WAKE_MCAST | WAKE_BCAST |
4a29e155 1857 WAKE_MAGIC | WAKE_PHY)))
1fbfca32 1858 return -EOPNOTSUPP;
bc7f75fa
AK		 1859
1860 /* these settings will always override what we currently have */
1861 adapter->wol = 0;
1862
1863 if (wol->wolopts & WAKE_UCAST)
1864 adapter->wol |= E1000_WUFC_EX;
1865 if (wol->wolopts & WAKE_MCAST)
1866 adapter->wol |= E1000_WUFC_MC;
1867 if (wol->wolopts & WAKE_BCAST)
1868 adapter->wol |= E1000_WUFC_BC;
1869 if (wol->wolopts & WAKE_MAGIC)
1870 adapter->wol |= E1000_WUFC_MAG;
efb90e43
MW		 1871 if (wol->wolopts & WAKE_PHY)
1872 adapter->wol |= E1000_WUFC_LNKC;
bc7f75fa 1873
6ff68026
RW		 1874 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1875
bc7f75fa
AK		 1876 return 0;
1877}
1878
dbf80dcb
BA		 1879static int e1000_set_phys_id(struct net_device *netdev,
1880 enum ethtool_phys_id_state state)
bc7f75fa
AK		 1881{
1882 struct e1000_adapter *adapter = netdev_priv(netdev);
4662e82b 1883 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1884
dbf80dcb
BA		 1885 switch (state) {
1886 case ETHTOOL_ID_ACTIVE:
1887 if (!hw->mac.ops.blink_led)
1888 return 2; /* cycle on/off twice per second */
bc7f75fa 1889
dbf80dcb
BA		 1890 hw->mac.ops.blink_led(hw);
1891 break;
1892
1893 case ETHTOOL_ID_INACTIVE:
4662e82b
BA		 1894 if (hw->phy.type == e1000_phy_ife)
1895 e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, 0);
dbf80dcb
BA		 1896 hw->mac.ops.led_off(hw);
1897 hw->mac.ops.cleanup_led(hw);
1898 break;
bc7f75fa 1899
dbf80dcb 1900 case ETHTOOL_ID_ON:
f23efdff 1901 hw->mac.ops.led_on(hw);
dbf80dcb 1902 break;
bc7f75fa 1903
dbf80dcb 1904 case ETHTOOL_ID_OFF:
f23efdff 1905 hw->mac.ops.led_off(hw);
dbf80dcb
BA		 1906 break;
1907 }
bc7f75fa
AK		 1908 return 0;
1909}
1910
de5b3077
AK		 1911static int e1000_get_coalesce(struct net_device *netdev,
1912 struct ethtool_coalesce *ec)
1913{
1914 struct e1000_adapter *adapter = netdev_priv(netdev);
1915
eab2abf5 1916 if (adapter->itr_setting <= 4)
de5b3077
AK		 1917 ec->rx_coalesce_usecs = adapter->itr_setting;
1918 else
1919 ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
1920
1921 return 0;
1922}
1923
1924static int e1000_set_coalesce(struct net_device *netdev,
1925 struct ethtool_coalesce *ec)
1926{
1927 struct e1000_adapter *adapter = netdev_priv(netdev);
de5b3077
AK		 1928
1929 if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
eab2abf5 1930 ((ec->rx_coalesce_usecs > 4) &&
de5b3077
AK		 1931 (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
1932 (ec->rx_coalesce_usecs == 2))
1933 return -EINVAL;
1934
eab2abf5 1935 if (ec->rx_coalesce_usecs == 4) {
06a402ef
BA		 1936 adapter->itr_setting = 4;
1937 adapter->itr = adapter->itr_setting;
eab2abf5 1938 } else if (ec->rx_coalesce_usecs <= 3) {
de5b3077
AK		 1939 adapter->itr = 20000;
1940 adapter->itr_setting = ec->rx_coalesce_usecs;
1941 } else {
1942 adapter->itr = (1000000 / ec->rx_coalesce_usecs);
1943 adapter->itr_setting = adapter->itr & ~3;
1944 }
1945
1946 if (adapter->itr_setting != 0)
22a4cca2 1947 e1000e_write_itr(adapter, adapter->itr);
de5b3077 1948 else
22a4cca2 1949 e1000e_write_itr(adapter, 0);
de5b3077
AK		 1950
1951 return 0;
1952}
1953
bc7f75fa
AK		 1954static int e1000_nway_reset(struct net_device *netdev)
1955{
1956 struct e1000_adapter *adapter = netdev_priv(netdev);
5962bc21
BA		 1957
1958 if (!netif_running(netdev))
1959 return -EAGAIN;
1960
1961 if (!adapter->hw.mac.autoneg)
1962 return -EINVAL;
1963
1964 e1000e_reinit_locked(adapter);
1965
bc7f75fa
AK		 1966 return 0;
1967}
1968
bc7f75fa
AK		 1969static void e1000_get_ethtool_stats(struct net_device *netdev,
1970 struct ethtool_stats *stats,
1971 u64 *data)
1972{
1973 struct e1000_adapter *adapter = netdev_priv(netdev);
67fd4fcb 1974 struct rtnl_link_stats64 net_stats;
bc7f75fa 1975 int i;
e0f36a95 1976 char *p = NULL;
bc7f75fa 1977
67fd4fcb 1978 e1000e_get_stats64(netdev, &net_stats);
bc7f75fa 1979 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
e0f36a95
AK		 1980 switch (e1000_gstrings_stats[i].type) {
1981 case NETDEV_STATS:
67fd4fcb 1982 p = (char *) &net_stats +
e0f36a95
AK		 1983 e1000_gstrings_stats[i].stat_offset;
1984 break;
1985 case E1000_STATS:
1986 p = (char *) adapter +
1987 e1000_gstrings_stats[i].stat_offset;
1988 break;
61c75816
BA		 1989 default:
1990 data[i] = 0;
1991 continue;
e0f36a95
AK		 1992 }
1993
bc7f75fa
AK		 1994 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1995 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1996 }
1997}
1998
1999static void e1000_get_strings(struct net_device *netdev, u32 stringset,
2000 u8 *data)
2001{
2002 u8 *p = data;
2003 int i;
2004
2005 switch (stringset) {
2006 case ETH_SS_TEST:
5c1bda0a 2007 memcpy(data, e1000_gstrings_test, sizeof(e1000_gstrings_test));
bc7f75fa
AK		 2008 break;
2009 case ETH_SS_STATS:
2010 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
2011 memcpy(p, e1000_gstrings_stats[i].stat_string,
2012 ETH_GSTRING_LEN);
2013 p += ETH_GSTRING_LEN;
2014 }
2015 break;
2016 }
2017}
2018
70495a50
BA		 2019static int e1000_get_rxnfc(struct net_device *netdev,
2020 struct ethtool_rxnfc *info, u32 *rule_locs)
2021{
2022 info->data = 0;
2023
2024 switch (info->cmd) {
2025 case ETHTOOL_GRXFH: {
2026 struct e1000_adapter *adapter = netdev_priv(netdev);
2027 struct e1000_hw *hw = &adapter->hw;
2028 u32 mrqc = er32(MRQC);
2029
2030 if (!(mrqc & E1000_MRQC_RSS_FIELD_MASK))
2031 return 0;
2032
2033 switch (info->flow_type) {
2034 case TCP_V4_FLOW:
2035 if (mrqc & E1000_MRQC_RSS_FIELD_IPV4_TCP)
2036 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2037 /* fall through */
2038 case UDP_V4_FLOW:
2039 case SCTP_V4_FLOW:
2040 case AH_ESP_V4_FLOW:
2041 case IPV4_FLOW:
2042 if (mrqc & E1000_MRQC_RSS_FIELD_IPV4)
2043 info->data |= RXH_IP_SRC | RXH_IP_DST;
2044 break;
2045 case TCP_V6_FLOW:
2046 if (mrqc & E1000_MRQC_RSS_FIELD_IPV6_TCP)
2047 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2048 /* fall through */
2049 case UDP_V6_FLOW:
2050 case SCTP_V6_FLOW:
2051 case AH_ESP_V6_FLOW:
2052 case IPV6_FLOW:
2053 if (mrqc & E1000_MRQC_RSS_FIELD_IPV6)
2054 info->data |= RXH_IP_SRC | RXH_IP_DST;
2055 break;
2056 default:
2057 break;
2058 }
2059 return 0;
2060 }
2061 default:
2062 return -EOPNOTSUPP;
2063 }
2064}
2065
203e4151
BA		 2066static int e1000e_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2067{
2068 struct e1000_adapter *adapter = netdev_priv(netdev);
2069 struct e1000_hw *hw = &adapter->hw;
2070 u16 cap_addr, adv_addr, lpa_addr, pcs_stat_addr, phy_data, lpi_ctrl;
2071 u32 status, ret_val;
2072
2073 if (!(adapter->flags & FLAG_IS_ICH) ||
2074 !(adapter->flags2 & FLAG2_HAS_EEE))
2075 return -EOPNOTSUPP;
2076
2077 switch (hw->phy.type) {
2078 case e1000_phy_82579:
2079 cap_addr = I82579_EEE_CAPABILITY;
2080 adv_addr = I82579_EEE_ADVERTISEMENT;
2081 lpa_addr = I82579_EEE_LP_ABILITY;
2082 pcs_stat_addr = I82579_EEE_PCS_STATUS;
2083 break;
2084 case e1000_phy_i217:
2085 cap_addr = I217_EEE_CAPABILITY;
2086 adv_addr = I217_EEE_ADVERTISEMENT;
2087 lpa_addr = I217_EEE_LP_ABILITY;
2088 pcs_stat_addr = I217_EEE_PCS_STATUS;
2089 break;
2090 default:
2091 return -EOPNOTSUPP;
2092 }
2093
2094 ret_val = hw->phy.ops.acquire(hw);
2095 if (ret_val)
2096 return -EBUSY;
2097
2098 /* EEE Capability */
2099 ret_val = e1000_read_emi_reg_locked(hw, cap_addr, &phy_data);
2100 if (ret_val)
2101 goto release;
2102 edata->supported = mmd_eee_cap_to_ethtool_sup_t(phy_data);
2103
2104 /* EEE Advertised */
2105 ret_val = e1000_read_emi_reg_locked(hw, adv_addr, &phy_data);
2106 if (ret_val)
2107 goto release;
2108 edata->advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2109
2110 /* EEE Link Partner Advertised */
2111 ret_val = e1000_read_emi_reg_locked(hw, lpa_addr, &phy_data);
2112 if (ret_val)
2113 goto release;
2114 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2115
2116 /* EEE PCS Status */
2117 ret_val = e1000_read_emi_reg_locked(hw, pcs_stat_addr, &phy_data);
2118 if (hw->phy.type == e1000_phy_82579)
2119 phy_data <<= 8;
2120
2121release:
2122 hw->phy.ops.release(hw);
2123 if (ret_val)
2124 return -ENODATA;
2125
2126 e1e_rphy(hw, I82579_LPI_CTRL, &lpi_ctrl);
2127 status = er32(STATUS);
2128
2129 /* Result of the EEE auto negotiation - there is no register that
2130 * has the status of the EEE negotiation so do a best-guess based
2131 * on whether both Tx and Rx LPI indications have been received or
2132 * base it on the link speed, the EEE advertised speeds on both ends
2133 * and the speeds on which EEE is enabled locally.
2134 */
2135 if (((phy_data & E1000_EEE_TX_LPI_RCVD) &&
2136 (phy_data & E1000_EEE_RX_LPI_RCVD)) ||
2137 ((status & E1000_STATUS_SPEED_100) &&
2138 (edata->advertised & ADVERTISED_100baseT_Full) &&
2139 (edata->lp_advertised & ADVERTISED_100baseT_Full) &&
2140 (lpi_ctrl & I82579_LPI_CTRL_100_ENABLE)) ||
2141 ((status & E1000_STATUS_SPEED_1000) &&
2142 (edata->advertised & ADVERTISED_1000baseT_Full) &&
2143 (edata->lp_advertised & ADVERTISED_1000baseT_Full) &&
2144 (lpi_ctrl & I82579_LPI_CTRL_1000_ENABLE)))
2145 edata->eee_active = true;
2146
2147 edata->eee_enabled = !hw->dev_spec.ich8lan.eee_disable;
2148 edata->tx_lpi_enabled = true;
2149 edata->tx_lpi_timer = er32(LPIC) >> E1000_LPIC_LPIET_SHIFT;
2150
2151 return 0;
2152}
2153
2154static int e1000e_set_eee(struct net_device *netdev, struct ethtool_eee *edata)
2155{
2156 struct e1000_adapter *adapter = netdev_priv(netdev);
2157 struct e1000_hw *hw = &adapter->hw;
2158 struct ethtool_eee eee_curr;
2159 s32 ret_val;
2160
2161 if (!(adapter->flags & FLAG_IS_ICH) ||
2162 !(adapter->flags2 & FLAG2_HAS_EEE))
2163 return -EOPNOTSUPP;
2164
2165 ret_val = e1000e_get_eee(netdev, &eee_curr);
2166 if (ret_val)
2167 return ret_val;
2168
2169 if (eee_curr.advertised != edata->advertised) {
2170 e_err("Setting EEE advertisement is not supported\n");
2171 return -EINVAL;
2172 }
2173
2174 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
2175 e_err("Setting EEE tx-lpi is not supported\n");
2176 return -EINVAL;
2177 }
2178
2179 if (eee_curr.tx_lpi_timer != edata->tx_lpi_timer) {
2180 e_err("Setting EEE Tx LPI timer is not supported\n");
2181 return -EINVAL;
2182 }
2183
2184 if (hw->dev_spec.ich8lan.eee_disable != !edata->eee_enabled) {
2185 hw->dev_spec.ich8lan.eee_disable = !edata->eee_enabled;
2186
2187 /* reset the link */
2188 if (netif_running(netdev))
2189 e1000e_reinit_locked(adapter);
2190 else
2191 e1000e_reset(adapter);
2192 }
2193
2194 return 0;
2195}
2196
b67e1913
BA		 2197static int e1000e_get_ts_info(struct net_device *netdev,
2198 struct ethtool_ts_info *info)
2199{
2200 struct e1000_adapter *adapter = netdev_priv(netdev);
2201
2202 ethtool_op_get_ts_info(netdev, info);
2203
2204 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
2205 return 0;
2206
2207 info->so_timestamping |= (SOF_TIMESTAMPING_TX_HARDWARE |
2208 SOF_TIMESTAMPING_RX_HARDWARE |
2209 SOF_TIMESTAMPING_RAW_HARDWARE);
2210
2211 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
2212
2213 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
d89777bf
BA		 2214 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2215 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2216 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2217 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
2218 (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2219 (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
2220 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
2221 (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
2222 (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
b67e1913
BA		 2223 (1 << HWTSTAMP_FILTER_ALL));
2224
d89777bf
BA		 2225 if (adapter->ptp_clock)
2226 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2227
b67e1913
BA		 2228 return 0;
2229}
2230
bc7f75fa
AK		 2231static const struct ethtool_ops e1000_ethtool_ops = {
2232 .get_settings = e1000_get_settings,
2233 .set_settings = e1000_set_settings,
2234 .get_drvinfo = e1000_get_drvinfo,
2235 .get_regs_len = e1000_get_regs_len,
2236 .get_regs = e1000_get_regs,
2237 .get_wol = e1000_get_wol,
2238 .set_wol = e1000_set_wol,
2239 .get_msglevel = e1000_get_msglevel,
2240 .set_msglevel = e1000_set_msglevel,
2241 .nway_reset = e1000_nway_reset,
ed4ba4b5 2242 .get_link = ethtool_op_get_link,
bc7f75fa
AK		 2243 .get_eeprom_len = e1000_get_eeprom_len,
2244 .get_eeprom = e1000_get_eeprom,
2245 .set_eeprom = e1000_set_eeprom,
2246 .get_ringparam = e1000_get_ringparam,
2247 .set_ringparam = e1000_set_ringparam,
2248 .get_pauseparam = e1000_get_pauseparam,
2249 .set_pauseparam = e1000_set_pauseparam,
bc7f75fa
AK		 2250 .self_test = e1000_diag_test,
2251 .get_strings = e1000_get_strings,
dbf80dcb 2252 .set_phys_id = e1000_set_phys_id,
bc7f75fa 2253 .get_ethtool_stats = e1000_get_ethtool_stats,
b9f2c044 2254 .get_sset_count = e1000e_get_sset_count,
de5b3077
AK		 2255 .get_coalesce = e1000_get_coalesce,
2256 .set_coalesce = e1000_set_coalesce,
70495a50 2257 .get_rxnfc = e1000_get_rxnfc,
b67e1913 2258 .get_ts_info = e1000e_get_ts_info,
203e4151
BA		 2259 .get_eee = e1000e_get_eee,
2260 .set_eee = e1000e_set_eee,
bc7f75fa
AK		 2261};
2262
2263void e1000e_set_ethtool_ops(struct net_device *netdev)
2264{
2265 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
2266}
Linux 6.x block layer and io_uring tree(s)