treewide: kmalloc() -> kmalloc_array()
[linux-block.git] / drivers / net / ethernet / intel / e1000e / ethtool.c
CommitLineData
ae06c70b 1// SPDX-License-Identifier: GPL-2.0
51dce24b 2/* Copyright(c) 1999 - 2018 Intel Corporation. */
bc7f75fa
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3
4/* ethtool support for e1000 */
5
6#include <linux/netdevice.h>
9fb7a5f7 7#include <linux/interrupt.h>
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8#include <linux/ethtool.h>
9#include <linux/pci.h>
5a0e3ad6 10#include <linux/slab.h>
bc7f75fa 11#include <linux/delay.h>
c85c21ad 12#include <linux/vmalloc.h>
e60b22c5 13#include <linux/pm_runtime.h>
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14
15#include "e1000.h"
16
362e20ca 17enum { NETDEV_STATS, E1000_STATS };
e0f36a95 18
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19struct e1000_stats {
20 char stat_string[ETH_GSTRING_LEN];
e0f36a95 21 int type;
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22 int sizeof_stat;
23 int stat_offset;
24};
25
f0f1a172 26#define E1000_STAT(str, m) { \
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JK
27 .stat_string = str, \
28 .type = E1000_STATS, \
29 .sizeof_stat = sizeof(((struct e1000_adapter *)0)->m), \
30 .stat_offset = offsetof(struct e1000_adapter, m) }
f0f1a172 31#define E1000_NETDEV_STAT(str, m) { \
67fd4fcb
JK
32 .stat_string = str, \
33 .type = NETDEV_STATS, \
34 .sizeof_stat = sizeof(((struct rtnl_link_stats64 *)0)->m), \
35 .stat_offset = offsetof(struct rtnl_link_stats64, m) }
e0f36a95 36
bc7f75fa 37static const struct e1000_stats e1000_gstrings_stats[] = {
f0f1a172
BA
38 E1000_STAT("rx_packets", stats.gprc),
39 E1000_STAT("tx_packets", stats.gptc),
40 E1000_STAT("rx_bytes", stats.gorc),
41 E1000_STAT("tx_bytes", stats.gotc),
42 E1000_STAT("rx_broadcast", stats.bprc),
43 E1000_STAT("tx_broadcast", stats.bptc),
44 E1000_STAT("rx_multicast", stats.mprc),
45 E1000_STAT("tx_multicast", stats.mptc),
67fd4fcb
JK
46 E1000_NETDEV_STAT("rx_errors", rx_errors),
47 E1000_NETDEV_STAT("tx_errors", tx_errors),
48 E1000_NETDEV_STAT("tx_dropped", tx_dropped),
f0f1a172
BA
49 E1000_STAT("multicast", stats.mprc),
50 E1000_STAT("collisions", stats.colc),
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51 E1000_NETDEV_STAT("rx_length_errors", rx_length_errors),
52 E1000_NETDEV_STAT("rx_over_errors", rx_over_errors),
f0f1a172 53 E1000_STAT("rx_crc_errors", stats.crcerrs),
67fd4fcb 54 E1000_NETDEV_STAT("rx_frame_errors", rx_frame_errors),
f0f1a172
BA
55 E1000_STAT("rx_no_buffer_count", stats.rnbc),
56 E1000_STAT("rx_missed_errors", stats.mpc),
57 E1000_STAT("tx_aborted_errors", stats.ecol),
58 E1000_STAT("tx_carrier_errors", stats.tncrs),
67fd4fcb
JK
59 E1000_NETDEV_STAT("tx_fifo_errors", tx_fifo_errors),
60 E1000_NETDEV_STAT("tx_heartbeat_errors", tx_heartbeat_errors),
f0f1a172
BA
61 E1000_STAT("tx_window_errors", stats.latecol),
62 E1000_STAT("tx_abort_late_coll", stats.latecol),
63 E1000_STAT("tx_deferred_ok", stats.dc),
64 E1000_STAT("tx_single_coll_ok", stats.scc),
65 E1000_STAT("tx_multi_coll_ok", stats.mcc),
66 E1000_STAT("tx_timeout_count", tx_timeout_count),
67 E1000_STAT("tx_restart_queue", restart_queue),
68 E1000_STAT("rx_long_length_errors", stats.roc),
69 E1000_STAT("rx_short_length_errors", stats.ruc),
70 E1000_STAT("rx_align_errors", stats.algnerrc),
71 E1000_STAT("tx_tcp_seg_good", stats.tsctc),
72 E1000_STAT("tx_tcp_seg_failed", stats.tsctfc),
73 E1000_STAT("rx_flow_control_xon", stats.xonrxc),
74 E1000_STAT("rx_flow_control_xoff", stats.xoffrxc),
75 E1000_STAT("tx_flow_control_xon", stats.xontxc),
76 E1000_STAT("tx_flow_control_xoff", stats.xofftxc),
f0f1a172
BA
77 E1000_STAT("rx_csum_offload_good", hw_csum_good),
78 E1000_STAT("rx_csum_offload_errors", hw_csum_err),
79 E1000_STAT("rx_header_split", rx_hdr_split),
80 E1000_STAT("alloc_rx_buff_failed", alloc_rx_buff_failed),
81 E1000_STAT("tx_smbus", stats.mgptc),
82 E1000_STAT("rx_smbus", stats.mgprc),
83 E1000_STAT("dropped_smbus", stats.mgpdc),
84 E1000_STAT("rx_dma_failed", rx_dma_failed),
85 E1000_STAT("tx_dma_failed", tx_dma_failed),
b67e1913 86 E1000_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
94fb848b
BA
87 E1000_STAT("uncorr_ecc_errors", uncorr_errors),
88 E1000_STAT("corr_ecc_errors", corr_errors),
59c871c5 89 E1000_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
cff57141 90 E1000_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped),
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91};
92
c00acf46 93#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
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94#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN)
95static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
96 "Register test (offline)", "Eeprom test (offline)",
97 "Interrupt test (offline)", "Loopback test (offline)",
98 "Link test (on/offline)"
99};
fc830b78 100
ad68076e 101#define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
bc7f75fa 102
fb052fdd
PR
103static int e1000_get_link_ksettings(struct net_device *netdev,
104 struct ethtool_link_ksettings *cmd)
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105{
106 struct e1000_adapter *adapter = netdev_priv(netdev);
107 struct e1000_hw *hw = &adapter->hw;
fb052fdd 108 u32 speed, supported, advertising;
bc7f75fa 109
318a94d6 110 if (hw->phy.media_type == e1000_media_type_copper) {
fb052fdd
PR
111 supported = (SUPPORTED_10baseT_Half |
112 SUPPORTED_10baseT_Full |
113 SUPPORTED_100baseT_Half |
114 SUPPORTED_100baseT_Full |
115 SUPPORTED_1000baseT_Full |
116 SUPPORTED_Autoneg |
117 SUPPORTED_TP);
bc7f75fa 118 if (hw->phy.type == e1000_phy_ife)
fb052fdd
PR
119 supported &= ~SUPPORTED_1000baseT_Full;
120 advertising = ADVERTISED_TP;
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121
122 if (hw->mac.autoneg == 1) {
fb052fdd 123 advertising |= ADVERTISED_Autoneg;
bc7f75fa 124 /* the e1000 autoneg seems to match ethtool nicely */
fb052fdd 125 advertising |= hw->phy.autoneg_advertised;
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126 }
127
fb052fdd
PR
128 cmd->base.port = PORT_TP;
129 cmd->base.phy_address = hw->phy.addr;
bc7f75fa 130 } else {
fb052fdd
PR
131 supported = (SUPPORTED_1000baseT_Full |
132 SUPPORTED_FIBRE |
133 SUPPORTED_Autoneg);
bc7f75fa 134
fb052fdd
PR
135 advertising = (ADVERTISED_1000baseT_Full |
136 ADVERTISED_FIBRE |
137 ADVERTISED_Autoneg);
bc7f75fa 138
fb052fdd 139 cmd->base.port = PORT_FIBRE;
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140 }
141
537fae01 142 speed = SPEED_UNKNOWN;
fb052fdd 143 cmd->base.duplex = DUPLEX_UNKNOWN;
0c6bdb30
BA
144
145 if (netif_running(netdev)) {
146 if (netif_carrier_ok(netdev)) {
70739497 147 speed = adapter->link_speed;
fb052fdd 148 cmd->base.duplex = adapter->link_duplex - 1;
0c6bdb30 149 }
3ef672ab 150 } else if (!pm_runtime_suspended(netdev->dev.parent)) {
0c6bdb30 151 u32 status = er32(STATUS);
6cf08d1c 152
0c6bdb30
BA
153 if (status & E1000_STATUS_LU) {
154 if (status & E1000_STATUS_SPEED_1000)
70739497 155 speed = SPEED_1000;
0c6bdb30 156 else if (status & E1000_STATUS_SPEED_100)
70739497 157 speed = SPEED_100;
0c6bdb30 158 else
70739497 159 speed = SPEED_10;
0c6bdb30
BA
160
161 if (status & E1000_STATUS_FD)
fb052fdd 162 cmd->base.duplex = DUPLEX_FULL;
0c6bdb30 163 else
fb052fdd 164 cmd->base.duplex = DUPLEX_HALF;
0c6bdb30 165 }
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166 }
167
fb052fdd
PR
168 cmd->base.speed = speed;
169 cmd->base.autoneg = ((hw->phy.media_type == e1000_media_type_fiber) ||
bc7f75fa 170 hw->mac.autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
18760f1e
CL
171
172 /* MDI-X => 2; MDI =>1; Invalid =>0 */
173 if ((hw->phy.media_type == e1000_media_type_copper) &&
0c6bdb30 174 netif_carrier_ok(netdev))
fb052fdd
PR
175 cmd->base.eth_tp_mdix = hw->phy.is_mdix ?
176 ETH_TP_MDI_X : ETH_TP_MDI;
18760f1e 177 else
fb052fdd 178 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
18760f1e 179
4e8186b6 180 if (hw->phy.mdix == AUTO_ALL_MODES)
fb052fdd 181 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
4e8186b6 182 else
fb052fdd 183 cmd->base.eth_tp_mdix_ctrl = hw->phy.mdix;
4e8186b6 184
e11f303e 185 if (hw->phy.media_type != e1000_media_type_copper)
fb052fdd
PR
186 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
187
188 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
189 supported);
190 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
191 advertising);
e11f303e 192
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193 return 0;
194}
195
14ad2513 196static int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
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197{
198 struct e1000_mac_info *mac = &adapter->hw.mac;
199
200 mac->autoneg = 0;
201
14ad2513 202 /* Make sure dplx is at most 1 bit and lsb of speed is not set
e921eb1a
BA
203 * for the switch() below to work
204 */
14ad2513
DD
205 if ((spd & 1) || (dplx & ~1))
206 goto err_inval;
207
bc7f75fa 208 /* Fiber NICs only allow 1000 gbps Full duplex */
318a94d6 209 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
e5fe2541 210 (spd != SPEED_1000) && (dplx != DUPLEX_FULL)) {
14ad2513 211 goto err_inval;
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212 }
213
14ad2513 214 switch (spd + dplx) {
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215 case SPEED_10 + DUPLEX_HALF:
216 mac->forced_speed_duplex = ADVERTISE_10_HALF;
217 break;
218 case SPEED_10 + DUPLEX_FULL:
219 mac->forced_speed_duplex = ADVERTISE_10_FULL;
220 break;
221 case SPEED_100 + DUPLEX_HALF:
222 mac->forced_speed_duplex = ADVERTISE_100_HALF;
223 break;
224 case SPEED_100 + DUPLEX_FULL:
225 mac->forced_speed_duplex = ADVERTISE_100_FULL;
226 break;
227 case SPEED_1000 + DUPLEX_FULL:
e11f303e
SS
228 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
229 mac->autoneg = 1;
230 adapter->hw.phy.autoneg_advertised =
231 ADVERTISE_1000_FULL;
232 } else {
233 mac->forced_speed_duplex = ADVERTISE_1000_FULL;
234 }
bc7f75fa 235 break;
e80bd1d1 236 case SPEED_1000 + DUPLEX_HALF: /* not supported */
bc7f75fa 237 default:
14ad2513 238 goto err_inval;
bc7f75fa 239 }
4e8186b6
JB
240
241 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
242 adapter->hw.phy.mdix = AUTO_ALL_MODES;
243
bc7f75fa 244 return 0;
14ad2513
DD
245
246err_inval:
247 e_err("Unsupported Speed/Duplex configuration\n");
248 return -EINVAL;
bc7f75fa
AK
249}
250
fb052fdd
PR
251static int e1000_set_link_ksettings(struct net_device *netdev,
252 const struct ethtool_link_ksettings *cmd)
bc7f75fa
AK
253{
254 struct e1000_adapter *adapter = netdev_priv(netdev);
255 struct e1000_hw *hw = &adapter->hw;
3ef672ab 256 int ret_val = 0;
fb052fdd
PR
257 u32 advertising;
258
259 ethtool_convert_link_mode_to_legacy_u32(&advertising,
260 cmd->link_modes.advertising);
3ef672ab
BA
261
262 pm_runtime_get_sync(netdev->dev.parent);
bc7f75fa 263
e921eb1a 264 /* When SoL/IDER sessions are active, autoneg/speed/duplex
ad68076e
BA
265 * cannot be changed
266 */
470a5420
BA
267 if (hw->phy.ops.check_reset_block &&
268 hw->phy.ops.check_reset_block(hw)) {
6ad65145 269 e_err("Cannot change link characteristics when SoL/IDER is active.\n");
3ef672ab
BA
270 ret_val = -EINVAL;
271 goto out;
bc7f75fa
AK
272 }
273
e921eb1a 274 /* MDI setting is only allowed when autoneg enabled because
4e8186b6
JB
275 * some hardware doesn't allow MDI setting when speed or
276 * duplex is forced.
277 */
fb052fdd 278 if (cmd->base.eth_tp_mdix_ctrl) {
3ef672ab
BA
279 if (hw->phy.media_type != e1000_media_type_copper) {
280 ret_val = -EOPNOTSUPP;
281 goto out;
282 }
4e8186b6 283
fb052fdd
PR
284 if ((cmd->base.eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
285 (cmd->base.autoneg != AUTONEG_ENABLE)) {
4e8186b6 286 e_err("forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
3ef672ab
BA
287 ret_val = -EINVAL;
288 goto out;
4e8186b6
JB
289 }
290 }
291
bc7f75fa 292 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 293 usleep_range(1000, 2000);
bc7f75fa 294
fb052fdd 295 if (cmd->base.autoneg == AUTONEG_ENABLE) {
bc7f75fa 296 hw->mac.autoneg = 1;
318a94d6 297 if (hw->phy.media_type == e1000_media_type_fiber)
bc7f75fa 298 hw->phy.autoneg_advertised = ADVERTISED_1000baseT_Full |
f0ff4398 299 ADVERTISED_FIBRE | ADVERTISED_Autoneg;
bc7f75fa 300 else
fb052fdd 301 hw->phy.autoneg_advertised = advertising |
f0ff4398 302 ADVERTISED_TP | ADVERTISED_Autoneg;
fb052fdd 303 advertising = hw->phy.autoneg_advertised;
318a94d6 304 if (adapter->fc_autoneg)
5c48ef3e 305 hw->fc.requested_mode = e1000_fc_default;
bc7f75fa 306 } else {
fb052fdd 307 u32 speed = cmd->base.speed;
4e8186b6 308 /* calling this overrides forced MDI setting */
fb052fdd 309 if (e1000_set_spd_dplx(adapter, speed, cmd->base.duplex)) {
3ef672ab
BA
310 ret_val = -EINVAL;
311 goto out;
bc7f75fa
AK
312 }
313 }
314
4e8186b6 315 /* MDI-X => 2; MDI => 1; Auto => 3 */
fb052fdd 316 if (cmd->base.eth_tp_mdix_ctrl) {
e921eb1a 317 /* fix up the value for auto (3 => 0) as zero is mapped
4e8186b6
JB
318 * internally to auto
319 */
fb052fdd 320 if (cmd->base.eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
4e8186b6
JB
321 hw->phy.mdix = AUTO_ALL_MODES;
322 else
fb052fdd 323 hw->phy.mdix = cmd->base.eth_tp_mdix_ctrl;
4e8186b6
JB
324 }
325
bc7f75fa 326 /* reset the link */
bc7f75fa 327 if (netif_running(adapter->netdev)) {
28002099 328 e1000e_down(adapter, true);
bc7f75fa 329 e1000e_up(adapter);
a7a1d9da 330 } else {
bc7f75fa 331 e1000e_reset(adapter);
a7a1d9da 332 }
bc7f75fa 333
3ef672ab
BA
334out:
335 pm_runtime_put_sync(netdev->dev.parent);
bc7f75fa 336 clear_bit(__E1000_RESETTING, &adapter->state);
3ef672ab 337 return ret_val;
bc7f75fa
AK
338}
339
340static void e1000_get_pauseparam(struct net_device *netdev,
341 struct ethtool_pauseparam *pause)
342{
343 struct e1000_adapter *adapter = netdev_priv(netdev);
344 struct e1000_hw *hw = &adapter->hw;
345
346 pause->autoneg =
f0ff4398 347 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
bc7f75fa 348
5c48ef3e 349 if (hw->fc.current_mode == e1000_fc_rx_pause) {
bc7f75fa 350 pause->rx_pause = 1;
5c48ef3e 351 } else if (hw->fc.current_mode == e1000_fc_tx_pause) {
bc7f75fa 352 pause->tx_pause = 1;
5c48ef3e 353 } else if (hw->fc.current_mode == e1000_fc_full) {
bc7f75fa
AK
354 pause->rx_pause = 1;
355 pause->tx_pause = 1;
356 }
357}
358
359static int e1000_set_pauseparam(struct net_device *netdev,
360 struct ethtool_pauseparam *pause)
361{
362 struct e1000_adapter *adapter = netdev_priv(netdev);
363 struct e1000_hw *hw = &adapter->hw;
364 int retval = 0;
365
366 adapter->fc_autoneg = pause->autoneg;
367
368 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 369 usleep_range(1000, 2000);
bc7f75fa 370
3ef672ab
BA
371 pm_runtime_get_sync(netdev->dev.parent);
372
bc7f75fa 373 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
5c48ef3e 374 hw->fc.requested_mode = e1000_fc_default;
bc7f75fa 375 if (netif_running(adapter->netdev)) {
28002099 376 e1000e_down(adapter, true);
bc7f75fa
AK
377 e1000e_up(adapter);
378 } else {
379 e1000e_reset(adapter);
380 }
381 } else {
5c48ef3e
BA
382 if (pause->rx_pause && pause->tx_pause)
383 hw->fc.requested_mode = e1000_fc_full;
384 else if (pause->rx_pause && !pause->tx_pause)
385 hw->fc.requested_mode = e1000_fc_rx_pause;
386 else if (!pause->rx_pause && pause->tx_pause)
387 hw->fc.requested_mode = e1000_fc_tx_pause;
388 else if (!pause->rx_pause && !pause->tx_pause)
389 hw->fc.requested_mode = e1000_fc_none;
390
391 hw->fc.current_mode = hw->fc.requested_mode;
392
945eb313
BA
393 if (hw->phy.media_type == e1000_media_type_fiber) {
394 retval = hw->mac.ops.setup_link(hw);
395 /* implicit goto out */
396 } else {
397 retval = e1000e_force_mac_fc(hw);
398 if (retval)
399 goto out;
400 e1000e_set_fc_watermarks(hw);
401 }
bc7f75fa
AK
402 }
403
945eb313 404out:
3ef672ab 405 pm_runtime_put_sync(netdev->dev.parent);
bc7f75fa
AK
406 clear_bit(__E1000_RESETTING, &adapter->state);
407 return retval;
408}
409
bc7f75fa
AK
410static u32 e1000_get_msglevel(struct net_device *netdev)
411{
412 struct e1000_adapter *adapter = netdev_priv(netdev);
413 return adapter->msg_enable;
414}
415
416static void e1000_set_msglevel(struct net_device *netdev, u32 data)
417{
418 struct e1000_adapter *adapter = netdev_priv(netdev);
419 adapter->msg_enable = data;
420}
421
8bb62869 422static int e1000_get_regs_len(struct net_device __always_unused *netdev)
bc7f75fa 423{
e80bd1d1 424#define E1000_REGS_LEN 32 /* overestimate */
bc7f75fa
AK
425 return E1000_REGS_LEN * sizeof(u32);
426}
427
428static void e1000_get_regs(struct net_device *netdev,
429 struct ethtool_regs *regs, void *p)
430{
431 struct e1000_adapter *adapter = netdev_priv(netdev);
432 struct e1000_hw *hw = &adapter->hw;
433 u32 *regs_buff = p;
434 u16 phy_data;
bc7f75fa 435
3ef672ab
BA
436 pm_runtime_get_sync(netdev->dev.parent);
437
bc7f75fa
AK
438 memset(p, 0, E1000_REGS_LEN * sizeof(u32));
439
18dd2392
JK
440 regs->version = (1u << 24) |
441 (adapter->pdev->revision << 16) |
442 adapter->pdev->device;
bc7f75fa 443
e80bd1d1
BA
444 regs_buff[0] = er32(CTRL);
445 regs_buff[1] = er32(STATUS);
bc7f75fa 446
e80bd1d1
BA
447 regs_buff[2] = er32(RCTL);
448 regs_buff[3] = er32(RDLEN(0));
449 regs_buff[4] = er32(RDH(0));
450 regs_buff[5] = er32(RDT(0));
451 regs_buff[6] = er32(RDTR);
bc7f75fa 452
e80bd1d1
BA
453 regs_buff[7] = er32(TCTL);
454 regs_buff[8] = er32(TDLEN(0));
455 regs_buff[9] = er32(TDH(0));
1e36052e 456 regs_buff[10] = er32(TDT(0));
bc7f75fa
AK
457 regs_buff[11] = er32(TIDV);
458
e80bd1d1 459 regs_buff[12] = adapter->hw.phy.type; /* PHY type (IGP=1, M88=0) */
23033fad
JB
460
461 /* ethtool doesn't use anything past this point, so all this
e921eb1a
BA
462 * code is likely legacy junk for apps that may or may not exist
463 */
bc7f75fa
AK
464 if (hw->phy.type == e1000_phy_m88) {
465 e1e_rphy(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
466 regs_buff[13] = (u32)phy_data; /* cable length */
467 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
468 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
469 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
470 e1e_rphy(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
471 regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
472 regs_buff[18] = regs_buff[13]; /* cable polarity */
473 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
474 regs_buff[20] = regs_buff[17]; /* polarity correction */
475 /* phy receive errors */
476 regs_buff[22] = adapter->phy_stats.receive_errors;
477 regs_buff[23] = regs_buff[13]; /* mdix mode */
478 }
c2ade1a4
BA
479 regs_buff[21] = 0; /* was idle_errors */
480 e1e_rphy(hw, MII_STAT1000, &phy_data);
481 regs_buff[24] = (u32)phy_data; /* phy local receiver status */
482 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
3ef672ab
BA
483
484 pm_runtime_put_sync(netdev->dev.parent);
bc7f75fa
AK
485}
486
487static int e1000_get_eeprom_len(struct net_device *netdev)
488{
489 struct e1000_adapter *adapter = netdev_priv(netdev);
490 return adapter->hw.nvm.word_size * 2;
491}
492
493static int e1000_get_eeprom(struct net_device *netdev,
494 struct ethtool_eeprom *eeprom, u8 *bytes)
495{
496 struct e1000_adapter *adapter = netdev_priv(netdev);
497 struct e1000_hw *hw = &adapter->hw;
498 u16 *eeprom_buff;
499 int first_word;
500 int last_word;
501 int ret_val = 0;
502 u16 i;
503
504 if (eeprom->len == 0)
505 return -EINVAL;
506
507 eeprom->magic = adapter->pdev->vendor | (adapter->pdev->device << 16);
508
509 first_word = eeprom->offset >> 1;
510 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
511
6da2ec56
KC
512 eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
513 GFP_KERNEL);
bc7f75fa
AK
514 if (!eeprom_buff)
515 return -ENOMEM;
516
3ef672ab
BA
517 pm_runtime_get_sync(netdev->dev.parent);
518
bc7f75fa
AK
519 if (hw->nvm.type == e1000_nvm_eeprom_spi) {
520 ret_val = e1000_read_nvm(hw, first_word,
521 last_word - first_word + 1,
522 eeprom_buff);
523 } else {
524 for (i = 0; i < last_word - first_word + 1; i++) {
525 ret_val = e1000_read_nvm(hw, first_word + i, 1,
17e813ec 526 &eeprom_buff[i]);
e243455d 527 if (ret_val)
bc7f75fa
AK
528 break;
529 }
530 }
531
3ef672ab
BA
532 pm_runtime_put_sync(netdev->dev.parent);
533
e243455d
BA
534 if (ret_val) {
535 /* a read error occurred, throw away the result */
8528b016
RK
536 memset(eeprom_buff, 0xff, sizeof(u16) *
537 (last_word - first_word + 1));
e243455d
BA
538 } else {
539 /* Device's eeprom is always little-endian, word addressable */
540 for (i = 0; i < last_word - first_word + 1; i++)
541 le16_to_cpus(&eeprom_buff[i]);
542 }
bc7f75fa
AK
543
544 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
545 kfree(eeprom_buff);
546
547 return ret_val;
548}
549
550static int e1000_set_eeprom(struct net_device *netdev,
551 struct ethtool_eeprom *eeprom, u8 *bytes)
552{
553 struct e1000_adapter *adapter = netdev_priv(netdev);
554 struct e1000_hw *hw = &adapter->hw;
555 u16 *eeprom_buff;
556 void *ptr;
557 int max_len;
558 int first_word;
559 int last_word;
560 int ret_val = 0;
561 u16 i;
562
563 if (eeprom->len == 0)
564 return -EOPNOTSUPP;
565
c29c3ba5
BA
566 if (eeprom->magic !=
567 (adapter->pdev->vendor | (adapter->pdev->device << 16)))
bc7f75fa
AK
568 return -EFAULT;
569
4a770358
BA
570 if (adapter->flags & FLAG_READ_ONLY_NVM)
571 return -EINVAL;
572
bc7f75fa
AK
573 max_len = hw->nvm.word_size * 2;
574
575 first_word = eeprom->offset >> 1;
576 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
577 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
578 if (!eeprom_buff)
579 return -ENOMEM;
580
581 ptr = (void *)eeprom_buff;
582
3ef672ab
BA
583 pm_runtime_get_sync(netdev->dev.parent);
584
bc7f75fa
AK
585 if (eeprom->offset & 1) {
586 /* need read/modify/write of first changed EEPROM word */
587 /* only the second byte of the word is being modified */
588 ret_val = e1000_read_nvm(hw, first_word, 1, &eeprom_buff[0]);
589 ptr++;
590 }
9e2d7657 591 if (((eeprom->offset + eeprom->len) & 1) && (!ret_val))
bc7f75fa
AK
592 /* need read/modify/write of last changed EEPROM word */
593 /* only the first byte of the word is being modified */
594 ret_val = e1000_read_nvm(hw, last_word, 1,
17e813ec 595 &eeprom_buff[last_word - first_word]);
bc7f75fa 596
e243455d
BA
597 if (ret_val)
598 goto out;
599
bc7f75fa
AK
600 /* Device's eeprom is always little-endian, word addressable */
601 for (i = 0; i < last_word - first_word + 1; i++)
602 le16_to_cpus(&eeprom_buff[i]);
603
604 memcpy(ptr, bytes, eeprom->len);
605
606 for (i = 0; i < last_word - first_word + 1; i++)
e885d762 607 cpu_to_le16s(&eeprom_buff[i]);
bc7f75fa
AK
608
609 ret_val = e1000_write_nvm(hw, first_word,
610 last_word - first_word + 1, eeprom_buff);
611
e243455d
BA
612 if (ret_val)
613 goto out;
614
e921eb1a 615 /* Update the checksum over the first part of the EEPROM if needed
e243455d 616 * and flush shadow RAM for applicable controllers
ad68076e 617 */
e243455d 618 if ((first_word <= NVM_CHECKSUM_REG) ||
f89271dd
BA
619 (hw->mac.type == e1000_82583) ||
620 (hw->mac.type == e1000_82574) ||
621 (hw->mac.type == e1000_82573))
e243455d 622 ret_val = e1000e_update_nvm_checksum(hw);
bc7f75fa 623
e243455d 624out:
3ef672ab 625 pm_runtime_put_sync(netdev->dev.parent);
bc7f75fa
AK
626 kfree(eeprom_buff);
627 return ret_val;
628}
629
630static void e1000_get_drvinfo(struct net_device *netdev,
631 struct ethtool_drvinfo *drvinfo)
632{
633 struct e1000_adapter *adapter = netdev_priv(netdev);
bc7f75fa 634
e5fe2541 635 strlcpy(drvinfo->driver, e1000e_driver_name, sizeof(drvinfo->driver));
33a5ba14 636 strlcpy(drvinfo->version, e1000e_driver_version,
612a94d6 637 sizeof(drvinfo->version));
bc7f75fa 638
e921eb1a 639 /* EEPROM image version # is reported as firmware version # for
ad68076e
BA
640 * PCI-E controllers
641 */
612a94d6 642 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
17e813ec
BA
643 "%d.%d-%d",
644 (adapter->eeprom_vers & 0xF000) >> 12,
645 (adapter->eeprom_vers & 0x0FF0) >> 4,
646 (adapter->eeprom_vers & 0x000F));
bc7f75fa 647
612a94d6
RJ
648 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
649 sizeof(drvinfo->bus_info));
bc7f75fa
AK
650}
651
652static void e1000_get_ringparam(struct net_device *netdev,
653 struct ethtool_ringparam *ring)
654{
655 struct e1000_adapter *adapter = netdev_priv(netdev);
bc7f75fa
AK
656
657 ring->rx_max_pending = E1000_MAX_RXD;
658 ring->tx_max_pending = E1000_MAX_TXD;
508da426
BA
659 ring->rx_pending = adapter->rx_ring_count;
660 ring->tx_pending = adapter->tx_ring_count;
bc7f75fa
AK
661}
662
663static int e1000_set_ringparam(struct net_device *netdev,
664 struct ethtool_ringparam *ring)
665{
666 struct e1000_adapter *adapter = netdev_priv(netdev);
508da426
BA
667 struct e1000_ring *temp_tx = NULL, *temp_rx = NULL;
668 int err = 0, size = sizeof(struct e1000_ring);
669 bool set_tx = false, set_rx = false;
670 u16 new_rx_count, new_tx_count;
bc7f75fa
AK
671
672 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
673 return -EINVAL;
674
508da426
BA
675 new_rx_count = clamp_t(u32, ring->rx_pending, E1000_MIN_RXD,
676 E1000_MAX_RXD);
677 new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
bc7f75fa 678
508da426
BA
679 new_tx_count = clamp_t(u32, ring->tx_pending, E1000_MIN_TXD,
680 E1000_MAX_TXD);
681 new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
bc7f75fa 682
508da426
BA
683 if ((new_tx_count == adapter->tx_ring_count) &&
684 (new_rx_count == adapter->rx_ring_count))
685 /* nothing to do */
686 return 0;
bc7f75fa 687
508da426
BA
688 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
689 usleep_range(1000, 2000);
bc7f75fa 690
508da426
BA
691 if (!netif_running(adapter->netdev)) {
692 /* Set counts now and allocate resources during open() */
693 adapter->tx_ring->count = new_tx_count;
694 adapter->rx_ring->count = new_rx_count;
695 adapter->tx_ring_count = new_tx_count;
696 adapter->rx_ring_count = new_rx_count;
697 goto clear_reset;
698 }
bc7f75fa 699
508da426
BA
700 set_tx = (new_tx_count != adapter->tx_ring_count);
701 set_rx = (new_rx_count != adapter->rx_ring_count);
bc7f75fa 702
508da426
BA
703 /* Allocate temporary storage for ring updates */
704 if (set_tx) {
705 temp_tx = vmalloc(size);
706 if (!temp_tx) {
707 err = -ENOMEM;
708 goto free_temp;
709 }
710 }
711 if (set_rx) {
712 temp_rx = vmalloc(size);
713 if (!temp_rx) {
714 err = -ENOMEM;
715 goto free_temp;
716 }
717 }
bc7f75fa 718
3ef672ab
BA
719 pm_runtime_get_sync(netdev->dev.parent);
720
28002099 721 e1000e_down(adapter, true);
bc7f75fa 722
e921eb1a 723 /* We can't just free everything and then setup again, because the
508da426
BA
724 * ISRs in MSI-X mode get passed pointers to the Tx and Rx ring
725 * structs. First, attempt to allocate new resources...
726 */
727 if (set_tx) {
728 memcpy(temp_tx, adapter->tx_ring, size);
729 temp_tx->count = new_tx_count;
730 err = e1000e_setup_tx_resources(temp_tx);
bc7f75fa 731 if (err)
508da426
BA
732 goto err_setup;
733 }
734 if (set_rx) {
735 memcpy(temp_rx, adapter->rx_ring, size);
736 temp_rx->count = new_rx_count;
737 err = e1000e_setup_rx_resources(temp_rx);
bc7f75fa 738 if (err)
508da426
BA
739 goto err_setup_rx;
740 }
741
742 /* ...then free the old resources and copy back any new ring data */
743 if (set_tx) {
55aa6985 744 e1000e_free_tx_resources(adapter->tx_ring);
508da426
BA
745 memcpy(adapter->tx_ring, temp_tx, size);
746 adapter->tx_ring_count = new_tx_count;
747 }
748 if (set_rx) {
749 e1000e_free_rx_resources(adapter->rx_ring);
750 memcpy(adapter->rx_ring, temp_rx, size);
751 adapter->rx_ring_count = new_rx_count;
bc7f75fa
AK
752 }
753
bc7f75fa 754err_setup_rx:
508da426
BA
755 if (err && set_tx)
756 e1000e_free_tx_resources(temp_tx);
bc7f75fa 757err_setup:
508da426 758 e1000e_up(adapter);
3ef672ab 759 pm_runtime_put_sync(netdev->dev.parent);
508da426
BA
760free_temp:
761 vfree(temp_tx);
762 vfree(temp_rx);
763clear_reset:
bc7f75fa
AK
764 clear_bit(__E1000_RESETTING, &adapter->state);
765 return err;
766}
767
cef8c793
BA
768static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,
769 int reg, int offset, u32 mask, u32 write)
2a887191 770{
cef8c793 771 u32 pat, val;
6480641e 772 static const u32 test[] = {
04e115cf
BA
773 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF
774 };
cef8c793 775 for (pat = 0; pat < ARRAY_SIZE(test); pat++) {
2a887191 776 E1000_WRITE_REG_ARRAY(&adapter->hw, reg, offset,
cef8c793
BA
777 (test[pat] & write));
778 val = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset);
779 if (val != (test[pat] & write & mask)) {
a8fc1891
BA
780 e_err("pattern test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n",
781 reg + (offset << 2), val,
782 (test[pat] & write & mask));
2a887191 783 *data = reg;
3992c8ed 784 return true;
2a887191
JP
785 }
786 }
3992c8ed 787 return false;
bc7f75fa
AK
788}
789
2a887191
JP
790static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,
791 int reg, u32 mask, u32 write)
792{
cef8c793 793 u32 val;
6cf08d1c 794
2a887191 795 __ew32(&adapter->hw, reg, write & mask);
cef8c793
BA
796 val = __er32(&adapter->hw, reg);
797 if ((write & mask) != (val & mask)) {
a8fc1891 798 e_err("set/check test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n",
6ad65145 799 reg, (val & mask), (write & mask));
2a887191 800 *data = reg;
3992c8ed 801 return true;
2a887191 802 }
3992c8ed 803 return false;
bc7f75fa 804}
fc830b78 805
cef8c793
BA
806#define REG_PATTERN_TEST_ARRAY(reg, offset, mask, write) \
807 do { \
808 if (reg_pattern_test(adapter, data, reg, offset, mask, write)) \
809 return 1; \
2a887191 810 } while (0)
cef8c793
BA
811#define REG_PATTERN_TEST(reg, mask, write) \
812 REG_PATTERN_TEST_ARRAY(reg, 0, mask, write)
2a887191 813
cef8c793
BA
814#define REG_SET_AND_CHECK(reg, mask, write) \
815 do { \
816 if (reg_set_and_check(adapter, data, reg, mask, write)) \
817 return 1; \
2a887191
JP
818 } while (0)
819
bc7f75fa
AK
820static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
821{
822 struct e1000_hw *hw = &adapter->hw;
823 struct e1000_mac_info *mac = &adapter->hw.mac;
bc7f75fa
AK
824 u32 value;
825 u32 before;
826 u32 after;
827 u32 i;
828 u32 toggle;
a4f58f54 829 u32 mask;
2fbe4526 830 u32 wlock_mac = 0;
bc7f75fa 831
e921eb1a 832 /* The status register is Read Only, so a write should fail.
33550cec
BA
833 * Some bits that get toggled are ignored. There are several bits
834 * on newer hardware that are r/w.
bc7f75fa
AK
835 */
836 switch (mac->type) {
bc7f75fa
AK
837 case e1000_82571:
838 case e1000_82572:
839 case e1000_80003es2lan:
840 toggle = 0x7FFFF3FF;
841 break;
f0ff4398 842 default:
bc7f75fa
AK
843 toggle = 0x7FFFF033;
844 break;
bc7f75fa
AK
845 }
846
847 before = er32(STATUS);
848 value = (er32(STATUS) & toggle);
849 ew32(STATUS, toggle);
850 after = er32(STATUS) & toggle;
851 if (value != after) {
6ad65145
BA
852 e_err("failed STATUS register test got: 0x%08X expected: 0x%08X\n",
853 after, value);
bc7f75fa
AK
854 *data = 1;
855 return 1;
856 }
857 /* restore previous status */
858 ew32(STATUS, before);
859
97ac8cae 860 if (!(adapter->flags & FLAG_IS_ICH)) {
bc7f75fa
AK
861 REG_PATTERN_TEST(E1000_FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
862 REG_PATTERN_TEST(E1000_FCAH, 0x0000FFFF, 0xFFFFFFFF);
863 REG_PATTERN_TEST(E1000_FCT, 0x0000FFFF, 0xFFFFFFFF);
864 REG_PATTERN_TEST(E1000_VET, 0x0000FFFF, 0xFFFFFFFF);
865 }
866
867 REG_PATTERN_TEST(E1000_RDTR, 0x0000FFFF, 0xFFFFFFFF);
1e36052e
BA
868 REG_PATTERN_TEST(E1000_RDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
869 REG_PATTERN_TEST(E1000_RDLEN(0), 0x000FFF80, 0x000FFFFF);
870 REG_PATTERN_TEST(E1000_RDH(0), 0x0000FFFF, 0x0000FFFF);
871 REG_PATTERN_TEST(E1000_RDT(0), 0x0000FFFF, 0x0000FFFF);
bc7f75fa
AK
872 REG_PATTERN_TEST(E1000_FCRTH, 0x0000FFF8, 0x0000FFF8);
873 REG_PATTERN_TEST(E1000_FCTTV, 0x0000FFFF, 0x0000FFFF);
874 REG_PATTERN_TEST(E1000_TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
1e36052e
BA
875 REG_PATTERN_TEST(E1000_TDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
876 REG_PATTERN_TEST(E1000_TDLEN(0), 0x000FFF80, 0x000FFFFF);
bc7f75fa
AK
877
878 REG_SET_AND_CHECK(E1000_RCTL, 0xFFFFFFFF, 0x00000000);
879
97ac8cae 880 before = ((adapter->flags & FLAG_IS_ICH) ? 0x06C3B33E : 0x06DFB3FE);
bc7f75fa
AK
881 REG_SET_AND_CHECK(E1000_RCTL, before, 0x003FFFFB);
882 REG_SET_AND_CHECK(E1000_TCTL, 0xFFFFFFFF, 0x00000000);
883
8658251d 884 REG_SET_AND_CHECK(E1000_RCTL, before, 0xFFFFFFFF);
1e36052e 885 REG_PATTERN_TEST(E1000_RDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
97ac8cae 886 if (!(adapter->flags & FLAG_IS_ICH))
8658251d 887 REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF);
1e36052e 888 REG_PATTERN_TEST(E1000_TDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
8658251d 889 REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF);
a4f58f54
BA
890 mask = 0x8003FFFF;
891 switch (mac->type) {
892 case e1000_ich10lan:
893 case e1000_pchlan:
d3738bb8 894 case e1000_pch2lan:
2fbe4526 895 case e1000_pch_lpt:
79849ebc 896 case e1000_pch_spt:
c8744f44
SN
897 /* fall through */
898 case e1000_pch_cnp:
18dd2392 899 mask |= BIT(18);
a4f58f54
BA
900 break;
901 default:
902 break;
903 }
2fbe4526 904
c8744f44 905 if (mac->type >= e1000_pch_lpt)
2fbe4526
BA
906 wlock_mac = (er32(FWSM) & E1000_FWSM_WLOCK_MAC_MASK) >>
907 E1000_FWSM_WLOCK_MAC_SHIFT;
908
909 for (i = 0; i < mac->rar_entry_count; i++) {
c8744f44 910 if (mac->type >= e1000_pch_lpt) {
a8fc1891
BA
911 /* Cannot test write-protected SHRAL[n] registers */
912 if ((wlock_mac == 1) || (wlock_mac && (i > wlock_mac)))
913 continue;
914
915 /* SHRAH[9] different than the others */
916 if (i == 10)
18dd2392 917 mask |= BIT(30);
a8fc1891 918 else
18dd2392 919 mask &= ~BIT(30);
a8fc1891 920 }
c3a0dce3
DE
921 if (mac->type == e1000_pch2lan) {
922 /* SHRAH[0,1,2] different than previous */
ad40064e 923 if (i == 1)
c3a0dce3
DE
924 mask &= 0xFFF4FFFF;
925 /* SHRAH[3] different than SHRAH[0,1,2] */
ad40064e 926 if (i == 4)
18dd2392 927 mask |= BIT(30);
ad40064e
DE
928 /* RAR[1-6] owned by management engine - skipping */
929 if (i > 0)
930 i += 6;
c3a0dce3 931 }
2fbe4526 932
a8fc1891
BA
933 REG_PATTERN_TEST_ARRAY(E1000_RA, ((i << 1) + 1), mask,
934 0xFFFFFFFF);
ad40064e
DE
935 /* reset index to actual value */
936 if ((mac->type == e1000_pch2lan) && (i > 6))
937 i -= 6;
2fbe4526 938 }
bc7f75fa
AK
939
940 for (i = 0; i < mac->mta_reg_count; i++)
941 REG_PATTERN_TEST_ARRAY(E1000_MTA, i, 0xFFFFFFFF, 0xFFFFFFFF);
942
943 *data = 0;
2fbe4526 944
bc7f75fa
AK
945 return 0;
946}
947
948static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
949{
950 u16 temp;
951 u16 checksum = 0;
952 u16 i;
953
954 *data = 0;
955 /* Read and add up the contents of the EEPROM */
956 for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
957 if ((e1000_read_nvm(&adapter->hw, i, 1, &temp)) < 0) {
958 *data = 1;
e243455d 959 return *data;
bc7f75fa
AK
960 }
961 checksum += temp;
962 }
963
964 /* If Checksum is not Correct return error else test passed */
53aa82da 965 if ((checksum != (u16)NVM_SUM) && !(*data))
bc7f75fa
AK
966 *data = 2;
967
968 return *data;
969}
970
8bb62869 971static irqreturn_t e1000_test_intr(int __always_unused irq, void *data)
bc7f75fa 972{
53aa82da 973 struct net_device *netdev = (struct net_device *)data;
bc7f75fa
AK
974 struct e1000_adapter *adapter = netdev_priv(netdev);
975 struct e1000_hw *hw = &adapter->hw;
976
977 adapter->test_icr |= er32(ICR);
978
979 return IRQ_HANDLED;
980}
981
982static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
983{
984 struct net_device *netdev = adapter->netdev;
985 struct e1000_hw *hw = &adapter->hw;
986 u32 mask;
987 u32 shared_int = 1;
988 u32 irq = adapter->pdev->irq;
989 int i;
4662e82b
BA
990 int ret_val = 0;
991 int int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK
992
993 *data = 0;
994
4662e82b
BA
995 /* NOTE: we don't test MSI/MSI-X interrupts here, yet */
996 if (adapter->int_mode == E1000E_INT_MODE_MSIX) {
997 int_mode = adapter->int_mode;
998 e1000e_reset_interrupt_capability(adapter);
999 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1000 e1000e_set_interrupt_capability(adapter);
1001 }
bc7f75fa 1002 /* Hook up test interrupt handler just for this test */
a0607fd3 1003 if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
bc7f75fa
AK
1004 netdev)) {
1005 shared_int = 0;
17e813ec
BA
1006 } else if (request_irq(irq, e1000_test_intr, IRQF_SHARED, netdev->name,
1007 netdev)) {
bc7f75fa 1008 *data = 1;
4662e82b
BA
1009 ret_val = -1;
1010 goto out;
bc7f75fa 1011 }
44defeb3 1012 e_info("testing %s interrupt\n", (shared_int ? "shared" : "unshared"));
bc7f75fa
AK
1013
1014 /* Disable all the interrupts */
1015 ew32(IMC, 0xFFFFFFFF);
945a5151 1016 e1e_flush();
1bba4386 1017 usleep_range(10000, 20000);
bc7f75fa
AK
1018
1019 /* Test each interrupt */
1020 for (i = 0; i < 10; i++) {
bc7f75fa 1021 /* Interrupt to test */
18dd2392 1022 mask = BIT(i);
bc7f75fa 1023
f4187b56
BA
1024 if (adapter->flags & FLAG_IS_ICH) {
1025 switch (mask) {
1026 case E1000_ICR_RXSEQ:
1027 continue;
1028 case 0x00000100:
1029 if (adapter->hw.mac.type == e1000_ich8lan ||
1030 adapter->hw.mac.type == e1000_ich9lan)
1031 continue;
1032 break;
1033 default:
1034 break;
1035 }
1036 }
1037
bc7f75fa 1038 if (!shared_int) {
e921eb1a 1039 /* Disable the interrupt to be reported in
bc7f75fa
AK
1040 * the cause register and then force the same
1041 * interrupt and see if one gets posted. If
1042 * an interrupt was posted to the bus, the
1043 * test failed.
1044 */
1045 adapter->test_icr = 0;
1046 ew32(IMC, mask);
1047 ew32(ICS, mask);
945a5151 1048 e1e_flush();
1bba4386 1049 usleep_range(10000, 20000);
bc7f75fa
AK
1050
1051 if (adapter->test_icr & mask) {
1052 *data = 3;
1053 break;
1054 }
1055 }
1056
e921eb1a 1057 /* Enable the interrupt to be reported in
bc7f75fa
AK
1058 * the cause register and then force the same
1059 * interrupt and see if one gets posted. If
1060 * an interrupt was not posted to the bus, the
1061 * test failed.
1062 */
1063 adapter->test_icr = 0;
1064 ew32(IMS, mask);
1065 ew32(ICS, mask);
945a5151 1066 e1e_flush();
1bba4386 1067 usleep_range(10000, 20000);
bc7f75fa
AK
1068
1069 if (!(adapter->test_icr & mask)) {
1070 *data = 4;
1071 break;
1072 }
1073
1074 if (!shared_int) {
e921eb1a 1075 /* Disable the other interrupts to be reported in
bc7f75fa
AK
1076 * the cause register and then force the other
1077 * interrupts and see if any get posted. If
1078 * an interrupt was posted to the bus, the
1079 * test failed.
1080 */
1081 adapter->test_icr = 0;
1082 ew32(IMC, ~mask & 0x00007FFF);
1083 ew32(ICS, ~mask & 0x00007FFF);
945a5151 1084 e1e_flush();
1bba4386 1085 usleep_range(10000, 20000);
bc7f75fa
AK
1086
1087 if (adapter->test_icr) {
1088 *data = 5;
1089 break;
1090 }
1091 }
1092 }
1093
1094 /* Disable all the interrupts */
1095 ew32(IMC, 0xFFFFFFFF);
945a5151 1096 e1e_flush();
1bba4386 1097 usleep_range(10000, 20000);
bc7f75fa
AK
1098
1099 /* Unhook test interrupt handler */
1100 free_irq(irq, netdev);
1101
4662e82b
BA
1102out:
1103 if (int_mode == E1000E_INT_MODE_MSIX) {
1104 e1000e_reset_interrupt_capability(adapter);
1105 adapter->int_mode = int_mode;
1106 e1000e_set_interrupt_capability(adapter);
1107 }
1108
1109 return ret_val;
bc7f75fa
AK
1110}
1111
1112static void e1000_free_desc_rings(struct e1000_adapter *adapter)
1113{
1114 struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1115 struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1116 struct pci_dev *pdev = adapter->pdev;
17e813ec 1117 struct e1000_buffer *buffer_info;
bc7f75fa
AK
1118 int i;
1119
1120 if (tx_ring->desc && tx_ring->buffer_info) {
1121 for (i = 0; i < tx_ring->count; i++) {
17e813ec
BA
1122 buffer_info = &tx_ring->buffer_info[i];
1123
1124 if (buffer_info->dma)
0be3f55f 1125 dma_unmap_single(&pdev->dev,
17e813ec
BA
1126 buffer_info->dma,
1127 buffer_info->length,
1128 DMA_TO_DEVICE);
1129 if (buffer_info->skb)
1130 dev_kfree_skb(buffer_info->skb);
bc7f75fa
AK
1131 }
1132 }
1133
1134 if (rx_ring->desc && rx_ring->buffer_info) {
1135 for (i = 0; i < rx_ring->count; i++) {
17e813ec
BA
1136 buffer_info = &rx_ring->buffer_info[i];
1137
1138 if (buffer_info->dma)
0be3f55f 1139 dma_unmap_single(&pdev->dev,
17e813ec
BA
1140 buffer_info->dma,
1141 2048, DMA_FROM_DEVICE);
1142 if (buffer_info->skb)
1143 dev_kfree_skb(buffer_info->skb);
bc7f75fa
AK
1144 }
1145 }
1146
1147 if (tx_ring->desc) {
1148 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1149 tx_ring->dma);
1150 tx_ring->desc = NULL;
1151 }
1152 if (rx_ring->desc) {
1153 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1154 rx_ring->dma);
1155 rx_ring->desc = NULL;
1156 }
1157
1158 kfree(tx_ring->buffer_info);
1159 tx_ring->buffer_info = NULL;
1160 kfree(rx_ring->buffer_info);
1161 rx_ring->buffer_info = NULL;
1162}
1163
1164static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
1165{
1166 struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1167 struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1168 struct pci_dev *pdev = adapter->pdev;
1169 struct e1000_hw *hw = &adapter->hw;
1170 u32 rctl;
bc7f75fa
AK
1171 int i;
1172 int ret_val;
1173
1174 /* Setup Tx descriptor ring and Tx buffers */
1175
1176 if (!tx_ring->count)
1177 tx_ring->count = E1000_DEFAULT_TXD;
1178
cef8c793 1179 tx_ring->buffer_info = kcalloc(tx_ring->count,
e5fe2541 1180 sizeof(struct e1000_buffer), GFP_KERNEL);
668018d7 1181 if (!tx_ring->buffer_info) {
bc7f75fa
AK
1182 ret_val = 1;
1183 goto err_nomem;
1184 }
bc7f75fa
AK
1185
1186 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1187 tx_ring->size = ALIGN(tx_ring->size, 4096);
1188 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
1189 &tx_ring->dma, GFP_KERNEL);
1190 if (!tx_ring->desc) {
1191 ret_val = 2;
1192 goto err_nomem;
1193 }
bc7f75fa
AK
1194 tx_ring->next_to_use = 0;
1195 tx_ring->next_to_clean = 0;
1196
53aa82da
BA
1197 ew32(TDBAL(0), ((u64)tx_ring->dma & 0x00000000FFFFFFFF));
1198 ew32(TDBAH(0), ((u64)tx_ring->dma >> 32));
1e36052e
BA
1199 ew32(TDLEN(0), tx_ring->count * sizeof(struct e1000_tx_desc));
1200 ew32(TDH(0), 0);
1201 ew32(TDT(0), 0);
cef8c793
BA
1202 ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | E1000_TCTL_MULR |
1203 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1204 E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT);
bc7f75fa
AK
1205
1206 for (i = 0; i < tx_ring->count; i++) {
1207 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
1208 struct sk_buff *skb;
1209 unsigned int skb_size = 1024;
1210
1211 skb = alloc_skb(skb_size, GFP_KERNEL);
1212 if (!skb) {
1213 ret_val = 3;
1214 goto err_nomem;
1215 }
1216 skb_put(skb, skb_size);
1217 tx_ring->buffer_info[i].skb = skb;
1218 tx_ring->buffer_info[i].length = skb->len;
1219 tx_ring->buffer_info[i].dma =
f0ff4398
BA
1220 dma_map_single(&pdev->dev, skb->data, skb->len,
1221 DMA_TO_DEVICE);
0be3f55f
NN
1222 if (dma_mapping_error(&pdev->dev,
1223 tx_ring->buffer_info[i].dma)) {
bc7f75fa
AK
1224 ret_val = 4;
1225 goto err_nomem;
1226 }
cef8c793 1227 tx_desc->buffer_addr = cpu_to_le64(tx_ring->buffer_info[i].dma);
bc7f75fa
AK
1228 tx_desc->lower.data = cpu_to_le32(skb->len);
1229 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1230 E1000_TXD_CMD_IFCS |
cef8c793 1231 E1000_TXD_CMD_RS);
bc7f75fa
AK
1232 tx_desc->upper.data = 0;
1233 }
1234
1235 /* Setup Rx descriptor ring and Rx buffers */
1236
1237 if (!rx_ring->count)
1238 rx_ring->count = E1000_DEFAULT_RXD;
1239
cef8c793 1240 rx_ring->buffer_info = kcalloc(rx_ring->count,
e5fe2541 1241 sizeof(struct e1000_buffer), GFP_KERNEL);
668018d7 1242 if (!rx_ring->buffer_info) {
bc7f75fa
AK
1243 ret_val = 5;
1244 goto err_nomem;
1245 }
bc7f75fa 1246
5f450212 1247 rx_ring->size = rx_ring->count * sizeof(union e1000_rx_desc_extended);
bc7f75fa
AK
1248 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
1249 &rx_ring->dma, GFP_KERNEL);
1250 if (!rx_ring->desc) {
1251 ret_val = 6;
1252 goto err_nomem;
1253 }
bc7f75fa
AK
1254 rx_ring->next_to_use = 0;
1255 rx_ring->next_to_clean = 0;
1256
1257 rctl = er32(RCTL);
7f99ae63
BA
1258 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
1259 ew32(RCTL, rctl & ~E1000_RCTL_EN);
53aa82da
BA
1260 ew32(RDBAL(0), ((u64)rx_ring->dma & 0xFFFFFFFF));
1261 ew32(RDBAH(0), ((u64)rx_ring->dma >> 32));
1e36052e
BA
1262 ew32(RDLEN(0), rx_ring->size);
1263 ew32(RDH(0), 0);
1264 ew32(RDT(0), 0);
bc7f75fa 1265 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
f0ff4398
BA
1266 E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_LPE |
1267 E1000_RCTL_SBP | E1000_RCTL_SECRC |
1268 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1269 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
bc7f75fa
AK
1270 ew32(RCTL, rctl);
1271
1272 for (i = 0; i < rx_ring->count; i++) {
5f450212 1273 union e1000_rx_desc_extended *rx_desc;
bc7f75fa
AK
1274 struct sk_buff *skb;
1275
1276 skb = alloc_skb(2048 + NET_IP_ALIGN, GFP_KERNEL);
1277 if (!skb) {
1278 ret_val = 7;
1279 goto err_nomem;
1280 }
1281 skb_reserve(skb, NET_IP_ALIGN);
1282 rx_ring->buffer_info[i].skb = skb;
1283 rx_ring->buffer_info[i].dma =
f0ff4398
BA
1284 dma_map_single(&pdev->dev, skb->data, 2048,
1285 DMA_FROM_DEVICE);
0be3f55f
NN
1286 if (dma_mapping_error(&pdev->dev,
1287 rx_ring->buffer_info[i].dma)) {
bc7f75fa
AK
1288 ret_val = 8;
1289 goto err_nomem;
1290 }
5f450212
BA
1291 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1292 rx_desc->read.buffer_addr =
1293 cpu_to_le64(rx_ring->buffer_info[i].dma);
bc7f75fa
AK
1294 memset(skb->data, 0x00, skb->len);
1295 }
1296
1297 return 0;
1298
1299err_nomem:
1300 e1000_free_desc_rings(adapter);
1301 return ret_val;
1302}
1303
1304static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1305{
1306 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1307 e1e_wphy(&adapter->hw, 29, 0x001F);
1308 e1e_wphy(&adapter->hw, 30, 0x8FFC);
1309 e1e_wphy(&adapter->hw, 29, 0x001A);
1310 e1e_wphy(&adapter->hw, 30, 0x8FF0);
1311}
1312
1313static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1314{
1315 struct e1000_hw *hw = &adapter->hw;
1316 u32 ctrl_reg = 0;
97ac8cae 1317 u16 phy_reg = 0;
cbd006cb 1318 s32 ret_val = 0;
bc7f75fa 1319
318a94d6 1320 hw->mac.autoneg = 0;
bc7f75fa 1321
3af50481 1322 if (hw->phy.type == e1000_phy_ife) {
bc7f75fa 1323 /* force 100, set loopback */
c2ade1a4 1324 e1e_wphy(hw, MII_BMCR, 0x6100);
bc7f75fa
AK
1325
1326 /* Now set up the MAC to the same speed/duplex as the PHY. */
3af50481 1327 ctrl_reg = er32(CTRL);
bc7f75fa
AK
1328 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1329 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1330 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1331 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1332 E1000_CTRL_FD); /* Force Duplex to FULL */
3af50481
BA
1333
1334 ew32(CTRL, ctrl_reg);
945a5151 1335 e1e_flush();
ce43a216 1336 usleep_range(500, 1000);
3af50481
BA
1337
1338 return 0;
1339 }
1340
1341 /* Specific PHY configuration for loopback */
1342 switch (hw->phy.type) {
1343 case e1000_phy_m88:
1344 /* Auto-MDI/MDIX Off */
1345 e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1346 /* reset to update Auto-MDI/MDIX */
c2ade1a4 1347 e1e_wphy(hw, MII_BMCR, 0x9140);
3af50481 1348 /* autoneg off */
c2ade1a4 1349 e1e_wphy(hw, MII_BMCR, 0x8140);
3af50481
BA
1350 break;
1351 case e1000_phy_gg82563:
1352 e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x1CC);
cef8c793 1353 break;
97ac8cae
BA
1354 case e1000_phy_bm:
1355 /* Set Default MAC Interface speed to 1GB */
1356 e1e_rphy(hw, PHY_REG(2, 21), &phy_reg);
1357 phy_reg &= ~0x0007;
1358 phy_reg |= 0x006;
1359 e1e_wphy(hw, PHY_REG(2, 21), phy_reg);
1360 /* Assert SW reset for above settings to take effect */
6b598e1e 1361 hw->phy.ops.commit(hw);
ce43a216 1362 usleep_range(1000, 2000);
97ac8cae
BA
1363 /* Force Full Duplex */
1364 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1365 e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x000C);
1366 /* Set Link Up (in force link) */
1367 e1e_rphy(hw, PHY_REG(776, 16), &phy_reg);
1368 e1e_wphy(hw, PHY_REG(776, 16), phy_reg | 0x0040);
1369 /* Force Link */
1370 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1371 e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x0040);
1372 /* Set Early Link Enable */
1373 e1e_rphy(hw, PHY_REG(769, 20), &phy_reg);
1374 e1e_wphy(hw, PHY_REG(769, 20), phy_reg | 0x0400);
3af50481
BA
1375 break;
1376 case e1000_phy_82577:
1377 case e1000_phy_82578:
1378 /* Workaround: K1 must be disabled for stable 1Gbps operation */
cbd006cb
BA
1379 ret_val = hw->phy.ops.acquire(hw);
1380 if (ret_val) {
1381 e_err("Cannot setup 1Gbps loopback.\n");
1382 return ret_val;
1383 }
3af50481 1384 e1000_configure_k1_ich8lan(hw, false);
cbd006cb 1385 hw->phy.ops.release(hw);
3af50481 1386 break;
d3738bb8
BA
1387 case e1000_phy_82579:
1388 /* Disable PHY energy detect power down */
1389 e1e_rphy(hw, PHY_REG(0, 21), &phy_reg);
18dd2392 1390 e1e_wphy(hw, PHY_REG(0, 21), phy_reg & ~BIT(3));
d3738bb8
BA
1391 /* Disable full chip energy detect */
1392 e1e_rphy(hw, PHY_REG(776, 18), &phy_reg);
1393 e1e_wphy(hw, PHY_REG(776, 18), phy_reg | 1);
1394 /* Enable loopback on the PHY */
d3738bb8
BA
1395 e1e_wphy(hw, I82577_PHY_LBK_CTRL, 0x8001);
1396 break;
cef8c793 1397 default:
3af50481
BA
1398 break;
1399 }
bc7f75fa 1400
3af50481 1401 /* force 1000, set loopback */
c2ade1a4 1402 e1e_wphy(hw, MII_BMCR, 0x4140);
ce43a216 1403 msleep(250);
cef8c793 1404
3af50481
BA
1405 /* Now set up the MAC to the same speed/duplex as the PHY. */
1406 ctrl_reg = er32(CTRL);
1407 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1408 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1409 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1410 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1411 E1000_CTRL_FD); /* Force Duplex to FULL */
1412
1413 if (adapter->flags & FLAG_IS_ICH)
1414 ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */
bc7f75fa 1415
318a94d6
JK
1416 if (hw->phy.media_type == e1000_media_type_copper &&
1417 hw->phy.type == e1000_phy_m88) {
e80bd1d1 1418 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
bc7f75fa 1419 } else {
e921eb1a 1420 /* Set the ILOS bit on the fiber Nic if half duplex link is
ad68076e
BA
1421 * detected.
1422 */
90da0669 1423 if ((er32(STATUS) & E1000_STATUS_FD) == 0)
bc7f75fa
AK
1424 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1425 }
1426
1427 ew32(CTRL, ctrl_reg);
1428
e921eb1a 1429 /* Disable the receiver on the PHY so when a cable is plugged in, the
bc7f75fa
AK
1430 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1431 */
318a94d6 1432 if (hw->phy.type == e1000_phy_m88)
bc7f75fa
AK
1433 e1000_phy_disable_receiver(adapter);
1434
ce43a216 1435 usleep_range(500, 1000);
bc7f75fa
AK
1436
1437 return 0;
1438}
1439
1440static int e1000_set_82571_fiber_loopback(struct e1000_adapter *adapter)
1441{
1442 struct e1000_hw *hw = &adapter->hw;
1443 u32 ctrl = er32(CTRL);
70806a7f 1444 int link;
bc7f75fa
AK
1445
1446 /* special requirements for 82571/82572 fiber adapters */
1447
e921eb1a 1448 /* jump through hoops to make sure link is up because serdes
ad68076e
BA
1449 * link is hardwired up
1450 */
bc7f75fa
AK
1451 ctrl |= E1000_CTRL_SLU;
1452 ew32(CTRL, ctrl);
1453
1454 /* disable autoneg */
1455 ctrl = er32(TXCW);
18dd2392 1456 ctrl &= ~BIT(31);
bc7f75fa
AK
1457 ew32(TXCW, ctrl);
1458
1459 link = (er32(STATUS) & E1000_STATUS_LU);
1460
1461 if (!link) {
1462 /* set invert loss of signal */
1463 ctrl = er32(CTRL);
1464 ctrl |= E1000_CTRL_ILOS;
1465 ew32(CTRL, ctrl);
1466 }
1467
e921eb1a 1468 /* special write to serdes control register to enable SerDes analog
ad68076e
BA
1469 * loopback
1470 */
3ffcf2cb 1471 ew32(SCTL, E1000_SCTL_ENABLE_SERDES_LOOPBACK);
945a5151 1472 e1e_flush();
1bba4386 1473 usleep_range(10000, 20000);
bc7f75fa
AK
1474
1475 return 0;
1476}
1477
1478/* only call this for fiber/serdes connections to es2lan */
1479static int e1000_set_es2lan_mac_loopback(struct e1000_adapter *adapter)
1480{
1481 struct e1000_hw *hw = &adapter->hw;
1482 u32 ctrlext = er32(CTRL_EXT);
1483 u32 ctrl = er32(CTRL);
1484
e921eb1a 1485 /* save CTRL_EXT to restore later, reuse an empty variable (unused
ad68076e
BA
1486 * on mac_type 80003es2lan)
1487 */
bc7f75fa
AK
1488 adapter->tx_fifo_head = ctrlext;
1489
1490 /* clear the serdes mode bits, putting the device into mac loopback */
1491 ctrlext &= ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1492 ew32(CTRL_EXT, ctrlext);
1493
1494 /* force speed to 1000/FD, link up */
1495 ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100);
1496 ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX |
1497 E1000_CTRL_SPD_1000 | E1000_CTRL_FD);
1498 ew32(CTRL, ctrl);
1499
1500 /* set mac loopback */
1501 ctrl = er32(RCTL);
1502 ctrl |= E1000_RCTL_LBM_MAC;
1503 ew32(RCTL, ctrl);
1504
1505 /* set testing mode parameters (no need to reset later) */
1506#define KMRNCTRLSTA_OPMODE (0x1F << 16)
1507#define KMRNCTRLSTA_OPMODE_1GB_FD_GMII 0x0582
1508 ew32(KMRNCTRLSTA,
cef8c793 1509 (KMRNCTRLSTA_OPMODE | KMRNCTRLSTA_OPMODE_1GB_FD_GMII));
bc7f75fa
AK
1510
1511 return 0;
1512}
1513
1514static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
1515{
1516 struct e1000_hw *hw = &adapter->hw;
2ec7d297
YL
1517 u32 rctl, fext_nvm11, tarc0;
1518
c8744f44 1519 if (hw->mac.type >= e1000_pch_spt) {
2ec7d297
YL
1520 fext_nvm11 = er32(FEXTNVM11);
1521 fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
1522 ew32(FEXTNVM11, fext_nvm11);
1523 tarc0 = er32(TARC(0));
1524 /* clear bits 28 & 29 (control of MULR concurrent requests) */
1525 tarc0 &= 0xcfffffff;
1526 /* set bit 29 (value of MULR requests is now 2) */
1527 tarc0 |= 0x20000000;
1528 ew32(TARC(0), tarc0);
1529 }
318a94d6
JK
1530 if (hw->phy.media_type == e1000_media_type_fiber ||
1531 hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa
AK
1532 switch (hw->mac.type) {
1533 case e1000_80003es2lan:
1534 return e1000_set_es2lan_mac_loopback(adapter);
bc7f75fa
AK
1535 case e1000_82571:
1536 case e1000_82572:
1537 return e1000_set_82571_fiber_loopback(adapter);
bc7f75fa
AK
1538 default:
1539 rctl = er32(RCTL);
1540 rctl |= E1000_RCTL_LBM_TCVR;
1541 ew32(RCTL, rctl);
1542 return 0;
1543 }
318a94d6 1544 } else if (hw->phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK
1545 return e1000_integrated_phy_loopback(adapter);
1546 }
1547
1548 return 7;
1549}
1550
1551static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
1552{
1553 struct e1000_hw *hw = &adapter->hw;
2ec7d297 1554 u32 rctl, fext_nvm11, tarc0;
bc7f75fa
AK
1555 u16 phy_reg;
1556
1557 rctl = er32(RCTL);
1558 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1559 ew32(RCTL, rctl);
1560
1561 switch (hw->mac.type) {
2ec7d297 1562 case e1000_pch_spt:
c8744f44 1563 case e1000_pch_cnp:
2ec7d297
YL
1564 fext_nvm11 = er32(FEXTNVM11);
1565 fext_nvm11 &= ~E1000_FEXTNVM11_DISABLE_MULR_FIX;
1566 ew32(FEXTNVM11, fext_nvm11);
1567 tarc0 = er32(TARC(0));
1568 /* clear bits 28 & 29 (control of MULR concurrent requests) */
1569 /* set bit 29 (value of MULR requests is now 0) */
1570 tarc0 &= 0xcfffffff;
1571 ew32(TARC(0), tarc0);
1572 /* fall through */
bc7f75fa 1573 case e1000_80003es2lan:
318a94d6
JK
1574 if (hw->phy.media_type == e1000_media_type_fiber ||
1575 hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa 1576 /* restore CTRL_EXT, stealing space from tx_fifo_head */
ad68076e 1577 ew32(CTRL_EXT, adapter->tx_fifo_head);
bc7f75fa
AK
1578 adapter->tx_fifo_head = 0;
1579 }
1580 /* fall through */
1581 case e1000_82571:
1582 case e1000_82572:
318a94d6
JK
1583 if (hw->phy.media_type == e1000_media_type_fiber ||
1584 hw->phy.media_type == e1000_media_type_internal_serdes) {
3ffcf2cb 1585 ew32(SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK);
945a5151 1586 e1e_flush();
1bba4386 1587 usleep_range(10000, 20000);
bc7f75fa
AK
1588 break;
1589 }
1590 /* Fall Through */
1591 default:
1592 hw->mac.autoneg = 1;
1593 if (hw->phy.type == e1000_phy_gg82563)
1594 e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x180);
c2ade1a4
BA
1595 e1e_rphy(hw, MII_BMCR, &phy_reg);
1596 if (phy_reg & BMCR_LOOPBACK) {
1597 phy_reg &= ~BMCR_LOOPBACK;
1598 e1e_wphy(hw, MII_BMCR, phy_reg);
6b598e1e
BA
1599 if (hw->phy.ops.commit)
1600 hw->phy.ops.commit(hw);
bc7f75fa
AK
1601 }
1602 break;
1603 }
1604}
1605
1606static void e1000_create_lbtest_frame(struct sk_buff *skb,
1607 unsigned int frame_size)
1608{
1609 memset(skb->data, 0xFF, frame_size);
1610 frame_size &= ~1;
1611 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1612 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1613 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1614}
1615
1616static int e1000_check_lbtest_frame(struct sk_buff *skb,
1617 unsigned int frame_size)
1618{
1619 frame_size &= ~1;
1620 if (*(skb->data + 3) == 0xFF)
1621 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
17e813ec 1622 (*(skb->data + frame_size / 2 + 12) == 0xAF))
bc7f75fa
AK
1623 return 0;
1624 return 13;
1625}
1626
1627static int e1000_run_loopback_test(struct e1000_adapter *adapter)
1628{
1629 struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1630 struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1631 struct pci_dev *pdev = adapter->pdev;
1632 struct e1000_hw *hw = &adapter->hw;
17e813ec 1633 struct e1000_buffer *buffer_info;
bc7f75fa
AK
1634 int i, j, k, l;
1635 int lc;
1636 int good_cnt;
1637 int ret_val = 0;
1638 unsigned long time;
1639
1e36052e 1640 ew32(RDT(0), rx_ring->count - 1);
bc7f75fa 1641
e921eb1a 1642 /* Calculate the loop count based on the largest descriptor ring
bc7f75fa
AK
1643 * The idea is to wrap the largest ring a number of times using 64
1644 * send/receive pairs during each loop
1645 */
1646
1647 if (rx_ring->count <= tx_ring->count)
1648 lc = ((tx_ring->count / 64) * 2) + 1;
1649 else
1650 lc = ((rx_ring->count / 64) * 2) + 1;
1651
1652 k = 0;
1653 l = 0;
33550cec
BA
1654 /* loop count loop */
1655 for (j = 0; j <= lc; j++) {
1656 /* send the packets */
1657 for (i = 0; i < 64; i++) {
17e813ec
BA
1658 buffer_info = &tx_ring->buffer_info[k];
1659
1660 e1000_create_lbtest_frame(buffer_info->skb, 1024);
0be3f55f 1661 dma_sync_single_for_device(&pdev->dev,
17e813ec
BA
1662 buffer_info->dma,
1663 buffer_info->length,
1664 DMA_TO_DEVICE);
bc7f75fa
AK
1665 k++;
1666 if (k == tx_ring->count)
1667 k = 0;
1668 }
1e36052e 1669 ew32(TDT(0), k);
945a5151 1670 e1e_flush();
bc7f75fa 1671 msleep(200);
e80bd1d1 1672 time = jiffies; /* set the start time for the receive */
bc7f75fa 1673 good_cnt = 0;
33550cec
BA
1674 /* receive the sent packets */
1675 do {
17e813ec
BA
1676 buffer_info = &rx_ring->buffer_info[l];
1677
0be3f55f 1678 dma_sync_single_for_cpu(&pdev->dev,
17e813ec
BA
1679 buffer_info->dma, 2048,
1680 DMA_FROM_DEVICE);
bc7f75fa 1681
17e813ec
BA
1682 ret_val = e1000_check_lbtest_frame(buffer_info->skb,
1683 1024);
bc7f75fa
AK
1684 if (!ret_val)
1685 good_cnt++;
1686 l++;
1687 if (l == rx_ring->count)
1688 l = 0;
e921eb1a 1689 /* time + 20 msecs (200 msecs on 2.4) is more than
bc7f75fa
AK
1690 * enough time to complete the receives, if it's
1691 * exceeded, break and error off
1692 */
1693 } while ((good_cnt < 64) && !time_after(jiffies, time + 20));
1694 if (good_cnt != 64) {
e80bd1d1 1695 ret_val = 13; /* ret_val is the same as mis-compare */
bc7f75fa
AK
1696 break;
1697 }
22f8abaa 1698 if (time_after(jiffies, time + 20)) {
e80bd1d1 1699 ret_val = 14; /* error code for time out error */
bc7f75fa
AK
1700 break;
1701 }
33550cec 1702 }
bc7f75fa
AK
1703 return ret_val;
1704}
1705
1706static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
1707{
44abd5c1
BA
1708 struct e1000_hw *hw = &adapter->hw;
1709
e921eb1a 1710 /* PHY loopback cannot be performed if SoL/IDER sessions are active */
470a5420
BA
1711 if (hw->phy.ops.check_reset_block &&
1712 hw->phy.ops.check_reset_block(hw)) {
44defeb3 1713 e_err("Cannot do PHY loopback test when SoL/IDER is active.\n");
bc7f75fa
AK
1714 *data = 0;
1715 goto out;
1716 }
1717
1718 *data = e1000_setup_desc_rings(adapter);
e265522c 1719 if (*data)
bc7f75fa
AK
1720 goto out;
1721
1722 *data = e1000_setup_loopback_test(adapter);
e265522c 1723 if (*data)
bc7f75fa
AK
1724 goto err_loopback;
1725
1726 *data = e1000_run_loopback_test(adapter);
1727 e1000_loopback_cleanup(adapter);
1728
1729err_loopback:
1730 e1000_free_desc_rings(adapter);
1731out:
1732 return *data;
1733}
1734
1735static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
1736{
1737 struct e1000_hw *hw = &adapter->hw;
1738
1739 *data = 0;
318a94d6 1740 if (hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa 1741 int i = 0;
6cf08d1c 1742
612e244c 1743 hw->mac.serdes_has_link = false;
bc7f75fa 1744
e921eb1a 1745 /* On some blade server designs, link establishment
ad68076e
BA
1746 * could take as long as 2-3 minutes
1747 */
bc7f75fa
AK
1748 do {
1749 hw->mac.ops.check_for_link(hw);
1750 if (hw->mac.serdes_has_link)
1751 return *data;
1752 msleep(20);
1753 } while (i++ < 3750);
1754
1755 *data = 1;
1756 } else {
1757 hw->mac.ops.check_for_link(hw);
1758 if (hw->mac.autoneg)
e921eb1a 1759 /* On some Phy/switch combinations, link establishment
5661aeb0
BA
1760 * can take a few seconds more than expected.
1761 */
ce43a216 1762 msleep_interruptible(5000);
bc7f75fa 1763
5661aeb0 1764 if (!(er32(STATUS) & E1000_STATUS_LU))
bc7f75fa
AK
1765 *data = 1;
1766 }
1767 return *data;
1768}
1769
8bb62869
BA
1770static int e1000e_get_sset_count(struct net_device __always_unused *netdev,
1771 int sset)
bc7f75fa 1772{
b9f2c044
JG
1773 switch (sset) {
1774 case ETH_SS_TEST:
1775 return E1000_TEST_LEN;
1776 case ETH_SS_STATS:
1777 return E1000_STATS_LEN;
1778 default:
1779 return -EOPNOTSUPP;
1780 }
bc7f75fa
AK
1781}
1782
1783static void e1000_diag_test(struct net_device *netdev,
1784 struct ethtool_test *eth_test, u64 *data)
1785{
1786 struct e1000_adapter *adapter = netdev_priv(netdev);
1787 u16 autoneg_advertised;
1788 u8 forced_speed_duplex;
1789 u8 autoneg;
1790 bool if_running = netif_running(netdev);
1791
3ef672ab
BA
1792 pm_runtime_get_sync(netdev->dev.parent);
1793
bc7f75fa 1794 set_bit(__E1000_TESTING, &adapter->state);
31dbe5b4
BA
1795
1796 if (!if_running) {
1797 /* Get control of and reset hardware */
1798 if (adapter->flags & FLAG_HAS_AMT)
1799 e1000e_get_hw_control(adapter);
1800
1801 e1000e_power_up_phy(adapter);
1802
1803 adapter->hw.phy.autoneg_wait_to_complete = 1;
1804 e1000e_reset(adapter);
1805 adapter->hw.phy.autoneg_wait_to_complete = 0;
1806 }
1807
bc7f75fa
AK
1808 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1809 /* Offline tests */
1810
1811 /* save speed, duplex, autoneg settings */
1812 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1813 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1814 autoneg = adapter->hw.mac.autoneg;
1815
44defeb3 1816 e_info("offline testing starting\n");
bc7f75fa 1817
bc7f75fa
AK
1818 if (if_running)
1819 /* indicate we're in test mode */
d5ea45da 1820 e1000e_close(netdev);
bc7f75fa
AK
1821
1822 if (e1000_reg_test(adapter, &data[0]))
1823 eth_test->flags |= ETH_TEST_FL_FAILED;
1824
1825 e1000e_reset(adapter);
1826 if (e1000_eeprom_test(adapter, &data[1]))
1827 eth_test->flags |= ETH_TEST_FL_FAILED;
1828
1829 e1000e_reset(adapter);
1830 if (e1000_intr_test(adapter, &data[2]))
1831 eth_test->flags |= ETH_TEST_FL_FAILED;
1832
1833 e1000e_reset(adapter);
bc7f75fa
AK
1834 if (e1000_loopback_test(adapter, &data[3]))
1835 eth_test->flags |= ETH_TEST_FL_FAILED;
1836
c6ce3854
CW
1837 /* force this routine to wait until autoneg complete/timeout */
1838 adapter->hw.phy.autoneg_wait_to_complete = 1;
1839 e1000e_reset(adapter);
1840 adapter->hw.phy.autoneg_wait_to_complete = 0;
1841
1842 if (e1000_link_test(adapter, &data[4]))
1843 eth_test->flags |= ETH_TEST_FL_FAILED;
1844
bc7f75fa
AK
1845 /* restore speed, duplex, autoneg settings */
1846 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1847 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1848 adapter->hw.mac.autoneg = autoneg;
bc7f75fa 1849 e1000e_reset(adapter);
bc7f75fa
AK
1850
1851 clear_bit(__E1000_TESTING, &adapter->state);
1852 if (if_running)
d5ea45da 1853 e1000e_open(netdev);
bc7f75fa 1854 } else {
31dbe5b4 1855 /* Online tests */
11b08be8 1856
44defeb3 1857 e_info("online testing starting\n");
bc7f75fa 1858
31dbe5b4 1859 /* register, eeprom, intr and loopback tests not run online */
bc7f75fa
AK
1860 data[0] = 0;
1861 data[1] = 0;
1862 data[2] = 0;
1863 data[3] = 0;
1864
31dbe5b4
BA
1865 if (e1000_link_test(adapter, &data[4]))
1866 eth_test->flags |= ETH_TEST_FL_FAILED;
11b08be8 1867
bc7f75fa
AK
1868 clear_bit(__E1000_TESTING, &adapter->state);
1869 }
31dbe5b4
BA
1870
1871 if (!if_running) {
1872 e1000e_reset(adapter);
1873
1874 if (adapter->flags & FLAG_HAS_AMT)
1875 e1000e_release_hw_control(adapter);
1876 }
1877
bc7f75fa 1878 msleep_interruptible(4 * 1000);
3ef672ab
BA
1879
1880 pm_runtime_put_sync(netdev->dev.parent);
bc7f75fa
AK
1881}
1882
1883static void e1000_get_wol(struct net_device *netdev,
1884 struct ethtool_wolinfo *wol)
1885{
1886 struct e1000_adapter *adapter = netdev_priv(netdev);
1887
1888 wol->supported = 0;
1889 wol->wolopts = 0;
1890
6ff68026
RW
1891 if (!(adapter->flags & FLAG_HAS_WOL) ||
1892 !device_can_wakeup(&adapter->pdev->dev))
bc7f75fa
AK
1893 return;
1894
1895 wol->supported = WAKE_UCAST | WAKE_MCAST |
4a29e155 1896 WAKE_BCAST | WAKE_MAGIC | WAKE_PHY;
bc7f75fa
AK
1897
1898 /* apply any specific unsupported masks here */
1899 if (adapter->flags & FLAG_NO_WAKE_UCAST) {
1900 wol->supported &= ~WAKE_UCAST;
1901
1902 if (adapter->wol & E1000_WUFC_EX)
6ad65145 1903 e_err("Interface does not support directed (unicast) frame wake-up packets\n");
bc7f75fa
AK
1904 }
1905
1906 if (adapter->wol & E1000_WUFC_EX)
1907 wol->wolopts |= WAKE_UCAST;
1908 if (adapter->wol & E1000_WUFC_MC)
1909 wol->wolopts |= WAKE_MCAST;
1910 if (adapter->wol & E1000_WUFC_BC)
1911 wol->wolopts |= WAKE_BCAST;
1912 if (adapter->wol & E1000_WUFC_MAG)
1913 wol->wolopts |= WAKE_MAGIC;
efb90e43
MW
1914 if (adapter->wol & E1000_WUFC_LNKC)
1915 wol->wolopts |= WAKE_PHY;
bc7f75fa
AK
1916}
1917
4a29e155 1918static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
bc7f75fa
AK
1919{
1920 struct e1000_adapter *adapter = netdev_priv(netdev);
1921
6ff68026 1922 if (!(adapter->flags & FLAG_HAS_WOL) ||
1fbfca32
BA
1923 !device_can_wakeup(&adapter->pdev->dev) ||
1924 (wol->wolopts & ~(WAKE_UCAST | WAKE_MCAST | WAKE_BCAST |
4a29e155 1925 WAKE_MAGIC | WAKE_PHY)))
1fbfca32 1926 return -EOPNOTSUPP;
bc7f75fa
AK
1927
1928 /* these settings will always override what we currently have */
1929 adapter->wol = 0;
1930
1931 if (wol->wolopts & WAKE_UCAST)
1932 adapter->wol |= E1000_WUFC_EX;
1933 if (wol->wolopts & WAKE_MCAST)
1934 adapter->wol |= E1000_WUFC_MC;
1935 if (wol->wolopts & WAKE_BCAST)
1936 adapter->wol |= E1000_WUFC_BC;
1937 if (wol->wolopts & WAKE_MAGIC)
1938 adapter->wol |= E1000_WUFC_MAG;
efb90e43
MW
1939 if (wol->wolopts & WAKE_PHY)
1940 adapter->wol |= E1000_WUFC_LNKC;
bc7f75fa 1941
6ff68026
RW
1942 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1943
bc7f75fa
AK
1944 return 0;
1945}
1946
dbf80dcb
BA
1947static int e1000_set_phys_id(struct net_device *netdev,
1948 enum ethtool_phys_id_state state)
bc7f75fa
AK
1949{
1950 struct e1000_adapter *adapter = netdev_priv(netdev);
4662e82b 1951 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1952
dbf80dcb
BA
1953 switch (state) {
1954 case ETHTOOL_ID_ACTIVE:
3ef672ab
BA
1955 pm_runtime_get_sync(netdev->dev.parent);
1956
dbf80dcb
BA
1957 if (!hw->mac.ops.blink_led)
1958 return 2; /* cycle on/off twice per second */
bc7f75fa 1959
dbf80dcb
BA
1960 hw->mac.ops.blink_led(hw);
1961 break;
1962
1963 case ETHTOOL_ID_INACTIVE:
4662e82b
BA
1964 if (hw->phy.type == e1000_phy_ife)
1965 e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, 0);
dbf80dcb
BA
1966 hw->mac.ops.led_off(hw);
1967 hw->mac.ops.cleanup_led(hw);
3ef672ab 1968 pm_runtime_put_sync(netdev->dev.parent);
dbf80dcb 1969 break;
bc7f75fa 1970
dbf80dcb 1971 case ETHTOOL_ID_ON:
f23efdff 1972 hw->mac.ops.led_on(hw);
dbf80dcb 1973 break;
bc7f75fa 1974
dbf80dcb 1975 case ETHTOOL_ID_OFF:
f23efdff 1976 hw->mac.ops.led_off(hw);
dbf80dcb
BA
1977 break;
1978 }
3ef672ab 1979
bc7f75fa
AK
1980 return 0;
1981}
1982
de5b3077
AK
1983static int e1000_get_coalesce(struct net_device *netdev,
1984 struct ethtool_coalesce *ec)
1985{
1986 struct e1000_adapter *adapter = netdev_priv(netdev);
1987
eab2abf5 1988 if (adapter->itr_setting <= 4)
de5b3077
AK
1989 ec->rx_coalesce_usecs = adapter->itr_setting;
1990 else
1991 ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
1992
1993 return 0;
1994}
1995
1996static int e1000_set_coalesce(struct net_device *netdev,
1997 struct ethtool_coalesce *ec)
1998{
1999 struct e1000_adapter *adapter = netdev_priv(netdev);
de5b3077
AK
2000
2001 if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
eab2abf5 2002 ((ec->rx_coalesce_usecs > 4) &&
de5b3077
AK
2003 (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
2004 (ec->rx_coalesce_usecs == 2))
2005 return -EINVAL;
2006
eab2abf5 2007 if (ec->rx_coalesce_usecs == 4) {
06a402ef
BA
2008 adapter->itr_setting = 4;
2009 adapter->itr = adapter->itr_setting;
eab2abf5 2010 } else if (ec->rx_coalesce_usecs <= 3) {
de5b3077
AK
2011 adapter->itr = 20000;
2012 adapter->itr_setting = ec->rx_coalesce_usecs;
2013 } else {
2014 adapter->itr = (1000000 / ec->rx_coalesce_usecs);
2015 adapter->itr_setting = adapter->itr & ~3;
2016 }
2017
3ef672ab
BA
2018 pm_runtime_get_sync(netdev->dev.parent);
2019
de5b3077 2020 if (adapter->itr_setting != 0)
22a4cca2 2021 e1000e_write_itr(adapter, adapter->itr);
de5b3077 2022 else
22a4cca2 2023 e1000e_write_itr(adapter, 0);
de5b3077 2024
3ef672ab
BA
2025 pm_runtime_put_sync(netdev->dev.parent);
2026
de5b3077
AK
2027 return 0;
2028}
2029
bc7f75fa
AK
2030static int e1000_nway_reset(struct net_device *netdev)
2031{
2032 struct e1000_adapter *adapter = netdev_priv(netdev);
5962bc21
BA
2033
2034 if (!netif_running(netdev))
2035 return -EAGAIN;
2036
2037 if (!adapter->hw.mac.autoneg)
2038 return -EINVAL;
2039
3ef672ab 2040 pm_runtime_get_sync(netdev->dev.parent);
5962bc21 2041 e1000e_reinit_locked(adapter);
3ef672ab 2042 pm_runtime_put_sync(netdev->dev.parent);
5962bc21 2043
bc7f75fa
AK
2044 return 0;
2045}
2046
bc7f75fa 2047static void e1000_get_ethtool_stats(struct net_device *netdev,
8bb62869 2048 struct ethtool_stats __always_unused *stats,
bc7f75fa
AK
2049 u64 *data)
2050{
2051 struct e1000_adapter *adapter = netdev_priv(netdev);
67fd4fcb 2052 struct rtnl_link_stats64 net_stats;
bc7f75fa 2053 int i;
e0f36a95 2054 char *p = NULL;
bc7f75fa 2055
3ef672ab
BA
2056 pm_runtime_get_sync(netdev->dev.parent);
2057
24ad2a92 2058 dev_get_stats(netdev, &net_stats);
3ef672ab
BA
2059
2060 pm_runtime_put_sync(netdev->dev.parent);
2061
bc7f75fa 2062 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
e0f36a95
AK
2063 switch (e1000_gstrings_stats[i].type) {
2064 case NETDEV_STATS:
53aa82da 2065 p = (char *)&net_stats +
f0ff4398 2066 e1000_gstrings_stats[i].stat_offset;
e0f36a95
AK
2067 break;
2068 case E1000_STATS:
53aa82da 2069 p = (char *)adapter +
f0ff4398 2070 e1000_gstrings_stats[i].stat_offset;
e0f36a95 2071 break;
61c75816
BA
2072 default:
2073 data[i] = 0;
2074 continue;
e0f36a95
AK
2075 }
2076
bc7f75fa 2077 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
f0ff4398 2078 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
bc7f75fa
AK
2079 }
2080}
2081
8bb62869
BA
2082static void e1000_get_strings(struct net_device __always_unused *netdev,
2083 u32 stringset, u8 *data)
bc7f75fa
AK
2084{
2085 u8 *p = data;
2086 int i;
2087
2088 switch (stringset) {
2089 case ETH_SS_TEST:
5c1bda0a 2090 memcpy(data, e1000_gstrings_test, sizeof(e1000_gstrings_test));
bc7f75fa
AK
2091 break;
2092 case ETH_SS_STATS:
2093 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
2094 memcpy(p, e1000_gstrings_stats[i].stat_string,
2095 ETH_GSTRING_LEN);
2096 p += ETH_GSTRING_LEN;
2097 }
2098 break;
2099 }
2100}
2101
70495a50 2102static int e1000_get_rxnfc(struct net_device *netdev,
8bb62869
BA
2103 struct ethtool_rxnfc *info,
2104 u32 __always_unused *rule_locs)
70495a50
BA
2105{
2106 info->data = 0;
2107
2108 switch (info->cmd) {
2109 case ETHTOOL_GRXFH: {
2110 struct e1000_adapter *adapter = netdev_priv(netdev);
2111 struct e1000_hw *hw = &adapter->hw;
3ef672ab
BA
2112 u32 mrqc;
2113
2114 pm_runtime_get_sync(netdev->dev.parent);
2115 mrqc = er32(MRQC);
2116 pm_runtime_put_sync(netdev->dev.parent);
70495a50
BA
2117
2118 if (!(mrqc & E1000_MRQC_RSS_FIELD_MASK))
2119 return 0;
2120
2121 switch (info->flow_type) {
2122 case TCP_V4_FLOW:
2123 if (mrqc & E1000_MRQC_RSS_FIELD_IPV4_TCP)
2124 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2125 /* fall through */
2126 case UDP_V4_FLOW:
2127 case SCTP_V4_FLOW:
2128 case AH_ESP_V4_FLOW:
2129 case IPV4_FLOW:
2130 if (mrqc & E1000_MRQC_RSS_FIELD_IPV4)
2131 info->data |= RXH_IP_SRC | RXH_IP_DST;
2132 break;
2133 case TCP_V6_FLOW:
2134 if (mrqc & E1000_MRQC_RSS_FIELD_IPV6_TCP)
2135 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2136 /* fall through */
2137 case UDP_V6_FLOW:
2138 case SCTP_V6_FLOW:
2139 case AH_ESP_V6_FLOW:
2140 case IPV6_FLOW:
2141 if (mrqc & E1000_MRQC_RSS_FIELD_IPV6)
2142 info->data |= RXH_IP_SRC | RXH_IP_DST;
2143 break;
2144 default:
2145 break;
2146 }
2147 return 0;
2148 }
2149 default:
2150 return -EOPNOTSUPP;
2151 }
2152}
2153
203e4151
BA
2154static int e1000e_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2155{
2156 struct e1000_adapter *adapter = netdev_priv(netdev);
2157 struct e1000_hw *hw = &adapter->hw;
d495bcb8
BA
2158 u16 cap_addr, lpa_addr, pcs_stat_addr, phy_data;
2159 u32 ret_val;
203e4151 2160
d495bcb8 2161 if (!(adapter->flags2 & FLAG2_HAS_EEE))
203e4151
BA
2162 return -EOPNOTSUPP;
2163
2164 switch (hw->phy.type) {
2165 case e1000_phy_82579:
2166 cap_addr = I82579_EEE_CAPABILITY;
203e4151
BA
2167 lpa_addr = I82579_EEE_LP_ABILITY;
2168 pcs_stat_addr = I82579_EEE_PCS_STATUS;
2169 break;
2170 case e1000_phy_i217:
2171 cap_addr = I217_EEE_CAPABILITY;
203e4151
BA
2172 lpa_addr = I217_EEE_LP_ABILITY;
2173 pcs_stat_addr = I217_EEE_PCS_STATUS;
2174 break;
2175 default:
2176 return -EOPNOTSUPP;
2177 }
2178
3ef672ab
BA
2179 pm_runtime_get_sync(netdev->dev.parent);
2180
203e4151 2181 ret_val = hw->phy.ops.acquire(hw);
3ef672ab
BA
2182 if (ret_val) {
2183 pm_runtime_put_sync(netdev->dev.parent);
203e4151 2184 return -EBUSY;
3ef672ab 2185 }
203e4151
BA
2186
2187 /* EEE Capability */
2188 ret_val = e1000_read_emi_reg_locked(hw, cap_addr, &phy_data);
2189 if (ret_val)
2190 goto release;
2191 edata->supported = mmd_eee_cap_to_ethtool_sup_t(phy_data);
2192
2193 /* EEE Advertised */
d495bcb8 2194 edata->advertised = mmd_eee_adv_to_ethtool_adv_t(adapter->eee_advert);
203e4151
BA
2195
2196 /* EEE Link Partner Advertised */
2197 ret_val = e1000_read_emi_reg_locked(hw, lpa_addr, &phy_data);
2198 if (ret_val)
2199 goto release;
2200 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2201
2202 /* EEE PCS Status */
2203 ret_val = e1000_read_emi_reg_locked(hw, pcs_stat_addr, &phy_data);
3ef672ab
BA
2204 if (ret_val)
2205 goto release;
203e4151
BA
2206 if (hw->phy.type == e1000_phy_82579)
2207 phy_data <<= 8;
2208
203e4151
BA
2209 /* Result of the EEE auto negotiation - there is no register that
2210 * has the status of the EEE negotiation so do a best-guess based
d495bcb8 2211 * on whether Tx or Rx LPI indications have been received.
203e4151 2212 */
d495bcb8 2213 if (phy_data & (E1000_EEE_TX_LPI_RCVD | E1000_EEE_RX_LPI_RCVD))
203e4151
BA
2214 edata->eee_active = true;
2215
2216 edata->eee_enabled = !hw->dev_spec.ich8lan.eee_disable;
2217 edata->tx_lpi_enabled = true;
2218 edata->tx_lpi_timer = er32(LPIC) >> E1000_LPIC_LPIET_SHIFT;
2219
3ef672ab
BA
2220release:
2221 hw->phy.ops.release(hw);
2222 if (ret_val)
2223 ret_val = -ENODATA;
2224
2225 pm_runtime_put_sync(netdev->dev.parent);
2226
2227 return ret_val;
203e4151
BA
2228}
2229
2230static int e1000e_set_eee(struct net_device *netdev, struct ethtool_eee *edata)
2231{
2232 struct e1000_adapter *adapter = netdev_priv(netdev);
2233 struct e1000_hw *hw = &adapter->hw;
2234 struct ethtool_eee eee_curr;
2235 s32 ret_val;
2236
203e4151
BA
2237 ret_val = e1000e_get_eee(netdev, &eee_curr);
2238 if (ret_val)
2239 return ret_val;
2240
203e4151
BA
2241 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
2242 e_err("Setting EEE tx-lpi is not supported\n");
2243 return -EINVAL;
2244 }
2245
2246 if (eee_curr.tx_lpi_timer != edata->tx_lpi_timer) {
2247 e_err("Setting EEE Tx LPI timer is not supported\n");
2248 return -EINVAL;
2249 }
2250
d495bcb8
BA
2251 if (edata->advertised & ~(ADVERTISE_100_FULL | ADVERTISE_1000_FULL)) {
2252 e_err("EEE advertisement supports only 100TX and/or 1000T full-duplex\n");
2253 return -EINVAL;
203e4151
BA
2254 }
2255
d495bcb8
BA
2256 adapter->eee_advert = ethtool_adv_to_mmd_eee_adv_t(edata->advertised);
2257
2258 hw->dev_spec.ich8lan.eee_disable = !edata->eee_enabled;
2259
3ef672ab
BA
2260 pm_runtime_get_sync(netdev->dev.parent);
2261
d495bcb8
BA
2262 /* reset the link */
2263 if (netif_running(netdev))
2264 e1000e_reinit_locked(adapter);
2265 else
2266 e1000e_reset(adapter);
2267
3ef672ab
BA
2268 pm_runtime_put_sync(netdev->dev.parent);
2269
203e4151
BA
2270 return 0;
2271}
2272
b67e1913
BA
2273static int e1000e_get_ts_info(struct net_device *netdev,
2274 struct ethtool_ts_info *info)
2275{
2276 struct e1000_adapter *adapter = netdev_priv(netdev);
2277
2278 ethtool_op_get_ts_info(netdev, info);
2279
2280 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
2281 return 0;
2282
2283 info->so_timestamping |= (SOF_TIMESTAMPING_TX_HARDWARE |
2284 SOF_TIMESTAMPING_RX_HARDWARE |
2285 SOF_TIMESTAMPING_RAW_HARDWARE);
2286
18dd2392
JK
2287 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
2288
2289 info->rx_filters = (BIT(HWTSTAMP_FILTER_NONE) |
2290 BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2291 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2292 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2293 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
2294 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2295 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
2296 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
2297 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
2298 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
2299 BIT(HWTSTAMP_FILTER_ALL));
b67e1913 2300
d89777bf
BA
2301 if (adapter->ptp_clock)
2302 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2303
b67e1913
BA
2304 return 0;
2305}
2306
bc7f75fa 2307static const struct ethtool_ops e1000_ethtool_ops = {
bc7f75fa
AK
2308 .get_drvinfo = e1000_get_drvinfo,
2309 .get_regs_len = e1000_get_regs_len,
2310 .get_regs = e1000_get_regs,
2311 .get_wol = e1000_get_wol,
2312 .set_wol = e1000_set_wol,
2313 .get_msglevel = e1000_get_msglevel,
2314 .set_msglevel = e1000_set_msglevel,
2315 .nway_reset = e1000_nway_reset,
ed4ba4b5 2316 .get_link = ethtool_op_get_link,
bc7f75fa
AK
2317 .get_eeprom_len = e1000_get_eeprom_len,
2318 .get_eeprom = e1000_get_eeprom,
2319 .set_eeprom = e1000_set_eeprom,
2320 .get_ringparam = e1000_get_ringparam,
2321 .set_ringparam = e1000_set_ringparam,
2322 .get_pauseparam = e1000_get_pauseparam,
2323 .set_pauseparam = e1000_set_pauseparam,
bc7f75fa
AK
2324 .self_test = e1000_diag_test,
2325 .get_strings = e1000_get_strings,
dbf80dcb 2326 .set_phys_id = e1000_set_phys_id,
bc7f75fa 2327 .get_ethtool_stats = e1000_get_ethtool_stats,
b9f2c044 2328 .get_sset_count = e1000e_get_sset_count,
de5b3077
AK
2329 .get_coalesce = e1000_get_coalesce,
2330 .set_coalesce = e1000_set_coalesce,
70495a50 2331 .get_rxnfc = e1000_get_rxnfc,
b67e1913 2332 .get_ts_info = e1000e_get_ts_info,
203e4151
BA
2333 .get_eee = e1000e_get_eee,
2334 .set_eee = e1000e_set_eee,
fb052fdd
PR
2335 .get_link_ksettings = e1000_get_link_ksettings,
2336 .set_link_ksettings = e1000_set_link_ksettings,
bc7f75fa
AK
2337};
2338
2339void e1000e_set_ethtool_ops(struct net_device *netdev)
2340{
7ad24ea4 2341 netdev->ethtool_ops = &e1000_ethtool_ops;
bc7f75fa 2342}