Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
0abb6eb1 AK |
3 | Intel PRO/1000 Linux driver |
4 | Copyright(c) 1999 - 2006 Intel Corporation. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
1da177e4 | 13 | more details. |
0abb6eb1 | 14 | |
1da177e4 | 15 | You should have received a copy of the GNU General Public License along with |
0abb6eb1 AK |
16 | this program; if not, write to the Free Software Foundation, Inc., |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
1da177e4 LT |
22 | Contact Information: |
23 | Linux NICS <linux.nics@intel.com> | |
3d41e30a | 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
1da177e4 LT |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | #include "e1000.h" | |
d0bb53e1 | 30 | #include <net/ip6_checksum.h> |
5377a416 | 31 | #include <linux/io.h> |
70c71606 | 32 | #include <linux/prefetch.h> |
5622e404 JP |
33 | #include <linux/bitops.h> |
34 | #include <linux/if_vlan.h> | |
5377a416 | 35 | |
1da177e4 | 36 | char e1000_driver_name[] = "e1000"; |
3ad2cc67 | 37 | static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; |
ab08853f | 38 | #define DRV_VERSION "7.3.21-k8-NAPI" |
abec42a4 SH |
39 | const char e1000_driver_version[] = DRV_VERSION; |
40 | static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; | |
1da177e4 LT |
41 | |
42 | /* e1000_pci_tbl - PCI Device ID Table | |
43 | * | |
44 | * Last entry must be all 0s | |
45 | * | |
46 | * Macro expands to... | |
47 | * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)} | |
48 | */ | |
9baa3c34 | 49 | static const struct pci_device_id e1000_pci_tbl[] = { |
1da177e4 LT |
50 | INTEL_E1000_ETHERNET_DEVICE(0x1000), |
51 | INTEL_E1000_ETHERNET_DEVICE(0x1001), | |
52 | INTEL_E1000_ETHERNET_DEVICE(0x1004), | |
53 | INTEL_E1000_ETHERNET_DEVICE(0x1008), | |
54 | INTEL_E1000_ETHERNET_DEVICE(0x1009), | |
55 | INTEL_E1000_ETHERNET_DEVICE(0x100C), | |
56 | INTEL_E1000_ETHERNET_DEVICE(0x100D), | |
57 | INTEL_E1000_ETHERNET_DEVICE(0x100E), | |
58 | INTEL_E1000_ETHERNET_DEVICE(0x100F), | |
59 | INTEL_E1000_ETHERNET_DEVICE(0x1010), | |
60 | INTEL_E1000_ETHERNET_DEVICE(0x1011), | |
61 | INTEL_E1000_ETHERNET_DEVICE(0x1012), | |
62 | INTEL_E1000_ETHERNET_DEVICE(0x1013), | |
63 | INTEL_E1000_ETHERNET_DEVICE(0x1014), | |
64 | INTEL_E1000_ETHERNET_DEVICE(0x1015), | |
65 | INTEL_E1000_ETHERNET_DEVICE(0x1016), | |
66 | INTEL_E1000_ETHERNET_DEVICE(0x1017), | |
67 | INTEL_E1000_ETHERNET_DEVICE(0x1018), | |
68 | INTEL_E1000_ETHERNET_DEVICE(0x1019), | |
2648345f | 69 | INTEL_E1000_ETHERNET_DEVICE(0x101A), |
1da177e4 LT |
70 | INTEL_E1000_ETHERNET_DEVICE(0x101D), |
71 | INTEL_E1000_ETHERNET_DEVICE(0x101E), | |
72 | INTEL_E1000_ETHERNET_DEVICE(0x1026), | |
73 | INTEL_E1000_ETHERNET_DEVICE(0x1027), | |
74 | INTEL_E1000_ETHERNET_DEVICE(0x1028), | |
75 | INTEL_E1000_ETHERNET_DEVICE(0x1075), | |
76 | INTEL_E1000_ETHERNET_DEVICE(0x1076), | |
77 | INTEL_E1000_ETHERNET_DEVICE(0x1077), | |
78 | INTEL_E1000_ETHERNET_DEVICE(0x1078), | |
79 | INTEL_E1000_ETHERNET_DEVICE(0x1079), | |
80 | INTEL_E1000_ETHERNET_DEVICE(0x107A), | |
81 | INTEL_E1000_ETHERNET_DEVICE(0x107B), | |
82 | INTEL_E1000_ETHERNET_DEVICE(0x107C), | |
83 | INTEL_E1000_ETHERNET_DEVICE(0x108A), | |
b7ee49db | 84 | INTEL_E1000_ETHERNET_DEVICE(0x1099), |
b7ee49db | 85 | INTEL_E1000_ETHERNET_DEVICE(0x10B5), |
5377a416 | 86 | INTEL_E1000_ETHERNET_DEVICE(0x2E6E), |
1da177e4 LT |
87 | /* required last entry */ |
88 | {0,} | |
89 | }; | |
90 | ||
91 | MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); | |
92 | ||
35574764 NN |
93 | int e1000_up(struct e1000_adapter *adapter); |
94 | void e1000_down(struct e1000_adapter *adapter); | |
95 | void e1000_reinit_locked(struct e1000_adapter *adapter); | |
96 | void e1000_reset(struct e1000_adapter *adapter); | |
35574764 NN |
97 | int e1000_setup_all_tx_resources(struct e1000_adapter *adapter); |
98 | int e1000_setup_all_rx_resources(struct e1000_adapter *adapter); | |
99 | void e1000_free_all_tx_resources(struct e1000_adapter *adapter); | |
100 | void e1000_free_all_rx_resources(struct e1000_adapter *adapter); | |
3ad2cc67 | 101 | static int e1000_setup_tx_resources(struct e1000_adapter *adapter, |
a48954c8 | 102 | struct e1000_tx_ring *txdr); |
3ad2cc67 | 103 | static int e1000_setup_rx_resources(struct e1000_adapter *adapter, |
a48954c8 | 104 | struct e1000_rx_ring *rxdr); |
3ad2cc67 | 105 | static void e1000_free_tx_resources(struct e1000_adapter *adapter, |
a48954c8 | 106 | struct e1000_tx_ring *tx_ring); |
3ad2cc67 | 107 | static void e1000_free_rx_resources(struct e1000_adapter *adapter, |
a48954c8 | 108 | struct e1000_rx_ring *rx_ring); |
35574764 | 109 | void e1000_update_stats(struct e1000_adapter *adapter); |
1da177e4 LT |
110 | |
111 | static int e1000_init_module(void); | |
112 | static void e1000_exit_module(void); | |
113 | static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent); | |
9f9a12f8 | 114 | static void e1000_remove(struct pci_dev *pdev); |
581d708e | 115 | static int e1000_alloc_queues(struct e1000_adapter *adapter); |
1da177e4 LT |
116 | static int e1000_sw_init(struct e1000_adapter *adapter); |
117 | static int e1000_open(struct net_device *netdev); | |
118 | static int e1000_close(struct net_device *netdev); | |
119 | static void e1000_configure_tx(struct e1000_adapter *adapter); | |
120 | static void e1000_configure_rx(struct e1000_adapter *adapter); | |
121 | static void e1000_setup_rctl(struct e1000_adapter *adapter); | |
581d708e MC |
122 | static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter); |
123 | static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter); | |
124 | static void e1000_clean_tx_ring(struct e1000_adapter *adapter, | |
a48954c8 | 125 | struct e1000_tx_ring *tx_ring); |
581d708e | 126 | static void e1000_clean_rx_ring(struct e1000_adapter *adapter, |
a48954c8 | 127 | struct e1000_rx_ring *rx_ring); |
db0ce50d | 128 | static void e1000_set_rx_mode(struct net_device *netdev); |
5cf42fcd | 129 | static void e1000_update_phy_info_task(struct work_struct *work); |
a4010afe | 130 | static void e1000_watchdog(struct work_struct *work); |
5cf42fcd | 131 | static void e1000_82547_tx_fifo_stall_task(struct work_struct *work); |
3b29a56d SH |
132 | static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, |
133 | struct net_device *netdev); | |
a48954c8 | 134 | static struct net_device_stats *e1000_get_stats(struct net_device *netdev); |
1da177e4 LT |
135 | static int e1000_change_mtu(struct net_device *netdev, int new_mtu); |
136 | static int e1000_set_mac(struct net_device *netdev, void *p); | |
7d12e780 | 137 | static irqreturn_t e1000_intr(int irq, void *data); |
c3033b01 JP |
138 | static bool e1000_clean_tx_irq(struct e1000_adapter *adapter, |
139 | struct e1000_tx_ring *tx_ring); | |
bea3348e | 140 | static int e1000_clean(struct napi_struct *napi, int budget); |
c3033b01 JP |
141 | static bool e1000_clean_rx_irq(struct e1000_adapter *adapter, |
142 | struct e1000_rx_ring *rx_ring, | |
143 | int *work_done, int work_to_do); | |
edbbb3ca JB |
144 | static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter, |
145 | struct e1000_rx_ring *rx_ring, | |
146 | int *work_done, int work_to_do); | |
08e83316 SD |
147 | static void e1000_alloc_dummy_rx_buffers(struct e1000_adapter *adapter, |
148 | struct e1000_rx_ring *rx_ring, | |
149 | int cleaned_count) | |
150 | { | |
151 | } | |
581d708e | 152 | static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
edbbb3ca | 153 | struct e1000_rx_ring *rx_ring, |
72d64a43 | 154 | int cleaned_count); |
edbbb3ca JB |
155 | static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter, |
156 | struct e1000_rx_ring *rx_ring, | |
157 | int cleaned_count); | |
1da177e4 LT |
158 | static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); |
159 | static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, | |
160 | int cmd); | |
1da177e4 LT |
161 | static void e1000_enter_82542_rst(struct e1000_adapter *adapter); |
162 | static void e1000_leave_82542_rst(struct e1000_adapter *adapter); | |
163 | static void e1000_tx_timeout(struct net_device *dev); | |
65f27f38 | 164 | static void e1000_reset_task(struct work_struct *work); |
1da177e4 | 165 | static void e1000_smartspeed(struct e1000_adapter *adapter); |
e619d523 | 166 | static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, |
a48954c8 | 167 | struct sk_buff *skb); |
1da177e4 | 168 | |
5622e404 | 169 | static bool e1000_vlan_used(struct e1000_adapter *adapter); |
c8f44aff MM |
170 | static void e1000_vlan_mode(struct net_device *netdev, |
171 | netdev_features_t features); | |
52f5509f JP |
172 | static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter, |
173 | bool filter_on); | |
80d5c368 PM |
174 | static int e1000_vlan_rx_add_vid(struct net_device *netdev, |
175 | __be16 proto, u16 vid); | |
176 | static int e1000_vlan_rx_kill_vid(struct net_device *netdev, | |
177 | __be16 proto, u16 vid); | |
1da177e4 LT |
178 | static void e1000_restore_vlan(struct e1000_adapter *adapter); |
179 | ||
6fdfef16 | 180 | #ifdef CONFIG_PM |
b43fcd7d | 181 | static int e1000_suspend(struct pci_dev *pdev, pm_message_t state); |
1da177e4 LT |
182 | static int e1000_resume(struct pci_dev *pdev); |
183 | #endif | |
c653e635 | 184 | static void e1000_shutdown(struct pci_dev *pdev); |
1da177e4 LT |
185 | |
186 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
187 | /* for netdump / net console */ | |
188 | static void e1000_netpoll (struct net_device *netdev); | |
189 | #endif | |
190 | ||
1f753861 JB |
191 | #define COPYBREAK_DEFAULT 256 |
192 | static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT; | |
193 | module_param(copybreak, uint, 0644); | |
194 | MODULE_PARM_DESC(copybreak, | |
195 | "Maximum size of packet that is copied to a new buffer on receive"); | |
196 | ||
9026729b | 197 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, |
a48954c8 | 198 | pci_channel_state_t state); |
9026729b AK |
199 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev); |
200 | static void e1000_io_resume(struct pci_dev *pdev); | |
201 | ||
3646f0e5 | 202 | static const struct pci_error_handlers e1000_err_handler = { |
9026729b AK |
203 | .error_detected = e1000_io_error_detected, |
204 | .slot_reset = e1000_io_slot_reset, | |
205 | .resume = e1000_io_resume, | |
206 | }; | |
24025e4e | 207 | |
1da177e4 LT |
208 | static struct pci_driver e1000_driver = { |
209 | .name = e1000_driver_name, | |
210 | .id_table = e1000_pci_tbl, | |
211 | .probe = e1000_probe, | |
9f9a12f8 | 212 | .remove = e1000_remove, |
c4e24f01 | 213 | #ifdef CONFIG_PM |
25985edc | 214 | /* Power Management Hooks */ |
1da177e4 | 215 | .suspend = e1000_suspend, |
c653e635 | 216 | .resume = e1000_resume, |
1da177e4 | 217 | #endif |
9026729b AK |
218 | .shutdown = e1000_shutdown, |
219 | .err_handler = &e1000_err_handler | |
1da177e4 LT |
220 | }; |
221 | ||
222 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); | |
223 | MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); | |
224 | MODULE_LICENSE("GPL"); | |
225 | MODULE_VERSION(DRV_VERSION); | |
226 | ||
b3f4d599 | 227 | #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK) |
228 | static int debug = -1; | |
1da177e4 LT |
229 | module_param(debug, int, 0); |
230 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | |
231 | ||
675ad473 ET |
232 | /** |
233 | * e1000_get_hw_dev - return device | |
234 | * used by hardware layer to print debugging information | |
235 | * | |
236 | **/ | |
237 | struct net_device *e1000_get_hw_dev(struct e1000_hw *hw) | |
238 | { | |
239 | struct e1000_adapter *adapter = hw->back; | |
240 | return adapter->netdev; | |
241 | } | |
242 | ||
1da177e4 LT |
243 | /** |
244 | * e1000_init_module - Driver Registration Routine | |
245 | * | |
246 | * e1000_init_module is the first routine called when the driver is | |
247 | * loaded. All it does is register with the PCI subsystem. | |
248 | **/ | |
64798845 | 249 | static int __init e1000_init_module(void) |
1da177e4 LT |
250 | { |
251 | int ret; | |
675ad473 | 252 | pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version); |
1da177e4 | 253 | |
675ad473 | 254 | pr_info("%s\n", e1000_copyright); |
1da177e4 | 255 | |
29917620 | 256 | ret = pci_register_driver(&e1000_driver); |
1f753861 JB |
257 | if (copybreak != COPYBREAK_DEFAULT) { |
258 | if (copybreak == 0) | |
675ad473 | 259 | pr_info("copybreak disabled\n"); |
1f753861 | 260 | else |
675ad473 ET |
261 | pr_info("copybreak enabled for " |
262 | "packets <= %u bytes\n", copybreak); | |
1f753861 | 263 | } |
1da177e4 LT |
264 | return ret; |
265 | } | |
266 | ||
267 | module_init(e1000_init_module); | |
268 | ||
269 | /** | |
270 | * e1000_exit_module - Driver Exit Cleanup Routine | |
271 | * | |
272 | * e1000_exit_module is called just before the driver is removed | |
273 | * from memory. | |
274 | **/ | |
64798845 | 275 | static void __exit e1000_exit_module(void) |
1da177e4 | 276 | { |
1da177e4 LT |
277 | pci_unregister_driver(&e1000_driver); |
278 | } | |
279 | ||
280 | module_exit(e1000_exit_module); | |
281 | ||
2db10a08 AK |
282 | static int e1000_request_irq(struct e1000_adapter *adapter) |
283 | { | |
284 | struct net_device *netdev = adapter->netdev; | |
3e18826c | 285 | irq_handler_t handler = e1000_intr; |
e94bd23f AK |
286 | int irq_flags = IRQF_SHARED; |
287 | int err; | |
2db10a08 | 288 | |
e94bd23f | 289 | err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name, |
a48954c8 | 290 | netdev); |
e94bd23f | 291 | if (err) { |
feb8f478 | 292 | e_err(probe, "Unable to allocate interrupt Error: %d\n", err); |
e94bd23f | 293 | } |
2db10a08 AK |
294 | |
295 | return err; | |
296 | } | |
297 | ||
298 | static void e1000_free_irq(struct e1000_adapter *adapter) | |
299 | { | |
300 | struct net_device *netdev = adapter->netdev; | |
301 | ||
302 | free_irq(adapter->pdev->irq, netdev); | |
2db10a08 AK |
303 | } |
304 | ||
1da177e4 LT |
305 | /** |
306 | * e1000_irq_disable - Mask off interrupt generation on the NIC | |
307 | * @adapter: board private structure | |
308 | **/ | |
64798845 | 309 | static void e1000_irq_disable(struct e1000_adapter *adapter) |
1da177e4 | 310 | { |
1dc32918 JP |
311 | struct e1000_hw *hw = &adapter->hw; |
312 | ||
313 | ew32(IMC, ~0); | |
314 | E1000_WRITE_FLUSH(); | |
1da177e4 LT |
315 | synchronize_irq(adapter->pdev->irq); |
316 | } | |
317 | ||
318 | /** | |
319 | * e1000_irq_enable - Enable default interrupt generation settings | |
320 | * @adapter: board private structure | |
321 | **/ | |
64798845 | 322 | static void e1000_irq_enable(struct e1000_adapter *adapter) |
1da177e4 | 323 | { |
1dc32918 JP |
324 | struct e1000_hw *hw = &adapter->hw; |
325 | ||
326 | ew32(IMS, IMS_ENABLE_MASK); | |
327 | E1000_WRITE_FLUSH(); | |
1da177e4 | 328 | } |
3ad2cc67 | 329 | |
64798845 | 330 | static void e1000_update_mng_vlan(struct e1000_adapter *adapter) |
2d7edb92 | 331 | { |
1dc32918 | 332 | struct e1000_hw *hw = &adapter->hw; |
2d7edb92 | 333 | struct net_device *netdev = adapter->netdev; |
1dc32918 | 334 | u16 vid = hw->mng_cookie.vlan_id; |
406874a7 | 335 | u16 old_vid = adapter->mng_vlan_id; |
96838a40 | 336 | |
5622e404 JP |
337 | if (!e1000_vlan_used(adapter)) |
338 | return; | |
339 | ||
340 | if (!test_bit(vid, adapter->active_vlans)) { | |
341 | if (hw->mng_cookie.status & | |
342 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) { | |
80d5c368 | 343 | e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid); |
c5f226fe | 344 | adapter->mng_vlan_id = vid; |
5622e404 JP |
345 | } else { |
346 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
347 | } | |
348 | if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && | |
349 | (vid != old_vid) && | |
350 | !test_bit(old_vid, adapter->active_vlans)) | |
80d5c368 PM |
351 | e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), |
352 | old_vid); | |
5622e404 JP |
353 | } else { |
354 | adapter->mng_vlan_id = vid; | |
2d7edb92 MC |
355 | } |
356 | } | |
b55ccb35 | 357 | |
64798845 | 358 | static void e1000_init_manageability(struct e1000_adapter *adapter) |
0fccd0e9 | 359 | { |
1dc32918 JP |
360 | struct e1000_hw *hw = &adapter->hw; |
361 | ||
0fccd0e9 | 362 | if (adapter->en_mng_pt) { |
1dc32918 | 363 | u32 manc = er32(MANC); |
0fccd0e9 JG |
364 | |
365 | /* disable hardware interception of ARP */ | |
366 | manc &= ~(E1000_MANC_ARP_EN); | |
367 | ||
1dc32918 | 368 | ew32(MANC, manc); |
0fccd0e9 JG |
369 | } |
370 | } | |
371 | ||
64798845 | 372 | static void e1000_release_manageability(struct e1000_adapter *adapter) |
0fccd0e9 | 373 | { |
1dc32918 JP |
374 | struct e1000_hw *hw = &adapter->hw; |
375 | ||
0fccd0e9 | 376 | if (adapter->en_mng_pt) { |
1dc32918 | 377 | u32 manc = er32(MANC); |
0fccd0e9 JG |
378 | |
379 | /* re-enable hardware interception of ARP */ | |
380 | manc |= E1000_MANC_ARP_EN; | |
381 | ||
1dc32918 | 382 | ew32(MANC, manc); |
0fccd0e9 JG |
383 | } |
384 | } | |
385 | ||
e0aac5a2 AK |
386 | /** |
387 | * e1000_configure - configure the hardware for RX and TX | |
388 | * @adapter = private board structure | |
389 | **/ | |
390 | static void e1000_configure(struct e1000_adapter *adapter) | |
1da177e4 LT |
391 | { |
392 | struct net_device *netdev = adapter->netdev; | |
2db10a08 | 393 | int i; |
1da177e4 | 394 | |
db0ce50d | 395 | e1000_set_rx_mode(netdev); |
1da177e4 LT |
396 | |
397 | e1000_restore_vlan(adapter); | |
0fccd0e9 | 398 | e1000_init_manageability(adapter); |
1da177e4 LT |
399 | |
400 | e1000_configure_tx(adapter); | |
401 | e1000_setup_rctl(adapter); | |
402 | e1000_configure_rx(adapter); | |
72d64a43 JK |
403 | /* call E1000_DESC_UNUSED which always leaves |
404 | * at least 1 descriptor unused to make sure | |
6cfbd97b JK |
405 | * next_to_use != next_to_clean |
406 | */ | |
f56799ea | 407 | for (i = 0; i < adapter->num_rx_queues; i++) { |
72d64a43 | 408 | struct e1000_rx_ring *ring = &adapter->rx_ring[i]; |
a292ca6e | 409 | adapter->alloc_rx_buf(adapter, ring, |
6cfbd97b | 410 | E1000_DESC_UNUSED(ring)); |
f56799ea | 411 | } |
e0aac5a2 AK |
412 | } |
413 | ||
414 | int e1000_up(struct e1000_adapter *adapter) | |
415 | { | |
1dc32918 JP |
416 | struct e1000_hw *hw = &adapter->hw; |
417 | ||
e0aac5a2 AK |
418 | /* hardware has been reset, we need to reload some things */ |
419 | e1000_configure(adapter); | |
420 | ||
421 | clear_bit(__E1000_DOWN, &adapter->flags); | |
7bfa4816 | 422 | |
bea3348e | 423 | napi_enable(&adapter->napi); |
c3570acb | 424 | |
5de55624 MC |
425 | e1000_irq_enable(adapter); |
426 | ||
4cb9be7a JB |
427 | netif_wake_queue(adapter->netdev); |
428 | ||
79f3d399 | 429 | /* fire a link change interrupt to start the watchdog */ |
1dc32918 | 430 | ew32(ICS, E1000_ICS_LSC); |
1da177e4 LT |
431 | return 0; |
432 | } | |
433 | ||
79f05bf0 AK |
434 | /** |
435 | * e1000_power_up_phy - restore link in case the phy was powered down | |
436 | * @adapter: address of board private structure | |
437 | * | |
438 | * The phy may be powered down to save power and turn off link when the | |
439 | * driver is unloaded and wake on lan is not enabled (among others) | |
440 | * *** this routine MUST be followed by a call to e1000_reset *** | |
79f05bf0 | 441 | **/ |
d658266e | 442 | void e1000_power_up_phy(struct e1000_adapter *adapter) |
79f05bf0 | 443 | { |
1dc32918 | 444 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 445 | u16 mii_reg = 0; |
79f05bf0 AK |
446 | |
447 | /* Just clear the power down bit to wake the phy back up */ | |
1dc32918 | 448 | if (hw->media_type == e1000_media_type_copper) { |
79f05bf0 | 449 | /* according to the manual, the phy will retain its |
6cfbd97b JK |
450 | * settings across a power-down/up cycle |
451 | */ | |
1dc32918 | 452 | e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg); |
79f05bf0 | 453 | mii_reg &= ~MII_CR_POWER_DOWN; |
1dc32918 | 454 | e1000_write_phy_reg(hw, PHY_CTRL, mii_reg); |
79f05bf0 AK |
455 | } |
456 | } | |
457 | ||
458 | static void e1000_power_down_phy(struct e1000_adapter *adapter) | |
459 | { | |
1dc32918 JP |
460 | struct e1000_hw *hw = &adapter->hw; |
461 | ||
61c2505f | 462 | /* Power down the PHY so no link is implied when interface is down * |
c3033b01 | 463 | * The PHY cannot be powered down if any of the following is true * |
79f05bf0 AK |
464 | * (a) WoL is enabled |
465 | * (b) AMT is active | |
6cfbd97b JK |
466 | * (c) SoL/IDER session is active |
467 | */ | |
1dc32918 JP |
468 | if (!adapter->wol && hw->mac_type >= e1000_82540 && |
469 | hw->media_type == e1000_media_type_copper) { | |
406874a7 | 470 | u16 mii_reg = 0; |
61c2505f | 471 | |
1dc32918 | 472 | switch (hw->mac_type) { |
61c2505f BA |
473 | case e1000_82540: |
474 | case e1000_82545: | |
475 | case e1000_82545_rev_3: | |
476 | case e1000_82546: | |
5377a416 | 477 | case e1000_ce4100: |
61c2505f BA |
478 | case e1000_82546_rev_3: |
479 | case e1000_82541: | |
480 | case e1000_82541_rev_2: | |
481 | case e1000_82547: | |
482 | case e1000_82547_rev_2: | |
1dc32918 | 483 | if (er32(MANC) & E1000_MANC_SMBUS_EN) |
61c2505f BA |
484 | goto out; |
485 | break; | |
61c2505f BA |
486 | default: |
487 | goto out; | |
488 | } | |
1dc32918 | 489 | e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg); |
79f05bf0 | 490 | mii_reg |= MII_CR_POWER_DOWN; |
1dc32918 | 491 | e1000_write_phy_reg(hw, PHY_CTRL, mii_reg); |
4e0d8f7d | 492 | msleep(1); |
79f05bf0 | 493 | } |
61c2505f BA |
494 | out: |
495 | return; | |
79f05bf0 AK |
496 | } |
497 | ||
a4010afe JB |
498 | static void e1000_down_and_stop(struct e1000_adapter *adapter) |
499 | { | |
500 | set_bit(__E1000_DOWN, &adapter->flags); | |
8ce6909f | 501 | |
a4010afe | 502 | cancel_delayed_work_sync(&adapter->watchdog_task); |
74a1b1ea VD |
503 | |
504 | /* | |
505 | * Since the watchdog task can reschedule other tasks, we should cancel | |
506 | * it first, otherwise we can run into the situation when a work is | |
507 | * still running after the adapter has been turned down. | |
508 | */ | |
509 | ||
a4010afe JB |
510 | cancel_delayed_work_sync(&adapter->phy_info_task); |
511 | cancel_delayed_work_sync(&adapter->fifo_stall_task); | |
74a1b1ea VD |
512 | |
513 | /* Only kill reset task if adapter is not resetting */ | |
514 | if (!test_bit(__E1000_RESETTING, &adapter->flags)) | |
515 | cancel_work_sync(&adapter->reset_task); | |
a4010afe JB |
516 | } |
517 | ||
64798845 | 518 | void e1000_down(struct e1000_adapter *adapter) |
1da177e4 | 519 | { |
a6c42322 | 520 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 521 | struct net_device *netdev = adapter->netdev; |
a6c42322 | 522 | u32 rctl, tctl; |
1da177e4 | 523 | |
f9c029db | 524 | netif_carrier_off(netdev); |
1314bbf3 | 525 | |
a6c42322 JB |
526 | /* disable receives in the hardware */ |
527 | rctl = er32(RCTL); | |
528 | ew32(RCTL, rctl & ~E1000_RCTL_EN); | |
529 | /* flush and sleep below */ | |
530 | ||
51851073 | 531 | netif_tx_disable(netdev); |
a6c42322 JB |
532 | |
533 | /* disable transmits in the hardware */ | |
534 | tctl = er32(TCTL); | |
535 | tctl &= ~E1000_TCTL_EN; | |
536 | ew32(TCTL, tctl); | |
537 | /* flush both disables and wait for them to finish */ | |
538 | E1000_WRITE_FLUSH(); | |
539 | msleep(10); | |
540 | ||
bea3348e | 541 | napi_disable(&adapter->napi); |
c3570acb | 542 | |
1da177e4 | 543 | e1000_irq_disable(adapter); |
c1605eb3 | 544 | |
6cfbd97b | 545 | /* Setting DOWN must be after irq_disable to prevent |
ab08853f | 546 | * a screaming interrupt. Setting DOWN also prevents |
a4010afe | 547 | * tasks from rescheduling. |
ab08853f | 548 | */ |
a4010afe | 549 | e1000_down_and_stop(adapter); |
1da177e4 | 550 | |
1da177e4 LT |
551 | adapter->link_speed = 0; |
552 | adapter->link_duplex = 0; | |
1da177e4 LT |
553 | |
554 | e1000_reset(adapter); | |
581d708e MC |
555 | e1000_clean_all_tx_rings(adapter); |
556 | e1000_clean_all_rx_rings(adapter); | |
1da177e4 | 557 | } |
1da177e4 | 558 | |
64798845 | 559 | void e1000_reinit_locked(struct e1000_adapter *adapter) |
2db10a08 AK |
560 | { |
561 | WARN_ON(in_interrupt()); | |
562 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) | |
563 | msleep(1); | |
564 | e1000_down(adapter); | |
565 | e1000_up(adapter); | |
566 | clear_bit(__E1000_RESETTING, &adapter->flags); | |
1da177e4 LT |
567 | } |
568 | ||
64798845 | 569 | void e1000_reset(struct e1000_adapter *adapter) |
1da177e4 | 570 | { |
1dc32918 | 571 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 572 | u32 pba = 0, tx_space, min_tx_space, min_rx_space; |
c3033b01 | 573 | bool legacy_pba_adjust = false; |
b7cb8c2c | 574 | u16 hwm; |
1da177e4 LT |
575 | |
576 | /* Repartition Pba for greater than 9k mtu | |
577 | * To take effect CTRL.RST is required. | |
578 | */ | |
579 | ||
1dc32918 | 580 | switch (hw->mac_type) { |
018ea44e BA |
581 | case e1000_82542_rev2_0: |
582 | case e1000_82542_rev2_1: | |
583 | case e1000_82543: | |
584 | case e1000_82544: | |
585 | case e1000_82540: | |
586 | case e1000_82541: | |
587 | case e1000_82541_rev_2: | |
c3033b01 | 588 | legacy_pba_adjust = true; |
018ea44e BA |
589 | pba = E1000_PBA_48K; |
590 | break; | |
591 | case e1000_82545: | |
592 | case e1000_82545_rev_3: | |
593 | case e1000_82546: | |
5377a416 | 594 | case e1000_ce4100: |
018ea44e BA |
595 | case e1000_82546_rev_3: |
596 | pba = E1000_PBA_48K; | |
597 | break; | |
2d7edb92 | 598 | case e1000_82547: |
0e6ef3e0 | 599 | case e1000_82547_rev_2: |
c3033b01 | 600 | legacy_pba_adjust = true; |
2d7edb92 MC |
601 | pba = E1000_PBA_30K; |
602 | break; | |
018ea44e BA |
603 | case e1000_undefined: |
604 | case e1000_num_macs: | |
2d7edb92 MC |
605 | break; |
606 | } | |
607 | ||
c3033b01 | 608 | if (legacy_pba_adjust) { |
b7cb8c2c | 609 | if (hw->max_frame_size > E1000_RXBUFFER_8192) |
018ea44e | 610 | pba -= 8; /* allocate more FIFO for Tx */ |
2d7edb92 | 611 | |
1dc32918 | 612 | if (hw->mac_type == e1000_82547) { |
018ea44e BA |
613 | adapter->tx_fifo_head = 0; |
614 | adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT; | |
615 | adapter->tx_fifo_size = | |
616 | (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT; | |
617 | atomic_set(&adapter->tx_fifo_stall, 0); | |
618 | } | |
b7cb8c2c | 619 | } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { |
018ea44e | 620 | /* adjust PBA for jumbo frames */ |
1dc32918 | 621 | ew32(PBA, pba); |
018ea44e BA |
622 | |
623 | /* To maintain wire speed transmits, the Tx FIFO should be | |
b7cb8c2c | 624 | * large enough to accommodate two full transmit packets, |
018ea44e | 625 | * rounded up to the next 1KB and expressed in KB. Likewise, |
b7cb8c2c | 626 | * the Rx FIFO should be large enough to accommodate at least |
018ea44e | 627 | * one full receive packet and is similarly rounded up and |
6cfbd97b JK |
628 | * expressed in KB. |
629 | */ | |
1dc32918 | 630 | pba = er32(PBA); |
018ea44e BA |
631 | /* upper 16 bits has Tx packet buffer allocation size in KB */ |
632 | tx_space = pba >> 16; | |
633 | /* lower 16 bits has Rx packet buffer allocation size in KB */ | |
634 | pba &= 0xffff; | |
6cfbd97b | 635 | /* the Tx fifo also stores 16 bytes of information about the Tx |
b7cb8c2c JB |
636 | * but don't include ethernet FCS because hardware appends it |
637 | */ | |
638 | min_tx_space = (hw->max_frame_size + | |
a48954c8 JW |
639 | sizeof(struct e1000_tx_desc) - |
640 | ETH_FCS_LEN) * 2; | |
9099cfb9 | 641 | min_tx_space = ALIGN(min_tx_space, 1024); |
018ea44e | 642 | min_tx_space >>= 10; |
b7cb8c2c JB |
643 | /* software strips receive CRC, so leave room for it */ |
644 | min_rx_space = hw->max_frame_size; | |
9099cfb9 | 645 | min_rx_space = ALIGN(min_rx_space, 1024); |
018ea44e BA |
646 | min_rx_space >>= 10; |
647 | ||
648 | /* If current Tx allocation is less than the min Tx FIFO size, | |
649 | * and the min Tx FIFO size is less than the current Rx FIFO | |
6cfbd97b JK |
650 | * allocation, take space away from current Rx allocation |
651 | */ | |
018ea44e BA |
652 | if (tx_space < min_tx_space && |
653 | ((min_tx_space - tx_space) < pba)) { | |
654 | pba = pba - (min_tx_space - tx_space); | |
655 | ||
656 | /* PCI/PCIx hardware has PBA alignment constraints */ | |
1dc32918 | 657 | switch (hw->mac_type) { |
018ea44e BA |
658 | case e1000_82545 ... e1000_82546_rev_3: |
659 | pba &= ~(E1000_PBA_8K - 1); | |
660 | break; | |
661 | default: | |
662 | break; | |
663 | } | |
664 | ||
6cfbd97b JK |
665 | /* if short on Rx space, Rx wins and must trump Tx |
666 | * adjustment or use Early Receive if available | |
667 | */ | |
1532ecea JB |
668 | if (pba < min_rx_space) |
669 | pba = min_rx_space; | |
018ea44e | 670 | } |
1da177e4 | 671 | } |
2d7edb92 | 672 | |
1dc32918 | 673 | ew32(PBA, pba); |
1da177e4 | 674 | |
6cfbd97b | 675 | /* flow control settings: |
b7cb8c2c JB |
676 | * The high water mark must be low enough to fit one full frame |
677 | * (or the size used for early receive) above it in the Rx FIFO. | |
678 | * Set it to the lower of: | |
679 | * - 90% of the Rx FIFO size, and | |
680 | * - the full Rx FIFO size minus the early receive size (for parts | |
681 | * with ERT support assuming ERT set to E1000_ERT_2048), or | |
682 | * - the full Rx FIFO size minus one full frame | |
683 | */ | |
684 | hwm = min(((pba << 10) * 9 / 10), | |
685 | ((pba << 10) - hw->max_frame_size)); | |
686 | ||
687 | hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */ | |
688 | hw->fc_low_water = hw->fc_high_water - 8; | |
edbbb3ca | 689 | hw->fc_pause_time = E1000_FC_PAUSE_TIME; |
1dc32918 JP |
690 | hw->fc_send_xon = 1; |
691 | hw->fc = hw->original_fc; | |
1da177e4 | 692 | |
2d7edb92 | 693 | /* Allow time for pending master requests to run */ |
1dc32918 JP |
694 | e1000_reset_hw(hw); |
695 | if (hw->mac_type >= e1000_82544) | |
696 | ew32(WUC, 0); | |
09ae3e88 | 697 | |
1dc32918 | 698 | if (e1000_init_hw(hw)) |
feb8f478 | 699 | e_dev_err("Hardware Error\n"); |
2d7edb92 | 700 | e1000_update_mng_vlan(adapter); |
3d5460a0 JB |
701 | |
702 | /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */ | |
1dc32918 | 703 | if (hw->mac_type >= e1000_82544 && |
1dc32918 JP |
704 | hw->autoneg == 1 && |
705 | hw->autoneg_advertised == ADVERTISE_1000_FULL) { | |
706 | u32 ctrl = er32(CTRL); | |
3d5460a0 JB |
707 | /* clear phy power management bit if we are in gig only mode, |
708 | * which if enabled will attempt negotiation to 100Mb, which | |
6cfbd97b JK |
709 | * can cause a loss of link at power off or driver unload |
710 | */ | |
3d5460a0 | 711 | ctrl &= ~E1000_CTRL_SWDPIN3; |
1dc32918 | 712 | ew32(CTRL, ctrl); |
3d5460a0 JB |
713 | } |
714 | ||
1da177e4 | 715 | /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ |
1dc32918 | 716 | ew32(VET, ETHERNET_IEEE_VLAN_TYPE); |
1da177e4 | 717 | |
1dc32918 JP |
718 | e1000_reset_adaptive(hw); |
719 | e1000_phy_get_info(hw, &adapter->phy_info); | |
9a53a202 | 720 | |
0fccd0e9 | 721 | e1000_release_manageability(adapter); |
1da177e4 LT |
722 | } |
723 | ||
1aa8b471 | 724 | /* Dump the eeprom for users having checksum issues */ |
b4ea895d | 725 | static void e1000_dump_eeprom(struct e1000_adapter *adapter) |
67b3c27c AK |
726 | { |
727 | struct net_device *netdev = adapter->netdev; | |
728 | struct ethtool_eeprom eeprom; | |
729 | const struct ethtool_ops *ops = netdev->ethtool_ops; | |
730 | u8 *data; | |
731 | int i; | |
732 | u16 csum_old, csum_new = 0; | |
733 | ||
734 | eeprom.len = ops->get_eeprom_len(netdev); | |
735 | eeprom.offset = 0; | |
736 | ||
737 | data = kmalloc(eeprom.len, GFP_KERNEL); | |
e404decb | 738 | if (!data) |
67b3c27c | 739 | return; |
67b3c27c AK |
740 | |
741 | ops->get_eeprom(netdev, &eeprom, data); | |
742 | ||
743 | csum_old = (data[EEPROM_CHECKSUM_REG * 2]) + | |
744 | (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8); | |
745 | for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2) | |
746 | csum_new += data[i] + (data[i + 1] << 8); | |
747 | csum_new = EEPROM_SUM - csum_new; | |
748 | ||
675ad473 ET |
749 | pr_err("/*********************/\n"); |
750 | pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old); | |
751 | pr_err("Calculated : 0x%04x\n", csum_new); | |
67b3c27c | 752 | |
675ad473 ET |
753 | pr_err("Offset Values\n"); |
754 | pr_err("======== ======\n"); | |
67b3c27c AK |
755 | print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0); |
756 | ||
675ad473 ET |
757 | pr_err("Include this output when contacting your support provider.\n"); |
758 | pr_err("This is not a software error! Something bad happened to\n"); | |
759 | pr_err("your hardware or EEPROM image. Ignoring this problem could\n"); | |
760 | pr_err("result in further problems, possibly loss of data,\n"); | |
761 | pr_err("corruption or system hangs!\n"); | |
762 | pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n"); | |
763 | pr_err("which is invalid and requires you to set the proper MAC\n"); | |
764 | pr_err("address manually before continuing to enable this network\n"); | |
765 | pr_err("device. Please inspect the EEPROM dump and report the\n"); | |
766 | pr_err("issue to your hardware vendor or Intel Customer Support.\n"); | |
767 | pr_err("/*********************/\n"); | |
67b3c27c AK |
768 | |
769 | kfree(data); | |
770 | } | |
771 | ||
81250297 TI |
772 | /** |
773 | * e1000_is_need_ioport - determine if an adapter needs ioport resources or not | |
774 | * @pdev: PCI device information struct | |
775 | * | |
776 | * Return true if an adapter needs ioport resources | |
777 | **/ | |
778 | static int e1000_is_need_ioport(struct pci_dev *pdev) | |
779 | { | |
780 | switch (pdev->device) { | |
781 | case E1000_DEV_ID_82540EM: | |
782 | case E1000_DEV_ID_82540EM_LOM: | |
783 | case E1000_DEV_ID_82540EP: | |
784 | case E1000_DEV_ID_82540EP_LOM: | |
785 | case E1000_DEV_ID_82540EP_LP: | |
786 | case E1000_DEV_ID_82541EI: | |
787 | case E1000_DEV_ID_82541EI_MOBILE: | |
788 | case E1000_DEV_ID_82541ER: | |
789 | case E1000_DEV_ID_82541ER_LOM: | |
790 | case E1000_DEV_ID_82541GI: | |
791 | case E1000_DEV_ID_82541GI_LF: | |
792 | case E1000_DEV_ID_82541GI_MOBILE: | |
793 | case E1000_DEV_ID_82544EI_COPPER: | |
794 | case E1000_DEV_ID_82544EI_FIBER: | |
795 | case E1000_DEV_ID_82544GC_COPPER: | |
796 | case E1000_DEV_ID_82544GC_LOM: | |
797 | case E1000_DEV_ID_82545EM_COPPER: | |
798 | case E1000_DEV_ID_82545EM_FIBER: | |
799 | case E1000_DEV_ID_82546EB_COPPER: | |
800 | case E1000_DEV_ID_82546EB_FIBER: | |
801 | case E1000_DEV_ID_82546EB_QUAD_COPPER: | |
802 | return true; | |
803 | default: | |
804 | return false; | |
805 | } | |
806 | } | |
807 | ||
c8f44aff MM |
808 | static netdev_features_t e1000_fix_features(struct net_device *netdev, |
809 | netdev_features_t features) | |
5622e404 | 810 | { |
6cfbd97b JK |
811 | /* Since there is no support for separate Rx/Tx vlan accel |
812 | * enable/disable make sure Tx flag is always in same state as Rx. | |
5622e404 | 813 | */ |
f646968f PM |
814 | if (features & NETIF_F_HW_VLAN_CTAG_RX) |
815 | features |= NETIF_F_HW_VLAN_CTAG_TX; | |
5622e404 | 816 | else |
f646968f | 817 | features &= ~NETIF_F_HW_VLAN_CTAG_TX; |
5622e404 JP |
818 | |
819 | return features; | |
820 | } | |
821 | ||
c8f44aff MM |
822 | static int e1000_set_features(struct net_device *netdev, |
823 | netdev_features_t features) | |
e97d3207 MM |
824 | { |
825 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
c8f44aff | 826 | netdev_features_t changed = features ^ netdev->features; |
e97d3207 | 827 | |
f646968f | 828 | if (changed & NETIF_F_HW_VLAN_CTAG_RX) |
5622e404 JP |
829 | e1000_vlan_mode(netdev, features); |
830 | ||
e825b731 | 831 | if (!(changed & (NETIF_F_RXCSUM | NETIF_F_RXALL))) |
e97d3207 MM |
832 | return 0; |
833 | ||
e825b731 | 834 | netdev->features = features; |
e97d3207 MM |
835 | adapter->rx_csum = !!(features & NETIF_F_RXCSUM); |
836 | ||
837 | if (netif_running(netdev)) | |
838 | e1000_reinit_locked(adapter); | |
839 | else | |
840 | e1000_reset(adapter); | |
841 | ||
842 | return 0; | |
843 | } | |
844 | ||
0e7614bc SH |
845 | static const struct net_device_ops e1000_netdev_ops = { |
846 | .ndo_open = e1000_open, | |
847 | .ndo_stop = e1000_close, | |
00829823 | 848 | .ndo_start_xmit = e1000_xmit_frame, |
0e7614bc SH |
849 | .ndo_get_stats = e1000_get_stats, |
850 | .ndo_set_rx_mode = e1000_set_rx_mode, | |
851 | .ndo_set_mac_address = e1000_set_mac, | |
5622e404 | 852 | .ndo_tx_timeout = e1000_tx_timeout, |
0e7614bc SH |
853 | .ndo_change_mtu = e1000_change_mtu, |
854 | .ndo_do_ioctl = e1000_ioctl, | |
855 | .ndo_validate_addr = eth_validate_addr, | |
0e7614bc SH |
856 | .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid, |
857 | .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid, | |
858 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
859 | .ndo_poll_controller = e1000_netpoll, | |
860 | #endif | |
5622e404 JP |
861 | .ndo_fix_features = e1000_fix_features, |
862 | .ndo_set_features = e1000_set_features, | |
0e7614bc SH |
863 | }; |
864 | ||
e508be17 JB |
865 | /** |
866 | * e1000_init_hw_struct - initialize members of hw struct | |
867 | * @adapter: board private struct | |
868 | * @hw: structure used by e1000_hw.c | |
869 | * | |
870 | * Factors out initialization of the e1000_hw struct to its own function | |
871 | * that can be called very early at init (just after struct allocation). | |
872 | * Fields are initialized based on PCI device information and | |
873 | * OS network device settings (MTU size). | |
874 | * Returns negative error codes if MAC type setup fails. | |
875 | */ | |
876 | static int e1000_init_hw_struct(struct e1000_adapter *adapter, | |
877 | struct e1000_hw *hw) | |
878 | { | |
879 | struct pci_dev *pdev = adapter->pdev; | |
880 | ||
881 | /* PCI config space info */ | |
882 | hw->vendor_id = pdev->vendor; | |
883 | hw->device_id = pdev->device; | |
884 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
885 | hw->subsystem_id = pdev->subsystem_device; | |
886 | hw->revision_id = pdev->revision; | |
887 | ||
888 | pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); | |
889 | ||
890 | hw->max_frame_size = adapter->netdev->mtu + | |
891 | ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; | |
892 | hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE; | |
893 | ||
894 | /* identify the MAC */ | |
895 | if (e1000_set_mac_type(hw)) { | |
896 | e_err(probe, "Unknown MAC Type\n"); | |
897 | return -EIO; | |
898 | } | |
899 | ||
900 | switch (hw->mac_type) { | |
901 | default: | |
902 | break; | |
903 | case e1000_82541: | |
904 | case e1000_82547: | |
905 | case e1000_82541_rev_2: | |
906 | case e1000_82547_rev_2: | |
907 | hw->phy_init_script = 1; | |
908 | break; | |
909 | } | |
910 | ||
911 | e1000_set_media_type(hw); | |
912 | e1000_get_bus_info(hw); | |
913 | ||
914 | hw->wait_autoneg_complete = false; | |
915 | hw->tbi_compatibility_en = true; | |
916 | hw->adaptive_ifs = true; | |
917 | ||
918 | /* Copper options */ | |
919 | ||
920 | if (hw->media_type == e1000_media_type_copper) { | |
921 | hw->mdix = AUTO_ALL_MODES; | |
922 | hw->disable_polarity_correction = false; | |
923 | hw->master_slave = E1000_MASTER_SLAVE; | |
924 | } | |
925 | ||
926 | return 0; | |
927 | } | |
928 | ||
1da177e4 LT |
929 | /** |
930 | * e1000_probe - Device Initialization Routine | |
931 | * @pdev: PCI device information struct | |
932 | * @ent: entry in e1000_pci_tbl | |
933 | * | |
934 | * Returns 0 on success, negative on failure | |
935 | * | |
936 | * e1000_probe initializes an adapter identified by a pci_dev structure. | |
937 | * The OS initialization, configuring of the adapter private structure, | |
938 | * and a hardware reset occur. | |
939 | **/ | |
1dd06ae8 | 940 | static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
1da177e4 LT |
941 | { |
942 | struct net_device *netdev; | |
943 | struct e1000_adapter *adapter; | |
1dc32918 | 944 | struct e1000_hw *hw; |
2d7edb92 | 945 | |
a48954c8 JW |
946 | static int cards_found; |
947 | static int global_quad_port_a; /* global ksp3 port a indication */ | |
2d7edb92 | 948 | int i, err, pci_using_dac; |
406874a7 | 949 | u16 eeprom_data = 0; |
5377a416 | 950 | u16 tmp = 0; |
406874a7 | 951 | u16 eeprom_apme_mask = E1000_EEPROM_APME; |
81250297 | 952 | int bars, need_ioport; |
0795af57 | 953 | |
81250297 TI |
954 | /* do not allocate ioport bars when not needed */ |
955 | need_ioport = e1000_is_need_ioport(pdev); | |
956 | if (need_ioport) { | |
957 | bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO); | |
958 | err = pci_enable_device(pdev); | |
959 | } else { | |
960 | bars = pci_select_bars(pdev, IORESOURCE_MEM); | |
4d7155b9 | 961 | err = pci_enable_device_mem(pdev); |
81250297 | 962 | } |
c7be73bc | 963 | if (err) |
1da177e4 LT |
964 | return err; |
965 | ||
81250297 | 966 | err = pci_request_selected_regions(pdev, bars, e1000_driver_name); |
c7be73bc | 967 | if (err) |
6dd62ab0 | 968 | goto err_pci_reg; |
1da177e4 LT |
969 | |
970 | pci_set_master(pdev); | |
dbb5aaeb NN |
971 | err = pci_save_state(pdev); |
972 | if (err) | |
973 | goto err_alloc_etherdev; | |
1da177e4 | 974 | |
6dd62ab0 | 975 | err = -ENOMEM; |
1da177e4 | 976 | netdev = alloc_etherdev(sizeof(struct e1000_adapter)); |
6dd62ab0 | 977 | if (!netdev) |
1da177e4 | 978 | goto err_alloc_etherdev; |
1da177e4 | 979 | |
1da177e4 LT |
980 | SET_NETDEV_DEV(netdev, &pdev->dev); |
981 | ||
982 | pci_set_drvdata(pdev, netdev); | |
60490fe0 | 983 | adapter = netdev_priv(netdev); |
1da177e4 LT |
984 | adapter->netdev = netdev; |
985 | adapter->pdev = pdev; | |
b3f4d599 | 986 | adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); |
81250297 TI |
987 | adapter->bars = bars; |
988 | adapter->need_ioport = need_ioport; | |
1da177e4 | 989 | |
1dc32918 JP |
990 | hw = &adapter->hw; |
991 | hw->back = adapter; | |
992 | ||
6dd62ab0 | 993 | err = -EIO; |
275f165f | 994 | hw->hw_addr = pci_ioremap_bar(pdev, BAR_0); |
1dc32918 | 995 | if (!hw->hw_addr) |
1da177e4 | 996 | goto err_ioremap; |
1da177e4 | 997 | |
81250297 TI |
998 | if (adapter->need_ioport) { |
999 | for (i = BAR_1; i <= BAR_5; i++) { | |
1000 | if (pci_resource_len(pdev, i) == 0) | |
1001 | continue; | |
1002 | if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { | |
1003 | hw->io_base = pci_resource_start(pdev, i); | |
1004 | break; | |
1005 | } | |
1da177e4 LT |
1006 | } |
1007 | } | |
1008 | ||
e508be17 JB |
1009 | /* make ready for any if (hw->...) below */ |
1010 | err = e1000_init_hw_struct(adapter, hw); | |
1011 | if (err) | |
1012 | goto err_sw_init; | |
1013 | ||
6cfbd97b | 1014 | /* there is a workaround being applied below that limits |
e508be17 JB |
1015 | * 64-bit DMA addresses to 64-bit hardware. There are some |
1016 | * 32-bit adapters that Tx hang when given 64-bit DMA addresses | |
1017 | */ | |
1018 | pci_using_dac = 0; | |
1019 | if ((hw->bus_type == e1000_bus_type_pcix) && | |
9931a26e | 1020 | !dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) { |
e508be17 | 1021 | pci_using_dac = 1; |
e508be17 | 1022 | } else { |
9931a26e | 1023 | err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); |
19a0b67a DN |
1024 | if (err) { |
1025 | pr_err("No usable DMA config, aborting\n"); | |
1026 | goto err_dma; | |
1027 | } | |
e508be17 JB |
1028 | } |
1029 | ||
0e7614bc | 1030 | netdev->netdev_ops = &e1000_netdev_ops; |
1da177e4 | 1031 | e1000_set_ethtool_ops(netdev); |
1da177e4 | 1032 | netdev->watchdog_timeo = 5 * HZ; |
bea3348e | 1033 | netif_napi_add(netdev, &adapter->napi, e1000_clean, 64); |
0e7614bc | 1034 | |
0eb5a34c | 1035 | strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); |
1da177e4 | 1036 | |
1da177e4 LT |
1037 | adapter->bd_number = cards_found; |
1038 | ||
1039 | /* setup the private structure */ | |
1040 | ||
c7be73bc JP |
1041 | err = e1000_sw_init(adapter); |
1042 | if (err) | |
1da177e4 LT |
1043 | goto err_sw_init; |
1044 | ||
6dd62ab0 | 1045 | err = -EIO; |
5377a416 | 1046 | if (hw->mac_type == e1000_ce4100) { |
13acde8f FF |
1047 | hw->ce4100_gbe_mdio_base_virt = |
1048 | ioremap(pci_resource_start(pdev, BAR_1), | |
a48954c8 | 1049 | pci_resource_len(pdev, BAR_1)); |
5377a416 | 1050 | |
13acde8f | 1051 | if (!hw->ce4100_gbe_mdio_base_virt) |
5377a416 DB |
1052 | goto err_mdio_ioremap; |
1053 | } | |
2d7edb92 | 1054 | |
1dc32918 | 1055 | if (hw->mac_type >= e1000_82543) { |
e97d3207 | 1056 | netdev->hw_features = NETIF_F_SG | |
5622e404 | 1057 | NETIF_F_HW_CSUM | |
f646968f PM |
1058 | NETIF_F_HW_VLAN_CTAG_RX; |
1059 | netdev->features = NETIF_F_HW_VLAN_CTAG_TX | | |
1060 | NETIF_F_HW_VLAN_CTAG_FILTER; | |
1da177e4 LT |
1061 | } |
1062 | ||
1dc32918 JP |
1063 | if ((hw->mac_type >= e1000_82544) && |
1064 | (hw->mac_type != e1000_82547)) | |
e97d3207 MM |
1065 | netdev->hw_features |= NETIF_F_TSO; |
1066 | ||
11a78dcf BG |
1067 | netdev->priv_flags |= IFF_SUPP_NOFCS; |
1068 | ||
e97d3207 | 1069 | netdev->features |= netdev->hw_features; |
7500673b TD |
1070 | netdev->hw_features |= (NETIF_F_RXCSUM | |
1071 | NETIF_F_RXALL | | |
1072 | NETIF_F_RXFCS); | |
2d7edb92 | 1073 | |
7b872a55 | 1074 | if (pci_using_dac) { |
1da177e4 | 1075 | netdev->features |= NETIF_F_HIGHDMA; |
7b872a55 YZ |
1076 | netdev->vlan_features |= NETIF_F_HIGHDMA; |
1077 | } | |
1da177e4 | 1078 | |
7500673b TD |
1079 | netdev->vlan_features |= (NETIF_F_TSO | |
1080 | NETIF_F_HW_CSUM | | |
1081 | NETIF_F_SG); | |
20501a69 | 1082 | |
a22bb0b9 FR |
1083 | /* Do not set IFF_UNICAST_FLT for VMWare's 82545EM */ |
1084 | if (hw->device_id != E1000_DEV_ID_82545EM_COPPER || | |
1085 | hw->subsystem_vendor_id != PCI_VENDOR_ID_VMWARE) | |
1086 | netdev->priv_flags |= IFF_UNICAST_FLT; | |
01789349 | 1087 | |
1dc32918 | 1088 | adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw); |
2d7edb92 | 1089 | |
cd94dd0b | 1090 | /* initialize eeprom parameters */ |
1dc32918 | 1091 | if (e1000_init_eeprom_params(hw)) { |
feb8f478 | 1092 | e_err(probe, "EEPROM initialization failed\n"); |
6dd62ab0 | 1093 | goto err_eeprom; |
cd94dd0b AK |
1094 | } |
1095 | ||
96838a40 | 1096 | /* before reading the EEPROM, reset the controller to |
6cfbd97b JK |
1097 | * put the device in a known good starting state |
1098 | */ | |
96838a40 | 1099 | |
1dc32918 | 1100 | e1000_reset_hw(hw); |
1da177e4 LT |
1101 | |
1102 | /* make sure the EEPROM is good */ | |
1dc32918 | 1103 | if (e1000_validate_eeprom_checksum(hw) < 0) { |
feb8f478 | 1104 | e_err(probe, "The EEPROM Checksum Is Not Valid\n"); |
67b3c27c | 1105 | e1000_dump_eeprom(adapter); |
6cfbd97b | 1106 | /* set MAC address to all zeroes to invalidate and temporary |
67b3c27c AK |
1107 | * disable this device for the user. This blocks regular |
1108 | * traffic while still permitting ethtool ioctls from reaching | |
1109 | * the hardware as well as allowing the user to run the | |
1110 | * interface after manually setting a hw addr using | |
1111 | * `ip set address` | |
1112 | */ | |
1dc32918 | 1113 | memset(hw->mac_addr, 0, netdev->addr_len); |
67b3c27c AK |
1114 | } else { |
1115 | /* copy the MAC address out of the EEPROM */ | |
1dc32918 | 1116 | if (e1000_read_mac_addr(hw)) |
feb8f478 | 1117 | e_err(probe, "EEPROM Read Error\n"); |
1da177e4 | 1118 | } |
dbedd44e | 1119 | /* don't block initialization here due to bad MAC address */ |
1dc32918 | 1120 | memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len); |
1da177e4 | 1121 | |
aaeb6cdf | 1122 | if (!is_valid_ether_addr(netdev->dev_addr)) |
feb8f478 | 1123 | e_err(probe, "Invalid MAC Address\n"); |
1da177e4 | 1124 | |
1da177e4 | 1125 | |
a4010afe JB |
1126 | INIT_DELAYED_WORK(&adapter->watchdog_task, e1000_watchdog); |
1127 | INIT_DELAYED_WORK(&adapter->fifo_stall_task, | |
1128 | e1000_82547_tx_fifo_stall_task); | |
1129 | INIT_DELAYED_WORK(&adapter->phy_info_task, e1000_update_phy_info_task); | |
65f27f38 | 1130 | INIT_WORK(&adapter->reset_task, e1000_reset_task); |
1da177e4 | 1131 | |
1da177e4 LT |
1132 | e1000_check_options(adapter); |
1133 | ||
1134 | /* Initial Wake on LAN setting | |
1135 | * If APM wake is enabled in the EEPROM, | |
1136 | * enable the ACPI Magic Packet filter | |
1137 | */ | |
1138 | ||
1dc32918 | 1139 | switch (hw->mac_type) { |
1da177e4 LT |
1140 | case e1000_82542_rev2_0: |
1141 | case e1000_82542_rev2_1: | |
1142 | case e1000_82543: | |
1143 | break; | |
1144 | case e1000_82544: | |
1dc32918 | 1145 | e1000_read_eeprom(hw, |
1da177e4 LT |
1146 | EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data); |
1147 | eeprom_apme_mask = E1000_EEPROM_82544_APM; | |
1148 | break; | |
1149 | case e1000_82546: | |
1150 | case e1000_82546_rev_3: | |
a48954c8 | 1151 | if (er32(STATUS) & E1000_STATUS_FUNC_1) { |
1dc32918 | 1152 | e1000_read_eeprom(hw, |
1da177e4 LT |
1153 | EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); |
1154 | break; | |
1155 | } | |
1156 | /* Fall Through */ | |
1157 | default: | |
1dc32918 | 1158 | e1000_read_eeprom(hw, |
1da177e4 LT |
1159 | EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); |
1160 | break; | |
1161 | } | |
96838a40 | 1162 | if (eeprom_data & eeprom_apme_mask) |
120cd576 JB |
1163 | adapter->eeprom_wol |= E1000_WUFC_MAG; |
1164 | ||
1165 | /* now that we have the eeprom settings, apply the special cases | |
1166 | * where the eeprom may be wrong or the board simply won't support | |
6cfbd97b JK |
1167 | * wake on lan on a particular port |
1168 | */ | |
120cd576 JB |
1169 | switch (pdev->device) { |
1170 | case E1000_DEV_ID_82546GB_PCIE: | |
1171 | adapter->eeprom_wol = 0; | |
1172 | break; | |
1173 | case E1000_DEV_ID_82546EB_FIBER: | |
1174 | case E1000_DEV_ID_82546GB_FIBER: | |
120cd576 | 1175 | /* Wake events only supported on port A for dual fiber |
6cfbd97b JK |
1176 | * regardless of eeprom setting |
1177 | */ | |
1dc32918 | 1178 | if (er32(STATUS) & E1000_STATUS_FUNC_1) |
120cd576 JB |
1179 | adapter->eeprom_wol = 0; |
1180 | break; | |
1181 | case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: | |
1182 | /* if quad port adapter, disable WoL on all but port A */ | |
1183 | if (global_quad_port_a != 0) | |
1184 | adapter->eeprom_wol = 0; | |
1185 | else | |
3db1cd5c | 1186 | adapter->quad_port_a = true; |
120cd576 JB |
1187 | /* Reset for multiple quad port adapters */ |
1188 | if (++global_quad_port_a == 4) | |
1189 | global_quad_port_a = 0; | |
1190 | break; | |
1191 | } | |
1192 | ||
1193 | /* initialize the wol settings based on the eeprom settings */ | |
1194 | adapter->wol = adapter->eeprom_wol; | |
de126489 | 1195 | device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); |
1da177e4 | 1196 | |
5377a416 DB |
1197 | /* Auto detect PHY address */ |
1198 | if (hw->mac_type == e1000_ce4100) { | |
1199 | for (i = 0; i < 32; i++) { | |
1200 | hw->phy_addr = i; | |
1201 | e1000_read_phy_reg(hw, PHY_ID2, &tmp); | |
4e01f3a8 JS |
1202 | |
1203 | if (tmp != 0 && tmp != 0xFF) | |
5377a416 DB |
1204 | break; |
1205 | } | |
4e01f3a8 JS |
1206 | |
1207 | if (i >= 32) | |
1208 | goto err_eeprom; | |
5377a416 DB |
1209 | } |
1210 | ||
675ad473 ET |
1211 | /* reset the hardware with the new settings */ |
1212 | e1000_reset(adapter); | |
1213 | ||
1214 | strcpy(netdev->name, "eth%d"); | |
1215 | err = register_netdev(netdev); | |
1216 | if (err) | |
1217 | goto err_register; | |
1218 | ||
52f5509f | 1219 | e1000_vlan_filter_on_off(adapter, false); |
5622e404 | 1220 | |
fb3d47d4 | 1221 | /* print bus type/speed/width info */ |
feb8f478 | 1222 | e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n", |
7837e58c JP |
1223 | ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""), |
1224 | ((hw->bus_speed == e1000_bus_speed_133) ? 133 : | |
1225 | (hw->bus_speed == e1000_bus_speed_120) ? 120 : | |
1226 | (hw->bus_speed == e1000_bus_speed_100) ? 100 : | |
1227 | (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33), | |
1228 | ((hw->bus_width == e1000_bus_width_64) ? 64 : 32), | |
1229 | netdev->dev_addr); | |
1314bbf3 | 1230 | |
eb62efd2 JB |
1231 | /* carrier off reporting is important to ethtool even BEFORE open */ |
1232 | netif_carrier_off(netdev); | |
1233 | ||
feb8f478 | 1234 | e_info(probe, "Intel(R) PRO/1000 Network Connection\n"); |
1da177e4 LT |
1235 | |
1236 | cards_found++; | |
1237 | return 0; | |
1238 | ||
1239 | err_register: | |
6dd62ab0 | 1240 | err_eeprom: |
1532ecea | 1241 | e1000_phy_hw_reset(hw); |
6dd62ab0 | 1242 | |
1dc32918 JP |
1243 | if (hw->flash_address) |
1244 | iounmap(hw->flash_address); | |
6dd62ab0 VA |
1245 | kfree(adapter->tx_ring); |
1246 | kfree(adapter->rx_ring); | |
e508be17 | 1247 | err_dma: |
1da177e4 | 1248 | err_sw_init: |
5377a416 | 1249 | err_mdio_ioremap: |
13acde8f | 1250 | iounmap(hw->ce4100_gbe_mdio_base_virt); |
1dc32918 | 1251 | iounmap(hw->hw_addr); |
1da177e4 LT |
1252 | err_ioremap: |
1253 | free_netdev(netdev); | |
1254 | err_alloc_etherdev: | |
81250297 | 1255 | pci_release_selected_regions(pdev, bars); |
6dd62ab0 | 1256 | err_pci_reg: |
6dd62ab0 | 1257 | pci_disable_device(pdev); |
1da177e4 LT |
1258 | return err; |
1259 | } | |
1260 | ||
1261 | /** | |
1262 | * e1000_remove - Device Removal Routine | |
1263 | * @pdev: PCI device information struct | |
1264 | * | |
1265 | * e1000_remove is called by the PCI subsystem to alert the driver | |
b6fad9f9 | 1266 | * that it should release a PCI device. That could be caused by a |
1da177e4 LT |
1267 | * Hot-Plug event, or because the driver is going to be removed from |
1268 | * memory. | |
1269 | **/ | |
9f9a12f8 | 1270 | static void e1000_remove(struct pci_dev *pdev) |
1da177e4 LT |
1271 | { |
1272 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 1273 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 1274 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 1275 | |
a4010afe | 1276 | e1000_down_and_stop(adapter); |
0fccd0e9 | 1277 | e1000_release_manageability(adapter); |
1da177e4 | 1278 | |
bea3348e SH |
1279 | unregister_netdev(netdev); |
1280 | ||
1532ecea | 1281 | e1000_phy_hw_reset(hw); |
1da177e4 | 1282 | |
24025e4e MC |
1283 | kfree(adapter->tx_ring); |
1284 | kfree(adapter->rx_ring); | |
24025e4e | 1285 | |
1c26750c | 1286 | if (hw->mac_type == e1000_ce4100) |
13acde8f | 1287 | iounmap(hw->ce4100_gbe_mdio_base_virt); |
1dc32918 JP |
1288 | iounmap(hw->hw_addr); |
1289 | if (hw->flash_address) | |
1290 | iounmap(hw->flash_address); | |
81250297 | 1291 | pci_release_selected_regions(pdev, adapter->bars); |
1da177e4 LT |
1292 | |
1293 | free_netdev(netdev); | |
1294 | ||
1295 | pci_disable_device(pdev); | |
1296 | } | |
1297 | ||
1298 | /** | |
1299 | * e1000_sw_init - Initialize general software structures (struct e1000_adapter) | |
1300 | * @adapter: board private structure to initialize | |
1301 | * | |
1302 | * e1000_sw_init initializes the Adapter private data structure. | |
e508be17 | 1303 | * e1000_init_hw_struct MUST be called before this function |
1da177e4 | 1304 | **/ |
9f9a12f8 | 1305 | static int e1000_sw_init(struct e1000_adapter *adapter) |
1da177e4 | 1306 | { |
eb0f8054 | 1307 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; |
1da177e4 | 1308 | |
f56799ea JK |
1309 | adapter->num_tx_queues = 1; |
1310 | adapter->num_rx_queues = 1; | |
581d708e MC |
1311 | |
1312 | if (e1000_alloc_queues(adapter)) { | |
feb8f478 | 1313 | e_err(probe, "Unable to allocate memory for queues\n"); |
581d708e MC |
1314 | return -ENOMEM; |
1315 | } | |
1316 | ||
47313054 | 1317 | /* Explicitly disable IRQ since the NIC can be in any state. */ |
47313054 HX |
1318 | e1000_irq_disable(adapter); |
1319 | ||
1da177e4 | 1320 | spin_lock_init(&adapter->stats_lock); |
1da177e4 | 1321 | |
1314bbf3 AK |
1322 | set_bit(__E1000_DOWN, &adapter->flags); |
1323 | ||
1da177e4 LT |
1324 | return 0; |
1325 | } | |
1326 | ||
581d708e MC |
1327 | /** |
1328 | * e1000_alloc_queues - Allocate memory for all rings | |
1329 | * @adapter: board private structure to initialize | |
1330 | * | |
1331 | * We allocate one ring per queue at run-time since we don't know the | |
3e1d7cd2 | 1332 | * number of queues at compile-time. |
581d708e | 1333 | **/ |
9f9a12f8 | 1334 | static int e1000_alloc_queues(struct e1000_adapter *adapter) |
581d708e | 1335 | { |
1c7e5b12 | 1336 | adapter->tx_ring = kcalloc(adapter->num_tx_queues, |
a48954c8 | 1337 | sizeof(struct e1000_tx_ring), GFP_KERNEL); |
581d708e MC |
1338 | if (!adapter->tx_ring) |
1339 | return -ENOMEM; | |
581d708e | 1340 | |
1c7e5b12 | 1341 | adapter->rx_ring = kcalloc(adapter->num_rx_queues, |
a48954c8 | 1342 | sizeof(struct e1000_rx_ring), GFP_KERNEL); |
581d708e MC |
1343 | if (!adapter->rx_ring) { |
1344 | kfree(adapter->tx_ring); | |
1345 | return -ENOMEM; | |
1346 | } | |
581d708e | 1347 | |
581d708e MC |
1348 | return E1000_SUCCESS; |
1349 | } | |
1350 | ||
1da177e4 LT |
1351 | /** |
1352 | * e1000_open - Called when a network interface is made active | |
1353 | * @netdev: network interface device structure | |
1354 | * | |
1355 | * Returns 0 on success, negative value on failure | |
1356 | * | |
1357 | * The open entry point is called when a network interface is made | |
1358 | * active by the system (IFF_UP). At this point all resources needed | |
1359 | * for transmit and receive operations are allocated, the interrupt | |
a4010afe | 1360 | * handler is registered with the OS, the watchdog task is started, |
1da177e4 LT |
1361 | * and the stack is notified that the interface is ready. |
1362 | **/ | |
64798845 | 1363 | static int e1000_open(struct net_device *netdev) |
1da177e4 | 1364 | { |
60490fe0 | 1365 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 1366 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
1367 | int err; |
1368 | ||
2db10a08 | 1369 | /* disallow open during test */ |
1314bbf3 | 1370 | if (test_bit(__E1000_TESTING, &adapter->flags)) |
2db10a08 AK |
1371 | return -EBUSY; |
1372 | ||
eb62efd2 JB |
1373 | netif_carrier_off(netdev); |
1374 | ||
1da177e4 | 1375 | /* allocate transmit descriptors */ |
e0aac5a2 AK |
1376 | err = e1000_setup_all_tx_resources(adapter); |
1377 | if (err) | |
1da177e4 LT |
1378 | goto err_setup_tx; |
1379 | ||
1380 | /* allocate receive descriptors */ | |
e0aac5a2 | 1381 | err = e1000_setup_all_rx_resources(adapter); |
b5bf28cd | 1382 | if (err) |
e0aac5a2 | 1383 | goto err_setup_rx; |
b5bf28cd | 1384 | |
79f05bf0 AK |
1385 | e1000_power_up_phy(adapter); |
1386 | ||
2d7edb92 | 1387 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; |
1dc32918 | 1388 | if ((hw->mng_cookie.status & |
2d7edb92 MC |
1389 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { |
1390 | e1000_update_mng_vlan(adapter); | |
1391 | } | |
1da177e4 | 1392 | |
e0aac5a2 AK |
1393 | /* before we allocate an interrupt, we must be ready to handle it. |
1394 | * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt | |
1395 | * as soon as we call pci_request_irq, so we have to setup our | |
6cfbd97b JK |
1396 | * clean_rx handler before we do so. |
1397 | */ | |
e0aac5a2 AK |
1398 | e1000_configure(adapter); |
1399 | ||
1400 | err = e1000_request_irq(adapter); | |
1401 | if (err) | |
1402 | goto err_req_irq; | |
1403 | ||
1404 | /* From here on the code is the same as e1000_up() */ | |
1405 | clear_bit(__E1000_DOWN, &adapter->flags); | |
1406 | ||
bea3348e | 1407 | napi_enable(&adapter->napi); |
47313054 | 1408 | |
e0aac5a2 AK |
1409 | e1000_irq_enable(adapter); |
1410 | ||
076152d5 BH |
1411 | netif_start_queue(netdev); |
1412 | ||
e0aac5a2 | 1413 | /* fire a link status change interrupt to start the watchdog */ |
1dc32918 | 1414 | ew32(ICS, E1000_ICS_LSC); |
e0aac5a2 | 1415 | |
1da177e4 LT |
1416 | return E1000_SUCCESS; |
1417 | ||
b5bf28cd | 1418 | err_req_irq: |
e0aac5a2 | 1419 | e1000_power_down_phy(adapter); |
581d708e | 1420 | e1000_free_all_rx_resources(adapter); |
1da177e4 | 1421 | err_setup_rx: |
581d708e | 1422 | e1000_free_all_tx_resources(adapter); |
1da177e4 LT |
1423 | err_setup_tx: |
1424 | e1000_reset(adapter); | |
1425 | ||
1426 | return err; | |
1427 | } | |
1428 | ||
1429 | /** | |
1430 | * e1000_close - Disables a network interface | |
1431 | * @netdev: network interface device structure | |
1432 | * | |
1433 | * Returns 0, this is not allowed to fail | |
1434 | * | |
1435 | * The close entry point is called when an interface is de-activated | |
1436 | * by the OS. The hardware is still under the drivers control, but | |
1437 | * needs to be disabled. A global MAC reset is issued to stop the | |
1438 | * hardware, and all transmit and receive resources are freed. | |
1439 | **/ | |
64798845 | 1440 | static int e1000_close(struct net_device *netdev) |
1da177e4 | 1441 | { |
60490fe0 | 1442 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 1443 | struct e1000_hw *hw = &adapter->hw; |
6a7d64e3 | 1444 | int count = E1000_CHECK_RESET_COUNT; |
1445 | ||
1446 | while (test_bit(__E1000_RESETTING, &adapter->flags) && count--) | |
1447 | usleep_range(10000, 20000); | |
1da177e4 | 1448 | |
2db10a08 | 1449 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); |
1da177e4 | 1450 | e1000_down(adapter); |
79f05bf0 | 1451 | e1000_power_down_phy(adapter); |
2db10a08 | 1452 | e1000_free_irq(adapter); |
1da177e4 | 1453 | |
581d708e MC |
1454 | e1000_free_all_tx_resources(adapter); |
1455 | e1000_free_all_rx_resources(adapter); | |
1da177e4 | 1456 | |
4666560a | 1457 | /* kill manageability vlan ID if supported, but not if a vlan with |
6cfbd97b JK |
1458 | * the same ID is registered on the host OS (let 8021q kill it) |
1459 | */ | |
1dc32918 | 1460 | if ((hw->mng_cookie.status & |
6cfbd97b JK |
1461 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && |
1462 | !test_bit(adapter->mng_vlan_id, adapter->active_vlans)) { | |
80d5c368 PM |
1463 | e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), |
1464 | adapter->mng_vlan_id); | |
2d7edb92 | 1465 | } |
b55ccb35 | 1466 | |
1da177e4 LT |
1467 | return 0; |
1468 | } | |
1469 | ||
1470 | /** | |
1471 | * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary | |
1472 | * @adapter: address of board private structure | |
2d7edb92 MC |
1473 | * @start: address of beginning of memory |
1474 | * @len: length of memory | |
1da177e4 | 1475 | **/ |
64798845 JP |
1476 | static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start, |
1477 | unsigned long len) | |
1da177e4 | 1478 | { |
1dc32918 | 1479 | struct e1000_hw *hw = &adapter->hw; |
e982f17c | 1480 | unsigned long begin = (unsigned long)start; |
1da177e4 LT |
1481 | unsigned long end = begin + len; |
1482 | ||
2648345f | 1483 | /* First rev 82545 and 82546 need to not allow any memory |
6cfbd97b JK |
1484 | * write location to cross 64k boundary due to errata 23 |
1485 | */ | |
1dc32918 | 1486 | if (hw->mac_type == e1000_82545 || |
5377a416 | 1487 | hw->mac_type == e1000_ce4100 || |
1dc32918 | 1488 | hw->mac_type == e1000_82546) { |
c3033b01 | 1489 | return ((begin ^ (end - 1)) >> 16) != 0 ? false : true; |
1da177e4 LT |
1490 | } |
1491 | ||
c3033b01 | 1492 | return true; |
1da177e4 LT |
1493 | } |
1494 | ||
1495 | /** | |
1496 | * e1000_setup_tx_resources - allocate Tx resources (Descriptors) | |
1497 | * @adapter: board private structure | |
581d708e | 1498 | * @txdr: tx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1499 | * |
1500 | * Return 0 on success, negative on failure | |
1501 | **/ | |
64798845 JP |
1502 | static int e1000_setup_tx_resources(struct e1000_adapter *adapter, |
1503 | struct e1000_tx_ring *txdr) | |
1da177e4 | 1504 | { |
1da177e4 LT |
1505 | struct pci_dev *pdev = adapter->pdev; |
1506 | int size; | |
1507 | ||
580f321d | 1508 | size = sizeof(struct e1000_tx_buffer) * txdr->count; |
89bf67f1 | 1509 | txdr->buffer_info = vzalloc(size); |
14f8dc49 | 1510 | if (!txdr->buffer_info) |
1da177e4 | 1511 | return -ENOMEM; |
1da177e4 LT |
1512 | |
1513 | /* round up to nearest 4K */ | |
1514 | ||
1515 | txdr->size = txdr->count * sizeof(struct e1000_tx_desc); | |
9099cfb9 | 1516 | txdr->size = ALIGN(txdr->size, 4096); |
1da177e4 | 1517 | |
b16f53be NN |
1518 | txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma, |
1519 | GFP_KERNEL); | |
96838a40 | 1520 | if (!txdr->desc) { |
1da177e4 | 1521 | setup_tx_desc_die: |
1da177e4 LT |
1522 | vfree(txdr->buffer_info); |
1523 | return -ENOMEM; | |
1524 | } | |
1525 | ||
2648345f | 1526 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1527 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { |
1528 | void *olddesc = txdr->desc; | |
1529 | dma_addr_t olddma = txdr->dma; | |
feb8f478 | 1530 | e_err(tx_err, "txdr align check failed: %u bytes at %p\n", |
675ad473 | 1531 | txdr->size, txdr->desc); |
2648345f | 1532 | /* Try again, without freeing the previous */ |
b16f53be NN |
1533 | txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, |
1534 | &txdr->dma, GFP_KERNEL); | |
2648345f | 1535 | /* Failed allocation, critical failure */ |
96838a40 | 1536 | if (!txdr->desc) { |
b16f53be NN |
1537 | dma_free_coherent(&pdev->dev, txdr->size, olddesc, |
1538 | olddma); | |
1da177e4 LT |
1539 | goto setup_tx_desc_die; |
1540 | } | |
1541 | ||
1542 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { | |
1543 | /* give up */ | |
b16f53be NN |
1544 | dma_free_coherent(&pdev->dev, txdr->size, txdr->desc, |
1545 | txdr->dma); | |
1546 | dma_free_coherent(&pdev->dev, txdr->size, olddesc, | |
1547 | olddma); | |
feb8f478 | 1548 | e_err(probe, "Unable to allocate aligned memory " |
675ad473 | 1549 | "for the transmit descriptor ring\n"); |
1da177e4 LT |
1550 | vfree(txdr->buffer_info); |
1551 | return -ENOMEM; | |
1552 | } else { | |
2648345f | 1553 | /* Free old allocation, new allocation was successful */ |
b16f53be NN |
1554 | dma_free_coherent(&pdev->dev, txdr->size, olddesc, |
1555 | olddma); | |
1da177e4 LT |
1556 | } |
1557 | } | |
1558 | memset(txdr->desc, 0, txdr->size); | |
1559 | ||
1560 | txdr->next_to_use = 0; | |
1561 | txdr->next_to_clean = 0; | |
1562 | ||
1563 | return 0; | |
1564 | } | |
1565 | ||
581d708e MC |
1566 | /** |
1567 | * e1000_setup_all_tx_resources - wrapper to allocate Tx resources | |
1568 | * (Descriptors) for all queues | |
1569 | * @adapter: board private structure | |
1570 | * | |
581d708e MC |
1571 | * Return 0 on success, negative on failure |
1572 | **/ | |
64798845 | 1573 | int e1000_setup_all_tx_resources(struct e1000_adapter *adapter) |
581d708e MC |
1574 | { |
1575 | int i, err = 0; | |
1576 | ||
f56799ea | 1577 | for (i = 0; i < adapter->num_tx_queues; i++) { |
581d708e MC |
1578 | err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]); |
1579 | if (err) { | |
feb8f478 | 1580 | e_err(probe, "Allocation for Tx Queue %u failed\n", i); |
3fbbc72e VA |
1581 | for (i-- ; i >= 0; i--) |
1582 | e1000_free_tx_resources(adapter, | |
1583 | &adapter->tx_ring[i]); | |
581d708e MC |
1584 | break; |
1585 | } | |
1586 | } | |
1587 | ||
1588 | return err; | |
1589 | } | |
1590 | ||
1da177e4 LT |
1591 | /** |
1592 | * e1000_configure_tx - Configure 8254x Transmit Unit after Reset | |
1593 | * @adapter: board private structure | |
1594 | * | |
1595 | * Configure the Tx unit of the MAC after a reset. | |
1596 | **/ | |
64798845 | 1597 | static void e1000_configure_tx(struct e1000_adapter *adapter) |
1da177e4 | 1598 | { |
406874a7 | 1599 | u64 tdba; |
581d708e | 1600 | struct e1000_hw *hw = &adapter->hw; |
1532ecea | 1601 | u32 tdlen, tctl, tipg; |
406874a7 | 1602 | u32 ipgr1, ipgr2; |
1da177e4 LT |
1603 | |
1604 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
1605 | ||
f56799ea | 1606 | switch (adapter->num_tx_queues) { |
24025e4e MC |
1607 | case 1: |
1608 | default: | |
581d708e MC |
1609 | tdba = adapter->tx_ring[0].dma; |
1610 | tdlen = adapter->tx_ring[0].count * | |
1611 | sizeof(struct e1000_tx_desc); | |
1dc32918 JP |
1612 | ew32(TDLEN, tdlen); |
1613 | ew32(TDBAH, (tdba >> 32)); | |
1614 | ew32(TDBAL, (tdba & 0x00000000ffffffffULL)); | |
1615 | ew32(TDT, 0); | |
1616 | ew32(TDH, 0); | |
6cfbd97b JK |
1617 | adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? |
1618 | E1000_TDH : E1000_82542_TDH); | |
1619 | adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? | |
1620 | E1000_TDT : E1000_82542_TDT); | |
24025e4e MC |
1621 | break; |
1622 | } | |
1da177e4 LT |
1623 | |
1624 | /* Set the default values for the Tx Inter Packet Gap timer */ | |
1532ecea | 1625 | if ((hw->media_type == e1000_media_type_fiber || |
d89b6c67 | 1626 | hw->media_type == e1000_media_type_internal_serdes)) |
0fadb059 JK |
1627 | tipg = DEFAULT_82543_TIPG_IPGT_FIBER; |
1628 | else | |
1629 | tipg = DEFAULT_82543_TIPG_IPGT_COPPER; | |
1630 | ||
581d708e | 1631 | switch (hw->mac_type) { |
1da177e4 LT |
1632 | case e1000_82542_rev2_0: |
1633 | case e1000_82542_rev2_1: | |
1634 | tipg = DEFAULT_82542_TIPG_IPGT; | |
0fadb059 JK |
1635 | ipgr1 = DEFAULT_82542_TIPG_IPGR1; |
1636 | ipgr2 = DEFAULT_82542_TIPG_IPGR2; | |
1da177e4 LT |
1637 | break; |
1638 | default: | |
0fadb059 JK |
1639 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; |
1640 | ipgr2 = DEFAULT_82543_TIPG_IPGR2; | |
1641 | break; | |
1da177e4 | 1642 | } |
0fadb059 JK |
1643 | tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT; |
1644 | tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT; | |
1dc32918 | 1645 | ew32(TIPG, tipg); |
1da177e4 LT |
1646 | |
1647 | /* Set the Tx Interrupt Delay register */ | |
1648 | ||
1dc32918 | 1649 | ew32(TIDV, adapter->tx_int_delay); |
581d708e | 1650 | if (hw->mac_type >= e1000_82540) |
1dc32918 | 1651 | ew32(TADV, adapter->tx_abs_int_delay); |
1da177e4 LT |
1652 | |
1653 | /* Program the Transmit Control Register */ | |
1654 | ||
1dc32918 | 1655 | tctl = er32(TCTL); |
1da177e4 | 1656 | tctl &= ~E1000_TCTL_CT; |
7e6c9861 | 1657 | tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | |
1da177e4 LT |
1658 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); |
1659 | ||
581d708e | 1660 | e1000_config_collision_dist(hw); |
1da177e4 LT |
1661 | |
1662 | /* Setup Transmit Descriptor Settings for eop descriptor */ | |
6a042dab JB |
1663 | adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; |
1664 | ||
1665 | /* only set IDE if we are delaying interrupts using the timers */ | |
1666 | if (adapter->tx_int_delay) | |
1667 | adapter->txd_cmd |= E1000_TXD_CMD_IDE; | |
1da177e4 | 1668 | |
581d708e | 1669 | if (hw->mac_type < e1000_82543) |
1da177e4 LT |
1670 | adapter->txd_cmd |= E1000_TXD_CMD_RPS; |
1671 | else | |
1672 | adapter->txd_cmd |= E1000_TXD_CMD_RS; | |
1673 | ||
1674 | /* Cache if we're 82544 running in PCI-X because we'll | |
6cfbd97b JK |
1675 | * need this to apply a workaround later in the send path. |
1676 | */ | |
581d708e MC |
1677 | if (hw->mac_type == e1000_82544 && |
1678 | hw->bus_type == e1000_bus_type_pcix) | |
3db1cd5c | 1679 | adapter->pcix_82544 = true; |
7e6c9861 | 1680 | |
1dc32918 | 1681 | ew32(TCTL, tctl); |
7e6c9861 | 1682 | |
1da177e4 LT |
1683 | } |
1684 | ||
1685 | /** | |
1686 | * e1000_setup_rx_resources - allocate Rx resources (Descriptors) | |
1687 | * @adapter: board private structure | |
581d708e | 1688 | * @rxdr: rx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1689 | * |
1690 | * Returns 0 on success, negative on failure | |
1691 | **/ | |
64798845 JP |
1692 | static int e1000_setup_rx_resources(struct e1000_adapter *adapter, |
1693 | struct e1000_rx_ring *rxdr) | |
1da177e4 | 1694 | { |
1da177e4 | 1695 | struct pci_dev *pdev = adapter->pdev; |
2d7edb92 | 1696 | int size, desc_len; |
1da177e4 | 1697 | |
93f0afe9 | 1698 | size = sizeof(struct e1000_rx_buffer) * rxdr->count; |
89bf67f1 | 1699 | rxdr->buffer_info = vzalloc(size); |
14f8dc49 | 1700 | if (!rxdr->buffer_info) |
1da177e4 | 1701 | return -ENOMEM; |
1da177e4 | 1702 | |
1532ecea | 1703 | desc_len = sizeof(struct e1000_rx_desc); |
2d7edb92 | 1704 | |
1da177e4 LT |
1705 | /* Round up to nearest 4K */ |
1706 | ||
2d7edb92 | 1707 | rxdr->size = rxdr->count * desc_len; |
9099cfb9 | 1708 | rxdr->size = ALIGN(rxdr->size, 4096); |
1da177e4 | 1709 | |
b16f53be NN |
1710 | rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma, |
1711 | GFP_KERNEL); | |
581d708e | 1712 | if (!rxdr->desc) { |
1da177e4 | 1713 | setup_rx_desc_die: |
1da177e4 LT |
1714 | vfree(rxdr->buffer_info); |
1715 | return -ENOMEM; | |
1716 | } | |
1717 | ||
2648345f | 1718 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1719 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { |
1720 | void *olddesc = rxdr->desc; | |
1721 | dma_addr_t olddma = rxdr->dma; | |
feb8f478 | 1722 | e_err(rx_err, "rxdr align check failed: %u bytes at %p\n", |
675ad473 | 1723 | rxdr->size, rxdr->desc); |
2648345f | 1724 | /* Try again, without freeing the previous */ |
b16f53be NN |
1725 | rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, |
1726 | &rxdr->dma, GFP_KERNEL); | |
2648345f | 1727 | /* Failed allocation, critical failure */ |
581d708e | 1728 | if (!rxdr->desc) { |
b16f53be NN |
1729 | dma_free_coherent(&pdev->dev, rxdr->size, olddesc, |
1730 | olddma); | |
1da177e4 LT |
1731 | goto setup_rx_desc_die; |
1732 | } | |
1733 | ||
1734 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { | |
1735 | /* give up */ | |
b16f53be NN |
1736 | dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc, |
1737 | rxdr->dma); | |
1738 | dma_free_coherent(&pdev->dev, rxdr->size, olddesc, | |
1739 | olddma); | |
feb8f478 ET |
1740 | e_err(probe, "Unable to allocate aligned memory for " |
1741 | "the Rx descriptor ring\n"); | |
581d708e | 1742 | goto setup_rx_desc_die; |
1da177e4 | 1743 | } else { |
2648345f | 1744 | /* Free old allocation, new allocation was successful */ |
b16f53be NN |
1745 | dma_free_coherent(&pdev->dev, rxdr->size, olddesc, |
1746 | olddma); | |
1da177e4 LT |
1747 | } |
1748 | } | |
1749 | memset(rxdr->desc, 0, rxdr->size); | |
1750 | ||
1751 | rxdr->next_to_clean = 0; | |
1752 | rxdr->next_to_use = 0; | |
edbbb3ca | 1753 | rxdr->rx_skb_top = NULL; |
1da177e4 LT |
1754 | |
1755 | return 0; | |
1756 | } | |
1757 | ||
581d708e MC |
1758 | /** |
1759 | * e1000_setup_all_rx_resources - wrapper to allocate Rx resources | |
1760 | * (Descriptors) for all queues | |
1761 | * @adapter: board private structure | |
1762 | * | |
581d708e MC |
1763 | * Return 0 on success, negative on failure |
1764 | **/ | |
64798845 | 1765 | int e1000_setup_all_rx_resources(struct e1000_adapter *adapter) |
581d708e MC |
1766 | { |
1767 | int i, err = 0; | |
1768 | ||
f56799ea | 1769 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
1770 | err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]); |
1771 | if (err) { | |
feb8f478 | 1772 | e_err(probe, "Allocation for Rx Queue %u failed\n", i); |
3fbbc72e VA |
1773 | for (i-- ; i >= 0; i--) |
1774 | e1000_free_rx_resources(adapter, | |
1775 | &adapter->rx_ring[i]); | |
581d708e MC |
1776 | break; |
1777 | } | |
1778 | } | |
1779 | ||
1780 | return err; | |
1781 | } | |
1782 | ||
1da177e4 | 1783 | /** |
2648345f | 1784 | * e1000_setup_rctl - configure the receive control registers |
1da177e4 LT |
1785 | * @adapter: Board private structure |
1786 | **/ | |
64798845 | 1787 | static void e1000_setup_rctl(struct e1000_adapter *adapter) |
1da177e4 | 1788 | { |
1dc32918 | 1789 | struct e1000_hw *hw = &adapter->hw; |
630b25cd | 1790 | u32 rctl; |
1da177e4 | 1791 | |
1dc32918 | 1792 | rctl = er32(RCTL); |
1da177e4 LT |
1793 | |
1794 | rctl &= ~(3 << E1000_RCTL_MO_SHIFT); | |
1795 | ||
d5bc77a2 DN |
1796 | rctl |= E1000_RCTL_BAM | E1000_RCTL_LBM_NO | |
1797 | E1000_RCTL_RDMTS_HALF | | |
1dc32918 | 1798 | (hw->mc_filter_type << E1000_RCTL_MO_SHIFT); |
1da177e4 | 1799 | |
1dc32918 | 1800 | if (hw->tbi_compatibility_on == 1) |
1da177e4 LT |
1801 | rctl |= E1000_RCTL_SBP; |
1802 | else | |
1803 | rctl &= ~E1000_RCTL_SBP; | |
1804 | ||
2d7edb92 MC |
1805 | if (adapter->netdev->mtu <= ETH_DATA_LEN) |
1806 | rctl &= ~E1000_RCTL_LPE; | |
1807 | else | |
1808 | rctl |= E1000_RCTL_LPE; | |
1809 | ||
1da177e4 | 1810 | /* Setup buffer sizes */ |
9e2feace AK |
1811 | rctl &= ~E1000_RCTL_SZ_4096; |
1812 | rctl |= E1000_RCTL_BSEX; | |
1813 | switch (adapter->rx_buffer_len) { | |
a48954c8 JW |
1814 | case E1000_RXBUFFER_2048: |
1815 | default: | |
1816 | rctl |= E1000_RCTL_SZ_2048; | |
1817 | rctl &= ~E1000_RCTL_BSEX; | |
1818 | break; | |
1819 | case E1000_RXBUFFER_4096: | |
1820 | rctl |= E1000_RCTL_SZ_4096; | |
1821 | break; | |
1822 | case E1000_RXBUFFER_8192: | |
1823 | rctl |= E1000_RCTL_SZ_8192; | |
1824 | break; | |
1825 | case E1000_RXBUFFER_16384: | |
1826 | rctl |= E1000_RCTL_SZ_16384; | |
1827 | break; | |
2d7edb92 MC |
1828 | } |
1829 | ||
e825b731 BG |
1830 | /* This is useful for sniffing bad packets. */ |
1831 | if (adapter->netdev->features & NETIF_F_RXALL) { | |
1832 | /* UPE and MPE will be handled by normal PROMISC logic | |
6cfbd97b JK |
1833 | * in e1000e_set_rx_mode |
1834 | */ | |
e825b731 BG |
1835 | rctl |= (E1000_RCTL_SBP | /* Receive bad packets */ |
1836 | E1000_RCTL_BAM | /* RX All Bcast Pkts */ | |
1837 | E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */ | |
1838 | ||
1839 | rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */ | |
1840 | E1000_RCTL_DPF | /* Allow filtered pause */ | |
1841 | E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */ | |
1842 | /* Do not mess with E1000_CTRL_VME, it affects transmit as well, | |
1843 | * and that breaks VLANs. | |
1844 | */ | |
1845 | } | |
1846 | ||
1dc32918 | 1847 | ew32(RCTL, rctl); |
1da177e4 LT |
1848 | } |
1849 | ||
1850 | /** | |
1851 | * e1000_configure_rx - Configure 8254x Receive Unit after Reset | |
1852 | * @adapter: board private structure | |
1853 | * | |
1854 | * Configure the Rx unit of the MAC after a reset. | |
1855 | **/ | |
64798845 | 1856 | static void e1000_configure_rx(struct e1000_adapter *adapter) |
1da177e4 | 1857 | { |
406874a7 | 1858 | u64 rdba; |
581d708e | 1859 | struct e1000_hw *hw = &adapter->hw; |
1532ecea | 1860 | u32 rdlen, rctl, rxcsum; |
2d7edb92 | 1861 | |
edbbb3ca JB |
1862 | if (adapter->netdev->mtu > ETH_DATA_LEN) { |
1863 | rdlen = adapter->rx_ring[0].count * | |
a48954c8 | 1864 | sizeof(struct e1000_rx_desc); |
edbbb3ca JB |
1865 | adapter->clean_rx = e1000_clean_jumbo_rx_irq; |
1866 | adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; | |
1867 | } else { | |
1868 | rdlen = adapter->rx_ring[0].count * | |
a48954c8 | 1869 | sizeof(struct e1000_rx_desc); |
edbbb3ca JB |
1870 | adapter->clean_rx = e1000_clean_rx_irq; |
1871 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers; | |
1872 | } | |
1da177e4 LT |
1873 | |
1874 | /* disable receives while setting up the descriptors */ | |
1dc32918 JP |
1875 | rctl = er32(RCTL); |
1876 | ew32(RCTL, rctl & ~E1000_RCTL_EN); | |
1da177e4 LT |
1877 | |
1878 | /* set the Receive Delay Timer Register */ | |
1dc32918 | 1879 | ew32(RDTR, adapter->rx_int_delay); |
1da177e4 | 1880 | |
581d708e | 1881 | if (hw->mac_type >= e1000_82540) { |
1dc32918 | 1882 | ew32(RADV, adapter->rx_abs_int_delay); |
835bb129 | 1883 | if (adapter->itr_setting != 0) |
1dc32918 | 1884 | ew32(ITR, 1000000000 / (adapter->itr * 256)); |
1da177e4 LT |
1885 | } |
1886 | ||
581d708e | 1887 | /* Setup the HW Rx Head and Tail Descriptor Pointers and |
6cfbd97b JK |
1888 | * the Base and Length of the Rx Descriptor Ring |
1889 | */ | |
f56799ea | 1890 | switch (adapter->num_rx_queues) { |
24025e4e MC |
1891 | case 1: |
1892 | default: | |
581d708e | 1893 | rdba = adapter->rx_ring[0].dma; |
1dc32918 JP |
1894 | ew32(RDLEN, rdlen); |
1895 | ew32(RDBAH, (rdba >> 32)); | |
1896 | ew32(RDBAL, (rdba & 0x00000000ffffffffULL)); | |
1897 | ew32(RDT, 0); | |
1898 | ew32(RDH, 0); | |
6cfbd97b JK |
1899 | adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? |
1900 | E1000_RDH : E1000_82542_RDH); | |
1901 | adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? | |
1902 | E1000_RDT : E1000_82542_RDT); | |
581d708e | 1903 | break; |
24025e4e MC |
1904 | } |
1905 | ||
1da177e4 | 1906 | /* Enable 82543 Receive Checksum Offload for TCP and UDP */ |
581d708e | 1907 | if (hw->mac_type >= e1000_82543) { |
1dc32918 | 1908 | rxcsum = er32(RXCSUM); |
630b25cd | 1909 | if (adapter->rx_csum) |
2d7edb92 | 1910 | rxcsum |= E1000_RXCSUM_TUOFL; |
630b25cd | 1911 | else |
2d7edb92 | 1912 | /* don't need to clear IPPCSE as it defaults to 0 */ |
630b25cd | 1913 | rxcsum &= ~E1000_RXCSUM_TUOFL; |
1dc32918 | 1914 | ew32(RXCSUM, rxcsum); |
1da177e4 LT |
1915 | } |
1916 | ||
1917 | /* Enable Receives */ | |
d5bc77a2 | 1918 | ew32(RCTL, rctl | E1000_RCTL_EN); |
1da177e4 LT |
1919 | } |
1920 | ||
1921 | /** | |
581d708e | 1922 | * e1000_free_tx_resources - Free Tx Resources per Queue |
1da177e4 | 1923 | * @adapter: board private structure |
581d708e | 1924 | * @tx_ring: Tx descriptor ring for a specific queue |
1da177e4 LT |
1925 | * |
1926 | * Free all transmit software resources | |
1927 | **/ | |
64798845 JP |
1928 | static void e1000_free_tx_resources(struct e1000_adapter *adapter, |
1929 | struct e1000_tx_ring *tx_ring) | |
1da177e4 LT |
1930 | { |
1931 | struct pci_dev *pdev = adapter->pdev; | |
1932 | ||
581d708e | 1933 | e1000_clean_tx_ring(adapter, tx_ring); |
1da177e4 | 1934 | |
581d708e MC |
1935 | vfree(tx_ring->buffer_info); |
1936 | tx_ring->buffer_info = NULL; | |
1da177e4 | 1937 | |
b16f53be NN |
1938 | dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, |
1939 | tx_ring->dma); | |
1da177e4 | 1940 | |
581d708e MC |
1941 | tx_ring->desc = NULL; |
1942 | } | |
1943 | ||
1944 | /** | |
1945 | * e1000_free_all_tx_resources - Free Tx Resources for All Queues | |
1946 | * @adapter: board private structure | |
1947 | * | |
1948 | * Free all transmit software resources | |
1949 | **/ | |
64798845 | 1950 | void e1000_free_all_tx_resources(struct e1000_adapter *adapter) |
581d708e MC |
1951 | { |
1952 | int i; | |
1953 | ||
f56799ea | 1954 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 1955 | e1000_free_tx_resources(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
1956 | } |
1957 | ||
580f321d FW |
1958 | static void |
1959 | e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter, | |
1960 | struct e1000_tx_buffer *buffer_info) | |
1da177e4 | 1961 | { |
602c0554 AD |
1962 | if (buffer_info->dma) { |
1963 | if (buffer_info->mapped_as_page) | |
b16f53be NN |
1964 | dma_unmap_page(&adapter->pdev->dev, buffer_info->dma, |
1965 | buffer_info->length, DMA_TO_DEVICE); | |
602c0554 | 1966 | else |
b16f53be | 1967 | dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, |
602c0554 | 1968 | buffer_info->length, |
b16f53be | 1969 | DMA_TO_DEVICE); |
602c0554 AD |
1970 | buffer_info->dma = 0; |
1971 | } | |
a9ebadd6 | 1972 | if (buffer_info->skb) { |
1da177e4 | 1973 | dev_kfree_skb_any(buffer_info->skb); |
a9ebadd6 JB |
1974 | buffer_info->skb = NULL; |
1975 | } | |
37e73df8 | 1976 | buffer_info->time_stamp = 0; |
a9ebadd6 | 1977 | /* buffer_info must be completely set up in the transmit path */ |
1da177e4 LT |
1978 | } |
1979 | ||
1980 | /** | |
1981 | * e1000_clean_tx_ring - Free Tx Buffers | |
1982 | * @adapter: board private structure | |
581d708e | 1983 | * @tx_ring: ring to be cleaned |
1da177e4 | 1984 | **/ |
64798845 JP |
1985 | static void e1000_clean_tx_ring(struct e1000_adapter *adapter, |
1986 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 1987 | { |
1dc32918 | 1988 | struct e1000_hw *hw = &adapter->hw; |
580f321d | 1989 | struct e1000_tx_buffer *buffer_info; |
1da177e4 LT |
1990 | unsigned long size; |
1991 | unsigned int i; | |
1992 | ||
1993 | /* Free all the Tx ring sk_buffs */ | |
1994 | ||
96838a40 | 1995 | for (i = 0; i < tx_ring->count; i++) { |
1da177e4 LT |
1996 | buffer_info = &tx_ring->buffer_info[i]; |
1997 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); | |
1998 | } | |
1999 | ||
2f66fd36 | 2000 | netdev_reset_queue(adapter->netdev); |
580f321d | 2001 | size = sizeof(struct e1000_tx_buffer) * tx_ring->count; |
1da177e4 LT |
2002 | memset(tx_ring->buffer_info, 0, size); |
2003 | ||
2004 | /* Zero out the descriptor ring */ | |
2005 | ||
2006 | memset(tx_ring->desc, 0, tx_ring->size); | |
2007 | ||
2008 | tx_ring->next_to_use = 0; | |
2009 | tx_ring->next_to_clean = 0; | |
3db1cd5c | 2010 | tx_ring->last_tx_tso = false; |
1da177e4 | 2011 | |
1dc32918 JP |
2012 | writel(0, hw->hw_addr + tx_ring->tdh); |
2013 | writel(0, hw->hw_addr + tx_ring->tdt); | |
581d708e MC |
2014 | } |
2015 | ||
2016 | /** | |
2017 | * e1000_clean_all_tx_rings - Free Tx Buffers for all queues | |
2018 | * @adapter: board private structure | |
2019 | **/ | |
64798845 | 2020 | static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter) |
581d708e MC |
2021 | { |
2022 | int i; | |
2023 | ||
f56799ea | 2024 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 2025 | e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
2026 | } |
2027 | ||
2028 | /** | |
2029 | * e1000_free_rx_resources - Free Rx Resources | |
2030 | * @adapter: board private structure | |
581d708e | 2031 | * @rx_ring: ring to clean the resources from |
1da177e4 LT |
2032 | * |
2033 | * Free all receive software resources | |
2034 | **/ | |
64798845 JP |
2035 | static void e1000_free_rx_resources(struct e1000_adapter *adapter, |
2036 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 2037 | { |
1da177e4 LT |
2038 | struct pci_dev *pdev = adapter->pdev; |
2039 | ||
581d708e | 2040 | e1000_clean_rx_ring(adapter, rx_ring); |
1da177e4 LT |
2041 | |
2042 | vfree(rx_ring->buffer_info); | |
2043 | rx_ring->buffer_info = NULL; | |
2044 | ||
b16f53be NN |
2045 | dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, |
2046 | rx_ring->dma); | |
1da177e4 LT |
2047 | |
2048 | rx_ring->desc = NULL; | |
2049 | } | |
2050 | ||
2051 | /** | |
581d708e | 2052 | * e1000_free_all_rx_resources - Free Rx Resources for All Queues |
1da177e4 | 2053 | * @adapter: board private structure |
581d708e MC |
2054 | * |
2055 | * Free all receive software resources | |
2056 | **/ | |
64798845 | 2057 | void e1000_free_all_rx_resources(struct e1000_adapter *adapter) |
581d708e MC |
2058 | { |
2059 | int i; | |
2060 | ||
f56799ea | 2061 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e MC |
2062 | e1000_free_rx_resources(adapter, &adapter->rx_ring[i]); |
2063 | } | |
2064 | ||
13809609 FW |
2065 | #define E1000_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN) |
2066 | static unsigned int e1000_frag_len(const struct e1000_adapter *a) | |
2067 | { | |
2068 | return SKB_DATA_ALIGN(a->rx_buffer_len + E1000_HEADROOM) + | |
2069 | SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); | |
2070 | } | |
2071 | ||
2072 | static void *e1000_alloc_frag(const struct e1000_adapter *a) | |
2073 | { | |
2074 | unsigned int len = e1000_frag_len(a); | |
2075 | u8 *data = netdev_alloc_frag(len); | |
2076 | ||
2077 | if (likely(data)) | |
2078 | data += E1000_HEADROOM; | |
2079 | return data; | |
2080 | } | |
2081 | ||
581d708e MC |
2082 | /** |
2083 | * e1000_clean_rx_ring - Free Rx Buffers per Queue | |
2084 | * @adapter: board private structure | |
2085 | * @rx_ring: ring to free buffers from | |
1da177e4 | 2086 | **/ |
64798845 JP |
2087 | static void e1000_clean_rx_ring(struct e1000_adapter *adapter, |
2088 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 2089 | { |
1dc32918 | 2090 | struct e1000_hw *hw = &adapter->hw; |
93f0afe9 | 2091 | struct e1000_rx_buffer *buffer_info; |
1da177e4 LT |
2092 | struct pci_dev *pdev = adapter->pdev; |
2093 | unsigned long size; | |
630b25cd | 2094 | unsigned int i; |
1da177e4 | 2095 | |
13809609 | 2096 | /* Free all the Rx netfrags */ |
96838a40 | 2097 | for (i = 0; i < rx_ring->count; i++) { |
1da177e4 | 2098 | buffer_info = &rx_ring->buffer_info[i]; |
13809609 FW |
2099 | if (adapter->clean_rx == e1000_clean_rx_irq) { |
2100 | if (buffer_info->dma) | |
2101 | dma_unmap_single(&pdev->dev, buffer_info->dma, | |
2102 | adapter->rx_buffer_len, | |
2103 | DMA_FROM_DEVICE); | |
2104 | if (buffer_info->rxbuf.data) { | |
6bf93ba8 | 2105 | skb_free_frag(buffer_info->rxbuf.data); |
13809609 FW |
2106 | buffer_info->rxbuf.data = NULL; |
2107 | } | |
2108 | } else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) { | |
2109 | if (buffer_info->dma) | |
2110 | dma_unmap_page(&pdev->dev, buffer_info->dma, | |
2111 | adapter->rx_buffer_len, | |
2112 | DMA_FROM_DEVICE); | |
2113 | if (buffer_info->rxbuf.page) { | |
2114 | put_page(buffer_info->rxbuf.page); | |
2115 | buffer_info->rxbuf.page = NULL; | |
2116 | } | |
679be3ba | 2117 | } |
1da177e4 | 2118 | |
679be3ba | 2119 | buffer_info->dma = 0; |
1da177e4 LT |
2120 | } |
2121 | ||
edbbb3ca | 2122 | /* there also may be some cached data from a chained receive */ |
de591c78 FW |
2123 | napi_free_frags(&adapter->napi); |
2124 | rx_ring->rx_skb_top = NULL; | |
edbbb3ca | 2125 | |
93f0afe9 | 2126 | size = sizeof(struct e1000_rx_buffer) * rx_ring->count; |
1da177e4 LT |
2127 | memset(rx_ring->buffer_info, 0, size); |
2128 | ||
2129 | /* Zero out the descriptor ring */ | |
1da177e4 LT |
2130 | memset(rx_ring->desc, 0, rx_ring->size); |
2131 | ||
2132 | rx_ring->next_to_clean = 0; | |
2133 | rx_ring->next_to_use = 0; | |
2134 | ||
1dc32918 JP |
2135 | writel(0, hw->hw_addr + rx_ring->rdh); |
2136 | writel(0, hw->hw_addr + rx_ring->rdt); | |
581d708e MC |
2137 | } |
2138 | ||
2139 | /** | |
2140 | * e1000_clean_all_rx_rings - Free Rx Buffers for all queues | |
2141 | * @adapter: board private structure | |
2142 | **/ | |
64798845 | 2143 | static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter) |
581d708e MC |
2144 | { |
2145 | int i; | |
2146 | ||
f56799ea | 2147 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e | 2148 | e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]); |
1da177e4 LT |
2149 | } |
2150 | ||
2151 | /* The 82542 2.0 (revision 2) needs to have the receive unit in reset | |
2152 | * and memory write and invalidate disabled for certain operations | |
2153 | */ | |
64798845 | 2154 | static void e1000_enter_82542_rst(struct e1000_adapter *adapter) |
1da177e4 | 2155 | { |
1dc32918 | 2156 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 2157 | struct net_device *netdev = adapter->netdev; |
406874a7 | 2158 | u32 rctl; |
1da177e4 | 2159 | |
1dc32918 | 2160 | e1000_pci_clear_mwi(hw); |
1da177e4 | 2161 | |
1dc32918 | 2162 | rctl = er32(RCTL); |
1da177e4 | 2163 | rctl |= E1000_RCTL_RST; |
1dc32918 JP |
2164 | ew32(RCTL, rctl); |
2165 | E1000_WRITE_FLUSH(); | |
1da177e4 LT |
2166 | mdelay(5); |
2167 | ||
96838a40 | 2168 | if (netif_running(netdev)) |
581d708e | 2169 | e1000_clean_all_rx_rings(adapter); |
1da177e4 LT |
2170 | } |
2171 | ||
64798845 | 2172 | static void e1000_leave_82542_rst(struct e1000_adapter *adapter) |
1da177e4 | 2173 | { |
1dc32918 | 2174 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 2175 | struct net_device *netdev = adapter->netdev; |
406874a7 | 2176 | u32 rctl; |
1da177e4 | 2177 | |
1dc32918 | 2178 | rctl = er32(RCTL); |
1da177e4 | 2179 | rctl &= ~E1000_RCTL_RST; |
1dc32918 JP |
2180 | ew32(RCTL, rctl); |
2181 | E1000_WRITE_FLUSH(); | |
1da177e4 LT |
2182 | mdelay(5); |
2183 | ||
1dc32918 JP |
2184 | if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE) |
2185 | e1000_pci_set_mwi(hw); | |
1da177e4 | 2186 | |
96838a40 | 2187 | if (netif_running(netdev)) { |
72d64a43 JK |
2188 | /* No need to loop, because 82542 supports only 1 queue */ |
2189 | struct e1000_rx_ring *ring = &adapter->rx_ring[0]; | |
7c4d3367 | 2190 | e1000_configure_rx(adapter); |
72d64a43 | 2191 | adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring)); |
1da177e4 LT |
2192 | } |
2193 | } | |
2194 | ||
2195 | /** | |
2196 | * e1000_set_mac - Change the Ethernet Address of the NIC | |
2197 | * @netdev: network interface device structure | |
2198 | * @p: pointer to an address structure | |
2199 | * | |
2200 | * Returns 0 on success, negative on failure | |
2201 | **/ | |
64798845 | 2202 | static int e1000_set_mac(struct net_device *netdev, void *p) |
1da177e4 | 2203 | { |
60490fe0 | 2204 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 2205 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
2206 | struct sockaddr *addr = p; |
2207 | ||
96838a40 | 2208 | if (!is_valid_ether_addr(addr->sa_data)) |
1da177e4 LT |
2209 | return -EADDRNOTAVAIL; |
2210 | ||
2211 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2212 | ||
1dc32918 | 2213 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2214 | e1000_enter_82542_rst(adapter); |
2215 | ||
2216 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
1dc32918 | 2217 | memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len); |
1da177e4 | 2218 | |
1dc32918 | 2219 | e1000_rar_set(hw, hw->mac_addr, 0); |
1da177e4 | 2220 | |
1dc32918 | 2221 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2222 | e1000_leave_82542_rst(adapter); |
2223 | ||
2224 | return 0; | |
2225 | } | |
2226 | ||
2227 | /** | |
db0ce50d | 2228 | * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set |
1da177e4 LT |
2229 | * @netdev: network interface device structure |
2230 | * | |
db0ce50d PM |
2231 | * The set_rx_mode entry point is called whenever the unicast or multicast |
2232 | * address lists or the network interface flags are updated. This routine is | |
2233 | * responsible for configuring the hardware for proper unicast, multicast, | |
1da177e4 LT |
2234 | * promiscuous mode, and all-multi behavior. |
2235 | **/ | |
64798845 | 2236 | static void e1000_set_rx_mode(struct net_device *netdev) |
1da177e4 | 2237 | { |
60490fe0 | 2238 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 2239 | struct e1000_hw *hw = &adapter->hw; |
ccffad25 JP |
2240 | struct netdev_hw_addr *ha; |
2241 | bool use_uc = false; | |
406874a7 JP |
2242 | u32 rctl; |
2243 | u32 hash_value; | |
868d5309 | 2244 | int i, rar_entries = E1000_RAR_ENTRIES; |
1532ecea | 2245 | int mta_reg_count = E1000_NUM_MTA_REGISTERS; |
81c52285 JB |
2246 | u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC); |
2247 | ||
14f8dc49 | 2248 | if (!mcarray) |
81c52285 | 2249 | return; |
cd94dd0b | 2250 | |
2648345f MC |
2251 | /* Check for Promiscuous and All Multicast modes */ |
2252 | ||
1dc32918 | 2253 | rctl = er32(RCTL); |
1da177e4 | 2254 | |
96838a40 | 2255 | if (netdev->flags & IFF_PROMISC) { |
1da177e4 | 2256 | rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); |
746b9f02 | 2257 | rctl &= ~E1000_RCTL_VFE; |
1da177e4 | 2258 | } else { |
1532ecea | 2259 | if (netdev->flags & IFF_ALLMULTI) |
746b9f02 | 2260 | rctl |= E1000_RCTL_MPE; |
1532ecea | 2261 | else |
746b9f02 | 2262 | rctl &= ~E1000_RCTL_MPE; |
1532ecea | 2263 | /* Enable VLAN filter if there is a VLAN */ |
5622e404 | 2264 | if (e1000_vlan_used(adapter)) |
1532ecea | 2265 | rctl |= E1000_RCTL_VFE; |
db0ce50d PM |
2266 | } |
2267 | ||
32e7bfc4 | 2268 | if (netdev_uc_count(netdev) > rar_entries - 1) { |
db0ce50d PM |
2269 | rctl |= E1000_RCTL_UPE; |
2270 | } else if (!(netdev->flags & IFF_PROMISC)) { | |
2271 | rctl &= ~E1000_RCTL_UPE; | |
ccffad25 | 2272 | use_uc = true; |
1da177e4 LT |
2273 | } |
2274 | ||
1dc32918 | 2275 | ew32(RCTL, rctl); |
1da177e4 LT |
2276 | |
2277 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2278 | ||
96838a40 | 2279 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2280 | e1000_enter_82542_rst(adapter); |
2281 | ||
db0ce50d PM |
2282 | /* load the first 14 addresses into the exact filters 1-14. Unicast |
2283 | * addresses take precedence to avoid disabling unicast filtering | |
2284 | * when possible. | |
2285 | * | |
b595076a | 2286 | * RAR 0 is used for the station MAC address |
1da177e4 LT |
2287 | * if there are not 14 addresses, go ahead and clear the filters |
2288 | */ | |
ccffad25 JP |
2289 | i = 1; |
2290 | if (use_uc) | |
32e7bfc4 | 2291 | netdev_for_each_uc_addr(ha, netdev) { |
ccffad25 JP |
2292 | if (i == rar_entries) |
2293 | break; | |
2294 | e1000_rar_set(hw, ha->addr, i++); | |
2295 | } | |
2296 | ||
22bedad3 | 2297 | netdev_for_each_mc_addr(ha, netdev) { |
7a81e9f3 JP |
2298 | if (i == rar_entries) { |
2299 | /* load any remaining addresses into the hash table */ | |
2300 | u32 hash_reg, hash_bit, mta; | |
22bedad3 | 2301 | hash_value = e1000_hash_mc_addr(hw, ha->addr); |
7a81e9f3 JP |
2302 | hash_reg = (hash_value >> 5) & 0x7F; |
2303 | hash_bit = hash_value & 0x1F; | |
2304 | mta = (1 << hash_bit); | |
2305 | mcarray[hash_reg] |= mta; | |
10886af5 | 2306 | } else { |
22bedad3 | 2307 | e1000_rar_set(hw, ha->addr, i++); |
1da177e4 LT |
2308 | } |
2309 | } | |
2310 | ||
7a81e9f3 JP |
2311 | for (; i < rar_entries; i++) { |
2312 | E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0); | |
2313 | E1000_WRITE_FLUSH(); | |
2314 | E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0); | |
2315 | E1000_WRITE_FLUSH(); | |
1da177e4 LT |
2316 | } |
2317 | ||
81c52285 | 2318 | /* write the hash table completely, write from bottom to avoid |
6cfbd97b JK |
2319 | * both stupid write combining chipsets, and flushing each write |
2320 | */ | |
81c52285 | 2321 | for (i = mta_reg_count - 1; i >= 0 ; i--) { |
6cfbd97b | 2322 | /* If we are on an 82544 has an errata where writing odd |
81c52285 JB |
2323 | * offsets overwrites the previous even offset, but writing |
2324 | * backwards over the range solves the issue by always | |
2325 | * writing the odd offset first | |
2326 | */ | |
2327 | E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]); | |
2328 | } | |
2329 | E1000_WRITE_FLUSH(); | |
2330 | ||
96838a40 | 2331 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 | 2332 | e1000_leave_82542_rst(adapter); |
81c52285 JB |
2333 | |
2334 | kfree(mcarray); | |
1da177e4 LT |
2335 | } |
2336 | ||
a4010afe JB |
2337 | /** |
2338 | * e1000_update_phy_info_task - get phy info | |
2339 | * @work: work struct contained inside adapter struct | |
2340 | * | |
2341 | * Need to wait a few seconds after link up to get diagnostic information from | |
2342 | * the phy | |
2343 | */ | |
5cf42fcd JB |
2344 | static void e1000_update_phy_info_task(struct work_struct *work) |
2345 | { | |
2346 | struct e1000_adapter *adapter = container_of(work, | |
a4010afe JB |
2347 | struct e1000_adapter, |
2348 | phy_info_task.work); | |
b2f963bf | 2349 | |
a4010afe | 2350 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); |
1da177e4 LT |
2351 | } |
2352 | ||
5cf42fcd JB |
2353 | /** |
2354 | * e1000_82547_tx_fifo_stall_task - task to complete work | |
2355 | * @work: work struct contained inside adapter struct | |
2356 | **/ | |
2357 | static void e1000_82547_tx_fifo_stall_task(struct work_struct *work) | |
2358 | { | |
2359 | struct e1000_adapter *adapter = container_of(work, | |
a4010afe JB |
2360 | struct e1000_adapter, |
2361 | fifo_stall_task.work); | |
1dc32918 | 2362 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 2363 | struct net_device *netdev = adapter->netdev; |
406874a7 | 2364 | u32 tctl; |
1da177e4 | 2365 | |
96838a40 | 2366 | if (atomic_read(&adapter->tx_fifo_stall)) { |
1dc32918 JP |
2367 | if ((er32(TDT) == er32(TDH)) && |
2368 | (er32(TDFT) == er32(TDFH)) && | |
2369 | (er32(TDFTS) == er32(TDFHS))) { | |
2370 | tctl = er32(TCTL); | |
2371 | ew32(TCTL, tctl & ~E1000_TCTL_EN); | |
2372 | ew32(TDFT, adapter->tx_head_addr); | |
2373 | ew32(TDFH, adapter->tx_head_addr); | |
2374 | ew32(TDFTS, adapter->tx_head_addr); | |
2375 | ew32(TDFHS, adapter->tx_head_addr); | |
2376 | ew32(TCTL, tctl); | |
2377 | E1000_WRITE_FLUSH(); | |
1da177e4 LT |
2378 | |
2379 | adapter->tx_fifo_head = 0; | |
2380 | atomic_set(&adapter->tx_fifo_stall, 0); | |
2381 | netif_wake_queue(netdev); | |
baa34745 | 2382 | } else if (!test_bit(__E1000_DOWN, &adapter->flags)) { |
a4010afe | 2383 | schedule_delayed_work(&adapter->fifo_stall_task, 1); |
1da177e4 LT |
2384 | } |
2385 | } | |
2386 | } | |
2387 | ||
b548192a | 2388 | bool e1000_has_link(struct e1000_adapter *adapter) |
be0f0719 JB |
2389 | { |
2390 | struct e1000_hw *hw = &adapter->hw; | |
2391 | bool link_active = false; | |
be0f0719 | 2392 | |
6d9e5130 NS |
2393 | /* get_link_status is set on LSC (link status) interrupt or rx |
2394 | * sequence error interrupt (except on intel ce4100). | |
2395 | * get_link_status will stay false until the | |
2396 | * e1000_check_for_link establishes link for copper adapters | |
2397 | * ONLY | |
be0f0719 JB |
2398 | */ |
2399 | switch (hw->media_type) { | |
2400 | case e1000_media_type_copper: | |
6d9e5130 NS |
2401 | if (hw->mac_type == e1000_ce4100) |
2402 | hw->get_link_status = 1; | |
be0f0719 | 2403 | if (hw->get_link_status) { |
120a5d0d | 2404 | e1000_check_for_link(hw); |
be0f0719 JB |
2405 | link_active = !hw->get_link_status; |
2406 | } else { | |
2407 | link_active = true; | |
2408 | } | |
2409 | break; | |
2410 | case e1000_media_type_fiber: | |
120a5d0d | 2411 | e1000_check_for_link(hw); |
be0f0719 JB |
2412 | link_active = !!(er32(STATUS) & E1000_STATUS_LU); |
2413 | break; | |
2414 | case e1000_media_type_internal_serdes: | |
120a5d0d | 2415 | e1000_check_for_link(hw); |
be0f0719 JB |
2416 | link_active = hw->serdes_has_link; |
2417 | break; | |
2418 | default: | |
2419 | break; | |
2420 | } | |
2421 | ||
2422 | return link_active; | |
2423 | } | |
2424 | ||
1da177e4 | 2425 | /** |
a4010afe JB |
2426 | * e1000_watchdog - work function |
2427 | * @work: work struct contained inside adapter struct | |
1da177e4 | 2428 | **/ |
a4010afe | 2429 | static void e1000_watchdog(struct work_struct *work) |
1da177e4 | 2430 | { |
a4010afe JB |
2431 | struct e1000_adapter *adapter = container_of(work, |
2432 | struct e1000_adapter, | |
2433 | watchdog_task.work); | |
1dc32918 | 2434 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 2435 | struct net_device *netdev = adapter->netdev; |
545c67c0 | 2436 | struct e1000_tx_ring *txdr = adapter->tx_ring; |
406874a7 | 2437 | u32 link, tctl; |
90fb5135 | 2438 | |
be0f0719 JB |
2439 | link = e1000_has_link(adapter); |
2440 | if ((netif_carrier_ok(netdev)) && link) | |
2441 | goto link_up; | |
1da177e4 | 2442 | |
96838a40 JB |
2443 | if (link) { |
2444 | if (!netif_carrier_ok(netdev)) { | |
406874a7 | 2445 | u32 ctrl; |
c3033b01 | 2446 | bool txb2b = true; |
be0f0719 | 2447 | /* update snapshot of PHY registers on LSC */ |
1dc32918 | 2448 | e1000_get_speed_and_duplex(hw, |
6cfbd97b JK |
2449 | &adapter->link_speed, |
2450 | &adapter->link_duplex); | |
1da177e4 | 2451 | |
1dc32918 | 2452 | ctrl = er32(CTRL); |
675ad473 ET |
2453 | pr_info("%s NIC Link is Up %d Mbps %s, " |
2454 | "Flow Control: %s\n", | |
2455 | netdev->name, | |
2456 | adapter->link_speed, | |
2457 | adapter->link_duplex == FULL_DUPLEX ? | |
2458 | "Full Duplex" : "Half Duplex", | |
2459 | ((ctrl & E1000_CTRL_TFCE) && (ctrl & | |
2460 | E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl & | |
2461 | E1000_CTRL_RFCE) ? "RX" : ((ctrl & | |
2462 | E1000_CTRL_TFCE) ? "TX" : "None"))); | |
1da177e4 | 2463 | |
39ca5f03 | 2464 | /* adjust timeout factor according to speed/duplex */ |
66a2b0a3 | 2465 | adapter->tx_timeout_factor = 1; |
7e6c9861 JK |
2466 | switch (adapter->link_speed) { |
2467 | case SPEED_10: | |
c3033b01 | 2468 | txb2b = false; |
be0f0719 | 2469 | adapter->tx_timeout_factor = 16; |
7e6c9861 JK |
2470 | break; |
2471 | case SPEED_100: | |
c3033b01 | 2472 | txb2b = false; |
7e6c9861 JK |
2473 | /* maybe add some timeout factor ? */ |
2474 | break; | |
2475 | } | |
2476 | ||
1532ecea | 2477 | /* enable transmits in the hardware */ |
1dc32918 | 2478 | tctl = er32(TCTL); |
7e6c9861 | 2479 | tctl |= E1000_TCTL_EN; |
1dc32918 | 2480 | ew32(TCTL, tctl); |
66a2b0a3 | 2481 | |
1da177e4 | 2482 | netif_carrier_on(netdev); |
baa34745 | 2483 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
a4010afe JB |
2484 | schedule_delayed_work(&adapter->phy_info_task, |
2485 | 2 * HZ); | |
1da177e4 LT |
2486 | adapter->smartspeed = 0; |
2487 | } | |
2488 | } else { | |
96838a40 | 2489 | if (netif_carrier_ok(netdev)) { |
1da177e4 LT |
2490 | adapter->link_speed = 0; |
2491 | adapter->link_duplex = 0; | |
675ad473 ET |
2492 | pr_info("%s NIC Link is Down\n", |
2493 | netdev->name); | |
1da177e4 | 2494 | netif_carrier_off(netdev); |
baa34745 JB |
2495 | |
2496 | if (!test_bit(__E1000_DOWN, &adapter->flags)) | |
a4010afe JB |
2497 | schedule_delayed_work(&adapter->phy_info_task, |
2498 | 2 * HZ); | |
1da177e4 LT |
2499 | } |
2500 | ||
2501 | e1000_smartspeed(adapter); | |
2502 | } | |
2503 | ||
be0f0719 | 2504 | link_up: |
1da177e4 LT |
2505 | e1000_update_stats(adapter); |
2506 | ||
1dc32918 | 2507 | hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; |
1da177e4 | 2508 | adapter->tpt_old = adapter->stats.tpt; |
1dc32918 | 2509 | hw->collision_delta = adapter->stats.colc - adapter->colc_old; |
1da177e4 LT |
2510 | adapter->colc_old = adapter->stats.colc; |
2511 | ||
2512 | adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old; | |
2513 | adapter->gorcl_old = adapter->stats.gorcl; | |
2514 | adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old; | |
2515 | adapter->gotcl_old = adapter->stats.gotcl; | |
2516 | ||
1dc32918 | 2517 | e1000_update_adaptive(hw); |
1da177e4 | 2518 | |
f56799ea | 2519 | if (!netif_carrier_ok(netdev)) { |
581d708e | 2520 | if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) { |
1da177e4 LT |
2521 | /* We've lost link, so the controller stops DMA, |
2522 | * but we've got queued Tx work that's never going | |
2523 | * to get done, so reset controller to flush Tx. | |
6cfbd97b JK |
2524 | * (Do the reset outside of interrupt context). |
2525 | */ | |
87041639 JK |
2526 | adapter->tx_timeout_count++; |
2527 | schedule_work(&adapter->reset_task); | |
0ef4eedc | 2528 | /* exit immediately since reset is imminent */ |
b2f963bf | 2529 | return; |
1da177e4 LT |
2530 | } |
2531 | } | |
2532 | ||
eab2abf5 JB |
2533 | /* Simple mode for Interrupt Throttle Rate (ITR) */ |
2534 | if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) { | |
6cfbd97b | 2535 | /* Symmetric Tx/Rx gets a reduced ITR=2000; |
eab2abf5 JB |
2536 | * Total asymmetrical Tx or Rx gets ITR=8000; |
2537 | * everyone else is between 2000-8000. | |
2538 | */ | |
2539 | u32 goc = (adapter->gotcl + adapter->gorcl) / 10000; | |
2540 | u32 dif = (adapter->gotcl > adapter->gorcl ? | |
2541 | adapter->gotcl - adapter->gorcl : | |
2542 | adapter->gorcl - adapter->gotcl) / 10000; | |
2543 | u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; | |
2544 | ||
2545 | ew32(ITR, 1000000000 / (itr * 256)); | |
2546 | } | |
2547 | ||
1da177e4 | 2548 | /* Cause software interrupt to ensure rx ring is cleaned */ |
1dc32918 | 2549 | ew32(ICS, E1000_ICS_RXDMT0); |
1da177e4 | 2550 | |
2648345f | 2551 | /* Force detection of hung controller every watchdog period */ |
c3033b01 | 2552 | adapter->detect_tx_hung = true; |
1da177e4 | 2553 | |
a4010afe | 2554 | /* Reschedule the task */ |
baa34745 | 2555 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
a4010afe | 2556 | schedule_delayed_work(&adapter->watchdog_task, 2 * HZ); |
1da177e4 LT |
2557 | } |
2558 | ||
835bb129 JB |
2559 | enum latency_range { |
2560 | lowest_latency = 0, | |
2561 | low_latency = 1, | |
2562 | bulk_latency = 2, | |
2563 | latency_invalid = 255 | |
2564 | }; | |
2565 | ||
2566 | /** | |
2567 | * e1000_update_itr - update the dynamic ITR value based on statistics | |
8fce4731 JB |
2568 | * @adapter: pointer to adapter |
2569 | * @itr_setting: current adapter->itr | |
2570 | * @packets: the number of packets during this measurement interval | |
2571 | * @bytes: the number of bytes during this measurement interval | |
2572 | * | |
835bb129 JB |
2573 | * Stores a new ITR value based on packets and byte |
2574 | * counts during the last interrupt. The advantage of per interrupt | |
2575 | * computation is faster updates and more accurate ITR for the current | |
2576 | * traffic pattern. Constants in this function were computed | |
2577 | * based on theoretical maximum wire speed and thresholds were set based | |
2578 | * on testing data as well as attempting to minimize response time | |
2579 | * while increasing bulk throughput. | |
2580 | * this functionality is controlled by the InterruptThrottleRate module | |
2581 | * parameter (see e1000_param.c) | |
835bb129 JB |
2582 | **/ |
2583 | static unsigned int e1000_update_itr(struct e1000_adapter *adapter, | |
64798845 | 2584 | u16 itr_setting, int packets, int bytes) |
835bb129 JB |
2585 | { |
2586 | unsigned int retval = itr_setting; | |
2587 | struct e1000_hw *hw = &adapter->hw; | |
2588 | ||
2589 | if (unlikely(hw->mac_type < e1000_82540)) | |
2590 | goto update_itr_done; | |
2591 | ||
2592 | if (packets == 0) | |
2593 | goto update_itr_done; | |
2594 | ||
835bb129 JB |
2595 | switch (itr_setting) { |
2596 | case lowest_latency: | |
2b65326e JB |
2597 | /* jumbo frames get bulk treatment*/ |
2598 | if (bytes/packets > 8000) | |
2599 | retval = bulk_latency; | |
2600 | else if ((packets < 5) && (bytes > 512)) | |
835bb129 JB |
2601 | retval = low_latency; |
2602 | break; | |
2603 | case low_latency: /* 50 usec aka 20000 ints/s */ | |
2604 | if (bytes > 10000) { | |
2b65326e JB |
2605 | /* jumbo frames need bulk latency setting */ |
2606 | if (bytes/packets > 8000) | |
2607 | retval = bulk_latency; | |
2608 | else if ((packets < 10) || ((bytes/packets) > 1200)) | |
835bb129 JB |
2609 | retval = bulk_latency; |
2610 | else if ((packets > 35)) | |
2611 | retval = lowest_latency; | |
2b65326e JB |
2612 | } else if (bytes/packets > 2000) |
2613 | retval = bulk_latency; | |
2614 | else if (packets <= 2 && bytes < 512) | |
835bb129 JB |
2615 | retval = lowest_latency; |
2616 | break; | |
2617 | case bulk_latency: /* 250 usec aka 4000 ints/s */ | |
2618 | if (bytes > 25000) { | |
2619 | if (packets > 35) | |
2620 | retval = low_latency; | |
2b65326e JB |
2621 | } else if (bytes < 6000) { |
2622 | retval = low_latency; | |
835bb129 JB |
2623 | } |
2624 | break; | |
2625 | } | |
2626 | ||
2627 | update_itr_done: | |
2628 | return retval; | |
2629 | } | |
2630 | ||
2631 | static void e1000_set_itr(struct e1000_adapter *adapter) | |
2632 | { | |
2633 | struct e1000_hw *hw = &adapter->hw; | |
406874a7 JP |
2634 | u16 current_itr; |
2635 | u32 new_itr = adapter->itr; | |
835bb129 JB |
2636 | |
2637 | if (unlikely(hw->mac_type < e1000_82540)) | |
2638 | return; | |
2639 | ||
2640 | /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ | |
2641 | if (unlikely(adapter->link_speed != SPEED_1000)) { | |
2642 | current_itr = 0; | |
2643 | new_itr = 4000; | |
2644 | goto set_itr_now; | |
2645 | } | |
2646 | ||
6cfbd97b JK |
2647 | adapter->tx_itr = e1000_update_itr(adapter, adapter->tx_itr, |
2648 | adapter->total_tx_packets, | |
2649 | adapter->total_tx_bytes); | |
2b65326e JB |
2650 | /* conservative mode (itr 3) eliminates the lowest_latency setting */ |
2651 | if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) | |
2652 | adapter->tx_itr = low_latency; | |
2653 | ||
6cfbd97b JK |
2654 | adapter->rx_itr = e1000_update_itr(adapter, adapter->rx_itr, |
2655 | adapter->total_rx_packets, | |
2656 | adapter->total_rx_bytes); | |
2b65326e JB |
2657 | /* conservative mode (itr 3) eliminates the lowest_latency setting */ |
2658 | if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) | |
2659 | adapter->rx_itr = low_latency; | |
835bb129 JB |
2660 | |
2661 | current_itr = max(adapter->rx_itr, adapter->tx_itr); | |
2662 | ||
835bb129 JB |
2663 | switch (current_itr) { |
2664 | /* counts and packets in update_itr are dependent on these numbers */ | |
2665 | case lowest_latency: | |
2666 | new_itr = 70000; | |
2667 | break; | |
2668 | case low_latency: | |
2669 | new_itr = 20000; /* aka hwitr = ~200 */ | |
2670 | break; | |
2671 | case bulk_latency: | |
2672 | new_itr = 4000; | |
2673 | break; | |
2674 | default: | |
2675 | break; | |
2676 | } | |
2677 | ||
2678 | set_itr_now: | |
2679 | if (new_itr != adapter->itr) { | |
2680 | /* this attempts to bias the interrupt rate towards Bulk | |
2681 | * by adding intermediate steps when interrupt rate is | |
6cfbd97b JK |
2682 | * increasing |
2683 | */ | |
835bb129 | 2684 | new_itr = new_itr > adapter->itr ? |
6cfbd97b JK |
2685 | min(adapter->itr + (new_itr >> 2), new_itr) : |
2686 | new_itr; | |
835bb129 | 2687 | adapter->itr = new_itr; |
1dc32918 | 2688 | ew32(ITR, 1000000000 / (new_itr * 256)); |
835bb129 | 2689 | } |
835bb129 JB |
2690 | } |
2691 | ||
1da177e4 LT |
2692 | #define E1000_TX_FLAGS_CSUM 0x00000001 |
2693 | #define E1000_TX_FLAGS_VLAN 0x00000002 | |
2694 | #define E1000_TX_FLAGS_TSO 0x00000004 | |
2d7edb92 | 2695 | #define E1000_TX_FLAGS_IPV4 0x00000008 |
11a78dcf | 2696 | #define E1000_TX_FLAGS_NO_FCS 0x00000010 |
1da177e4 LT |
2697 | #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 |
2698 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 | |
2699 | ||
64798845 | 2700 | static int e1000_tso(struct e1000_adapter *adapter, |
06f4d033 VY |
2701 | struct e1000_tx_ring *tx_ring, struct sk_buff *skb, |
2702 | __be16 protocol) | |
1da177e4 | 2703 | { |
1da177e4 | 2704 | struct e1000_context_desc *context_desc; |
580f321d | 2705 | struct e1000_tx_buffer *buffer_info; |
1da177e4 | 2706 | unsigned int i; |
406874a7 JP |
2707 | u32 cmd_length = 0; |
2708 | u16 ipcse = 0, tucse, mss; | |
2709 | u8 ipcss, ipcso, tucss, tucso, hdr_len; | |
1da177e4 | 2710 | |
89114afd | 2711 | if (skb_is_gso(skb)) { |
4a54b1e5 FR |
2712 | int err; |
2713 | ||
2714 | err = skb_cow_head(skb, 0); | |
2715 | if (err < 0) | |
2716 | return err; | |
1da177e4 | 2717 | |
ab6a5bb6 | 2718 | hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); |
7967168c | 2719 | mss = skb_shinfo(skb)->gso_size; |
06f4d033 | 2720 | if (protocol == htons(ETH_P_IP)) { |
eddc9ec5 ACM |
2721 | struct iphdr *iph = ip_hdr(skb); |
2722 | iph->tot_len = 0; | |
2723 | iph->check = 0; | |
aa8223c7 ACM |
2724 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, |
2725 | iph->daddr, 0, | |
2726 | IPPROTO_TCP, | |
2727 | 0); | |
2d7edb92 | 2728 | cmd_length = E1000_TXD_CMD_IP; |
ea2ae17d | 2729 | ipcse = skb_transport_offset(skb) - 1; |
06f4d033 | 2730 | } else if (skb_is_gso_v6(skb)) { |
0660e03f | 2731 | ipv6_hdr(skb)->payload_len = 0; |
aa8223c7 | 2732 | tcp_hdr(skb)->check = |
0660e03f ACM |
2733 | ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, |
2734 | &ipv6_hdr(skb)->daddr, | |
2735 | 0, IPPROTO_TCP, 0); | |
2d7edb92 | 2736 | ipcse = 0; |
2d7edb92 | 2737 | } |
bbe735e4 | 2738 | ipcss = skb_network_offset(skb); |
eddc9ec5 | 2739 | ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data; |
ea2ae17d | 2740 | tucss = skb_transport_offset(skb); |
aa8223c7 | 2741 | tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data; |
1da177e4 LT |
2742 | tucse = 0; |
2743 | ||
2744 | cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | | |
2d7edb92 | 2745 | E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); |
1da177e4 | 2746 | |
581d708e MC |
2747 | i = tx_ring->next_to_use; |
2748 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); | |
545c67c0 | 2749 | buffer_info = &tx_ring->buffer_info[i]; |
1da177e4 LT |
2750 | |
2751 | context_desc->lower_setup.ip_fields.ipcss = ipcss; | |
2752 | context_desc->lower_setup.ip_fields.ipcso = ipcso; | |
2753 | context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); | |
2754 | context_desc->upper_setup.tcp_fields.tucss = tucss; | |
2755 | context_desc->upper_setup.tcp_fields.tucso = tucso; | |
2756 | context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); | |
2757 | context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); | |
2758 | context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; | |
2759 | context_desc->cmd_and_length = cpu_to_le32(cmd_length); | |
2760 | ||
545c67c0 | 2761 | buffer_info->time_stamp = jiffies; |
a9ebadd6 | 2762 | buffer_info->next_to_watch = i; |
545c67c0 | 2763 | |
a48954c8 JW |
2764 | if (++i == tx_ring->count) |
2765 | i = 0; | |
2766 | ||
581d708e | 2767 | tx_ring->next_to_use = i; |
1da177e4 | 2768 | |
c3033b01 | 2769 | return true; |
1da177e4 | 2770 | } |
c3033b01 | 2771 | return false; |
1da177e4 LT |
2772 | } |
2773 | ||
64798845 | 2774 | static bool e1000_tx_csum(struct e1000_adapter *adapter, |
06f4d033 VY |
2775 | struct e1000_tx_ring *tx_ring, struct sk_buff *skb, |
2776 | __be16 protocol) | |
1da177e4 LT |
2777 | { |
2778 | struct e1000_context_desc *context_desc; | |
580f321d | 2779 | struct e1000_tx_buffer *buffer_info; |
1da177e4 | 2780 | unsigned int i; |
406874a7 | 2781 | u8 css; |
3ed30676 | 2782 | u32 cmd_len = E1000_TXD_CMD_DEXT; |
1da177e4 | 2783 | |
3ed30676 DG |
2784 | if (skb->ip_summed != CHECKSUM_PARTIAL) |
2785 | return false; | |
1da177e4 | 2786 | |
06f4d033 | 2787 | switch (protocol) { |
09640e63 | 2788 | case cpu_to_be16(ETH_P_IP): |
3ed30676 DG |
2789 | if (ip_hdr(skb)->protocol == IPPROTO_TCP) |
2790 | cmd_len |= E1000_TXD_CMD_TCP; | |
2791 | break; | |
09640e63 | 2792 | case cpu_to_be16(ETH_P_IPV6): |
3ed30676 DG |
2793 | /* XXX not handling all IPV6 headers */ |
2794 | if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) | |
2795 | cmd_len |= E1000_TXD_CMD_TCP; | |
2796 | break; | |
2797 | default: | |
2798 | if (unlikely(net_ratelimit())) | |
feb8f478 ET |
2799 | e_warn(drv, "checksum_partial proto=%x!\n", |
2800 | skb->protocol); | |
3ed30676 DG |
2801 | break; |
2802 | } | |
1da177e4 | 2803 | |
0d0b1672 | 2804 | css = skb_checksum_start_offset(skb); |
1da177e4 | 2805 | |
3ed30676 DG |
2806 | i = tx_ring->next_to_use; |
2807 | buffer_info = &tx_ring->buffer_info[i]; | |
2808 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); | |
545c67c0 | 2809 | |
3ed30676 DG |
2810 | context_desc->lower_setup.ip_config = 0; |
2811 | context_desc->upper_setup.tcp_fields.tucss = css; | |
2812 | context_desc->upper_setup.tcp_fields.tucso = | |
2813 | css + skb->csum_offset; | |
2814 | context_desc->upper_setup.tcp_fields.tucse = 0; | |
2815 | context_desc->tcp_seg_setup.data = 0; | |
2816 | context_desc->cmd_and_length = cpu_to_le32(cmd_len); | |
1da177e4 | 2817 | |
3ed30676 DG |
2818 | buffer_info->time_stamp = jiffies; |
2819 | buffer_info->next_to_watch = i; | |
1da177e4 | 2820 | |
a48954c8 JW |
2821 | if (unlikely(++i == tx_ring->count)) |
2822 | i = 0; | |
2823 | ||
3ed30676 DG |
2824 | tx_ring->next_to_use = i; |
2825 | ||
2826 | return true; | |
1da177e4 LT |
2827 | } |
2828 | ||
2829 | #define E1000_MAX_TXD_PWR 12 | |
2830 | #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR) | |
2831 | ||
64798845 JP |
2832 | static int e1000_tx_map(struct e1000_adapter *adapter, |
2833 | struct e1000_tx_ring *tx_ring, | |
2834 | struct sk_buff *skb, unsigned int first, | |
2835 | unsigned int max_per_txd, unsigned int nr_frags, | |
2836 | unsigned int mss) | |
1da177e4 | 2837 | { |
1dc32918 | 2838 | struct e1000_hw *hw = &adapter->hw; |
602c0554 | 2839 | struct pci_dev *pdev = adapter->pdev; |
580f321d | 2840 | struct e1000_tx_buffer *buffer_info; |
d20b606c | 2841 | unsigned int len = skb_headlen(skb); |
602c0554 | 2842 | unsigned int offset = 0, size, count = 0, i; |
31c15a2f | 2843 | unsigned int f, bytecount, segs; |
1da177e4 LT |
2844 | |
2845 | i = tx_ring->next_to_use; | |
2846 | ||
96838a40 | 2847 | while (len) { |
37e73df8 | 2848 | buffer_info = &tx_ring->buffer_info[i]; |
1da177e4 | 2849 | size = min(len, max_per_txd); |
fd803241 JK |
2850 | /* Workaround for Controller erratum -- |
2851 | * descriptor for non-tso packet in a linear SKB that follows a | |
2852 | * tso gets written back prematurely before the data is fully | |
6cfbd97b JK |
2853 | * DMA'd to the controller |
2854 | */ | |
fd803241 | 2855 | if (!skb->data_len && tx_ring->last_tx_tso && |
89114afd | 2856 | !skb_is_gso(skb)) { |
3db1cd5c | 2857 | tx_ring->last_tx_tso = false; |
fd803241 JK |
2858 | size -= 4; |
2859 | } | |
2860 | ||
1da177e4 | 2861 | /* Workaround for premature desc write-backs |
6cfbd97b JK |
2862 | * in TSO mode. Append 4-byte sentinel desc |
2863 | */ | |
96838a40 | 2864 | if (unlikely(mss && !nr_frags && size == len && size > 8)) |
1da177e4 | 2865 | size -= 4; |
97338bde MC |
2866 | /* work-around for errata 10 and it applies |
2867 | * to all controllers in PCI-X mode | |
2868 | * The fix is to make sure that the first descriptor of a | |
2869 | * packet is smaller than 2048 - 16 - 16 (or 2016) bytes | |
2870 | */ | |
1dc32918 | 2871 | if (unlikely((hw->bus_type == e1000_bus_type_pcix) && |
a48954c8 JW |
2872 | (size > 2015) && count == 0)) |
2873 | size = 2015; | |
96838a40 | 2874 | |
1da177e4 | 2875 | /* Workaround for potential 82544 hang in PCI-X. Avoid |
6cfbd97b JK |
2876 | * terminating buffers within evenly-aligned dwords. |
2877 | */ | |
96838a40 | 2878 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
2879 | !((unsigned long)(skb->data + offset + size - 1) & 4) && |
2880 | size > 4)) | |
2881 | size -= 4; | |
2882 | ||
2883 | buffer_info->length = size; | |
cdd7549e | 2884 | /* set time_stamp *before* dma to help avoid a possible race */ |
1da177e4 | 2885 | buffer_info->time_stamp = jiffies; |
602c0554 | 2886 | buffer_info->mapped_as_page = false; |
b16f53be NN |
2887 | buffer_info->dma = dma_map_single(&pdev->dev, |
2888 | skb->data + offset, | |
6cfbd97b | 2889 | size, DMA_TO_DEVICE); |
b16f53be | 2890 | if (dma_mapping_error(&pdev->dev, buffer_info->dma)) |
602c0554 | 2891 | goto dma_error; |
a9ebadd6 | 2892 | buffer_info->next_to_watch = i; |
1da177e4 LT |
2893 | |
2894 | len -= size; | |
2895 | offset += size; | |
2896 | count++; | |
37e73df8 AD |
2897 | if (len) { |
2898 | i++; | |
2899 | if (unlikely(i == tx_ring->count)) | |
2900 | i = 0; | |
2901 | } | |
1da177e4 LT |
2902 | } |
2903 | ||
96838a40 | 2904 | for (f = 0; f < nr_frags; f++) { |
9e903e08 | 2905 | const struct skb_frag_struct *frag; |
1da177e4 LT |
2906 | |
2907 | frag = &skb_shinfo(skb)->frags[f]; | |
9e903e08 | 2908 | len = skb_frag_size(frag); |
877749bf | 2909 | offset = 0; |
1da177e4 | 2910 | |
96838a40 | 2911 | while (len) { |
877749bf | 2912 | unsigned long bufend; |
37e73df8 AD |
2913 | i++; |
2914 | if (unlikely(i == tx_ring->count)) | |
2915 | i = 0; | |
2916 | ||
1da177e4 LT |
2917 | buffer_info = &tx_ring->buffer_info[i]; |
2918 | size = min(len, max_per_txd); | |
1da177e4 | 2919 | /* Workaround for premature desc write-backs |
6cfbd97b JK |
2920 | * in TSO mode. Append 4-byte sentinel desc |
2921 | */ | |
2922 | if (unlikely(mss && f == (nr_frags-1) && | |
2923 | size == len && size > 8)) | |
1da177e4 | 2924 | size -= 4; |
1da177e4 LT |
2925 | /* Workaround for potential 82544 hang in PCI-X. |
2926 | * Avoid terminating buffers within evenly-aligned | |
6cfbd97b JK |
2927 | * dwords. |
2928 | */ | |
877749bf IC |
2929 | bufend = (unsigned long) |
2930 | page_to_phys(skb_frag_page(frag)); | |
2931 | bufend += offset + size - 1; | |
96838a40 | 2932 | if (unlikely(adapter->pcix_82544 && |
877749bf IC |
2933 | !(bufend & 4) && |
2934 | size > 4)) | |
1da177e4 LT |
2935 | size -= 4; |
2936 | ||
2937 | buffer_info->length = size; | |
1da177e4 | 2938 | buffer_info->time_stamp = jiffies; |
602c0554 | 2939 | buffer_info->mapped_as_page = true; |
877749bf IC |
2940 | buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag, |
2941 | offset, size, DMA_TO_DEVICE); | |
b16f53be | 2942 | if (dma_mapping_error(&pdev->dev, buffer_info->dma)) |
602c0554 | 2943 | goto dma_error; |
a9ebadd6 | 2944 | buffer_info->next_to_watch = i; |
1da177e4 LT |
2945 | |
2946 | len -= size; | |
2947 | offset += size; | |
2948 | count++; | |
1da177e4 LT |
2949 | } |
2950 | } | |
2951 | ||
31c15a2f DN |
2952 | segs = skb_shinfo(skb)->gso_segs ?: 1; |
2953 | /* multiply data chunks by size of headers */ | |
2954 | bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len; | |
2955 | ||
1da177e4 | 2956 | tx_ring->buffer_info[i].skb = skb; |
31c15a2f DN |
2957 | tx_ring->buffer_info[i].segs = segs; |
2958 | tx_ring->buffer_info[i].bytecount = bytecount; | |
1da177e4 LT |
2959 | tx_ring->buffer_info[first].next_to_watch = i; |
2960 | ||
2961 | return count; | |
602c0554 AD |
2962 | |
2963 | dma_error: | |
2964 | dev_err(&pdev->dev, "TX DMA map failed\n"); | |
2965 | buffer_info->dma = 0; | |
c1fa347f | 2966 | if (count) |
602c0554 | 2967 | count--; |
c1fa347f RK |
2968 | |
2969 | while (count--) { | |
a48954c8 | 2970 | if (i == 0) |
602c0554 | 2971 | i += tx_ring->count; |
c1fa347f | 2972 | i--; |
602c0554 AD |
2973 | buffer_info = &tx_ring->buffer_info[i]; |
2974 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); | |
2975 | } | |
2976 | ||
2977 | return 0; | |
1da177e4 LT |
2978 | } |
2979 | ||
64798845 JP |
2980 | static void e1000_tx_queue(struct e1000_adapter *adapter, |
2981 | struct e1000_tx_ring *tx_ring, int tx_flags, | |
2982 | int count) | |
1da177e4 | 2983 | { |
1da177e4 | 2984 | struct e1000_tx_desc *tx_desc = NULL; |
580f321d | 2985 | struct e1000_tx_buffer *buffer_info; |
406874a7 | 2986 | u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; |
1da177e4 LT |
2987 | unsigned int i; |
2988 | ||
96838a40 | 2989 | if (likely(tx_flags & E1000_TX_FLAGS_TSO)) { |
1da177e4 | 2990 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | |
6cfbd97b | 2991 | E1000_TXD_CMD_TSE; |
2d7edb92 MC |
2992 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; |
2993 | ||
96838a40 | 2994 | if (likely(tx_flags & E1000_TX_FLAGS_IPV4)) |
2d7edb92 | 2995 | txd_upper |= E1000_TXD_POPTS_IXSM << 8; |
1da177e4 LT |
2996 | } |
2997 | ||
96838a40 | 2998 | if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) { |
1da177e4 LT |
2999 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; |
3000 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; | |
3001 | } | |
3002 | ||
96838a40 | 3003 | if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) { |
1da177e4 LT |
3004 | txd_lower |= E1000_TXD_CMD_VLE; |
3005 | txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); | |
3006 | } | |
3007 | ||
11a78dcf BG |
3008 | if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS)) |
3009 | txd_lower &= ~(E1000_TXD_CMD_IFCS); | |
3010 | ||
1da177e4 LT |
3011 | i = tx_ring->next_to_use; |
3012 | ||
96838a40 | 3013 | while (count--) { |
1da177e4 LT |
3014 | buffer_info = &tx_ring->buffer_info[i]; |
3015 | tx_desc = E1000_TX_DESC(*tx_ring, i); | |
3016 | tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
3017 | tx_desc->lower.data = | |
3018 | cpu_to_le32(txd_lower | buffer_info->length); | |
3019 | tx_desc->upper.data = cpu_to_le32(txd_upper); | |
a48954c8 JW |
3020 | if (unlikely(++i == tx_ring->count)) |
3021 | i = 0; | |
1da177e4 LT |
3022 | } |
3023 | ||
3024 | tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); | |
3025 | ||
11a78dcf BG |
3026 | /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */ |
3027 | if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS)) | |
3028 | tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS)); | |
3029 | ||
1da177e4 LT |
3030 | /* Force memory writes to complete before letting h/w |
3031 | * know there are new descriptors to fetch. (Only | |
3032 | * applicable for weak-ordered memory model archs, | |
6cfbd97b JK |
3033 | * such as IA-64). |
3034 | */ | |
1da177e4 LT |
3035 | wmb(); |
3036 | ||
3037 | tx_ring->next_to_use = i; | |
1da177e4 LT |
3038 | } |
3039 | ||
1aa8b471 | 3040 | /* 82547 workaround to avoid controller hang in half-duplex environment. |
1da177e4 LT |
3041 | * The workaround is to avoid queuing a large packet that would span |
3042 | * the internal Tx FIFO ring boundary by notifying the stack to resend | |
3043 | * the packet at a later time. This gives the Tx FIFO an opportunity to | |
3044 | * flush all packets. When that occurs, we reset the Tx FIFO pointers | |
3045 | * to the beginning of the Tx FIFO. | |
1aa8b471 | 3046 | */ |
1da177e4 LT |
3047 | |
3048 | #define E1000_FIFO_HDR 0x10 | |
3049 | #define E1000_82547_PAD_LEN 0x3E0 | |
3050 | ||
64798845 JP |
3051 | static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, |
3052 | struct sk_buff *skb) | |
1da177e4 | 3053 | { |
406874a7 JP |
3054 | u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; |
3055 | u32 skb_fifo_len = skb->len + E1000_FIFO_HDR; | |
1da177e4 | 3056 | |
9099cfb9 | 3057 | skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR); |
1da177e4 | 3058 | |
96838a40 | 3059 | if (adapter->link_duplex != HALF_DUPLEX) |
1da177e4 LT |
3060 | goto no_fifo_stall_required; |
3061 | ||
96838a40 | 3062 | if (atomic_read(&adapter->tx_fifo_stall)) |
1da177e4 LT |
3063 | return 1; |
3064 | ||
96838a40 | 3065 | if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) { |
1da177e4 LT |
3066 | atomic_set(&adapter->tx_fifo_stall, 1); |
3067 | return 1; | |
3068 | } | |
3069 | ||
3070 | no_fifo_stall_required: | |
3071 | adapter->tx_fifo_head += skb_fifo_len; | |
96838a40 | 3072 | if (adapter->tx_fifo_head >= adapter->tx_fifo_size) |
1da177e4 LT |
3073 | adapter->tx_fifo_head -= adapter->tx_fifo_size; |
3074 | return 0; | |
3075 | } | |
3076 | ||
65c7973f JB |
3077 | static int __e1000_maybe_stop_tx(struct net_device *netdev, int size) |
3078 | { | |
3079 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
3080 | struct e1000_tx_ring *tx_ring = adapter->tx_ring; | |
3081 | ||
3082 | netif_stop_queue(netdev); | |
3083 | /* Herbert's original patch had: | |
3084 | * smp_mb__after_netif_stop_queue(); | |
6cfbd97b JK |
3085 | * but since that doesn't exist yet, just open code it. |
3086 | */ | |
65c7973f JB |
3087 | smp_mb(); |
3088 | ||
3089 | /* We need to check again in a case another CPU has just | |
6cfbd97b JK |
3090 | * made room available. |
3091 | */ | |
65c7973f JB |
3092 | if (likely(E1000_DESC_UNUSED(tx_ring) < size)) |
3093 | return -EBUSY; | |
3094 | ||
3095 | /* A reprieve! */ | |
3096 | netif_start_queue(netdev); | |
fcfb1224 | 3097 | ++adapter->restart_queue; |
65c7973f JB |
3098 | return 0; |
3099 | } | |
3100 | ||
3101 | static int e1000_maybe_stop_tx(struct net_device *netdev, | |
6cfbd97b | 3102 | struct e1000_tx_ring *tx_ring, int size) |
65c7973f JB |
3103 | { |
3104 | if (likely(E1000_DESC_UNUSED(tx_ring) >= size)) | |
3105 | return 0; | |
3106 | return __e1000_maybe_stop_tx(netdev, size); | |
3107 | } | |
3108 | ||
847a1d67 | 3109 | #define TXD_USE_COUNT(S, X) (((S) + ((1 << (X)) - 1)) >> (X)) |
3b29a56d SH |
3110 | static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, |
3111 | struct net_device *netdev) | |
1da177e4 | 3112 | { |
60490fe0 | 3113 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 3114 | struct e1000_hw *hw = &adapter->hw; |
581d708e | 3115 | struct e1000_tx_ring *tx_ring; |
1da177e4 LT |
3116 | unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD; |
3117 | unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; | |
3118 | unsigned int tx_flags = 0; | |
e743d313 | 3119 | unsigned int len = skb_headlen(skb); |
6d1e3aa7 KK |
3120 | unsigned int nr_frags; |
3121 | unsigned int mss; | |
1da177e4 | 3122 | int count = 0; |
76c224bc | 3123 | int tso; |
1da177e4 | 3124 | unsigned int f; |
06f4d033 | 3125 | __be16 protocol = vlan_get_protocol(skb); |
1da177e4 | 3126 | |
6cfbd97b | 3127 | /* This goes back to the question of how to logically map a Tx queue |
65c7973f | 3128 | * to a flow. Right now, performance is impacted slightly negatively |
6cfbd97b JK |
3129 | * if using multiple Tx queues. If the stack breaks away from a |
3130 | * single qdisc implementation, we can look at this again. | |
3131 | */ | |
581d708e | 3132 | tx_ring = adapter->tx_ring; |
24025e4e | 3133 | |
59d86c76 TD |
3134 | /* On PCI/PCI-X HW, if packet size is less than ETH_ZLEN, |
3135 | * packets may get corrupted during padding by HW. | |
3136 | * To WA this issue, pad all small packets manually. | |
3137 | */ | |
a94d9e22 AD |
3138 | if (eth_skb_pad(skb)) |
3139 | return NETDEV_TX_OK; | |
59d86c76 | 3140 | |
7967168c | 3141 | mss = skb_shinfo(skb)->gso_size; |
76c224bc | 3142 | /* The controller does a simple calculation to |
1da177e4 LT |
3143 | * make sure there is enough room in the FIFO before |
3144 | * initiating the DMA for each buffer. The calc is: | |
3145 | * 4 = ceil(buffer len/mss). To make sure we don't | |
3146 | * overrun the FIFO, adjust the max buffer len if mss | |
6cfbd97b JK |
3147 | * drops. |
3148 | */ | |
96838a40 | 3149 | if (mss) { |
406874a7 | 3150 | u8 hdr_len; |
1da177e4 LT |
3151 | max_per_txd = min(mss << 2, max_per_txd); |
3152 | max_txd_pwr = fls(max_per_txd) - 1; | |
9a3056da | 3153 | |
ab6a5bb6 | 3154 | hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); |
6d1e3aa7 | 3155 | if (skb->data_len && hdr_len == len) { |
1dc32918 | 3156 | switch (hw->mac_type) { |
9f687888 | 3157 | unsigned int pull_size; |
683a2aa3 HX |
3158 | case e1000_82544: |
3159 | /* Make sure we have room to chop off 4 bytes, | |
3160 | * and that the end alignment will work out to | |
3161 | * this hardware's requirements | |
3162 | * NOTE: this is a TSO only workaround | |
3163 | * if end byte alignment not correct move us | |
6cfbd97b JK |
3164 | * into the next dword |
3165 | */ | |
3166 | if ((unsigned long)(skb_tail_pointer(skb) - 1) | |
3167 | & 4) | |
683a2aa3 HX |
3168 | break; |
3169 | /* fall through */ | |
9f687888 JK |
3170 | pull_size = min((unsigned int)4, skb->data_len); |
3171 | if (!__pskb_pull_tail(skb, pull_size)) { | |
feb8f478 ET |
3172 | e_err(drv, "__pskb_pull_tail " |
3173 | "failed.\n"); | |
9f687888 | 3174 | dev_kfree_skb_any(skb); |
749dfc70 | 3175 | return NETDEV_TX_OK; |
9f687888 | 3176 | } |
e743d313 | 3177 | len = skb_headlen(skb); |
9f687888 JK |
3178 | break; |
3179 | default: | |
3180 | /* do nothing */ | |
3181 | break; | |
d74bbd3b | 3182 | } |
9a3056da | 3183 | } |
1da177e4 LT |
3184 | } |
3185 | ||
9a3056da | 3186 | /* reserve a descriptor for the offload context */ |
84fa7933 | 3187 | if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) |
1da177e4 | 3188 | count++; |
2648345f | 3189 | count++; |
fd803241 | 3190 | |
fd803241 | 3191 | /* Controller Erratum workaround */ |
89114afd | 3192 | if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb)) |
fd803241 | 3193 | count++; |
fd803241 | 3194 | |
1da177e4 LT |
3195 | count += TXD_USE_COUNT(len, max_txd_pwr); |
3196 | ||
96838a40 | 3197 | if (adapter->pcix_82544) |
1da177e4 LT |
3198 | count++; |
3199 | ||
96838a40 | 3200 | /* work-around for errata 10 and it applies to all controllers |
97338bde MC |
3201 | * in PCI-X mode, so add one more descriptor to the count |
3202 | */ | |
1dc32918 | 3203 | if (unlikely((hw->bus_type == e1000_bus_type_pcix) && |
97338bde MC |
3204 | (len > 2015))) |
3205 | count++; | |
3206 | ||
1da177e4 | 3207 | nr_frags = skb_shinfo(skb)->nr_frags; |
96838a40 | 3208 | for (f = 0; f < nr_frags; f++) |
9e903e08 | 3209 | count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]), |
1da177e4 | 3210 | max_txd_pwr); |
96838a40 | 3211 | if (adapter->pcix_82544) |
1da177e4 LT |
3212 | count += nr_frags; |
3213 | ||
1da177e4 | 3214 | /* need: count + 2 desc gap to keep tail from touching |
6cfbd97b JK |
3215 | * head, otherwise try next time |
3216 | */ | |
8017943e | 3217 | if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) |
1da177e4 | 3218 | return NETDEV_TX_BUSY; |
1da177e4 | 3219 | |
a4010afe JB |
3220 | if (unlikely((hw->mac_type == e1000_82547) && |
3221 | (e1000_82547_fifo_workaround(adapter, skb)))) { | |
3222 | netif_stop_queue(netdev); | |
3223 | if (!test_bit(__E1000_DOWN, &adapter->flags)) | |
3224 | schedule_delayed_work(&adapter->fifo_stall_task, 1); | |
3225 | return NETDEV_TX_BUSY; | |
1da177e4 LT |
3226 | } |
3227 | ||
df8a39de | 3228 | if (skb_vlan_tag_present(skb)) { |
1da177e4 | 3229 | tx_flags |= E1000_TX_FLAGS_VLAN; |
df8a39de JP |
3230 | tx_flags |= (skb_vlan_tag_get(skb) << |
3231 | E1000_TX_FLAGS_VLAN_SHIFT); | |
1da177e4 LT |
3232 | } |
3233 | ||
581d708e | 3234 | first = tx_ring->next_to_use; |
96838a40 | 3235 | |
06f4d033 | 3236 | tso = e1000_tso(adapter, tx_ring, skb, protocol); |
1da177e4 LT |
3237 | if (tso < 0) { |
3238 | dev_kfree_skb_any(skb); | |
3239 | return NETDEV_TX_OK; | |
3240 | } | |
3241 | ||
fd803241 | 3242 | if (likely(tso)) { |
8fce4731 | 3243 | if (likely(hw->mac_type != e1000_82544)) |
3db1cd5c | 3244 | tx_ring->last_tx_tso = true; |
1da177e4 | 3245 | tx_flags |= E1000_TX_FLAGS_TSO; |
06f4d033 | 3246 | } else if (likely(e1000_tx_csum(adapter, tx_ring, skb, protocol))) |
1da177e4 LT |
3247 | tx_flags |= E1000_TX_FLAGS_CSUM; |
3248 | ||
06f4d033 | 3249 | if (protocol == htons(ETH_P_IP)) |
2d7edb92 MC |
3250 | tx_flags |= E1000_TX_FLAGS_IPV4; |
3251 | ||
11a78dcf BG |
3252 | if (unlikely(skb->no_fcs)) |
3253 | tx_flags |= E1000_TX_FLAGS_NO_FCS; | |
3254 | ||
37e73df8 | 3255 | count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd, |
6cfbd97b | 3256 | nr_frags, mss); |
1da177e4 | 3257 | |
37e73df8 | 3258 | if (count) { |
a4605fef AD |
3259 | /* The descriptors needed is higher than other Intel drivers |
3260 | * due to a number of workarounds. The breakdown is below: | |
3261 | * Data descriptors: MAX_SKB_FRAGS + 1 | |
3262 | * Context Descriptor: 1 | |
3263 | * Keep head from touching tail: 2 | |
3264 | * Workarounds: 3 | |
3265 | */ | |
3266 | int desc_needed = MAX_SKB_FRAGS + 7; | |
3267 | ||
2f66fd36 | 3268 | netdev_sent_queue(netdev, skb->len); |
eab467f5 WB |
3269 | skb_tx_timestamp(skb); |
3270 | ||
37e73df8 | 3271 | e1000_tx_queue(adapter, tx_ring, tx_flags, count); |
a4605fef AD |
3272 | |
3273 | /* 82544 potentially requires twice as many data descriptors | |
3274 | * in order to guarantee buffers don't end on evenly-aligned | |
3275 | * dwords | |
3276 | */ | |
3277 | if (adapter->pcix_82544) | |
3278 | desc_needed += MAX_SKB_FRAGS + 1; | |
3279 | ||
37e73df8 | 3280 | /* Make sure there is space in the ring for the next send. */ |
a4605fef | 3281 | e1000_maybe_stop_tx(netdev, tx_ring, desc_needed); |
1da177e4 | 3282 | |
8a4d0b93 FW |
3283 | if (!skb->xmit_more || |
3284 | netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) { | |
3285 | writel(tx_ring->next_to_use, hw->hw_addr + tx_ring->tdt); | |
3286 | /* we need this if more than one processor can write to | |
3287 | * our tail at a time, it synchronizes IO on IA64/Altix | |
3288 | * systems | |
3289 | */ | |
3290 | mmiowb(); | |
3291 | } | |
37e73df8 AD |
3292 | } else { |
3293 | dev_kfree_skb_any(skb); | |
3294 | tx_ring->buffer_info[first].time_stamp = 0; | |
3295 | tx_ring->next_to_use = first; | |
3296 | } | |
1da177e4 | 3297 | |
1da177e4 LT |
3298 | return NETDEV_TX_OK; |
3299 | } | |
3300 | ||
b04e36ba TD |
3301 | #define NUM_REGS 38 /* 1 based count */ |
3302 | static void e1000_regdump(struct e1000_adapter *adapter) | |
3303 | { | |
3304 | struct e1000_hw *hw = &adapter->hw; | |
3305 | u32 regs[NUM_REGS]; | |
3306 | u32 *regs_buff = regs; | |
3307 | int i = 0; | |
3308 | ||
e29b5d8f TD |
3309 | static const char * const reg_name[] = { |
3310 | "CTRL", "STATUS", | |
3311 | "RCTL", "RDLEN", "RDH", "RDT", "RDTR", | |
3312 | "TCTL", "TDBAL", "TDBAH", "TDLEN", "TDH", "TDT", | |
3313 | "TIDV", "TXDCTL", "TADV", "TARC0", | |
3314 | "TDBAL1", "TDBAH1", "TDLEN1", "TDH1", "TDT1", | |
3315 | "TXDCTL1", "TARC1", | |
3316 | "CTRL_EXT", "ERT", "RDBAL", "RDBAH", | |
3317 | "TDFH", "TDFT", "TDFHS", "TDFTS", "TDFPC", | |
3318 | "RDFH", "RDFT", "RDFHS", "RDFTS", "RDFPC" | |
b04e36ba TD |
3319 | }; |
3320 | ||
3321 | regs_buff[0] = er32(CTRL); | |
3322 | regs_buff[1] = er32(STATUS); | |
3323 | ||
3324 | regs_buff[2] = er32(RCTL); | |
3325 | regs_buff[3] = er32(RDLEN); | |
3326 | regs_buff[4] = er32(RDH); | |
3327 | regs_buff[5] = er32(RDT); | |
3328 | regs_buff[6] = er32(RDTR); | |
3329 | ||
3330 | regs_buff[7] = er32(TCTL); | |
3331 | regs_buff[8] = er32(TDBAL); | |
3332 | regs_buff[9] = er32(TDBAH); | |
3333 | regs_buff[10] = er32(TDLEN); | |
3334 | regs_buff[11] = er32(TDH); | |
3335 | regs_buff[12] = er32(TDT); | |
3336 | regs_buff[13] = er32(TIDV); | |
3337 | regs_buff[14] = er32(TXDCTL); | |
3338 | regs_buff[15] = er32(TADV); | |
3339 | regs_buff[16] = er32(TARC0); | |
3340 | ||
3341 | regs_buff[17] = er32(TDBAL1); | |
3342 | regs_buff[18] = er32(TDBAH1); | |
3343 | regs_buff[19] = er32(TDLEN1); | |
3344 | regs_buff[20] = er32(TDH1); | |
3345 | regs_buff[21] = er32(TDT1); | |
3346 | regs_buff[22] = er32(TXDCTL1); | |
3347 | regs_buff[23] = er32(TARC1); | |
3348 | regs_buff[24] = er32(CTRL_EXT); | |
3349 | regs_buff[25] = er32(ERT); | |
3350 | regs_buff[26] = er32(RDBAL0); | |
3351 | regs_buff[27] = er32(RDBAH0); | |
3352 | regs_buff[28] = er32(TDFH); | |
3353 | regs_buff[29] = er32(TDFT); | |
3354 | regs_buff[30] = er32(TDFHS); | |
3355 | regs_buff[31] = er32(TDFTS); | |
3356 | regs_buff[32] = er32(TDFPC); | |
3357 | regs_buff[33] = er32(RDFH); | |
3358 | regs_buff[34] = er32(RDFT); | |
3359 | regs_buff[35] = er32(RDFHS); | |
3360 | regs_buff[36] = er32(RDFTS); | |
3361 | regs_buff[37] = er32(RDFPC); | |
3362 | ||
3363 | pr_info("Register dump\n"); | |
e29b5d8f TD |
3364 | for (i = 0; i < NUM_REGS; i++) |
3365 | pr_info("%-15s %08x\n", reg_name[i], regs_buff[i]); | |
b04e36ba TD |
3366 | } |
3367 | ||
3368 | /* | |
3369 | * e1000_dump: Print registers, tx ring and rx ring | |
3370 | */ | |
3371 | static void e1000_dump(struct e1000_adapter *adapter) | |
3372 | { | |
3373 | /* this code doesn't handle multiple rings */ | |
3374 | struct e1000_tx_ring *tx_ring = adapter->tx_ring; | |
3375 | struct e1000_rx_ring *rx_ring = adapter->rx_ring; | |
3376 | int i; | |
3377 | ||
3378 | if (!netif_msg_hw(adapter)) | |
3379 | return; | |
3380 | ||
3381 | /* Print Registers */ | |
3382 | e1000_regdump(adapter); | |
3383 | ||
6cfbd97b | 3384 | /* transmit dump */ |
b04e36ba TD |
3385 | pr_info("TX Desc ring0 dump\n"); |
3386 | ||
3387 | /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended) | |
3388 | * | |
3389 | * Legacy Transmit Descriptor | |
3390 | * +--------------------------------------------------------------+ | |
3391 | * 0 | Buffer Address [63:0] (Reserved on Write Back) | | |
3392 | * +--------------------------------------------------------------+ | |
3393 | * 8 | Special | CSS | Status | CMD | CSO | Length | | |
3394 | * +--------------------------------------------------------------+ | |
3395 | * 63 48 47 36 35 32 31 24 23 16 15 0 | |
3396 | * | |
3397 | * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload | |
3398 | * 63 48 47 40 39 32 31 16 15 8 7 0 | |
3399 | * +----------------------------------------------------------------+ | |
3400 | * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS | | |
3401 | * +----------------------------------------------------------------+ | |
3402 | * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN | | |
3403 | * +----------------------------------------------------------------+ | |
3404 | * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 | |
3405 | * | |
3406 | * Extended Data Descriptor (DTYP=0x1) | |
3407 | * +----------------------------------------------------------------+ | |
3408 | * 0 | Buffer Address [63:0] | | |
3409 | * +----------------------------------------------------------------+ | |
3410 | * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN | | |
3411 | * +----------------------------------------------------------------+ | |
3412 | * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 | |
3413 | */ | |
e29b5d8f TD |
3414 | pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestmp bi->skb\n"); |
3415 | pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestmp bi->skb\n"); | |
b04e36ba TD |
3416 | |
3417 | if (!netif_msg_tx_done(adapter)) | |
3418 | goto rx_ring_summary; | |
3419 | ||
3420 | for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) { | |
3421 | struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i); | |
580f321d | 3422 | struct e1000_tx_buffer *buffer_info = &tx_ring->buffer_info[i]; |
dd7f5c9e | 3423 | struct my_u { __le64 a; __le64 b; }; |
b04e36ba | 3424 | struct my_u *u = (struct my_u *)tx_desc; |
e29b5d8f TD |
3425 | const char *type; |
3426 | ||
b04e36ba | 3427 | if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean) |
e29b5d8f | 3428 | type = "NTC/U"; |
b04e36ba | 3429 | else if (i == tx_ring->next_to_use) |
e29b5d8f | 3430 | type = "NTU"; |
b04e36ba | 3431 | else if (i == tx_ring->next_to_clean) |
e29b5d8f | 3432 | type = "NTC"; |
b04e36ba | 3433 | else |
e29b5d8f | 3434 | type = ""; |
b04e36ba | 3435 | |
e29b5d8f TD |
3436 | pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p %s\n", |
3437 | ((le64_to_cpu(u->b) & (1<<20)) ? 'd' : 'c'), i, | |
3438 | le64_to_cpu(u->a), le64_to_cpu(u->b), | |
3439 | (u64)buffer_info->dma, buffer_info->length, | |
3440 | buffer_info->next_to_watch, | |
3441 | (u64)buffer_info->time_stamp, buffer_info->skb, type); | |
b04e36ba TD |
3442 | } |
3443 | ||
3444 | rx_ring_summary: | |
6cfbd97b | 3445 | /* receive dump */ |
b04e36ba TD |
3446 | pr_info("\nRX Desc ring dump\n"); |
3447 | ||
3448 | /* Legacy Receive Descriptor Format | |
3449 | * | |
3450 | * +-----------------------------------------------------+ | |
3451 | * | Buffer Address [63:0] | | |
3452 | * +-----------------------------------------------------+ | |
3453 | * | VLAN Tag | Errors | Status 0 | Packet csum | Length | | |
3454 | * +-----------------------------------------------------+ | |
3455 | * 63 48 47 40 39 32 31 16 15 0 | |
3456 | */ | |
e29b5d8f | 3457 | pr_info("R[desc] [address 63:0 ] [vl er S cks ln] [bi->dma ] [bi->skb]\n"); |
b04e36ba TD |
3458 | |
3459 | if (!netif_msg_rx_status(adapter)) | |
3460 | goto exit; | |
3461 | ||
3462 | for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) { | |
3463 | struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rx_ring, i); | |
93f0afe9 | 3464 | struct e1000_rx_buffer *buffer_info = &rx_ring->buffer_info[i]; |
dd7f5c9e | 3465 | struct my_u { __le64 a; __le64 b; }; |
b04e36ba | 3466 | struct my_u *u = (struct my_u *)rx_desc; |
e29b5d8f TD |
3467 | const char *type; |
3468 | ||
b04e36ba | 3469 | if (i == rx_ring->next_to_use) |
e29b5d8f | 3470 | type = "NTU"; |
b04e36ba | 3471 | else if (i == rx_ring->next_to_clean) |
e29b5d8f | 3472 | type = "NTC"; |
b04e36ba | 3473 | else |
e29b5d8f | 3474 | type = ""; |
b04e36ba | 3475 | |
e29b5d8f TD |
3476 | pr_info("R[0x%03X] %016llX %016llX %016llX %p %s\n", |
3477 | i, le64_to_cpu(u->a), le64_to_cpu(u->b), | |
13809609 | 3478 | (u64)buffer_info->dma, buffer_info->rxbuf.data, type); |
b04e36ba TD |
3479 | } /* for */ |
3480 | ||
3481 | /* dump the descriptor caches */ | |
3482 | /* rx */ | |
e29b5d8f | 3483 | pr_info("Rx descriptor cache in 64bit format\n"); |
b04e36ba | 3484 | for (i = 0x6000; i <= 0x63FF ; i += 0x10) { |
e29b5d8f TD |
3485 | pr_info("R%04X: %08X|%08X %08X|%08X\n", |
3486 | i, | |
3487 | readl(adapter->hw.hw_addr + i+4), | |
3488 | readl(adapter->hw.hw_addr + i), | |
3489 | readl(adapter->hw.hw_addr + i+12), | |
3490 | readl(adapter->hw.hw_addr + i+8)); | |
b04e36ba TD |
3491 | } |
3492 | /* tx */ | |
e29b5d8f | 3493 | pr_info("Tx descriptor cache in 64bit format\n"); |
b04e36ba | 3494 | for (i = 0x7000; i <= 0x73FF ; i += 0x10) { |
e29b5d8f TD |
3495 | pr_info("T%04X: %08X|%08X %08X|%08X\n", |
3496 | i, | |
3497 | readl(adapter->hw.hw_addr + i+4), | |
3498 | readl(adapter->hw.hw_addr + i), | |
3499 | readl(adapter->hw.hw_addr + i+12), | |
3500 | readl(adapter->hw.hw_addr + i+8)); | |
b04e36ba TD |
3501 | } |
3502 | exit: | |
3503 | return; | |
3504 | } | |
3505 | ||
1da177e4 LT |
3506 | /** |
3507 | * e1000_tx_timeout - Respond to a Tx Hang | |
3508 | * @netdev: network interface device structure | |
3509 | **/ | |
64798845 | 3510 | static void e1000_tx_timeout(struct net_device *netdev) |
1da177e4 | 3511 | { |
60490fe0 | 3512 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
3513 | |
3514 | /* Do the reset outside of interrupt context */ | |
87041639 JK |
3515 | adapter->tx_timeout_count++; |
3516 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
3517 | } |
3518 | ||
64798845 | 3519 | static void e1000_reset_task(struct work_struct *work) |
1da177e4 | 3520 | { |
65f27f38 DH |
3521 | struct e1000_adapter *adapter = |
3522 | container_of(work, struct e1000_adapter, reset_task); | |
1da177e4 | 3523 | |
b04e36ba | 3524 | e_err(drv, "Reset adapter\n"); |
b2f963bf | 3525 | e1000_reinit_locked(adapter); |
1da177e4 LT |
3526 | } |
3527 | ||
3528 | /** | |
3529 | * e1000_get_stats - Get System Network Statistics | |
3530 | * @netdev: network interface device structure | |
3531 | * | |
3532 | * Returns the address of the device statistics structure. | |
a4010afe | 3533 | * The statistics are actually updated from the watchdog. |
1da177e4 | 3534 | **/ |
64798845 | 3535 | static struct net_device_stats *e1000_get_stats(struct net_device *netdev) |
1da177e4 | 3536 | { |
6b7660cd | 3537 | /* only return the current stats */ |
5fe31def | 3538 | return &netdev->stats; |
1da177e4 LT |
3539 | } |
3540 | ||
3541 | /** | |
3542 | * e1000_change_mtu - Change the Maximum Transfer Unit | |
3543 | * @netdev: network interface device structure | |
3544 | * @new_mtu: new value for maximum frame size | |
3545 | * | |
3546 | * Returns 0 on success, negative on failure | |
3547 | **/ | |
64798845 | 3548 | static int e1000_change_mtu(struct net_device *netdev, int new_mtu) |
1da177e4 | 3549 | { |
60490fe0 | 3550 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 3551 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
3552 | int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; |
3553 | ||
96838a40 JB |
3554 | if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) || |
3555 | (max_frame > MAX_JUMBO_FRAME_SIZE)) { | |
feb8f478 | 3556 | e_err(probe, "Invalid MTU setting\n"); |
1da177e4 | 3557 | return -EINVAL; |
2d7edb92 | 3558 | } |
1da177e4 | 3559 | |
997f5cbd | 3560 | /* Adapter-specific max frame size limits. */ |
1dc32918 | 3561 | switch (hw->mac_type) { |
9e2feace | 3562 | case e1000_undefined ... e1000_82542_rev2_1: |
b7cb8c2c | 3563 | if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) { |
feb8f478 | 3564 | e_err(probe, "Jumbo Frames not supported.\n"); |
2d7edb92 | 3565 | return -EINVAL; |
2d7edb92 | 3566 | } |
997f5cbd | 3567 | break; |
997f5cbd JK |
3568 | default: |
3569 | /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */ | |
3570 | break; | |
1da177e4 LT |
3571 | } |
3572 | ||
3d6114e7 JB |
3573 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) |
3574 | msleep(1); | |
3575 | /* e1000_down has a dependency on max_frame_size */ | |
3576 | hw->max_frame_size = max_frame; | |
08e83316 SD |
3577 | if (netif_running(netdev)) { |
3578 | /* prevent buffers from being reallocated */ | |
3579 | adapter->alloc_rx_buf = e1000_alloc_dummy_rx_buffers; | |
3d6114e7 | 3580 | e1000_down(adapter); |
08e83316 | 3581 | } |
3d6114e7 | 3582 | |
87f5032e | 3583 | /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN |
9e2feace | 3584 | * means we reserve 2 more, this pushes us to allocate from the next |
edbbb3ca JB |
3585 | * larger slab size. |
3586 | * i.e. RXBUFFER_2048 --> size-4096 slab | |
6cfbd97b JK |
3587 | * however with the new *_jumbo_rx* routines, jumbo receives will use |
3588 | * fragmented skbs | |
3589 | */ | |
9e2feace | 3590 | |
9926146b | 3591 | if (max_frame <= E1000_RXBUFFER_2048) |
9e2feace | 3592 | adapter->rx_buffer_len = E1000_RXBUFFER_2048; |
edbbb3ca JB |
3593 | else |
3594 | #if (PAGE_SIZE >= E1000_RXBUFFER_16384) | |
9e2feace | 3595 | adapter->rx_buffer_len = E1000_RXBUFFER_16384; |
edbbb3ca JB |
3596 | #elif (PAGE_SIZE >= E1000_RXBUFFER_4096) |
3597 | adapter->rx_buffer_len = PAGE_SIZE; | |
3598 | #endif | |
9e2feace AK |
3599 | |
3600 | /* adjust allocation if LPE protects us, and we aren't using SBP */ | |
1dc32918 | 3601 | if (!hw->tbi_compatibility_on && |
b7cb8c2c | 3602 | ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) || |
9e2feace AK |
3603 | (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))) |
3604 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; | |
997f5cbd | 3605 | |
675ad473 ET |
3606 | pr_info("%s changing MTU from %d to %d\n", |
3607 | netdev->name, netdev->mtu, new_mtu); | |
2d7edb92 MC |
3608 | netdev->mtu = new_mtu; |
3609 | ||
2db10a08 | 3610 | if (netif_running(netdev)) |
3d6114e7 JB |
3611 | e1000_up(adapter); |
3612 | else | |
3613 | e1000_reset(adapter); | |
3614 | ||
3615 | clear_bit(__E1000_RESETTING, &adapter->flags); | |
1da177e4 | 3616 | |
1da177e4 LT |
3617 | return 0; |
3618 | } | |
3619 | ||
3620 | /** | |
3621 | * e1000_update_stats - Update the board statistics counters | |
3622 | * @adapter: board private structure | |
3623 | **/ | |
64798845 | 3624 | void e1000_update_stats(struct e1000_adapter *adapter) |
1da177e4 | 3625 | { |
5fe31def | 3626 | struct net_device *netdev = adapter->netdev; |
1da177e4 | 3627 | struct e1000_hw *hw = &adapter->hw; |
282f33c9 | 3628 | struct pci_dev *pdev = adapter->pdev; |
1da177e4 | 3629 | unsigned long flags; |
406874a7 | 3630 | u16 phy_tmp; |
1da177e4 LT |
3631 | |
3632 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF | |
3633 | ||
6cfbd97b | 3634 | /* Prevent stats update while adapter is being reset, or if the pci |
282f33c9 LV |
3635 | * connection is down. |
3636 | */ | |
9026729b | 3637 | if (adapter->link_speed == 0) |
282f33c9 | 3638 | return; |
81b1955e | 3639 | if (pci_channel_offline(pdev)) |
9026729b AK |
3640 | return; |
3641 | ||
1da177e4 LT |
3642 | spin_lock_irqsave(&adapter->stats_lock, flags); |
3643 | ||
828d055f | 3644 | /* these counters are modified from e1000_tbi_adjust_stats, |
1da177e4 LT |
3645 | * called from the interrupt context, so they must only |
3646 | * be written while holding adapter->stats_lock | |
3647 | */ | |
3648 | ||
1dc32918 JP |
3649 | adapter->stats.crcerrs += er32(CRCERRS); |
3650 | adapter->stats.gprc += er32(GPRC); | |
3651 | adapter->stats.gorcl += er32(GORCL); | |
3652 | adapter->stats.gorch += er32(GORCH); | |
3653 | adapter->stats.bprc += er32(BPRC); | |
3654 | adapter->stats.mprc += er32(MPRC); | |
3655 | adapter->stats.roc += er32(ROC); | |
3656 | ||
1532ecea JB |
3657 | adapter->stats.prc64 += er32(PRC64); |
3658 | adapter->stats.prc127 += er32(PRC127); | |
3659 | adapter->stats.prc255 += er32(PRC255); | |
3660 | adapter->stats.prc511 += er32(PRC511); | |
3661 | adapter->stats.prc1023 += er32(PRC1023); | |
3662 | adapter->stats.prc1522 += er32(PRC1522); | |
1dc32918 JP |
3663 | |
3664 | adapter->stats.symerrs += er32(SYMERRS); | |
3665 | adapter->stats.mpc += er32(MPC); | |
3666 | adapter->stats.scc += er32(SCC); | |
3667 | adapter->stats.ecol += er32(ECOL); | |
3668 | adapter->stats.mcc += er32(MCC); | |
3669 | adapter->stats.latecol += er32(LATECOL); | |
3670 | adapter->stats.dc += er32(DC); | |
3671 | adapter->stats.sec += er32(SEC); | |
3672 | adapter->stats.rlec += er32(RLEC); | |
3673 | adapter->stats.xonrxc += er32(XONRXC); | |
3674 | adapter->stats.xontxc += er32(XONTXC); | |
3675 | adapter->stats.xoffrxc += er32(XOFFRXC); | |
3676 | adapter->stats.xofftxc += er32(XOFFTXC); | |
3677 | adapter->stats.fcruc += er32(FCRUC); | |
3678 | adapter->stats.gptc += er32(GPTC); | |
3679 | adapter->stats.gotcl += er32(GOTCL); | |
3680 | adapter->stats.gotch += er32(GOTCH); | |
3681 | adapter->stats.rnbc += er32(RNBC); | |
3682 | adapter->stats.ruc += er32(RUC); | |
3683 | adapter->stats.rfc += er32(RFC); | |
3684 | adapter->stats.rjc += er32(RJC); | |
3685 | adapter->stats.torl += er32(TORL); | |
3686 | adapter->stats.torh += er32(TORH); | |
3687 | adapter->stats.totl += er32(TOTL); | |
3688 | adapter->stats.toth += er32(TOTH); | |
3689 | adapter->stats.tpr += er32(TPR); | |
3690 | ||
1532ecea JB |
3691 | adapter->stats.ptc64 += er32(PTC64); |
3692 | adapter->stats.ptc127 += er32(PTC127); | |
3693 | adapter->stats.ptc255 += er32(PTC255); | |
3694 | adapter->stats.ptc511 += er32(PTC511); | |
3695 | adapter->stats.ptc1023 += er32(PTC1023); | |
3696 | adapter->stats.ptc1522 += er32(PTC1522); | |
1dc32918 JP |
3697 | |
3698 | adapter->stats.mptc += er32(MPTC); | |
3699 | adapter->stats.bptc += er32(BPTC); | |
1da177e4 LT |
3700 | |
3701 | /* used for adaptive IFS */ | |
3702 | ||
1dc32918 | 3703 | hw->tx_packet_delta = er32(TPT); |
1da177e4 | 3704 | adapter->stats.tpt += hw->tx_packet_delta; |
1dc32918 | 3705 | hw->collision_delta = er32(COLC); |
1da177e4 LT |
3706 | adapter->stats.colc += hw->collision_delta; |
3707 | ||
96838a40 | 3708 | if (hw->mac_type >= e1000_82543) { |
1dc32918 JP |
3709 | adapter->stats.algnerrc += er32(ALGNERRC); |
3710 | adapter->stats.rxerrc += er32(RXERRC); | |
3711 | adapter->stats.tncrs += er32(TNCRS); | |
3712 | adapter->stats.cexterr += er32(CEXTERR); | |
3713 | adapter->stats.tsctc += er32(TSCTC); | |
3714 | adapter->stats.tsctfc += er32(TSCTFC); | |
1da177e4 LT |
3715 | } |
3716 | ||
3717 | /* Fill out the OS statistics structure */ | |
5fe31def AK |
3718 | netdev->stats.multicast = adapter->stats.mprc; |
3719 | netdev->stats.collisions = adapter->stats.colc; | |
1da177e4 LT |
3720 | |
3721 | /* Rx Errors */ | |
3722 | ||
87041639 | 3723 | /* RLEC on some newer hardware can be incorrect so build |
6cfbd97b JK |
3724 | * our own version based on RUC and ROC |
3725 | */ | |
5fe31def | 3726 | netdev->stats.rx_errors = adapter->stats.rxerrc + |
1da177e4 | 3727 | adapter->stats.crcerrs + adapter->stats.algnerrc + |
87041639 JK |
3728 | adapter->stats.ruc + adapter->stats.roc + |
3729 | adapter->stats.cexterr; | |
49559854 | 3730 | adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc; |
5fe31def AK |
3731 | netdev->stats.rx_length_errors = adapter->stats.rlerrc; |
3732 | netdev->stats.rx_crc_errors = adapter->stats.crcerrs; | |
3733 | netdev->stats.rx_frame_errors = adapter->stats.algnerrc; | |
3734 | netdev->stats.rx_missed_errors = adapter->stats.mpc; | |
1da177e4 LT |
3735 | |
3736 | /* Tx Errors */ | |
49559854 | 3737 | adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol; |
5fe31def AK |
3738 | netdev->stats.tx_errors = adapter->stats.txerrc; |
3739 | netdev->stats.tx_aborted_errors = adapter->stats.ecol; | |
3740 | netdev->stats.tx_window_errors = adapter->stats.latecol; | |
3741 | netdev->stats.tx_carrier_errors = adapter->stats.tncrs; | |
1dc32918 | 3742 | if (hw->bad_tx_carr_stats_fd && |
167fb284 | 3743 | adapter->link_duplex == FULL_DUPLEX) { |
5fe31def | 3744 | netdev->stats.tx_carrier_errors = 0; |
167fb284 JG |
3745 | adapter->stats.tncrs = 0; |
3746 | } | |
1da177e4 LT |
3747 | |
3748 | /* Tx Dropped needs to be maintained elsewhere */ | |
3749 | ||
3750 | /* Phy Stats */ | |
96838a40 JB |
3751 | if (hw->media_type == e1000_media_type_copper) { |
3752 | if ((adapter->link_speed == SPEED_1000) && | |
1da177e4 LT |
3753 | (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) { |
3754 | phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK; | |
3755 | adapter->phy_stats.idle_errors += phy_tmp; | |
3756 | } | |
3757 | ||
96838a40 | 3758 | if ((hw->mac_type <= e1000_82546) && |
1da177e4 LT |
3759 | (hw->phy_type == e1000_phy_m88) && |
3760 | !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp)) | |
3761 | adapter->phy_stats.receive_errors += phy_tmp; | |
3762 | } | |
3763 | ||
15e376b4 | 3764 | /* Management Stats */ |
1dc32918 JP |
3765 | if (hw->has_smbus) { |
3766 | adapter->stats.mgptc += er32(MGTPTC); | |
3767 | adapter->stats.mgprc += er32(MGTPRC); | |
3768 | adapter->stats.mgpdc += er32(MGTPDC); | |
15e376b4 JG |
3769 | } |
3770 | ||
1da177e4 LT |
3771 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
3772 | } | |
9ac98284 | 3773 | |
1da177e4 LT |
3774 | /** |
3775 | * e1000_intr - Interrupt Handler | |
3776 | * @irq: interrupt number | |
3777 | * @data: pointer to a network interface device structure | |
1da177e4 | 3778 | **/ |
64798845 | 3779 | static irqreturn_t e1000_intr(int irq, void *data) |
1da177e4 LT |
3780 | { |
3781 | struct net_device *netdev = data; | |
60490fe0 | 3782 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3783 | struct e1000_hw *hw = &adapter->hw; |
1532ecea | 3784 | u32 icr = er32(ICR); |
c3570acb | 3785 | |
4c11b8ad | 3786 | if (unlikely((!icr))) |
835bb129 JB |
3787 | return IRQ_NONE; /* Not our interrupt */ |
3788 | ||
6cfbd97b | 3789 | /* we might have caused the interrupt, but the above |
4c11b8ad JB |
3790 | * read cleared it, and just in case the driver is |
3791 | * down there is nothing to do so return handled | |
3792 | */ | |
3793 | if (unlikely(test_bit(__E1000_DOWN, &adapter->flags))) | |
3794 | return IRQ_HANDLED; | |
3795 | ||
96838a40 | 3796 | if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { |
1da177e4 | 3797 | hw->get_link_status = 1; |
1314bbf3 AK |
3798 | /* guard against interrupt when we're going down */ |
3799 | if (!test_bit(__E1000_DOWN, &adapter->flags)) | |
a4010afe | 3800 | schedule_delayed_work(&adapter->watchdog_task, 1); |
1da177e4 LT |
3801 | } |
3802 | ||
1532ecea JB |
3803 | /* disable interrupts, without the synchronize_irq bit */ |
3804 | ew32(IMC, ~0); | |
3805 | E1000_WRITE_FLUSH(); | |
3806 | ||
288379f0 | 3807 | if (likely(napi_schedule_prep(&adapter->napi))) { |
835bb129 JB |
3808 | adapter->total_tx_bytes = 0; |
3809 | adapter->total_tx_packets = 0; | |
3810 | adapter->total_rx_bytes = 0; | |
3811 | adapter->total_rx_packets = 0; | |
288379f0 | 3812 | __napi_schedule(&adapter->napi); |
a6c42322 | 3813 | } else { |
90fb5135 | 3814 | /* this really should not happen! if it does it is basically a |
6cfbd97b JK |
3815 | * bug, but not a hard error, so enable ints and continue |
3816 | */ | |
a6c42322 JB |
3817 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
3818 | e1000_irq_enable(adapter); | |
3819 | } | |
1da177e4 | 3820 | |
1da177e4 LT |
3821 | return IRQ_HANDLED; |
3822 | } | |
3823 | ||
1da177e4 LT |
3824 | /** |
3825 | * e1000_clean - NAPI Rx polling callback | |
3826 | * @adapter: board private structure | |
3827 | **/ | |
64798845 | 3828 | static int e1000_clean(struct napi_struct *napi, int budget) |
1da177e4 | 3829 | { |
6cfbd97b JK |
3830 | struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, |
3831 | napi); | |
650b5a5c | 3832 | int tx_clean_complete = 0, work_done = 0; |
581d708e | 3833 | |
650b5a5c | 3834 | tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]); |
581d708e | 3835 | |
650b5a5c | 3836 | adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget); |
581d708e | 3837 | |
650b5a5c | 3838 | if (!tx_clean_complete) |
d2c7ddd6 DM |
3839 | work_done = budget; |
3840 | ||
53e52c72 DM |
3841 | /* If budget not fully consumed, exit the polling mode */ |
3842 | if (work_done < budget) { | |
835bb129 JB |
3843 | if (likely(adapter->itr_setting & 3)) |
3844 | e1000_set_itr(adapter); | |
32b3e08f | 3845 | napi_complete_done(napi, work_done); |
a6c42322 JB |
3846 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
3847 | e1000_irq_enable(adapter); | |
1da177e4 LT |
3848 | } |
3849 | ||
bea3348e | 3850 | return work_done; |
1da177e4 LT |
3851 | } |
3852 | ||
1da177e4 LT |
3853 | /** |
3854 | * e1000_clean_tx_irq - Reclaim resources after transmit completes | |
3855 | * @adapter: board private structure | |
3856 | **/ | |
64798845 JP |
3857 | static bool e1000_clean_tx_irq(struct e1000_adapter *adapter, |
3858 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 3859 | { |
1dc32918 | 3860 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
3861 | struct net_device *netdev = adapter->netdev; |
3862 | struct e1000_tx_desc *tx_desc, *eop_desc; | |
580f321d | 3863 | struct e1000_tx_buffer *buffer_info; |
1da177e4 | 3864 | unsigned int i, eop; |
2a1af5d7 | 3865 | unsigned int count = 0; |
a48954c8 | 3866 | unsigned int total_tx_bytes = 0, total_tx_packets = 0; |
2f66fd36 | 3867 | unsigned int bytes_compl = 0, pkts_compl = 0; |
1da177e4 LT |
3868 | |
3869 | i = tx_ring->next_to_clean; | |
3870 | eop = tx_ring->buffer_info[i].next_to_watch; | |
3871 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
3872 | ||
ccfb342c AD |
3873 | while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && |
3874 | (count < tx_ring->count)) { | |
843f4267 | 3875 | bool cleaned = false; |
837a1dba | 3876 | dma_rmb(); /* read buffer_info after eop_desc */ |
843f4267 | 3877 | for ( ; !cleaned; count++) { |
1da177e4 LT |
3878 | tx_desc = E1000_TX_DESC(*tx_ring, i); |
3879 | buffer_info = &tx_ring->buffer_info[i]; | |
3880 | cleaned = (i == eop); | |
3881 | ||
835bb129 | 3882 | if (cleaned) { |
31c15a2f DN |
3883 | total_tx_packets += buffer_info->segs; |
3884 | total_tx_bytes += buffer_info->bytecount; | |
2f66fd36 OESC |
3885 | if (buffer_info->skb) { |
3886 | bytes_compl += buffer_info->skb->len; | |
3887 | pkts_compl++; | |
3888 | } | |
3889 | ||
835bb129 | 3890 | } |
fd803241 | 3891 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); |
a9ebadd6 | 3892 | tx_desc->upper.data = 0; |
1da177e4 | 3893 | |
a48954c8 JW |
3894 | if (unlikely(++i == tx_ring->count)) |
3895 | i = 0; | |
1da177e4 | 3896 | } |
581d708e | 3897 | |
1da177e4 LT |
3898 | eop = tx_ring->buffer_info[i].next_to_watch; |
3899 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
3900 | } | |
3901 | ||
9eab46b7 DV |
3902 | /* Synchronize with E1000_DESC_UNUSED called from e1000_xmit_frame, |
3903 | * which will reuse the cleaned buffers. | |
3904 | */ | |
3905 | smp_store_release(&tx_ring->next_to_clean, i); | |
1da177e4 | 3906 | |
2f66fd36 OESC |
3907 | netdev_completed_queue(netdev, pkts_compl, bytes_compl); |
3908 | ||
77b2aad5 | 3909 | #define TX_WAKE_THRESHOLD 32 |
843f4267 | 3910 | if (unlikely(count && netif_carrier_ok(netdev) && |
65c7973f JB |
3911 | E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) { |
3912 | /* Make sure that anybody stopping the queue after this | |
3913 | * sees the new next_to_clean. | |
3914 | */ | |
3915 | smp_mb(); | |
cdd7549e JB |
3916 | |
3917 | if (netif_queue_stopped(netdev) && | |
3918 | !(test_bit(__E1000_DOWN, &adapter->flags))) { | |
77b2aad5 | 3919 | netif_wake_queue(netdev); |
fcfb1224 JB |
3920 | ++adapter->restart_queue; |
3921 | } | |
77b2aad5 | 3922 | } |
2648345f | 3923 | |
581d708e | 3924 | if (adapter->detect_tx_hung) { |
2648345f | 3925 | /* Detect a transmit hang in hardware, this serializes the |
6cfbd97b JK |
3926 | * check with the clearing of time_stamp and movement of i |
3927 | */ | |
c3033b01 | 3928 | adapter->detect_tx_hung = false; |
cdd7549e JB |
3929 | if (tx_ring->buffer_info[eop].time_stamp && |
3930 | time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + | |
6cfbd97b | 3931 | (adapter->tx_timeout_factor * HZ)) && |
8e95a202 | 3932 | !(er32(STATUS) & E1000_STATUS_TXOFF)) { |
70b8f1e1 MC |
3933 | |
3934 | /* detected Tx unit hang */ | |
feb8f478 | 3935 | e_err(drv, "Detected Tx Unit Hang\n" |
675ad473 ET |
3936 | " Tx Queue <%lu>\n" |
3937 | " TDH <%x>\n" | |
3938 | " TDT <%x>\n" | |
3939 | " next_to_use <%x>\n" | |
3940 | " next_to_clean <%x>\n" | |
3941 | "buffer_info[next_to_clean]\n" | |
3942 | " time_stamp <%lx>\n" | |
3943 | " next_to_watch <%x>\n" | |
3944 | " jiffies <%lx>\n" | |
3945 | " next_to_watch.status <%x>\n", | |
49a45a06 | 3946 | (unsigned long)(tx_ring - adapter->tx_ring), |
1dc32918 JP |
3947 | readl(hw->hw_addr + tx_ring->tdh), |
3948 | readl(hw->hw_addr + tx_ring->tdt), | |
70b8f1e1 | 3949 | tx_ring->next_to_use, |
392137fa | 3950 | tx_ring->next_to_clean, |
cdd7549e | 3951 | tx_ring->buffer_info[eop].time_stamp, |
70b8f1e1 MC |
3952 | eop, |
3953 | jiffies, | |
3954 | eop_desc->upper.fields.status); | |
b04e36ba | 3955 | e1000_dump(adapter); |
1da177e4 | 3956 | netif_stop_queue(netdev); |
70b8f1e1 | 3957 | } |
1da177e4 | 3958 | } |
835bb129 JB |
3959 | adapter->total_tx_bytes += total_tx_bytes; |
3960 | adapter->total_tx_packets += total_tx_packets; | |
5fe31def AK |
3961 | netdev->stats.tx_bytes += total_tx_bytes; |
3962 | netdev->stats.tx_packets += total_tx_packets; | |
807540ba | 3963 | return count < tx_ring->count; |
1da177e4 LT |
3964 | } |
3965 | ||
3966 | /** | |
3967 | * e1000_rx_checksum - Receive Checksum Offload for 82543 | |
2d7edb92 MC |
3968 | * @adapter: board private structure |
3969 | * @status_err: receive descriptor status and error fields | |
3970 | * @csum: receive descriptor csum field | |
3971 | * @sk_buff: socket buffer with received data | |
1da177e4 | 3972 | **/ |
64798845 JP |
3973 | static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, |
3974 | u32 csum, struct sk_buff *skb) | |
1da177e4 | 3975 | { |
1dc32918 | 3976 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
3977 | u16 status = (u16)status_err; |
3978 | u8 errors = (u8)(status_err >> 24); | |
bc8acf2c ED |
3979 | |
3980 | skb_checksum_none_assert(skb); | |
2d7edb92 | 3981 | |
1da177e4 | 3982 | /* 82543 or newer only */ |
a48954c8 JW |
3983 | if (unlikely(hw->mac_type < e1000_82543)) |
3984 | return; | |
1da177e4 | 3985 | /* Ignore Checksum bit is set */ |
a48954c8 JW |
3986 | if (unlikely(status & E1000_RXD_STAT_IXSM)) |
3987 | return; | |
2d7edb92 | 3988 | /* TCP/UDP checksum error bit is set */ |
96838a40 | 3989 | if (unlikely(errors & E1000_RXD_ERR_TCPE)) { |
1da177e4 | 3990 | /* let the stack verify checksum errors */ |
1da177e4 | 3991 | adapter->hw_csum_err++; |
2d7edb92 MC |
3992 | return; |
3993 | } | |
3994 | /* TCP/UDP Checksum has not been calculated */ | |
1532ecea JB |
3995 | if (!(status & E1000_RXD_STAT_TCPCS)) |
3996 | return; | |
3997 | ||
2d7edb92 MC |
3998 | /* It must be a TCP or UDP packet with a valid checksum */ |
3999 | if (likely(status & E1000_RXD_STAT_TCPCS)) { | |
1da177e4 LT |
4000 | /* TCP checksum is good */ |
4001 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
1da177e4 | 4002 | } |
2d7edb92 | 4003 | adapter->hw_csum_good++; |
1da177e4 LT |
4004 | } |
4005 | ||
edbbb3ca | 4006 | /** |
13809609 | 4007 | * e1000_consume_page - helper function for jumbo Rx path |
edbbb3ca | 4008 | **/ |
93f0afe9 | 4009 | static void e1000_consume_page(struct e1000_rx_buffer *bi, struct sk_buff *skb, |
6cfbd97b | 4010 | u16 length) |
edbbb3ca | 4011 | { |
13809609 | 4012 | bi->rxbuf.page = NULL; |
edbbb3ca JB |
4013 | skb->len += length; |
4014 | skb->data_len += length; | |
ed64b3cc | 4015 | skb->truesize += PAGE_SIZE; |
edbbb3ca JB |
4016 | } |
4017 | ||
4018 | /** | |
4019 | * e1000_receive_skb - helper function to handle rx indications | |
4020 | * @adapter: board private structure | |
4021 | * @status: descriptor status field as written by hardware | |
4022 | * @vlan: descriptor vlan field as written by hardware (no le/be conversion) | |
4023 | * @skb: pointer to sk_buff to be indicated to stack | |
4024 | */ | |
4025 | static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status, | |
4026 | __le16 vlan, struct sk_buff *skb) | |
4027 | { | |
6a08d194 JB |
4028 | skb->protocol = eth_type_trans(skb, adapter->netdev); |
4029 | ||
5622e404 JP |
4030 | if (status & E1000_RXD_STAT_VP) { |
4031 | u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK; | |
4032 | ||
86a9bad3 | 4033 | __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid); |
5622e404 JP |
4034 | } |
4035 | napi_gro_receive(&adapter->napi, skb); | |
edbbb3ca JB |
4036 | } |
4037 | ||
4f0aeb1e FW |
4038 | /** |
4039 | * e1000_tbi_adjust_stats | |
4040 | * @hw: Struct containing variables accessed by shared code | |
4041 | * @frame_len: The length of the frame in question | |
4042 | * @mac_addr: The Ethernet destination address of the frame in question | |
4043 | * | |
4044 | * Adjusts the statistic counters when a frame is accepted by TBI_ACCEPT | |
4045 | */ | |
4046 | static void e1000_tbi_adjust_stats(struct e1000_hw *hw, | |
4047 | struct e1000_hw_stats *stats, | |
4048 | u32 frame_len, const u8 *mac_addr) | |
4049 | { | |
4050 | u64 carry_bit; | |
4051 | ||
4052 | /* First adjust the frame length. */ | |
4053 | frame_len--; | |
4054 | /* We need to adjust the statistics counters, since the hardware | |
4055 | * counters overcount this packet as a CRC error and undercount | |
4056 | * the packet as a good packet | |
4057 | */ | |
4058 | /* This packet should not be counted as a CRC error. */ | |
4059 | stats->crcerrs--; | |
4060 | /* This packet does count as a Good Packet Received. */ | |
4061 | stats->gprc++; | |
4062 | ||
4063 | /* Adjust the Good Octets received counters */ | |
4064 | carry_bit = 0x80000000 & stats->gorcl; | |
4065 | stats->gorcl += frame_len; | |
4066 | /* If the high bit of Gorcl (the low 32 bits of the Good Octets | |
4067 | * Received Count) was one before the addition, | |
4068 | * AND it is zero after, then we lost the carry out, | |
4069 | * need to add one to Gorch (Good Octets Received Count High). | |
4070 | * This could be simplified if all environments supported | |
4071 | * 64-bit integers. | |
4072 | */ | |
4073 | if (carry_bit && ((stats->gorcl & 0x80000000) == 0)) | |
4074 | stats->gorch++; | |
4075 | /* Is this a broadcast or multicast? Check broadcast first, | |
4076 | * since the test for a multicast frame will test positive on | |
4077 | * a broadcast frame. | |
4078 | */ | |
4079 | if (is_broadcast_ether_addr(mac_addr)) | |
4080 | stats->bprc++; | |
4081 | else if (is_multicast_ether_addr(mac_addr)) | |
4082 | stats->mprc++; | |
4083 | ||
4084 | if (frame_len == hw->max_frame_size) { | |
4085 | /* In this case, the hardware has overcounted the number of | |
4086 | * oversize frames. | |
4087 | */ | |
4088 | if (stats->roc > 0) | |
4089 | stats->roc--; | |
4090 | } | |
4091 | ||
4092 | /* Adjust the bin counters when the extra byte put the frame in the | |
4093 | * wrong bin. Remember that the frame_len was adjusted above. | |
4094 | */ | |
4095 | if (frame_len == 64) { | |
4096 | stats->prc64++; | |
4097 | stats->prc127--; | |
4098 | } else if (frame_len == 127) { | |
4099 | stats->prc127++; | |
4100 | stats->prc255--; | |
4101 | } else if (frame_len == 255) { | |
4102 | stats->prc255++; | |
4103 | stats->prc511--; | |
4104 | } else if (frame_len == 511) { | |
4105 | stats->prc511++; | |
4106 | stats->prc1023--; | |
4107 | } else if (frame_len == 1023) { | |
4108 | stats->prc1023++; | |
4109 | stats->prc1522--; | |
4110 | } else if (frame_len == 1522) { | |
4111 | stats->prc1522++; | |
4112 | } | |
4113 | } | |
4114 | ||
2037110c FW |
4115 | static bool e1000_tbi_should_accept(struct e1000_adapter *adapter, |
4116 | u8 status, u8 errors, | |
4117 | u32 length, const u8 *data) | |
4118 | { | |
4119 | struct e1000_hw *hw = &adapter->hw; | |
4120 | u8 last_byte = *(data + length - 1); | |
4121 | ||
4122 | if (TBI_ACCEPT(hw, status, errors, length, last_byte)) { | |
4123 | unsigned long irq_flags; | |
4124 | ||
4125 | spin_lock_irqsave(&adapter->stats_lock, irq_flags); | |
4126 | e1000_tbi_adjust_stats(hw, &adapter->stats, length, data); | |
4127 | spin_unlock_irqrestore(&adapter->stats_lock, irq_flags); | |
4128 | ||
4129 | return true; | |
4130 | } | |
4131 | ||
4132 | return false; | |
4133 | } | |
4134 | ||
2b294b18 FW |
4135 | static struct sk_buff *e1000_alloc_rx_skb(struct e1000_adapter *adapter, |
4136 | unsigned int bufsz) | |
4137 | { | |
67fd893e | 4138 | struct sk_buff *skb = napi_alloc_skb(&adapter->napi, bufsz); |
2b294b18 FW |
4139 | |
4140 | if (unlikely(!skb)) | |
4141 | adapter->alloc_rx_buff_failed++; | |
4142 | return skb; | |
4143 | } | |
4144 | ||
edbbb3ca JB |
4145 | /** |
4146 | * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy | |
4147 | * @adapter: board private structure | |
4148 | * @rx_ring: ring to clean | |
4149 | * @work_done: amount of napi work completed this call | |
4150 | * @work_to_do: max amount of work allowed for this call to do | |
4151 | * | |
4152 | * the return value indicates whether actual cleaning was done, there | |
4153 | * is no guarantee that everything was cleaned | |
4154 | */ | |
4155 | static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter, | |
4156 | struct e1000_rx_ring *rx_ring, | |
4157 | int *work_done, int work_to_do) | |
4158 | { | |
edbbb3ca JB |
4159 | struct net_device *netdev = adapter->netdev; |
4160 | struct pci_dev *pdev = adapter->pdev; | |
4161 | struct e1000_rx_desc *rx_desc, *next_rxd; | |
93f0afe9 | 4162 | struct e1000_rx_buffer *buffer_info, *next_buffer; |
edbbb3ca JB |
4163 | u32 length; |
4164 | unsigned int i; | |
4165 | int cleaned_count = 0; | |
4166 | bool cleaned = false; | |
a48954c8 | 4167 | unsigned int total_rx_bytes = 0, total_rx_packets = 0; |
edbbb3ca JB |
4168 | |
4169 | i = rx_ring->next_to_clean; | |
4170 | rx_desc = E1000_RX_DESC(*rx_ring, i); | |
4171 | buffer_info = &rx_ring->buffer_info[i]; | |
4172 | ||
4173 | while (rx_desc->status & E1000_RXD_STAT_DD) { | |
4174 | struct sk_buff *skb; | |
4175 | u8 status; | |
4176 | ||
4177 | if (*work_done >= work_to_do) | |
4178 | break; | |
4179 | (*work_done)++; | |
837a1dba | 4180 | dma_rmb(); /* read descriptor and rx_buffer_info after status DD */ |
edbbb3ca JB |
4181 | |
4182 | status = rx_desc->status; | |
edbbb3ca | 4183 | |
a48954c8 JW |
4184 | if (++i == rx_ring->count) |
4185 | i = 0; | |
4186 | ||
edbbb3ca JB |
4187 | next_rxd = E1000_RX_DESC(*rx_ring, i); |
4188 | prefetch(next_rxd); | |
4189 | ||
4190 | next_buffer = &rx_ring->buffer_info[i]; | |
4191 | ||
4192 | cleaned = true; | |
4193 | cleaned_count++; | |
b16f53be | 4194 | dma_unmap_page(&pdev->dev, buffer_info->dma, |
93f0afe9 | 4195 | adapter->rx_buffer_len, DMA_FROM_DEVICE); |
edbbb3ca JB |
4196 | buffer_info->dma = 0; |
4197 | ||
4198 | length = le16_to_cpu(rx_desc->length); | |
4199 | ||
4200 | /* errors is only valid for DD + EOP descriptors */ | |
4201 | if (unlikely((status & E1000_RXD_STAT_EOP) && | |
4202 | (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) { | |
13809609 | 4203 | u8 *mapped = page_address(buffer_info->rxbuf.page); |
2037110c FW |
4204 | |
4205 | if (e1000_tbi_should_accept(adapter, status, | |
4206 | rx_desc->errors, | |
4207 | length, mapped)) { | |
edbbb3ca | 4208 | length--; |
2037110c FW |
4209 | } else if (netdev->features & NETIF_F_RXALL) { |
4210 | goto process_skb; | |
edbbb3ca | 4211 | } else { |
edbbb3ca | 4212 | /* an error means any chain goes out the window |
6cfbd97b JK |
4213 | * too |
4214 | */ | |
edbbb3ca JB |
4215 | if (rx_ring->rx_skb_top) |
4216 | dev_kfree_skb(rx_ring->rx_skb_top); | |
4217 | rx_ring->rx_skb_top = NULL; | |
4218 | goto next_desc; | |
4219 | } | |
4220 | } | |
4221 | ||
4222 | #define rxtop rx_ring->rx_skb_top | |
e825b731 | 4223 | process_skb: |
edbbb3ca JB |
4224 | if (!(status & E1000_RXD_STAT_EOP)) { |
4225 | /* this descriptor is only the beginning (or middle) */ | |
4226 | if (!rxtop) { | |
4227 | /* this is the beginning of a chain */ | |
de591c78 | 4228 | rxtop = napi_get_frags(&adapter->napi); |
13809609 FW |
4229 | if (!rxtop) |
4230 | break; | |
4231 | ||
4232 | skb_fill_page_desc(rxtop, 0, | |
4233 | buffer_info->rxbuf.page, | |
6cfbd97b | 4234 | 0, length); |
edbbb3ca JB |
4235 | } else { |
4236 | /* this is the middle of a chain */ | |
4237 | skb_fill_page_desc(rxtop, | |
4238 | skb_shinfo(rxtop)->nr_frags, | |
13809609 | 4239 | buffer_info->rxbuf.page, 0, length); |
edbbb3ca JB |
4240 | } |
4241 | e1000_consume_page(buffer_info, rxtop, length); | |
4242 | goto next_desc; | |
4243 | } else { | |
4244 | if (rxtop) { | |
4245 | /* end of the chain */ | |
4246 | skb_fill_page_desc(rxtop, | |
4247 | skb_shinfo(rxtop)->nr_frags, | |
13809609 | 4248 | buffer_info->rxbuf.page, 0, length); |
edbbb3ca JB |
4249 | skb = rxtop; |
4250 | rxtop = NULL; | |
4251 | e1000_consume_page(buffer_info, skb, length); | |
4252 | } else { | |
13809609 | 4253 | struct page *p; |
edbbb3ca | 4254 | /* no chain, got EOP, this buf is the packet |
6cfbd97b JK |
4255 | * copybreak to save the put_page/alloc_page |
4256 | */ | |
13809609 | 4257 | p = buffer_info->rxbuf.page; |
de591c78 | 4258 | if (length <= copybreak) { |
edbbb3ca | 4259 | u8 *vaddr; |
13809609 | 4260 | |
de591c78 FW |
4261 | if (likely(!(netdev->features & NETIF_F_RXFCS))) |
4262 | length -= 4; | |
4263 | skb = e1000_alloc_rx_skb(adapter, | |
4264 | length); | |
4265 | if (!skb) | |
4266 | break; | |
4267 | ||
13809609 | 4268 | vaddr = kmap_atomic(p); |
6cfbd97b JK |
4269 | memcpy(skb_tail_pointer(skb), vaddr, |
4270 | length); | |
4679026d | 4271 | kunmap_atomic(vaddr); |
edbbb3ca | 4272 | /* re-use the page, so don't erase |
13809609 | 4273 | * buffer_info->rxbuf.page |
6cfbd97b | 4274 | */ |
edbbb3ca | 4275 | skb_put(skb, length); |
de591c78 FW |
4276 | e1000_rx_checksum(adapter, |
4277 | status | rx_desc->errors << 24, | |
4278 | le16_to_cpu(rx_desc->csum), skb); | |
4279 | ||
4280 | total_rx_bytes += skb->len; | |
4281 | total_rx_packets++; | |
4282 | ||
4283 | e1000_receive_skb(adapter, status, | |
4284 | rx_desc->special, skb); | |
4285 | goto next_desc; | |
edbbb3ca | 4286 | } else { |
de591c78 FW |
4287 | skb = napi_get_frags(&adapter->napi); |
4288 | if (!skb) { | |
4289 | adapter->alloc_rx_buff_failed++; | |
4290 | break; | |
4291 | } | |
13809609 | 4292 | skb_fill_page_desc(skb, 0, p, 0, |
6cfbd97b | 4293 | length); |
edbbb3ca | 4294 | e1000_consume_page(buffer_info, skb, |
6cfbd97b | 4295 | length); |
edbbb3ca JB |
4296 | } |
4297 | } | |
4298 | } | |
4299 | ||
4300 | /* Receive Checksum Offload XXX recompute due to CRC strip? */ | |
4301 | e1000_rx_checksum(adapter, | |
6cfbd97b JK |
4302 | (u32)(status) | |
4303 | ((u32)(rx_desc->errors) << 24), | |
4304 | le16_to_cpu(rx_desc->csum), skb); | |
edbbb3ca | 4305 | |
b0d1562c BG |
4306 | total_rx_bytes += (skb->len - 4); /* don't count FCS */ |
4307 | if (likely(!(netdev->features & NETIF_F_RXFCS))) | |
4308 | pskb_trim(skb, skb->len - 4); | |
edbbb3ca JB |
4309 | total_rx_packets++; |
4310 | ||
de591c78 FW |
4311 | if (status & E1000_RXD_STAT_VP) { |
4312 | __le16 vlan = rx_desc->special; | |
4313 | u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK; | |
4314 | ||
4315 | __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid); | |
edbbb3ca JB |
4316 | } |
4317 | ||
de591c78 | 4318 | napi_gro_frags(&adapter->napi); |
edbbb3ca JB |
4319 | |
4320 | next_desc: | |
4321 | rx_desc->status = 0; | |
4322 | ||
4323 | /* return some buffers to hardware, one at a time is too slow */ | |
4324 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
4325 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
4326 | cleaned_count = 0; | |
4327 | } | |
4328 | ||
4329 | /* use prefetched values */ | |
4330 | rx_desc = next_rxd; | |
4331 | buffer_info = next_buffer; | |
4332 | } | |
4333 | rx_ring->next_to_clean = i; | |
4334 | ||
4335 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
4336 | if (cleaned_count) | |
4337 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
4338 | ||
4339 | adapter->total_rx_packets += total_rx_packets; | |
4340 | adapter->total_rx_bytes += total_rx_bytes; | |
5fe31def AK |
4341 | netdev->stats.rx_bytes += total_rx_bytes; |
4342 | netdev->stats.rx_packets += total_rx_packets; | |
edbbb3ca JB |
4343 | return cleaned; |
4344 | } | |
4345 | ||
6cfbd97b | 4346 | /* this should improve performance for small packets with large amounts |
57bf6eef JP |
4347 | * of reassembly being done in the stack |
4348 | */ | |
2b294b18 | 4349 | static struct sk_buff *e1000_copybreak(struct e1000_adapter *adapter, |
93f0afe9 | 4350 | struct e1000_rx_buffer *buffer_info, |
2b294b18 | 4351 | u32 length, const void *data) |
57bf6eef | 4352 | { |
2b294b18 | 4353 | struct sk_buff *skb; |
57bf6eef JP |
4354 | |
4355 | if (length > copybreak) | |
2b294b18 | 4356 | return NULL; |
57bf6eef | 4357 | |
2b294b18 FW |
4358 | skb = e1000_alloc_rx_skb(adapter, length); |
4359 | if (!skb) | |
4360 | return NULL; | |
4361 | ||
4362 | dma_sync_single_for_cpu(&adapter->pdev->dev, buffer_info->dma, | |
4363 | length, DMA_FROM_DEVICE); | |
4364 | ||
4365 | memcpy(skb_put(skb, length), data, length); | |
57bf6eef | 4366 | |
2b294b18 | 4367 | return skb; |
57bf6eef JP |
4368 | } |
4369 | ||
1da177e4 | 4370 | /** |
2d7edb92 | 4371 | * e1000_clean_rx_irq - Send received data up the network stack; legacy |
1da177e4 | 4372 | * @adapter: board private structure |
edbbb3ca JB |
4373 | * @rx_ring: ring to clean |
4374 | * @work_done: amount of napi work completed this call | |
4375 | * @work_to_do: max amount of work allowed for this call to do | |
4376 | */ | |
64798845 JP |
4377 | static bool e1000_clean_rx_irq(struct e1000_adapter *adapter, |
4378 | struct e1000_rx_ring *rx_ring, | |
4379 | int *work_done, int work_to_do) | |
1da177e4 | 4380 | { |
1da177e4 LT |
4381 | struct net_device *netdev = adapter->netdev; |
4382 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f | 4383 | struct e1000_rx_desc *rx_desc, *next_rxd; |
93f0afe9 | 4384 | struct e1000_rx_buffer *buffer_info, *next_buffer; |
406874a7 | 4385 | u32 length; |
1da177e4 | 4386 | unsigned int i; |
72d64a43 | 4387 | int cleaned_count = 0; |
c3033b01 | 4388 | bool cleaned = false; |
a48954c8 | 4389 | unsigned int total_rx_bytes = 0, total_rx_packets = 0; |
1da177e4 LT |
4390 | |
4391 | i = rx_ring->next_to_clean; | |
4392 | rx_desc = E1000_RX_DESC(*rx_ring, i); | |
b92ff8ee | 4393 | buffer_info = &rx_ring->buffer_info[i]; |
1da177e4 | 4394 | |
b92ff8ee | 4395 | while (rx_desc->status & E1000_RXD_STAT_DD) { |
24f476ee | 4396 | struct sk_buff *skb; |
13809609 | 4397 | u8 *data; |
a292ca6e | 4398 | u8 status; |
90fb5135 | 4399 | |
96838a40 | 4400 | if (*work_done >= work_to_do) |
1da177e4 LT |
4401 | break; |
4402 | (*work_done)++; | |
837a1dba | 4403 | dma_rmb(); /* read descriptor and rx_buffer_info after status DD */ |
c3570acb | 4404 | |
a292ca6e | 4405 | status = rx_desc->status; |
2b294b18 | 4406 | length = le16_to_cpu(rx_desc->length); |
86c3d59f | 4407 | |
13809609 FW |
4408 | data = buffer_info->rxbuf.data; |
4409 | prefetch(data); | |
4410 | skb = e1000_copybreak(adapter, buffer_info, length, data); | |
2b294b18 | 4411 | if (!skb) { |
13809609 FW |
4412 | unsigned int frag_len = e1000_frag_len(adapter); |
4413 | ||
4414 | skb = build_skb(data - E1000_HEADROOM, frag_len); | |
4415 | if (!skb) { | |
4416 | adapter->alloc_rx_buff_failed++; | |
4417 | break; | |
4418 | } | |
4419 | ||
4420 | skb_reserve(skb, E1000_HEADROOM); | |
2b294b18 | 4421 | dma_unmap_single(&pdev->dev, buffer_info->dma, |
93f0afe9 FW |
4422 | adapter->rx_buffer_len, |
4423 | DMA_FROM_DEVICE); | |
2b294b18 | 4424 | buffer_info->dma = 0; |
13809609 | 4425 | buffer_info->rxbuf.data = NULL; |
2b294b18 | 4426 | } |
30320be8 | 4427 | |
a48954c8 JW |
4428 | if (++i == rx_ring->count) |
4429 | i = 0; | |
4430 | ||
86c3d59f | 4431 | next_rxd = E1000_RX_DESC(*rx_ring, i); |
30320be8 JK |
4432 | prefetch(next_rxd); |
4433 | ||
86c3d59f | 4434 | next_buffer = &rx_ring->buffer_info[i]; |
86c3d59f | 4435 | |
c3033b01 | 4436 | cleaned = true; |
72d64a43 | 4437 | cleaned_count++; |
1da177e4 | 4438 | |
ea30e119 | 4439 | /* !EOP means multiple descriptors were used to store a single |
40a14dea JB |
4440 | * packet, if thats the case we need to toss it. In fact, we |
4441 | * to toss every packet with the EOP bit clear and the next | |
4442 | * frame that _does_ have the EOP bit set, as it is by | |
4443 | * definition only a frame fragment | |
4444 | */ | |
4445 | if (unlikely(!(status & E1000_RXD_STAT_EOP))) | |
4446 | adapter->discarding = true; | |
4447 | ||
4448 | if (adapter->discarding) { | |
a1415ee6 | 4449 | /* All receives must fit into a single buffer */ |
2037110c | 4450 | netdev_dbg(netdev, "Receive packet consumed multiple buffers\n"); |
2b294b18 | 4451 | dev_kfree_skb(skb); |
40a14dea JB |
4452 | if (status & E1000_RXD_STAT_EOP) |
4453 | adapter->discarding = false; | |
1da177e4 LT |
4454 | goto next_desc; |
4455 | } | |
4456 | ||
96838a40 | 4457 | if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) { |
2037110c FW |
4458 | if (e1000_tbi_should_accept(adapter, status, |
4459 | rx_desc->errors, | |
13809609 | 4460 | length, data)) { |
1da177e4 | 4461 | length--; |
2037110c FW |
4462 | } else if (netdev->features & NETIF_F_RXALL) { |
4463 | goto process_skb; | |
1da177e4 | 4464 | } else { |
2b294b18 | 4465 | dev_kfree_skb(skb); |
1da177e4 LT |
4466 | goto next_desc; |
4467 | } | |
1cb5821f | 4468 | } |
1da177e4 | 4469 | |
e825b731 | 4470 | process_skb: |
b0d1562c | 4471 | total_rx_bytes += (length - 4); /* don't count FCS */ |
835bb129 JB |
4472 | total_rx_packets++; |
4473 | ||
b0d1562c BG |
4474 | if (likely(!(netdev->features & NETIF_F_RXFCS))) |
4475 | /* adjust length to remove Ethernet CRC, this must be | |
4476 | * done after the TBI_ACCEPT workaround above | |
4477 | */ | |
4478 | length -= 4; | |
4479 | ||
13809609 | 4480 | if (buffer_info->rxbuf.data == NULL) |
2b294b18 FW |
4481 | skb_put(skb, length); |
4482 | else /* copybreak skb */ | |
4483 | skb_trim(skb, length); | |
1da177e4 LT |
4484 | |
4485 | /* Receive Checksum Offload */ | |
a292ca6e | 4486 | e1000_rx_checksum(adapter, |
406874a7 JP |
4487 | (u32)(status) | |
4488 | ((u32)(rx_desc->errors) << 24), | |
c3d7a3a4 | 4489 | le16_to_cpu(rx_desc->csum), skb); |
96838a40 | 4490 | |
edbbb3ca | 4491 | e1000_receive_skb(adapter, status, rx_desc->special, skb); |
c3570acb | 4492 | |
1da177e4 LT |
4493 | next_desc: |
4494 | rx_desc->status = 0; | |
1da177e4 | 4495 | |
72d64a43 JK |
4496 | /* return some buffers to hardware, one at a time is too slow */ |
4497 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
4498 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
4499 | cleaned_count = 0; | |
4500 | } | |
4501 | ||
30320be8 | 4502 | /* use prefetched values */ |
86c3d59f JB |
4503 | rx_desc = next_rxd; |
4504 | buffer_info = next_buffer; | |
1da177e4 | 4505 | } |
1da177e4 | 4506 | rx_ring->next_to_clean = i; |
72d64a43 JK |
4507 | |
4508 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
4509 | if (cleaned_count) | |
4510 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
2d7edb92 | 4511 | |
835bb129 JB |
4512 | adapter->total_rx_packets += total_rx_packets; |
4513 | adapter->total_rx_bytes += total_rx_bytes; | |
5fe31def AK |
4514 | netdev->stats.rx_bytes += total_rx_bytes; |
4515 | netdev->stats.rx_packets += total_rx_packets; | |
2d7edb92 MC |
4516 | return cleaned; |
4517 | } | |
4518 | ||
edbbb3ca JB |
4519 | /** |
4520 | * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers | |
4521 | * @adapter: address of board private structure | |
4522 | * @rx_ring: pointer to receive ring structure | |
4523 | * @cleaned_count: number of buffers to allocate this pass | |
4524 | **/ | |
edbbb3ca JB |
4525 | static void |
4526 | e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter, | |
6cfbd97b | 4527 | struct e1000_rx_ring *rx_ring, int cleaned_count) |
edbbb3ca | 4528 | { |
edbbb3ca JB |
4529 | struct pci_dev *pdev = adapter->pdev; |
4530 | struct e1000_rx_desc *rx_desc; | |
93f0afe9 | 4531 | struct e1000_rx_buffer *buffer_info; |
edbbb3ca | 4532 | unsigned int i; |
edbbb3ca JB |
4533 | |
4534 | i = rx_ring->next_to_use; | |
4535 | buffer_info = &rx_ring->buffer_info[i]; | |
4536 | ||
4537 | while (cleaned_count--) { | |
edbbb3ca | 4538 | /* allocate a new page if necessary */ |
13809609 FW |
4539 | if (!buffer_info->rxbuf.page) { |
4540 | buffer_info->rxbuf.page = alloc_page(GFP_ATOMIC); | |
4541 | if (unlikely(!buffer_info->rxbuf.page)) { | |
edbbb3ca JB |
4542 | adapter->alloc_rx_buff_failed++; |
4543 | break; | |
4544 | } | |
4545 | } | |
4546 | ||
b5abb028 | 4547 | if (!buffer_info->dma) { |
b16f53be | 4548 | buffer_info->dma = dma_map_page(&pdev->dev, |
13809609 FW |
4549 | buffer_info->rxbuf.page, 0, |
4550 | adapter->rx_buffer_len, | |
b16f53be NN |
4551 | DMA_FROM_DEVICE); |
4552 | if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { | |
13809609 FW |
4553 | put_page(buffer_info->rxbuf.page); |
4554 | buffer_info->rxbuf.page = NULL; | |
b5abb028 AB |
4555 | buffer_info->dma = 0; |
4556 | adapter->alloc_rx_buff_failed++; | |
13809609 | 4557 | break; |
b5abb028 AB |
4558 | } |
4559 | } | |
edbbb3ca JB |
4560 | |
4561 | rx_desc = E1000_RX_DESC(*rx_ring, i); | |
4562 | rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
4563 | ||
4564 | if (unlikely(++i == rx_ring->count)) | |
4565 | i = 0; | |
4566 | buffer_info = &rx_ring->buffer_info[i]; | |
4567 | } | |
4568 | ||
4569 | if (likely(rx_ring->next_to_use != i)) { | |
4570 | rx_ring->next_to_use = i; | |
4571 | if (unlikely(i-- == 0)) | |
4572 | i = (rx_ring->count - 1); | |
4573 | ||
4574 | /* Force memory writes to complete before letting h/w | |
4575 | * know there are new descriptors to fetch. (Only | |
4576 | * applicable for weak-ordered memory model archs, | |
6cfbd97b JK |
4577 | * such as IA-64). |
4578 | */ | |
edbbb3ca JB |
4579 | wmb(); |
4580 | writel(i, adapter->hw.hw_addr + rx_ring->rdt); | |
4581 | } | |
4582 | } | |
4583 | ||
1da177e4 | 4584 | /** |
2d7edb92 | 4585 | * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended |
1da177e4 LT |
4586 | * @adapter: address of board private structure |
4587 | **/ | |
64798845 JP |
4588 | static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
4589 | struct e1000_rx_ring *rx_ring, | |
4590 | int cleaned_count) | |
1da177e4 | 4591 | { |
1dc32918 | 4592 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
4593 | struct pci_dev *pdev = adapter->pdev; |
4594 | struct e1000_rx_desc *rx_desc; | |
93f0afe9 | 4595 | struct e1000_rx_buffer *buffer_info; |
2648345f | 4596 | unsigned int i; |
89d71a66 | 4597 | unsigned int bufsz = adapter->rx_buffer_len; |
1da177e4 LT |
4598 | |
4599 | i = rx_ring->next_to_use; | |
4600 | buffer_info = &rx_ring->buffer_info[i]; | |
4601 | ||
a292ca6e | 4602 | while (cleaned_count--) { |
13809609 FW |
4603 | void *data; |
4604 | ||
4605 | if (buffer_info->rxbuf.data) | |
2b294b18 | 4606 | goto skip; |
a292ca6e | 4607 | |
13809609 FW |
4608 | data = e1000_alloc_frag(adapter); |
4609 | if (!data) { | |
1da177e4 | 4610 | /* Better luck next round */ |
72d64a43 | 4611 | adapter->alloc_rx_buff_failed++; |
1da177e4 LT |
4612 | break; |
4613 | } | |
4614 | ||
2648345f | 4615 | /* Fix for errata 23, can't cross 64kB boundary */ |
13809609 FW |
4616 | if (!e1000_check_64k_bound(adapter, data, bufsz)) { |
4617 | void *olddata = data; | |
feb8f478 | 4618 | e_err(rx_err, "skb align check failed: %u bytes at " |
13809609 | 4619 | "%p\n", bufsz, data); |
2648345f | 4620 | /* Try again, without freeing the previous */ |
13809609 | 4621 | data = e1000_alloc_frag(adapter); |
2648345f | 4622 | /* Failed allocation, critical failure */ |
13809609 | 4623 | if (!data) { |
6bf93ba8 | 4624 | skb_free_frag(olddata); |
edbbb3ca | 4625 | adapter->alloc_rx_buff_failed++; |
1da177e4 LT |
4626 | break; |
4627 | } | |
2648345f | 4628 | |
13809609 | 4629 | if (!e1000_check_64k_bound(adapter, data, bufsz)) { |
1da177e4 | 4630 | /* give up */ |
6bf93ba8 AD |
4631 | skb_free_frag(data); |
4632 | skb_free_frag(olddata); | |
edbbb3ca | 4633 | adapter->alloc_rx_buff_failed++; |
13809609 | 4634 | break; |
1da177e4 | 4635 | } |
ca6f7224 CH |
4636 | |
4637 | /* Use new allocation */ | |
6bf93ba8 | 4638 | skb_free_frag(olddata); |
1da177e4 | 4639 | } |
b16f53be | 4640 | buffer_info->dma = dma_map_single(&pdev->dev, |
13809609 | 4641 | data, |
93f0afe9 | 4642 | adapter->rx_buffer_len, |
b16f53be NN |
4643 | DMA_FROM_DEVICE); |
4644 | if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { | |
6bf93ba8 | 4645 | skb_free_frag(data); |
b5abb028 AB |
4646 | buffer_info->dma = 0; |
4647 | adapter->alloc_rx_buff_failed++; | |
13809609 | 4648 | break; |
b5abb028 | 4649 | } |
1da177e4 | 4650 | |
6cfbd97b | 4651 | /* XXX if it was allocated cleanly it will never map to a |
edbbb3ca JB |
4652 | * boundary crossing |
4653 | */ | |
4654 | ||
2648345f MC |
4655 | /* Fix for errata 23, can't cross 64kB boundary */ |
4656 | if (!e1000_check_64k_bound(adapter, | |
4657 | (void *)(unsigned long)buffer_info->dma, | |
4658 | adapter->rx_buffer_len)) { | |
feb8f478 ET |
4659 | e_err(rx_err, "dma align check failed: %u bytes at " |
4660 | "%p\n", adapter->rx_buffer_len, | |
675ad473 | 4661 | (void *)(unsigned long)buffer_info->dma); |
1da177e4 | 4662 | |
b16f53be | 4663 | dma_unmap_single(&pdev->dev, buffer_info->dma, |
1da177e4 | 4664 | adapter->rx_buffer_len, |
b16f53be | 4665 | DMA_FROM_DEVICE); |
13809609 | 4666 | |
6bf93ba8 | 4667 | skb_free_frag(data); |
13809609 | 4668 | buffer_info->rxbuf.data = NULL; |
679be3ba | 4669 | buffer_info->dma = 0; |
1da177e4 | 4670 | |
edbbb3ca | 4671 | adapter->alloc_rx_buff_failed++; |
13809609 | 4672 | break; |
1da177e4 | 4673 | } |
13809609 FW |
4674 | buffer_info->rxbuf.data = data; |
4675 | skip: | |
1da177e4 LT |
4676 | rx_desc = E1000_RX_DESC(*rx_ring, i); |
4677 | rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
4678 | ||
96838a40 JB |
4679 | if (unlikely(++i == rx_ring->count)) |
4680 | i = 0; | |
1da177e4 LT |
4681 | buffer_info = &rx_ring->buffer_info[i]; |
4682 | } | |
4683 | ||
b92ff8ee JB |
4684 | if (likely(rx_ring->next_to_use != i)) { |
4685 | rx_ring->next_to_use = i; | |
4686 | if (unlikely(i-- == 0)) | |
4687 | i = (rx_ring->count - 1); | |
4688 | ||
4689 | /* Force memory writes to complete before letting h/w | |
4690 | * know there are new descriptors to fetch. (Only | |
4691 | * applicable for weak-ordered memory model archs, | |
6cfbd97b JK |
4692 | * such as IA-64). |
4693 | */ | |
b92ff8ee | 4694 | wmb(); |
1dc32918 | 4695 | writel(i, hw->hw_addr + rx_ring->rdt); |
b92ff8ee | 4696 | } |
1da177e4 LT |
4697 | } |
4698 | ||
4699 | /** | |
4700 | * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers. | |
4701 | * @adapter: | |
4702 | **/ | |
64798845 | 4703 | static void e1000_smartspeed(struct e1000_adapter *adapter) |
1da177e4 | 4704 | { |
1dc32918 | 4705 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
4706 | u16 phy_status; |
4707 | u16 phy_ctrl; | |
1da177e4 | 4708 | |
1dc32918 JP |
4709 | if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg || |
4710 | !(hw->autoneg_advertised & ADVERTISE_1000_FULL)) | |
1da177e4 LT |
4711 | return; |
4712 | ||
96838a40 | 4713 | if (adapter->smartspeed == 0) { |
1da177e4 | 4714 | /* If Master/Slave config fault is asserted twice, |
6cfbd97b JK |
4715 | * we assume back-to-back |
4716 | */ | |
1dc32918 | 4717 | e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status); |
a48954c8 JW |
4718 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) |
4719 | return; | |
1dc32918 | 4720 | e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status); |
a48954c8 JW |
4721 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) |
4722 | return; | |
1dc32918 | 4723 | e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl); |
96838a40 | 4724 | if (phy_ctrl & CR_1000T_MS_ENABLE) { |
1da177e4 | 4725 | phy_ctrl &= ~CR_1000T_MS_ENABLE; |
1dc32918 | 4726 | e1000_write_phy_reg(hw, PHY_1000T_CTRL, |
1da177e4 LT |
4727 | phy_ctrl); |
4728 | adapter->smartspeed++; | |
1dc32918 JP |
4729 | if (!e1000_phy_setup_autoneg(hw) && |
4730 | !e1000_read_phy_reg(hw, PHY_CTRL, | |
6cfbd97b | 4731 | &phy_ctrl)) { |
1da177e4 LT |
4732 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | |
4733 | MII_CR_RESTART_AUTO_NEG); | |
1dc32918 | 4734 | e1000_write_phy_reg(hw, PHY_CTRL, |
1da177e4 LT |
4735 | phy_ctrl); |
4736 | } | |
4737 | } | |
4738 | return; | |
96838a40 | 4739 | } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) { |
1da177e4 | 4740 | /* If still no link, perhaps using 2/3 pair cable */ |
1dc32918 | 4741 | e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl); |
1da177e4 | 4742 | phy_ctrl |= CR_1000T_MS_ENABLE; |
1dc32918 JP |
4743 | e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl); |
4744 | if (!e1000_phy_setup_autoneg(hw) && | |
4745 | !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) { | |
1da177e4 LT |
4746 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | |
4747 | MII_CR_RESTART_AUTO_NEG); | |
1dc32918 | 4748 | e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl); |
1da177e4 LT |
4749 | } |
4750 | } | |
4751 | /* Restart process after E1000_SMARTSPEED_MAX iterations */ | |
96838a40 | 4752 | if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX) |
1da177e4 LT |
4753 | adapter->smartspeed = 0; |
4754 | } | |
4755 | ||
4756 | /** | |
4757 | * e1000_ioctl - | |
4758 | * @netdev: | |
4759 | * @ifreq: | |
4760 | * @cmd: | |
4761 | **/ | |
64798845 | 4762 | static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) |
1da177e4 LT |
4763 | { |
4764 | switch (cmd) { | |
4765 | case SIOCGMIIPHY: | |
4766 | case SIOCGMIIREG: | |
4767 | case SIOCSMIIREG: | |
4768 | return e1000_mii_ioctl(netdev, ifr, cmd); | |
4769 | default: | |
4770 | return -EOPNOTSUPP; | |
4771 | } | |
4772 | } | |
4773 | ||
4774 | /** | |
4775 | * e1000_mii_ioctl - | |
4776 | * @netdev: | |
4777 | * @ifreq: | |
4778 | * @cmd: | |
4779 | **/ | |
64798845 JP |
4780 | static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, |
4781 | int cmd) | |
1da177e4 | 4782 | { |
60490fe0 | 4783 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 4784 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
4785 | struct mii_ioctl_data *data = if_mii(ifr); |
4786 | int retval; | |
406874a7 | 4787 | u16 mii_reg; |
97876fc6 | 4788 | unsigned long flags; |
1da177e4 | 4789 | |
1dc32918 | 4790 | if (hw->media_type != e1000_media_type_copper) |
1da177e4 LT |
4791 | return -EOPNOTSUPP; |
4792 | ||
4793 | switch (cmd) { | |
4794 | case SIOCGMIIPHY: | |
1dc32918 | 4795 | data->phy_id = hw->phy_addr; |
1da177e4 LT |
4796 | break; |
4797 | case SIOCGMIIREG: | |
97876fc6 | 4798 | spin_lock_irqsave(&adapter->stats_lock, flags); |
1dc32918 | 4799 | if (e1000_read_phy_reg(hw, data->reg_num & 0x1F, |
97876fc6 MC |
4800 | &data->val_out)) { |
4801 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4802 | return -EIO; |
97876fc6 MC |
4803 | } |
4804 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 LT |
4805 | break; |
4806 | case SIOCSMIIREG: | |
96838a40 | 4807 | if (data->reg_num & ~(0x1F)) |
1da177e4 LT |
4808 | return -EFAULT; |
4809 | mii_reg = data->val_in; | |
97876fc6 | 4810 | spin_lock_irqsave(&adapter->stats_lock, flags); |
1dc32918 | 4811 | if (e1000_write_phy_reg(hw, data->reg_num, |
97876fc6 MC |
4812 | mii_reg)) { |
4813 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4814 | return -EIO; |
97876fc6 | 4815 | } |
f0163ac4 | 4816 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
1dc32918 | 4817 | if (hw->media_type == e1000_media_type_copper) { |
1da177e4 LT |
4818 | switch (data->reg_num) { |
4819 | case PHY_CTRL: | |
96838a40 | 4820 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4821 | break; |
96838a40 | 4822 | if (mii_reg & MII_CR_AUTO_NEG_EN) { |
1dc32918 JP |
4823 | hw->autoneg = 1; |
4824 | hw->autoneg_advertised = 0x2F; | |
1da177e4 | 4825 | } else { |
14ad2513 | 4826 | u32 speed; |
1da177e4 | 4827 | if (mii_reg & 0x40) |
14ad2513 | 4828 | speed = SPEED_1000; |
1da177e4 | 4829 | else if (mii_reg & 0x2000) |
14ad2513 | 4830 | speed = SPEED_100; |
1da177e4 | 4831 | else |
14ad2513 DD |
4832 | speed = SPEED_10; |
4833 | retval = e1000_set_spd_dplx( | |
4834 | adapter, speed, | |
4835 | ((mii_reg & 0x100) | |
4836 | ? DUPLEX_FULL : | |
4837 | DUPLEX_HALF)); | |
f0163ac4 | 4838 | if (retval) |
1da177e4 LT |
4839 | return retval; |
4840 | } | |
2db10a08 AK |
4841 | if (netif_running(adapter->netdev)) |
4842 | e1000_reinit_locked(adapter); | |
4843 | else | |
1da177e4 LT |
4844 | e1000_reset(adapter); |
4845 | break; | |
4846 | case M88E1000_PHY_SPEC_CTRL: | |
4847 | case M88E1000_EXT_PHY_SPEC_CTRL: | |
1dc32918 | 4848 | if (e1000_phy_reset(hw)) |
1da177e4 LT |
4849 | return -EIO; |
4850 | break; | |
4851 | } | |
4852 | } else { | |
4853 | switch (data->reg_num) { | |
4854 | case PHY_CTRL: | |
96838a40 | 4855 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4856 | break; |
2db10a08 AK |
4857 | if (netif_running(adapter->netdev)) |
4858 | e1000_reinit_locked(adapter); | |
4859 | else | |
1da177e4 LT |
4860 | e1000_reset(adapter); |
4861 | break; | |
4862 | } | |
4863 | } | |
4864 | break; | |
4865 | default: | |
4866 | return -EOPNOTSUPP; | |
4867 | } | |
4868 | return E1000_SUCCESS; | |
4869 | } | |
4870 | ||
64798845 | 4871 | void e1000_pci_set_mwi(struct e1000_hw *hw) |
1da177e4 LT |
4872 | { |
4873 | struct e1000_adapter *adapter = hw->back; | |
2648345f | 4874 | int ret_val = pci_set_mwi(adapter->pdev); |
1da177e4 | 4875 | |
96838a40 | 4876 | if (ret_val) |
feb8f478 | 4877 | e_err(probe, "Error in setting MWI\n"); |
1da177e4 LT |
4878 | } |
4879 | ||
64798845 | 4880 | void e1000_pci_clear_mwi(struct e1000_hw *hw) |
1da177e4 LT |
4881 | { |
4882 | struct e1000_adapter *adapter = hw->back; | |
4883 | ||
4884 | pci_clear_mwi(adapter->pdev); | |
4885 | } | |
4886 | ||
64798845 | 4887 | int e1000_pcix_get_mmrbc(struct e1000_hw *hw) |
007755eb PO |
4888 | { |
4889 | struct e1000_adapter *adapter = hw->back; | |
4890 | return pcix_get_mmrbc(adapter->pdev); | |
4891 | } | |
4892 | ||
64798845 | 4893 | void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc) |
007755eb PO |
4894 | { |
4895 | struct e1000_adapter *adapter = hw->back; | |
4896 | pcix_set_mmrbc(adapter->pdev, mmrbc); | |
4897 | } | |
4898 | ||
64798845 | 4899 | void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value) |
1da177e4 LT |
4900 | { |
4901 | outl(value, port); | |
4902 | } | |
4903 | ||
5622e404 JP |
4904 | static bool e1000_vlan_used(struct e1000_adapter *adapter) |
4905 | { | |
4906 | u16 vid; | |
4907 | ||
4908 | for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) | |
4909 | return true; | |
4910 | return false; | |
4911 | } | |
4912 | ||
52f5509f JP |
4913 | static void __e1000_vlan_mode(struct e1000_adapter *adapter, |
4914 | netdev_features_t features) | |
4915 | { | |
4916 | struct e1000_hw *hw = &adapter->hw; | |
4917 | u32 ctrl; | |
4918 | ||
4919 | ctrl = er32(CTRL); | |
f646968f | 4920 | if (features & NETIF_F_HW_VLAN_CTAG_RX) { |
52f5509f JP |
4921 | /* enable VLAN tag insert/strip */ |
4922 | ctrl |= E1000_CTRL_VME; | |
4923 | } else { | |
4924 | /* disable VLAN tag insert/strip */ | |
4925 | ctrl &= ~E1000_CTRL_VME; | |
4926 | } | |
4927 | ew32(CTRL, ctrl); | |
4928 | } | |
5622e404 JP |
4929 | static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter, |
4930 | bool filter_on) | |
1da177e4 | 4931 | { |
1dc32918 | 4932 | struct e1000_hw *hw = &adapter->hw; |
5622e404 | 4933 | u32 rctl; |
1da177e4 | 4934 | |
9150b76a JB |
4935 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
4936 | e1000_irq_disable(adapter); | |
1da177e4 | 4937 | |
52f5509f | 4938 | __e1000_vlan_mode(adapter, adapter->netdev->features); |
5622e404 | 4939 | if (filter_on) { |
1532ecea JB |
4940 | /* enable VLAN receive filtering */ |
4941 | rctl = er32(RCTL); | |
4942 | rctl &= ~E1000_RCTL_CFIEN; | |
5622e404 | 4943 | if (!(adapter->netdev->flags & IFF_PROMISC)) |
1532ecea JB |
4944 | rctl |= E1000_RCTL_VFE; |
4945 | ew32(RCTL, rctl); | |
4946 | e1000_update_mng_vlan(adapter); | |
1da177e4 | 4947 | } else { |
1532ecea JB |
4948 | /* disable VLAN receive filtering */ |
4949 | rctl = er32(RCTL); | |
4950 | rctl &= ~E1000_RCTL_VFE; | |
4951 | ew32(RCTL, rctl); | |
5622e404 | 4952 | } |
fd38d7a0 | 4953 | |
5622e404 JP |
4954 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
4955 | e1000_irq_enable(adapter); | |
4956 | } | |
4957 | ||
c8f44aff | 4958 | static void e1000_vlan_mode(struct net_device *netdev, |
52f5509f | 4959 | netdev_features_t features) |
5622e404 JP |
4960 | { |
4961 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
5622e404 JP |
4962 | |
4963 | if (!test_bit(__E1000_DOWN, &adapter->flags)) | |
4964 | e1000_irq_disable(adapter); | |
4965 | ||
52f5509f | 4966 | __e1000_vlan_mode(adapter, features); |
1da177e4 | 4967 | |
9150b76a JB |
4968 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
4969 | e1000_irq_enable(adapter); | |
1da177e4 LT |
4970 | } |
4971 | ||
80d5c368 PM |
4972 | static int e1000_vlan_rx_add_vid(struct net_device *netdev, |
4973 | __be16 proto, u16 vid) | |
1da177e4 | 4974 | { |
60490fe0 | 4975 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 4976 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 4977 | u32 vfta, index; |
96838a40 | 4978 | |
1dc32918 | 4979 | if ((hw->mng_cookie.status & |
96838a40 JB |
4980 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && |
4981 | (vid == adapter->mng_vlan_id)) | |
8e586137 | 4982 | return 0; |
5622e404 JP |
4983 | |
4984 | if (!e1000_vlan_used(adapter)) | |
4985 | e1000_vlan_filter_on_off(adapter, true); | |
4986 | ||
1da177e4 LT |
4987 | /* add VID to filter table */ |
4988 | index = (vid >> 5) & 0x7F; | |
1dc32918 | 4989 | vfta = E1000_READ_REG_ARRAY(hw, VFTA, index); |
1da177e4 | 4990 | vfta |= (1 << (vid & 0x1F)); |
1dc32918 | 4991 | e1000_write_vfta(hw, index, vfta); |
5622e404 JP |
4992 | |
4993 | set_bit(vid, adapter->active_vlans); | |
8e586137 JP |
4994 | |
4995 | return 0; | |
1da177e4 LT |
4996 | } |
4997 | ||
80d5c368 PM |
4998 | static int e1000_vlan_rx_kill_vid(struct net_device *netdev, |
4999 | __be16 proto, u16 vid) | |
1da177e4 | 5000 | { |
60490fe0 | 5001 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 5002 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 5003 | u32 vfta, index; |
1da177e4 | 5004 | |
9150b76a JB |
5005 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
5006 | e1000_irq_disable(adapter); | |
9150b76a JB |
5007 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
5008 | e1000_irq_enable(adapter); | |
1da177e4 LT |
5009 | |
5010 | /* remove VID from filter table */ | |
5011 | index = (vid >> 5) & 0x7F; | |
1dc32918 | 5012 | vfta = E1000_READ_REG_ARRAY(hw, VFTA, index); |
1da177e4 | 5013 | vfta &= ~(1 << (vid & 0x1F)); |
1dc32918 | 5014 | e1000_write_vfta(hw, index, vfta); |
5622e404 JP |
5015 | |
5016 | clear_bit(vid, adapter->active_vlans); | |
5017 | ||
5018 | if (!e1000_vlan_used(adapter)) | |
5019 | e1000_vlan_filter_on_off(adapter, false); | |
8e586137 JP |
5020 | |
5021 | return 0; | |
1da177e4 LT |
5022 | } |
5023 | ||
64798845 | 5024 | static void e1000_restore_vlan(struct e1000_adapter *adapter) |
1da177e4 | 5025 | { |
5622e404 | 5026 | u16 vid; |
1da177e4 | 5027 | |
5622e404 JP |
5028 | if (!e1000_vlan_used(adapter)) |
5029 | return; | |
5030 | ||
5031 | e1000_vlan_filter_on_off(adapter, true); | |
5032 | for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) | |
80d5c368 | 5033 | e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid); |
1da177e4 LT |
5034 | } |
5035 | ||
14ad2513 | 5036 | int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx) |
1da177e4 | 5037 | { |
1dc32918 JP |
5038 | struct e1000_hw *hw = &adapter->hw; |
5039 | ||
5040 | hw->autoneg = 0; | |
1da177e4 | 5041 | |
14ad2513 | 5042 | /* Make sure dplx is at most 1 bit and lsb of speed is not set |
6cfbd97b JK |
5043 | * for the switch() below to work |
5044 | */ | |
14ad2513 DD |
5045 | if ((spd & 1) || (dplx & ~1)) |
5046 | goto err_inval; | |
5047 | ||
6921368f | 5048 | /* Fiber NICs only allow 1000 gbps Full duplex */ |
1dc32918 | 5049 | if ((hw->media_type == e1000_media_type_fiber) && |
14ad2513 DD |
5050 | spd != SPEED_1000 && |
5051 | dplx != DUPLEX_FULL) | |
5052 | goto err_inval; | |
6921368f | 5053 | |
14ad2513 | 5054 | switch (spd + dplx) { |
1da177e4 | 5055 | case SPEED_10 + DUPLEX_HALF: |
1dc32918 | 5056 | hw->forced_speed_duplex = e1000_10_half; |
1da177e4 LT |
5057 | break; |
5058 | case SPEED_10 + DUPLEX_FULL: | |
1dc32918 | 5059 | hw->forced_speed_duplex = e1000_10_full; |
1da177e4 LT |
5060 | break; |
5061 | case SPEED_100 + DUPLEX_HALF: | |
1dc32918 | 5062 | hw->forced_speed_duplex = e1000_100_half; |
1da177e4 LT |
5063 | break; |
5064 | case SPEED_100 + DUPLEX_FULL: | |
1dc32918 | 5065 | hw->forced_speed_duplex = e1000_100_full; |
1da177e4 LT |
5066 | break; |
5067 | case SPEED_1000 + DUPLEX_FULL: | |
1dc32918 JP |
5068 | hw->autoneg = 1; |
5069 | hw->autoneg_advertised = ADVERTISE_1000_FULL; | |
1da177e4 LT |
5070 | break; |
5071 | case SPEED_1000 + DUPLEX_HALF: /* not supported */ | |
5072 | default: | |
14ad2513 | 5073 | goto err_inval; |
1da177e4 | 5074 | } |
c819bbd5 JB |
5075 | |
5076 | /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */ | |
5077 | hw->mdix = AUTO_ALL_MODES; | |
5078 | ||
1da177e4 | 5079 | return 0; |
14ad2513 DD |
5080 | |
5081 | err_inval: | |
5082 | e_err(probe, "Unsupported Speed/Duplex configuration\n"); | |
5083 | return -EINVAL; | |
1da177e4 LT |
5084 | } |
5085 | ||
b43fcd7d | 5086 | static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake) |
1da177e4 LT |
5087 | { |
5088 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 5089 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 5090 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
5091 | u32 ctrl, ctrl_ext, rctl, status; |
5092 | u32 wufc = adapter->wol; | |
6fdfef16 | 5093 | #ifdef CONFIG_PM |
240b1710 | 5094 | int retval = 0; |
6fdfef16 | 5095 | #endif |
1da177e4 LT |
5096 | |
5097 | netif_device_detach(netdev); | |
5098 | ||
2db10a08 | 5099 | if (netif_running(netdev)) { |
6a7d64e3 | 5100 | int count = E1000_CHECK_RESET_COUNT; |
5101 | ||
5102 | while (test_bit(__E1000_RESETTING, &adapter->flags) && count--) | |
5103 | usleep_range(10000, 20000); | |
5104 | ||
2db10a08 | 5105 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); |
1da177e4 | 5106 | e1000_down(adapter); |
2db10a08 | 5107 | } |
1da177e4 | 5108 | |
2f82665f | 5109 | #ifdef CONFIG_PM |
1d33e9c6 | 5110 | retval = pci_save_state(pdev); |
3a3847e0 | 5111 | if (retval) |
2f82665f JB |
5112 | return retval; |
5113 | #endif | |
5114 | ||
1dc32918 | 5115 | status = er32(STATUS); |
96838a40 | 5116 | if (status & E1000_STATUS_LU) |
1da177e4 LT |
5117 | wufc &= ~E1000_WUFC_LNKC; |
5118 | ||
96838a40 | 5119 | if (wufc) { |
1da177e4 | 5120 | e1000_setup_rctl(adapter); |
db0ce50d | 5121 | e1000_set_rx_mode(netdev); |
1da177e4 | 5122 | |
b868179c DN |
5123 | rctl = er32(RCTL); |
5124 | ||
1da177e4 | 5125 | /* turn on all-multi mode if wake on multicast is enabled */ |
b868179c | 5126 | if (wufc & E1000_WUFC_MC) |
1da177e4 | 5127 | rctl |= E1000_RCTL_MPE; |
b868179c DN |
5128 | |
5129 | /* enable receives in the hardware */ | |
5130 | ew32(RCTL, rctl | E1000_RCTL_EN); | |
1da177e4 | 5131 | |
1dc32918 JP |
5132 | if (hw->mac_type >= e1000_82540) { |
5133 | ctrl = er32(CTRL); | |
1da177e4 LT |
5134 | /* advertise wake from D3Cold */ |
5135 | #define E1000_CTRL_ADVD3WUC 0x00100000 | |
5136 | /* phy power management enable */ | |
5137 | #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 | |
5138 | ctrl |= E1000_CTRL_ADVD3WUC | | |
5139 | E1000_CTRL_EN_PHY_PWR_MGMT; | |
1dc32918 | 5140 | ew32(CTRL, ctrl); |
1da177e4 LT |
5141 | } |
5142 | ||
1dc32918 | 5143 | if (hw->media_type == e1000_media_type_fiber || |
1532ecea | 5144 | hw->media_type == e1000_media_type_internal_serdes) { |
1da177e4 | 5145 | /* keep the laser running in D3 */ |
1dc32918 | 5146 | ctrl_ext = er32(CTRL_EXT); |
1da177e4 | 5147 | ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA; |
1dc32918 | 5148 | ew32(CTRL_EXT, ctrl_ext); |
1da177e4 LT |
5149 | } |
5150 | ||
1dc32918 JP |
5151 | ew32(WUC, E1000_WUC_PME_EN); |
5152 | ew32(WUFC, wufc); | |
1da177e4 | 5153 | } else { |
1dc32918 JP |
5154 | ew32(WUC, 0); |
5155 | ew32(WUFC, 0); | |
1da177e4 LT |
5156 | } |
5157 | ||
0fccd0e9 JG |
5158 | e1000_release_manageability(adapter); |
5159 | ||
b43fcd7d RW |
5160 | *enable_wake = !!wufc; |
5161 | ||
0fccd0e9 | 5162 | /* make sure adapter isn't asleep if manageability is enabled */ |
b43fcd7d RW |
5163 | if (adapter->en_mng_pt) |
5164 | *enable_wake = true; | |
1da177e4 | 5165 | |
edd106fc AK |
5166 | if (netif_running(netdev)) |
5167 | e1000_free_irq(adapter); | |
5168 | ||
1da177e4 | 5169 | pci_disable_device(pdev); |
240b1710 | 5170 | |
1da177e4 LT |
5171 | return 0; |
5172 | } | |
5173 | ||
2f82665f | 5174 | #ifdef CONFIG_PM |
b43fcd7d RW |
5175 | static int e1000_suspend(struct pci_dev *pdev, pm_message_t state) |
5176 | { | |
5177 | int retval; | |
5178 | bool wake; | |
5179 | ||
5180 | retval = __e1000_shutdown(pdev, &wake); | |
5181 | if (retval) | |
5182 | return retval; | |
5183 | ||
5184 | if (wake) { | |
5185 | pci_prepare_to_sleep(pdev); | |
5186 | } else { | |
5187 | pci_wake_from_d3(pdev, false); | |
5188 | pci_set_power_state(pdev, PCI_D3hot); | |
5189 | } | |
5190 | ||
5191 | return 0; | |
5192 | } | |
5193 | ||
64798845 | 5194 | static int e1000_resume(struct pci_dev *pdev) |
1da177e4 LT |
5195 | { |
5196 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 5197 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 5198 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 5199 | u32 err; |
1da177e4 | 5200 | |
d0e027db | 5201 | pci_set_power_state(pdev, PCI_D0); |
1d33e9c6 | 5202 | pci_restore_state(pdev); |
dbb5aaeb | 5203 | pci_save_state(pdev); |
81250297 TI |
5204 | |
5205 | if (adapter->need_ioport) | |
5206 | err = pci_enable_device(pdev); | |
5207 | else | |
5208 | err = pci_enable_device_mem(pdev); | |
c7be73bc | 5209 | if (err) { |
675ad473 | 5210 | pr_err("Cannot enable PCI device from suspend\n"); |
3d1dd8cb AK |
5211 | return err; |
5212 | } | |
a4cb847d | 5213 | pci_set_master(pdev); |
1da177e4 | 5214 | |
d0e027db AK |
5215 | pci_enable_wake(pdev, PCI_D3hot, 0); |
5216 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 | 5217 | |
c7be73bc JP |
5218 | if (netif_running(netdev)) { |
5219 | err = e1000_request_irq(adapter); | |
5220 | if (err) | |
5221 | return err; | |
5222 | } | |
edd106fc AK |
5223 | |
5224 | e1000_power_up_phy(adapter); | |
1da177e4 | 5225 | e1000_reset(adapter); |
1dc32918 | 5226 | ew32(WUS, ~0); |
1da177e4 | 5227 | |
0fccd0e9 JG |
5228 | e1000_init_manageability(adapter); |
5229 | ||
96838a40 | 5230 | if (netif_running(netdev)) |
1da177e4 LT |
5231 | e1000_up(adapter); |
5232 | ||
5233 | netif_device_attach(netdev); | |
5234 | ||
1da177e4 LT |
5235 | return 0; |
5236 | } | |
5237 | #endif | |
c653e635 AK |
5238 | |
5239 | static void e1000_shutdown(struct pci_dev *pdev) | |
5240 | { | |
b43fcd7d RW |
5241 | bool wake; |
5242 | ||
5243 | __e1000_shutdown(pdev, &wake); | |
5244 | ||
5245 | if (system_state == SYSTEM_POWER_OFF) { | |
5246 | pci_wake_from_d3(pdev, wake); | |
5247 | pci_set_power_state(pdev, PCI_D3hot); | |
5248 | } | |
c653e635 AK |
5249 | } |
5250 | ||
1da177e4 | 5251 | #ifdef CONFIG_NET_POLL_CONTROLLER |
6cfbd97b | 5252 | /* Polling 'interrupt' - used by things like netconsole to send skbs |
1da177e4 LT |
5253 | * without having to re-enable interrupts. It's not called while |
5254 | * the interrupt routine is executing. | |
5255 | */ | |
64798845 | 5256 | static void e1000_netpoll(struct net_device *netdev) |
1da177e4 | 5257 | { |
60490fe0 | 5258 | struct e1000_adapter *adapter = netdev_priv(netdev); |
d3d9e484 | 5259 | |
1da177e4 | 5260 | disable_irq(adapter->pdev->irq); |
7d12e780 | 5261 | e1000_intr(adapter->pdev->irq, netdev); |
1da177e4 LT |
5262 | enable_irq(adapter->pdev->irq); |
5263 | } | |
5264 | #endif | |
5265 | ||
9026729b AK |
5266 | /** |
5267 | * e1000_io_error_detected - called when PCI error is detected | |
5268 | * @pdev: Pointer to PCI device | |
120a5d0d | 5269 | * @state: The current pci connection state |
9026729b AK |
5270 | * |
5271 | * This function is called after a PCI bus error affecting | |
5272 | * this device has been detected. | |
5273 | */ | |
64798845 JP |
5274 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, |
5275 | pci_channel_state_t state) | |
9026729b AK |
5276 | { |
5277 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4cf1653a | 5278 | struct e1000_adapter *adapter = netdev_priv(netdev); |
9026729b AK |
5279 | |
5280 | netif_device_detach(netdev); | |
5281 | ||
eab63302 AD |
5282 | if (state == pci_channel_io_perm_failure) |
5283 | return PCI_ERS_RESULT_DISCONNECT; | |
5284 | ||
9026729b AK |
5285 | if (netif_running(netdev)) |
5286 | e1000_down(adapter); | |
72e8d6bb | 5287 | pci_disable_device(pdev); |
9026729b AK |
5288 | |
5289 | /* Request a slot slot reset. */ | |
5290 | return PCI_ERS_RESULT_NEED_RESET; | |
5291 | } | |
5292 | ||
5293 | /** | |
5294 | * e1000_io_slot_reset - called after the pci bus has been reset. | |
5295 | * @pdev: Pointer to PCI device | |
5296 | * | |
5297 | * Restart the card from scratch, as if from a cold-boot. Implementation | |
5298 | * resembles the first-half of the e1000_resume routine. | |
5299 | */ | |
5300 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) | |
5301 | { | |
5302 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4cf1653a | 5303 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 5304 | struct e1000_hw *hw = &adapter->hw; |
81250297 | 5305 | int err; |
9026729b | 5306 | |
81250297 TI |
5307 | if (adapter->need_ioport) |
5308 | err = pci_enable_device(pdev); | |
5309 | else | |
5310 | err = pci_enable_device_mem(pdev); | |
5311 | if (err) { | |
675ad473 | 5312 | pr_err("Cannot re-enable PCI device after reset.\n"); |
9026729b AK |
5313 | return PCI_ERS_RESULT_DISCONNECT; |
5314 | } | |
5315 | pci_set_master(pdev); | |
5316 | ||
dbf38c94 LV |
5317 | pci_enable_wake(pdev, PCI_D3hot, 0); |
5318 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
9026729b | 5319 | |
9026729b | 5320 | e1000_reset(adapter); |
1dc32918 | 5321 | ew32(WUS, ~0); |
9026729b AK |
5322 | |
5323 | return PCI_ERS_RESULT_RECOVERED; | |
5324 | } | |
5325 | ||
5326 | /** | |
5327 | * e1000_io_resume - called when traffic can start flowing again. | |
5328 | * @pdev: Pointer to PCI device | |
5329 | * | |
5330 | * This callback is called when the error recovery driver tells us that | |
5331 | * its OK to resume normal operation. Implementation resembles the | |
5332 | * second-half of the e1000_resume routine. | |
5333 | */ | |
5334 | static void e1000_io_resume(struct pci_dev *pdev) | |
5335 | { | |
5336 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4cf1653a | 5337 | struct e1000_adapter *adapter = netdev_priv(netdev); |
0fccd0e9 JG |
5338 | |
5339 | e1000_init_manageability(adapter); | |
9026729b AK |
5340 | |
5341 | if (netif_running(netdev)) { | |
5342 | if (e1000_up(adapter)) { | |
675ad473 | 5343 | pr_info("can't bring device back up after reset\n"); |
9026729b AK |
5344 | return; |
5345 | } | |
5346 | } | |
5347 | ||
5348 | netif_device_attach(netdev); | |
9026729b AK |
5349 | } |
5350 | ||
1da177e4 | 5351 | /* e1000_main.c */ |