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dev_ioctl: split out ndo_eth_ioctl
[linux-2.6-block.git] / drivers / net / ethernet / intel / e1000 / e1000_main.c
CommitLineData
ae06c70b 1// SPDX-License-Identifier: GPL-2.0
51dce24b 2/* Copyright(c) 1999 - 2006 Intel Corporation. */
1da177e4
LT		 3
4#include "e1000.h"
d0bb53e1 5#include <net/ip6_checksum.h>
5377a416 6#include <linux/io.h>
70c71606 7#include <linux/prefetch.h>
5622e404
JP		 8#include <linux/bitops.h>
9#include <linux/if_vlan.h>
5377a416 10
1da177e4 11char e1000_driver_name[] = "e1000";
3ad2cc67 12static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
abec42a4 13static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 14
15/* e1000_pci_tbl - PCI Device ID Table
16 *
17 * Last entry must be all 0s
18 *
19 * Macro expands to...
20 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
21 */
9baa3c34 22static const struct pci_device_id e1000_pci_tbl[] = {
1da177e4
LT		 23 INTEL_E1000_ETHERNET_DEVICE(0x1000),
24 INTEL_E1000_ETHERNET_DEVICE(0x1001),
25 INTEL_E1000_ETHERNET_DEVICE(0x1004),
26 INTEL_E1000_ETHERNET_DEVICE(0x1008),
27 INTEL_E1000_ETHERNET_DEVICE(0x1009),
28 INTEL_E1000_ETHERNET_DEVICE(0x100C),
29 INTEL_E1000_ETHERNET_DEVICE(0x100D),
30 INTEL_E1000_ETHERNET_DEVICE(0x100E),
31 INTEL_E1000_ETHERNET_DEVICE(0x100F),
32 INTEL_E1000_ETHERNET_DEVICE(0x1010),
33 INTEL_E1000_ETHERNET_DEVICE(0x1011),
34 INTEL_E1000_ETHERNET_DEVICE(0x1012),
35 INTEL_E1000_ETHERNET_DEVICE(0x1013),
36 INTEL_E1000_ETHERNET_DEVICE(0x1014),
37 INTEL_E1000_ETHERNET_DEVICE(0x1015),
38 INTEL_E1000_ETHERNET_DEVICE(0x1016),
39 INTEL_E1000_ETHERNET_DEVICE(0x1017),
40 INTEL_E1000_ETHERNET_DEVICE(0x1018),
41 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 42 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 43 INTEL_E1000_ETHERNET_DEVICE(0x101D),
44 INTEL_E1000_ETHERNET_DEVICE(0x101E),
45 INTEL_E1000_ETHERNET_DEVICE(0x1026),
46 INTEL_E1000_ETHERNET_DEVICE(0x1027),
47 INTEL_E1000_ETHERNET_DEVICE(0x1028),
48 INTEL_E1000_ETHERNET_DEVICE(0x1075),
49 INTEL_E1000_ETHERNET_DEVICE(0x1076),
50 INTEL_E1000_ETHERNET_DEVICE(0x1077),
51 INTEL_E1000_ETHERNET_DEVICE(0x1078),
52 INTEL_E1000_ETHERNET_DEVICE(0x1079),
53 INTEL_E1000_ETHERNET_DEVICE(0x107A),
54 INTEL_E1000_ETHERNET_DEVICE(0x107B),
55 INTEL_E1000_ETHERNET_DEVICE(0x107C),
56 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 57 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 58 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
5377a416 59 INTEL_E1000_ETHERNET_DEVICE(0x2E6E),
1da177e4
LT		 60 /* required last entry */
61 {0,}
62};
63
64MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
65
35574764
NN		 66int e1000_up(struct e1000_adapter *adapter);
67void e1000_down(struct e1000_adapter *adapter);
68void e1000_reinit_locked(struct e1000_adapter *adapter);
69void e1000_reset(struct e1000_adapter *adapter);
35574764
NN		 70int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
71int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
72void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
73void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 74static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
a48954c8 75 struct e1000_tx_ring *txdr);
3ad2cc67 76static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
a48954c8 77 struct e1000_rx_ring *rxdr);
3ad2cc67 78static void e1000_free_tx_resources(struct e1000_adapter *adapter,
a48954c8 79 struct e1000_tx_ring *tx_ring);
3ad2cc67 80static void e1000_free_rx_resources(struct e1000_adapter *adapter,
a48954c8 81 struct e1000_rx_ring *rx_ring);
35574764 82void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 83
84static int e1000_init_module(void);
85static void e1000_exit_module(void);
86static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
9f9a12f8 87static void e1000_remove(struct pci_dev *pdev);
581d708e 88static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4 89static int e1000_sw_init(struct e1000_adapter *adapter);
1f2f83f8
SA		 90int e1000_open(struct net_device *netdev);
91int e1000_close(struct net_device *netdev);
1da177e4
LT		 92static void e1000_configure_tx(struct e1000_adapter *adapter);
93static void e1000_configure_rx(struct e1000_adapter *adapter);
94static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 95static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
96static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
97static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
a48954c8 98 struct e1000_tx_ring *tx_ring);
581d708e 99static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
a48954c8 100 struct e1000_rx_ring *rx_ring);
db0ce50d 101static void e1000_set_rx_mode(struct net_device *netdev);
5cf42fcd 102static void e1000_update_phy_info_task(struct work_struct *work);
a4010afe 103static void e1000_watchdog(struct work_struct *work);
5cf42fcd 104static void e1000_82547_tx_fifo_stall_task(struct work_struct *work);
3b29a56d
SH		 105static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
106 struct net_device *netdev);
1da177e4
LT		 107static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
108static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 109static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP		 110static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
111 struct e1000_tx_ring *tx_ring);
bea3348e 112static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 113static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
114 struct e1000_rx_ring *rx_ring,
115 int *work_done, int work_to_do);
edbbb3ca
JB		 116static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
117 struct e1000_rx_ring *rx_ring,
118 int *work_done, int work_to_do);
08e83316
SD		 119static void e1000_alloc_dummy_rx_buffers(struct e1000_adapter *adapter,
120 struct e1000_rx_ring *rx_ring,
121 int cleaned_count)
122{
123}
581d708e 124static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 125 struct e1000_rx_ring *rx_ring,
72d64a43 126 int cleaned_count);
edbbb3ca
JB		 127static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rx_ring,
129 int cleaned_count);
1da177e4
LT		 130static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
131static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
132 int cmd);
1da177e4
LT		 133static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
134static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
0290bd29 135static void e1000_tx_timeout(struct net_device *dev, unsigned int txqueue);
65f27f38 136static void e1000_reset_task(struct work_struct *work);
1da177e4 137static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523 138static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
a48954c8 139 struct sk_buff *skb);
1da177e4 140
5622e404 141static bool e1000_vlan_used(struct e1000_adapter *adapter);
c8f44aff
MM		 142static void e1000_vlan_mode(struct net_device *netdev,
143 netdev_features_t features);
52f5509f
JP		 144static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
145 bool filter_on);
80d5c368
PM		 146static int e1000_vlan_rx_add_vid(struct net_device *netdev,
147 __be16 proto, u16 vid);
148static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
149 __be16 proto, u16 vid);
1da177e4
LT		 150static void e1000_restore_vlan(struct e1000_adapter *adapter);
151
eb6779d4
VG		 152static int __maybe_unused e1000_suspend(struct device *dev);
153static int __maybe_unused e1000_resume(struct device *dev);
c653e635 154static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 155
156#ifdef CONFIG_NET_POLL_CONTROLLER
157/* for netdump / net console */
158static void e1000_netpoll (struct net_device *netdev);
159#endif
160
1f753861
JB		 161#define COPYBREAK_DEFAULT 256
162static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
163module_param(copybreak, uint, 0644);
164MODULE_PARM_DESC(copybreak,
165 "Maximum size of packet that is copied to a new buffer on receive");
166
9026729b 167static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
a48954c8 168 pci_channel_state_t state);
9026729b
AK		 169static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
170static void e1000_io_resume(struct pci_dev *pdev);
171
3646f0e5 172static const struct pci_error_handlers e1000_err_handler = {
9026729b
AK		 173 .error_detected = e1000_io_error_detected,
174 .slot_reset = e1000_io_slot_reset,
175 .resume = e1000_io_resume,
176};
24025e4e 177
eb6779d4
VG		 178static SIMPLE_DEV_PM_OPS(e1000_pm_ops, e1000_suspend, e1000_resume);
179
1da177e4
LT		 180static struct pci_driver e1000_driver = {
181 .name = e1000_driver_name,
182 .id_table = e1000_pci_tbl,
183 .probe = e1000_probe,
9f9a12f8 184 .remove = e1000_remove,
eb6779d4
VG		 185 .driver = {
186 .pm = &e1000_pm_ops,
187 },
9026729b
AK		 188 .shutdown = e1000_shutdown,
189 .err_handler = &e1000_err_handler
1da177e4
LT		 190};
191
192MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
193MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
98674ebe 194MODULE_LICENSE("GPL v2");
1da177e4 195
b3f4d599 196#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
197static int debug = -1;
1da177e4
LT		 198module_param(debug, int, 0);
199MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
200
675ad473 201/**
b50f7bca
JB		 202 * e1000_get_hw_dev - helper function for getting netdev
203 * @hw: pointer to HW struct
204 *
205 * return device used by hardware layer to print debugging information
675ad473
ET		 206 *
207 **/
208struct net_device *e1000_get_hw_dev(struct e1000_hw *hw)
209{
210 struct e1000_adapter *adapter = hw->back;
211 return adapter->netdev;
212}
213
1da177e4
LT		 214/**
215 * e1000_init_module - Driver Registration Routine
216 *
217 * e1000_init_module is the first routine called when the driver is
218 * loaded. All it does is register with the PCI subsystem.
219 **/
64798845 220static int __init e1000_init_module(void)
1da177e4
LT		 221{
222 int ret;
34a2a3b8 223 pr_info("%s\n", e1000_driver_string);
1da177e4 224
675ad473 225 pr_info("%s\n", e1000_copyright);
1da177e4 226
29917620 227 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 228 if (copybreak != COPYBREAK_DEFAULT) {
229 if (copybreak == 0)
675ad473 230 pr_info("copybreak disabled\n");
1f753861 231 else
675ad473
ET		 232 pr_info("copybreak enabled for "
233 "packets <= %u bytes\n", copybreak);
1f753861 234 }
1da177e4
LT		 235 return ret;
236}
237
238module_init(e1000_init_module);
239
240/**
241 * e1000_exit_module - Driver Exit Cleanup Routine
242 *
243 * e1000_exit_module is called just before the driver is removed
244 * from memory.
245 **/
64798845 246static void __exit e1000_exit_module(void)
1da177e4 247{
1da177e4
LT		 248 pci_unregister_driver(&e1000_driver);
249}
250
251module_exit(e1000_exit_module);
252
2db10a08
AK		 253static int e1000_request_irq(struct e1000_adapter *adapter)
254{
255 struct net_device *netdev = adapter->netdev;
3e18826c 256 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 257 int irq_flags = IRQF_SHARED;
258 int err;
2db10a08 259
e94bd23f 260 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
a48954c8 261 netdev);
e94bd23f 262 if (err) {
feb8f478 263 e_err(probe, "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 264 }
2db10a08
AK		 265
266 return err;
267}
268
269static void e1000_free_irq(struct e1000_adapter *adapter)
270{
271 struct net_device *netdev = adapter->netdev;
272
273 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK		 274}
275
1da177e4
LT		 276/**
277 * e1000_irq_disable - Mask off interrupt generation on the NIC
278 * @adapter: board private structure
279 **/
64798845 280static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 281{
1dc32918
JP		 282 struct e1000_hw *hw = &adapter->hw;
283
284 ew32(IMC, ~0);
285 E1000_WRITE_FLUSH();
1da177e4
LT		 286 synchronize_irq(adapter->pdev->irq);
287}
288
289/**
290 * e1000_irq_enable - Enable default interrupt generation settings
291 * @adapter: board private structure
292 **/
64798845 293static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 294{
1dc32918
JP		 295 struct e1000_hw *hw = &adapter->hw;
296
297 ew32(IMS, IMS_ENABLE_MASK);
298 E1000_WRITE_FLUSH();
1da177e4 299}
3ad2cc67 300
64798845 301static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 302{
1dc32918 303 struct e1000_hw *hw = &adapter->hw;
2d7edb92 304 struct net_device *netdev = adapter->netdev;
1dc32918 305 u16 vid = hw->mng_cookie.vlan_id;
406874a7 306 u16 old_vid = adapter->mng_vlan_id;
96838a40 307
5622e404
JP		 308 if (!e1000_vlan_used(adapter))
309 return;
310
311 if (!test_bit(vid, adapter->active_vlans)) {
312 if (hw->mng_cookie.status &
313 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
80d5c368 314 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
c5f226fe 315 adapter->mng_vlan_id = vid;
5622e404
JP		 316 } else {
317 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
318 }
319 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
320 (vid != old_vid) &&
321 !test_bit(old_vid, adapter->active_vlans))
80d5c368
PM		 322 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
323 old_vid);
5622e404
JP		 324 } else {
325 adapter->mng_vlan_id = vid;
2d7edb92
MC		 326 }
327}
b55ccb35 328
64798845 329static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 330{
1dc32918
JP		 331 struct e1000_hw *hw = &adapter->hw;
332
0fccd0e9 333 if (adapter->en_mng_pt) {
1dc32918 334 u32 manc = er32(MANC);
0fccd0e9
JG		 335
336 /* disable hardware interception of ARP */
337 manc &= ~(E1000_MANC_ARP_EN);
338
1dc32918 339 ew32(MANC, manc);
0fccd0e9
JG		 340 }
341}
342
64798845 343static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 344{
1dc32918
JP		 345 struct e1000_hw *hw = &adapter->hw;
346
0fccd0e9 347 if (adapter->en_mng_pt) {
1dc32918 348 u32 manc = er32(MANC);
0fccd0e9
JG		 349
350 /* re-enable hardware interception of ARP */
351 manc |= E1000_MANC_ARP_EN;
352
1dc32918 353 ew32(MANC, manc);
0fccd0e9
JG		 354 }
355}
356
e0aac5a2
AK		 357/**
358 * e1000_configure - configure the hardware for RX and TX
b50f7bca 359 * @adapter: private board structure
e0aac5a2
AK		 360 **/
361static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 362{
363 struct net_device *netdev = adapter->netdev;
2db10a08 364 int i;
1da177e4 365
db0ce50d 366 e1000_set_rx_mode(netdev);
1da177e4
LT		 367
368 e1000_restore_vlan(adapter);
0fccd0e9 369 e1000_init_manageability(adapter);
1da177e4
LT		 370
371 e1000_configure_tx(adapter);
372 e1000_setup_rctl(adapter);
373 e1000_configure_rx(adapter);
72d64a43
JK		 374 /* call E1000_DESC_UNUSED which always leaves
375 * at least 1 descriptor unused to make sure
6cfbd97b
JK		 376 * next_to_use != next_to_clean
377 */
f56799ea 378 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 379 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e 380 adapter->alloc_rx_buf(adapter, ring,
6cfbd97b 381 E1000_DESC_UNUSED(ring));
f56799ea 382 }
e0aac5a2
AK		 383}
384
385int e1000_up(struct e1000_adapter *adapter)
386{
1dc32918
JP		 387 struct e1000_hw *hw = &adapter->hw;
388
e0aac5a2
AK		 389 /* hardware has been reset, we need to reload some things */
390 e1000_configure(adapter);
391
392 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 393
bea3348e 394 napi_enable(&adapter->napi);
c3570acb 395
5de55624
MC		 396 e1000_irq_enable(adapter);
397
4cb9be7a
JB		 398 netif_wake_queue(adapter->netdev);
399
79f3d399 400 /* fire a link change interrupt to start the watchdog */
1dc32918 401 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 402 return 0;
403}
404
79f05bf0
AK		 405/**
406 * e1000_power_up_phy - restore link in case the phy was powered down
407 * @adapter: address of board private structure
408 *
409 * The phy may be powered down to save power and turn off link when the
410 * driver is unloaded and wake on lan is not enabled (among others)
411 * *** this routine MUST be followed by a call to e1000_reset ***
79f05bf0 412 **/
d658266e 413void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 414{
1dc32918 415 struct e1000_hw *hw = &adapter->hw;
406874a7 416 u16 mii_reg = 0;
79f05bf0
AK		 417
418 /* Just clear the power down bit to wake the phy back up */
1dc32918 419 if (hw->media_type == e1000_media_type_copper) {
79f05bf0 420 /* according to the manual, the phy will retain its
6cfbd97b
JK		 421 * settings across a power-down/up cycle
422 */
1dc32918 423 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 424 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 425 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 426 }
427}
428
429static void e1000_power_down_phy(struct e1000_adapter *adapter)
430{
1dc32918
JP		 431 struct e1000_hw *hw = &adapter->hw;
432
61c2505f 433 /* Power down the PHY so no link is implied when interface is down *
c3033b01 434 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 435 * (a) WoL is enabled
436 * (b) AMT is active
6cfbd97b
JK		 437 * (c) SoL/IDER session is active
438 */
1dc32918
JP		 439 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
440 hw->media_type == e1000_media_type_copper) {
406874a7 441 u16 mii_reg = 0;
61c2505f 442
1dc32918 443 switch (hw->mac_type) {
61c2505f
BA		 444 case e1000_82540:
445 case e1000_82545:
446 case e1000_82545_rev_3:
447 case e1000_82546:
5377a416 448 case e1000_ce4100:
61c2505f
BA		 449 case e1000_82546_rev_3:
450 case e1000_82541:
451 case e1000_82541_rev_2:
452 case e1000_82547:
453 case e1000_82547_rev_2:
1dc32918 454 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 455 goto out;
456 break;
61c2505f
BA		 457 default:
458 goto out;
459 }
1dc32918 460 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 461 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 462 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
4e0d8f7d 463 msleep(1);
79f05bf0 464 }
61c2505f
BA		 465out:
466 return;
79f05bf0
AK		 467}
468
a4010afe
JB		 469static void e1000_down_and_stop(struct e1000_adapter *adapter)
470{
471 set_bit(__E1000_DOWN, &adapter->flags);
8ce6909f 472
a4010afe 473 cancel_delayed_work_sync(&adapter->watchdog_task);
74a1b1ea
VD		 474
475 /*
476 * Since the watchdog task can reschedule other tasks, we should cancel
477 * it first, otherwise we can run into the situation when a work is
478 * still running after the adapter has been turned down.
479 */
480
a4010afe
JB		 481 cancel_delayed_work_sync(&adapter->phy_info_task);
482 cancel_delayed_work_sync(&adapter->fifo_stall_task);
74a1b1ea
VD		 483
484 /* Only kill reset task if adapter is not resetting */
485 if (!test_bit(__E1000_RESETTING, &adapter->flags))
486 cancel_work_sync(&adapter->reset_task);
a4010afe
JB		 487}
488
64798845 489void e1000_down(struct e1000_adapter *adapter)
1da177e4 490{
a6c42322 491 struct e1000_hw *hw = &adapter->hw;
1da177e4 492 struct net_device *netdev = adapter->netdev;
a6c42322 493 u32 rctl, tctl;
1da177e4 494
a6c42322
JB		 495 /* disable receives in the hardware */
496 rctl = er32(RCTL);
497 ew32(RCTL, rctl & ~E1000_RCTL_EN);
498 /* flush and sleep below */
499
51851073 500 netif_tx_disable(netdev);
a6c42322
JB		 501
502 /* disable transmits in the hardware */
503 tctl = er32(TCTL);
504 tctl &= ~E1000_TCTL_EN;
505 ew32(TCTL, tctl);
506 /* flush both disables and wait for them to finish */
507 E1000_WRITE_FLUSH();
508 msleep(10);
509
44c445c3
VM		 510 /* Set the carrier off after transmits have been disabled in the
511 * hardware, to avoid race conditions with e1000_watchdog() (which
512 * may be running concurrently to us, checking for the carrier
513 * bit to decide whether it should enable transmits again). Such
514 * a race condition would result into transmission being disabled
515 * in the hardware until the next IFF_DOWN+IFF_UP cycle.
516 */
517 netif_carrier_off(netdev);
518
bea3348e 519 napi_disable(&adapter->napi);
c3570acb 520
1da177e4 521 e1000_irq_disable(adapter);
c1605eb3 522
6cfbd97b 523 /* Setting DOWN must be after irq_disable to prevent
ab08853f 524 * a screaming interrupt. Setting DOWN also prevents
a4010afe 525 * tasks from rescheduling.
ab08853f 526 */
a4010afe 527 e1000_down_and_stop(adapter);
1da177e4 528
1da177e4
LT		 529 adapter->link_speed = 0;
530 adapter->link_duplex = 0;
1da177e4
LT		 531
532 e1000_reset(adapter);
581d708e
MC		 533 e1000_clean_all_tx_rings(adapter);
534 e1000_clean_all_rx_rings(adapter);
1da177e4 535}
1da177e4 536
64798845 537void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08 538{
2db10a08
AK		 539 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
540 msleep(1);
49ee3c2a
AD		 541
542 /* only run the task if not already down */
543 if (!test_bit(__E1000_DOWN, &adapter->flags)) {
544 e1000_down(adapter);
545 e1000_up(adapter);
546 }
547
2db10a08 548 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 549}
550
64798845 551void e1000_reset(struct e1000_adapter *adapter)
1da177e4 552{
1dc32918 553 struct e1000_hw *hw = &adapter->hw;
406874a7 554 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 555 bool legacy_pba_adjust = false;
b7cb8c2c 556 u16 hwm;
1da177e4
LT		 557
558 /* Repartition Pba for greater than 9k mtu
559 * To take effect CTRL.RST is required.
560 */
561
1dc32918 562 switch (hw->mac_type) {
018ea44e
BA		 563 case e1000_82542_rev2_0:
564 case e1000_82542_rev2_1:
565 case e1000_82543:
566 case e1000_82544:
567 case e1000_82540:
568 case e1000_82541:
569 case e1000_82541_rev_2:
c3033b01 570 legacy_pba_adjust = true;
018ea44e
BA		 571 pba = E1000_PBA_48K;
572 break;
573 case e1000_82545:
574 case e1000_82545_rev_3:
575 case e1000_82546:
5377a416 576 case e1000_ce4100:
018ea44e
BA		 577 case e1000_82546_rev_3:
578 pba = E1000_PBA_48K;
579 break;
2d7edb92 580 case e1000_82547:
0e6ef3e0 581 case e1000_82547_rev_2:
c3033b01 582 legacy_pba_adjust = true;
2d7edb92
MC		 583 pba = E1000_PBA_30K;
584 break;
018ea44e
BA		 585 case e1000_undefined:
586 case e1000_num_macs:
2d7edb92
MC		 587 break;
588 }
589
c3033b01 590 if (legacy_pba_adjust) {
b7cb8c2c 591 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 592 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 593
1dc32918 594 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 595 adapter->tx_fifo_head = 0;
596 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
597 adapter->tx_fifo_size =
598 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
599 atomic_set(&adapter->tx_fifo_stall, 0);
600 }
b7cb8c2c 601 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 602 /* adjust PBA for jumbo frames */
1dc32918 603 ew32(PBA, pba);
018ea44e
BA		 604
605 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 606 * large enough to accommodate two full transmit packets,
018ea44e 607 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 608 * the Rx FIFO should be large enough to accommodate at least
018ea44e 609 * one full receive packet and is similarly rounded up and
6cfbd97b
JK		 610 * expressed in KB.
611 */
1dc32918 612 pba = er32(PBA);
018ea44e
BA		 613 /* upper 16 bits has Tx packet buffer allocation size in KB */
614 tx_space = pba >> 16;
615 /* lower 16 bits has Rx packet buffer allocation size in KB */
616 pba &= 0xffff;
6cfbd97b 617 /* the Tx fifo also stores 16 bytes of information about the Tx
b7cb8c2c
JB		 618 * but don't include ethernet FCS because hardware appends it
619 */
620 min_tx_space = (hw->max_frame_size +
a48954c8
JW		 621 sizeof(struct e1000_tx_desc) -
622 ETH_FCS_LEN) * 2;
9099cfb9 623 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 624 min_tx_space >>= 10;
b7cb8c2c
JB		 625 /* software strips receive CRC, so leave room for it */
626 min_rx_space = hw->max_frame_size;
9099cfb9 627 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 628 min_rx_space >>= 10;
629
630 /* If current Tx allocation is less than the min Tx FIFO size,
631 * and the min Tx FIFO size is less than the current Rx FIFO
6cfbd97b
JK		 632 * allocation, take space away from current Rx allocation
633 */
018ea44e
BA		 634 if (tx_space < min_tx_space &&
635 ((min_tx_space - tx_space) < pba)) {
636 pba = pba - (min_tx_space - tx_space);
637
638 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 639 switch (hw->mac_type) {
018ea44e
BA		 640 case e1000_82545 ... e1000_82546_rev_3:
641 pba &= ~(E1000_PBA_8K - 1);
642 break;
643 default:
644 break;
645 }
646
6cfbd97b
JK		 647 /* if short on Rx space, Rx wins and must trump Tx
648 * adjustment or use Early Receive if available
649 */
1532ecea
JB		 650 if (pba < min_rx_space)
651 pba = min_rx_space;
018ea44e 652 }
1da177e4 653 }
2d7edb92 654
1dc32918 655 ew32(PBA, pba);
1da177e4 656
6cfbd97b 657 /* flow control settings:
b7cb8c2c
JB		 658 * The high water mark must be low enough to fit one full frame
659 * (or the size used for early receive) above it in the Rx FIFO.
660 * Set it to the lower of:
661 * - 90% of the Rx FIFO size, and
662 * - the full Rx FIFO size minus the early receive size (for parts
663 * with ERT support assuming ERT set to E1000_ERT_2048), or
664 * - the full Rx FIFO size minus one full frame
665 */
666 hwm = min(((pba << 10) * 9 / 10),
667 ((pba << 10) - hw->max_frame_size));
668
669 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
670 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 671 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 672 hw->fc_send_xon = 1;
673 hw->fc = hw->original_fc;
1da177e4 674
2d7edb92 675 /* Allow time for pending master requests to run */
1dc32918
JP		 676 e1000_reset_hw(hw);
677 if (hw->mac_type >= e1000_82544)
678 ew32(WUC, 0);
09ae3e88 679
1dc32918 680 if (e1000_init_hw(hw))
feb8f478 681 e_dev_err("Hardware Error\n");
2d7edb92 682 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 683
684 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 685 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP		 686 hw->autoneg == 1 &&
687 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
688 u32 ctrl = er32(CTRL);
3d5460a0
JB		 689 /* clear phy power management bit if we are in gig only mode,
690 * which if enabled will attempt negotiation to 100Mb, which
6cfbd97b
JK		 691 * can cause a loss of link at power off or driver unload
692 */
3d5460a0 693 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 694 ew32(CTRL, ctrl);
3d5460a0
JB		 695 }
696
1da177e4 697 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 698 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 699
1dc32918
JP		 700 e1000_reset_adaptive(hw);
701 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 702
0fccd0e9 703 e1000_release_manageability(adapter);
1da177e4
LT		 704}
705
1aa8b471 706/* Dump the eeprom for users having checksum issues */
b4ea895d 707static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 708{
709 struct net_device *netdev = adapter->netdev;
710 struct ethtool_eeprom eeprom;
711 const struct ethtool_ops *ops = netdev->ethtool_ops;
712 u8 *data;
713 int i;
714 u16 csum_old, csum_new = 0;
715
716 eeprom.len = ops->get_eeprom_len(netdev);
717 eeprom.offset = 0;
718
719 data = kmalloc(eeprom.len, GFP_KERNEL);
e404decb 720 if (!data)
67b3c27c 721 return;
67b3c27c
AK		 722
723 ops->get_eeprom(netdev, &eeprom, data);
724
725 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
726 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
727 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
728 csum_new += data[i] + (data[i + 1] << 8);
729 csum_new = EEPROM_SUM - csum_new;
730
675ad473
ET		 731 pr_err("/*********************/\n");
732 pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old);
733 pr_err("Calculated : 0x%04x\n", csum_new);
67b3c27c 734
675ad473
ET		 735 pr_err("Offset Values\n");
736 pr_err("======== ======\n");
67b3c27c
AK		 737 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
738
675ad473
ET		 739 pr_err("Include this output when contacting your support provider.\n");
740 pr_err("This is not a software error! Something bad happened to\n");
741 pr_err("your hardware or EEPROM image. Ignoring this problem could\n");
742 pr_err("result in further problems, possibly loss of data,\n");
743 pr_err("corruption or system hangs!\n");
744 pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n");
745 pr_err("which is invalid and requires you to set the proper MAC\n");
746 pr_err("address manually before continuing to enable this network\n");
747 pr_err("device. Please inspect the EEPROM dump and report the\n");
748 pr_err("issue to your hardware vendor or Intel Customer Support.\n");
749 pr_err("/*********************/\n");
67b3c27c
AK		 750
751 kfree(data);
752}
753
81250297
TI		 754/**
755 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
756 * @pdev: PCI device information struct
757 *
758 * Return true if an adapter needs ioport resources
759 **/
760static int e1000_is_need_ioport(struct pci_dev *pdev)
761{
762 switch (pdev->device) {
763 case E1000_DEV_ID_82540EM:
764 case E1000_DEV_ID_82540EM_LOM:
765 case E1000_DEV_ID_82540EP:
766 case E1000_DEV_ID_82540EP_LOM:
767 case E1000_DEV_ID_82540EP_LP:
768 case E1000_DEV_ID_82541EI:
769 case E1000_DEV_ID_82541EI_MOBILE:
770 case E1000_DEV_ID_82541ER:
771 case E1000_DEV_ID_82541ER_LOM:
772 case E1000_DEV_ID_82541GI:
773 case E1000_DEV_ID_82541GI_LF:
774 case E1000_DEV_ID_82541GI_MOBILE:
775 case E1000_DEV_ID_82544EI_COPPER:
776 case E1000_DEV_ID_82544EI_FIBER:
777 case E1000_DEV_ID_82544GC_COPPER:
778 case E1000_DEV_ID_82544GC_LOM:
779 case E1000_DEV_ID_82545EM_COPPER:
780 case E1000_DEV_ID_82545EM_FIBER:
781 case E1000_DEV_ID_82546EB_COPPER:
782 case E1000_DEV_ID_82546EB_FIBER:
783 case E1000_DEV_ID_82546EB_QUAD_COPPER:
784 return true;
785 default:
786 return false;
787 }
788}
789
c8f44aff
MM		 790static netdev_features_t e1000_fix_features(struct net_device *netdev,
791 netdev_features_t features)
5622e404 792{
6cfbd97b
JK		 793 /* Since there is no support for separate Rx/Tx vlan accel
794 * enable/disable make sure Tx flag is always in same state as Rx.
5622e404 795 */
f646968f
PM		 796 if (features & NETIF_F_HW_VLAN_CTAG_RX)
797 features |= NETIF_F_HW_VLAN_CTAG_TX;
5622e404 798 else
f646968f 799 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
5622e404
JP		 800
801 return features;
802}
803
c8f44aff
MM		 804static int e1000_set_features(struct net_device *netdev,
805 netdev_features_t features)
e97d3207
MM		 806{
807 struct e1000_adapter *adapter = netdev_priv(netdev);
c8f44aff 808 netdev_features_t changed = features ^ netdev->features;
e97d3207 809
f646968f 810 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
5622e404
JP		 811 e1000_vlan_mode(netdev, features);
812
e825b731 813 if (!(changed & (NETIF_F_RXCSUM | NETIF_F_RXALL)))
e97d3207
MM		 814 return 0;
815
e825b731 816 netdev->features = features;
e97d3207
MM		 817 adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
818
819 if (netif_running(netdev))
820 e1000_reinit_locked(adapter);
821 else
822 e1000_reset(adapter);
823
b0ddfe2b 824 return 1;
e97d3207
MM		 825}
826
0e7614bc
SH		 827static const struct net_device_ops e1000_netdev_ops = {
828 .ndo_open = e1000_open,
829 .ndo_stop = e1000_close,
00829823 830 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 831 .ndo_set_rx_mode = e1000_set_rx_mode,
832 .ndo_set_mac_address = e1000_set_mac,
5622e404 833 .ndo_tx_timeout = e1000_tx_timeout,
0e7614bc 834 .ndo_change_mtu = e1000_change_mtu,
a7605370 835 .ndo_eth_ioctl = e1000_ioctl,
0e7614bc 836 .ndo_validate_addr = eth_validate_addr,
0e7614bc
SH		 837 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
838 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
839#ifdef CONFIG_NET_POLL_CONTROLLER
840 .ndo_poll_controller = e1000_netpoll,
841#endif
5622e404
JP		 842 .ndo_fix_features = e1000_fix_features,
843 .ndo_set_features = e1000_set_features,
0e7614bc
SH		 844};
845
e508be17
JB		 846/**
847 * e1000_init_hw_struct - initialize members of hw struct
848 * @adapter: board private struct
849 * @hw: structure used by e1000_hw.c
850 *
851 * Factors out initialization of the e1000_hw struct to its own function
852 * that can be called very early at init (just after struct allocation).
853 * Fields are initialized based on PCI device information and
854 * OS network device settings (MTU size).
855 * Returns negative error codes if MAC type setup fails.
856 */
857static int e1000_init_hw_struct(struct e1000_adapter *adapter,
858 struct e1000_hw *hw)
859{
860 struct pci_dev *pdev = adapter->pdev;
861
862 /* PCI config space info */
863 hw->vendor_id = pdev->vendor;
864 hw->device_id = pdev->device;
865 hw->subsystem_vendor_id = pdev->subsystem_vendor;
866 hw->subsystem_id = pdev->subsystem_device;
867 hw->revision_id = pdev->revision;
868
869 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
870
871 hw->max_frame_size = adapter->netdev->mtu +
872 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
873 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
874
875 /* identify the MAC */
876 if (e1000_set_mac_type(hw)) {
877 e_err(probe, "Unknown MAC Type\n");
878 return -EIO;
879 }
880
881 switch (hw->mac_type) {
882 default:
883 break;
884 case e1000_82541:
885 case e1000_82547:
886 case e1000_82541_rev_2:
887 case e1000_82547_rev_2:
888 hw->phy_init_script = 1;
889 break;
890 }
891
892 e1000_set_media_type(hw);
893 e1000_get_bus_info(hw);
894
895 hw->wait_autoneg_complete = false;
896 hw->tbi_compatibility_en = true;
897 hw->adaptive_ifs = true;
898
899 /* Copper options */
900
901 if (hw->media_type == e1000_media_type_copper) {
902 hw->mdix = AUTO_ALL_MODES;
903 hw->disable_polarity_correction = false;
904 hw->master_slave = E1000_MASTER_SLAVE;
905 }
906
907 return 0;
908}
909
1da177e4
LT		 910/**
911 * e1000_probe - Device Initialization Routine
912 * @pdev: PCI device information struct
913 * @ent: entry in e1000_pci_tbl
914 *
915 * Returns 0 on success, negative on failure
916 *
917 * e1000_probe initializes an adapter identified by a pci_dev structure.
918 * The OS initialization, configuring of the adapter private structure,
919 * and a hardware reset occur.
920 **/
1dd06ae8 921static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4
LT		 922{
923 struct net_device *netdev;
0b76aae7 924 struct e1000_adapter *adapter = NULL;
1dc32918 925 struct e1000_hw *hw;
2d7edb92 926
a48954c8
JW		 927 static int cards_found;
928 static int global_quad_port_a; /* global ksp3 port a indication */
2d7edb92 929 int i, err, pci_using_dac;
406874a7 930 u16 eeprom_data = 0;
5377a416 931 u16 tmp = 0;
406874a7 932 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 933 int bars, need_ioport;
0b76aae7 934 bool disable_dev = false;
0795af57 935
81250297
TI		 936 /* do not allocate ioport bars when not needed */
937 need_ioport = e1000_is_need_ioport(pdev);
938 if (need_ioport) {
939 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
940 err = pci_enable_device(pdev);
941 } else {
942 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 943 err = pci_enable_device_mem(pdev);
81250297 944 }
c7be73bc 945 if (err)
1da177e4
LT		 946 return err;
947
81250297 948 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 949 if (err)
6dd62ab0 950 goto err_pci_reg;
1da177e4
LT		 951
952 pci_set_master(pdev);
dbb5aaeb
NN		 953 err = pci_save_state(pdev);
954 if (err)
955 goto err_alloc_etherdev;
1da177e4 956
6dd62ab0 957 err = -ENOMEM;
1da177e4 958 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 959 if (!netdev)
1da177e4 960 goto err_alloc_etherdev;
1da177e4 961
1da177e4
LT		 962 SET_NETDEV_DEV(netdev, &pdev->dev);
963
964 pci_set_drvdata(pdev, netdev);
60490fe0 965 adapter = netdev_priv(netdev);
1da177e4
LT		 966 adapter->netdev = netdev;
967 adapter->pdev = pdev;
b3f4d599 968 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
81250297
TI		 969 adapter->bars = bars;
970 adapter->need_ioport = need_ioport;
1da177e4 971
1dc32918
JP		 972 hw = &adapter->hw;
973 hw->back = adapter;
974
6dd62ab0 975 err = -EIO;
275f165f 976 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 977 if (!hw->hw_addr)
1da177e4 978 goto err_ioremap;
1da177e4 979
81250297 980 if (adapter->need_ioport) {
c9c13ba4 981 for (i = BAR_1; i < PCI_STD_NUM_BARS; i++) {
81250297
TI		 982 if (pci_resource_len(pdev, i) == 0)
983 continue;
984 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
985 hw->io_base = pci_resource_start(pdev, i);
986 break;
987 }
1da177e4
LT		 988 }
989 }
990
e508be17
JB		 991 /* make ready for any if (hw->...) below */
992 err = e1000_init_hw_struct(adapter, hw);
993 if (err)
994 goto err_sw_init;
995
6cfbd97b 996 /* there is a workaround being applied below that limits
e508be17
JB		 997 * 64-bit DMA addresses to 64-bit hardware. There are some
998 * 32-bit adapters that Tx hang when given 64-bit DMA addresses
999 */
1000 pci_using_dac = 0;
1001 if ((hw->bus_type == e1000_bus_type_pcix) &&
9931a26e 1002 !dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
e508be17 1003 pci_using_dac = 1;
e508be17 1004 } else {
9931a26e 1005 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
19a0b67a
DN		 1006 if (err) {
1007 pr_err("No usable DMA config, aborting\n");
1008 goto err_dma;
1009 }
e508be17
JB		 1010 }
1011
0e7614bc 1012 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 1013 e1000_set_ethtool_ops(netdev);
1da177e4 1014 netdev->watchdog_timeo = 5 * HZ;
bea3348e 1015 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 1016
0eb5a34c 1017 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1018
1da177e4
LT		 1019 adapter->bd_number = cards_found;
1020
1021 /* setup the private structure */
1022
c7be73bc
JP		 1023 err = e1000_sw_init(adapter);
1024 if (err)
1da177e4
LT		 1025 goto err_sw_init;
1026
6dd62ab0 1027 err = -EIO;
5377a416 1028 if (hw->mac_type == e1000_ce4100) {
13acde8f
FF		 1029 hw->ce4100_gbe_mdio_base_virt =
1030 ioremap(pci_resource_start(pdev, BAR_1),
a48954c8 1031 pci_resource_len(pdev, BAR_1));
5377a416 1032
13acde8f 1033 if (!hw->ce4100_gbe_mdio_base_virt)
5377a416
DB		 1034 goto err_mdio_ioremap;
1035 }
2d7edb92 1036
1dc32918 1037 if (hw->mac_type >= e1000_82543) {
e97d3207 1038 netdev->hw_features = NETIF_F_SG |
5622e404 1039 NETIF_F_HW_CSUM |
f646968f
PM		 1040 NETIF_F_HW_VLAN_CTAG_RX;
1041 netdev->features = NETIF_F_HW_VLAN_CTAG_TX |
1042 NETIF_F_HW_VLAN_CTAG_FILTER;
1da177e4
LT		 1043 }
1044
1dc32918
JP		 1045 if ((hw->mac_type >= e1000_82544) &&
1046 (hw->mac_type != e1000_82547))
e97d3207
MM		 1047 netdev->hw_features |= NETIF_F_TSO;
1048
11a78dcf
BG		 1049 netdev->priv_flags |= IFF_SUPP_NOFCS;
1050
e97d3207 1051 netdev->features |= netdev->hw_features;
7500673b
TD		 1052 netdev->hw_features |= (NETIF_F_RXCSUM |
1053 NETIF_F_RXALL |
1054 NETIF_F_RXFCS);
2d7edb92 1055
7b872a55 1056 if (pci_using_dac) {
1da177e4 1057 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 1058 netdev->vlan_features |= NETIF_F_HIGHDMA;
1059 }
1da177e4 1060
7500673b
TD		 1061 netdev->vlan_features |= (NETIF_F_TSO |
1062 NETIF_F_HW_CSUM |
1063 NETIF_F_SG);
20501a69 1064
a22bb0b9
FR		 1065 /* Do not set IFF_UNICAST_FLT for VMWare's 82545EM */
1066 if (hw->device_id != E1000_DEV_ID_82545EM_COPPER ||
1067 hw->subsystem_vendor_id != PCI_VENDOR_ID_VMWARE)
1068 netdev->priv_flags |= IFF_UNICAST_FLT;
01789349 1069
91c527a5
JW		 1070 /* MTU range: 46 - 16110 */
1071 netdev->min_mtu = ETH_ZLEN - ETH_HLEN;
1072 netdev->max_mtu = MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
1073
1dc32918 1074 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1075
cd94dd0b 1076 /* initialize eeprom parameters */
1dc32918 1077 if (e1000_init_eeprom_params(hw)) {
feb8f478 1078 e_err(probe, "EEPROM initialization failed\n");
6dd62ab0 1079 goto err_eeprom;
cd94dd0b
AK		 1080 }
1081
96838a40 1082 /* before reading the EEPROM, reset the controller to
6cfbd97b
JK		 1083 * put the device in a known good starting state
1084 */
96838a40 1085
1dc32918 1086 e1000_reset_hw(hw);
1da177e4
LT		 1087
1088 /* make sure the EEPROM is good */
1dc32918 1089 if (e1000_validate_eeprom_checksum(hw) < 0) {
feb8f478 1090 e_err(probe, "The EEPROM Checksum Is Not Valid\n");
67b3c27c 1091 e1000_dump_eeprom(adapter);
6cfbd97b 1092 /* set MAC address to all zeroes to invalidate and temporary
67b3c27c
AK		 1093 * disable this device for the user. This blocks regular
1094 * traffic while still permitting ethtool ioctls from reaching
1095 * the hardware as well as allowing the user to run the
1096 * interface after manually setting a hw addr using
1097 * `ip set address`
1098 */
1dc32918 1099 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1100 } else {
1101 /* copy the MAC address out of the EEPROM */
1dc32918 1102 if (e1000_read_mac_addr(hw))
feb8f478 1103 e_err(probe, "EEPROM Read Error\n");
1da177e4 1104 }
dbedd44e 1105 /* don't block initialization here due to bad MAC address */
1dc32918 1106 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1107
aaeb6cdf 1108 if (!is_valid_ether_addr(netdev->dev_addr))
feb8f478 1109 e_err(probe, "Invalid MAC Address\n");
1da177e4 1110
1da177e4 1111
a4010afe
JB		 1112 INIT_DELAYED_WORK(&adapter->watchdog_task, e1000_watchdog);
1113 INIT_DELAYED_WORK(&adapter->fifo_stall_task,
1114 e1000_82547_tx_fifo_stall_task);
1115 INIT_DELAYED_WORK(&adapter->phy_info_task, e1000_update_phy_info_task);
65f27f38 1116 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1117
1da177e4
LT		 1118 e1000_check_options(adapter);
1119
1120 /* Initial Wake on LAN setting
1121 * If APM wake is enabled in the EEPROM,
1122 * enable the ACPI Magic Packet filter
1123 */
1124
1dc32918 1125 switch (hw->mac_type) {
1da177e4
LT		 1126 case e1000_82542_rev2_0:
1127 case e1000_82542_rev2_1:
1128 case e1000_82543:
1129 break;
1130 case e1000_82544:
1dc32918 1131 e1000_read_eeprom(hw,
1da177e4
LT		 1132 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1133 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1134 break;
1135 case e1000_82546:
1136 case e1000_82546_rev_3:
a48954c8 1137 if (er32(STATUS) & E1000_STATUS_FUNC_1) {
1dc32918 1138 e1000_read_eeprom(hw,
1da177e4
LT		 1139 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1140 break;
1141 }
5463fce6 1142 fallthrough;
1da177e4 1143 default:
1dc32918 1144 e1000_read_eeprom(hw,
1da177e4
LT		 1145 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1146 break;
1147 }
96838a40 1148 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1149 adapter->eeprom_wol |= E1000_WUFC_MAG;
1150
1151 /* now that we have the eeprom settings, apply the special cases
1152 * where the eeprom may be wrong or the board simply won't support
6cfbd97b
JK		 1153 * wake on lan on a particular port
1154 */
120cd576
JB		 1155 switch (pdev->device) {
1156 case E1000_DEV_ID_82546GB_PCIE:
1157 adapter->eeprom_wol = 0;
1158 break;
1159 case E1000_DEV_ID_82546EB_FIBER:
1160 case E1000_DEV_ID_82546GB_FIBER:
120cd576 1161 /* Wake events only supported on port A for dual fiber
6cfbd97b
JK		 1162 * regardless of eeprom setting
1163 */
1dc32918 1164 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1165 adapter->eeprom_wol = 0;
1166 break;
1167 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1168 /* if quad port adapter, disable WoL on all but port A */
1169 if (global_quad_port_a != 0)
1170 adapter->eeprom_wol = 0;
1171 else
3db1cd5c 1172 adapter->quad_port_a = true;
120cd576
JB		 1173 /* Reset for multiple quad port adapters */
1174 if (++global_quad_port_a == 4)
1175 global_quad_port_a = 0;
1176 break;
1177 }
1178
1179 /* initialize the wol settings based on the eeprom settings */
1180 adapter->wol = adapter->eeprom_wol;
de126489 1181 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1182
5377a416
DB		 1183 /* Auto detect PHY address */
1184 if (hw->mac_type == e1000_ce4100) {
1185 for (i = 0; i < 32; i++) {
1186 hw->phy_addr = i;
1187 e1000_read_phy_reg(hw, PHY_ID2, &tmp);
4e01f3a8
JS		 1188
1189 if (tmp != 0 && tmp != 0xFF)
5377a416
DB		 1190 break;
1191 }
4e01f3a8
JS		 1192
1193 if (i >= 32)
1194 goto err_eeprom;
5377a416
DB		 1195 }
1196
675ad473
ET		 1197 /* reset the hardware with the new settings */
1198 e1000_reset(adapter);
1199
1200 strcpy(netdev->name, "eth%d");
1201 err = register_netdev(netdev);
1202 if (err)
1203 goto err_register;
1204
52f5509f 1205 e1000_vlan_filter_on_off(adapter, false);
5622e404 1206
fb3d47d4 1207 /* print bus type/speed/width info */
feb8f478 1208 e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n",
7837e58c
JP		 1209 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1210 ((hw->bus_speed == e1000_bus_speed_133) ? 133 :
1211 (hw->bus_speed == e1000_bus_speed_120) ? 120 :
1212 (hw->bus_speed == e1000_bus_speed_100) ? 100 :
1213 (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33),
1214 ((hw->bus_width == e1000_bus_width_64) ? 64 : 32),
1215 netdev->dev_addr);
1314bbf3 1216
eb62efd2
JB		 1217 /* carrier off reporting is important to ethtool even BEFORE open */
1218 netif_carrier_off(netdev);
1219
feb8f478 1220 e_info(probe, "Intel(R) PRO/1000 Network Connection\n");
1da177e4
LT		 1221
1222 cards_found++;
1223 return 0;
1224
1225err_register:
6dd62ab0 1226err_eeprom:
1532ecea 1227 e1000_phy_hw_reset(hw);
6dd62ab0 1228
1dc32918
JP		 1229 if (hw->flash_address)
1230 iounmap(hw->flash_address);
6dd62ab0
VA		 1231 kfree(adapter->tx_ring);
1232 kfree(adapter->rx_ring);
e508be17 1233err_dma:
1da177e4 1234err_sw_init:
5377a416 1235err_mdio_ioremap:
13acde8f 1236 iounmap(hw->ce4100_gbe_mdio_base_virt);
1dc32918 1237 iounmap(hw->hw_addr);
1da177e4 1238err_ioremap:
0b76aae7 1239 disable_dev = !test_and_set_bit(__E1000_DISABLED, &adapter->flags);
1da177e4
LT		 1240 free_netdev(netdev);
1241err_alloc_etherdev:
81250297 1242 pci_release_selected_regions(pdev, bars);
6dd62ab0 1243err_pci_reg:
0b76aae7
TD		 1244 if (!adapter || disable_dev)
1245 pci_disable_device(pdev);
1da177e4
LT		 1246 return err;
1247}
1248
1249/**
1250 * e1000_remove - Device Removal Routine
1251 * @pdev: PCI device information struct
1252 *
1253 * e1000_remove is called by the PCI subsystem to alert the driver
b6fad9f9 1254 * that it should release a PCI device. That could be caused by a
1da177e4
LT		 1255 * Hot-Plug event, or because the driver is going to be removed from
1256 * memory.
1257 **/
9f9a12f8 1258static void e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1259{
1260 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1261 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1262 struct e1000_hw *hw = &adapter->hw;
0b76aae7 1263 bool disable_dev;
1da177e4 1264
a4010afe 1265 e1000_down_and_stop(adapter);
0fccd0e9 1266 e1000_release_manageability(adapter);
1da177e4 1267
bea3348e
SH		 1268 unregister_netdev(netdev);
1269
1532ecea 1270 e1000_phy_hw_reset(hw);
1da177e4 1271
24025e4e
MC		 1272 kfree(adapter->tx_ring);
1273 kfree(adapter->rx_ring);
24025e4e 1274
1c26750c 1275 if (hw->mac_type == e1000_ce4100)
13acde8f 1276 iounmap(hw->ce4100_gbe_mdio_base_virt);
1dc32918
JP		 1277 iounmap(hw->hw_addr);
1278 if (hw->flash_address)
1279 iounmap(hw->flash_address);
81250297 1280 pci_release_selected_regions(pdev, adapter->bars);
1da177e4 1281
0b76aae7 1282 disable_dev = !test_and_set_bit(__E1000_DISABLED, &adapter->flags);
1da177e4
LT		 1283 free_netdev(netdev);
1284
0b76aae7
TD		 1285 if (disable_dev)
1286 pci_disable_device(pdev);
1da177e4
LT		 1287}
1288
1289/**
1290 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1291 * @adapter: board private structure to initialize
1292 *
1293 * e1000_sw_init initializes the Adapter private data structure.
e508be17 1294 * e1000_init_hw_struct MUST be called before this function
1da177e4 1295 **/
9f9a12f8 1296static int e1000_sw_init(struct e1000_adapter *adapter)
1da177e4 1297{
eb0f8054 1298 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4 1299
f56799ea
JK		 1300 adapter->num_tx_queues = 1;
1301 adapter->num_rx_queues = 1;
581d708e
MC		 1302
1303 if (e1000_alloc_queues(adapter)) {
feb8f478 1304 e_err(probe, "Unable to allocate memory for queues\n");
581d708e
MC		 1305 return -ENOMEM;
1306 }
1307
47313054 1308 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1309 e1000_irq_disable(adapter);
1310
1da177e4 1311 spin_lock_init(&adapter->stats_lock);
1da177e4 1312
1314bbf3
AK		 1313 set_bit(__E1000_DOWN, &adapter->flags);
1314
1da177e4
LT		 1315 return 0;
1316}
1317
581d708e
MC		 1318/**
1319 * e1000_alloc_queues - Allocate memory for all rings
1320 * @adapter: board private structure to initialize
1321 *
1322 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1323 * number of queues at compile-time.
581d708e 1324 **/
9f9a12f8 1325static int e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1326{
1c7e5b12 1327 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
a48954c8 1328 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1329 if (!adapter->tx_ring)
1330 return -ENOMEM;
581d708e 1331
1c7e5b12 1332 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
a48954c8 1333 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1334 if (!adapter->rx_ring) {
1335 kfree(adapter->tx_ring);
1336 return -ENOMEM;
1337 }
581d708e 1338
581d708e
MC		 1339 return E1000_SUCCESS;
1340}
1341
1da177e4
LT		 1342/**
1343 * e1000_open - Called when a network interface is made active
1344 * @netdev: network interface device structure
1345 *
1346 * Returns 0 on success, negative value on failure
1347 *
1348 * The open entry point is called when a network interface is made
1349 * active by the system (IFF_UP). At this point all resources needed
1350 * for transmit and receive operations are allocated, the interrupt
a4010afe 1351 * handler is registered with the OS, the watchdog task is started,
1da177e4
LT		 1352 * and the stack is notified that the interface is ready.
1353 **/
1f2f83f8 1354int e1000_open(struct net_device *netdev)
1da177e4 1355{
60490fe0 1356 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1357 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1358 int err;
1359
2db10a08 1360 /* disallow open during test */
1314bbf3 1361 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1362 return -EBUSY;
1363
eb62efd2
JB		 1364 netif_carrier_off(netdev);
1365
1da177e4 1366 /* allocate transmit descriptors */
e0aac5a2
AK		 1367 err = e1000_setup_all_tx_resources(adapter);
1368 if (err)
1da177e4
LT		 1369 goto err_setup_tx;
1370
1371 /* allocate receive descriptors */
e0aac5a2 1372 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1373 if (err)
e0aac5a2 1374 goto err_setup_rx;
b5bf28cd 1375
79f05bf0
AK		 1376 e1000_power_up_phy(adapter);
1377
2d7edb92 1378 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1379 if ((hw->mng_cookie.status &
2d7edb92
MC		 1380 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1381 e1000_update_mng_vlan(adapter);
1382 }
1da177e4 1383
e0aac5a2
AK		 1384 /* before we allocate an interrupt, we must be ready to handle it.
1385 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1386 * as soon as we call pci_request_irq, so we have to setup our
6cfbd97b
JK		 1387 * clean_rx handler before we do so.
1388 */
e0aac5a2
AK		 1389 e1000_configure(adapter);
1390
1391 err = e1000_request_irq(adapter);
1392 if (err)
1393 goto err_req_irq;
1394
1395 /* From here on the code is the same as e1000_up() */
1396 clear_bit(__E1000_DOWN, &adapter->flags);
1397
bea3348e 1398 napi_enable(&adapter->napi);
47313054 1399
e0aac5a2
AK		 1400 e1000_irq_enable(adapter);
1401
076152d5
BH		 1402 netif_start_queue(netdev);
1403
e0aac5a2 1404 /* fire a link status change interrupt to start the watchdog */
1dc32918 1405 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1406
1da177e4
LT		 1407 return E1000_SUCCESS;
1408
b5bf28cd 1409err_req_irq:
e0aac5a2 1410 e1000_power_down_phy(adapter);
581d708e 1411 e1000_free_all_rx_resources(adapter);
1da177e4 1412err_setup_rx:
581d708e 1413 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1414err_setup_tx:
1415 e1000_reset(adapter);
1416
1417 return err;
1418}
1419
1420/**
1421 * e1000_close - Disables a network interface
1422 * @netdev: network interface device structure
1423 *
1424 * Returns 0, this is not allowed to fail
1425 *
1426 * The close entry point is called when an interface is de-activated
1427 * by the OS. The hardware is still under the drivers control, but
1428 * needs to be disabled. A global MAC reset is issued to stop the
1429 * hardware, and all transmit and receive resources are freed.
1430 **/
1f2f83f8 1431int e1000_close(struct net_device *netdev)
1da177e4 1432{
60490fe0 1433 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1434 struct e1000_hw *hw = &adapter->hw;
6a7d64e3 1435 int count = E1000_CHECK_RESET_COUNT;
1436
49ee3c2a 1437 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags) && count--)
6a7d64e3 1438 usleep_range(10000, 20000);
1da177e4 1439
49ee3c2a
AD		 1440 WARN_ON(count < 0);
1441
1442 /* signal that we're down so that the reset task will no longer run */
1443 set_bit(__E1000_DOWN, &adapter->flags);
1444 clear_bit(__E1000_RESETTING, &adapter->flags);
1445
1da177e4 1446 e1000_down(adapter);
79f05bf0 1447 e1000_power_down_phy(adapter);
2db10a08 1448 e1000_free_irq(adapter);
1da177e4 1449
581d708e
MC		 1450 e1000_free_all_tx_resources(adapter);
1451 e1000_free_all_rx_resources(adapter);
1da177e4 1452
4666560a 1453 /* kill manageability vlan ID if supported, but not if a vlan with
6cfbd97b
JK		 1454 * the same ID is registered on the host OS (let 8021q kill it)
1455 */
1dc32918 1456 if ((hw->mng_cookie.status &
6cfbd97b
JK		 1457 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1458 !test_bit(adapter->mng_vlan_id, adapter->active_vlans)) {
80d5c368
PM		 1459 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
1460 adapter->mng_vlan_id);
2d7edb92 1461 }
b55ccb35 1462
1da177e4
LT		 1463 return 0;
1464}
1465
1466/**
1467 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1468 * @adapter: address of board private structure
2d7edb92
MC		 1469 * @start: address of beginning of memory
1470 * @len: length of memory
1da177e4 1471 **/
64798845
JP		 1472static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1473 unsigned long len)
1da177e4 1474{
1dc32918 1475 struct e1000_hw *hw = &adapter->hw;
e982f17c 1476 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1477 unsigned long end = begin + len;
1478
2648345f 1479 /* First rev 82545 and 82546 need to not allow any memory
6cfbd97b
JK		 1480 * write location to cross 64k boundary due to errata 23
1481 */
1dc32918 1482 if (hw->mac_type == e1000_82545 ||
5377a416 1483 hw->mac_type == e1000_ce4100 ||
1dc32918 1484 hw->mac_type == e1000_82546) {
c95576a3 1485 return ((begin ^ (end - 1)) >> 16) == 0;
1da177e4
LT		 1486 }
1487
c3033b01 1488 return true;
1da177e4
LT		 1489}
1490
1491/**
1492 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1493 * @adapter: board private structure
581d708e 1494 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1495 *
1496 * Return 0 on success, negative on failure
1497 **/
64798845
JP		 1498static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1499 struct e1000_tx_ring *txdr)
1da177e4 1500{
1da177e4
LT		 1501 struct pci_dev *pdev = adapter->pdev;
1502 int size;
1503
580f321d 1504 size = sizeof(struct e1000_tx_buffer) * txdr->count;
89bf67f1 1505 txdr->buffer_info = vzalloc(size);
14f8dc49 1506 if (!txdr->buffer_info)
1da177e4 1507 return -ENOMEM;
1da177e4
LT		 1508
1509 /* round up to nearest 4K */
1510
1511 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1512 txdr->size = ALIGN(txdr->size, 4096);
1da177e4 1513
b16f53be
NN		 1514 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1515 GFP_KERNEL);
96838a40 1516 if (!txdr->desc) {
1da177e4 1517setup_tx_desc_die:
1da177e4
LT		 1518 vfree(txdr->buffer_info);
1519 return -ENOMEM;
1520 }
1521
2648345f 1522 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1523 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1524 void *olddesc = txdr->desc;
1525 dma_addr_t olddma = txdr->dma;
feb8f478 1526 e_err(tx_err, "txdr align check failed: %u bytes at %p\n",
675ad473 1527 txdr->size, txdr->desc);
2648345f 1528 /* Try again, without freeing the previous */
b16f53be
NN		 1529 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
1530 &txdr->dma, GFP_KERNEL);
2648345f 1531 /* Failed allocation, critical failure */
96838a40 1532 if (!txdr->desc) {
b16f53be
NN		 1533 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1534 olddma);
1da177e4
LT		 1535 goto setup_tx_desc_die;
1536 }
1537
1538 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1539 /* give up */
b16f53be
NN		 1540 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
1541 txdr->dma);
1542 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1543 olddma);
feb8f478 1544 e_err(probe, "Unable to allocate aligned memory "
675ad473 1545 "for the transmit descriptor ring\n");
1da177e4
LT		 1546 vfree(txdr->buffer_info);
1547 return -ENOMEM;
1548 } else {
2648345f 1549 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1550 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1551 olddma);
1da177e4
LT		 1552 }
1553 }
1554 memset(txdr->desc, 0, txdr->size);
1555
1556 txdr->next_to_use = 0;
1557 txdr->next_to_clean = 0;
1558
1559 return 0;
1560}
1561
581d708e
MC		 1562/**
1563 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1564 * (Descriptors) for all queues
1565 * @adapter: board private structure
1566 *
581d708e
MC		 1567 * Return 0 on success, negative on failure
1568 **/
64798845 1569int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1570{
1571 int i, err = 0;
1572
f56799ea 1573 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1574 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1575 if (err) {
feb8f478 1576 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1577 for (i-- ; i >= 0; i--)
1578 e1000_free_tx_resources(adapter,
1579 &adapter->tx_ring[i]);
581d708e
MC		 1580 break;
1581 }
1582 }
1583
1584 return err;
1585}
1586
1da177e4
LT		 1587/**
1588 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1589 * @adapter: board private structure
1590 *
1591 * Configure the Tx unit of the MAC after a reset.
1592 **/
64798845 1593static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1594{
406874a7 1595 u64 tdba;
581d708e 1596 struct e1000_hw *hw = &adapter->hw;
1532ecea 1597 u32 tdlen, tctl, tipg;
406874a7 1598 u32 ipgr1, ipgr2;
1da177e4
LT		 1599
1600 /* Setup the HW Tx Head and Tail descriptor pointers */
1601
f56799ea 1602 switch (adapter->num_tx_queues) {
24025e4e
MC		 1603 case 1:
1604 default:
581d708e
MC		 1605 tdba = adapter->tx_ring[0].dma;
1606 tdlen = adapter->tx_ring[0].count *
1607 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1608 ew32(TDLEN, tdlen);
1609 ew32(TDBAH, (tdba >> 32));
1610 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1611 ew32(TDT, 0);
1612 ew32(TDH, 0);
6cfbd97b
JK		 1613 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ?
1614 E1000_TDH : E1000_82542_TDH);
1615 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ?
1616 E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1617 break;
1618 }
1da177e4
LT		 1619
1620 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1621 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1622 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1623 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1624 else
1625 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1626
581d708e 1627 switch (hw->mac_type) {
1da177e4
LT		 1628 case e1000_82542_rev2_0:
1629 case e1000_82542_rev2_1:
1630 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1631 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1632 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1633 break;
1634 default:
0fadb059
JK		 1635 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1636 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1637 break;
1da177e4 1638 }
0fadb059
JK		 1639 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1640 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1641 ew32(TIPG, tipg);
1da177e4
LT		 1642
1643 /* Set the Tx Interrupt Delay register */
1644
1dc32918 1645 ew32(TIDV, adapter->tx_int_delay);
581d708e 1646 if (hw->mac_type >= e1000_82540)
1dc32918 1647 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1648
1649 /* Program the Transmit Control Register */
1650
1dc32918 1651 tctl = er32(TCTL);
1da177e4 1652 tctl &= ~E1000_TCTL_CT;
7e6c9861 1653 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1654 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1655
581d708e 1656 e1000_config_collision_dist(hw);
1da177e4
LT		 1657
1658 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1659 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1660
1661 /* only set IDE if we are delaying interrupts using the timers */
1662 if (adapter->tx_int_delay)
1663 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1664
581d708e 1665 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1666 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1667 else
1668 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1669
1670 /* Cache if we're 82544 running in PCI-X because we'll
6cfbd97b
JK		 1671 * need this to apply a workaround later in the send path.
1672 */
581d708e
MC		 1673 if (hw->mac_type == e1000_82544 &&
1674 hw->bus_type == e1000_bus_type_pcix)
3db1cd5c 1675 adapter->pcix_82544 = true;
7e6c9861 1676
1dc32918 1677 ew32(TCTL, tctl);
7e6c9861 1678
1da177e4
LT		 1679}
1680
1681/**
1682 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1683 * @adapter: board private structure
581d708e 1684 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1685 *
1686 * Returns 0 on success, negative on failure
1687 **/
64798845
JP		 1688static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1689 struct e1000_rx_ring *rxdr)
1da177e4 1690{
1da177e4 1691 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1692 int size, desc_len;
1da177e4 1693
93f0afe9 1694 size = sizeof(struct e1000_rx_buffer) * rxdr->count;
89bf67f1 1695 rxdr->buffer_info = vzalloc(size);
14f8dc49 1696 if (!rxdr->buffer_info)
1da177e4 1697 return -ENOMEM;
1da177e4 1698
1532ecea 1699 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1700
1da177e4
LT		 1701 /* Round up to nearest 4K */
1702
2d7edb92 1703 rxdr->size = rxdr->count * desc_len;
9099cfb9 1704 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4 1705
b16f53be
NN		 1706 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1707 GFP_KERNEL);
581d708e 1708 if (!rxdr->desc) {
1da177e4 1709setup_rx_desc_die:
1da177e4
LT		 1710 vfree(rxdr->buffer_info);
1711 return -ENOMEM;
1712 }
1713
2648345f 1714 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1715 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1716 void *olddesc = rxdr->desc;
1717 dma_addr_t olddma = rxdr->dma;
feb8f478 1718 e_err(rx_err, "rxdr align check failed: %u bytes at %p\n",
675ad473 1719 rxdr->size, rxdr->desc);
2648345f 1720 /* Try again, without freeing the previous */
b16f53be
NN		 1721 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size,
1722 &rxdr->dma, GFP_KERNEL);
2648345f 1723 /* Failed allocation, critical failure */
581d708e 1724 if (!rxdr->desc) {
b16f53be
NN		 1725 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1726 olddma);
1da177e4
LT		 1727 goto setup_rx_desc_die;
1728 }
1729
1730 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1731 /* give up */
b16f53be
NN		 1732 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
1733 rxdr->dma);
1734 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1735 olddma);
feb8f478
ET		 1736 e_err(probe, "Unable to allocate aligned memory for "
1737 "the Rx descriptor ring\n");
581d708e 1738 goto setup_rx_desc_die;
1da177e4 1739 } else {
2648345f 1740 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1741 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1742 olddma);
1da177e4
LT		 1743 }
1744 }
1745 memset(rxdr->desc, 0, rxdr->size);
1746
1747 rxdr->next_to_clean = 0;
1748 rxdr->next_to_use = 0;
edbbb3ca 1749 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1750
1751 return 0;
1752}
1753
581d708e
MC		 1754/**
1755 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1756 * (Descriptors) for all queues
1757 * @adapter: board private structure
1758 *
581d708e
MC		 1759 * Return 0 on success, negative on failure
1760 **/
64798845 1761int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1762{
1763 int i, err = 0;
1764
f56799ea 1765 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1766 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1767 if (err) {
feb8f478 1768 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1769 for (i-- ; i >= 0; i--)
1770 e1000_free_rx_resources(adapter,
1771 &adapter->rx_ring[i]);
581d708e
MC		 1772 break;
1773 }
1774 }
1775
1776 return err;
1777}
1778
1da177e4 1779/**
2648345f 1780 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1781 * @adapter: Board private structure
1782 **/
64798845 1783static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1784{
1dc32918 1785 struct e1000_hw *hw = &adapter->hw;
630b25cd 1786 u32 rctl;
1da177e4 1787
1dc32918 1788 rctl = er32(RCTL);
1da177e4
LT		 1789
1790 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1791
d5bc77a2
DN		 1792 rctl |= E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
1793 E1000_RCTL_RDMTS_HALF |
1dc32918 1794 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1795
1dc32918 1796 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1797 rctl |= E1000_RCTL_SBP;
1798 else
1799 rctl &= ~E1000_RCTL_SBP;
1800
2d7edb92
MC		 1801 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1802 rctl &= ~E1000_RCTL_LPE;
1803 else
1804 rctl |= E1000_RCTL_LPE;
1805
1da177e4 1806 /* Setup buffer sizes */
9e2feace
AK		 1807 rctl &= ~E1000_RCTL_SZ_4096;
1808 rctl |= E1000_RCTL_BSEX;
1809 switch (adapter->rx_buffer_len) {
a48954c8
JW		 1810 case E1000_RXBUFFER_2048:
1811 default:
1812 rctl |= E1000_RCTL_SZ_2048;
1813 rctl &= ~E1000_RCTL_BSEX;
1814 break;
1815 case E1000_RXBUFFER_4096:
1816 rctl |= E1000_RCTL_SZ_4096;
1817 break;
1818 case E1000_RXBUFFER_8192:
1819 rctl |= E1000_RCTL_SZ_8192;
1820 break;
1821 case E1000_RXBUFFER_16384:
1822 rctl |= E1000_RCTL_SZ_16384;
1823 break;
2d7edb92
MC		 1824 }
1825
e825b731
BG		 1826 /* This is useful for sniffing bad packets. */
1827 if (adapter->netdev->features & NETIF_F_RXALL) {
1828 /* UPE and MPE will be handled by normal PROMISC logic
6cfbd97b
JK		 1829 * in e1000e_set_rx_mode
1830 */
e825b731
BG		 1831 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
1832 E1000_RCTL_BAM | /* RX All Bcast Pkts */
1833 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
1834
1835 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
1836 E1000_RCTL_DPF | /* Allow filtered pause */
1837 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
1838 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
1839 * and that breaks VLANs.
1840 */
1841 }
1842
1dc32918 1843 ew32(RCTL, rctl);
1da177e4
LT		 1844}
1845
1846/**
1847 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1848 * @adapter: board private structure
1849 *
1850 * Configure the Rx unit of the MAC after a reset.
1851 **/
64798845 1852static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1853{
406874a7 1854 u64 rdba;
581d708e 1855 struct e1000_hw *hw = &adapter->hw;
1532ecea 1856 u32 rdlen, rctl, rxcsum;
2d7edb92 1857
edbbb3ca
JB		 1858 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1859 rdlen = adapter->rx_ring[0].count *
a48954c8 1860 sizeof(struct e1000_rx_desc);
edbbb3ca
JB		 1861 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1862 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1863 } else {
1864 rdlen = adapter->rx_ring[0].count *
a48954c8 1865 sizeof(struct e1000_rx_desc);
edbbb3ca
JB		 1866 adapter->clean_rx = e1000_clean_rx_irq;
1867 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1868 }
1da177e4
LT		 1869
1870 /* disable receives while setting up the descriptors */
1dc32918
JP		 1871 rctl = er32(RCTL);
1872 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1873
1874 /* set the Receive Delay Timer Register */
1dc32918 1875 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1876
581d708e 1877 if (hw->mac_type >= e1000_82540) {
1dc32918 1878 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1879 if (adapter->itr_setting != 0)
1dc32918 1880 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1881 }
1882
581d708e 1883 /* Setup the HW Rx Head and Tail Descriptor Pointers and
6cfbd97b
JK		 1884 * the Base and Length of the Rx Descriptor Ring
1885 */
f56799ea 1886 switch (adapter->num_rx_queues) {
24025e4e
MC		 1887 case 1:
1888 default:
581d708e 1889 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 1890 ew32(RDLEN, rdlen);
1891 ew32(RDBAH, (rdba >> 32));
1892 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1893 ew32(RDT, 0);
1894 ew32(RDH, 0);
6cfbd97b
JK		 1895 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ?
1896 E1000_RDH : E1000_82542_RDH);
1897 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ?
1898 E1000_RDT : E1000_82542_RDT);
581d708e 1899 break;
24025e4e
MC		 1900 }
1901
1da177e4 1902 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1903 if (hw->mac_type >= e1000_82543) {
1dc32918 1904 rxcsum = er32(RXCSUM);
630b25cd 1905 if (adapter->rx_csum)
2d7edb92 1906 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1907 else
2d7edb92 1908 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1909 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1910 ew32(RXCSUM, rxcsum);
1da177e4
LT		 1911 }
1912
1913 /* Enable Receives */
d5bc77a2 1914 ew32(RCTL, rctl | E1000_RCTL_EN);
1da177e4
LT		 1915}
1916
1917/**
581d708e 1918 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1919 * @adapter: board private structure
581d708e 1920 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1921 *
1922 * Free all transmit software resources
1923 **/
64798845
JP		 1924static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1925 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1926{
1927 struct pci_dev *pdev = adapter->pdev;
1928
581d708e 1929 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1930
581d708e
MC		 1931 vfree(tx_ring->buffer_info);
1932 tx_ring->buffer_info = NULL;
1da177e4 1933
b16f53be
NN		 1934 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1935 tx_ring->dma);
1da177e4 1936
581d708e
MC		 1937 tx_ring->desc = NULL;
1938}
1939
1940/**
1941 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1942 * @adapter: board private structure
1943 *
1944 * Free all transmit software resources
1945 **/
64798845 1946void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1947{
1948 int i;
1949
f56799ea 1950 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1951 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1952}
1953
580f321d
FW		 1954static void
1955e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1956 struct e1000_tx_buffer *buffer_info)
1da177e4 1957{
602c0554
AD		 1958 if (buffer_info->dma) {
1959 if (buffer_info->mapped_as_page)
b16f53be
NN		 1960 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1961 buffer_info->length, DMA_TO_DEVICE);
602c0554 1962 else
b16f53be 1963 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
602c0554 1964 buffer_info->length,
b16f53be 1965 DMA_TO_DEVICE);
602c0554
AD		 1966 buffer_info->dma = 0;
1967 }
a9ebadd6 1968 if (buffer_info->skb) {
1da177e4 1969 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 1970 buffer_info->skb = NULL;
1971 }
37e73df8 1972 buffer_info->time_stamp = 0;
a9ebadd6 1973 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 1974}
1975
1976/**
1977 * e1000_clean_tx_ring - Free Tx Buffers
1978 * @adapter: board private structure
581d708e 1979 * @tx_ring: ring to be cleaned
1da177e4 1980 **/
64798845
JP		 1981static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1982 struct e1000_tx_ring *tx_ring)
1da177e4 1983{
1dc32918 1984 struct e1000_hw *hw = &adapter->hw;
580f321d 1985 struct e1000_tx_buffer *buffer_info;
1da177e4
LT		 1986 unsigned long size;
1987 unsigned int i;
1988
1989 /* Free all the Tx ring sk_buffs */
1990
96838a40 1991 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1992 buffer_info = &tx_ring->buffer_info[i];
1993 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1994 }
1995
2f66fd36 1996 netdev_reset_queue(adapter->netdev);
580f321d 1997 size = sizeof(struct e1000_tx_buffer) * tx_ring->count;
1da177e4
LT		 1998 memset(tx_ring->buffer_info, 0, size);
1999
2000 /* Zero out the descriptor ring */
2001
2002 memset(tx_ring->desc, 0, tx_ring->size);
2003
2004 tx_ring->next_to_use = 0;
2005 tx_ring->next_to_clean = 0;
3db1cd5c 2006 tx_ring->last_tx_tso = false;
1da177e4 2007
1dc32918
JP		 2008 writel(0, hw->hw_addr + tx_ring->tdh);
2009 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2010}
2011
2012/**
2013 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2014 * @adapter: board private structure
2015 **/
64798845 2016static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2017{
2018 int i;
2019
f56799ea 2020 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2021 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2022}
2023
2024/**
2025 * e1000_free_rx_resources - Free Rx Resources
2026 * @adapter: board private structure
581d708e 2027 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2028 *
2029 * Free all receive software resources
2030 **/
64798845
JP		 2031static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2032 struct e1000_rx_ring *rx_ring)
1da177e4 2033{
1da177e4
LT		 2034 struct pci_dev *pdev = adapter->pdev;
2035
581d708e 2036 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2037
2038 vfree(rx_ring->buffer_info);
2039 rx_ring->buffer_info = NULL;
2040
b16f53be
NN		 2041 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2042 rx_ring->dma);
1da177e4
LT		 2043
2044 rx_ring->desc = NULL;
2045}
2046
2047/**
581d708e 2048 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2049 * @adapter: board private structure
581d708e
MC		 2050 *
2051 * Free all receive software resources
2052 **/
64798845 2053void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2054{
2055 int i;
2056
f56799ea 2057 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2058 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2059}
2060
13809609
FW		 2061#define E1000_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN)
2062static unsigned int e1000_frag_len(const struct e1000_adapter *a)
2063{
2064 return SKB_DATA_ALIGN(a->rx_buffer_len + E1000_HEADROOM) +
2065 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
2066}
2067
2068static void *e1000_alloc_frag(const struct e1000_adapter *a)
2069{
2070 unsigned int len = e1000_frag_len(a);
2071 u8 *data = netdev_alloc_frag(len);
2072
2073 if (likely(data))
2074 data += E1000_HEADROOM;
2075 return data;
2076}
2077
581d708e
MC		 2078/**
2079 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2080 * @adapter: board private structure
2081 * @rx_ring: ring to free buffers from
1da177e4 2082 **/
64798845
JP		 2083static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2084 struct e1000_rx_ring *rx_ring)
1da177e4 2085{
1dc32918 2086 struct e1000_hw *hw = &adapter->hw;
93f0afe9 2087 struct e1000_rx_buffer *buffer_info;
1da177e4
LT		 2088 struct pci_dev *pdev = adapter->pdev;
2089 unsigned long size;
630b25cd 2090 unsigned int i;
1da177e4 2091
13809609 2092 /* Free all the Rx netfrags */
96838a40 2093 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2094 buffer_info = &rx_ring->buffer_info[i];
13809609
FW		 2095 if (adapter->clean_rx == e1000_clean_rx_irq) {
2096 if (buffer_info->dma)
2097 dma_unmap_single(&pdev->dev, buffer_info->dma,
2098 adapter->rx_buffer_len,
2099 DMA_FROM_DEVICE);
2100 if (buffer_info->rxbuf.data) {
6bf93ba8 2101 skb_free_frag(buffer_info->rxbuf.data);
13809609
FW		 2102 buffer_info->rxbuf.data = NULL;
2103 }
2104 } else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
2105 if (buffer_info->dma)
2106 dma_unmap_page(&pdev->dev, buffer_info->dma,
2107 adapter->rx_buffer_len,
2108 DMA_FROM_DEVICE);
2109 if (buffer_info->rxbuf.page) {
2110 put_page(buffer_info->rxbuf.page);
2111 buffer_info->rxbuf.page = NULL;
2112 }
679be3ba 2113 }
1da177e4 2114
679be3ba 2115 buffer_info->dma = 0;
1da177e4
LT		 2116 }
2117
edbbb3ca 2118 /* there also may be some cached data from a chained receive */
de591c78
FW		 2119 napi_free_frags(&adapter->napi);
2120 rx_ring->rx_skb_top = NULL;
edbbb3ca 2121
93f0afe9 2122 size = sizeof(struct e1000_rx_buffer) * rx_ring->count;
1da177e4
LT		 2123 memset(rx_ring->buffer_info, 0, size);
2124
2125 /* Zero out the descriptor ring */
1da177e4
LT		 2126 memset(rx_ring->desc, 0, rx_ring->size);
2127
2128 rx_ring->next_to_clean = 0;
2129 rx_ring->next_to_use = 0;
2130
1dc32918
JP		 2131 writel(0, hw->hw_addr + rx_ring->rdh);
2132 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2133}
2134
2135/**
2136 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2137 * @adapter: board private structure
2138 **/
64798845 2139static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2140{
2141 int i;
2142
f56799ea 2143 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2144 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2145}
2146
2147/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2148 * and memory write and invalidate disabled for certain operations
2149 */
64798845 2150static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2151{
1dc32918 2152 struct e1000_hw *hw = &adapter->hw;
1da177e4 2153 struct net_device *netdev = adapter->netdev;
406874a7 2154 u32 rctl;
1da177e4 2155
1dc32918 2156 e1000_pci_clear_mwi(hw);
1da177e4 2157
1dc32918 2158 rctl = er32(RCTL);
1da177e4 2159 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2160 ew32(RCTL, rctl);
2161 E1000_WRITE_FLUSH();
1da177e4
LT		 2162 mdelay(5);
2163
96838a40 2164 if (netif_running(netdev))
581d708e 2165 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2166}
2167
64798845 2168static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2169{
1dc32918 2170 struct e1000_hw *hw = &adapter->hw;
1da177e4 2171 struct net_device *netdev = adapter->netdev;
406874a7 2172 u32 rctl;
1da177e4 2173
1dc32918 2174 rctl = er32(RCTL);
1da177e4 2175 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2176 ew32(RCTL, rctl);
2177 E1000_WRITE_FLUSH();
1da177e4
LT		 2178 mdelay(5);
2179
1dc32918
JP		 2180 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2181 e1000_pci_set_mwi(hw);
1da177e4 2182
96838a40 2183 if (netif_running(netdev)) {
72d64a43
JK		 2184 /* No need to loop, because 82542 supports only 1 queue */
2185 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2186 e1000_configure_rx(adapter);
72d64a43 2187 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2188 }
2189}
2190
2191/**
2192 * e1000_set_mac - Change the Ethernet Address of the NIC
2193 * @netdev: network interface device structure
2194 * @p: pointer to an address structure
2195 *
2196 * Returns 0 on success, negative on failure
2197 **/
64798845 2198static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2199{
60490fe0 2200 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2201 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2202 struct sockaddr *addr = p;
2203
96838a40 2204 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2205 return -EADDRNOTAVAIL;
2206
2207 /* 82542 2.0 needs to be in reset to write receive address registers */
2208
1dc32918 2209 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2210 e1000_enter_82542_rst(adapter);
2211
2212 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2213 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2214
1dc32918 2215 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2216
1dc32918 2217 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2218 e1000_leave_82542_rst(adapter);
2219
2220 return 0;
2221}
2222
2223/**
db0ce50d 2224 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2225 * @netdev: network interface device structure
2226 *
db0ce50d
PM		 2227 * The set_rx_mode entry point is called whenever the unicast or multicast
2228 * address lists or the network interface flags are updated. This routine is
2229 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2230 * promiscuous mode, and all-multi behavior.
2231 **/
64798845 2232static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2233{
60490fe0 2234 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2235 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2236 struct netdev_hw_addr *ha;
2237 bool use_uc = false;
406874a7
JP		 2238 u32 rctl;
2239 u32 hash_value;
868d5309 2240 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2241 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2242 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2243
14f8dc49 2244 if (!mcarray)
81c52285 2245 return;
cd94dd0b 2246
2648345f
MC		 2247 /* Check for Promiscuous and All Multicast modes */
2248
1dc32918 2249 rctl = er32(RCTL);
1da177e4 2250
96838a40 2251 if (netdev->flags & IFF_PROMISC) {
1da177e4 2252 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2253 rctl &= ~E1000_RCTL_VFE;
1da177e4 2254 } else {
1532ecea 2255 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2256 rctl |= E1000_RCTL_MPE;
1532ecea 2257 else
746b9f02 2258 rctl &= ~E1000_RCTL_MPE;
1532ecea 2259 /* Enable VLAN filter if there is a VLAN */
5622e404 2260 if (e1000_vlan_used(adapter))
1532ecea 2261 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2262 }
2263
32e7bfc4 2264 if (netdev_uc_count(netdev) > rar_entries - 1) {
db0ce50d
PM		 2265 rctl |= E1000_RCTL_UPE;
2266 } else if (!(netdev->flags & IFF_PROMISC)) {
2267 rctl &= ~E1000_RCTL_UPE;
ccffad25 2268 use_uc = true;
1da177e4
LT		 2269 }
2270
1dc32918 2271 ew32(RCTL, rctl);
1da177e4
LT		 2272
2273 /* 82542 2.0 needs to be in reset to write receive address registers */
2274
96838a40 2275 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2276 e1000_enter_82542_rst(adapter);
2277
db0ce50d
PM		 2278 /* load the first 14 addresses into the exact filters 1-14. Unicast
2279 * addresses take precedence to avoid disabling unicast filtering
2280 * when possible.
2281 *
b595076a 2282 * RAR 0 is used for the station MAC address
1da177e4
LT		 2283 * if there are not 14 addresses, go ahead and clear the filters
2284 */
ccffad25
JP		 2285 i = 1;
2286 if (use_uc)
32e7bfc4 2287 netdev_for_each_uc_addr(ha, netdev) {
ccffad25
JP		 2288 if (i == rar_entries)
2289 break;
2290 e1000_rar_set(hw, ha->addr, i++);
2291 }
2292
22bedad3 2293 netdev_for_each_mc_addr(ha, netdev) {
7a81e9f3
JP		 2294 if (i == rar_entries) {
2295 /* load any remaining addresses into the hash table */
2296 u32 hash_reg, hash_bit, mta;
22bedad3 2297 hash_value = e1000_hash_mc_addr(hw, ha->addr);
7a81e9f3
JP		 2298 hash_reg = (hash_value >> 5) & 0x7F;
2299 hash_bit = hash_value & 0x1F;
2300 mta = (1 << hash_bit);
2301 mcarray[hash_reg] |= mta;
10886af5 2302 } else {
22bedad3 2303 e1000_rar_set(hw, ha->addr, i++);
1da177e4
LT		 2304 }
2305 }
2306
7a81e9f3
JP		 2307 for (; i < rar_entries; i++) {
2308 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2309 E1000_WRITE_FLUSH();
2310 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2311 E1000_WRITE_FLUSH();
1da177e4
LT		 2312 }
2313
81c52285 2314 /* write the hash table completely, write from bottom to avoid
6cfbd97b
JK		 2315 * both stupid write combining chipsets, and flushing each write
2316 */
81c52285 2317 for (i = mta_reg_count - 1; i >= 0 ; i--) {
6cfbd97b 2318 /* If we are on an 82544 has an errata where writing odd
81c52285
JB		 2319 * offsets overwrites the previous even offset, but writing
2320 * backwards over the range solves the issue by always
2321 * writing the odd offset first
2322 */
2323 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2324 }
2325 E1000_WRITE_FLUSH();
2326
96838a40 2327 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2328 e1000_leave_82542_rst(adapter);
81c52285
JB		 2329
2330 kfree(mcarray);
1da177e4
LT		 2331}
2332
a4010afe
JB		 2333/**
2334 * e1000_update_phy_info_task - get phy info
2335 * @work: work struct contained inside adapter struct
2336 *
2337 * Need to wait a few seconds after link up to get diagnostic information from
2338 * the phy
2339 */
5cf42fcd
JB		 2340static void e1000_update_phy_info_task(struct work_struct *work)
2341{
2342 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2343 struct e1000_adapter,
2344 phy_info_task.work);
b2f963bf 2345
a4010afe 2346 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
1da177e4
LT		 2347}
2348
5cf42fcd
JB		 2349/**
2350 * e1000_82547_tx_fifo_stall_task - task to complete work
2351 * @work: work struct contained inside adapter struct
2352 **/
2353static void e1000_82547_tx_fifo_stall_task(struct work_struct *work)
2354{
2355 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2356 struct e1000_adapter,
2357 fifo_stall_task.work);
1dc32918 2358 struct e1000_hw *hw = &adapter->hw;
1da177e4 2359 struct net_device *netdev = adapter->netdev;
406874a7 2360 u32 tctl;
1da177e4 2361
96838a40 2362 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2363 if ((er32(TDT) == er32(TDH)) &&
2364 (er32(TDFT) == er32(TDFH)) &&
2365 (er32(TDFTS) == er32(TDFHS))) {
2366 tctl = er32(TCTL);
2367 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2368 ew32(TDFT, adapter->tx_head_addr);
2369 ew32(TDFH, adapter->tx_head_addr);
2370 ew32(TDFTS, adapter->tx_head_addr);
2371 ew32(TDFHS, adapter->tx_head_addr);
2372 ew32(TCTL, tctl);
2373 E1000_WRITE_FLUSH();
1da177e4
LT		 2374
2375 adapter->tx_fifo_head = 0;
2376 atomic_set(&adapter->tx_fifo_stall, 0);
2377 netif_wake_queue(netdev);
baa34745 2378 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
a4010afe 2379 schedule_delayed_work(&adapter->fifo_stall_task, 1);
1da177e4
LT		 2380 }
2381 }
2382}
2383
b548192a 2384bool e1000_has_link(struct e1000_adapter *adapter)
be0f0719
JB		 2385{
2386 struct e1000_hw *hw = &adapter->hw;
2387 bool link_active = false;
be0f0719 2388
6d9e5130
NS		 2389 /* get_link_status is set on LSC (link status) interrupt or rx
2390 * sequence error interrupt (except on intel ce4100).
2391 * get_link_status will stay false until the
2392 * e1000_check_for_link establishes link for copper adapters
2393 * ONLY
be0f0719
JB		 2394 */
2395 switch (hw->media_type) {
2396 case e1000_media_type_copper:
6d9e5130
NS		 2397 if (hw->mac_type == e1000_ce4100)
2398 hw->get_link_status = 1;
be0f0719 2399 if (hw->get_link_status) {
120a5d0d 2400 e1000_check_for_link(hw);
be0f0719
JB		 2401 link_active = !hw->get_link_status;
2402 } else {
2403 link_active = true;
2404 }
2405 break;
2406 case e1000_media_type_fiber:
120a5d0d 2407 e1000_check_for_link(hw);
be0f0719
JB		 2408 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2409 break;
2410 case e1000_media_type_internal_serdes:
120a5d0d 2411 e1000_check_for_link(hw);
be0f0719
JB		 2412 link_active = hw->serdes_has_link;
2413 break;
2414 default:
2415 break;
2416 }
2417
2418 return link_active;
2419}
2420
1da177e4 2421/**
a4010afe
JB		 2422 * e1000_watchdog - work function
2423 * @work: work struct contained inside adapter struct
1da177e4 2424 **/
a4010afe 2425static void e1000_watchdog(struct work_struct *work)
1da177e4 2426{
a4010afe
JB		 2427 struct e1000_adapter *adapter = container_of(work,
2428 struct e1000_adapter,
2429 watchdog_task.work);
1dc32918 2430 struct e1000_hw *hw = &adapter->hw;
1da177e4 2431 struct net_device *netdev = adapter->netdev;
545c67c0 2432 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2433 u32 link, tctl;
90fb5135 2434
be0f0719
JB		 2435 link = e1000_has_link(adapter);
2436 if ((netif_carrier_ok(netdev)) && link)
2437 goto link_up;
1da177e4 2438
96838a40
JB		 2439 if (link) {
2440 if (!netif_carrier_ok(netdev)) {
406874a7 2441 u32 ctrl;
be0f0719 2442 /* update snapshot of PHY registers on LSC */
1dc32918 2443 e1000_get_speed_and_duplex(hw,
6cfbd97b
JK		 2444 &adapter->link_speed,
2445 &adapter->link_duplex);
1da177e4 2446
1dc32918 2447 ctrl = er32(CTRL);
675ad473
ET		 2448 pr_info("%s NIC Link is Up %d Mbps %s, "
2449 "Flow Control: %s\n",
2450 netdev->name,
2451 adapter->link_speed,
2452 adapter->link_duplex == FULL_DUPLEX ?
2453 "Full Duplex" : "Half Duplex",
2454 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2455 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2456 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2457 E1000_CTRL_TFCE) ? "TX" : "None")));
1da177e4 2458
39ca5f03 2459 /* adjust timeout factor according to speed/duplex */
66a2b0a3 2460 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2461 switch (adapter->link_speed) {
2462 case SPEED_10:
be0f0719 2463 adapter->tx_timeout_factor = 16;
7e6c9861
JK		 2464 break;
2465 case SPEED_100:
7e6c9861
JK		 2466 /* maybe add some timeout factor ? */
2467 break;
2468 }
2469
1532ecea 2470 /* enable transmits in the hardware */
1dc32918 2471 tctl = er32(TCTL);
7e6c9861 2472 tctl |= E1000_TCTL_EN;
1dc32918 2473 ew32(TCTL, tctl);
66a2b0a3 2474
1da177e4 2475 netif_carrier_on(netdev);
baa34745 2476 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2477 schedule_delayed_work(&adapter->phy_info_task,
2478 2 * HZ);
1da177e4
LT		 2479 adapter->smartspeed = 0;
2480 }
2481 } else {
96838a40 2482 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2483 adapter->link_speed = 0;
2484 adapter->link_duplex = 0;
675ad473
ET		 2485 pr_info("%s NIC Link is Down\n",
2486 netdev->name);
1da177e4 2487 netif_carrier_off(netdev);
baa34745
JB		 2488
2489 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2490 schedule_delayed_work(&adapter->phy_info_task,
2491 2 * HZ);
1da177e4
LT		 2492 }
2493
2494 e1000_smartspeed(adapter);
2495 }
2496
be0f0719 2497link_up:
1da177e4
LT		 2498 e1000_update_stats(adapter);
2499
1dc32918 2500 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2501 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2502 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2503 adapter->colc_old = adapter->stats.colc;
2504
2505 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2506 adapter->gorcl_old = adapter->stats.gorcl;
2507 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2508 adapter->gotcl_old = adapter->stats.gotcl;
2509
1dc32918 2510 e1000_update_adaptive(hw);
1da177e4 2511
f56799ea 2512 if (!netif_carrier_ok(netdev)) {
581d708e 2513 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2514 /* We've lost link, so the controller stops DMA,
2515 * but we've got queued Tx work that's never going
2516 * to get done, so reset controller to flush Tx.
6cfbd97b
JK		 2517 * (Do the reset outside of interrupt context).
2518 */
87041639
JK		 2519 adapter->tx_timeout_count++;
2520 schedule_work(&adapter->reset_task);
0ef4eedc 2521 /* exit immediately since reset is imminent */
b2f963bf 2522 return;
1da177e4
LT		 2523 }
2524 }
2525
eab2abf5
JB		 2526 /* Simple mode for Interrupt Throttle Rate (ITR) */
2527 if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) {
6cfbd97b 2528 /* Symmetric Tx/Rx gets a reduced ITR=2000;
eab2abf5
JB		 2529 * Total asymmetrical Tx or Rx gets ITR=8000;
2530 * everyone else is between 2000-8000.
2531 */
2532 u32 goc = (adapter->gotcl + adapter->gorcl) / 10000;
2533 u32 dif = (adapter->gotcl > adapter->gorcl ?
2534 adapter->gotcl - adapter->gorcl :
2535 adapter->gorcl - adapter->gotcl) / 10000;
2536 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2537
2538 ew32(ITR, 1000000000 / (itr * 256));
2539 }
2540
1da177e4 2541 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2542 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2543
2648345f 2544 /* Force detection of hung controller every watchdog period */
c3033b01 2545 adapter->detect_tx_hung = true;
1da177e4 2546
a4010afe 2547 /* Reschedule the task */
baa34745 2548 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 2549 schedule_delayed_work(&adapter->watchdog_task, 2 * HZ);
1da177e4
LT		 2550}
2551
835bb129
JB		 2552enum latency_range {
2553 lowest_latency = 0,
2554 low_latency = 1,
2555 bulk_latency = 2,
2556 latency_invalid = 255
2557};
2558
2559/**
2560 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB		 2561 * @adapter: pointer to adapter
2562 * @itr_setting: current adapter->itr
2563 * @packets: the number of packets during this measurement interval
2564 * @bytes: the number of bytes during this measurement interval
2565 *
835bb129
JB		 2566 * Stores a new ITR value based on packets and byte
2567 * counts during the last interrupt. The advantage of per interrupt
2568 * computation is faster updates and more accurate ITR for the current
2569 * traffic pattern. Constants in this function were computed
2570 * based on theoretical maximum wire speed and thresholds were set based
2571 * on testing data as well as attempting to minimize response time
2572 * while increasing bulk throughput.
2573 * this functionality is controlled by the InterruptThrottleRate module
2574 * parameter (see e1000_param.c)
835bb129
JB		 2575 **/
2576static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2577 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2578{
2579 unsigned int retval = itr_setting;
2580 struct e1000_hw *hw = &adapter->hw;
2581
2582 if (unlikely(hw->mac_type < e1000_82540))
2583 goto update_itr_done;
2584
2585 if (packets == 0)
2586 goto update_itr_done;
2587
835bb129
JB		 2588 switch (itr_setting) {
2589 case lowest_latency:
2b65326e
JB		 2590 /* jumbo frames get bulk treatment*/
2591 if (bytes/packets > 8000)
2592 retval = bulk_latency;
2593 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2594 retval = low_latency;
2595 break;
2596 case low_latency: /* 50 usec aka 20000 ints/s */
2597 if (bytes > 10000) {
2b65326e
JB		 2598 /* jumbo frames need bulk latency setting */
2599 if (bytes/packets > 8000)
2600 retval = bulk_latency;
2601 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2602 retval = bulk_latency;
2603 else if ((packets > 35))
2604 retval = lowest_latency;
2b65326e
JB		 2605 } else if (bytes/packets > 2000)
2606 retval = bulk_latency;
2607 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2608 retval = lowest_latency;
2609 break;
2610 case bulk_latency: /* 250 usec aka 4000 ints/s */
2611 if (bytes > 25000) {
2612 if (packets > 35)
2613 retval = low_latency;
2b65326e
JB		 2614 } else if (bytes < 6000) {
2615 retval = low_latency;
835bb129
JB		 2616 }
2617 break;
2618 }
2619
2620update_itr_done:
2621 return retval;
2622}
2623
2624static void e1000_set_itr(struct e1000_adapter *adapter)
2625{
2626 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2627 u16 current_itr;
2628 u32 new_itr = adapter->itr;
835bb129
JB		 2629
2630 if (unlikely(hw->mac_type < e1000_82540))
2631 return;
2632
2633 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2634 if (unlikely(adapter->link_speed != SPEED_1000)) {
835bb129
JB		 2635 new_itr = 4000;
2636 goto set_itr_now;
2637 }
2638
6cfbd97b
JK		 2639 adapter->tx_itr = e1000_update_itr(adapter, adapter->tx_itr,
2640 adapter->total_tx_packets,
2641 adapter->total_tx_bytes);
2b65326e
JB		 2642 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2643 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2644 adapter->tx_itr = low_latency;
2645
6cfbd97b
JK		 2646 adapter->rx_itr = e1000_update_itr(adapter, adapter->rx_itr,
2647 adapter->total_rx_packets,
2648 adapter->total_rx_bytes);
2b65326e
JB		 2649 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2650 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2651 adapter->rx_itr = low_latency;
835bb129
JB		 2652
2653 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2654
835bb129
JB		 2655 switch (current_itr) {
2656 /* counts and packets in update_itr are dependent on these numbers */
2657 case lowest_latency:
2658 new_itr = 70000;
2659 break;
2660 case low_latency:
2661 new_itr = 20000; /* aka hwitr = ~200 */
2662 break;
2663 case bulk_latency:
2664 new_itr = 4000;
2665 break;
2666 default:
2667 break;
2668 }
2669
2670set_itr_now:
2671 if (new_itr != adapter->itr) {
2672 /* this attempts to bias the interrupt rate towards Bulk
2673 * by adding intermediate steps when interrupt rate is
6cfbd97b
JK		 2674 * increasing
2675 */
835bb129 2676 new_itr = new_itr > adapter->itr ?
6cfbd97b
JK		 2677 min(adapter->itr + (new_itr >> 2), new_itr) :
2678 new_itr;
835bb129 2679 adapter->itr = new_itr;
1dc32918 2680 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129 2681 }
835bb129
JB		 2682}
2683
1da177e4
LT		 2684#define E1000_TX_FLAGS_CSUM 0x00000001
2685#define E1000_TX_FLAGS_VLAN 0x00000002
2686#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2687#define E1000_TX_FLAGS_IPV4 0x00000008
11a78dcf 2688#define E1000_TX_FLAGS_NO_FCS 0x00000010
1da177e4
LT		 2689#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2690#define E1000_TX_FLAGS_VLAN_SHIFT 16
2691
64798845 2692static int e1000_tso(struct e1000_adapter *adapter,
06f4d033
VY		 2693 struct e1000_tx_ring *tx_ring, struct sk_buff *skb,
2694 __be16 protocol)
1da177e4 2695{
1da177e4 2696 struct e1000_context_desc *context_desc;
580f321d 2697 struct e1000_tx_buffer *buffer_info;
1da177e4 2698 unsigned int i;
406874a7
JP		 2699 u32 cmd_length = 0;
2700 u16 ipcse = 0, tucse, mss;
2701 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4 2702
89114afd 2703 if (skb_is_gso(skb)) {
4a54b1e5
FR		 2704 int err;
2705
2706 err = skb_cow_head(skb, 0);
2707 if (err < 0)
2708 return err;
1da177e4 2709
ab6a5bb6 2710 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2711 mss = skb_shinfo(skb)->gso_size;
06f4d033 2712 if (protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2713 struct iphdr *iph = ip_hdr(skb);
2714 iph->tot_len = 0;
2715 iph->check = 0;
aa8223c7
ACM		 2716 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2717 iph->daddr, 0,
2718 IPPROTO_TCP,
2719 0);
2d7edb92 2720 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2721 ipcse = skb_transport_offset(skb) - 1;
06f4d033 2722 } else if (skb_is_gso_v6(skb)) {
2b316fbc 2723 tcp_v6_gso_csum_prep(skb);
2d7edb92 2724 ipcse = 0;
2d7edb92 2725 }
bbe735e4 2726 ipcss = skb_network_offset(skb);
eddc9ec5 2727 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2728 tucss = skb_transport_offset(skb);
aa8223c7 2729 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2730 tucse = 0;
2731
2732 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2733 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2734
581d708e
MC		 2735 i = tx_ring->next_to_use;
2736 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2737 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2738
2739 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2740 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2741 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2742 context_desc->upper_setup.tcp_fields.tucss = tucss;
2743 context_desc->upper_setup.tcp_fields.tucso = tucso;
2744 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2745 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2746 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2747 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2748
545c67c0 2749 buffer_info->time_stamp = jiffies;
a9ebadd6 2750 buffer_info->next_to_watch = i;
545c67c0 2751
a48954c8
JW		 2752 if (++i == tx_ring->count)
2753 i = 0;
2754
581d708e 2755 tx_ring->next_to_use = i;
1da177e4 2756
c3033b01 2757 return true;
1da177e4 2758 }
c3033b01 2759 return false;
1da177e4
LT		 2760}
2761
64798845 2762static bool e1000_tx_csum(struct e1000_adapter *adapter,
06f4d033
VY		 2763 struct e1000_tx_ring *tx_ring, struct sk_buff *skb,
2764 __be16 protocol)
1da177e4
LT		 2765{
2766 struct e1000_context_desc *context_desc;
580f321d 2767 struct e1000_tx_buffer *buffer_info;
1da177e4 2768 unsigned int i;
406874a7 2769 u8 css;
3ed30676 2770 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2771
3ed30676
DG		 2772 if (skb->ip_summed != CHECKSUM_PARTIAL)
2773 return false;
1da177e4 2774
06f4d033 2775 switch (protocol) {
09640e63 2776 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2777 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2778 cmd_len |= E1000_TXD_CMD_TCP;
2779 break;
09640e63 2780 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2781 /* XXX not handling all IPV6 headers */
2782 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2783 cmd_len |= E1000_TXD_CMD_TCP;
2784 break;
2785 default:
2786 if (unlikely(net_ratelimit()))
feb8f478
ET		 2787 e_warn(drv, "checksum_partial proto=%x!\n",
2788 skb->protocol);
3ed30676
DG		 2789 break;
2790 }
1da177e4 2791
0d0b1672 2792 css = skb_checksum_start_offset(skb);
1da177e4 2793
3ed30676
DG		 2794 i = tx_ring->next_to_use;
2795 buffer_info = &tx_ring->buffer_info[i];
2796 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2797
3ed30676
DG		 2798 context_desc->lower_setup.ip_config = 0;
2799 context_desc->upper_setup.tcp_fields.tucss = css;
2800 context_desc->upper_setup.tcp_fields.tucso =
2801 css + skb->csum_offset;
2802 context_desc->upper_setup.tcp_fields.tucse = 0;
2803 context_desc->tcp_seg_setup.data = 0;
2804 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2805
3ed30676
DG		 2806 buffer_info->time_stamp = jiffies;
2807 buffer_info->next_to_watch = i;
1da177e4 2808
a48954c8
JW		 2809 if (unlikely(++i == tx_ring->count))
2810 i = 0;
2811
3ed30676
DG		 2812 tx_ring->next_to_use = i;
2813
2814 return true;
1da177e4
LT		 2815}
2816
2817#define E1000_MAX_TXD_PWR 12
2818#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2819
64798845
JP		 2820static int e1000_tx_map(struct e1000_adapter *adapter,
2821 struct e1000_tx_ring *tx_ring,
2822 struct sk_buff *skb, unsigned int first,
2823 unsigned int max_per_txd, unsigned int nr_frags,
2824 unsigned int mss)
1da177e4 2825{
1dc32918 2826 struct e1000_hw *hw = &adapter->hw;
602c0554 2827 struct pci_dev *pdev = adapter->pdev;
580f321d 2828 struct e1000_tx_buffer *buffer_info;
d20b606c 2829 unsigned int len = skb_headlen(skb);
602c0554 2830 unsigned int offset = 0, size, count = 0, i;
31c15a2f 2831 unsigned int f, bytecount, segs;
1da177e4
LT		 2832
2833 i = tx_ring->next_to_use;
2834
96838a40 2835 while (len) {
37e73df8 2836 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2837 size = min(len, max_per_txd);
fd803241
JK		 2838 /* Workaround for Controller erratum --
2839 * descriptor for non-tso packet in a linear SKB that follows a
2840 * tso gets written back prematurely before the data is fully
6cfbd97b
JK		 2841 * DMA'd to the controller
2842 */
fd803241 2843 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2844 !skb_is_gso(skb)) {
3db1cd5c 2845 tx_ring->last_tx_tso = false;
fd803241
JK		 2846 size -= 4;
2847 }
2848
1da177e4 2849 /* Workaround for premature desc write-backs
6cfbd97b
JK		 2850 * in TSO mode. Append 4-byte sentinel desc
2851 */
96838a40 2852 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2853 size -= 4;
97338bde
MC		 2854 /* work-around for errata 10 and it applies
2855 * to all controllers in PCI-X mode
2856 * The fix is to make sure that the first descriptor of a
2857 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2858 */
1dc32918 2859 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
a48954c8
JW		 2860 (size > 2015) && count == 0))
2861 size = 2015;
96838a40 2862
1da177e4 2863 /* Workaround for potential 82544 hang in PCI-X. Avoid
6cfbd97b
JK		 2864 * terminating buffers within evenly-aligned dwords.
2865 */
96838a40 2866 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2867 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2868 size > 4))
2869 size -= 4;
2870
2871 buffer_info->length = size;
cdd7549e 2872 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2873 buffer_info->time_stamp = jiffies;
602c0554 2874 buffer_info->mapped_as_page = false;
b16f53be
NN		 2875 buffer_info->dma = dma_map_single(&pdev->dev,
2876 skb->data + offset,
6cfbd97b 2877 size, DMA_TO_DEVICE);
b16f53be 2878 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2879 goto dma_error;
a9ebadd6 2880 buffer_info->next_to_watch = i;
1da177e4
LT		 2881
2882 len -= size;
2883 offset += size;
2884 count++;
37e73df8
AD		 2885 if (len) {
2886 i++;
2887 if (unlikely(i == tx_ring->count))
2888 i = 0;
2889 }
1da177e4
LT		 2890 }
2891
96838a40 2892 for (f = 0; f < nr_frags; f++) {
d7840976 2893 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
1da177e4 2894
9e903e08 2895 len = skb_frag_size(frag);
877749bf 2896 offset = 0;
1da177e4 2897
96838a40 2898 while (len) {
877749bf 2899 unsigned long bufend;
37e73df8
AD		 2900 i++;
2901 if (unlikely(i == tx_ring->count))
2902 i = 0;
2903
1da177e4
LT		 2904 buffer_info = &tx_ring->buffer_info[i];
2905 size = min(len, max_per_txd);
1da177e4 2906 /* Workaround for premature desc write-backs
6cfbd97b
JK		 2907 * in TSO mode. Append 4-byte sentinel desc
2908 */
2909 if (unlikely(mss && f == (nr_frags-1) &&
2910 size == len && size > 8))
1da177e4 2911 size -= 4;
1da177e4
LT		 2912 /* Workaround for potential 82544 hang in PCI-X.
2913 * Avoid terminating buffers within evenly-aligned
6cfbd97b
JK		 2914 * dwords.
2915 */
877749bf
IC		 2916 bufend = (unsigned long)
2917 page_to_phys(skb_frag_page(frag));
2918 bufend += offset + size - 1;
96838a40 2919 if (unlikely(adapter->pcix_82544 &&
877749bf
IC		 2920 !(bufend & 4) &&
2921 size > 4))
1da177e4
LT		 2922 size -= 4;
2923
2924 buffer_info->length = size;
1da177e4 2925 buffer_info->time_stamp = jiffies;
602c0554 2926 buffer_info->mapped_as_page = true;
877749bf
IC		 2927 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
2928 offset, size, DMA_TO_DEVICE);
b16f53be 2929 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2930 goto dma_error;
a9ebadd6 2931 buffer_info->next_to_watch = i;
1da177e4
LT		 2932
2933 len -= size;
2934 offset += size;
2935 count++;
1da177e4
LT		 2936 }
2937 }
2938
31c15a2f
DN		 2939 segs = skb_shinfo(skb)->gso_segs ?: 1;
2940 /* multiply data chunks by size of headers */
2941 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
2942
1da177e4 2943 tx_ring->buffer_info[i].skb = skb;
31c15a2f
DN		 2944 tx_ring->buffer_info[i].segs = segs;
2945 tx_ring->buffer_info[i].bytecount = bytecount;
1da177e4
LT		 2946 tx_ring->buffer_info[first].next_to_watch = i;
2947
2948 return count;
602c0554
AD		 2949
2950dma_error:
2951 dev_err(&pdev->dev, "TX DMA map failed\n");
2952 buffer_info->dma = 0;
c1fa347f 2953 if (count)
602c0554 2954 count--;
c1fa347f
RK		 2955
2956 while (count--) {
a48954c8 2957 if (i == 0)
602c0554 2958 i += tx_ring->count;
c1fa347f 2959 i--;
602c0554
AD		 2960 buffer_info = &tx_ring->buffer_info[i];
2961 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2962 }
2963
2964 return 0;
1da177e4
LT		 2965}
2966
64798845
JP		 2967static void e1000_tx_queue(struct e1000_adapter *adapter,
2968 struct e1000_tx_ring *tx_ring, int tx_flags,
2969 int count)
1da177e4 2970{
1da177e4 2971 struct e1000_tx_desc *tx_desc = NULL;
580f321d 2972 struct e1000_tx_buffer *buffer_info;
406874a7 2973 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 2974 unsigned int i;
2975
96838a40 2976 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4 2977 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
6cfbd97b 2978 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2979 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2980
96838a40 2981 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2982 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2983 }
2984
96838a40 2985 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2986 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2987 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2988 }
2989
96838a40 2990 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2991 txd_lower |= E1000_TXD_CMD_VLE;
2992 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2993 }
2994
11a78dcf
BG		 2995 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
2996 txd_lower &= ~(E1000_TXD_CMD_IFCS);
2997
1da177e4
LT		 2998 i = tx_ring->next_to_use;
2999
96838a40 3000 while (count--) {
1da177e4
LT		 3001 buffer_info = &tx_ring->buffer_info[i];
3002 tx_desc = E1000_TX_DESC(*tx_ring, i);
3003 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3004 tx_desc->lower.data =
3005 cpu_to_le32(txd_lower | buffer_info->length);
3006 tx_desc->upper.data = cpu_to_le32(txd_upper);
a48954c8
JW		 3007 if (unlikely(++i == tx_ring->count))
3008 i = 0;
1da177e4
LT		 3009 }
3010
3011 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3012
11a78dcf
BG		 3013 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
3014 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
3015 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
3016
1da177e4
LT		 3017 /* Force memory writes to complete before letting h/w
3018 * know there are new descriptors to fetch. (Only
3019 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 3020 * such as IA-64).
3021 */
583cf7be 3022 dma_wmb();
1da177e4
LT		 3023
3024 tx_ring->next_to_use = i;
1da177e4
LT		 3025}
3026
1aa8b471 3027/* 82547 workaround to avoid controller hang in half-duplex environment.
1da177e4
LT		 3028 * The workaround is to avoid queuing a large packet that would span
3029 * the internal Tx FIFO ring boundary by notifying the stack to resend
3030 * the packet at a later time. This gives the Tx FIFO an opportunity to
3031 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3032 * to the beginning of the Tx FIFO.
1aa8b471 3033 */
1da177e4
LT		 3034
3035#define E1000_FIFO_HDR 0x10
3036#define E1000_82547_PAD_LEN 0x3E0
3037
64798845
JP		 3038static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3039 struct sk_buff *skb)
1da177e4 3040{
406874a7
JP		 3041 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3042 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3043
9099cfb9 3044 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3045
96838a40 3046 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3047 goto no_fifo_stall_required;
3048
96838a40 3049 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3050 return 1;
3051
96838a40 3052 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3053 atomic_set(&adapter->tx_fifo_stall, 1);
3054 return 1;
3055 }
3056
3057no_fifo_stall_required:
3058 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3059 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3060 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3061 return 0;
3062}
3063
65c7973f
JB		 3064static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3065{
3066 struct e1000_adapter *adapter = netdev_priv(netdev);
3067 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3068
3069 netif_stop_queue(netdev);
3070 /* Herbert's original patch had:
3071 * smp_mb__after_netif_stop_queue();
6cfbd97b
JK		 3072 * but since that doesn't exist yet, just open code it.
3073 */
65c7973f
JB		 3074 smp_mb();
3075
3076 /* We need to check again in a case another CPU has just
6cfbd97b
JK		 3077 * made room available.
3078 */
65c7973f
JB		 3079 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3080 return -EBUSY;
3081
3082 /* A reprieve! */
3083 netif_start_queue(netdev);
fcfb1224 3084 ++adapter->restart_queue;
65c7973f
JB		 3085 return 0;
3086}
3087
3088static int e1000_maybe_stop_tx(struct net_device *netdev,
6cfbd97b 3089 struct e1000_tx_ring *tx_ring, int size)
65c7973f
JB		 3090{
3091 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3092 return 0;
3093 return __e1000_maybe_stop_tx(netdev, size);
3094}
3095
847a1d67 3096#define TXD_USE_COUNT(S, X) (((S) + ((1 << (X)) - 1)) >> (X))
3b29a56d
SH		 3097static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
3098 struct net_device *netdev)
1da177e4 3099{
60490fe0 3100 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3101 struct e1000_hw *hw = &adapter->hw;
581d708e 3102 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3103 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3104 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3105 unsigned int tx_flags = 0;
e743d313 3106 unsigned int len = skb_headlen(skb);
6d1e3aa7
KK		 3107 unsigned int nr_frags;
3108 unsigned int mss;
1da177e4 3109 int count = 0;
76c224bc 3110 int tso;
1da177e4 3111 unsigned int f;
06f4d033 3112 __be16 protocol = vlan_get_protocol(skb);
1da177e4 3113
6cfbd97b 3114 /* This goes back to the question of how to logically map a Tx queue
65c7973f 3115 * to a flow. Right now, performance is impacted slightly negatively
6cfbd97b
JK		 3116 * if using multiple Tx queues. If the stack breaks away from a
3117 * single qdisc implementation, we can look at this again.
3118 */
581d708e 3119 tx_ring = adapter->tx_ring;
24025e4e 3120
59d86c76
TD		 3121 /* On PCI/PCI-X HW, if packet size is less than ETH_ZLEN,
3122 * packets may get corrupted during padding by HW.
3123 * To WA this issue, pad all small packets manually.
3124 */
a94d9e22
AD		 3125 if (eth_skb_pad(skb))
3126 return NETDEV_TX_OK;
59d86c76 3127
7967168c 3128 mss = skb_shinfo(skb)->gso_size;
76c224bc 3129 /* The controller does a simple calculation to
1da177e4
LT		 3130 * make sure there is enough room in the FIFO before
3131 * initiating the DMA for each buffer. The calc is:
3132 * 4 = ceil(buffer len/mss). To make sure we don't
3133 * overrun the FIFO, adjust the max buffer len if mss
6cfbd97b
JK		 3134 * drops.
3135 */
96838a40 3136 if (mss) {
406874a7 3137 u8 hdr_len;
1da177e4
LT		 3138 max_per_txd = min(mss << 2, max_per_txd);
3139 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3140
ab6a5bb6 3141 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3142 if (skb->data_len && hdr_len == len) {
1dc32918 3143 switch (hw->mac_type) {
a34c7f51 3144 case e1000_82544: {
9f687888 3145 unsigned int pull_size;
a34c7f51 3146
683a2aa3
HX		 3147 /* Make sure we have room to chop off 4 bytes,
3148 * and that the end alignment will work out to
3149 * this hardware's requirements
3150 * NOTE: this is a TSO only workaround
3151 * if end byte alignment not correct move us
6cfbd97b
JK		 3152 * into the next dword
3153 */
3154 if ((unsigned long)(skb_tail_pointer(skb) - 1)
3155 & 4)
683a2aa3 3156 break;
9f687888
JK		 3157 pull_size = min((unsigned int)4, skb->data_len);
3158 if (!__pskb_pull_tail(skb, pull_size)) {
feb8f478
ET		 3159 e_err(drv, "__pskb_pull_tail "
3160 "failed.\n");
9f687888 3161 dev_kfree_skb_any(skb);
749dfc70 3162 return NETDEV_TX_OK;
9f687888 3163 }
e743d313 3164 len = skb_headlen(skb);
9f687888 3165 break;
a34c7f51 3166 }
9f687888
JK		 3167 default:
3168 /* do nothing */
3169 break;
d74bbd3b 3170 }
9a3056da 3171 }
1da177e4
LT		 3172 }
3173
9a3056da 3174 /* reserve a descriptor for the offload context */
84fa7933 3175 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3176 count++;
2648345f 3177 count++;
fd803241 3178
fd803241 3179 /* Controller Erratum workaround */
89114afd 3180 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3181 count++;
fd803241 3182
1da177e4
LT		 3183 count += TXD_USE_COUNT(len, max_txd_pwr);
3184
96838a40 3185 if (adapter->pcix_82544)
1da177e4
LT		 3186 count++;
3187
96838a40 3188 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3189 * in PCI-X mode, so add one more descriptor to the count
3190 */
1dc32918 3191 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3192 (len > 2015)))
3193 count++;
3194
1da177e4 3195 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3196 for (f = 0; f < nr_frags; f++)
9e903e08 3197 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),
1da177e4 3198 max_txd_pwr);
96838a40 3199 if (adapter->pcix_82544)
1da177e4
LT		 3200 count += nr_frags;
3201
1da177e4 3202 /* need: count + 2 desc gap to keep tail from touching
6cfbd97b
JK		 3203 * head, otherwise try next time
3204 */
8017943e 3205 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3206 return NETDEV_TX_BUSY;
1da177e4 3207
a4010afe
JB		 3208 if (unlikely((hw->mac_type == e1000_82547) &&
3209 (e1000_82547_fifo_workaround(adapter, skb)))) {
3210 netif_stop_queue(netdev);
3211 if (!test_bit(__E1000_DOWN, &adapter->flags))
3212 schedule_delayed_work(&adapter->fifo_stall_task, 1);
3213 return NETDEV_TX_BUSY;
1da177e4
LT		 3214 }
3215
df8a39de 3216 if (skb_vlan_tag_present(skb)) {
1da177e4 3217 tx_flags |= E1000_TX_FLAGS_VLAN;
df8a39de
JP		 3218 tx_flags |= (skb_vlan_tag_get(skb) <<
3219 E1000_TX_FLAGS_VLAN_SHIFT);
1da177e4
LT		 3220 }
3221
581d708e 3222 first = tx_ring->next_to_use;
96838a40 3223
06f4d033 3224 tso = e1000_tso(adapter, tx_ring, skb, protocol);
1da177e4
LT		 3225 if (tso < 0) {
3226 dev_kfree_skb_any(skb);
3227 return NETDEV_TX_OK;
3228 }
3229
fd803241 3230 if (likely(tso)) {
8fce4731 3231 if (likely(hw->mac_type != e1000_82544))
3db1cd5c 3232 tx_ring->last_tx_tso = true;
1da177e4 3233 tx_flags |= E1000_TX_FLAGS_TSO;
06f4d033 3234 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb, protocol)))
1da177e4
LT		 3235 tx_flags |= E1000_TX_FLAGS_CSUM;
3236
06f4d033 3237 if (protocol == htons(ETH_P_IP))
2d7edb92
MC		 3238 tx_flags |= E1000_TX_FLAGS_IPV4;
3239
11a78dcf
BG		 3240 if (unlikely(skb->no_fcs))
3241 tx_flags |= E1000_TX_FLAGS_NO_FCS;
3242
37e73df8 3243 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
6cfbd97b 3244 nr_frags, mss);
1da177e4 3245
37e73df8 3246 if (count) {
a4605fef
AD		 3247 /* The descriptors needed is higher than other Intel drivers
3248 * due to a number of workarounds. The breakdown is below:
3249 * Data descriptors: MAX_SKB_FRAGS + 1
3250 * Context Descriptor: 1
3251 * Keep head from touching tail: 2
3252 * Workarounds: 3
3253 */
3254 int desc_needed = MAX_SKB_FRAGS + 7;
3255
2f66fd36 3256 netdev_sent_queue(netdev, skb->len);
eab467f5
WB		 3257 skb_tx_timestamp(skb);
3258
37e73df8 3259 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
a4605fef
AD		 3260
3261 /* 82544 potentially requires twice as many data descriptors
3262 * in order to guarantee buffers don't end on evenly-aligned
3263 * dwords
3264 */
3265 if (adapter->pcix_82544)
3266 desc_needed += MAX_SKB_FRAGS + 1;
3267
37e73df8 3268 /* Make sure there is space in the ring for the next send. */
a4605fef 3269 e1000_maybe_stop_tx(netdev, tx_ring, desc_needed);
1da177e4 3270
6b16f9ee 3271 if (!netdev_xmit_more() ||
8a4d0b93
FW		 3272 netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
3273 writel(tx_ring->next_to_use, hw->hw_addr + tx_ring->tdt);
8a4d0b93 3274 }
37e73df8
AD		 3275 } else {
3276 dev_kfree_skb_any(skb);
3277 tx_ring->buffer_info[first].time_stamp = 0;
3278 tx_ring->next_to_use = first;
3279 }
1da177e4 3280
1da177e4
LT		 3281 return NETDEV_TX_OK;
3282}
3283
b04e36ba
TD		 3284#define NUM_REGS 38 /* 1 based count */
3285static void e1000_regdump(struct e1000_adapter *adapter)
3286{
3287 struct e1000_hw *hw = &adapter->hw;
3288 u32 regs[NUM_REGS];
3289 u32 *regs_buff = regs;
3290 int i = 0;
3291
e29b5d8f
TD		 3292 static const char * const reg_name[] = {
3293 "CTRL", "STATUS",
3294 "RCTL", "RDLEN", "RDH", "RDT", "RDTR",
3295 "TCTL", "TDBAL", "TDBAH", "TDLEN", "TDH", "TDT",
3296 "TIDV", "TXDCTL", "TADV", "TARC0",
3297 "TDBAL1", "TDBAH1", "TDLEN1", "TDH1", "TDT1",
3298 "TXDCTL1", "TARC1",
3299 "CTRL_EXT", "ERT", "RDBAL", "RDBAH",
3300 "TDFH", "TDFT", "TDFHS", "TDFTS", "TDFPC",
3301 "RDFH", "RDFT", "RDFHS", "RDFTS", "RDFPC"
b04e36ba
TD		 3302 };
3303
3304 regs_buff[0] = er32(CTRL);
3305 regs_buff[1] = er32(STATUS);
3306
3307 regs_buff[2] = er32(RCTL);
3308 regs_buff[3] = er32(RDLEN);
3309 regs_buff[4] = er32(RDH);
3310 regs_buff[5] = er32(RDT);
3311 regs_buff[6] = er32(RDTR);
3312
3313 regs_buff[7] = er32(TCTL);
3314 regs_buff[8] = er32(TDBAL);
3315 regs_buff[9] = er32(TDBAH);
3316 regs_buff[10] = er32(TDLEN);
3317 regs_buff[11] = er32(TDH);
3318 regs_buff[12] = er32(TDT);
3319 regs_buff[13] = er32(TIDV);
3320 regs_buff[14] = er32(TXDCTL);
3321 regs_buff[15] = er32(TADV);
3322 regs_buff[16] = er32(TARC0);
3323
3324 regs_buff[17] = er32(TDBAL1);
3325 regs_buff[18] = er32(TDBAH1);
3326 regs_buff[19] = er32(TDLEN1);
3327 regs_buff[20] = er32(TDH1);
3328 regs_buff[21] = er32(TDT1);
3329 regs_buff[22] = er32(TXDCTL1);
3330 regs_buff[23] = er32(TARC1);
3331 regs_buff[24] = er32(CTRL_EXT);
3332 regs_buff[25] = er32(ERT);
3333 regs_buff[26] = er32(RDBAL0);
3334 regs_buff[27] = er32(RDBAH0);
3335 regs_buff[28] = er32(TDFH);
3336 regs_buff[29] = er32(TDFT);
3337 regs_buff[30] = er32(TDFHS);
3338 regs_buff[31] = er32(TDFTS);
3339 regs_buff[32] = er32(TDFPC);
3340 regs_buff[33] = er32(RDFH);
3341 regs_buff[34] = er32(RDFT);
3342 regs_buff[35] = er32(RDFHS);
3343 regs_buff[36] = er32(RDFTS);
3344 regs_buff[37] = er32(RDFPC);
3345
3346 pr_info("Register dump\n");
e29b5d8f
TD		 3347 for (i = 0; i < NUM_REGS; i++)
3348 pr_info("%-15s %08x\n", reg_name[i], regs_buff[i]);
b04e36ba
TD		 3349}
3350
3351/*
3352 * e1000_dump: Print registers, tx ring and rx ring
3353 */
3354static void e1000_dump(struct e1000_adapter *adapter)
3355{
3356 /* this code doesn't handle multiple rings */
3357 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3358 struct e1000_rx_ring *rx_ring = adapter->rx_ring;
3359 int i;
3360
3361 if (!netif_msg_hw(adapter))
3362 return;
3363
3364 /* Print Registers */
3365 e1000_regdump(adapter);
3366
6cfbd97b 3367 /* transmit dump */
b04e36ba
TD		 3368 pr_info("TX Desc ring0 dump\n");
3369
3370 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
3371 *
3372 * Legacy Transmit Descriptor
3373 * +--------------------------------------------------------------+
3374 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
3375 * +--------------------------------------------------------------+
3376 * 8 | Special | CSS | Status | CMD | CSO | Length |
3377 * +--------------------------------------------------------------+
3378 * 63 48 47 36 35 32 31 24 23 16 15 0
3379 *
3380 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
3381 * 63 48 47 40 39 32 31 16 15 8 7 0
3382 * +----------------------------------------------------------------+
3383 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
3384 * +----------------------------------------------------------------+
3385 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
3386 * +----------------------------------------------------------------+
3387 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
3388 *
3389 * Extended Data Descriptor (DTYP=0x1)
3390 * +----------------------------------------------------------------+
3391 * 0 | Buffer Address [63:0] |
3392 * +----------------------------------------------------------------+
3393 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
3394 * +----------------------------------------------------------------+
3395 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
3396 */
e29b5d8f
TD		 3397 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestmp bi->skb\n");
3398 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestmp bi->skb\n");
b04e36ba
TD		 3399
3400 if (!netif_msg_tx_done(adapter))
3401 goto rx_ring_summary;
3402
3403 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
3404 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
580f321d 3405 struct e1000_tx_buffer *buffer_info = &tx_ring->buffer_info[i];
dd7f5c9e 3406 struct my_u { __le64 a; __le64 b; };
b04e36ba 3407 struct my_u *u = (struct my_u *)tx_desc;
e29b5d8f
TD		 3408 const char *type;
3409
b04e36ba 3410 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
e29b5d8f 3411 type = "NTC/U";
b04e36ba 3412 else if (i == tx_ring->next_to_use)
e29b5d8f 3413 type = "NTU";
b04e36ba 3414 else if (i == tx_ring->next_to_clean)
e29b5d8f 3415 type = "NTC";
b04e36ba 3416 else
e29b5d8f 3417 type = "";
b04e36ba 3418
e29b5d8f
TD		 3419 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p %s\n",
3420 ((le64_to_cpu(u->b) & (1<<20)) ? 'd' : 'c'), i,
3421 le64_to_cpu(u->a), le64_to_cpu(u->b),
3422 (u64)buffer_info->dma, buffer_info->length,
3423 buffer_info->next_to_watch,
3424 (u64)buffer_info->time_stamp, buffer_info->skb, type);
b04e36ba
TD		 3425 }
3426
3427rx_ring_summary:
6cfbd97b 3428 /* receive dump */
b04e36ba
TD		 3429 pr_info("\nRX Desc ring dump\n");
3430
3431 /* Legacy Receive Descriptor Format
3432 *
3433 * +-----------------------------------------------------+
3434 * | Buffer Address [63:0] |
3435 * +-----------------------------------------------------+
3436 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
3437 * +-----------------------------------------------------+
3438 * 63 48 47 40 39 32 31 16 15 0
3439 */
e29b5d8f 3440 pr_info("R[desc] [address 63:0 ] [vl er S cks ln] [bi->dma ] [bi->skb]\n");
b04e36ba
TD		 3441
3442 if (!netif_msg_rx_status(adapter))
3443 goto exit;
3444
3445 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
3446 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rx_ring, i);
93f0afe9 3447 struct e1000_rx_buffer *buffer_info = &rx_ring->buffer_info[i];
dd7f5c9e 3448 struct my_u { __le64 a; __le64 b; };
b04e36ba 3449 struct my_u *u = (struct my_u *)rx_desc;
e29b5d8f
TD		 3450 const char *type;
3451
b04e36ba 3452 if (i == rx_ring->next_to_use)
e29b5d8f 3453 type = "NTU";
b04e36ba 3454 else if (i == rx_ring->next_to_clean)
e29b5d8f 3455 type = "NTC";
b04e36ba 3456 else
e29b5d8f 3457 type = "";
b04e36ba 3458
e29b5d8f
TD		 3459 pr_info("R[0x%03X] %016llX %016llX %016llX %p %s\n",
3460 i, le64_to_cpu(u->a), le64_to_cpu(u->b),
13809609 3461 (u64)buffer_info->dma, buffer_info->rxbuf.data, type);
b04e36ba
TD		 3462 } /* for */
3463
3464 /* dump the descriptor caches */
3465 /* rx */
e29b5d8f 3466 pr_info("Rx descriptor cache in 64bit format\n");
b04e36ba 3467 for (i = 0x6000; i <= 0x63FF ; i += 0x10) {
e29b5d8f
TD		 3468 pr_info("R%04X: %08X|%08X %08X|%08X\n",
3469 i,
3470 readl(adapter->hw.hw_addr + i+4),
3471 readl(adapter->hw.hw_addr + i),
3472 readl(adapter->hw.hw_addr + i+12),
3473 readl(adapter->hw.hw_addr + i+8));
b04e36ba
TD		 3474 }
3475 /* tx */
e29b5d8f 3476 pr_info("Tx descriptor cache in 64bit format\n");
b04e36ba 3477 for (i = 0x7000; i <= 0x73FF ; i += 0x10) {
e29b5d8f
TD		 3478 pr_info("T%04X: %08X|%08X %08X|%08X\n",
3479 i,
3480 readl(adapter->hw.hw_addr + i+4),
3481 readl(adapter->hw.hw_addr + i),
3482 readl(adapter->hw.hw_addr + i+12),
3483 readl(adapter->hw.hw_addr + i+8));
b04e36ba
TD		 3484 }
3485exit:
3486 return;
3487}
3488
1da177e4
LT		 3489/**
3490 * e1000_tx_timeout - Respond to a Tx Hang
3491 * @netdev: network interface device structure
b50f7bca 3492 * @txqueue: number of the Tx queue that hung (unused)
1da177e4 3493 **/
b50f7bca 3494static void e1000_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
1da177e4 3495{
60490fe0 3496 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3497
3498 /* Do the reset outside of interrupt context */
87041639
JK		 3499 adapter->tx_timeout_count++;
3500 schedule_work(&adapter->reset_task);
1da177e4
LT		 3501}
3502
64798845 3503static void e1000_reset_task(struct work_struct *work)
1da177e4 3504{
65f27f38
DH		 3505 struct e1000_adapter *adapter =
3506 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3507
b04e36ba 3508 e_err(drv, "Reset adapter\n");
b2f963bf 3509 e1000_reinit_locked(adapter);
1da177e4
LT		 3510}
3511
1da177e4
LT		 3512/**
3513 * e1000_change_mtu - Change the Maximum Transfer Unit
3514 * @netdev: network interface device structure
3515 * @new_mtu: new value for maximum frame size
3516 *
3517 * Returns 0 on success, negative on failure
3518 **/
64798845 3519static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3520{
60490fe0 3521 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3522 struct e1000_hw *hw = &adapter->hw;
91c527a5 3523 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1da177e4 3524
997f5cbd 3525 /* Adapter-specific max frame size limits. */
1dc32918 3526 switch (hw->mac_type) {
9e2feace 3527 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3528 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
feb8f478 3529 e_err(probe, "Jumbo Frames not supported.\n");
2d7edb92 3530 return -EINVAL;
2d7edb92 3531 }
997f5cbd 3532 break;
997f5cbd
JK		 3533 default:
3534 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3535 break;
1da177e4
LT		 3536 }
3537
3d6114e7
JB		 3538 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3539 msleep(1);
3540 /* e1000_down has a dependency on max_frame_size */
3541 hw->max_frame_size = max_frame;
08e83316
SD		 3542 if (netif_running(netdev)) {
3543 /* prevent buffers from being reallocated */
3544 adapter->alloc_rx_buf = e1000_alloc_dummy_rx_buffers;
3d6114e7 3545 e1000_down(adapter);
08e83316 3546 }
3d6114e7 3547
87f5032e 3548 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3549 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3550 * larger slab size.
3551 * i.e. RXBUFFER_2048 --> size-4096 slab
6cfbd97b
JK		 3552 * however with the new *_jumbo_rx* routines, jumbo receives will use
3553 * fragmented skbs
3554 */
9e2feace 3555
9926146b 3556 if (max_frame <= E1000_RXBUFFER_2048)
9e2feace 3557 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3558 else
3559#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3560 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3561#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3562 adapter->rx_buffer_len = PAGE_SIZE;
3563#endif
9e2feace
AK		 3564
3565 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3566 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3567 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3568 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3569 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3570
12299132
FF		 3571 netdev_dbg(netdev, "changing MTU from %d to %d\n",
3572 netdev->mtu, new_mtu);
2d7edb92
MC		 3573 netdev->mtu = new_mtu;
3574
2db10a08 3575 if (netif_running(netdev))
3d6114e7
JB		 3576 e1000_up(adapter);
3577 else
3578 e1000_reset(adapter);
3579
3580 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3581
1da177e4
LT		 3582 return 0;
3583}
3584
3585/**
3586 * e1000_update_stats - Update the board statistics counters
3587 * @adapter: board private structure
3588 **/
64798845 3589void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3590{
5fe31def 3591 struct net_device *netdev = adapter->netdev;
1da177e4 3592 struct e1000_hw *hw = &adapter->hw;
282f33c9 3593 struct pci_dev *pdev = adapter->pdev;
1da177e4 3594 unsigned long flags;
406874a7 3595 u16 phy_tmp;
1da177e4
LT		 3596
3597#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3598
6cfbd97b 3599 /* Prevent stats update while adapter is being reset, or if the pci
282f33c9
LV		 3600 * connection is down.
3601 */
9026729b 3602 if (adapter->link_speed == 0)
282f33c9 3603 return;
81b1955e 3604 if (pci_channel_offline(pdev))
9026729b
AK		 3605 return;
3606
1da177e4
LT		 3607 spin_lock_irqsave(&adapter->stats_lock, flags);
3608
828d055f 3609 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3610 * called from the interrupt context, so they must only
3611 * be written while holding adapter->stats_lock
3612 */
3613
1dc32918
JP		 3614 adapter->stats.crcerrs += er32(CRCERRS);
3615 adapter->stats.gprc += er32(GPRC);
3616 adapter->stats.gorcl += er32(GORCL);
3617 adapter->stats.gorch += er32(GORCH);
3618 adapter->stats.bprc += er32(BPRC);
3619 adapter->stats.mprc += er32(MPRC);
3620 adapter->stats.roc += er32(ROC);
3621
1532ecea
JB		 3622 adapter->stats.prc64 += er32(PRC64);
3623 adapter->stats.prc127 += er32(PRC127);
3624 adapter->stats.prc255 += er32(PRC255);
3625 adapter->stats.prc511 += er32(PRC511);
3626 adapter->stats.prc1023 += er32(PRC1023);
3627 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP		 3628
3629 adapter->stats.symerrs += er32(SYMERRS);
3630 adapter->stats.mpc += er32(MPC);
3631 adapter->stats.scc += er32(SCC);
3632 adapter->stats.ecol += er32(ECOL);
3633 adapter->stats.mcc += er32(MCC);
3634 adapter->stats.latecol += er32(LATECOL);
3635 adapter->stats.dc += er32(DC);
3636 adapter->stats.sec += er32(SEC);
3637 adapter->stats.rlec += er32(RLEC);
3638 adapter->stats.xonrxc += er32(XONRXC);
3639 adapter->stats.xontxc += er32(XONTXC);
3640 adapter->stats.xoffrxc += er32(XOFFRXC);
3641 adapter->stats.xofftxc += er32(XOFFTXC);
3642 adapter->stats.fcruc += er32(FCRUC);
3643 adapter->stats.gptc += er32(GPTC);
3644 adapter->stats.gotcl += er32(GOTCL);
3645 adapter->stats.gotch += er32(GOTCH);
3646 adapter->stats.rnbc += er32(RNBC);
3647 adapter->stats.ruc += er32(RUC);
3648 adapter->stats.rfc += er32(RFC);
3649 adapter->stats.rjc += er32(RJC);
3650 adapter->stats.torl += er32(TORL);
3651 adapter->stats.torh += er32(TORH);
3652 adapter->stats.totl += er32(TOTL);
3653 adapter->stats.toth += er32(TOTH);
3654 adapter->stats.tpr += er32(TPR);
3655
1532ecea
JB		 3656 adapter->stats.ptc64 += er32(PTC64);
3657 adapter->stats.ptc127 += er32(PTC127);
3658 adapter->stats.ptc255 += er32(PTC255);
3659 adapter->stats.ptc511 += er32(PTC511);
3660 adapter->stats.ptc1023 += er32(PTC1023);
3661 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP		 3662
3663 adapter->stats.mptc += er32(MPTC);
3664 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3665
3666 /* used for adaptive IFS */
3667
1dc32918 3668 hw->tx_packet_delta = er32(TPT);
1da177e4 3669 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3670 hw->collision_delta = er32(COLC);
1da177e4
LT		 3671 adapter->stats.colc += hw->collision_delta;
3672
96838a40 3673 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3674 adapter->stats.algnerrc += er32(ALGNERRC);
3675 adapter->stats.rxerrc += er32(RXERRC);
3676 adapter->stats.tncrs += er32(TNCRS);
3677 adapter->stats.cexterr += er32(CEXTERR);
3678 adapter->stats.tsctc += er32(TSCTC);
3679 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT		 3680 }
3681
3682 /* Fill out the OS statistics structure */
5fe31def
AK		 3683 netdev->stats.multicast = adapter->stats.mprc;
3684 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT		 3685
3686 /* Rx Errors */
3687
87041639 3688 /* RLEC on some newer hardware can be incorrect so build
6cfbd97b
JK		 3689 * our own version based on RUC and ROC
3690 */
5fe31def 3691 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3692 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3693 adapter->stats.ruc + adapter->stats.roc +
3694 adapter->stats.cexterr;
49559854 3695 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK		 3696 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3697 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3698 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3699 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT		 3700
3701 /* Tx Errors */
49559854 3702 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK		 3703 netdev->stats.tx_errors = adapter->stats.txerrc;
3704 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3705 netdev->stats.tx_window_errors = adapter->stats.latecol;
3706 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3707 if (hw->bad_tx_carr_stats_fd &&
167fb284 3708 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3709 netdev->stats.tx_carrier_errors = 0;
167fb284
JG		 3710 adapter->stats.tncrs = 0;
3711 }
1da177e4
LT		 3712
3713 /* Tx Dropped needs to be maintained elsewhere */
3714
3715 /* Phy Stats */
96838a40
JB		 3716 if (hw->media_type == e1000_media_type_copper) {
3717 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3718 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3719 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3720 adapter->phy_stats.idle_errors += phy_tmp;
3721 }
3722
96838a40 3723 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3724 (hw->phy_type == e1000_phy_m88) &&
3725 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3726 adapter->phy_stats.receive_errors += phy_tmp;
3727 }
3728
15e376b4 3729 /* Management Stats */
1dc32918
JP		 3730 if (hw->has_smbus) {
3731 adapter->stats.mgptc += er32(MGTPTC);
3732 adapter->stats.mgprc += er32(MGTPRC);
3733 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3734 }
3735
1da177e4
LT		 3736 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3737}
9ac98284 3738
1da177e4
LT		 3739/**
3740 * e1000_intr - Interrupt Handler
3741 * @irq: interrupt number
3742 * @data: pointer to a network interface device structure
1da177e4 3743 **/
64798845 3744static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3745{
3746 struct net_device *netdev = data;
60490fe0 3747 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3748 struct e1000_hw *hw = &adapter->hw;
1532ecea 3749 u32 icr = er32(ICR);
c3570acb 3750
4c11b8ad 3751 if (unlikely((!icr)))
835bb129
JB		 3752 return IRQ_NONE; /* Not our interrupt */
3753
6cfbd97b 3754 /* we might have caused the interrupt, but the above
4c11b8ad
JB		 3755 * read cleared it, and just in case the driver is
3756 * down there is nothing to do so return handled
3757 */
3758 if (unlikely(test_bit(__E1000_DOWN, &adapter->flags)))
3759 return IRQ_HANDLED;
3760
96838a40 3761 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3762 hw->get_link_status = 1;
1314bbf3
AK		 3763 /* guard against interrupt when we're going down */
3764 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 3765 schedule_delayed_work(&adapter->watchdog_task, 1);
1da177e4
LT		 3766 }
3767
1532ecea
JB		 3768 /* disable interrupts, without the synchronize_irq bit */
3769 ew32(IMC, ~0);
3770 E1000_WRITE_FLUSH();
3771
288379f0 3772 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3773 adapter->total_tx_bytes = 0;
3774 adapter->total_tx_packets = 0;
3775 adapter->total_rx_bytes = 0;
3776 adapter->total_rx_packets = 0;
288379f0 3777 __napi_schedule(&adapter->napi);
a6c42322 3778 } else {
90fb5135 3779 /* this really should not happen! if it does it is basically a
6cfbd97b
JK		 3780 * bug, but not a hard error, so enable ints and continue
3781 */
a6c42322
JB		 3782 if (!test_bit(__E1000_DOWN, &adapter->flags))
3783 e1000_irq_enable(adapter);
3784 }
1da177e4 3785
1da177e4
LT		 3786 return IRQ_HANDLED;
3787}
3788
1da177e4
LT		 3789/**
3790 * e1000_clean - NAPI Rx polling callback
b50f7bca
JB		 3791 * @napi: napi struct containing references to driver info
3792 * @budget: budget given to driver for receive packets
1da177e4 3793 **/
64798845 3794static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3795{
6cfbd97b
JK		 3796 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
3797 napi);
650b5a5c 3798 int tx_clean_complete = 0, work_done = 0;
581d708e 3799
650b5a5c 3800 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3801
650b5a5c 3802 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3803
0bcd952f
JB		 3804 if (!tx_clean_complete || work_done == budget)
3805 return budget;
d2c7ddd6 3806
0bcd952f
JB		 3807 /* Exit the polling mode, but don't re-enable interrupts if stack might
3808 * poll us due to busy-polling
3809 */
3810 if (likely(napi_complete_done(napi, work_done))) {
835bb129
JB		 3811 if (likely(adapter->itr_setting & 3))
3812 e1000_set_itr(adapter);
a6c42322
JB		 3813 if (!test_bit(__E1000_DOWN, &adapter->flags))
3814 e1000_irq_enable(adapter);
1da177e4
LT		 3815 }
3816
bea3348e 3817 return work_done;
1da177e4
LT		 3818}
3819
1da177e4
LT		 3820/**
3821 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3822 * @adapter: board private structure
b50f7bca 3823 * @tx_ring: ring to clean
1da177e4 3824 **/
64798845
JP		 3825static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3826 struct e1000_tx_ring *tx_ring)
1da177e4 3827{
1dc32918 3828 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3829 struct net_device *netdev = adapter->netdev;
3830 struct e1000_tx_desc *tx_desc, *eop_desc;
580f321d 3831 struct e1000_tx_buffer *buffer_info;
1da177e4 3832 unsigned int i, eop;
2a1af5d7 3833 unsigned int count = 0;
a48954c8 3834 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
2f66fd36 3835 unsigned int bytes_compl = 0, pkts_compl = 0;
1da177e4
LT		 3836
3837 i = tx_ring->next_to_clean;
3838 eop = tx_ring->buffer_info[i].next_to_watch;
3839 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3840
ccfb342c
AD		 3841 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3842 (count < tx_ring->count)) {
843f4267 3843 bool cleaned = false;
837a1dba 3844 dma_rmb(); /* read buffer_info after eop_desc */
843f4267 3845 for ( ; !cleaned; count++) {
1da177e4
LT		 3846 tx_desc = E1000_TX_DESC(*tx_ring, i);
3847 buffer_info = &tx_ring->buffer_info[i];
3848 cleaned = (i == eop);
3849
835bb129 3850 if (cleaned) {
31c15a2f
DN		 3851 total_tx_packets += buffer_info->segs;
3852 total_tx_bytes += buffer_info->bytecount;
2f66fd36
OESC		 3853 if (buffer_info->skb) {
3854 bytes_compl += buffer_info->skb->len;
3855 pkts_compl++;
3856 }
3857
835bb129 3858 }
fd803241 3859 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3860 tx_desc->upper.data = 0;
1da177e4 3861
a48954c8
JW		 3862 if (unlikely(++i == tx_ring->count))
3863 i = 0;
1da177e4 3864 }
581d708e 3865
1da177e4
LT		 3866 eop = tx_ring->buffer_info[i].next_to_watch;
3867 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3868 }
3869
9eab46b7
DV		 3870 /* Synchronize with E1000_DESC_UNUSED called from e1000_xmit_frame,
3871 * which will reuse the cleaned buffers.
3872 */
3873 smp_store_release(&tx_ring->next_to_clean, i);
1da177e4 3874
2f66fd36
OESC		 3875 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
3876
77b2aad5 3877#define TX_WAKE_THRESHOLD 32
843f4267 3878 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3879 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3880 /* Make sure that anybody stopping the queue after this
3881 * sees the new next_to_clean.
3882 */
3883 smp_mb();
cdd7549e
JB		 3884
3885 if (netif_queue_stopped(netdev) &&
3886 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3887 netif_wake_queue(netdev);
fcfb1224
JB		 3888 ++adapter->restart_queue;
3889 }
77b2aad5 3890 }
2648345f 3891
581d708e 3892 if (adapter->detect_tx_hung) {
2648345f 3893 /* Detect a transmit hang in hardware, this serializes the
6cfbd97b
JK		 3894 * check with the clearing of time_stamp and movement of i
3895 */
c3033b01 3896 adapter->detect_tx_hung = false;
cdd7549e
JB		 3897 if (tx_ring->buffer_info[eop].time_stamp &&
3898 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
6cfbd97b 3899 (adapter->tx_timeout_factor * HZ)) &&
8e95a202 3900 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3901
3902 /* detected Tx unit hang */
feb8f478 3903 e_err(drv, "Detected Tx Unit Hang\n"
675ad473
ET		 3904 " Tx Queue <%lu>\n"
3905 " TDH <%x>\n"
3906 " TDT <%x>\n"
3907 " next_to_use <%x>\n"
3908 " next_to_clean <%x>\n"
3909 "buffer_info[next_to_clean]\n"
3910 " time_stamp <%lx>\n"
3911 " next_to_watch <%x>\n"
3912 " jiffies <%lx>\n"
3913 " next_to_watch.status <%x>\n",
49a45a06 3914 (unsigned long)(tx_ring - adapter->tx_ring),
1dc32918
JP		 3915 readl(hw->hw_addr + tx_ring->tdh),
3916 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3917 tx_ring->next_to_use,
392137fa 3918 tx_ring->next_to_clean,
cdd7549e 3919 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3920 eop,
3921 jiffies,
3922 eop_desc->upper.fields.status);
b04e36ba 3923 e1000_dump(adapter);
1da177e4 3924 netif_stop_queue(netdev);
70b8f1e1 3925 }
1da177e4 3926 }
835bb129
JB		 3927 adapter->total_tx_bytes += total_tx_bytes;
3928 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK		 3929 netdev->stats.tx_bytes += total_tx_bytes;
3930 netdev->stats.tx_packets += total_tx_packets;
807540ba 3931 return count < tx_ring->count;
1da177e4
LT		 3932}
3933
3934/**
3935 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3936 * @adapter: board private structure
3937 * @status_err: receive descriptor status and error fields
3938 * @csum: receive descriptor csum field
b50f7bca 3939 * @skb: socket buffer with received data
1da177e4 3940 **/
64798845
JP		 3941static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3942 u32 csum, struct sk_buff *skb)
1da177e4 3943{
1dc32918 3944 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3945 u16 status = (u16)status_err;
3946 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 3947
3948 skb_checksum_none_assert(skb);
2d7edb92 3949
1da177e4 3950 /* 82543 or newer only */
a48954c8
JW		 3951 if (unlikely(hw->mac_type < e1000_82543))
3952 return;
1da177e4 3953 /* Ignore Checksum bit is set */
a48954c8
JW		 3954 if (unlikely(status & E1000_RXD_STAT_IXSM))
3955 return;
2d7edb92 3956 /* TCP/UDP checksum error bit is set */
96838a40 3957 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3958 /* let the stack verify checksum errors */
1da177e4 3959 adapter->hw_csum_err++;
2d7edb92
MC		 3960 return;
3961 }
3962 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB		 3963 if (!(status & E1000_RXD_STAT_TCPCS))
3964 return;
3965
2d7edb92
MC		 3966 /* It must be a TCP or UDP packet with a valid checksum */
3967 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3968 /* TCP checksum is good */
3969 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3970 }
2d7edb92 3971 adapter->hw_csum_good++;
1da177e4
LT		 3972}
3973
edbbb3ca 3974/**
13809609 3975 * e1000_consume_page - helper function for jumbo Rx path
b50f7bca
JB		 3976 * @bi: software descriptor shadow data
3977 * @skb: skb being modified
3978 * @length: length of data being added
edbbb3ca 3979 **/
93f0afe9 3980static void e1000_consume_page(struct e1000_rx_buffer *bi, struct sk_buff *skb,
6cfbd97b 3981 u16 length)
edbbb3ca 3982{
13809609 3983 bi->rxbuf.page = NULL;
edbbb3ca
JB		 3984 skb->len += length;
3985 skb->data_len += length;
ed64b3cc 3986 skb->truesize += PAGE_SIZE;
edbbb3ca
JB		 3987}
3988
3989/**
3990 * e1000_receive_skb - helper function to handle rx indications
3991 * @adapter: board private structure
3992 * @status: descriptor status field as written by hardware
3993 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3994 * @skb: pointer to sk_buff to be indicated to stack
3995 */
3996static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3997 __le16 vlan, struct sk_buff *skb)
3998{
6a08d194
JB		 3999 skb->protocol = eth_type_trans(skb, adapter->netdev);
4000
5622e404
JP		 4001 if (status & E1000_RXD_STAT_VP) {
4002 u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
4003
86a9bad3 4004 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
5622e404
JP		 4005 }
4006 napi_gro_receive(&adapter->napi, skb);
edbbb3ca
JB		 4007}
4008
4f0aeb1e
FW		 4009/**
4010 * e1000_tbi_adjust_stats
4011 * @hw: Struct containing variables accessed by shared code
b50f7bca 4012 * @stats: point to stats struct
4f0aeb1e
FW		 4013 * @frame_len: The length of the frame in question
4014 * @mac_addr: The Ethernet destination address of the frame in question
4015 *
4016 * Adjusts the statistic counters when a frame is accepted by TBI_ACCEPT
4017 */
4018static void e1000_tbi_adjust_stats(struct e1000_hw *hw,
4019 struct e1000_hw_stats *stats,
4020 u32 frame_len, const u8 *mac_addr)
4021{
4022 u64 carry_bit;
4023
4024 /* First adjust the frame length. */
4025 frame_len--;
4026 /* We need to adjust the statistics counters, since the hardware
4027 * counters overcount this packet as a CRC error and undercount
4028 * the packet as a good packet
4029 */
4030 /* This packet should not be counted as a CRC error. */
4031 stats->crcerrs--;
4032 /* This packet does count as a Good Packet Received. */
4033 stats->gprc++;
4034
4035 /* Adjust the Good Octets received counters */
4036 carry_bit = 0x80000000 & stats->gorcl;
4037 stats->gorcl += frame_len;
4038 /* If the high bit of Gorcl (the low 32 bits of the Good Octets
4039 * Received Count) was one before the addition,
4040 * AND it is zero after, then we lost the carry out,
4041 * need to add one to Gorch (Good Octets Received Count High).
4042 * This could be simplified if all environments supported
4043 * 64-bit integers.
4044 */
4045 if (carry_bit && ((stats->gorcl & 0x80000000) == 0))
4046 stats->gorch++;
4047 /* Is this a broadcast or multicast? Check broadcast first,
4048 * since the test for a multicast frame will test positive on
4049 * a broadcast frame.
4050 */
4051 if (is_broadcast_ether_addr(mac_addr))
4052 stats->bprc++;
4053 else if (is_multicast_ether_addr(mac_addr))
4054 stats->mprc++;
4055
4056 if (frame_len == hw->max_frame_size) {
4057 /* In this case, the hardware has overcounted the number of
4058 * oversize frames.
4059 */
4060 if (stats->roc > 0)
4061 stats->roc--;
4062 }
4063
4064 /* Adjust the bin counters when the extra byte put the frame in the
4065 * wrong bin. Remember that the frame_len was adjusted above.
4066 */
4067 if (frame_len == 64) {
4068 stats->prc64++;
4069 stats->prc127--;
4070 } else if (frame_len == 127) {
4071 stats->prc127++;
4072 stats->prc255--;
4073 } else if (frame_len == 255) {
4074 stats->prc255++;
4075 stats->prc511--;
4076 } else if (frame_len == 511) {
4077 stats->prc511++;
4078 stats->prc1023--;
4079 } else if (frame_len == 1023) {
4080 stats->prc1023++;
4081 stats->prc1522--;
4082 } else if (frame_len == 1522) {
4083 stats->prc1522++;
4084 }
4085}
4086
2037110c
FW		 4087static bool e1000_tbi_should_accept(struct e1000_adapter *adapter,
4088 u8 status, u8 errors,
4089 u32 length, const u8 *data)
4090{
4091 struct e1000_hw *hw = &adapter->hw;
4092 u8 last_byte = *(data + length - 1);
4093
4094 if (TBI_ACCEPT(hw, status, errors, length, last_byte)) {
4095 unsigned long irq_flags;
4096
4097 spin_lock_irqsave(&adapter->stats_lock, irq_flags);
4098 e1000_tbi_adjust_stats(hw, &adapter->stats, length, data);
4099 spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);
4100
4101 return true;
4102 }
4103
4104 return false;
4105}
4106
2b294b18
FW		 4107static struct sk_buff *e1000_alloc_rx_skb(struct e1000_adapter *adapter,
4108 unsigned int bufsz)
4109{
67fd893e 4110 struct sk_buff *skb = napi_alloc_skb(&adapter->napi, bufsz);
2b294b18
FW		 4111
4112 if (unlikely(!skb))
4113 adapter->alloc_rx_buff_failed++;
4114 return skb;
4115}
4116
edbbb3ca
JB		 4117/**
4118 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
4119 * @adapter: board private structure
4120 * @rx_ring: ring to clean
4121 * @work_done: amount of napi work completed this call
4122 * @work_to_do: max amount of work allowed for this call to do
4123 *
4124 * the return value indicates whether actual cleaning was done, there
4125 * is no guarantee that everything was cleaned
4126 */
4127static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
4128 struct e1000_rx_ring *rx_ring,
4129 int *work_done, int work_to_do)
4130{
edbbb3ca
JB		 4131 struct net_device *netdev = adapter->netdev;
4132 struct pci_dev *pdev = adapter->pdev;
4133 struct e1000_rx_desc *rx_desc, *next_rxd;
93f0afe9 4134 struct e1000_rx_buffer *buffer_info, *next_buffer;
edbbb3ca
JB		 4135 u32 length;
4136 unsigned int i;
4137 int cleaned_count = 0;
4138 bool cleaned = false;
a48954c8 4139 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
edbbb3ca
JB		 4140
4141 i = rx_ring->next_to_clean;
4142 rx_desc = E1000_RX_DESC(*rx_ring, i);
4143 buffer_info = &rx_ring->buffer_info[i];
4144
4145 while (rx_desc->status & E1000_RXD_STAT_DD) {
4146 struct sk_buff *skb;
4147 u8 status;
4148
4149 if (*work_done >= work_to_do)
4150 break;
4151 (*work_done)++;
837a1dba 4152 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
edbbb3ca
JB		 4153
4154 status = rx_desc->status;
edbbb3ca 4155
a48954c8
JW		 4156 if (++i == rx_ring->count)
4157 i = 0;
4158
edbbb3ca
JB		 4159 next_rxd = E1000_RX_DESC(*rx_ring, i);
4160 prefetch(next_rxd);
4161
4162 next_buffer = &rx_ring->buffer_info[i];
4163
4164 cleaned = true;
4165 cleaned_count++;
b16f53be 4166 dma_unmap_page(&pdev->dev, buffer_info->dma,
93f0afe9 4167 adapter->rx_buffer_len, DMA_FROM_DEVICE);
edbbb3ca
JB		 4168 buffer_info->dma = 0;
4169
4170 length = le16_to_cpu(rx_desc->length);
4171
4172 /* errors is only valid for DD + EOP descriptors */
4173 if (unlikely((status & E1000_RXD_STAT_EOP) &&
4174 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
13809609 4175 u8 *mapped = page_address(buffer_info->rxbuf.page);
2037110c
FW		 4176
4177 if (e1000_tbi_should_accept(adapter, status,
4178 rx_desc->errors,
4179 length, mapped)) {
edbbb3ca 4180 length--;
2037110c
FW		 4181 } else if (netdev->features & NETIF_F_RXALL) {
4182 goto process_skb;
edbbb3ca 4183 } else {
edbbb3ca 4184 /* an error means any chain goes out the window
6cfbd97b
JK		 4185 * too
4186 */
399e06a5 4187 dev_kfree_skb(rx_ring->rx_skb_top);
edbbb3ca
JB		 4188 rx_ring->rx_skb_top = NULL;
4189 goto next_desc;
4190 }
4191 }
4192
4193#define rxtop rx_ring->rx_skb_top
e825b731 4194process_skb:
edbbb3ca
JB		 4195 if (!(status & E1000_RXD_STAT_EOP)) {
4196 /* this descriptor is only the beginning (or middle) */
4197 if (!rxtop) {
4198 /* this is the beginning of a chain */
de591c78 4199 rxtop = napi_get_frags(&adapter->napi);
13809609
FW		 4200 if (!rxtop)
4201 break;
4202
4203 skb_fill_page_desc(rxtop, 0,
4204 buffer_info->rxbuf.page,
6cfbd97b 4205 0, length);
edbbb3ca
JB		 4206 } else {
4207 /* this is the middle of a chain */
4208 skb_fill_page_desc(rxtop,
4209 skb_shinfo(rxtop)->nr_frags,
13809609 4210 buffer_info->rxbuf.page, 0, length);
edbbb3ca
JB		 4211 }
4212 e1000_consume_page(buffer_info, rxtop, length);
4213 goto next_desc;
4214 } else {
4215 if (rxtop) {
4216 /* end of the chain */
4217 skb_fill_page_desc(rxtop,
4218 skb_shinfo(rxtop)->nr_frags,
13809609 4219 buffer_info->rxbuf.page, 0, length);
edbbb3ca
JB		 4220 skb = rxtop;
4221 rxtop = NULL;
4222 e1000_consume_page(buffer_info, skb, length);
4223 } else {
13809609 4224 struct page *p;
edbbb3ca 4225 /* no chain, got EOP, this buf is the packet
6cfbd97b
JK		 4226 * copybreak to save the put_page/alloc_page
4227 */
13809609 4228 p = buffer_info->rxbuf.page;
de591c78 4229 if (length <= copybreak) {
edbbb3ca 4230 u8 *vaddr;
13809609 4231
de591c78
FW		 4232 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4233 length -= 4;
4234 skb = e1000_alloc_rx_skb(adapter,
4235 length);
4236 if (!skb)
4237 break;
4238
13809609 4239 vaddr = kmap_atomic(p);
6cfbd97b
JK		 4240 memcpy(skb_tail_pointer(skb), vaddr,
4241 length);
4679026d 4242 kunmap_atomic(vaddr);
edbbb3ca 4243 /* re-use the page, so don't erase
13809609 4244 * buffer_info->rxbuf.page
6cfbd97b 4245 */
edbbb3ca 4246 skb_put(skb, length);
de591c78
FW		 4247 e1000_rx_checksum(adapter,
4248 status | rx_desc->errors << 24,
4249 le16_to_cpu(rx_desc->csum), skb);
4250
4251 total_rx_bytes += skb->len;
4252 total_rx_packets++;
4253
4254 e1000_receive_skb(adapter, status,
4255 rx_desc->special, skb);
4256 goto next_desc;
edbbb3ca 4257 } else {
de591c78
FW		 4258 skb = napi_get_frags(&adapter->napi);
4259 if (!skb) {
4260 adapter->alloc_rx_buff_failed++;
4261 break;
4262 }
13809609 4263 skb_fill_page_desc(skb, 0, p, 0,
6cfbd97b 4264 length);
edbbb3ca 4265 e1000_consume_page(buffer_info, skb,
6cfbd97b 4266 length);
edbbb3ca
JB		 4267 }
4268 }
4269 }
4270
4271 /* Receive Checksum Offload XXX recompute due to CRC strip? */
4272 e1000_rx_checksum(adapter,
6cfbd97b
JK		 4273 (u32)(status) |
4274 ((u32)(rx_desc->errors) << 24),
4275 le16_to_cpu(rx_desc->csum), skb);
edbbb3ca 4276
b0d1562c
BG		 4277 total_rx_bytes += (skb->len - 4); /* don't count FCS */
4278 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4279 pskb_trim(skb, skb->len - 4);
edbbb3ca
JB		 4280 total_rx_packets++;
4281
de591c78
FW		 4282 if (status & E1000_RXD_STAT_VP) {
4283 __le16 vlan = rx_desc->special;
4284 u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
4285
4286 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
edbbb3ca
JB		 4287 }
4288
de591c78 4289 napi_gro_frags(&adapter->napi);
edbbb3ca
JB		 4290
4291next_desc:
4292 rx_desc->status = 0;
4293
4294 /* return some buffers to hardware, one at a time is too slow */
4295 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4296 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4297 cleaned_count = 0;
4298 }
4299
4300 /* use prefetched values */
4301 rx_desc = next_rxd;
4302 buffer_info = next_buffer;
4303 }
4304 rx_ring->next_to_clean = i;
4305
4306 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4307 if (cleaned_count)
4308 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4309
4310 adapter->total_rx_packets += total_rx_packets;
4311 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4312 netdev->stats.rx_bytes += total_rx_bytes;
4313 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB		 4314 return cleaned;
4315}
4316
6cfbd97b 4317/* this should improve performance for small packets with large amounts
57bf6eef
JP		 4318 * of reassembly being done in the stack
4319 */
2b294b18 4320static struct sk_buff *e1000_copybreak(struct e1000_adapter *adapter,
93f0afe9 4321 struct e1000_rx_buffer *buffer_info,
2b294b18 4322 u32 length, const void *data)
57bf6eef 4323{
2b294b18 4324 struct sk_buff *skb;
57bf6eef
JP		 4325
4326 if (length > copybreak)
2b294b18 4327 return NULL;
57bf6eef 4328
2b294b18
FW		 4329 skb = e1000_alloc_rx_skb(adapter, length);
4330 if (!skb)
4331 return NULL;
4332
4333 dma_sync_single_for_cpu(&adapter->pdev->dev, buffer_info->dma,
4334 length, DMA_FROM_DEVICE);
4335
59ae1d12 4336 skb_put_data(skb, data, length);
57bf6eef 4337
2b294b18 4338 return skb;
57bf6eef
JP		 4339}
4340
1da177e4 4341/**
2d7edb92 4342 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 4343 * @adapter: board private structure
edbbb3ca
JB		 4344 * @rx_ring: ring to clean
4345 * @work_done: amount of napi work completed this call
4346 * @work_to_do: max amount of work allowed for this call to do
4347 */
64798845
JP		 4348static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
4349 struct e1000_rx_ring *rx_ring,
4350 int *work_done, int work_to_do)
1da177e4 4351{
1da177e4
LT		 4352 struct net_device *netdev = adapter->netdev;
4353 struct pci_dev *pdev = adapter->pdev;
86c3d59f 4354 struct e1000_rx_desc *rx_desc, *next_rxd;
93f0afe9 4355 struct e1000_rx_buffer *buffer_info, *next_buffer;
406874a7 4356 u32 length;
1da177e4 4357 unsigned int i;
72d64a43 4358 int cleaned_count = 0;
c3033b01 4359 bool cleaned = false;
a48954c8 4360 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1da177e4
LT		 4361
4362 i = rx_ring->next_to_clean;
4363 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4364 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4365
b92ff8ee 4366 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4367 struct sk_buff *skb;
13809609 4368 u8 *data;
a292ca6e 4369 u8 status;
90fb5135 4370
96838a40 4371 if (*work_done >= work_to_do)
1da177e4
LT		 4372 break;
4373 (*work_done)++;
837a1dba 4374 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
c3570acb 4375
a292ca6e 4376 status = rx_desc->status;
2b294b18 4377 length = le16_to_cpu(rx_desc->length);
86c3d59f 4378
13809609
FW		 4379 data = buffer_info->rxbuf.data;
4380 prefetch(data);
4381 skb = e1000_copybreak(adapter, buffer_info, length, data);
2b294b18 4382 if (!skb) {
13809609
FW		 4383 unsigned int frag_len = e1000_frag_len(adapter);
4384
4385 skb = build_skb(data - E1000_HEADROOM, frag_len);
4386 if (!skb) {
4387 adapter->alloc_rx_buff_failed++;
4388 break;
4389 }
4390
4391 skb_reserve(skb, E1000_HEADROOM);
2b294b18 4392 dma_unmap_single(&pdev->dev, buffer_info->dma,
93f0afe9
FW		 4393 adapter->rx_buffer_len,
4394 DMA_FROM_DEVICE);
2b294b18 4395 buffer_info->dma = 0;
13809609 4396 buffer_info->rxbuf.data = NULL;
2b294b18 4397 }
30320be8 4398
a48954c8
JW		 4399 if (++i == rx_ring->count)
4400 i = 0;
4401
86c3d59f 4402 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4403 prefetch(next_rxd);
4404
86c3d59f 4405 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4406
c3033b01 4407 cleaned = true;
72d64a43 4408 cleaned_count++;
1da177e4 4409
ea30e119 4410 /* !EOP means multiple descriptors were used to store a single
40a14dea
JB		 4411 * packet, if thats the case we need to toss it. In fact, we
4412 * to toss every packet with the EOP bit clear and the next
4413 * frame that _does_ have the EOP bit set, as it is by
4414 * definition only a frame fragment
4415 */
4416 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
4417 adapter->discarding = true;
4418
4419 if (adapter->discarding) {
a1415ee6 4420 /* All receives must fit into a single buffer */
2037110c 4421 netdev_dbg(netdev, "Receive packet consumed multiple buffers\n");
2b294b18 4422 dev_kfree_skb(skb);
40a14dea
JB		 4423 if (status & E1000_RXD_STAT_EOP)
4424 adapter->discarding = false;
1da177e4
LT		 4425 goto next_desc;
4426 }
4427
96838a40 4428 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
2037110c
FW		 4429 if (e1000_tbi_should_accept(adapter, status,
4430 rx_desc->errors,
13809609 4431 length, data)) {
1da177e4 4432 length--;
2037110c
FW		 4433 } else if (netdev->features & NETIF_F_RXALL) {
4434 goto process_skb;
1da177e4 4435 } else {
2b294b18 4436 dev_kfree_skb(skb);
1da177e4
LT		 4437 goto next_desc;
4438 }
1cb5821f 4439 }
1da177e4 4440
e825b731 4441process_skb:
b0d1562c 4442 total_rx_bytes += (length - 4); /* don't count FCS */
835bb129
JB		 4443 total_rx_packets++;
4444
b0d1562c
BG		 4445 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4446 /* adjust length to remove Ethernet CRC, this must be
4447 * done after the TBI_ACCEPT workaround above
4448 */
4449 length -= 4;
4450
13809609 4451 if (buffer_info->rxbuf.data == NULL)
2b294b18
FW		 4452 skb_put(skb, length);
4453 else /* copybreak skb */
4454 skb_trim(skb, length);
1da177e4
LT		 4455
4456 /* Receive Checksum Offload */
a292ca6e 4457 e1000_rx_checksum(adapter,
406874a7
JP		 4458 (u32)(status) |
4459 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4460 le16_to_cpu(rx_desc->csum), skb);
96838a40 4461
edbbb3ca 4462 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 4463
1da177e4
LT		 4464next_desc:
4465 rx_desc->status = 0;
1da177e4 4466
72d64a43
JK		 4467 /* return some buffers to hardware, one at a time is too slow */
4468 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4469 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4470 cleaned_count = 0;
4471 }
4472
30320be8 4473 /* use prefetched values */
86c3d59f
JB		 4474 rx_desc = next_rxd;
4475 buffer_info = next_buffer;
1da177e4 4476 }
1da177e4 4477 rx_ring->next_to_clean = i;
72d64a43
JK		 4478
4479 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4480 if (cleaned_count)
4481 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4482
835bb129
JB		 4483 adapter->total_rx_packets += total_rx_packets;
4484 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4485 netdev->stats.rx_bytes += total_rx_bytes;
4486 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4487 return cleaned;
4488}
4489
edbbb3ca
JB		 4490/**
4491 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
4492 * @adapter: address of board private structure
4493 * @rx_ring: pointer to receive ring structure
4494 * @cleaned_count: number of buffers to allocate this pass
4495 **/
edbbb3ca
JB		 4496static void
4497e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
6cfbd97b 4498 struct e1000_rx_ring *rx_ring, int cleaned_count)
edbbb3ca 4499{
edbbb3ca
JB		 4500 struct pci_dev *pdev = adapter->pdev;
4501 struct e1000_rx_desc *rx_desc;
93f0afe9 4502 struct e1000_rx_buffer *buffer_info;
edbbb3ca 4503 unsigned int i;
edbbb3ca
JB		 4504
4505 i = rx_ring->next_to_use;
4506 buffer_info = &rx_ring->buffer_info[i];
4507
4508 while (cleaned_count--) {
edbbb3ca 4509 /* allocate a new page if necessary */
13809609
FW		 4510 if (!buffer_info->rxbuf.page) {
4511 buffer_info->rxbuf.page = alloc_page(GFP_ATOMIC);
4512 if (unlikely(!buffer_info->rxbuf.page)) {
edbbb3ca
JB		 4513 adapter->alloc_rx_buff_failed++;
4514 break;
4515 }
4516 }
4517
b5abb028 4518 if (!buffer_info->dma) {
b16f53be 4519 buffer_info->dma = dma_map_page(&pdev->dev,
13809609
FW		 4520 buffer_info->rxbuf.page, 0,
4521 adapter->rx_buffer_len,
b16f53be
NN		 4522 DMA_FROM_DEVICE);
4523 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
13809609
FW		 4524 put_page(buffer_info->rxbuf.page);
4525 buffer_info->rxbuf.page = NULL;
b5abb028
AB		 4526 buffer_info->dma = 0;
4527 adapter->alloc_rx_buff_failed++;
13809609 4528 break;
b5abb028
AB		 4529 }
4530 }
edbbb3ca
JB		 4531
4532 rx_desc = E1000_RX_DESC(*rx_ring, i);
4533 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4534
4535 if (unlikely(++i == rx_ring->count))
4536 i = 0;
4537 buffer_info = &rx_ring->buffer_info[i];
4538 }
4539
4540 if (likely(rx_ring->next_to_use != i)) {
4541 rx_ring->next_to_use = i;
4542 if (unlikely(i-- == 0))
4543 i = (rx_ring->count - 1);
4544
4545 /* Force memory writes to complete before letting h/w
4546 * know there are new descriptors to fetch. (Only
4547 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 4548 * such as IA-64).
4549 */
583cf7be 4550 dma_wmb();
edbbb3ca
JB		 4551 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4552 }
4553}
4554
1da177e4 4555/**
2d7edb92 4556 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4 4557 * @adapter: address of board private structure
b50f7bca
JB		 4558 * @rx_ring: pointer to ring struct
4559 * @cleaned_count: number of new Rx buffers to try to allocate
1da177e4 4560 **/
64798845
JP		 4561static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4562 struct e1000_rx_ring *rx_ring,
4563 int cleaned_count)
1da177e4 4564{
1dc32918 4565 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4566 struct pci_dev *pdev = adapter->pdev;
4567 struct e1000_rx_desc *rx_desc;
93f0afe9 4568 struct e1000_rx_buffer *buffer_info;
2648345f 4569 unsigned int i;
89d71a66 4570 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT		 4571
4572 i = rx_ring->next_to_use;
4573 buffer_info = &rx_ring->buffer_info[i];
4574
a292ca6e 4575 while (cleaned_count--) {
13809609
FW		 4576 void *data;
4577
4578 if (buffer_info->rxbuf.data)
2b294b18 4579 goto skip;
a292ca6e 4580
13809609
FW		 4581 data = e1000_alloc_frag(adapter);
4582 if (!data) {
1da177e4 4583 /* Better luck next round */
72d64a43 4584 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4585 break;
4586 }
4587
2648345f 4588 /* Fix for errata 23, can't cross 64kB boundary */
13809609
FW		 4589 if (!e1000_check_64k_bound(adapter, data, bufsz)) {
4590 void *olddata = data;
feb8f478 4591 e_err(rx_err, "skb align check failed: %u bytes at "
13809609 4592 "%p\n", bufsz, data);
2648345f 4593 /* Try again, without freeing the previous */
13809609 4594 data = e1000_alloc_frag(adapter);
2648345f 4595 /* Failed allocation, critical failure */
13809609 4596 if (!data) {
6bf93ba8 4597 skb_free_frag(olddata);
edbbb3ca 4598 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4599 break;
4600 }
2648345f 4601
13809609 4602 if (!e1000_check_64k_bound(adapter, data, bufsz)) {
1da177e4 4603 /* give up */
6bf93ba8
AD		 4604 skb_free_frag(data);
4605 skb_free_frag(olddata);
edbbb3ca 4606 adapter->alloc_rx_buff_failed++;
13809609 4607 break;
1da177e4 4608 }
ca6f7224
CH		 4609
4610 /* Use new allocation */
6bf93ba8 4611 skb_free_frag(olddata);
1da177e4 4612 }
b16f53be 4613 buffer_info->dma = dma_map_single(&pdev->dev,
13809609 4614 data,
93f0afe9 4615 adapter->rx_buffer_len,
b16f53be
NN		 4616 DMA_FROM_DEVICE);
4617 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
6bf93ba8 4618 skb_free_frag(data);
b5abb028
AB		 4619 buffer_info->dma = 0;
4620 adapter->alloc_rx_buff_failed++;
13809609 4621 break;
b5abb028 4622 }
1da177e4 4623
6cfbd97b 4624 /* XXX if it was allocated cleanly it will never map to a
edbbb3ca
JB		 4625 * boundary crossing
4626 */
4627
2648345f
MC		 4628 /* Fix for errata 23, can't cross 64kB boundary */
4629 if (!e1000_check_64k_bound(adapter,
4630 (void *)(unsigned long)buffer_info->dma,
4631 adapter->rx_buffer_len)) {
feb8f478
ET		 4632 e_err(rx_err, "dma align check failed: %u bytes at "
4633 "%p\n", adapter->rx_buffer_len,
675ad473 4634 (void *)(unsigned long)buffer_info->dma);
1da177e4 4635
b16f53be 4636 dma_unmap_single(&pdev->dev, buffer_info->dma,
1da177e4 4637 adapter->rx_buffer_len,
b16f53be 4638 DMA_FROM_DEVICE);
13809609 4639
6bf93ba8 4640 skb_free_frag(data);
13809609 4641 buffer_info->rxbuf.data = NULL;
679be3ba 4642 buffer_info->dma = 0;
1da177e4 4643
edbbb3ca 4644 adapter->alloc_rx_buff_failed++;
13809609 4645 break;
1da177e4 4646 }
13809609
FW		 4647 buffer_info->rxbuf.data = data;
4648 skip:
1da177e4
LT		 4649 rx_desc = E1000_RX_DESC(*rx_ring, i);
4650 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4651
96838a40
JB		 4652 if (unlikely(++i == rx_ring->count))
4653 i = 0;
1da177e4
LT		 4654 buffer_info = &rx_ring->buffer_info[i];
4655 }
4656
b92ff8ee
JB		 4657 if (likely(rx_ring->next_to_use != i)) {
4658 rx_ring->next_to_use = i;
4659 if (unlikely(i-- == 0))
4660 i = (rx_ring->count - 1);
4661
4662 /* Force memory writes to complete before letting h/w
4663 * know there are new descriptors to fetch. (Only
4664 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 4665 * such as IA-64).
4666 */
583cf7be 4667 dma_wmb();
1dc32918 4668 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4669 }
1da177e4
LT		 4670}
4671
4672/**
4673 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
b50f7bca 4674 * @adapter: address of board private structure
1da177e4 4675 **/
64798845 4676static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4677{
1dc32918 4678 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4679 u16 phy_status;
4680 u16 phy_ctrl;
1da177e4 4681
1dc32918
JP		 4682 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4683 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4684 return;
4685
96838a40 4686 if (adapter->smartspeed == 0) {
1da177e4 4687 /* If Master/Slave config fault is asserted twice,
6cfbd97b
JK		 4688 * we assume back-to-back
4689 */
1dc32918 4690 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
a48954c8
JW		 4691 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT))
4692 return;
1dc32918 4693 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
a48954c8
JW		 4694 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT))
4695 return;
1dc32918 4696 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4697 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4698 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4699 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4700 phy_ctrl);
4701 adapter->smartspeed++;
1dc32918
JP		 4702 if (!e1000_phy_setup_autoneg(hw) &&
4703 !e1000_read_phy_reg(hw, PHY_CTRL,
6cfbd97b 4704 &phy_ctrl)) {
1da177e4
LT		 4705 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4706 MII_CR_RESTART_AUTO_NEG);
1dc32918 4707 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4708 phy_ctrl);
4709 }
4710 }
4711 return;
96838a40 4712 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4713 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4714 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4715 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4716 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4717 if (!e1000_phy_setup_autoneg(hw) &&
4718 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4719 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4720 MII_CR_RESTART_AUTO_NEG);
1dc32918 4721 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4722 }
4723 }
4724 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4725 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4726 adapter->smartspeed = 0;
4727}
4728
4729/**
b50f7bca
JB		 4730 * e1000_ioctl - handle ioctl calls
4731 * @netdev: pointer to our netdev
4732 * @ifr: pointer to interface request structure
4733 * @cmd: ioctl data
1da177e4 4734 **/
64798845 4735static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4736{
4737 switch (cmd) {
4738 case SIOCGMIIPHY:
4739 case SIOCGMIIREG:
4740 case SIOCSMIIREG:
4741 return e1000_mii_ioctl(netdev, ifr, cmd);
4742 default:
4743 return -EOPNOTSUPP;
4744 }
4745}
4746
4747/**
4748 * e1000_mii_ioctl -
b50f7bca
JB		 4749 * @netdev: pointer to our netdev
4750 * @ifr: pointer to interface request structure
4751 * @cmd: ioctl data
1da177e4 4752 **/
64798845
JP		 4753static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4754 int cmd)
1da177e4 4755{
60490fe0 4756 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4757 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4758 struct mii_ioctl_data *data = if_mii(ifr);
4759 int retval;
406874a7 4760 u16 mii_reg;
97876fc6 4761 unsigned long flags;
1da177e4 4762
1dc32918 4763 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4764 return -EOPNOTSUPP;
4765
4766 switch (cmd) {
4767 case SIOCGMIIPHY:
1dc32918 4768 data->phy_id = hw->phy_addr;
1da177e4
LT		 4769 break;
4770 case SIOCGMIIREG:
97876fc6 4771 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4772 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4773 &data->val_out)) {
4774 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4775 return -EIO;
97876fc6
MC		 4776 }
4777 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4778 break;
4779 case SIOCSMIIREG:
96838a40 4780 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4781 return -EFAULT;
4782 mii_reg = data->val_in;
97876fc6 4783 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4784 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4785 mii_reg)) {
4786 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4787 return -EIO;
97876fc6 4788 }
f0163ac4 4789 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4790 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4791 switch (data->reg_num) {
4792 case PHY_CTRL:
96838a40 4793 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4794 break;
96838a40 4795 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4796 hw->autoneg = 1;
4797 hw->autoneg_advertised = 0x2F;
1da177e4 4798 } else {
14ad2513 4799 u32 speed;
1da177e4 4800 if (mii_reg & 0x40)
14ad2513 4801 speed = SPEED_1000;
1da177e4 4802 else if (mii_reg & 0x2000)
14ad2513 4803 speed = SPEED_100;
1da177e4 4804 else
14ad2513
DD		 4805 speed = SPEED_10;
4806 retval = e1000_set_spd_dplx(
4807 adapter, speed,
4808 ((mii_reg & 0x100)
4809 ? DUPLEX_FULL :
4810 DUPLEX_HALF));
f0163ac4 4811 if (retval)
1da177e4
LT		 4812 return retval;
4813 }
2db10a08
AK		 4814 if (netif_running(adapter->netdev))
4815 e1000_reinit_locked(adapter);
4816 else
1da177e4
LT		 4817 e1000_reset(adapter);
4818 break;
4819 case M88E1000_PHY_SPEC_CTRL:
4820 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4821 if (e1000_phy_reset(hw))
1da177e4
LT		 4822 return -EIO;
4823 break;
4824 }
4825 } else {
4826 switch (data->reg_num) {
4827 case PHY_CTRL:
96838a40 4828 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4829 break;
2db10a08
AK		 4830 if (netif_running(adapter->netdev))
4831 e1000_reinit_locked(adapter);
4832 else
1da177e4
LT		 4833 e1000_reset(adapter);
4834 break;
4835 }
4836 }
4837 break;
4838 default:
4839 return -EOPNOTSUPP;
4840 }
4841 return E1000_SUCCESS;
4842}
4843
64798845 4844void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4845{
4846 struct e1000_adapter *adapter = hw->back;
2648345f 4847 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4848
96838a40 4849 if (ret_val)
feb8f478 4850 e_err(probe, "Error in setting MWI\n");
1da177e4
LT		 4851}
4852
64798845 4853void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4854{
4855 struct e1000_adapter *adapter = hw->back;
4856
4857 pci_clear_mwi(adapter->pdev);
4858}
4859
64798845 4860int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4861{
4862 struct e1000_adapter *adapter = hw->back;
4863 return pcix_get_mmrbc(adapter->pdev);
4864}
4865
64798845 4866void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4867{
4868 struct e1000_adapter *adapter = hw->back;
4869 pcix_set_mmrbc(adapter->pdev, mmrbc);
4870}
4871
64798845 4872void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4873{
4874 outl(value, port);
4875}
4876
5622e404
JP		 4877static bool e1000_vlan_used(struct e1000_adapter *adapter)
4878{
4879 u16 vid;
4880
4881 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4882 return true;
4883 return false;
4884}
4885
52f5509f
JP		 4886static void __e1000_vlan_mode(struct e1000_adapter *adapter,
4887 netdev_features_t features)
4888{
4889 struct e1000_hw *hw = &adapter->hw;
4890 u32 ctrl;
4891
4892 ctrl = er32(CTRL);
f646968f 4893 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
52f5509f
JP		 4894 /* enable VLAN tag insert/strip */
4895 ctrl |= E1000_CTRL_VME;
4896 } else {
4897 /* disable VLAN tag insert/strip */
4898 ctrl &= ~E1000_CTRL_VME;
4899 }
4900 ew32(CTRL, ctrl);
4901}
5622e404
JP		 4902static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
4903 bool filter_on)
1da177e4 4904{
1dc32918 4905 struct e1000_hw *hw = &adapter->hw;
5622e404 4906 u32 rctl;
1da177e4 4907
9150b76a
JB		 4908 if (!test_bit(__E1000_DOWN, &adapter->flags))
4909 e1000_irq_disable(adapter);
1da177e4 4910
52f5509f 4911 __e1000_vlan_mode(adapter, adapter->netdev->features);
5622e404 4912 if (filter_on) {
1532ecea
JB		 4913 /* enable VLAN receive filtering */
4914 rctl = er32(RCTL);
4915 rctl &= ~E1000_RCTL_CFIEN;
5622e404 4916 if (!(adapter->netdev->flags & IFF_PROMISC))
1532ecea
JB		 4917 rctl |= E1000_RCTL_VFE;
4918 ew32(RCTL, rctl);
4919 e1000_update_mng_vlan(adapter);
1da177e4 4920 } else {
1532ecea
JB		 4921 /* disable VLAN receive filtering */
4922 rctl = er32(RCTL);
4923 rctl &= ~E1000_RCTL_VFE;
4924 ew32(RCTL, rctl);
5622e404 4925 }
fd38d7a0 4926
5622e404
JP		 4927 if (!test_bit(__E1000_DOWN, &adapter->flags))
4928 e1000_irq_enable(adapter);
4929}
4930
c8f44aff 4931static void e1000_vlan_mode(struct net_device *netdev,
52f5509f 4932 netdev_features_t features)
5622e404
JP		 4933{
4934 struct e1000_adapter *adapter = netdev_priv(netdev);
5622e404
JP		 4935
4936 if (!test_bit(__E1000_DOWN, &adapter->flags))
4937 e1000_irq_disable(adapter);
4938
52f5509f 4939 __e1000_vlan_mode(adapter, features);
1da177e4 4940
9150b76a
JB		 4941 if (!test_bit(__E1000_DOWN, &adapter->flags))
4942 e1000_irq_enable(adapter);
1da177e4
LT		 4943}
4944
80d5c368
PM		 4945static int e1000_vlan_rx_add_vid(struct net_device *netdev,
4946 __be16 proto, u16 vid)
1da177e4 4947{
60490fe0 4948 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4949 struct e1000_hw *hw = &adapter->hw;
406874a7 4950 u32 vfta, index;
96838a40 4951
1dc32918 4952 if ((hw->mng_cookie.status &
96838a40
JB		 4953 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4954 (vid == adapter->mng_vlan_id))
8e586137 4955 return 0;
5622e404
JP		 4956
4957 if (!e1000_vlan_used(adapter))
4958 e1000_vlan_filter_on_off(adapter, true);
4959
1da177e4
LT		 4960 /* add VID to filter table */
4961 index = (vid >> 5) & 0x7F;
1dc32918 4962 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4963 vfta |= (1 << (vid & 0x1F));
1dc32918 4964 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4965
4966 set_bit(vid, adapter->active_vlans);
8e586137
JP		 4967
4968 return 0;
1da177e4
LT		 4969}
4970
80d5c368
PM		 4971static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
4972 __be16 proto, u16 vid)
1da177e4 4973{
60490fe0 4974 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4975 struct e1000_hw *hw = &adapter->hw;
406874a7 4976 u32 vfta, index;
1da177e4 4977
9150b76a
JB		 4978 if (!test_bit(__E1000_DOWN, &adapter->flags))
4979 e1000_irq_disable(adapter);
9150b76a
JB		 4980 if (!test_bit(__E1000_DOWN, &adapter->flags))
4981 e1000_irq_enable(adapter);
1da177e4
LT		 4982
4983 /* remove VID from filter table */
4984 index = (vid >> 5) & 0x7F;
1dc32918 4985 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4986 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4987 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4988
4989 clear_bit(vid, adapter->active_vlans);
4990
4991 if (!e1000_vlan_used(adapter))
4992 e1000_vlan_filter_on_off(adapter, false);
8e586137
JP		 4993
4994 return 0;
1da177e4
LT		 4995}
4996
64798845 4997static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4 4998{
5622e404 4999 u16 vid;
1da177e4 5000
5622e404
JP		 5001 if (!e1000_vlan_used(adapter))
5002 return;
5003
5004 e1000_vlan_filter_on_off(adapter, true);
5005 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
80d5c368 5006 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
1da177e4
LT		 5007}
5008
14ad2513 5009int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
1da177e4 5010{
1dc32918
JP		 5011 struct e1000_hw *hw = &adapter->hw;
5012
5013 hw->autoneg = 0;
1da177e4 5014
14ad2513 5015 /* Make sure dplx is at most 1 bit and lsb of speed is not set
6cfbd97b
JK		 5016 * for the switch() below to work
5017 */
14ad2513
DD		 5018 if ((spd & 1) || (dplx & ~1))
5019 goto err_inval;
5020
6921368f 5021 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 5022 if ((hw->media_type == e1000_media_type_fiber) &&
14ad2513
DD		 5023 spd != SPEED_1000 &&
5024 dplx != DUPLEX_FULL)
5025 goto err_inval;
6921368f 5026
14ad2513 5027 switch (spd + dplx) {
1da177e4 5028 case SPEED_10 + DUPLEX_HALF:
1dc32918 5029 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 5030 break;
5031 case SPEED_10 + DUPLEX_FULL:
1dc32918 5032 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 5033 break;
5034 case SPEED_100 + DUPLEX_HALF:
1dc32918 5035 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 5036 break;
5037 case SPEED_100 + DUPLEX_FULL:
1dc32918 5038 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 5039 break;
5040 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 5041 hw->autoneg = 1;
5042 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 5043 break;
5044 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5045 default:
14ad2513 5046 goto err_inval;
1da177e4 5047 }
c819bbd5
JB		 5048
5049 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
5050 hw->mdix = AUTO_ALL_MODES;
5051
1da177e4 5052 return 0;
14ad2513
DD		 5053
5054err_inval:
5055 e_err(probe, "Unsupported Speed/Duplex configuration\n");
5056 return -EINVAL;
1da177e4
LT		 5057}
5058
b43fcd7d 5059static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 5060{
5061 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5062 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5063 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 5064 u32 ctrl, ctrl_ext, rctl, status;
5065 u32 wufc = adapter->wol;
1da177e4
LT		 5066
5067 netif_device_detach(netdev);
5068
2db10a08 5069 if (netif_running(netdev)) {
6a7d64e3 5070 int count = E1000_CHECK_RESET_COUNT;
5071
5072 while (test_bit(__E1000_RESETTING, &adapter->flags) && count--)
5073 usleep_range(10000, 20000);
5074
2db10a08 5075 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 5076 e1000_down(adapter);
2db10a08 5077 }
1da177e4 5078
1dc32918 5079 status = er32(STATUS);
96838a40 5080 if (status & E1000_STATUS_LU)
1da177e4
LT		 5081 wufc &= ~E1000_WUFC_LNKC;
5082
96838a40 5083 if (wufc) {
1da177e4 5084 e1000_setup_rctl(adapter);
db0ce50d 5085 e1000_set_rx_mode(netdev);
1da177e4 5086
b868179c
DN		 5087 rctl = er32(RCTL);
5088
1da177e4 5089 /* turn on all-multi mode if wake on multicast is enabled */
b868179c 5090 if (wufc & E1000_WUFC_MC)
1da177e4 5091 rctl |= E1000_RCTL_MPE;
b868179c
DN		 5092
5093 /* enable receives in the hardware */
5094 ew32(RCTL, rctl | E1000_RCTL_EN);
1da177e4 5095
1dc32918
JP		 5096 if (hw->mac_type >= e1000_82540) {
5097 ctrl = er32(CTRL);
1da177e4
LT		 5098 /* advertise wake from D3Cold */
5099 #define E1000_CTRL_ADVD3WUC 0x00100000
5100 /* phy power management enable */
5101 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5102 ctrl |= E1000_CTRL_ADVD3WUC |
5103 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 5104 ew32(CTRL, ctrl);
1da177e4
LT		 5105 }
5106
1dc32918 5107 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 5108 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 5109 /* keep the laser running in D3 */
1dc32918 5110 ctrl_ext = er32(CTRL_EXT);
1da177e4 5111 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 5112 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 5113 }
5114
1dc32918
JP		 5115 ew32(WUC, E1000_WUC_PME_EN);
5116 ew32(WUFC, wufc);
1da177e4 5117 } else {
1dc32918
JP		 5118 ew32(WUC, 0);
5119 ew32(WUFC, 0);
1da177e4
LT		 5120 }
5121
0fccd0e9
JG		 5122 e1000_release_manageability(adapter);
5123
b43fcd7d
RW		 5124 *enable_wake = !!wufc;
5125
0fccd0e9 5126 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 5127 if (adapter->en_mng_pt)
5128 *enable_wake = true;
1da177e4 5129
edd106fc
AK		 5130 if (netif_running(netdev))
5131 e1000_free_irq(adapter);
5132
0b76aae7
TD		 5133 if (!test_and_set_bit(__E1000_DISABLED, &adapter->flags))
5134 pci_disable_device(pdev);
240b1710 5135
1da177e4
LT		 5136 return 0;
5137}
5138
eb6779d4 5139static int __maybe_unused e1000_suspend(struct device *dev)
b43fcd7d
RW		 5140{
5141 int retval;
eb6779d4 5142 struct pci_dev *pdev = to_pci_dev(dev);
b43fcd7d
RW		 5143 bool wake;
5144
5145 retval = __e1000_shutdown(pdev, &wake);
eb6779d4 5146 device_set_wakeup_enable(dev, wake);
b43fcd7d 5147
eb6779d4 5148 return retval;
b43fcd7d
RW		 5149}
5150
eb6779d4 5151static int __maybe_unused e1000_resume(struct device *dev)
1da177e4 5152{
eb6779d4 5153 struct pci_dev *pdev = to_pci_dev(dev);
1da177e4 5154 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5155 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5156 struct e1000_hw *hw = &adapter->hw;
406874a7 5157 u32 err;
1da177e4 5158
81250297
TI		 5159 if (adapter->need_ioport)
5160 err = pci_enable_device(pdev);
5161 else
5162 err = pci_enable_device_mem(pdev);
c7be73bc 5163 if (err) {
675ad473 5164 pr_err("Cannot enable PCI device from suspend\n");
3d1dd8cb
AK		 5165 return err;
5166 }
0b76aae7
TD		 5167
5168 /* flush memory to make sure state is correct */
5169 smp_mb__before_atomic();
5170 clear_bit(__E1000_DISABLED, &adapter->flags);
a4cb847d 5171 pci_set_master(pdev);
1da177e4 5172
d0e027db
AK		 5173 pci_enable_wake(pdev, PCI_D3hot, 0);
5174 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 5175
c7be73bc
JP		 5176 if (netif_running(netdev)) {
5177 err = e1000_request_irq(adapter);
5178 if (err)
5179 return err;
5180 }
edd106fc
AK		 5181
5182 e1000_power_up_phy(adapter);
1da177e4 5183 e1000_reset(adapter);
1dc32918 5184 ew32(WUS, ~0);
1da177e4 5185
0fccd0e9
JG		 5186 e1000_init_manageability(adapter);
5187
96838a40 5188 if (netif_running(netdev))
1da177e4
LT		 5189 e1000_up(adapter);
5190
5191 netif_device_attach(netdev);
5192
1da177e4
LT		 5193 return 0;
5194}
c653e635
AK		 5195
5196static void e1000_shutdown(struct pci_dev *pdev)
5197{
b43fcd7d
RW		 5198 bool wake;
5199
5200 __e1000_shutdown(pdev, &wake);
5201
5202 if (system_state == SYSTEM_POWER_OFF) {
5203 pci_wake_from_d3(pdev, wake);
5204 pci_set_power_state(pdev, PCI_D3hot);
5205 }
c653e635
AK		 5206}
5207
1da177e4 5208#ifdef CONFIG_NET_POLL_CONTROLLER
6cfbd97b 5209/* Polling 'interrupt' - used by things like netconsole to send skbs
1da177e4
LT		 5210 * without having to re-enable interrupts. It's not called while
5211 * the interrupt routine is executing.
5212 */
64798845 5213static void e1000_netpoll(struct net_device *netdev)
1da177e4 5214{
60490fe0 5215 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 5216
31119129
WC		 5217 if (disable_hardirq(adapter->pdev->irq))
5218 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 5219 enable_irq(adapter->pdev->irq);
5220}
5221#endif
5222
9026729b
AK		 5223/**
5224 * e1000_io_error_detected - called when PCI error is detected
5225 * @pdev: Pointer to PCI device
120a5d0d 5226 * @state: The current pci connection state
9026729b
AK		 5227 *
5228 * This function is called after a PCI bus error affecting
5229 * this device has been detected.
5230 */
64798845
JP		 5231static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5232 pci_channel_state_t state)
9026729b
AK		 5233{
5234 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5235 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 5236
5237 netif_device_detach(netdev);
5238
eab63302
AD		 5239 if (state == pci_channel_io_perm_failure)
5240 return PCI_ERS_RESULT_DISCONNECT;
5241
9026729b
AK		 5242 if (netif_running(netdev))
5243 e1000_down(adapter);
0b76aae7
TD		 5244
5245 if (!test_and_set_bit(__E1000_DISABLED, &adapter->flags))
5246 pci_disable_device(pdev);
9026729b 5247
4b63b27f 5248 /* Request a slot reset. */
9026729b
AK		 5249 return PCI_ERS_RESULT_NEED_RESET;
5250}
5251
5252/**
5253 * e1000_io_slot_reset - called after the pci bus has been reset.
5254 * @pdev: Pointer to PCI device
5255 *
5256 * Restart the card from scratch, as if from a cold-boot. Implementation
5257 * resembles the first-half of the e1000_resume routine.
5258 */
5259static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5260{
5261 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5262 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5263 struct e1000_hw *hw = &adapter->hw;
81250297 5264 int err;
9026729b 5265
81250297
TI		 5266 if (adapter->need_ioport)
5267 err = pci_enable_device(pdev);
5268 else
5269 err = pci_enable_device_mem(pdev);
5270 if (err) {
675ad473 5271 pr_err("Cannot re-enable PCI device after reset.\n");
9026729b
AK		 5272 return PCI_ERS_RESULT_DISCONNECT;
5273 }
0b76aae7
TD		 5274
5275 /* flush memory to make sure state is correct */
5276 smp_mb__before_atomic();
5277 clear_bit(__E1000_DISABLED, &adapter->flags);
9026729b
AK		 5278 pci_set_master(pdev);
5279
dbf38c94
LV		 5280 pci_enable_wake(pdev, PCI_D3hot, 0);
5281 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 5282
9026729b 5283 e1000_reset(adapter);
1dc32918 5284 ew32(WUS, ~0);
9026729b
AK		 5285
5286 return PCI_ERS_RESULT_RECOVERED;
5287}
5288
5289/**
5290 * e1000_io_resume - called when traffic can start flowing again.
5291 * @pdev: Pointer to PCI device
5292 *
5293 * This callback is called when the error recovery driver tells us that
5294 * its OK to resume normal operation. Implementation resembles the
5295 * second-half of the e1000_resume routine.
5296 */
5297static void e1000_io_resume(struct pci_dev *pdev)
5298{
5299 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5300 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG		 5301
5302 e1000_init_manageability(adapter);
9026729b
AK		 5303
5304 if (netif_running(netdev)) {
5305 if (e1000_up(adapter)) {
675ad473 5306 pr_info("can't bring device back up after reset\n");
9026729b
AK		 5307 return;
5308 }
5309 }
5310
5311 netif_device_attach(netdev);
9026729b
AK		 5312}
5313
1da177e4 5314/* e1000_main.c */
Linux 6.x block layer and io_uring tree(s)