candev: allow SJW user setting for bittiming calculation
[linux-2.6-block.git] / drivers / net / ethernet / intel / e1000 / e1000_main.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2
0abb6eb1
AK
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
5377a416 31#include <linux/io.h>
70c71606 32#include <linux/prefetch.h>
5622e404
JP
33#include <linux/bitops.h>
34#include <linux/if_vlan.h>
5377a416
DB
35
36/* Intel Media SOC GbE MDIO physical base address */
37static unsigned long ce4100_gbe_mdio_base_phy;
38/* Intel Media SOC GbE MDIO virtual base address */
39void __iomem *ce4100_gbe_mdio_base_virt;
1da177e4 40
1da177e4 41char e1000_driver_name[] = "e1000";
3ad2cc67 42static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
ab08853f 43#define DRV_VERSION "7.3.21-k8-NAPI"
abec42a4
SH
44const char e1000_driver_version[] = DRV_VERSION;
45static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT
46
47/* e1000_pci_tbl - PCI Device ID Table
48 *
49 * Last entry must be all 0s
50 *
51 * Macro expands to...
52 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
53 */
a3aa1884 54static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
1da177e4
LT
55 INTEL_E1000_ETHERNET_DEVICE(0x1000),
56 INTEL_E1000_ETHERNET_DEVICE(0x1001),
57 INTEL_E1000_ETHERNET_DEVICE(0x1004),
58 INTEL_E1000_ETHERNET_DEVICE(0x1008),
59 INTEL_E1000_ETHERNET_DEVICE(0x1009),
60 INTEL_E1000_ETHERNET_DEVICE(0x100C),
61 INTEL_E1000_ETHERNET_DEVICE(0x100D),
62 INTEL_E1000_ETHERNET_DEVICE(0x100E),
63 INTEL_E1000_ETHERNET_DEVICE(0x100F),
64 INTEL_E1000_ETHERNET_DEVICE(0x1010),
65 INTEL_E1000_ETHERNET_DEVICE(0x1011),
66 INTEL_E1000_ETHERNET_DEVICE(0x1012),
67 INTEL_E1000_ETHERNET_DEVICE(0x1013),
68 INTEL_E1000_ETHERNET_DEVICE(0x1014),
69 INTEL_E1000_ETHERNET_DEVICE(0x1015),
70 INTEL_E1000_ETHERNET_DEVICE(0x1016),
71 INTEL_E1000_ETHERNET_DEVICE(0x1017),
72 INTEL_E1000_ETHERNET_DEVICE(0x1018),
73 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 74 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT
75 INTEL_E1000_ETHERNET_DEVICE(0x101D),
76 INTEL_E1000_ETHERNET_DEVICE(0x101E),
77 INTEL_E1000_ETHERNET_DEVICE(0x1026),
78 INTEL_E1000_ETHERNET_DEVICE(0x1027),
79 INTEL_E1000_ETHERNET_DEVICE(0x1028),
80 INTEL_E1000_ETHERNET_DEVICE(0x1075),
81 INTEL_E1000_ETHERNET_DEVICE(0x1076),
82 INTEL_E1000_ETHERNET_DEVICE(0x1077),
83 INTEL_E1000_ETHERNET_DEVICE(0x1078),
84 INTEL_E1000_ETHERNET_DEVICE(0x1079),
85 INTEL_E1000_ETHERNET_DEVICE(0x107A),
86 INTEL_E1000_ETHERNET_DEVICE(0x107B),
87 INTEL_E1000_ETHERNET_DEVICE(0x107C),
88 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 89 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 90 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
5377a416 91 INTEL_E1000_ETHERNET_DEVICE(0x2E6E),
1da177e4
LT
92 /* required last entry */
93 {0,}
94};
95
96MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
97
35574764
NN
98int e1000_up(struct e1000_adapter *adapter);
99void e1000_down(struct e1000_adapter *adapter);
100void e1000_reinit_locked(struct e1000_adapter *adapter);
101void e1000_reset(struct e1000_adapter *adapter);
35574764
NN
102int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
103int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
104void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
105void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 106static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 107 struct e1000_tx_ring *txdr);
3ad2cc67 108static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 109 struct e1000_rx_ring *rxdr);
3ad2cc67 110static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 111 struct e1000_tx_ring *tx_ring);
3ad2cc67 112static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN
113 struct e1000_rx_ring *rx_ring);
114void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT
115
116static int e1000_init_module(void);
117static void e1000_exit_module(void);
118static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
119static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 120static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT
121static int e1000_sw_init(struct e1000_adapter *adapter);
122static int e1000_open(struct net_device *netdev);
123static int e1000_close(struct net_device *netdev);
124static void e1000_configure_tx(struct e1000_adapter *adapter);
125static void e1000_configure_rx(struct e1000_adapter *adapter);
126static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC
127static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
128static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
129static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
db0ce50d 133static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4 134static void e1000_update_phy_info(unsigned long data);
5cf42fcd 135static void e1000_update_phy_info_task(struct work_struct *work);
1da177e4 136static void e1000_watchdog(unsigned long data);
1da177e4 137static void e1000_82547_tx_fifo_stall(unsigned long data);
5cf42fcd 138static void e1000_82547_tx_fifo_stall_task(struct work_struct *work);
3b29a56d
SH
139static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
140 struct net_device *netdev);
1da177e4
LT
141static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
142static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
143static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 144static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP
145static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
146 struct e1000_tx_ring *tx_ring);
bea3348e 147static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP
148static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
149 struct e1000_rx_ring *rx_ring,
150 int *work_done, int work_to_do);
edbbb3ca
JB
151static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
152 struct e1000_rx_ring *rx_ring,
153 int *work_done, int work_to_do);
581d708e 154static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 155 struct e1000_rx_ring *rx_ring,
72d64a43 156 int cleaned_count);
edbbb3ca
JB
157static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
158 struct e1000_rx_ring *rx_ring,
159 int cleaned_count);
1da177e4
LT
160static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
161static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
162 int cmd);
1da177e4
LT
163static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
164static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
165static void e1000_tx_timeout(struct net_device *dev);
65f27f38 166static void e1000_reset_task(struct work_struct *work);
1da177e4 167static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK
168static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
169 struct sk_buff *skb);
1da177e4 170
5622e404
JP
171static bool e1000_vlan_used(struct e1000_adapter *adapter);
172static void e1000_vlan_mode(struct net_device *netdev, u32 features);
406874a7
JP
173static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
174static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT
175static void e1000_restore_vlan(struct e1000_adapter *adapter);
176
6fdfef16 177#ifdef CONFIG_PM
b43fcd7d 178static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT
179static int e1000_resume(struct pci_dev *pdev);
180#endif
c653e635 181static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT
182
183#ifdef CONFIG_NET_POLL_CONTROLLER
184/* for netdump / net console */
185static void e1000_netpoll (struct net_device *netdev);
186#endif
187
1f753861
JB
188#define COPYBREAK_DEFAULT 256
189static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
190module_param(copybreak, uint, 0644);
191MODULE_PARM_DESC(copybreak,
192 "Maximum size of packet that is copied to a new buffer on receive");
193
9026729b
AK
194static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
195 pci_channel_state_t state);
196static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
197static void e1000_io_resume(struct pci_dev *pdev);
198
199static struct pci_error_handlers e1000_err_handler = {
200 .error_detected = e1000_io_error_detected,
201 .slot_reset = e1000_io_slot_reset,
202 .resume = e1000_io_resume,
203};
24025e4e 204
1da177e4
LT
205static struct pci_driver e1000_driver = {
206 .name = e1000_driver_name,
207 .id_table = e1000_pci_tbl,
208 .probe = e1000_probe,
209 .remove = __devexit_p(e1000_remove),
c4e24f01 210#ifdef CONFIG_PM
25985edc 211 /* Power Management Hooks */
1da177e4 212 .suspend = e1000_suspend,
c653e635 213 .resume = e1000_resume,
1da177e4 214#endif
9026729b
AK
215 .shutdown = e1000_shutdown,
216 .err_handler = &e1000_err_handler
1da177e4
LT
217};
218
219MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
220MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
221MODULE_LICENSE("GPL");
222MODULE_VERSION(DRV_VERSION);
223
224static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
225module_param(debug, int, 0);
226MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
227
675ad473
ET
228/**
229 * e1000_get_hw_dev - return device
230 * used by hardware layer to print debugging information
231 *
232 **/
233struct net_device *e1000_get_hw_dev(struct e1000_hw *hw)
234{
235 struct e1000_adapter *adapter = hw->back;
236 return adapter->netdev;
237}
238
1da177e4
LT
239/**
240 * e1000_init_module - Driver Registration Routine
241 *
242 * e1000_init_module is the first routine called when the driver is
243 * loaded. All it does is register with the PCI subsystem.
244 **/
245
64798845 246static int __init e1000_init_module(void)
1da177e4
LT
247{
248 int ret;
675ad473 249 pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version);
1da177e4 250
675ad473 251 pr_info("%s\n", e1000_copyright);
1da177e4 252
29917620 253 ret = pci_register_driver(&e1000_driver);
1f753861
JB
254 if (copybreak != COPYBREAK_DEFAULT) {
255 if (copybreak == 0)
675ad473 256 pr_info("copybreak disabled\n");
1f753861 257 else
675ad473
ET
258 pr_info("copybreak enabled for "
259 "packets <= %u bytes\n", copybreak);
1f753861 260 }
1da177e4
LT
261 return ret;
262}
263
264module_init(e1000_init_module);
265
266/**
267 * e1000_exit_module - Driver Exit Cleanup Routine
268 *
269 * e1000_exit_module is called just before the driver is removed
270 * from memory.
271 **/
272
64798845 273static void __exit e1000_exit_module(void)
1da177e4 274{
1da177e4
LT
275 pci_unregister_driver(&e1000_driver);
276}
277
278module_exit(e1000_exit_module);
279
2db10a08
AK
280static int e1000_request_irq(struct e1000_adapter *adapter)
281{
282 struct net_device *netdev = adapter->netdev;
3e18826c 283 irq_handler_t handler = e1000_intr;
e94bd23f
AK
284 int irq_flags = IRQF_SHARED;
285 int err;
2db10a08 286
e94bd23f
AK
287 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
288 netdev);
289 if (err) {
feb8f478 290 e_err(probe, "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 291 }
2db10a08
AK
292
293 return err;
294}
295
296static void e1000_free_irq(struct e1000_adapter *adapter)
297{
298 struct net_device *netdev = adapter->netdev;
299
300 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK
301}
302
1da177e4
LT
303/**
304 * e1000_irq_disable - Mask off interrupt generation on the NIC
305 * @adapter: board private structure
306 **/
307
64798845 308static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 309{
1dc32918
JP
310 struct e1000_hw *hw = &adapter->hw;
311
312 ew32(IMC, ~0);
313 E1000_WRITE_FLUSH();
1da177e4
LT
314 synchronize_irq(adapter->pdev->irq);
315}
316
317/**
318 * e1000_irq_enable - Enable default interrupt generation settings
319 * @adapter: board private structure
320 **/
321
64798845 322static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 323{
1dc32918
JP
324 struct e1000_hw *hw = &adapter->hw;
325
326 ew32(IMS, IMS_ENABLE_MASK);
327 E1000_WRITE_FLUSH();
1da177e4 328}
3ad2cc67 329
64798845 330static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 331{
1dc32918 332 struct e1000_hw *hw = &adapter->hw;
2d7edb92 333 struct net_device *netdev = adapter->netdev;
1dc32918 334 u16 vid = hw->mng_cookie.vlan_id;
406874a7 335 u16 old_vid = adapter->mng_vlan_id;
96838a40 336
5622e404
JP
337 if (!e1000_vlan_used(adapter))
338 return;
339
340 if (!test_bit(vid, adapter->active_vlans)) {
341 if (hw->mng_cookie.status &
342 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
343 e1000_vlan_rx_add_vid(netdev, vid);
c5f226fe 344 adapter->mng_vlan_id = vid;
5622e404
JP
345 } else {
346 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
347 }
348 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
349 (vid != old_vid) &&
350 !test_bit(old_vid, adapter->active_vlans))
351 e1000_vlan_rx_kill_vid(netdev, old_vid);
352 } else {
353 adapter->mng_vlan_id = vid;
2d7edb92
MC
354 }
355}
b55ccb35 356
64798845 357static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 358{
1dc32918
JP
359 struct e1000_hw *hw = &adapter->hw;
360
0fccd0e9 361 if (adapter->en_mng_pt) {
1dc32918 362 u32 manc = er32(MANC);
0fccd0e9
JG
363
364 /* disable hardware interception of ARP */
365 manc &= ~(E1000_MANC_ARP_EN);
366
1dc32918 367 ew32(MANC, manc);
0fccd0e9
JG
368 }
369}
370
64798845 371static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 372{
1dc32918
JP
373 struct e1000_hw *hw = &adapter->hw;
374
0fccd0e9 375 if (adapter->en_mng_pt) {
1dc32918 376 u32 manc = er32(MANC);
0fccd0e9
JG
377
378 /* re-enable hardware interception of ARP */
379 manc |= E1000_MANC_ARP_EN;
380
1dc32918 381 ew32(MANC, manc);
0fccd0e9
JG
382 }
383}
384
e0aac5a2
AK
385/**
386 * e1000_configure - configure the hardware for RX and TX
387 * @adapter = private board structure
388 **/
389static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT
390{
391 struct net_device *netdev = adapter->netdev;
2db10a08 392 int i;
1da177e4 393
db0ce50d 394 e1000_set_rx_mode(netdev);
1da177e4
LT
395
396 e1000_restore_vlan(adapter);
0fccd0e9 397 e1000_init_manageability(adapter);
1da177e4
LT
398
399 e1000_configure_tx(adapter);
400 e1000_setup_rctl(adapter);
401 e1000_configure_rx(adapter);
72d64a43
JK
402 /* call E1000_DESC_UNUSED which always leaves
403 * at least 1 descriptor unused to make sure
404 * next_to_use != next_to_clean */
f56799ea 405 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 406 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK
407 adapter->alloc_rx_buf(adapter, ring,
408 E1000_DESC_UNUSED(ring));
f56799ea 409 }
e0aac5a2
AK
410}
411
412int e1000_up(struct e1000_adapter *adapter)
413{
1dc32918
JP
414 struct e1000_hw *hw = &adapter->hw;
415
e0aac5a2
AK
416 /* hardware has been reset, we need to reload some things */
417 e1000_configure(adapter);
418
419 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 420
bea3348e 421 napi_enable(&adapter->napi);
c3570acb 422
5de55624
MC
423 e1000_irq_enable(adapter);
424
4cb9be7a
JB
425 netif_wake_queue(adapter->netdev);
426
79f3d399 427 /* fire a link change interrupt to start the watchdog */
1dc32918 428 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT
429 return 0;
430}
431
79f05bf0
AK
432/**
433 * e1000_power_up_phy - restore link in case the phy was powered down
434 * @adapter: address of board private structure
435 *
436 * The phy may be powered down to save power and turn off link when the
437 * driver is unloaded and wake on lan is not enabled (among others)
438 * *** this routine MUST be followed by a call to e1000_reset ***
439 *
440 **/
441
d658266e 442void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 443{
1dc32918 444 struct e1000_hw *hw = &adapter->hw;
406874a7 445 u16 mii_reg = 0;
79f05bf0
AK
446
447 /* Just clear the power down bit to wake the phy back up */
1dc32918 448 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK
449 /* according to the manual, the phy will retain its
450 * settings across a power-down/up cycle */
1dc32918 451 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 452 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 453 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK
454 }
455}
456
457static void e1000_power_down_phy(struct e1000_adapter *adapter)
458{
1dc32918
JP
459 struct e1000_hw *hw = &adapter->hw;
460
61c2505f 461 /* Power down the PHY so no link is implied when interface is down *
c3033b01 462 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK
463 * (a) WoL is enabled
464 * (b) AMT is active
465 * (c) SoL/IDER session is active */
1dc32918
JP
466 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
467 hw->media_type == e1000_media_type_copper) {
406874a7 468 u16 mii_reg = 0;
61c2505f 469
1dc32918 470 switch (hw->mac_type) {
61c2505f
BA
471 case e1000_82540:
472 case e1000_82545:
473 case e1000_82545_rev_3:
474 case e1000_82546:
5377a416 475 case e1000_ce4100:
61c2505f
BA
476 case e1000_82546_rev_3:
477 case e1000_82541:
478 case e1000_82541_rev_2:
479 case e1000_82547:
480 case e1000_82547_rev_2:
1dc32918 481 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA
482 goto out;
483 break;
61c2505f
BA
484 default:
485 goto out;
486 }
1dc32918 487 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 488 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 489 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK
490 mdelay(1);
491 }
61c2505f
BA
492out:
493 return;
79f05bf0
AK
494}
495
64798845 496void e1000_down(struct e1000_adapter *adapter)
1da177e4 497{
a6c42322 498 struct e1000_hw *hw = &adapter->hw;
1da177e4 499 struct net_device *netdev = adapter->netdev;
a6c42322 500 u32 rctl, tctl;
1da177e4 501
1314bbf3 502
a6c42322
JB
503 /* disable receives in the hardware */
504 rctl = er32(RCTL);
505 ew32(RCTL, rctl & ~E1000_RCTL_EN);
506 /* flush and sleep below */
507
51851073 508 netif_tx_disable(netdev);
a6c42322
JB
509
510 /* disable transmits in the hardware */
511 tctl = er32(TCTL);
512 tctl &= ~E1000_TCTL_EN;
513 ew32(TCTL, tctl);
514 /* flush both disables and wait for them to finish */
515 E1000_WRITE_FLUSH();
516 msleep(10);
517
bea3348e 518 napi_disable(&adapter->napi);
c3570acb 519
1da177e4 520 e1000_irq_disable(adapter);
c1605eb3 521
ab08853f
AC
522 /*
523 * Setting DOWN must be after irq_disable to prevent
524 * a screaming interrupt. Setting DOWN also prevents
525 * timers and tasks from rescheduling.
526 */
527 set_bit(__E1000_DOWN, &adapter->flags);
528
1da177e4
LT
529 del_timer_sync(&adapter->tx_fifo_stall_timer);
530 del_timer_sync(&adapter->watchdog_timer);
531 del_timer_sync(&adapter->phy_info_timer);
532
1da177e4
LT
533 adapter->link_speed = 0;
534 adapter->link_duplex = 0;
535 netif_carrier_off(netdev);
1da177e4
LT
536
537 e1000_reset(adapter);
581d708e
MC
538 e1000_clean_all_tx_rings(adapter);
539 e1000_clean_all_rx_rings(adapter);
1da177e4 540}
1da177e4 541
38df7a39 542static void e1000_reinit_safe(struct e1000_adapter *adapter)
338c15e4
JB
543{
544 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
545 msleep(1);
546 rtnl_lock();
547 e1000_down(adapter);
548 e1000_up(adapter);
549 rtnl_unlock();
550 clear_bit(__E1000_RESETTING, &adapter->flags);
551}
552
64798845 553void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08 554{
338c15e4
JB
555 /* if rtnl_lock is not held the call path is bogus */
556 ASSERT_RTNL();
2db10a08
AK
557 WARN_ON(in_interrupt());
558 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
559 msleep(1);
560 e1000_down(adapter);
561 e1000_up(adapter);
562 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
563}
564
64798845 565void e1000_reset(struct e1000_adapter *adapter)
1da177e4 566{
1dc32918 567 struct e1000_hw *hw = &adapter->hw;
406874a7 568 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 569 bool legacy_pba_adjust = false;
b7cb8c2c 570 u16 hwm;
1da177e4
LT
571
572 /* Repartition Pba for greater than 9k mtu
573 * To take effect CTRL.RST is required.
574 */
575
1dc32918 576 switch (hw->mac_type) {
018ea44e
BA
577 case e1000_82542_rev2_0:
578 case e1000_82542_rev2_1:
579 case e1000_82543:
580 case e1000_82544:
581 case e1000_82540:
582 case e1000_82541:
583 case e1000_82541_rev_2:
c3033b01 584 legacy_pba_adjust = true;
018ea44e
BA
585 pba = E1000_PBA_48K;
586 break;
587 case e1000_82545:
588 case e1000_82545_rev_3:
589 case e1000_82546:
5377a416 590 case e1000_ce4100:
018ea44e
BA
591 case e1000_82546_rev_3:
592 pba = E1000_PBA_48K;
593 break;
2d7edb92 594 case e1000_82547:
0e6ef3e0 595 case e1000_82547_rev_2:
c3033b01 596 legacy_pba_adjust = true;
2d7edb92
MC
597 pba = E1000_PBA_30K;
598 break;
018ea44e
BA
599 case e1000_undefined:
600 case e1000_num_macs:
2d7edb92
MC
601 break;
602 }
603
c3033b01 604 if (legacy_pba_adjust) {
b7cb8c2c 605 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 606 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 607
1dc32918 608 if (hw->mac_type == e1000_82547) {
018ea44e
BA
609 adapter->tx_fifo_head = 0;
610 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
611 adapter->tx_fifo_size =
612 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
613 atomic_set(&adapter->tx_fifo_stall, 0);
614 }
b7cb8c2c 615 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 616 /* adjust PBA for jumbo frames */
1dc32918 617 ew32(PBA, pba);
018ea44e
BA
618
619 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 620 * large enough to accommodate two full transmit packets,
018ea44e 621 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 622 * the Rx FIFO should be large enough to accommodate at least
018ea44e
BA
623 * one full receive packet and is similarly rounded up and
624 * expressed in KB. */
1dc32918 625 pba = er32(PBA);
018ea44e
BA
626 /* upper 16 bits has Tx packet buffer allocation size in KB */
627 tx_space = pba >> 16;
628 /* lower 16 bits has Rx packet buffer allocation size in KB */
629 pba &= 0xffff;
b7cb8c2c
JB
630 /*
631 * the tx fifo also stores 16 bytes of information about the tx
632 * but don't include ethernet FCS because hardware appends it
633 */
634 min_tx_space = (hw->max_frame_size +
635 sizeof(struct e1000_tx_desc) -
636 ETH_FCS_LEN) * 2;
9099cfb9 637 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 638 min_tx_space >>= 10;
b7cb8c2c
JB
639 /* software strips receive CRC, so leave room for it */
640 min_rx_space = hw->max_frame_size;
9099cfb9 641 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA
642 min_rx_space >>= 10;
643
644 /* If current Tx allocation is less than the min Tx FIFO size,
645 * and the min Tx FIFO size is less than the current Rx FIFO
646 * allocation, take space away from current Rx allocation */
647 if (tx_space < min_tx_space &&
648 ((min_tx_space - tx_space) < pba)) {
649 pba = pba - (min_tx_space - tx_space);
650
651 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 652 switch (hw->mac_type) {
018ea44e
BA
653 case e1000_82545 ... e1000_82546_rev_3:
654 pba &= ~(E1000_PBA_8K - 1);
655 break;
656 default:
657 break;
658 }
659
660 /* if short on rx space, rx wins and must trump tx
661 * adjustment or use Early Receive if available */
1532ecea
JB
662 if (pba < min_rx_space)
663 pba = min_rx_space;
018ea44e 664 }
1da177e4 665 }
2d7edb92 666
1dc32918 667 ew32(PBA, pba);
1da177e4 668
b7cb8c2c
JB
669 /*
670 * flow control settings:
671 * The high water mark must be low enough to fit one full frame
672 * (or the size used for early receive) above it in the Rx FIFO.
673 * Set it to the lower of:
674 * - 90% of the Rx FIFO size, and
675 * - the full Rx FIFO size minus the early receive size (for parts
676 * with ERT support assuming ERT set to E1000_ERT_2048), or
677 * - the full Rx FIFO size minus one full frame
678 */
679 hwm = min(((pba << 10) * 9 / 10),
680 ((pba << 10) - hw->max_frame_size));
681
682 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
683 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 684 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP
685 hw->fc_send_xon = 1;
686 hw->fc = hw->original_fc;
1da177e4 687
2d7edb92 688 /* Allow time for pending master requests to run */
1dc32918
JP
689 e1000_reset_hw(hw);
690 if (hw->mac_type >= e1000_82544)
691 ew32(WUC, 0);
09ae3e88 692
1dc32918 693 if (e1000_init_hw(hw))
feb8f478 694 e_dev_err("Hardware Error\n");
2d7edb92 695 e1000_update_mng_vlan(adapter);
3d5460a0
JB
696
697 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 698 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP
699 hw->autoneg == 1 &&
700 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
701 u32 ctrl = er32(CTRL);
3d5460a0
JB
702 /* clear phy power management bit if we are in gig only mode,
703 * which if enabled will attempt negotiation to 100Mb, which
704 * can cause a loss of link at power off or driver unload */
705 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 706 ew32(CTRL, ctrl);
3d5460a0
JB
707 }
708
1da177e4 709 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 710 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 711
1dc32918
JP
712 e1000_reset_adaptive(hw);
713 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 714
0fccd0e9 715 e1000_release_manageability(adapter);
1da177e4
LT
716}
717
67b3c27c
AK
718/**
719 * Dump the eeprom for users having checksum issues
720 **/
b4ea895d 721static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK
722{
723 struct net_device *netdev = adapter->netdev;
724 struct ethtool_eeprom eeprom;
725 const struct ethtool_ops *ops = netdev->ethtool_ops;
726 u8 *data;
727 int i;
728 u16 csum_old, csum_new = 0;
729
730 eeprom.len = ops->get_eeprom_len(netdev);
731 eeprom.offset = 0;
732
733 data = kmalloc(eeprom.len, GFP_KERNEL);
734 if (!data) {
675ad473 735 pr_err("Unable to allocate memory to dump EEPROM data\n");
67b3c27c
AK
736 return;
737 }
738
739 ops->get_eeprom(netdev, &eeprom, data);
740
741 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
742 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
743 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
744 csum_new += data[i] + (data[i + 1] << 8);
745 csum_new = EEPROM_SUM - csum_new;
746
675ad473
ET
747 pr_err("/*********************/\n");
748 pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old);
749 pr_err("Calculated : 0x%04x\n", csum_new);
67b3c27c 750
675ad473
ET
751 pr_err("Offset Values\n");
752 pr_err("======== ======\n");
67b3c27c
AK
753 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
754
675ad473
ET
755 pr_err("Include this output when contacting your support provider.\n");
756 pr_err("This is not a software error! Something bad happened to\n");
757 pr_err("your hardware or EEPROM image. Ignoring this problem could\n");
758 pr_err("result in further problems, possibly loss of data,\n");
759 pr_err("corruption or system hangs!\n");
760 pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n");
761 pr_err("which is invalid and requires you to set the proper MAC\n");
762 pr_err("address manually before continuing to enable this network\n");
763 pr_err("device. Please inspect the EEPROM dump and report the\n");
764 pr_err("issue to your hardware vendor or Intel Customer Support.\n");
765 pr_err("/*********************/\n");
67b3c27c
AK
766
767 kfree(data);
768}
769
81250297
TI
770/**
771 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
772 * @pdev: PCI device information struct
773 *
774 * Return true if an adapter needs ioport resources
775 **/
776static int e1000_is_need_ioport(struct pci_dev *pdev)
777{
778 switch (pdev->device) {
779 case E1000_DEV_ID_82540EM:
780 case E1000_DEV_ID_82540EM_LOM:
781 case E1000_DEV_ID_82540EP:
782 case E1000_DEV_ID_82540EP_LOM:
783 case E1000_DEV_ID_82540EP_LP:
784 case E1000_DEV_ID_82541EI:
785 case E1000_DEV_ID_82541EI_MOBILE:
786 case E1000_DEV_ID_82541ER:
787 case E1000_DEV_ID_82541ER_LOM:
788 case E1000_DEV_ID_82541GI:
789 case E1000_DEV_ID_82541GI_LF:
790 case E1000_DEV_ID_82541GI_MOBILE:
791 case E1000_DEV_ID_82544EI_COPPER:
792 case E1000_DEV_ID_82544EI_FIBER:
793 case E1000_DEV_ID_82544GC_COPPER:
794 case E1000_DEV_ID_82544GC_LOM:
795 case E1000_DEV_ID_82545EM_COPPER:
796 case E1000_DEV_ID_82545EM_FIBER:
797 case E1000_DEV_ID_82546EB_COPPER:
798 case E1000_DEV_ID_82546EB_FIBER:
799 case E1000_DEV_ID_82546EB_QUAD_COPPER:
800 return true;
801 default:
802 return false;
803 }
804}
805
5622e404
JP
806static u32 e1000_fix_features(struct net_device *netdev, u32 features)
807{
808 /*
809 * Since there is no support for separate rx/tx vlan accel
810 * enable/disable make sure tx flag is always in same state as rx.
811 */
812 if (features & NETIF_F_HW_VLAN_RX)
813 features |= NETIF_F_HW_VLAN_TX;
814 else
815 features &= ~NETIF_F_HW_VLAN_TX;
816
817 return features;
818}
819
e97d3207
MM
820static int e1000_set_features(struct net_device *netdev, u32 features)
821{
822 struct e1000_adapter *adapter = netdev_priv(netdev);
823 u32 changed = features ^ netdev->features;
824
5622e404
JP
825 if (changed & NETIF_F_HW_VLAN_RX)
826 e1000_vlan_mode(netdev, features);
827
e97d3207
MM
828 if (!(changed & NETIF_F_RXCSUM))
829 return 0;
830
831 adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
832
833 if (netif_running(netdev))
834 e1000_reinit_locked(adapter);
835 else
836 e1000_reset(adapter);
837
838 return 0;
839}
840
0e7614bc
SH
841static const struct net_device_ops e1000_netdev_ops = {
842 .ndo_open = e1000_open,
843 .ndo_stop = e1000_close,
00829823 844 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH
845 .ndo_get_stats = e1000_get_stats,
846 .ndo_set_rx_mode = e1000_set_rx_mode,
847 .ndo_set_mac_address = e1000_set_mac,
5622e404 848 .ndo_tx_timeout = e1000_tx_timeout,
0e7614bc
SH
849 .ndo_change_mtu = e1000_change_mtu,
850 .ndo_do_ioctl = e1000_ioctl,
851 .ndo_validate_addr = eth_validate_addr,
0e7614bc
SH
852 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
853 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
854#ifdef CONFIG_NET_POLL_CONTROLLER
855 .ndo_poll_controller = e1000_netpoll,
856#endif
5622e404
JP
857 .ndo_fix_features = e1000_fix_features,
858 .ndo_set_features = e1000_set_features,
0e7614bc
SH
859};
860
e508be17
JB
861/**
862 * e1000_init_hw_struct - initialize members of hw struct
863 * @adapter: board private struct
864 * @hw: structure used by e1000_hw.c
865 *
866 * Factors out initialization of the e1000_hw struct to its own function
867 * that can be called very early at init (just after struct allocation).
868 * Fields are initialized based on PCI device information and
869 * OS network device settings (MTU size).
870 * Returns negative error codes if MAC type setup fails.
871 */
872static int e1000_init_hw_struct(struct e1000_adapter *adapter,
873 struct e1000_hw *hw)
874{
875 struct pci_dev *pdev = adapter->pdev;
876
877 /* PCI config space info */
878 hw->vendor_id = pdev->vendor;
879 hw->device_id = pdev->device;
880 hw->subsystem_vendor_id = pdev->subsystem_vendor;
881 hw->subsystem_id = pdev->subsystem_device;
882 hw->revision_id = pdev->revision;
883
884 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
885
886 hw->max_frame_size = adapter->netdev->mtu +
887 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
888 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
889
890 /* identify the MAC */
891 if (e1000_set_mac_type(hw)) {
892 e_err(probe, "Unknown MAC Type\n");
893 return -EIO;
894 }
895
896 switch (hw->mac_type) {
897 default:
898 break;
899 case e1000_82541:
900 case e1000_82547:
901 case e1000_82541_rev_2:
902 case e1000_82547_rev_2:
903 hw->phy_init_script = 1;
904 break;
905 }
906
907 e1000_set_media_type(hw);
908 e1000_get_bus_info(hw);
909
910 hw->wait_autoneg_complete = false;
911 hw->tbi_compatibility_en = true;
912 hw->adaptive_ifs = true;
913
914 /* Copper options */
915
916 if (hw->media_type == e1000_media_type_copper) {
917 hw->mdix = AUTO_ALL_MODES;
918 hw->disable_polarity_correction = false;
919 hw->master_slave = E1000_MASTER_SLAVE;
920 }
921
922 return 0;
923}
924
1da177e4
LT
925/**
926 * e1000_probe - Device Initialization Routine
927 * @pdev: PCI device information struct
928 * @ent: entry in e1000_pci_tbl
929 *
930 * Returns 0 on success, negative on failure
931 *
932 * e1000_probe initializes an adapter identified by a pci_dev structure.
933 * The OS initialization, configuring of the adapter private structure,
934 * and a hardware reset occur.
935 **/
1dc32918
JP
936static int __devinit e1000_probe(struct pci_dev *pdev,
937 const struct pci_device_id *ent)
1da177e4
LT
938{
939 struct net_device *netdev;
940 struct e1000_adapter *adapter;
1dc32918 941 struct e1000_hw *hw;
2d7edb92 942
1da177e4 943 static int cards_found = 0;
120cd576 944 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 945 int i, err, pci_using_dac;
406874a7 946 u16 eeprom_data = 0;
5377a416 947 u16 tmp = 0;
406874a7 948 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 949 int bars, need_ioport;
0795af57 950
81250297
TI
951 /* do not allocate ioport bars when not needed */
952 need_ioport = e1000_is_need_ioport(pdev);
953 if (need_ioport) {
954 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
955 err = pci_enable_device(pdev);
956 } else {
957 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 958 err = pci_enable_device_mem(pdev);
81250297 959 }
c7be73bc 960 if (err)
1da177e4
LT
961 return err;
962
81250297 963 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 964 if (err)
6dd62ab0 965 goto err_pci_reg;
1da177e4
LT
966
967 pci_set_master(pdev);
dbb5aaeb
NN
968 err = pci_save_state(pdev);
969 if (err)
970 goto err_alloc_etherdev;
1da177e4 971
6dd62ab0 972 err = -ENOMEM;
1da177e4 973 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 974 if (!netdev)
1da177e4 975 goto err_alloc_etherdev;
1da177e4 976
1da177e4
LT
977 SET_NETDEV_DEV(netdev, &pdev->dev);
978
979 pci_set_drvdata(pdev, netdev);
60490fe0 980 adapter = netdev_priv(netdev);
1da177e4
LT
981 adapter->netdev = netdev;
982 adapter->pdev = pdev;
1da177e4 983 adapter->msg_enable = (1 << debug) - 1;
81250297
TI
984 adapter->bars = bars;
985 adapter->need_ioport = need_ioport;
1da177e4 986
1dc32918
JP
987 hw = &adapter->hw;
988 hw->back = adapter;
989
6dd62ab0 990 err = -EIO;
275f165f 991 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 992 if (!hw->hw_addr)
1da177e4 993 goto err_ioremap;
1da177e4 994
81250297
TI
995 if (adapter->need_ioport) {
996 for (i = BAR_1; i <= BAR_5; i++) {
997 if (pci_resource_len(pdev, i) == 0)
998 continue;
999 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1000 hw->io_base = pci_resource_start(pdev, i);
1001 break;
1002 }
1da177e4
LT
1003 }
1004 }
1005
e508be17
JB
1006 /* make ready for any if (hw->...) below */
1007 err = e1000_init_hw_struct(adapter, hw);
1008 if (err)
1009 goto err_sw_init;
1010
1011 /*
1012 * there is a workaround being applied below that limits
1013 * 64-bit DMA addresses to 64-bit hardware. There are some
1014 * 32-bit adapters that Tx hang when given 64-bit DMA addresses
1015 */
1016 pci_using_dac = 0;
1017 if ((hw->bus_type == e1000_bus_type_pcix) &&
1018 !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
1019 /*
1020 * according to DMA-API-HOWTO, coherent calls will always
1021 * succeed if the set call did
1022 */
1023 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
1024 pci_using_dac = 1;
e508be17 1025 } else {
19a0b67a
DN
1026 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
1027 if (err) {
1028 pr_err("No usable DMA config, aborting\n");
1029 goto err_dma;
1030 }
1031 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
e508be17
JB
1032 }
1033
0e7614bc 1034 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 1035 e1000_set_ethtool_ops(netdev);
1da177e4 1036 netdev->watchdog_timeo = 5 * HZ;
bea3348e 1037 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 1038
0eb5a34c 1039 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1040
1da177e4
LT
1041 adapter->bd_number = cards_found;
1042
1043 /* setup the private structure */
1044
c7be73bc
JP
1045 err = e1000_sw_init(adapter);
1046 if (err)
1da177e4
LT
1047 goto err_sw_init;
1048
6dd62ab0 1049 err = -EIO;
5377a416
DB
1050 if (hw->mac_type == e1000_ce4100) {
1051 ce4100_gbe_mdio_base_phy = pci_resource_start(pdev, BAR_1);
1052 ce4100_gbe_mdio_base_virt = ioremap(ce4100_gbe_mdio_base_phy,
1053 pci_resource_len(pdev, BAR_1));
1054
1055 if (!ce4100_gbe_mdio_base_virt)
1056 goto err_mdio_ioremap;
1057 }
2d7edb92 1058
1dc32918 1059 if (hw->mac_type >= e1000_82543) {
e97d3207 1060 netdev->hw_features = NETIF_F_SG |
5622e404
JP
1061 NETIF_F_HW_CSUM |
1062 NETIF_F_HW_VLAN_RX;
e97d3207 1063 netdev->features = NETIF_F_HW_VLAN_TX |
1da177e4
LT
1064 NETIF_F_HW_VLAN_FILTER;
1065 }
1066
1dc32918
JP
1067 if ((hw->mac_type >= e1000_82544) &&
1068 (hw->mac_type != e1000_82547))
e97d3207
MM
1069 netdev->hw_features |= NETIF_F_TSO;
1070
1071 netdev->features |= netdev->hw_features;
1072 netdev->hw_features |= NETIF_F_RXCSUM;
2d7edb92 1073
7b872a55 1074 if (pci_using_dac) {
1da177e4 1075 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ
1076 netdev->vlan_features |= NETIF_F_HIGHDMA;
1077 }
1da177e4 1078
20501a69 1079 netdev->vlan_features |= NETIF_F_TSO;
20501a69
PM
1080 netdev->vlan_features |= NETIF_F_HW_CSUM;
1081 netdev->vlan_features |= NETIF_F_SG;
1082
01789349
JP
1083 netdev->priv_flags |= IFF_UNICAST_FLT;
1084
1dc32918 1085 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1086
cd94dd0b 1087 /* initialize eeprom parameters */
1dc32918 1088 if (e1000_init_eeprom_params(hw)) {
feb8f478 1089 e_err(probe, "EEPROM initialization failed\n");
6dd62ab0 1090 goto err_eeprom;
cd94dd0b
AK
1091 }
1092
96838a40 1093 /* before reading the EEPROM, reset the controller to
1da177e4 1094 * put the device in a known good starting state */
96838a40 1095
1dc32918 1096 e1000_reset_hw(hw);
1da177e4
LT
1097
1098 /* make sure the EEPROM is good */
1dc32918 1099 if (e1000_validate_eeprom_checksum(hw) < 0) {
feb8f478 1100 e_err(probe, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK
1101 e1000_dump_eeprom(adapter);
1102 /*
1103 * set MAC address to all zeroes to invalidate and temporary
1104 * disable this device for the user. This blocks regular
1105 * traffic while still permitting ethtool ioctls from reaching
1106 * the hardware as well as allowing the user to run the
1107 * interface after manually setting a hw addr using
1108 * `ip set address`
1109 */
1dc32918 1110 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK
1111 } else {
1112 /* copy the MAC address out of the EEPROM */
1dc32918 1113 if (e1000_read_mac_addr(hw))
feb8f478 1114 e_err(probe, "EEPROM Read Error\n");
1da177e4 1115 }
67b3c27c 1116 /* don't block initalization here due to bad MAC address */
1dc32918
JP
1117 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1118 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1119
67b3c27c 1120 if (!is_valid_ether_addr(netdev->perm_addr))
feb8f478 1121 e_err(probe, "Invalid MAC Address\n");
1da177e4 1122
1da177e4 1123 init_timer(&adapter->tx_fifo_stall_timer);
c061b18d 1124 adapter->tx_fifo_stall_timer.function = e1000_82547_tx_fifo_stall;
e982f17c 1125 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT
1126
1127 init_timer(&adapter->watchdog_timer);
c061b18d 1128 adapter->watchdog_timer.function = e1000_watchdog;
1da177e4
LT
1129 adapter->watchdog_timer.data = (unsigned long) adapter;
1130
1da177e4 1131 init_timer(&adapter->phy_info_timer);
c061b18d 1132 adapter->phy_info_timer.function = e1000_update_phy_info;
e982f17c 1133 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 1134
5cf42fcd 1135 INIT_WORK(&adapter->fifo_stall_task, e1000_82547_tx_fifo_stall_task);
65f27f38 1136 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5cf42fcd 1137 INIT_WORK(&adapter->phy_info_task, e1000_update_phy_info_task);
1da177e4 1138
1da177e4
LT
1139 e1000_check_options(adapter);
1140
1141 /* Initial Wake on LAN setting
1142 * If APM wake is enabled in the EEPROM,
1143 * enable the ACPI Magic Packet filter
1144 */
1145
1dc32918 1146 switch (hw->mac_type) {
1da177e4
LT
1147 case e1000_82542_rev2_0:
1148 case e1000_82542_rev2_1:
1149 case e1000_82543:
1150 break;
1151 case e1000_82544:
1dc32918 1152 e1000_read_eeprom(hw,
1da177e4
LT
1153 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1154 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1155 break;
1156 case e1000_82546:
1157 case e1000_82546_rev_3:
1dc32918
JP
1158 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1159 e1000_read_eeprom(hw,
1da177e4
LT
1160 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1161 break;
1162 }
1163 /* Fall Through */
1164 default:
1dc32918 1165 e1000_read_eeprom(hw,
1da177e4
LT
1166 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1167 break;
1168 }
96838a40 1169 if (eeprom_data & eeprom_apme_mask)
120cd576
JB
1170 adapter->eeprom_wol |= E1000_WUFC_MAG;
1171
1172 /* now that we have the eeprom settings, apply the special cases
1173 * where the eeprom may be wrong or the board simply won't support
1174 * wake on lan on a particular port */
1175 switch (pdev->device) {
1176 case E1000_DEV_ID_82546GB_PCIE:
1177 adapter->eeprom_wol = 0;
1178 break;
1179 case E1000_DEV_ID_82546EB_FIBER:
1180 case E1000_DEV_ID_82546GB_FIBER:
120cd576
JB
1181 /* Wake events only supported on port A for dual fiber
1182 * regardless of eeprom setting */
1dc32918 1183 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB
1184 adapter->eeprom_wol = 0;
1185 break;
1186 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1187 /* if quad port adapter, disable WoL on all but port A */
1188 if (global_quad_port_a != 0)
1189 adapter->eeprom_wol = 0;
1190 else
1191 adapter->quad_port_a = 1;
1192 /* Reset for multiple quad port adapters */
1193 if (++global_quad_port_a == 4)
1194 global_quad_port_a = 0;
1195 break;
1196 }
1197
1198 /* initialize the wol settings based on the eeprom settings */
1199 adapter->wol = adapter->eeprom_wol;
de126489 1200 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1201
5377a416
DB
1202 /* Auto detect PHY address */
1203 if (hw->mac_type == e1000_ce4100) {
1204 for (i = 0; i < 32; i++) {
1205 hw->phy_addr = i;
1206 e1000_read_phy_reg(hw, PHY_ID2, &tmp);
1207 if (tmp == 0 || tmp == 0xFF) {
1208 if (i == 31)
1209 goto err_eeprom;
1210 continue;
1211 } else
1212 break;
1213 }
1214 }
1215
675ad473
ET
1216 /* reset the hardware with the new settings */
1217 e1000_reset(adapter);
1218
1219 strcpy(netdev->name, "eth%d");
1220 err = register_netdev(netdev);
1221 if (err)
1222 goto err_register;
1223
5622e404
JP
1224 e1000_vlan_mode(netdev, netdev->features);
1225
fb3d47d4 1226 /* print bus type/speed/width info */
feb8f478 1227 e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n",
7837e58c
JP
1228 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1229 ((hw->bus_speed == e1000_bus_speed_133) ? 133 :
1230 (hw->bus_speed == e1000_bus_speed_120) ? 120 :
1231 (hw->bus_speed == e1000_bus_speed_100) ? 100 :
1232 (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33),
1233 ((hw->bus_width == e1000_bus_width_64) ? 64 : 32),
1234 netdev->dev_addr);
1314bbf3 1235
eb62efd2
JB
1236 /* carrier off reporting is important to ethtool even BEFORE open */
1237 netif_carrier_off(netdev);
1238
feb8f478 1239 e_info(probe, "Intel(R) PRO/1000 Network Connection\n");
1da177e4
LT
1240
1241 cards_found++;
1242 return 0;
1243
1244err_register:
6dd62ab0 1245err_eeprom:
1532ecea 1246 e1000_phy_hw_reset(hw);
6dd62ab0 1247
1dc32918
JP
1248 if (hw->flash_address)
1249 iounmap(hw->flash_address);
6dd62ab0
VA
1250 kfree(adapter->tx_ring);
1251 kfree(adapter->rx_ring);
e508be17 1252err_dma:
1da177e4 1253err_sw_init:
5377a416
DB
1254err_mdio_ioremap:
1255 iounmap(ce4100_gbe_mdio_base_virt);
1dc32918 1256 iounmap(hw->hw_addr);
1da177e4
LT
1257err_ioremap:
1258 free_netdev(netdev);
1259err_alloc_etherdev:
81250297 1260 pci_release_selected_regions(pdev, bars);
6dd62ab0 1261err_pci_reg:
6dd62ab0 1262 pci_disable_device(pdev);
1da177e4
LT
1263 return err;
1264}
1265
1266/**
1267 * e1000_remove - Device Removal Routine
1268 * @pdev: PCI device information struct
1269 *
1270 * e1000_remove is called by the PCI subsystem to alert the driver
1271 * that it should release a PCI device. The could be caused by a
1272 * Hot-Plug event, or because the driver is going to be removed from
1273 * memory.
1274 **/
1275
64798845 1276static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT
1277{
1278 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1279 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1280 struct e1000_hw *hw = &adapter->hw;
1da177e4 1281
baa34745
JB
1282 set_bit(__E1000_DOWN, &adapter->flags);
1283 del_timer_sync(&adapter->tx_fifo_stall_timer);
1284 del_timer_sync(&adapter->watchdog_timer);
1285 del_timer_sync(&adapter->phy_info_timer);
1286
28e53bdd 1287 cancel_work_sync(&adapter->reset_task);
be2b28ed 1288
0fccd0e9 1289 e1000_release_manageability(adapter);
1da177e4 1290
bea3348e
SH
1291 unregister_netdev(netdev);
1292
1532ecea 1293 e1000_phy_hw_reset(hw);
1da177e4 1294
24025e4e
MC
1295 kfree(adapter->tx_ring);
1296 kfree(adapter->rx_ring);
24025e4e 1297
1dc32918
JP
1298 iounmap(hw->hw_addr);
1299 if (hw->flash_address)
1300 iounmap(hw->flash_address);
81250297 1301 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT
1302
1303 free_netdev(netdev);
1304
1305 pci_disable_device(pdev);
1306}
1307
1308/**
1309 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1310 * @adapter: board private structure to initialize
1311 *
1312 * e1000_sw_init initializes the Adapter private data structure.
e508be17 1313 * e1000_init_hw_struct MUST be called before this function
1da177e4
LT
1314 **/
1315
64798845 1316static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4 1317{
eb0f8054 1318 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4 1319
f56799ea
JK
1320 adapter->num_tx_queues = 1;
1321 adapter->num_rx_queues = 1;
581d708e
MC
1322
1323 if (e1000_alloc_queues(adapter)) {
feb8f478 1324 e_err(probe, "Unable to allocate memory for queues\n");
581d708e
MC
1325 return -ENOMEM;
1326 }
1327
47313054 1328 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX
1329 e1000_irq_disable(adapter);
1330
1da177e4 1331 spin_lock_init(&adapter->stats_lock);
1da177e4 1332
1314bbf3
AK
1333 set_bit(__E1000_DOWN, &adapter->flags);
1334
1da177e4
LT
1335 return 0;
1336}
1337
581d708e
MC
1338/**
1339 * e1000_alloc_queues - Allocate memory for all rings
1340 * @adapter: board private structure to initialize
1341 *
1342 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1343 * number of queues at compile-time.
581d708e
MC
1344 **/
1345
64798845 1346static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1347{
1c7e5b12
YB
1348 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1349 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC
1350 if (!adapter->tx_ring)
1351 return -ENOMEM;
581d708e 1352
1c7e5b12
YB
1353 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1354 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC
1355 if (!adapter->rx_ring) {
1356 kfree(adapter->tx_ring);
1357 return -ENOMEM;
1358 }
581d708e 1359
581d708e
MC
1360 return E1000_SUCCESS;
1361}
1362
1da177e4
LT
1363/**
1364 * e1000_open - Called when a network interface is made active
1365 * @netdev: network interface device structure
1366 *
1367 * Returns 0 on success, negative value on failure
1368 *
1369 * The open entry point is called when a network interface is made
1370 * active by the system (IFF_UP). At this point all resources needed
1371 * for transmit and receive operations are allocated, the interrupt
1372 * handler is registered with the OS, the watchdog timer is started,
1373 * and the stack is notified that the interface is ready.
1374 **/
1375
64798845 1376static int e1000_open(struct net_device *netdev)
1da177e4 1377{
60490fe0 1378 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1379 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
1380 int err;
1381
2db10a08 1382 /* disallow open during test */
1314bbf3 1383 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK
1384 return -EBUSY;
1385
eb62efd2
JB
1386 netif_carrier_off(netdev);
1387
1da177e4 1388 /* allocate transmit descriptors */
e0aac5a2
AK
1389 err = e1000_setup_all_tx_resources(adapter);
1390 if (err)
1da177e4
LT
1391 goto err_setup_tx;
1392
1393 /* allocate receive descriptors */
e0aac5a2 1394 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1395 if (err)
e0aac5a2 1396 goto err_setup_rx;
b5bf28cd 1397
79f05bf0
AK
1398 e1000_power_up_phy(adapter);
1399
2d7edb92 1400 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1401 if ((hw->mng_cookie.status &
2d7edb92
MC
1402 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1403 e1000_update_mng_vlan(adapter);
1404 }
1da177e4 1405
e0aac5a2
AK
1406 /* before we allocate an interrupt, we must be ready to handle it.
1407 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1408 * as soon as we call pci_request_irq, so we have to setup our
1409 * clean_rx handler before we do so. */
1410 e1000_configure(adapter);
1411
1412 err = e1000_request_irq(adapter);
1413 if (err)
1414 goto err_req_irq;
1415
1416 /* From here on the code is the same as e1000_up() */
1417 clear_bit(__E1000_DOWN, &adapter->flags);
1418
bea3348e 1419 napi_enable(&adapter->napi);
47313054 1420
e0aac5a2
AK
1421 e1000_irq_enable(adapter);
1422
076152d5
BH
1423 netif_start_queue(netdev);
1424
e0aac5a2 1425 /* fire a link status change interrupt to start the watchdog */
1dc32918 1426 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1427
1da177e4
LT
1428 return E1000_SUCCESS;
1429
b5bf28cd 1430err_req_irq:
e0aac5a2 1431 e1000_power_down_phy(adapter);
581d708e 1432 e1000_free_all_rx_resources(adapter);
1da177e4 1433err_setup_rx:
581d708e 1434 e1000_free_all_tx_resources(adapter);
1da177e4
LT
1435err_setup_tx:
1436 e1000_reset(adapter);
1437
1438 return err;
1439}
1440
1441/**
1442 * e1000_close - Disables a network interface
1443 * @netdev: network interface device structure
1444 *
1445 * Returns 0, this is not allowed to fail
1446 *
1447 * The close entry point is called when an interface is de-activated
1448 * by the OS. The hardware is still under the drivers control, but
1449 * needs to be disabled. A global MAC reset is issued to stop the
1450 * hardware, and all transmit and receive resources are freed.
1451 **/
1452
64798845 1453static int e1000_close(struct net_device *netdev)
1da177e4 1454{
60490fe0 1455 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1456 struct e1000_hw *hw = &adapter->hw;
1da177e4 1457
2db10a08 1458 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1459 e1000_down(adapter);
79f05bf0 1460 e1000_power_down_phy(adapter);
2db10a08 1461 e1000_free_irq(adapter);
1da177e4 1462
581d708e
MC
1463 e1000_free_all_tx_resources(adapter);
1464 e1000_free_all_rx_resources(adapter);
1da177e4 1465
4666560a
BA
1466 /* kill manageability vlan ID if supported, but not if a vlan with
1467 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1468 if ((hw->mng_cookie.status &
4666560a 1469 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5622e404 1470 !test_bit(adapter->mng_vlan_id, adapter->active_vlans)) {
2d7edb92
MC
1471 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1472 }
b55ccb35 1473
1da177e4
LT
1474 return 0;
1475}
1476
1477/**
1478 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1479 * @adapter: address of board private structure
2d7edb92
MC
1480 * @start: address of beginning of memory
1481 * @len: length of memory
1da177e4 1482 **/
64798845
JP
1483static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1484 unsigned long len)
1da177e4 1485{
1dc32918 1486 struct e1000_hw *hw = &adapter->hw;
e982f17c 1487 unsigned long begin = (unsigned long)start;
1da177e4
LT
1488 unsigned long end = begin + len;
1489
2648345f
MC
1490 /* First rev 82545 and 82546 need to not allow any memory
1491 * write location to cross 64k boundary due to errata 23 */
1dc32918 1492 if (hw->mac_type == e1000_82545 ||
5377a416 1493 hw->mac_type == e1000_ce4100 ||
1dc32918 1494 hw->mac_type == e1000_82546) {
c3033b01 1495 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT
1496 }
1497
c3033b01 1498 return true;
1da177e4
LT
1499}
1500
1501/**
1502 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1503 * @adapter: board private structure
581d708e 1504 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT
1505 *
1506 * Return 0 on success, negative on failure
1507 **/
1508
64798845
JP
1509static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1510 struct e1000_tx_ring *txdr)
1da177e4 1511{
1da177e4
LT
1512 struct pci_dev *pdev = adapter->pdev;
1513 int size;
1514
1515 size = sizeof(struct e1000_buffer) * txdr->count;
89bf67f1 1516 txdr->buffer_info = vzalloc(size);
96838a40 1517 if (!txdr->buffer_info) {
feb8f478
ET
1518 e_err(probe, "Unable to allocate memory for the Tx descriptor "
1519 "ring\n");
1da177e4
LT
1520 return -ENOMEM;
1521 }
1da177e4
LT
1522
1523 /* round up to nearest 4K */
1524
1525 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1526 txdr->size = ALIGN(txdr->size, 4096);
1da177e4 1527
b16f53be
NN
1528 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1529 GFP_KERNEL);
96838a40 1530 if (!txdr->desc) {
1da177e4 1531setup_tx_desc_die:
1da177e4 1532 vfree(txdr->buffer_info);
feb8f478
ET
1533 e_err(probe, "Unable to allocate memory for the Tx descriptor "
1534 "ring\n");
1da177e4
LT
1535 return -ENOMEM;
1536 }
1537
2648345f 1538 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT
1539 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1540 void *olddesc = txdr->desc;
1541 dma_addr_t olddma = txdr->dma;
feb8f478 1542 e_err(tx_err, "txdr align check failed: %u bytes at %p\n",
675ad473 1543 txdr->size, txdr->desc);
2648345f 1544 /* Try again, without freeing the previous */
b16f53be
NN
1545 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
1546 &txdr->dma, GFP_KERNEL);
2648345f 1547 /* Failed allocation, critical failure */
96838a40 1548 if (!txdr->desc) {
b16f53be
NN
1549 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1550 olddma);
1da177e4
LT
1551 goto setup_tx_desc_die;
1552 }
1553
1554 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1555 /* give up */
b16f53be
NN
1556 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
1557 txdr->dma);
1558 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1559 olddma);
feb8f478 1560 e_err(probe, "Unable to allocate aligned memory "
675ad473 1561 "for the transmit descriptor ring\n");
1da177e4
LT
1562 vfree(txdr->buffer_info);
1563 return -ENOMEM;
1564 } else {
2648345f 1565 /* Free old allocation, new allocation was successful */
b16f53be
NN
1566 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1567 olddma);
1da177e4
LT
1568 }
1569 }
1570 memset(txdr->desc, 0, txdr->size);
1571
1572 txdr->next_to_use = 0;
1573 txdr->next_to_clean = 0;
1574
1575 return 0;
1576}
1577
581d708e
MC
1578/**
1579 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1580 * (Descriptors) for all queues
1581 * @adapter: board private structure
1582 *
581d708e
MC
1583 * Return 0 on success, negative on failure
1584 **/
1585
64798845 1586int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC
1587{
1588 int i, err = 0;
1589
f56799ea 1590 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC
1591 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1592 if (err) {
feb8f478 1593 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA
1594 for (i-- ; i >= 0; i--)
1595 e1000_free_tx_resources(adapter,
1596 &adapter->tx_ring[i]);
581d708e
MC
1597 break;
1598 }
1599 }
1600
1601 return err;
1602}
1603
1da177e4
LT
1604/**
1605 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1606 * @adapter: board private structure
1607 *
1608 * Configure the Tx unit of the MAC after a reset.
1609 **/
1610
64798845 1611static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1612{
406874a7 1613 u64 tdba;
581d708e 1614 struct e1000_hw *hw = &adapter->hw;
1532ecea 1615 u32 tdlen, tctl, tipg;
406874a7 1616 u32 ipgr1, ipgr2;
1da177e4
LT
1617
1618 /* Setup the HW Tx Head and Tail descriptor pointers */
1619
f56799ea 1620 switch (adapter->num_tx_queues) {
24025e4e
MC
1621 case 1:
1622 default:
581d708e
MC
1623 tdba = adapter->tx_ring[0].dma;
1624 tdlen = adapter->tx_ring[0].count *
1625 sizeof(struct e1000_tx_desc);
1dc32918
JP
1626 ew32(TDLEN, tdlen);
1627 ew32(TDBAH, (tdba >> 32));
1628 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1629 ew32(TDT, 0);
1630 ew32(TDH, 0);
6a951698
AK
1631 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1632 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC
1633 break;
1634 }
1da177e4
LT
1635
1636 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1637 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1638 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK
1639 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1640 else
1641 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1642
581d708e 1643 switch (hw->mac_type) {
1da177e4
LT
1644 case e1000_82542_rev2_0:
1645 case e1000_82542_rev2_1:
1646 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK
1647 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1648 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT
1649 break;
1650 default:
0fadb059
JK
1651 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1652 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1653 break;
1da177e4 1654 }
0fadb059
JK
1655 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1656 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1657 ew32(TIPG, tipg);
1da177e4
LT
1658
1659 /* Set the Tx Interrupt Delay register */
1660
1dc32918 1661 ew32(TIDV, adapter->tx_int_delay);
581d708e 1662 if (hw->mac_type >= e1000_82540)
1dc32918 1663 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT
1664
1665 /* Program the Transmit Control Register */
1666
1dc32918 1667 tctl = er32(TCTL);
1da177e4 1668 tctl &= ~E1000_TCTL_CT;
7e6c9861 1669 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT
1670 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1671
581d708e 1672 e1000_config_collision_dist(hw);
1da177e4
LT
1673
1674 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB
1675 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1676
1677 /* only set IDE if we are delaying interrupts using the timers */
1678 if (adapter->tx_int_delay)
1679 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1680
581d708e 1681 if (hw->mac_type < e1000_82543)
1da177e4
LT
1682 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1683 else
1684 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1685
1686 /* Cache if we're 82544 running in PCI-X because we'll
1687 * need this to apply a workaround later in the send path. */
581d708e
MC
1688 if (hw->mac_type == e1000_82544 &&
1689 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1690 adapter->pcix_82544 = 1;
7e6c9861 1691
1dc32918 1692 ew32(TCTL, tctl);
7e6c9861 1693
1da177e4
LT
1694}
1695
1696/**
1697 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1698 * @adapter: board private structure
581d708e 1699 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT
1700 *
1701 * Returns 0 on success, negative on failure
1702 **/
1703
64798845
JP
1704static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1705 struct e1000_rx_ring *rxdr)
1da177e4 1706{
1da177e4 1707 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1708 int size, desc_len;
1da177e4
LT
1709
1710 size = sizeof(struct e1000_buffer) * rxdr->count;
89bf67f1 1711 rxdr->buffer_info = vzalloc(size);
581d708e 1712 if (!rxdr->buffer_info) {
feb8f478
ET
1713 e_err(probe, "Unable to allocate memory for the Rx descriptor "
1714 "ring\n");
1da177e4
LT
1715 return -ENOMEM;
1716 }
1da177e4 1717
1532ecea 1718 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1719
1da177e4
LT
1720 /* Round up to nearest 4K */
1721
2d7edb92 1722 rxdr->size = rxdr->count * desc_len;
9099cfb9 1723 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4 1724
b16f53be
NN
1725 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1726 GFP_KERNEL);
1da177e4 1727
581d708e 1728 if (!rxdr->desc) {
feb8f478
ET
1729 e_err(probe, "Unable to allocate memory for the Rx descriptor "
1730 "ring\n");
1da177e4 1731setup_rx_desc_die:
1da177e4
LT
1732 vfree(rxdr->buffer_info);
1733 return -ENOMEM;
1734 }
1735
2648345f 1736 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT
1737 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1738 void *olddesc = rxdr->desc;
1739 dma_addr_t olddma = rxdr->dma;
feb8f478 1740 e_err(rx_err, "rxdr align check failed: %u bytes at %p\n",
675ad473 1741 rxdr->size, rxdr->desc);
2648345f 1742 /* Try again, without freeing the previous */
b16f53be
NN
1743 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size,
1744 &rxdr->dma, GFP_KERNEL);
2648345f 1745 /* Failed allocation, critical failure */
581d708e 1746 if (!rxdr->desc) {
b16f53be
NN
1747 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1748 olddma);
feb8f478
ET
1749 e_err(probe, "Unable to allocate memory for the Rx "
1750 "descriptor ring\n");
1da177e4
LT
1751 goto setup_rx_desc_die;
1752 }
1753
1754 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1755 /* give up */
b16f53be
NN
1756 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
1757 rxdr->dma);
1758 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1759 olddma);
feb8f478
ET
1760 e_err(probe, "Unable to allocate aligned memory for "
1761 "the Rx descriptor ring\n");
581d708e 1762 goto setup_rx_desc_die;
1da177e4 1763 } else {
2648345f 1764 /* Free old allocation, new allocation was successful */
b16f53be
NN
1765 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1766 olddma);
1da177e4
LT
1767 }
1768 }
1769 memset(rxdr->desc, 0, rxdr->size);
1770
1771 rxdr->next_to_clean = 0;
1772 rxdr->next_to_use = 0;
edbbb3ca 1773 rxdr->rx_skb_top = NULL;
1da177e4
LT
1774
1775 return 0;
1776}
1777
581d708e
MC
1778/**
1779 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1780 * (Descriptors) for all queues
1781 * @adapter: board private structure
1782 *
581d708e
MC
1783 * Return 0 on success, negative on failure
1784 **/
1785
64798845 1786int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC
1787{
1788 int i, err = 0;
1789
f56799ea 1790 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC
1791 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1792 if (err) {
feb8f478 1793 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA
1794 for (i-- ; i >= 0; i--)
1795 e1000_free_rx_resources(adapter,
1796 &adapter->rx_ring[i]);
581d708e
MC
1797 break;
1798 }
1799 }
1800
1801 return err;
1802}
1803
1da177e4 1804/**
2648345f 1805 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT
1806 * @adapter: Board private structure
1807 **/
64798845 1808static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1809{
1dc32918 1810 struct e1000_hw *hw = &adapter->hw;
630b25cd 1811 u32 rctl;
1da177e4 1812
1dc32918 1813 rctl = er32(RCTL);
1da177e4
LT
1814
1815 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1816
1817 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1818 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1819 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1820
1dc32918 1821 if (hw->tbi_compatibility_on == 1)
1da177e4
LT
1822 rctl |= E1000_RCTL_SBP;
1823 else
1824 rctl &= ~E1000_RCTL_SBP;
1825
2d7edb92
MC
1826 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1827 rctl &= ~E1000_RCTL_LPE;
1828 else
1829 rctl |= E1000_RCTL_LPE;
1830
1da177e4 1831 /* Setup buffer sizes */
9e2feace
AK
1832 rctl &= ~E1000_RCTL_SZ_4096;
1833 rctl |= E1000_RCTL_BSEX;
1834 switch (adapter->rx_buffer_len) {
a1415ee6
JK
1835 case E1000_RXBUFFER_2048:
1836 default:
1837 rctl |= E1000_RCTL_SZ_2048;
1838 rctl &= ~E1000_RCTL_BSEX;
1839 break;
1840 case E1000_RXBUFFER_4096:
1841 rctl |= E1000_RCTL_SZ_4096;
1842 break;
1843 case E1000_RXBUFFER_8192:
1844 rctl |= E1000_RCTL_SZ_8192;
1845 break;
1846 case E1000_RXBUFFER_16384:
1847 rctl |= E1000_RCTL_SZ_16384;
1848 break;
2d7edb92
MC
1849 }
1850
1dc32918 1851 ew32(RCTL, rctl);
1da177e4
LT
1852}
1853
1854/**
1855 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1856 * @adapter: board private structure
1857 *
1858 * Configure the Rx unit of the MAC after a reset.
1859 **/
1860
64798845 1861static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1862{
406874a7 1863 u64 rdba;
581d708e 1864 struct e1000_hw *hw = &adapter->hw;
1532ecea 1865 u32 rdlen, rctl, rxcsum;
2d7edb92 1866
edbbb3ca
JB
1867 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1868 rdlen = adapter->rx_ring[0].count *
1869 sizeof(struct e1000_rx_desc);
1870 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1871 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1872 } else {
1873 rdlen = adapter->rx_ring[0].count *
1874 sizeof(struct e1000_rx_desc);
1875 adapter->clean_rx = e1000_clean_rx_irq;
1876 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1877 }
1da177e4
LT
1878
1879 /* disable receives while setting up the descriptors */
1dc32918
JP
1880 rctl = er32(RCTL);
1881 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT
1882
1883 /* set the Receive Delay Timer Register */
1dc32918 1884 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1885
581d708e 1886 if (hw->mac_type >= e1000_82540) {
1dc32918 1887 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1888 if (adapter->itr_setting != 0)
1dc32918 1889 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT
1890 }
1891
581d708e
MC
1892 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1893 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1894 switch (adapter->num_rx_queues) {
24025e4e
MC
1895 case 1:
1896 default:
581d708e 1897 rdba = adapter->rx_ring[0].dma;
1dc32918
JP
1898 ew32(RDLEN, rdlen);
1899 ew32(RDBAH, (rdba >> 32));
1900 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1901 ew32(RDT, 0);
1902 ew32(RDH, 0);
6a951698
AK
1903 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1904 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1905 break;
24025e4e
MC
1906 }
1907
1da177e4 1908 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1909 if (hw->mac_type >= e1000_82543) {
1dc32918 1910 rxcsum = er32(RXCSUM);
630b25cd 1911 if (adapter->rx_csum)
2d7edb92 1912 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1913 else
2d7edb92 1914 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1915 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1916 ew32(RXCSUM, rxcsum);
1da177e4
LT
1917 }
1918
1919 /* Enable Receives */
1dc32918 1920 ew32(RCTL, rctl);
1da177e4
LT
1921}
1922
1923/**
581d708e 1924 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1925 * @adapter: board private structure
581d708e 1926 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT
1927 *
1928 * Free all transmit software resources
1929 **/
1930
64798845
JP
1931static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1932 struct e1000_tx_ring *tx_ring)
1da177e4
LT
1933{
1934 struct pci_dev *pdev = adapter->pdev;
1935
581d708e 1936 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1937
581d708e
MC
1938 vfree(tx_ring->buffer_info);
1939 tx_ring->buffer_info = NULL;
1da177e4 1940
b16f53be
NN
1941 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1942 tx_ring->dma);
1da177e4 1943
581d708e
MC
1944 tx_ring->desc = NULL;
1945}
1946
1947/**
1948 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1949 * @adapter: board private structure
1950 *
1951 * Free all transmit software resources
1952 **/
1953
64798845 1954void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC
1955{
1956 int i;
1957
f56799ea 1958 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1959 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT
1960}
1961
64798845
JP
1962static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1963 struct e1000_buffer *buffer_info)
1da177e4 1964{
602c0554
AD
1965 if (buffer_info->dma) {
1966 if (buffer_info->mapped_as_page)
b16f53be
NN
1967 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1968 buffer_info->length, DMA_TO_DEVICE);
602c0554 1969 else
b16f53be 1970 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
602c0554 1971 buffer_info->length,
b16f53be 1972 DMA_TO_DEVICE);
602c0554
AD
1973 buffer_info->dma = 0;
1974 }
a9ebadd6 1975 if (buffer_info->skb) {
1da177e4 1976 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB
1977 buffer_info->skb = NULL;
1978 }
37e73df8 1979 buffer_info->time_stamp = 0;
a9ebadd6 1980 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT
1981}
1982
1983/**
1984 * e1000_clean_tx_ring - Free Tx Buffers
1985 * @adapter: board private structure
581d708e 1986 * @tx_ring: ring to be cleaned
1da177e4
LT
1987 **/
1988
64798845
JP
1989static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1990 struct e1000_tx_ring *tx_ring)
1da177e4 1991{
1dc32918 1992 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
1993 struct e1000_buffer *buffer_info;
1994 unsigned long size;
1995 unsigned int i;
1996
1997 /* Free all the Tx ring sk_buffs */
1998
96838a40 1999 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT
2000 buffer_info = &tx_ring->buffer_info[i];
2001 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2002 }
2003
2004 size = sizeof(struct e1000_buffer) * tx_ring->count;
2005 memset(tx_ring->buffer_info, 0, size);
2006
2007 /* Zero out the descriptor ring */
2008
2009 memset(tx_ring->desc, 0, tx_ring->size);
2010
2011 tx_ring->next_to_use = 0;
2012 tx_ring->next_to_clean = 0;
fd803241 2013 tx_ring->last_tx_tso = 0;
1da177e4 2014
1dc32918
JP
2015 writel(0, hw->hw_addr + tx_ring->tdh);
2016 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC
2017}
2018
2019/**
2020 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2021 * @adapter: board private structure
2022 **/
2023
64798845 2024static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC
2025{
2026 int i;
2027
f56799ea 2028 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2029 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT
2030}
2031
2032/**
2033 * e1000_free_rx_resources - Free Rx Resources
2034 * @adapter: board private structure
581d708e 2035 * @rx_ring: ring to clean the resources from
1da177e4
LT
2036 *
2037 * Free all receive software resources
2038 **/
2039
64798845
JP
2040static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2041 struct e1000_rx_ring *rx_ring)
1da177e4 2042{
1da177e4
LT
2043 struct pci_dev *pdev = adapter->pdev;
2044
581d708e 2045 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT
2046
2047 vfree(rx_ring->buffer_info);
2048 rx_ring->buffer_info = NULL;
2049
b16f53be
NN
2050 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2051 rx_ring->dma);
1da177e4
LT
2052
2053 rx_ring->desc = NULL;
2054}
2055
2056/**
581d708e 2057 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2058 * @adapter: board private structure
581d708e
MC
2059 *
2060 * Free all receive software resources
2061 **/
2062
64798845 2063void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC
2064{
2065 int i;
2066
f56799ea 2067 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC
2068 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2069}
2070
2071/**
2072 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2073 * @adapter: board private structure
2074 * @rx_ring: ring to free buffers from
1da177e4
LT
2075 **/
2076
64798845
JP
2077static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2078 struct e1000_rx_ring *rx_ring)
1da177e4 2079{
1dc32918 2080 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
2081 struct e1000_buffer *buffer_info;
2082 struct pci_dev *pdev = adapter->pdev;
2083 unsigned long size;
630b25cd 2084 unsigned int i;
1da177e4
LT
2085
2086 /* Free all the Rx ring sk_buffs */
96838a40 2087 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2088 buffer_info = &rx_ring->buffer_info[i];
edbbb3ca
JB
2089 if (buffer_info->dma &&
2090 adapter->clean_rx == e1000_clean_rx_irq) {
b16f53be 2091 dma_unmap_single(&pdev->dev, buffer_info->dma,
edbbb3ca 2092 buffer_info->length,
b16f53be 2093 DMA_FROM_DEVICE);
edbbb3ca
JB
2094 } else if (buffer_info->dma &&
2095 adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
b16f53be
NN
2096 dma_unmap_page(&pdev->dev, buffer_info->dma,
2097 buffer_info->length,
2098 DMA_FROM_DEVICE);
679be3ba 2099 }
1da177e4 2100
679be3ba 2101 buffer_info->dma = 0;
edbbb3ca
JB
2102 if (buffer_info->page) {
2103 put_page(buffer_info->page);
2104 buffer_info->page = NULL;
2105 }
679be3ba 2106 if (buffer_info->skb) {
1da177e4
LT
2107 dev_kfree_skb(buffer_info->skb);
2108 buffer_info->skb = NULL;
997f5cbd 2109 }
1da177e4
LT
2110 }
2111
edbbb3ca
JB
2112 /* there also may be some cached data from a chained receive */
2113 if (rx_ring->rx_skb_top) {
2114 dev_kfree_skb(rx_ring->rx_skb_top);
2115 rx_ring->rx_skb_top = NULL;
2116 }
2117
1da177e4
LT
2118 size = sizeof(struct e1000_buffer) * rx_ring->count;
2119 memset(rx_ring->buffer_info, 0, size);
2120
2121 /* Zero out the descriptor ring */
1da177e4
LT
2122 memset(rx_ring->desc, 0, rx_ring->size);
2123
2124 rx_ring->next_to_clean = 0;
2125 rx_ring->next_to_use = 0;
2126
1dc32918
JP
2127 writel(0, hw->hw_addr + rx_ring->rdh);
2128 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC
2129}
2130
2131/**
2132 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2133 * @adapter: board private structure
2134 **/
2135
64798845 2136static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC
2137{
2138 int i;
2139
f56799ea 2140 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2141 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT
2142}
2143
2144/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2145 * and memory write and invalidate disabled for certain operations
2146 */
64798845 2147static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2148{
1dc32918 2149 struct e1000_hw *hw = &adapter->hw;
1da177e4 2150 struct net_device *netdev = adapter->netdev;
406874a7 2151 u32 rctl;
1da177e4 2152
1dc32918 2153 e1000_pci_clear_mwi(hw);
1da177e4 2154
1dc32918 2155 rctl = er32(RCTL);
1da177e4 2156 rctl |= E1000_RCTL_RST;
1dc32918
JP
2157 ew32(RCTL, rctl);
2158 E1000_WRITE_FLUSH();
1da177e4
LT
2159 mdelay(5);
2160
96838a40 2161 if (netif_running(netdev))
581d708e 2162 e1000_clean_all_rx_rings(adapter);
1da177e4
LT
2163}
2164
64798845 2165static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2166{
1dc32918 2167 struct e1000_hw *hw = &adapter->hw;
1da177e4 2168 struct net_device *netdev = adapter->netdev;
406874a7 2169 u32 rctl;
1da177e4 2170
1dc32918 2171 rctl = er32(RCTL);
1da177e4 2172 rctl &= ~E1000_RCTL_RST;
1dc32918
JP
2173 ew32(RCTL, rctl);
2174 E1000_WRITE_FLUSH();
1da177e4
LT
2175 mdelay(5);
2176
1dc32918
JP
2177 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2178 e1000_pci_set_mwi(hw);
1da177e4 2179
96838a40 2180 if (netif_running(netdev)) {
72d64a43
JK
2181 /* No need to loop, because 82542 supports only 1 queue */
2182 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2183 e1000_configure_rx(adapter);
72d64a43 2184 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT
2185 }
2186}
2187
2188/**
2189 * e1000_set_mac - Change the Ethernet Address of the NIC
2190 * @netdev: network interface device structure
2191 * @p: pointer to an address structure
2192 *
2193 * Returns 0 on success, negative on failure
2194 **/
2195
64798845 2196static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2197{
60490fe0 2198 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2199 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
2200 struct sockaddr *addr = p;
2201
96838a40 2202 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT
2203 return -EADDRNOTAVAIL;
2204
2205 /* 82542 2.0 needs to be in reset to write receive address registers */
2206
1dc32918 2207 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT
2208 e1000_enter_82542_rst(adapter);
2209
2210 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2211 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2212
1dc32918 2213 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2214
1dc32918 2215 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT
2216 e1000_leave_82542_rst(adapter);
2217
2218 return 0;
2219}
2220
2221/**
db0ce50d 2222 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT
2223 * @netdev: network interface device structure
2224 *
db0ce50d
PM
2225 * The set_rx_mode entry point is called whenever the unicast or multicast
2226 * address lists or the network interface flags are updated. This routine is
2227 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT
2228 * promiscuous mode, and all-multi behavior.
2229 **/
2230
64798845 2231static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2232{
60490fe0 2233 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2234 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP
2235 struct netdev_hw_addr *ha;
2236 bool use_uc = false;
406874a7
JP
2237 u32 rctl;
2238 u32 hash_value;
868d5309 2239 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2240 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB
2241 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2242
2243 if (!mcarray) {
feb8f478 2244 e_err(probe, "memory allocation failed\n");
81c52285
JB
2245 return;
2246 }
cd94dd0b 2247
2648345f
MC
2248 /* Check for Promiscuous and All Multicast modes */
2249
1dc32918 2250 rctl = er32(RCTL);
1da177e4 2251
96838a40 2252 if (netdev->flags & IFF_PROMISC) {
1da177e4 2253 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2254 rctl &= ~E1000_RCTL_VFE;
1da177e4 2255 } else {
1532ecea 2256 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2257 rctl |= E1000_RCTL_MPE;
1532ecea 2258 else
746b9f02 2259 rctl &= ~E1000_RCTL_MPE;
1532ecea 2260 /* Enable VLAN filter if there is a VLAN */
5622e404 2261 if (e1000_vlan_used(adapter))
1532ecea 2262 rctl |= E1000_RCTL_VFE;
db0ce50d
PM
2263 }
2264
32e7bfc4 2265 if (netdev_uc_count(netdev) > rar_entries - 1) {
db0ce50d
PM
2266 rctl |= E1000_RCTL_UPE;
2267 } else if (!(netdev->flags & IFF_PROMISC)) {
2268 rctl &= ~E1000_RCTL_UPE;
ccffad25 2269 use_uc = true;
1da177e4
LT
2270 }
2271
1dc32918 2272 ew32(RCTL, rctl);
1da177e4
LT
2273
2274 /* 82542 2.0 needs to be in reset to write receive address registers */
2275
96838a40 2276 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT
2277 e1000_enter_82542_rst(adapter);
2278
db0ce50d
PM
2279 /* load the first 14 addresses into the exact filters 1-14. Unicast
2280 * addresses take precedence to avoid disabling unicast filtering
2281 * when possible.
2282 *
b595076a 2283 * RAR 0 is used for the station MAC address
1da177e4
LT
2284 * if there are not 14 addresses, go ahead and clear the filters
2285 */
ccffad25
JP
2286 i = 1;
2287 if (use_uc)
32e7bfc4 2288 netdev_for_each_uc_addr(ha, netdev) {
ccffad25
JP
2289 if (i == rar_entries)
2290 break;
2291 e1000_rar_set(hw, ha->addr, i++);
2292 }
2293
22bedad3 2294 netdev_for_each_mc_addr(ha, netdev) {
7a81e9f3
JP
2295 if (i == rar_entries) {
2296 /* load any remaining addresses into the hash table */
2297 u32 hash_reg, hash_bit, mta;
22bedad3 2298 hash_value = e1000_hash_mc_addr(hw, ha->addr);
7a81e9f3
JP
2299 hash_reg = (hash_value >> 5) & 0x7F;
2300 hash_bit = hash_value & 0x1F;
2301 mta = (1 << hash_bit);
2302 mcarray[hash_reg] |= mta;
10886af5 2303 } else {
22bedad3 2304 e1000_rar_set(hw, ha->addr, i++);
1da177e4
LT
2305 }
2306 }
2307
7a81e9f3
JP
2308 for (; i < rar_entries; i++) {
2309 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2310 E1000_WRITE_FLUSH();
2311 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2312 E1000_WRITE_FLUSH();
1da177e4
LT
2313 }
2314
81c52285
JB
2315 /* write the hash table completely, write from bottom to avoid
2316 * both stupid write combining chipsets, and flushing each write */
2317 for (i = mta_reg_count - 1; i >= 0 ; i--) {
2318 /*
2319 * If we are on an 82544 has an errata where writing odd
2320 * offsets overwrites the previous even offset, but writing
2321 * backwards over the range solves the issue by always
2322 * writing the odd offset first
2323 */
2324 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2325 }
2326 E1000_WRITE_FLUSH();
2327
96838a40 2328 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2329 e1000_leave_82542_rst(adapter);
81c52285
JB
2330
2331 kfree(mcarray);
1da177e4
LT
2332}
2333
2334/* Need to wait a few seconds after link up to get diagnostic information from
2335 * the phy */
2336
64798845 2337static void e1000_update_phy_info(unsigned long data)
1da177e4 2338{
e982f17c 2339 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
5cf42fcd
JB
2340 schedule_work(&adapter->phy_info_task);
2341}
2342
2343static void e1000_update_phy_info_task(struct work_struct *work)
2344{
2345 struct e1000_adapter *adapter = container_of(work,
2346 struct e1000_adapter,
2347 phy_info_task);
1dc32918 2348 struct e1000_hw *hw = &adapter->hw;
338c15e4
JB
2349
2350 rtnl_lock();
1dc32918 2351 e1000_phy_get_info(hw, &adapter->phy_info);
338c15e4 2352 rtnl_unlock();
1da177e4
LT
2353}
2354
2355/**
2356 * e1000_82547_tx_fifo_stall - Timer Call-back
2357 * @data: pointer to adapter cast into an unsigned long
2358 **/
64798845 2359static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2360{
e982f17c 2361 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
5cf42fcd
JB
2362 schedule_work(&adapter->fifo_stall_task);
2363}
2364
2365/**
2366 * e1000_82547_tx_fifo_stall_task - task to complete work
2367 * @work: work struct contained inside adapter struct
2368 **/
2369static void e1000_82547_tx_fifo_stall_task(struct work_struct *work)
2370{
2371 struct e1000_adapter *adapter = container_of(work,
2372 struct e1000_adapter,
2373 fifo_stall_task);
1dc32918 2374 struct e1000_hw *hw = &adapter->hw;
1da177e4 2375 struct net_device *netdev = adapter->netdev;
406874a7 2376 u32 tctl;
1da177e4 2377
338c15e4 2378 rtnl_lock();
96838a40 2379 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP
2380 if ((er32(TDT) == er32(TDH)) &&
2381 (er32(TDFT) == er32(TDFH)) &&
2382 (er32(TDFTS) == er32(TDFHS))) {
2383 tctl = er32(TCTL);
2384 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2385 ew32(TDFT, adapter->tx_head_addr);
2386 ew32(TDFH, adapter->tx_head_addr);
2387 ew32(TDFTS, adapter->tx_head_addr);
2388 ew32(TDFHS, adapter->tx_head_addr);
2389 ew32(TCTL, tctl);
2390 E1000_WRITE_FLUSH();
1da177e4
LT
2391
2392 adapter->tx_fifo_head = 0;
2393 atomic_set(&adapter->tx_fifo_stall, 0);
2394 netif_wake_queue(netdev);
baa34745 2395 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
1da177e4
LT
2396 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2397 }
2398 }
338c15e4 2399 rtnl_unlock();
1da177e4
LT
2400}
2401
b548192a 2402bool e1000_has_link(struct e1000_adapter *adapter)
be0f0719
JB
2403{
2404 struct e1000_hw *hw = &adapter->hw;
2405 bool link_active = false;
be0f0719 2406
6d9e5130
NS
2407 /* get_link_status is set on LSC (link status) interrupt or rx
2408 * sequence error interrupt (except on intel ce4100).
2409 * get_link_status will stay false until the
2410 * e1000_check_for_link establishes link for copper adapters
2411 * ONLY
be0f0719
JB
2412 */
2413 switch (hw->media_type) {
2414 case e1000_media_type_copper:
6d9e5130
NS
2415 if (hw->mac_type == e1000_ce4100)
2416 hw->get_link_status = 1;
be0f0719 2417 if (hw->get_link_status) {
120a5d0d 2418 e1000_check_for_link(hw);
be0f0719
JB
2419 link_active = !hw->get_link_status;
2420 } else {
2421 link_active = true;
2422 }
2423 break;
2424 case e1000_media_type_fiber:
120a5d0d 2425 e1000_check_for_link(hw);
be0f0719
JB
2426 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2427 break;
2428 case e1000_media_type_internal_serdes:
120a5d0d 2429 e1000_check_for_link(hw);
be0f0719
JB
2430 link_active = hw->serdes_has_link;
2431 break;
2432 default:
2433 break;
2434 }
2435
2436 return link_active;
2437}
2438
1da177e4
LT
2439/**
2440 * e1000_watchdog - Timer Call-back
2441 * @data: pointer to adapter cast into an unsigned long
2442 **/
64798845 2443static void e1000_watchdog(unsigned long data)
1da177e4 2444{
e982f17c 2445 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2446 struct e1000_hw *hw = &adapter->hw;
1da177e4 2447 struct net_device *netdev = adapter->netdev;
545c67c0 2448 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2449 u32 link, tctl;
90fb5135 2450
be0f0719
JB
2451 link = e1000_has_link(adapter);
2452 if ((netif_carrier_ok(netdev)) && link)
2453 goto link_up;
1da177e4 2454
96838a40
JB
2455 if (link) {
2456 if (!netif_carrier_ok(netdev)) {
406874a7 2457 u32 ctrl;
c3033b01 2458 bool txb2b = true;
be0f0719 2459 /* update snapshot of PHY registers on LSC */
1dc32918 2460 e1000_get_speed_and_duplex(hw,
1da177e4
LT
2461 &adapter->link_speed,
2462 &adapter->link_duplex);
2463
1dc32918 2464 ctrl = er32(CTRL);
675ad473
ET
2465 pr_info("%s NIC Link is Up %d Mbps %s, "
2466 "Flow Control: %s\n",
2467 netdev->name,
2468 adapter->link_speed,
2469 adapter->link_duplex == FULL_DUPLEX ?
2470 "Full Duplex" : "Half Duplex",
2471 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2472 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2473 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2474 E1000_CTRL_TFCE) ? "TX" : "None")));
1da177e4 2475
39ca5f03 2476 /* adjust timeout factor according to speed/duplex */
66a2b0a3 2477 adapter->tx_timeout_factor = 1;
7e6c9861
JK
2478 switch (adapter->link_speed) {
2479 case SPEED_10:
c3033b01 2480 txb2b = false;
be0f0719 2481 adapter->tx_timeout_factor = 16;
7e6c9861
JK
2482 break;
2483 case SPEED_100:
c3033b01 2484 txb2b = false;
7e6c9861
JK
2485 /* maybe add some timeout factor ? */
2486 break;
2487 }
2488
1532ecea 2489 /* enable transmits in the hardware */
1dc32918 2490 tctl = er32(TCTL);
7e6c9861 2491 tctl |= E1000_TCTL_EN;
1dc32918 2492 ew32(TCTL, tctl);
66a2b0a3 2493
1da177e4 2494 netif_carrier_on(netdev);
baa34745
JB
2495 if (!test_bit(__E1000_DOWN, &adapter->flags))
2496 mod_timer(&adapter->phy_info_timer,
2497 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT
2498 adapter->smartspeed = 0;
2499 }
2500 } else {
96838a40 2501 if (netif_carrier_ok(netdev)) {
1da177e4
LT
2502 adapter->link_speed = 0;
2503 adapter->link_duplex = 0;
675ad473
ET
2504 pr_info("%s NIC Link is Down\n",
2505 netdev->name);
1da177e4 2506 netif_carrier_off(netdev);
baa34745
JB
2507
2508 if (!test_bit(__E1000_DOWN, &adapter->flags))
2509 mod_timer(&adapter->phy_info_timer,
2510 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT
2511 }
2512
2513 e1000_smartspeed(adapter);
2514 }
2515
be0f0719 2516link_up:
1da177e4
LT
2517 e1000_update_stats(adapter);
2518
1dc32918 2519 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2520 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2521 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT
2522 adapter->colc_old = adapter->stats.colc;
2523
2524 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2525 adapter->gorcl_old = adapter->stats.gorcl;
2526 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2527 adapter->gotcl_old = adapter->stats.gotcl;
2528
1dc32918 2529 e1000_update_adaptive(hw);
1da177e4 2530
f56799ea 2531 if (!netif_carrier_ok(netdev)) {
581d708e 2532 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT
2533 /* We've lost link, so the controller stops DMA,
2534 * but we've got queued Tx work that's never going
2535 * to get done, so reset controller to flush Tx.
2536 * (Do the reset outside of interrupt context). */
87041639
JK
2537 adapter->tx_timeout_count++;
2538 schedule_work(&adapter->reset_task);
c2d5ab49
JB
2539 /* return immediately since reset is imminent */
2540 return;
1da177e4
LT
2541 }
2542 }
2543
eab2abf5
JB
2544 /* Simple mode for Interrupt Throttle Rate (ITR) */
2545 if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) {
2546 /*
2547 * Symmetric Tx/Rx gets a reduced ITR=2000;
2548 * Total asymmetrical Tx or Rx gets ITR=8000;
2549 * everyone else is between 2000-8000.
2550 */
2551 u32 goc = (adapter->gotcl + adapter->gorcl) / 10000;
2552 u32 dif = (adapter->gotcl > adapter->gorcl ?
2553 adapter->gotcl - adapter->gorcl :
2554 adapter->gorcl - adapter->gotcl) / 10000;
2555 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2556
2557 ew32(ITR, 1000000000 / (itr * 256));
2558 }
2559
1da177e4 2560 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2561 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2562
2648345f 2563 /* Force detection of hung controller every watchdog period */
c3033b01 2564 adapter->detect_tx_hung = true;
1da177e4
LT
2565
2566 /* Reset the timer */
baa34745
JB
2567 if (!test_bit(__E1000_DOWN, &adapter->flags))
2568 mod_timer(&adapter->watchdog_timer,
2569 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT
2570}
2571
835bb129
JB
2572enum latency_range {
2573 lowest_latency = 0,
2574 low_latency = 1,
2575 bulk_latency = 2,
2576 latency_invalid = 255
2577};
2578
2579/**
2580 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB
2581 * @adapter: pointer to adapter
2582 * @itr_setting: current adapter->itr
2583 * @packets: the number of packets during this measurement interval
2584 * @bytes: the number of bytes during this measurement interval
2585 *
835bb129
JB
2586 * Stores a new ITR value based on packets and byte
2587 * counts during the last interrupt. The advantage of per interrupt
2588 * computation is faster updates and more accurate ITR for the current
2589 * traffic pattern. Constants in this function were computed
2590 * based on theoretical maximum wire speed and thresholds were set based
2591 * on testing data as well as attempting to minimize response time
2592 * while increasing bulk throughput.
2593 * this functionality is controlled by the InterruptThrottleRate module
2594 * parameter (see e1000_param.c)
835bb129
JB
2595 **/
2596static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2597 u16 itr_setting, int packets, int bytes)
835bb129
JB
2598{
2599 unsigned int retval = itr_setting;
2600 struct e1000_hw *hw = &adapter->hw;
2601
2602 if (unlikely(hw->mac_type < e1000_82540))
2603 goto update_itr_done;
2604
2605 if (packets == 0)
2606 goto update_itr_done;
2607
835bb129
JB
2608 switch (itr_setting) {
2609 case lowest_latency:
2b65326e
JB
2610 /* jumbo frames get bulk treatment*/
2611 if (bytes/packets > 8000)
2612 retval = bulk_latency;
2613 else if ((packets < 5) && (bytes > 512))
835bb129
JB
2614 retval = low_latency;
2615 break;
2616 case low_latency: /* 50 usec aka 20000 ints/s */
2617 if (bytes > 10000) {
2b65326e
JB
2618 /* jumbo frames need bulk latency setting */
2619 if (bytes/packets > 8000)
2620 retval = bulk_latency;
2621 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB
2622 retval = bulk_latency;
2623 else if ((packets > 35))
2624 retval = lowest_latency;
2b65326e
JB
2625 } else if (bytes/packets > 2000)
2626 retval = bulk_latency;
2627 else if (packets <= 2 && bytes < 512)
835bb129
JB
2628 retval = lowest_latency;
2629 break;
2630 case bulk_latency: /* 250 usec aka 4000 ints/s */
2631 if (bytes > 25000) {
2632 if (packets > 35)
2633 retval = low_latency;
2b65326e
JB
2634 } else if (bytes < 6000) {
2635 retval = low_latency;
835bb129
JB
2636 }
2637 break;
2638 }
2639
2640update_itr_done:
2641 return retval;
2642}
2643
2644static void e1000_set_itr(struct e1000_adapter *adapter)
2645{
2646 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
2647 u16 current_itr;
2648 u32 new_itr = adapter->itr;
835bb129
JB
2649
2650 if (unlikely(hw->mac_type < e1000_82540))
2651 return;
2652
2653 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2654 if (unlikely(adapter->link_speed != SPEED_1000)) {
2655 current_itr = 0;
2656 new_itr = 4000;
2657 goto set_itr_now;
2658 }
2659
2660 adapter->tx_itr = e1000_update_itr(adapter,
2661 adapter->tx_itr,
2662 adapter->total_tx_packets,
2663 adapter->total_tx_bytes);
2b65326e
JB
2664 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2665 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2666 adapter->tx_itr = low_latency;
2667
835bb129
JB
2668 adapter->rx_itr = e1000_update_itr(adapter,
2669 adapter->rx_itr,
2670 adapter->total_rx_packets,
2671 adapter->total_rx_bytes);
2b65326e
JB
2672 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2673 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2674 adapter->rx_itr = low_latency;
835bb129
JB
2675
2676 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2677
835bb129
JB
2678 switch (current_itr) {
2679 /* counts and packets in update_itr are dependent on these numbers */
2680 case lowest_latency:
2681 new_itr = 70000;
2682 break;
2683 case low_latency:
2684 new_itr = 20000; /* aka hwitr = ~200 */
2685 break;
2686 case bulk_latency:
2687 new_itr = 4000;
2688 break;
2689 default:
2690 break;
2691 }
2692
2693set_itr_now:
2694 if (new_itr != adapter->itr) {
2695 /* this attempts to bias the interrupt rate towards Bulk
2696 * by adding intermediate steps when interrupt rate is
2697 * increasing */
2698 new_itr = new_itr > adapter->itr ?
2699 min(adapter->itr + (new_itr >> 2), new_itr) :
2700 new_itr;
2701 adapter->itr = new_itr;
1dc32918 2702 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129 2703 }
835bb129
JB
2704}
2705
1da177e4
LT
2706#define E1000_TX_FLAGS_CSUM 0x00000001
2707#define E1000_TX_FLAGS_VLAN 0x00000002
2708#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2709#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT
2710#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2711#define E1000_TX_FLAGS_VLAN_SHIFT 16
2712
64798845
JP
2713static int e1000_tso(struct e1000_adapter *adapter,
2714 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2715{
1da177e4 2716 struct e1000_context_desc *context_desc;
545c67c0 2717 struct e1000_buffer *buffer_info;
1da177e4 2718 unsigned int i;
406874a7
JP
2719 u32 cmd_length = 0;
2720 u16 ipcse = 0, tucse, mss;
2721 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT
2722 int err;
2723
89114afd 2724 if (skb_is_gso(skb)) {
1da177e4
LT
2725 if (skb_header_cloned(skb)) {
2726 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2727 if (err)
2728 return err;
2729 }
2730
ab6a5bb6 2731 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2732 mss = skb_shinfo(skb)->gso_size;
60828236 2733 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM
2734 struct iphdr *iph = ip_hdr(skb);
2735 iph->tot_len = 0;
2736 iph->check = 0;
aa8223c7
ACM
2737 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2738 iph->daddr, 0,
2739 IPPROTO_TCP,
2740 0);
2d7edb92 2741 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2742 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2743 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2744 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2745 tcp_hdr(skb)->check =
0660e03f
ACM
2746 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2747 &ipv6_hdr(skb)->daddr,
2748 0, IPPROTO_TCP, 0);
2d7edb92 2749 ipcse = 0;
2d7edb92 2750 }
bbe735e4 2751 ipcss = skb_network_offset(skb);
eddc9ec5 2752 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2753 tucss = skb_transport_offset(skb);
aa8223c7 2754 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT
2755 tucse = 0;
2756
2757 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2758 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2759
581d708e
MC
2760 i = tx_ring->next_to_use;
2761 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2762 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT
2763
2764 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2765 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2766 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2767 context_desc->upper_setup.tcp_fields.tucss = tucss;
2768 context_desc->upper_setup.tcp_fields.tucso = tucso;
2769 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2770 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2771 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2772 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2773
545c67c0 2774 buffer_info->time_stamp = jiffies;
a9ebadd6 2775 buffer_info->next_to_watch = i;
545c67c0 2776
581d708e
MC
2777 if (++i == tx_ring->count) i = 0;
2778 tx_ring->next_to_use = i;
1da177e4 2779
c3033b01 2780 return true;
1da177e4 2781 }
c3033b01 2782 return false;
1da177e4
LT
2783}
2784
64798845
JP
2785static bool e1000_tx_csum(struct e1000_adapter *adapter,
2786 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT
2787{
2788 struct e1000_context_desc *context_desc;
545c67c0 2789 struct e1000_buffer *buffer_info;
1da177e4 2790 unsigned int i;
406874a7 2791 u8 css;
3ed30676 2792 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2793
3ed30676
DG
2794 if (skb->ip_summed != CHECKSUM_PARTIAL)
2795 return false;
1da177e4 2796
3ed30676 2797 switch (skb->protocol) {
09640e63 2798 case cpu_to_be16(ETH_P_IP):
3ed30676
DG
2799 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2800 cmd_len |= E1000_TXD_CMD_TCP;
2801 break;
09640e63 2802 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG
2803 /* XXX not handling all IPV6 headers */
2804 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2805 cmd_len |= E1000_TXD_CMD_TCP;
2806 break;
2807 default:
2808 if (unlikely(net_ratelimit()))
feb8f478
ET
2809 e_warn(drv, "checksum_partial proto=%x!\n",
2810 skb->protocol);
3ed30676
DG
2811 break;
2812 }
1da177e4 2813
0d0b1672 2814 css = skb_checksum_start_offset(skb);
1da177e4 2815
3ed30676
DG
2816 i = tx_ring->next_to_use;
2817 buffer_info = &tx_ring->buffer_info[i];
2818 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2819
3ed30676
DG
2820 context_desc->lower_setup.ip_config = 0;
2821 context_desc->upper_setup.tcp_fields.tucss = css;
2822 context_desc->upper_setup.tcp_fields.tucso =
2823 css + skb->csum_offset;
2824 context_desc->upper_setup.tcp_fields.tucse = 0;
2825 context_desc->tcp_seg_setup.data = 0;
2826 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2827
3ed30676
DG
2828 buffer_info->time_stamp = jiffies;
2829 buffer_info->next_to_watch = i;
1da177e4 2830
3ed30676
DG
2831 if (unlikely(++i == tx_ring->count)) i = 0;
2832 tx_ring->next_to_use = i;
2833
2834 return true;
1da177e4
LT
2835}
2836
2837#define E1000_MAX_TXD_PWR 12
2838#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2839
64798845
JP
2840static int e1000_tx_map(struct e1000_adapter *adapter,
2841 struct e1000_tx_ring *tx_ring,
2842 struct sk_buff *skb, unsigned int first,
2843 unsigned int max_per_txd, unsigned int nr_frags,
2844 unsigned int mss)
1da177e4 2845{
1dc32918 2846 struct e1000_hw *hw = &adapter->hw;
602c0554 2847 struct pci_dev *pdev = adapter->pdev;
37e73df8 2848 struct e1000_buffer *buffer_info;
d20b606c 2849 unsigned int len = skb_headlen(skb);
602c0554 2850 unsigned int offset = 0, size, count = 0, i;
31c15a2f 2851 unsigned int f, bytecount, segs;
1da177e4
LT
2852
2853 i = tx_ring->next_to_use;
2854
96838a40 2855 while (len) {
37e73df8 2856 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2857 size = min(len, max_per_txd);
fd803241
JK
2858 /* Workaround for Controller erratum --
2859 * descriptor for non-tso packet in a linear SKB that follows a
2860 * tso gets written back prematurely before the data is fully
0f15a8fa 2861 * DMA'd to the controller */
fd803241 2862 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2863 !skb_is_gso(skb)) {
fd803241
JK
2864 tx_ring->last_tx_tso = 0;
2865 size -= 4;
2866 }
2867
1da177e4
LT
2868 /* Workaround for premature desc write-backs
2869 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2870 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2871 size -= 4;
97338bde
MC
2872 /* work-around for errata 10 and it applies
2873 * to all controllers in PCI-X mode
2874 * The fix is to make sure that the first descriptor of a
2875 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2876 */
1dc32918 2877 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC
2878 (size > 2015) && count == 0))
2879 size = 2015;
96838a40 2880
1da177e4
LT
2881 /* Workaround for potential 82544 hang in PCI-X. Avoid
2882 * terminating buffers within evenly-aligned dwords. */
96838a40 2883 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT
2884 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2885 size > 4))
2886 size -= 4;
2887
2888 buffer_info->length = size;
cdd7549e 2889 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2890 buffer_info->time_stamp = jiffies;
602c0554 2891 buffer_info->mapped_as_page = false;
b16f53be
NN
2892 buffer_info->dma = dma_map_single(&pdev->dev,
2893 skb->data + offset,
2894 size, DMA_TO_DEVICE);
2895 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2896 goto dma_error;
a9ebadd6 2897 buffer_info->next_to_watch = i;
1da177e4
LT
2898
2899 len -= size;
2900 offset += size;
2901 count++;
37e73df8
AD
2902 if (len) {
2903 i++;
2904 if (unlikely(i == tx_ring->count))
2905 i = 0;
2906 }
1da177e4
LT
2907 }
2908
96838a40 2909 for (f = 0; f < nr_frags; f++) {
1da177e4
LT
2910 struct skb_frag_struct *frag;
2911
2912 frag = &skb_shinfo(skb)->frags[f];
2913 len = frag->size;
877749bf 2914 offset = 0;
1da177e4 2915
96838a40 2916 while (len) {
877749bf 2917 unsigned long bufend;
37e73df8
AD
2918 i++;
2919 if (unlikely(i == tx_ring->count))
2920 i = 0;
2921
1da177e4
LT
2922 buffer_info = &tx_ring->buffer_info[i];
2923 size = min(len, max_per_txd);
1da177e4
LT
2924 /* Workaround for premature desc write-backs
2925 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2926 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 2927 size -= 4;
1da177e4
LT
2928 /* Workaround for potential 82544 hang in PCI-X.
2929 * Avoid terminating buffers within evenly-aligned
2930 * dwords. */
877749bf
IC
2931 bufend = (unsigned long)
2932 page_to_phys(skb_frag_page(frag));
2933 bufend += offset + size - 1;
96838a40 2934 if (unlikely(adapter->pcix_82544 &&
877749bf
IC
2935 !(bufend & 4) &&
2936 size > 4))
1da177e4
LT
2937 size -= 4;
2938
2939 buffer_info->length = size;
1da177e4 2940 buffer_info->time_stamp = jiffies;
602c0554 2941 buffer_info->mapped_as_page = true;
877749bf
IC
2942 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
2943 offset, size, DMA_TO_DEVICE);
b16f53be 2944 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2945 goto dma_error;
a9ebadd6 2946 buffer_info->next_to_watch = i;
1da177e4
LT
2947
2948 len -= size;
2949 offset += size;
2950 count++;
1da177e4
LT
2951 }
2952 }
2953
31c15a2f
DN
2954 segs = skb_shinfo(skb)->gso_segs ?: 1;
2955 /* multiply data chunks by size of headers */
2956 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
2957
1da177e4 2958 tx_ring->buffer_info[i].skb = skb;
31c15a2f
DN
2959 tx_ring->buffer_info[i].segs = segs;
2960 tx_ring->buffer_info[i].bytecount = bytecount;
1da177e4
LT
2961 tx_ring->buffer_info[first].next_to_watch = i;
2962
2963 return count;
602c0554
AD
2964
2965dma_error:
2966 dev_err(&pdev->dev, "TX DMA map failed\n");
2967 buffer_info->dma = 0;
c1fa347f 2968 if (count)
602c0554 2969 count--;
c1fa347f
RK
2970
2971 while (count--) {
2972 if (i==0)
602c0554 2973 i += tx_ring->count;
c1fa347f 2974 i--;
602c0554
AD
2975 buffer_info = &tx_ring->buffer_info[i];
2976 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2977 }
2978
2979 return 0;
1da177e4
LT
2980}
2981
64798845
JP
2982static void e1000_tx_queue(struct e1000_adapter *adapter,
2983 struct e1000_tx_ring *tx_ring, int tx_flags,
2984 int count)
1da177e4 2985{
1dc32918 2986 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
2987 struct e1000_tx_desc *tx_desc = NULL;
2988 struct e1000_buffer *buffer_info;
406874a7 2989 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT
2990 unsigned int i;
2991
96838a40 2992 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT
2993 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2994 E1000_TXD_CMD_TSE;
2d7edb92
MC
2995 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2996
96838a40 2997 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2998 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT
2999 }
3000
96838a40 3001 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT
3002 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3003 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3004 }
3005
96838a40 3006 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT
3007 txd_lower |= E1000_TXD_CMD_VLE;
3008 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3009 }
3010
3011 i = tx_ring->next_to_use;
3012
96838a40 3013 while (count--) {
1da177e4
LT
3014 buffer_info = &tx_ring->buffer_info[i];
3015 tx_desc = E1000_TX_DESC(*tx_ring, i);
3016 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3017 tx_desc->lower.data =
3018 cpu_to_le32(txd_lower | buffer_info->length);
3019 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3020 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT
3021 }
3022
3023 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3024
3025 /* Force memory writes to complete before letting h/w
3026 * know there are new descriptors to fetch. (Only
3027 * applicable for weak-ordered memory model archs,
3028 * such as IA-64). */
3029 wmb();
3030
3031 tx_ring->next_to_use = i;
1dc32918 3032 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB
3033 /* we need this if more than one processor can write to our tail
3034 * at a time, it syncronizes IO on IA64/Altix systems */
3035 mmiowb();
1da177e4
LT
3036}
3037
3038/**
3039 * 82547 workaround to avoid controller hang in half-duplex environment.
3040 * The workaround is to avoid queuing a large packet that would span
3041 * the internal Tx FIFO ring boundary by notifying the stack to resend
3042 * the packet at a later time. This gives the Tx FIFO an opportunity to
3043 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3044 * to the beginning of the Tx FIFO.
3045 **/
3046
3047#define E1000_FIFO_HDR 0x10
3048#define E1000_82547_PAD_LEN 0x3E0
3049
64798845
JP
3050static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3051 struct sk_buff *skb)
1da177e4 3052{
406874a7
JP
3053 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3054 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3055
9099cfb9 3056 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3057
96838a40 3058 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT
3059 goto no_fifo_stall_required;
3060
96838a40 3061 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT
3062 return 1;
3063
96838a40 3064 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT
3065 atomic_set(&adapter->tx_fifo_stall, 1);
3066 return 1;
3067 }
3068
3069no_fifo_stall_required:
3070 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3071 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT
3072 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3073 return 0;
3074}
3075
65c7973f
JB
3076static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3077{
3078 struct e1000_adapter *adapter = netdev_priv(netdev);
3079 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3080
3081 netif_stop_queue(netdev);
3082 /* Herbert's original patch had:
3083 * smp_mb__after_netif_stop_queue();
3084 * but since that doesn't exist yet, just open code it. */
3085 smp_mb();
3086
3087 /* We need to check again in a case another CPU has just
3088 * made room available. */
3089 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3090 return -EBUSY;
3091
3092 /* A reprieve! */
3093 netif_start_queue(netdev);
fcfb1224 3094 ++adapter->restart_queue;
65c7973f
JB
3095 return 0;
3096}
3097
3098static int e1000_maybe_stop_tx(struct net_device *netdev,
3099 struct e1000_tx_ring *tx_ring, int size)
3100{
3101 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3102 return 0;
3103 return __e1000_maybe_stop_tx(netdev, size);
3104}
3105
1da177e4 3106#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH
3107static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
3108 struct net_device *netdev)
1da177e4 3109{
60490fe0 3110 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3111 struct e1000_hw *hw = &adapter->hw;
581d708e 3112 struct e1000_tx_ring *tx_ring;
1da177e4
LT
3113 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3114 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3115 unsigned int tx_flags = 0;
e743d313 3116 unsigned int len = skb_headlen(skb);
6d1e3aa7
KK
3117 unsigned int nr_frags;
3118 unsigned int mss;
1da177e4 3119 int count = 0;
76c224bc 3120 int tso;
1da177e4 3121 unsigned int f;
1da177e4 3122
65c7973f
JB
3123 /* This goes back to the question of how to logically map a tx queue
3124 * to a flow. Right now, performance is impacted slightly negatively
3125 * if using multiple tx queues. If the stack breaks away from a
3126 * single qdisc implementation, we can look at this again. */
581d708e 3127 tx_ring = adapter->tx_ring;
24025e4e 3128
581d708e 3129 if (unlikely(skb->len <= 0)) {
1da177e4
LT
3130 dev_kfree_skb_any(skb);
3131 return NETDEV_TX_OK;
3132 }
3133
7967168c 3134 mss = skb_shinfo(skb)->gso_size;
76c224bc 3135 /* The controller does a simple calculation to
1da177e4
LT
3136 * make sure there is enough room in the FIFO before
3137 * initiating the DMA for each buffer. The calc is:
3138 * 4 = ceil(buffer len/mss). To make sure we don't
3139 * overrun the FIFO, adjust the max buffer len if mss
3140 * drops. */
96838a40 3141 if (mss) {
406874a7 3142 u8 hdr_len;
1da177e4
LT
3143 max_per_txd = min(mss << 2, max_per_txd);
3144 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3145
ab6a5bb6 3146 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3147 if (skb->data_len && hdr_len == len) {
1dc32918 3148 switch (hw->mac_type) {
9f687888 3149 unsigned int pull_size;
683a2aa3
HX
3150 case e1000_82544:
3151 /* Make sure we have room to chop off 4 bytes,
3152 * and that the end alignment will work out to
3153 * this hardware's requirements
3154 * NOTE: this is a TSO only workaround
3155 * if end byte alignment not correct move us
3156 * into the next dword */
27a884dc 3157 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX
3158 break;
3159 /* fall through */
9f687888
JK
3160 pull_size = min((unsigned int)4, skb->data_len);
3161 if (!__pskb_pull_tail(skb, pull_size)) {
feb8f478
ET
3162 e_err(drv, "__pskb_pull_tail "
3163 "failed.\n");
9f687888 3164 dev_kfree_skb_any(skb);
749dfc70 3165 return NETDEV_TX_OK;
9f687888 3166 }
e743d313 3167 len = skb_headlen(skb);
9f687888
JK
3168 break;
3169 default:
3170 /* do nothing */
3171 break;
d74bbd3b 3172 }
9a3056da 3173 }
1da177e4
LT
3174 }
3175
9a3056da 3176 /* reserve a descriptor for the offload context */
84fa7933 3177 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3178 count++;
2648345f 3179 count++;
fd803241 3180
fd803241 3181 /* Controller Erratum workaround */
89114afd 3182 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3183 count++;
fd803241 3184
1da177e4
LT
3185 count += TXD_USE_COUNT(len, max_txd_pwr);
3186
96838a40 3187 if (adapter->pcix_82544)
1da177e4
LT
3188 count++;
3189
96838a40 3190 /* work-around for errata 10 and it applies to all controllers
97338bde
MC
3191 * in PCI-X mode, so add one more descriptor to the count
3192 */
1dc32918 3193 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC
3194 (len > 2015)))
3195 count++;
3196
1da177e4 3197 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3198 for (f = 0; f < nr_frags; f++)
1da177e4
LT
3199 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3200 max_txd_pwr);
96838a40 3201 if (adapter->pcix_82544)
1da177e4
LT
3202 count += nr_frags;
3203
1da177e4
LT
3204 /* need: count + 2 desc gap to keep tail from touching
3205 * head, otherwise try next time */
8017943e 3206 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3207 return NETDEV_TX_BUSY;
1da177e4 3208
1dc32918 3209 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3210 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3211 netif_stop_queue(netdev);
baa34745
JB
3212 if (!test_bit(__E1000_DOWN, &adapter->flags))
3213 mod_timer(&adapter->tx_fifo_stall_timer,
3214 jiffies + 1);
1da177e4
LT
3215 return NETDEV_TX_BUSY;
3216 }
3217 }
3218
5622e404 3219 if (vlan_tx_tag_present(skb)) {
1da177e4
LT
3220 tx_flags |= E1000_TX_FLAGS_VLAN;
3221 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3222 }
3223
581d708e 3224 first = tx_ring->next_to_use;
96838a40 3225
581d708e 3226 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT
3227 if (tso < 0) {
3228 dev_kfree_skb_any(skb);
3229 return NETDEV_TX_OK;
3230 }
3231
fd803241 3232 if (likely(tso)) {
8fce4731
JB
3233 if (likely(hw->mac_type != e1000_82544))
3234 tx_ring->last_tx_tso = 1;
1da177e4 3235 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3236 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT
3237 tx_flags |= E1000_TX_FLAGS_CSUM;
3238
60828236 3239 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC
3240 tx_flags |= E1000_TX_FLAGS_IPV4;
3241
37e73df8
AD
3242 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
3243 nr_frags, mss);
1da177e4 3244
37e73df8
AD
3245 if (count) {
3246 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD
3247 /* Make sure there is space in the ring for the next send. */
3248 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3249
37e73df8
AD
3250 } else {
3251 dev_kfree_skb_any(skb);
3252 tx_ring->buffer_info[first].time_stamp = 0;
3253 tx_ring->next_to_use = first;
3254 }
1da177e4 3255
1da177e4
LT
3256 return NETDEV_TX_OK;
3257}
3258
3259/**
3260 * e1000_tx_timeout - Respond to a Tx Hang
3261 * @netdev: network interface device structure
3262 **/
3263
64798845 3264static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3265{
60490fe0 3266 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
3267
3268 /* Do the reset outside of interrupt context */
87041639
JK
3269 adapter->tx_timeout_count++;
3270 schedule_work(&adapter->reset_task);
1da177e4
LT
3271}
3272
64798845 3273static void e1000_reset_task(struct work_struct *work)
1da177e4 3274{
65f27f38
DH
3275 struct e1000_adapter *adapter =
3276 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3277
338c15e4 3278 e1000_reinit_safe(adapter);
1da177e4
LT
3279}
3280
3281/**
3282 * e1000_get_stats - Get System Network Statistics
3283 * @netdev: network interface device structure
3284 *
3285 * Returns the address of the device statistics structure.
3286 * The statistics are actually updated from the timer callback.
3287 **/
3288
64798845 3289static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3290{
6b7660cd 3291 /* only return the current stats */
5fe31def 3292 return &netdev->stats;
1da177e4
LT
3293}
3294
3295/**
3296 * e1000_change_mtu - Change the Maximum Transfer Unit
3297 * @netdev: network interface device structure
3298 * @new_mtu: new value for maximum frame size
3299 *
3300 * Returns 0 on success, negative on failure
3301 **/
3302
64798845 3303static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3304{
60490fe0 3305 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3306 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
3307 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3308
96838a40
JB
3309 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3310 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
feb8f478 3311 e_err(probe, "Invalid MTU setting\n");
1da177e4 3312 return -EINVAL;
2d7edb92 3313 }
1da177e4 3314
997f5cbd 3315 /* Adapter-specific max frame size limits. */
1dc32918 3316 switch (hw->mac_type) {
9e2feace 3317 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3318 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
feb8f478 3319 e_err(probe, "Jumbo Frames not supported.\n");
2d7edb92 3320 return -EINVAL;
2d7edb92 3321 }
997f5cbd 3322 break;
997f5cbd
JK
3323 default:
3324 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3325 break;
1da177e4
LT
3326 }
3327
3d6114e7
JB
3328 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3329 msleep(1);
3330 /* e1000_down has a dependency on max_frame_size */
3331 hw->max_frame_size = max_frame;
3332 if (netif_running(netdev))
3333 e1000_down(adapter);
3334
87f5032e 3335 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3336 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB
3337 * larger slab size.
3338 * i.e. RXBUFFER_2048 --> size-4096 slab
3339 * however with the new *_jumbo_rx* routines, jumbo receives will use
3340 * fragmented skbs */
9e2feace 3341
9926146b 3342 if (max_frame <= E1000_RXBUFFER_2048)
9e2feace 3343 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB
3344 else
3345#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3346 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB
3347#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3348 adapter->rx_buffer_len = PAGE_SIZE;
3349#endif
9e2feace
AK
3350
3351 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3352 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3353 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK
3354 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3355 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3356
675ad473
ET
3357 pr_info("%s changing MTU from %d to %d\n",
3358 netdev->name, netdev->mtu, new_mtu);
2d7edb92
MC
3359 netdev->mtu = new_mtu;
3360
2db10a08 3361 if (netif_running(netdev))
3d6114e7
JB
3362 e1000_up(adapter);
3363 else
3364 e1000_reset(adapter);
3365
3366 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3367
1da177e4
LT
3368 return 0;
3369}
3370
3371/**
3372 * e1000_update_stats - Update the board statistics counters
3373 * @adapter: board private structure
3374 **/
3375
64798845 3376void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3377{
5fe31def 3378 struct net_device *netdev = adapter->netdev;
1da177e4 3379 struct e1000_hw *hw = &adapter->hw;
282f33c9 3380 struct pci_dev *pdev = adapter->pdev;
1da177e4 3381 unsigned long flags;
406874a7 3382 u16 phy_tmp;
1da177e4
LT
3383
3384#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3385
282f33c9
LV
3386 /*
3387 * Prevent stats update while adapter is being reset, or if the pci
3388 * connection is down.
3389 */
9026729b 3390 if (adapter->link_speed == 0)
282f33c9 3391 return;
81b1955e 3392 if (pci_channel_offline(pdev))
9026729b
AK
3393 return;
3394
1da177e4
LT
3395 spin_lock_irqsave(&adapter->stats_lock, flags);
3396
828d055f 3397 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT
3398 * called from the interrupt context, so they must only
3399 * be written while holding adapter->stats_lock
3400 */
3401
1dc32918
JP
3402 adapter->stats.crcerrs += er32(CRCERRS);
3403 adapter->stats.gprc += er32(GPRC);
3404 adapter->stats.gorcl += er32(GORCL);
3405 adapter->stats.gorch += er32(GORCH);
3406 adapter->stats.bprc += er32(BPRC);
3407 adapter->stats.mprc += er32(MPRC);
3408 adapter->stats.roc += er32(ROC);
3409
1532ecea
JB
3410 adapter->stats.prc64 += er32(PRC64);
3411 adapter->stats.prc127 += er32(PRC127);
3412 adapter->stats.prc255 += er32(PRC255);
3413 adapter->stats.prc511 += er32(PRC511);
3414 adapter->stats.prc1023 += er32(PRC1023);
3415 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP
3416
3417 adapter->stats.symerrs += er32(SYMERRS);
3418 adapter->stats.mpc += er32(MPC);
3419 adapter->stats.scc += er32(SCC);
3420 adapter->stats.ecol += er32(ECOL);
3421 adapter->stats.mcc += er32(MCC);
3422 adapter->stats.latecol += er32(LATECOL);
3423 adapter->stats.dc += er32(DC);
3424 adapter->stats.sec += er32(SEC);
3425 adapter->stats.rlec += er32(RLEC);
3426 adapter->stats.xonrxc += er32(XONRXC);
3427 adapter->stats.xontxc += er32(XONTXC);
3428 adapter->stats.xoffrxc += er32(XOFFRXC);
3429 adapter->stats.xofftxc += er32(XOFFTXC);
3430 adapter->stats.fcruc += er32(FCRUC);
3431 adapter->stats.gptc += er32(GPTC);
3432 adapter->stats.gotcl += er32(GOTCL);
3433 adapter->stats.gotch += er32(GOTCH);
3434 adapter->stats.rnbc += er32(RNBC);
3435 adapter->stats.ruc += er32(RUC);
3436 adapter->stats.rfc += er32(RFC);
3437 adapter->stats.rjc += er32(RJC);
3438 adapter->stats.torl += er32(TORL);
3439 adapter->stats.torh += er32(TORH);
3440 adapter->stats.totl += er32(TOTL);
3441 adapter->stats.toth += er32(TOTH);
3442 adapter->stats.tpr += er32(TPR);
3443
1532ecea
JB
3444 adapter->stats.ptc64 += er32(PTC64);
3445 adapter->stats.ptc127 += er32(PTC127);
3446 adapter->stats.ptc255 += er32(PTC255);
3447 adapter->stats.ptc511 += er32(PTC511);
3448 adapter->stats.ptc1023 += er32(PTC1023);
3449 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP
3450
3451 adapter->stats.mptc += er32(MPTC);
3452 adapter->stats.bptc += er32(BPTC);
1da177e4
LT
3453
3454 /* used for adaptive IFS */
3455
1dc32918 3456 hw->tx_packet_delta = er32(TPT);
1da177e4 3457 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3458 hw->collision_delta = er32(COLC);
1da177e4
LT
3459 adapter->stats.colc += hw->collision_delta;
3460
96838a40 3461 if (hw->mac_type >= e1000_82543) {
1dc32918
JP
3462 adapter->stats.algnerrc += er32(ALGNERRC);
3463 adapter->stats.rxerrc += er32(RXERRC);
3464 adapter->stats.tncrs += er32(TNCRS);
3465 adapter->stats.cexterr += er32(CEXTERR);
3466 adapter->stats.tsctc += er32(TSCTC);
3467 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT
3468 }
3469
3470 /* Fill out the OS statistics structure */
5fe31def
AK
3471 netdev->stats.multicast = adapter->stats.mprc;
3472 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT
3473
3474 /* Rx Errors */
3475
87041639
JK
3476 /* RLEC on some newer hardware can be incorrect so build
3477 * our own version based on RUC and ROC */
5fe31def 3478 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3479 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK
3480 adapter->stats.ruc + adapter->stats.roc +
3481 adapter->stats.cexterr;
49559854 3482 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK
3483 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3484 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3485 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3486 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT
3487
3488 /* Tx Errors */
49559854 3489 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK
3490 netdev->stats.tx_errors = adapter->stats.txerrc;
3491 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3492 netdev->stats.tx_window_errors = adapter->stats.latecol;
3493 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3494 if (hw->bad_tx_carr_stats_fd &&
167fb284 3495 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3496 netdev->stats.tx_carrier_errors = 0;
167fb284
JG
3497 adapter->stats.tncrs = 0;
3498 }
1da177e4
LT
3499
3500 /* Tx Dropped needs to be maintained elsewhere */
3501
3502 /* Phy Stats */
96838a40
JB
3503 if (hw->media_type == e1000_media_type_copper) {
3504 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT
3505 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3506 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3507 adapter->phy_stats.idle_errors += phy_tmp;
3508 }
3509
96838a40 3510 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT
3511 (hw->phy_type == e1000_phy_m88) &&
3512 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3513 adapter->phy_stats.receive_errors += phy_tmp;
3514 }
3515
15e376b4 3516 /* Management Stats */
1dc32918
JP
3517 if (hw->has_smbus) {
3518 adapter->stats.mgptc += er32(MGTPTC);
3519 adapter->stats.mgprc += er32(MGTPRC);
3520 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG
3521 }
3522
1da177e4
LT
3523 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3524}
9ac98284 3525
1da177e4
LT
3526/**
3527 * e1000_intr - Interrupt Handler
3528 * @irq: interrupt number
3529 * @data: pointer to a network interface device structure
1da177e4
LT
3530 **/
3531
64798845 3532static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT
3533{
3534 struct net_device *netdev = data;
60490fe0 3535 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3536 struct e1000_hw *hw = &adapter->hw;
1532ecea 3537 u32 icr = er32(ICR);
c3570acb 3538
4c11b8ad 3539 if (unlikely((!icr)))
835bb129
JB
3540 return IRQ_NONE; /* Not our interrupt */
3541
4c11b8ad
JB
3542 /*
3543 * we might have caused the interrupt, but the above
3544 * read cleared it, and just in case the driver is
3545 * down there is nothing to do so return handled
3546 */
3547 if (unlikely(test_bit(__E1000_DOWN, &adapter->flags)))
3548 return IRQ_HANDLED;
3549
96838a40 3550 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3551 hw->get_link_status = 1;
1314bbf3
AK
3552 /* guard against interrupt when we're going down */
3553 if (!test_bit(__E1000_DOWN, &adapter->flags))
3554 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT
3555 }
3556
1532ecea
JB
3557 /* disable interrupts, without the synchronize_irq bit */
3558 ew32(IMC, ~0);
3559 E1000_WRITE_FLUSH();
3560
288379f0 3561 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB
3562 adapter->total_tx_bytes = 0;
3563 adapter->total_tx_packets = 0;
3564 adapter->total_rx_bytes = 0;
3565 adapter->total_rx_packets = 0;
288379f0 3566 __napi_schedule(&adapter->napi);
a6c42322 3567 } else {
90fb5135
AK
3568 /* this really should not happen! if it does it is basically a
3569 * bug, but not a hard error, so enable ints and continue */
a6c42322
JB
3570 if (!test_bit(__E1000_DOWN, &adapter->flags))
3571 e1000_irq_enable(adapter);
3572 }
1da177e4 3573
1da177e4
LT
3574 return IRQ_HANDLED;
3575}
3576
1da177e4
LT
3577/**
3578 * e1000_clean - NAPI Rx polling callback
3579 * @adapter: board private structure
3580 **/
64798845 3581static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3582{
bea3348e 3583 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
650b5a5c 3584 int tx_clean_complete = 0, work_done = 0;
581d708e 3585
650b5a5c 3586 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3587
650b5a5c 3588 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3589
650b5a5c 3590 if (!tx_clean_complete)
d2c7ddd6
DM
3591 work_done = budget;
3592
53e52c72
DM
3593 /* If budget not fully consumed, exit the polling mode */
3594 if (work_done < budget) {
835bb129
JB
3595 if (likely(adapter->itr_setting & 3))
3596 e1000_set_itr(adapter);
288379f0 3597 napi_complete(napi);
a6c42322
JB
3598 if (!test_bit(__E1000_DOWN, &adapter->flags))
3599 e1000_irq_enable(adapter);
1da177e4
LT
3600 }
3601
bea3348e 3602 return work_done;
1da177e4
LT
3603}
3604
1da177e4
LT
3605/**
3606 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3607 * @adapter: board private structure
3608 **/
64798845
JP
3609static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3610 struct e1000_tx_ring *tx_ring)
1da177e4 3611{
1dc32918 3612 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
3613 struct net_device *netdev = adapter->netdev;
3614 struct e1000_tx_desc *tx_desc, *eop_desc;
3615 struct e1000_buffer *buffer_info;
3616 unsigned int i, eop;
2a1af5d7 3617 unsigned int count = 0;
835bb129 3618 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT
3619
3620 i = tx_ring->next_to_clean;
3621 eop = tx_ring->buffer_info[i].next_to_watch;
3622 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3623
ccfb342c
AD
3624 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3625 (count < tx_ring->count)) {
843f4267 3626 bool cleaned = false;
2d0bb1c1 3627 rmb(); /* read buffer_info after eop_desc */
843f4267 3628 for ( ; !cleaned; count++) {
1da177e4
LT
3629 tx_desc = E1000_TX_DESC(*tx_ring, i);
3630 buffer_info = &tx_ring->buffer_info[i];
3631 cleaned = (i == eop);
3632
835bb129 3633 if (cleaned) {
31c15a2f
DN
3634 total_tx_packets += buffer_info->segs;
3635 total_tx_bytes += buffer_info->bytecount;
835bb129 3636 }
fd803241 3637 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3638 tx_desc->upper.data = 0;
1da177e4 3639
96838a40 3640 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3641 }
581d708e 3642
1da177e4
LT
3643 eop = tx_ring->buffer_info[i].next_to_watch;
3644 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3645 }
3646
3647 tx_ring->next_to_clean = i;
3648
77b2aad5 3649#define TX_WAKE_THRESHOLD 32
843f4267 3650 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB
3651 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3652 /* Make sure that anybody stopping the queue after this
3653 * sees the new next_to_clean.
3654 */
3655 smp_mb();
cdd7549e
JB
3656
3657 if (netif_queue_stopped(netdev) &&
3658 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3659 netif_wake_queue(netdev);
fcfb1224
JB
3660 ++adapter->restart_queue;
3661 }
77b2aad5 3662 }
2648345f 3663
581d708e 3664 if (adapter->detect_tx_hung) {
2648345f 3665 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3666 * check with the clearing of time_stamp and movement of i */
c3033b01 3667 adapter->detect_tx_hung = false;
cdd7549e
JB
3668 if (tx_ring->buffer_info[eop].time_stamp &&
3669 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
8e95a202
JP
3670 (adapter->tx_timeout_factor * HZ)) &&
3671 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC
3672
3673 /* detected Tx unit hang */
feb8f478 3674 e_err(drv, "Detected Tx Unit Hang\n"
675ad473
ET
3675 " Tx Queue <%lu>\n"
3676 " TDH <%x>\n"
3677 " TDT <%x>\n"
3678 " next_to_use <%x>\n"
3679 " next_to_clean <%x>\n"
3680 "buffer_info[next_to_clean]\n"
3681 " time_stamp <%lx>\n"
3682 " next_to_watch <%x>\n"
3683 " jiffies <%lx>\n"
3684 " next_to_watch.status <%x>\n",
7bfa4816
JK
3685 (unsigned long)((tx_ring - adapter->tx_ring) /
3686 sizeof(struct e1000_tx_ring)),
1dc32918
JP
3687 readl(hw->hw_addr + tx_ring->tdh),
3688 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3689 tx_ring->next_to_use,
392137fa 3690 tx_ring->next_to_clean,
cdd7549e 3691 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC
3692 eop,
3693 jiffies,
3694 eop_desc->upper.fields.status);
1da177e4 3695 netif_stop_queue(netdev);
70b8f1e1 3696 }
1da177e4 3697 }
835bb129
JB
3698 adapter->total_tx_bytes += total_tx_bytes;
3699 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK
3700 netdev->stats.tx_bytes += total_tx_bytes;
3701 netdev->stats.tx_packets += total_tx_packets;
807540ba 3702 return count < tx_ring->count;
1da177e4
LT
3703}
3704
3705/**
3706 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC
3707 * @adapter: board private structure
3708 * @status_err: receive descriptor status and error fields
3709 * @csum: receive descriptor csum field
3710 * @sk_buff: socket buffer with received data
1da177e4
LT
3711 **/
3712
64798845
JP
3713static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3714 u32 csum, struct sk_buff *skb)
1da177e4 3715{
1dc32918 3716 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
3717 u16 status = (u16)status_err;
3718 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED
3719
3720 skb_checksum_none_assert(skb);
2d7edb92 3721
1da177e4 3722 /* 82543 or newer only */
1dc32918 3723 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3724 /* Ignore Checksum bit is set */
96838a40 3725 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3726 /* TCP/UDP checksum error bit is set */
96838a40 3727 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3728 /* let the stack verify checksum errors */
1da177e4 3729 adapter->hw_csum_err++;
2d7edb92
MC
3730 return;
3731 }
3732 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB
3733 if (!(status & E1000_RXD_STAT_TCPCS))
3734 return;
3735
2d7edb92
MC
3736 /* It must be a TCP or UDP packet with a valid checksum */
3737 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT
3738 /* TCP checksum is good */
3739 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3740 }
2d7edb92 3741 adapter->hw_csum_good++;
1da177e4
LT
3742}
3743
edbbb3ca
JB
3744/**
3745 * e1000_consume_page - helper function
3746 **/
3747static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
3748 u16 length)
3749{
3750 bi->page = NULL;
3751 skb->len += length;
3752 skb->data_len += length;
3753 skb->truesize += length;
3754}
3755
3756/**
3757 * e1000_receive_skb - helper function to handle rx indications
3758 * @adapter: board private structure
3759 * @status: descriptor status field as written by hardware
3760 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3761 * @skb: pointer to sk_buff to be indicated to stack
3762 */
3763static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3764 __le16 vlan, struct sk_buff *skb)
3765{
6a08d194
JB
3766 skb->protocol = eth_type_trans(skb, adapter->netdev);
3767
5622e404
JP
3768 if (status & E1000_RXD_STAT_VP) {
3769 u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
3770
3771 __vlan_hwaccel_put_tag(skb, vid);
3772 }
3773 napi_gro_receive(&adapter->napi, skb);
edbbb3ca
JB
3774}
3775
3776/**
3777 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
3778 * @adapter: board private structure
3779 * @rx_ring: ring to clean
3780 * @work_done: amount of napi work completed this call
3781 * @work_to_do: max amount of work allowed for this call to do
3782 *
3783 * the return value indicates whether actual cleaning was done, there
3784 * is no guarantee that everything was cleaned
3785 */
3786static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
3787 struct e1000_rx_ring *rx_ring,
3788 int *work_done, int work_to_do)
3789{
3790 struct e1000_hw *hw = &adapter->hw;
3791 struct net_device *netdev = adapter->netdev;
3792 struct pci_dev *pdev = adapter->pdev;
3793 struct e1000_rx_desc *rx_desc, *next_rxd;
3794 struct e1000_buffer *buffer_info, *next_buffer;
3795 unsigned long irq_flags;
3796 u32 length;
3797 unsigned int i;
3798 int cleaned_count = 0;
3799 bool cleaned = false;
3800 unsigned int total_rx_bytes=0, total_rx_packets=0;
3801
3802 i = rx_ring->next_to_clean;
3803 rx_desc = E1000_RX_DESC(*rx_ring, i);
3804 buffer_info = &rx_ring->buffer_info[i];
3805
3806 while (rx_desc->status & E1000_RXD_STAT_DD) {
3807 struct sk_buff *skb;
3808 u8 status;
3809
3810 if (*work_done >= work_to_do)
3811 break;
3812 (*work_done)++;
2d0bb1c1 3813 rmb(); /* read descriptor and rx_buffer_info after status DD */
edbbb3ca
JB
3814
3815 status = rx_desc->status;
3816 skb = buffer_info->skb;
3817 buffer_info->skb = NULL;
3818
3819 if (++i == rx_ring->count) i = 0;
3820 next_rxd = E1000_RX_DESC(*rx_ring, i);
3821 prefetch(next_rxd);
3822
3823 next_buffer = &rx_ring->buffer_info[i];
3824
3825 cleaned = true;
3826 cleaned_count++;
b16f53be
NN
3827 dma_unmap_page(&pdev->dev, buffer_info->dma,
3828 buffer_info->length, DMA_FROM_DEVICE);
edbbb3ca
JB
3829 buffer_info->dma = 0;
3830
3831 length = le16_to_cpu(rx_desc->length);
3832
3833 /* errors is only valid for DD + EOP descriptors */
3834 if (unlikely((status & E1000_RXD_STAT_EOP) &&
3835 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
3836 u8 last_byte = *(skb->data + length - 1);
3837 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3838 last_byte)) {
3839 spin_lock_irqsave(&adapter->stats_lock,
3840 irq_flags);
3841 e1000_tbi_adjust_stats(hw, &adapter->stats,
3842 length, skb->data);
3843 spin_unlock_irqrestore(&adapter->stats_lock,
3844 irq_flags);
3845 length--;
3846 } else {
3847 /* recycle both page and skb */
3848 buffer_info->skb = skb;
3849 /* an error means any chain goes out the window
3850 * too */
3851 if (rx_ring->rx_skb_top)
3852 dev_kfree_skb(rx_ring->rx_skb_top);
3853 rx_ring->rx_skb_top = NULL;
3854 goto next_desc;
3855 }
3856 }
3857
3858#define rxtop rx_ring->rx_skb_top
3859 if (!(status & E1000_RXD_STAT_EOP)) {
3860 /* this descriptor is only the beginning (or middle) */
3861 if (!rxtop) {
3862 /* this is the beginning of a chain */
3863 rxtop = skb;
3864 skb_fill_page_desc(rxtop, 0, buffer_info->page,
3865 0, length);
3866 } else {
3867 /* this is the middle of a chain */
3868 skb_fill_page_desc(rxtop,
3869 skb_shinfo(rxtop)->nr_frags,
3870 buffer_info->page, 0, length);
3871 /* re-use the skb, only consumed the page */
3872 buffer_info->skb = skb;
3873 }
3874 e1000_consume_page(buffer_info, rxtop, length);
3875 goto next_desc;
3876 } else {
3877 if (rxtop) {
3878 /* end of the chain */
3879 skb_fill_page_desc(rxtop,
3880 skb_shinfo(rxtop)->nr_frags,
3881 buffer_info->page, 0, length);
3882 /* re-use the current skb, we only consumed the
3883 * page */
3884 buffer_info->skb = skb;
3885 skb = rxtop;
3886 rxtop = NULL;
3887 e1000_consume_page(buffer_info, skb, length);
3888 } else {
3889 /* no chain, got EOP, this buf is the packet
3890 * copybreak to save the put_page/alloc_page */
3891 if (length <= copybreak &&
3892 skb_tailroom(skb) >= length) {
3893 u8 *vaddr;
3894 vaddr = kmap_atomic(buffer_info->page,
3895 KM_SKB_DATA_SOFTIRQ);
3896 memcpy(skb_tail_pointer(skb), vaddr, length);
3897 kunmap_atomic(vaddr,
3898 KM_SKB_DATA_SOFTIRQ);
3899 /* re-use the page, so don't erase
3900 * buffer_info->page */
3901 skb_put(skb, length);
3902 } else {
3903 skb_fill_page_desc(skb, 0,
3904 buffer_info->page, 0,
3905 length);
3906 e1000_consume_page(buffer_info, skb,
3907 length);
3908 }
3909 }
3910 }
3911
3912 /* Receive Checksum Offload XXX recompute due to CRC strip? */
3913 e1000_rx_checksum(adapter,
3914 (u32)(status) |
3915 ((u32)(rx_desc->errors) << 24),
3916 le16_to_cpu(rx_desc->csum), skb);
3917
3918 pskb_trim(skb, skb->len - 4);
3919
3920 /* probably a little skewed due to removing CRC */
3921 total_rx_bytes += skb->len;
3922 total_rx_packets++;
3923
3924 /* eth type trans needs skb->data to point to something */
3925 if (!pskb_may_pull(skb, ETH_HLEN)) {
feb8f478 3926 e_err(drv, "pskb_may_pull failed.\n");
edbbb3ca
JB
3927 dev_kfree_skb(skb);
3928 goto next_desc;
3929 }
3930
edbbb3ca
JB
3931 e1000_receive_skb(adapter, status, rx_desc->special, skb);
3932
3933next_desc:
3934 rx_desc->status = 0;
3935
3936 /* return some buffers to hardware, one at a time is too slow */
3937 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3938 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3939 cleaned_count = 0;
3940 }
3941
3942 /* use prefetched values */
3943 rx_desc = next_rxd;
3944 buffer_info = next_buffer;
3945 }
3946 rx_ring->next_to_clean = i;
3947
3948 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3949 if (cleaned_count)
3950 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3951
3952 adapter->total_rx_packets += total_rx_packets;
3953 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK
3954 netdev->stats.rx_bytes += total_rx_bytes;
3955 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB
3956 return cleaned;
3957}
3958
57bf6eef
JP
3959/*
3960 * this should improve performance for small packets with large amounts
3961 * of reassembly being done in the stack
3962 */
3963static void e1000_check_copybreak(struct net_device *netdev,
3964 struct e1000_buffer *buffer_info,
3965 u32 length, struct sk_buff **skb)
3966{
3967 struct sk_buff *new_skb;
3968
3969 if (length > copybreak)
3970 return;
3971
3972 new_skb = netdev_alloc_skb_ip_align(netdev, length);
3973 if (!new_skb)
3974 return;
3975
3976 skb_copy_to_linear_data_offset(new_skb, -NET_IP_ALIGN,
3977 (*skb)->data - NET_IP_ALIGN,
3978 length + NET_IP_ALIGN);
3979 /* save the skb in buffer_info as good */
3980 buffer_info->skb = *skb;
3981 *skb = new_skb;
3982}
3983
1da177e4 3984/**
2d7edb92 3985 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 3986 * @adapter: board private structure
edbbb3ca
JB
3987 * @rx_ring: ring to clean
3988 * @work_done: amount of napi work completed this call
3989 * @work_to_do: max amount of work allowed for this call to do
3990 */
64798845
JP
3991static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3992 struct e1000_rx_ring *rx_ring,
3993 int *work_done, int work_to_do)
1da177e4 3994{
1dc32918 3995 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
3996 struct net_device *netdev = adapter->netdev;
3997 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB
3998 struct e1000_rx_desc *rx_desc, *next_rxd;
3999 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 4000 unsigned long flags;
406874a7 4001 u32 length;
1da177e4 4002 unsigned int i;
72d64a43 4003 int cleaned_count = 0;
c3033b01 4004 bool cleaned = false;
835bb129 4005 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT
4006
4007 i = rx_ring->next_to_clean;
4008 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4009 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4010
b92ff8ee 4011 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4012 struct sk_buff *skb;
a292ca6e 4013 u8 status;
90fb5135 4014
96838a40 4015 if (*work_done >= work_to_do)
1da177e4
LT
4016 break;
4017 (*work_done)++;
2d0bb1c1 4018 rmb(); /* read descriptor and rx_buffer_info after status DD */
c3570acb 4019
a292ca6e 4020 status = rx_desc->status;
b92ff8ee 4021 skb = buffer_info->skb;
86c3d59f
JB
4022 buffer_info->skb = NULL;
4023
30320be8
JK
4024 prefetch(skb->data - NET_IP_ALIGN);
4025
86c3d59f
JB
4026 if (++i == rx_ring->count) i = 0;
4027 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK
4028 prefetch(next_rxd);
4029
86c3d59f 4030 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4031
c3033b01 4032 cleaned = true;
72d64a43 4033 cleaned_count++;
b16f53be
NN
4034 dma_unmap_single(&pdev->dev, buffer_info->dma,
4035 buffer_info->length, DMA_FROM_DEVICE);
679be3ba 4036 buffer_info->dma = 0;
1da177e4 4037
1da177e4 4038 length = le16_to_cpu(rx_desc->length);
ea30e119 4039 /* !EOP means multiple descriptors were used to store a single
40a14dea
JB
4040 * packet, if thats the case we need to toss it. In fact, we
4041 * to toss every packet with the EOP bit clear and the next
4042 * frame that _does_ have the EOP bit set, as it is by
4043 * definition only a frame fragment
4044 */
4045 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
4046 adapter->discarding = true;
4047
4048 if (adapter->discarding) {
a1415ee6 4049 /* All receives must fit into a single buffer */
feb8f478 4050 e_dbg("Receive packet consumed multiple buffers\n");
864c4e45 4051 /* recycle */
8fc897b0 4052 buffer_info->skb = skb;
40a14dea
JB
4053 if (status & E1000_RXD_STAT_EOP)
4054 adapter->discarding = false;
1da177e4
LT
4055 goto next_desc;
4056 }
4057
96838a40 4058 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
edbbb3ca 4059 u8 last_byte = *(skb->data + length - 1);
1dc32918
JP
4060 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4061 last_byte)) {
1da177e4 4062 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4063 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT
4064 length, skb->data);
4065 spin_unlock_irqrestore(&adapter->stats_lock,
4066 flags);
4067 length--;
4068 } else {
9e2feace
AK
4069 /* recycle */
4070 buffer_info->skb = skb;
1da177e4
LT
4071 goto next_desc;
4072 }
1cb5821f 4073 }
1da177e4 4074
d2a1e213
JB
4075 /* adjust length to remove Ethernet CRC, this must be
4076 * done after the TBI_ACCEPT workaround above */
4077 length -= 4;
4078
835bb129
JB
4079 /* probably a little skewed due to removing CRC */
4080 total_rx_bytes += length;
4081 total_rx_packets++;
4082
57bf6eef
JP
4083 e1000_check_copybreak(netdev, buffer_info, length, &skb);
4084
996695de 4085 skb_put(skb, length);
1da177e4
LT
4086
4087 /* Receive Checksum Offload */
a292ca6e 4088 e1000_rx_checksum(adapter,
406874a7
JP
4089 (u32)(status) |
4090 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4091 le16_to_cpu(rx_desc->csum), skb);
96838a40 4092
edbbb3ca 4093 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 4094
1da177e4
LT
4095next_desc:
4096 rx_desc->status = 0;
1da177e4 4097
72d64a43
JK
4098 /* return some buffers to hardware, one at a time is too slow */
4099 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4100 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4101 cleaned_count = 0;
4102 }
4103
30320be8 4104 /* use prefetched values */
86c3d59f
JB
4105 rx_desc = next_rxd;
4106 buffer_info = next_buffer;
1da177e4 4107 }
1da177e4 4108 rx_ring->next_to_clean = i;
72d64a43
JK
4109
4110 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4111 if (cleaned_count)
4112 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4113
835bb129
JB
4114 adapter->total_rx_packets += total_rx_packets;
4115 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK
4116 netdev->stats.rx_bytes += total_rx_bytes;
4117 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC
4118 return cleaned;
4119}
4120
edbbb3ca
JB
4121/**
4122 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
4123 * @adapter: address of board private structure
4124 * @rx_ring: pointer to receive ring structure
4125 * @cleaned_count: number of buffers to allocate this pass
4126 **/
4127
4128static void
4129e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
4130 struct e1000_rx_ring *rx_ring, int cleaned_count)
4131{
4132 struct net_device *netdev = adapter->netdev;
4133 struct pci_dev *pdev = adapter->pdev;
4134 struct e1000_rx_desc *rx_desc;
4135 struct e1000_buffer *buffer_info;
4136 struct sk_buff *skb;
4137 unsigned int i;
89d71a66 4138 unsigned int bufsz = 256 - 16 /*for skb_reserve */ ;
edbbb3ca
JB
4139
4140 i = rx_ring->next_to_use;
4141 buffer_info = &rx_ring->buffer_info[i];
4142
4143 while (cleaned_count--) {
4144 skb = buffer_info->skb;
4145 if (skb) {
4146 skb_trim(skb, 0);
4147 goto check_page;
4148 }
4149
89d71a66 4150 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB
4151 if (unlikely(!skb)) {
4152 /* Better luck next round */
4153 adapter->alloc_rx_buff_failed++;
4154 break;
4155 }
4156
4157 /* Fix for errata 23, can't cross 64kB boundary */
4158 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4159 struct sk_buff *oldskb = skb;
feb8f478
ET
4160 e_err(rx_err, "skb align check failed: %u bytes at "
4161 "%p\n", bufsz, skb->data);
edbbb3ca 4162 /* Try again, without freeing the previous */
89d71a66 4163 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB
4164 /* Failed allocation, critical failure */
4165 if (!skb) {
4166 dev_kfree_skb(oldskb);
4167 adapter->alloc_rx_buff_failed++;
4168 break;
4169 }
4170
4171 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4172 /* give up */
4173 dev_kfree_skb(skb);
4174 dev_kfree_skb(oldskb);
4175 break; /* while (cleaned_count--) */
4176 }
4177
4178 /* Use new allocation */
4179 dev_kfree_skb(oldskb);
4180 }
edbbb3ca
JB
4181 buffer_info->skb = skb;
4182 buffer_info->length = adapter->rx_buffer_len;
4183check_page:
4184 /* allocate a new page if necessary */
4185 if (!buffer_info->page) {
4186 buffer_info->page = alloc_page(GFP_ATOMIC);
4187 if (unlikely(!buffer_info->page)) {
4188 adapter->alloc_rx_buff_failed++;
4189 break;
4190 }
4191 }
4192
b5abb028 4193 if (!buffer_info->dma) {
b16f53be 4194 buffer_info->dma = dma_map_page(&pdev->dev,
edbbb3ca 4195 buffer_info->page, 0,
b16f53be
NN
4196 buffer_info->length,
4197 DMA_FROM_DEVICE);
4198 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB
4199 put_page(buffer_info->page);
4200 dev_kfree_skb(skb);
4201 buffer_info->page = NULL;
4202 buffer_info->skb = NULL;
4203 buffer_info->dma = 0;
4204 adapter->alloc_rx_buff_failed++;
4205 break; /* while !buffer_info->skb */
4206 }
4207 }
edbbb3ca
JB
4208
4209 rx_desc = E1000_RX_DESC(*rx_ring, i);
4210 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4211
4212 if (unlikely(++i == rx_ring->count))
4213 i = 0;
4214 buffer_info = &rx_ring->buffer_info[i];
4215 }
4216
4217 if (likely(rx_ring->next_to_use != i)) {
4218 rx_ring->next_to_use = i;
4219 if (unlikely(i-- == 0))
4220 i = (rx_ring->count - 1);
4221
4222 /* Force memory writes to complete before letting h/w
4223 * know there are new descriptors to fetch. (Only
4224 * applicable for weak-ordered memory model archs,
4225 * such as IA-64). */
4226 wmb();
4227 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4228 }
4229}
4230
1da177e4 4231/**
2d7edb92 4232 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT
4233 * @adapter: address of board private structure
4234 **/
4235
64798845
JP
4236static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4237 struct e1000_rx_ring *rx_ring,
4238 int cleaned_count)
1da177e4 4239{
1dc32918 4240 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
4241 struct net_device *netdev = adapter->netdev;
4242 struct pci_dev *pdev = adapter->pdev;
4243 struct e1000_rx_desc *rx_desc;
4244 struct e1000_buffer *buffer_info;
4245 struct sk_buff *skb;
2648345f 4246 unsigned int i;
89d71a66 4247 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT
4248
4249 i = rx_ring->next_to_use;
4250 buffer_info = &rx_ring->buffer_info[i];
4251
a292ca6e 4252 while (cleaned_count--) {
ca6f7224
CH
4253 skb = buffer_info->skb;
4254 if (skb) {
a292ca6e
JK
4255 skb_trim(skb, 0);
4256 goto map_skb;
4257 }
4258
89d71a66 4259 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
96838a40 4260 if (unlikely(!skb)) {
1da177e4 4261 /* Better luck next round */
72d64a43 4262 adapter->alloc_rx_buff_failed++;
1da177e4
LT
4263 break;
4264 }
4265
2648345f 4266 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT
4267 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4268 struct sk_buff *oldskb = skb;
feb8f478
ET
4269 e_err(rx_err, "skb align check failed: %u bytes at "
4270 "%p\n", bufsz, skb->data);
2648345f 4271 /* Try again, without freeing the previous */
89d71a66 4272 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
2648345f 4273 /* Failed allocation, critical failure */
1da177e4
LT
4274 if (!skb) {
4275 dev_kfree_skb(oldskb);
edbbb3ca 4276 adapter->alloc_rx_buff_failed++;
1da177e4
LT
4277 break;
4278 }
2648345f 4279
1da177e4
LT
4280 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4281 /* give up */
4282 dev_kfree_skb(skb);
4283 dev_kfree_skb(oldskb);
edbbb3ca 4284 adapter->alloc_rx_buff_failed++;
1da177e4 4285 break; /* while !buffer_info->skb */
1da177e4 4286 }
ca6f7224
CH
4287
4288 /* Use new allocation */
4289 dev_kfree_skb(oldskb);
1da177e4 4290 }
1da177e4
LT
4291 buffer_info->skb = skb;
4292 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4293map_skb:
b16f53be 4294 buffer_info->dma = dma_map_single(&pdev->dev,
1da177e4 4295 skb->data,
edbbb3ca 4296 buffer_info->length,
b16f53be
NN
4297 DMA_FROM_DEVICE);
4298 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB
4299 dev_kfree_skb(skb);
4300 buffer_info->skb = NULL;
4301 buffer_info->dma = 0;
4302 adapter->alloc_rx_buff_failed++;
4303 break; /* while !buffer_info->skb */
4304 }
1da177e4 4305
edbbb3ca
JB
4306 /*
4307 * XXX if it was allocated cleanly it will never map to a
4308 * boundary crossing
4309 */
4310
2648345f
MC
4311 /* Fix for errata 23, can't cross 64kB boundary */
4312 if (!e1000_check_64k_bound(adapter,
4313 (void *)(unsigned long)buffer_info->dma,
4314 adapter->rx_buffer_len)) {
feb8f478
ET
4315 e_err(rx_err, "dma align check failed: %u bytes at "
4316 "%p\n", adapter->rx_buffer_len,
675ad473 4317 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT
4318 dev_kfree_skb(skb);
4319 buffer_info->skb = NULL;
4320
b16f53be 4321 dma_unmap_single(&pdev->dev, buffer_info->dma,
1da177e4 4322 adapter->rx_buffer_len,
b16f53be 4323 DMA_FROM_DEVICE);
679be3ba 4324 buffer_info->dma = 0;
1da177e4 4325
edbbb3ca 4326 adapter->alloc_rx_buff_failed++;
1da177e4
LT
4327 break; /* while !buffer_info->skb */
4328 }
1da177e4
LT
4329 rx_desc = E1000_RX_DESC(*rx_ring, i);
4330 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4331
96838a40
JB
4332 if (unlikely(++i == rx_ring->count))
4333 i = 0;
1da177e4
LT
4334 buffer_info = &rx_ring->buffer_info[i];
4335 }
4336
b92ff8ee
JB
4337 if (likely(rx_ring->next_to_use != i)) {
4338 rx_ring->next_to_use = i;
4339 if (unlikely(i-- == 0))
4340 i = (rx_ring->count - 1);
4341
4342 /* Force memory writes to complete before letting h/w
4343 * know there are new descriptors to fetch. (Only
4344 * applicable for weak-ordered memory model archs,
4345 * such as IA-64). */
4346 wmb();
1dc32918 4347 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4348 }
1da177e4
LT
4349}
4350
4351/**
4352 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4353 * @adapter:
4354 **/
4355
64798845 4356static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4357{
1dc32918 4358 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
4359 u16 phy_status;
4360 u16 phy_ctrl;
1da177e4 4361
1dc32918
JP
4362 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4363 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT
4364 return;
4365
96838a40 4366 if (adapter->smartspeed == 0) {
1da177e4
LT
4367 /* If Master/Slave config fault is asserted twice,
4368 * we assume back-to-back */
1dc32918 4369 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4370 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4371 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4372 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4373 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4374 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4375 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4376 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT
4377 phy_ctrl);
4378 adapter->smartspeed++;
1dc32918
JP
4379 if (!e1000_phy_setup_autoneg(hw) &&
4380 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT
4381 &phy_ctrl)) {
4382 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4383 MII_CR_RESTART_AUTO_NEG);
1dc32918 4384 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT
4385 phy_ctrl);
4386 }
4387 }
4388 return;
96838a40 4389 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4390 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4391 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4392 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP
4393 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4394 if (!e1000_phy_setup_autoneg(hw) &&
4395 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT
4396 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4397 MII_CR_RESTART_AUTO_NEG);
1dc32918 4398 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT
4399 }
4400 }
4401 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4402 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT
4403 adapter->smartspeed = 0;
4404}
4405
4406/**
4407 * e1000_ioctl -
4408 * @netdev:
4409 * @ifreq:
4410 * @cmd:
4411 **/
4412
64798845 4413static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT
4414{
4415 switch (cmd) {
4416 case SIOCGMIIPHY:
4417 case SIOCGMIIREG:
4418 case SIOCSMIIREG:
4419 return e1000_mii_ioctl(netdev, ifr, cmd);
4420 default:
4421 return -EOPNOTSUPP;
4422 }
4423}
4424
4425/**
4426 * e1000_mii_ioctl -
4427 * @netdev:
4428 * @ifreq:
4429 * @cmd:
4430 **/
4431
64798845
JP
4432static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4433 int cmd)
1da177e4 4434{
60490fe0 4435 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4436 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
4437 struct mii_ioctl_data *data = if_mii(ifr);
4438 int retval;
406874a7 4439 u16 mii_reg;
97876fc6 4440 unsigned long flags;
1da177e4 4441
1dc32918 4442 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT
4443 return -EOPNOTSUPP;
4444
4445 switch (cmd) {
4446 case SIOCGMIIPHY:
1dc32918 4447 data->phy_id = hw->phy_addr;
1da177e4
LT
4448 break;
4449 case SIOCGMIIREG:
97876fc6 4450 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4451 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC
4452 &data->val_out)) {
4453 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4454 return -EIO;
97876fc6
MC
4455 }
4456 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT
4457 break;
4458 case SIOCSMIIREG:
96838a40 4459 if (data->reg_num & ~(0x1F))
1da177e4
LT
4460 return -EFAULT;
4461 mii_reg = data->val_in;
97876fc6 4462 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4463 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC
4464 mii_reg)) {
4465 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4466 return -EIO;
97876fc6 4467 }
f0163ac4 4468 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4469 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT
4470 switch (data->reg_num) {
4471 case PHY_CTRL:
96838a40 4472 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4473 break;
96838a40 4474 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP
4475 hw->autoneg = 1;
4476 hw->autoneg_advertised = 0x2F;
1da177e4 4477 } else {
14ad2513 4478 u32 speed;
1da177e4 4479 if (mii_reg & 0x40)
14ad2513 4480 speed = SPEED_1000;
1da177e4 4481 else if (mii_reg & 0x2000)
14ad2513 4482 speed = SPEED_100;
1da177e4 4483 else
14ad2513
DD
4484 speed = SPEED_10;
4485 retval = e1000_set_spd_dplx(
4486 adapter, speed,
4487 ((mii_reg & 0x100)
4488 ? DUPLEX_FULL :
4489 DUPLEX_HALF));
f0163ac4 4490 if (retval)
1da177e4
LT
4491 return retval;
4492 }
2db10a08
AK
4493 if (netif_running(adapter->netdev))
4494 e1000_reinit_locked(adapter);
4495 else
1da177e4
LT
4496 e1000_reset(adapter);
4497 break;
4498 case M88E1000_PHY_SPEC_CTRL:
4499 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4500 if (e1000_phy_reset(hw))
1da177e4
LT
4501 return -EIO;
4502 break;
4503 }
4504 } else {
4505 switch (data->reg_num) {
4506 case PHY_CTRL:
96838a40 4507 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4508 break;
2db10a08
AK
4509 if (netif_running(adapter->netdev))
4510 e1000_reinit_locked(adapter);
4511 else
1da177e4
LT
4512 e1000_reset(adapter);
4513 break;
4514 }
4515 }
4516 break;
4517 default:
4518 return -EOPNOTSUPP;
4519 }
4520 return E1000_SUCCESS;
4521}
4522
64798845 4523void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT
4524{
4525 struct e1000_adapter *adapter = hw->back;
2648345f 4526 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4527
96838a40 4528 if (ret_val)
feb8f478 4529 e_err(probe, "Error in setting MWI\n");
1da177e4
LT
4530}
4531
64798845 4532void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT
4533{
4534 struct e1000_adapter *adapter = hw->back;
4535
4536 pci_clear_mwi(adapter->pdev);
4537}
4538
64798845 4539int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO
4540{
4541 struct e1000_adapter *adapter = hw->back;
4542 return pcix_get_mmrbc(adapter->pdev);
4543}
4544
64798845 4545void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO
4546{
4547 struct e1000_adapter *adapter = hw->back;
4548 pcix_set_mmrbc(adapter->pdev, mmrbc);
4549}
4550
64798845 4551void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT
4552{
4553 outl(value, port);
4554}
4555
5622e404
JP
4556static bool e1000_vlan_used(struct e1000_adapter *adapter)
4557{
4558 u16 vid;
4559
4560 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4561 return true;
4562 return false;
4563}
4564
4565static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
4566 bool filter_on)
1da177e4 4567{
1dc32918 4568 struct e1000_hw *hw = &adapter->hw;
5622e404 4569 u32 rctl;
1da177e4 4570
9150b76a
JB
4571 if (!test_bit(__E1000_DOWN, &adapter->flags))
4572 e1000_irq_disable(adapter);
1da177e4 4573
5622e404 4574 if (filter_on) {
1532ecea
JB
4575 /* enable VLAN receive filtering */
4576 rctl = er32(RCTL);
4577 rctl &= ~E1000_RCTL_CFIEN;
5622e404 4578 if (!(adapter->netdev->flags & IFF_PROMISC))
1532ecea
JB
4579 rctl |= E1000_RCTL_VFE;
4580 ew32(RCTL, rctl);
4581 e1000_update_mng_vlan(adapter);
1da177e4 4582 } else {
1532ecea
JB
4583 /* disable VLAN receive filtering */
4584 rctl = er32(RCTL);
4585 rctl &= ~E1000_RCTL_VFE;
4586 ew32(RCTL, rctl);
5622e404 4587 }
fd38d7a0 4588
5622e404
JP
4589 if (!test_bit(__E1000_DOWN, &adapter->flags))
4590 e1000_irq_enable(adapter);
4591}
4592
4593static void e1000_vlan_mode(struct net_device *netdev, u32 features)
4594{
4595 struct e1000_adapter *adapter = netdev_priv(netdev);
4596 struct e1000_hw *hw = &adapter->hw;
4597 u32 ctrl;
4598
4599 if (!test_bit(__E1000_DOWN, &adapter->flags))
4600 e1000_irq_disable(adapter);
4601
4602 ctrl = er32(CTRL);
4603 if (features & NETIF_F_HW_VLAN_RX) {
4604 /* enable VLAN tag insert/strip */
4605 ctrl |= E1000_CTRL_VME;
4606 } else {
4607 /* disable VLAN tag insert/strip */
4608 ctrl &= ~E1000_CTRL_VME;
1da177e4 4609 }
5622e404 4610 ew32(CTRL, ctrl);
1da177e4 4611
9150b76a
JB
4612 if (!test_bit(__E1000_DOWN, &adapter->flags))
4613 e1000_irq_enable(adapter);
1da177e4
LT
4614}
4615
64798845 4616static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4617{
60490fe0 4618 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4619 struct e1000_hw *hw = &adapter->hw;
406874a7 4620 u32 vfta, index;
96838a40 4621
1dc32918 4622 if ((hw->mng_cookie.status &
96838a40
JB
4623 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4624 (vid == adapter->mng_vlan_id))
2d7edb92 4625 return;
5622e404
JP
4626
4627 if (!e1000_vlan_used(adapter))
4628 e1000_vlan_filter_on_off(adapter, true);
4629
1da177e4
LT
4630 /* add VID to filter table */
4631 index = (vid >> 5) & 0x7F;
1dc32918 4632 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4633 vfta |= (1 << (vid & 0x1F));
1dc32918 4634 e1000_write_vfta(hw, index, vfta);
5622e404
JP
4635
4636 set_bit(vid, adapter->active_vlans);
1da177e4
LT
4637}
4638
64798845 4639static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4640{
60490fe0 4641 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4642 struct e1000_hw *hw = &adapter->hw;
406874a7 4643 u32 vfta, index;
1da177e4 4644
9150b76a
JB
4645 if (!test_bit(__E1000_DOWN, &adapter->flags))
4646 e1000_irq_disable(adapter);
9150b76a
JB
4647 if (!test_bit(__E1000_DOWN, &adapter->flags))
4648 e1000_irq_enable(adapter);
1da177e4
LT
4649
4650 /* remove VID from filter table */
4651 index = (vid >> 5) & 0x7F;
1dc32918 4652 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4653 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4654 e1000_write_vfta(hw, index, vfta);
5622e404
JP
4655
4656 clear_bit(vid, adapter->active_vlans);
4657
4658 if (!e1000_vlan_used(adapter))
4659 e1000_vlan_filter_on_off(adapter, false);
1da177e4
LT
4660}
4661
64798845 4662static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4 4663{
5622e404 4664 u16 vid;
1da177e4 4665
5622e404
JP
4666 if (!e1000_vlan_used(adapter))
4667 return;
4668
4669 e1000_vlan_filter_on_off(adapter, true);
4670 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4671 e1000_vlan_rx_add_vid(adapter->netdev, vid);
1da177e4
LT
4672}
4673
14ad2513 4674int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
1da177e4 4675{
1dc32918
JP
4676 struct e1000_hw *hw = &adapter->hw;
4677
4678 hw->autoneg = 0;
1da177e4 4679
14ad2513
DD
4680 /* Make sure dplx is at most 1 bit and lsb of speed is not set
4681 * for the switch() below to work */
4682 if ((spd & 1) || (dplx & ~1))
4683 goto err_inval;
4684
6921368f 4685 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4686 if ((hw->media_type == e1000_media_type_fiber) &&
14ad2513
DD
4687 spd != SPEED_1000 &&
4688 dplx != DUPLEX_FULL)
4689 goto err_inval;
6921368f 4690
14ad2513 4691 switch (spd + dplx) {
1da177e4 4692 case SPEED_10 + DUPLEX_HALF:
1dc32918 4693 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT
4694 break;
4695 case SPEED_10 + DUPLEX_FULL:
1dc32918 4696 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT
4697 break;
4698 case SPEED_100 + DUPLEX_HALF:
1dc32918 4699 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT
4700 break;
4701 case SPEED_100 + DUPLEX_FULL:
1dc32918 4702 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT
4703 break;
4704 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP
4705 hw->autoneg = 1;
4706 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT
4707 break;
4708 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4709 default:
14ad2513 4710 goto err_inval;
1da177e4
LT
4711 }
4712 return 0;
14ad2513
DD
4713
4714err_inval:
4715 e_err(probe, "Unsupported Speed/Duplex configuration\n");
4716 return -EINVAL;
1da177e4
LT
4717}
4718
b43fcd7d 4719static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT
4720{
4721 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4722 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4723 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
4724 u32 ctrl, ctrl_ext, rctl, status;
4725 u32 wufc = adapter->wol;
6fdfef16 4726#ifdef CONFIG_PM
240b1710 4727 int retval = 0;
6fdfef16 4728#endif
1da177e4
LT
4729
4730 netif_device_detach(netdev);
4731
2db10a08
AK
4732 if (netif_running(netdev)) {
4733 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4734 e1000_down(adapter);
2db10a08 4735 }
1da177e4 4736
2f82665f 4737#ifdef CONFIG_PM
1d33e9c6 4738 retval = pci_save_state(pdev);
2f82665f
JB
4739 if (retval)
4740 return retval;
4741#endif
4742
1dc32918 4743 status = er32(STATUS);
96838a40 4744 if (status & E1000_STATUS_LU)
1da177e4
LT
4745 wufc &= ~E1000_WUFC_LNKC;
4746
96838a40 4747 if (wufc) {
1da177e4 4748 e1000_setup_rctl(adapter);
db0ce50d 4749 e1000_set_rx_mode(netdev);
1da177e4
LT
4750
4751 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4752 if (wufc & E1000_WUFC_MC) {
1dc32918 4753 rctl = er32(RCTL);
1da177e4 4754 rctl |= E1000_RCTL_MPE;
1dc32918 4755 ew32(RCTL, rctl);
1da177e4
LT
4756 }
4757
1dc32918
JP
4758 if (hw->mac_type >= e1000_82540) {
4759 ctrl = er32(CTRL);
1da177e4
LT
4760 /* advertise wake from D3Cold */
4761 #define E1000_CTRL_ADVD3WUC 0x00100000
4762 /* phy power management enable */
4763 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4764 ctrl |= E1000_CTRL_ADVD3WUC |
4765 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4766 ew32(CTRL, ctrl);
1da177e4
LT
4767 }
4768
1dc32918 4769 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 4770 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4771 /* keep the laser running in D3 */
1dc32918 4772 ctrl_ext = er32(CTRL_EXT);
1da177e4 4773 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4774 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT
4775 }
4776
1dc32918
JP
4777 ew32(WUC, E1000_WUC_PME_EN);
4778 ew32(WUFC, wufc);
1da177e4 4779 } else {
1dc32918
JP
4780 ew32(WUC, 0);
4781 ew32(WUFC, 0);
1da177e4
LT
4782 }
4783
0fccd0e9
JG
4784 e1000_release_manageability(adapter);
4785
b43fcd7d
RW
4786 *enable_wake = !!wufc;
4787
0fccd0e9 4788 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW
4789 if (adapter->en_mng_pt)
4790 *enable_wake = true;
1da177e4 4791
edd106fc
AK
4792 if (netif_running(netdev))
4793 e1000_free_irq(adapter);
4794
1da177e4 4795 pci_disable_device(pdev);
240b1710 4796
1da177e4
LT
4797 return 0;
4798}
4799
2f82665f 4800#ifdef CONFIG_PM
b43fcd7d
RW
4801static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4802{
4803 int retval;
4804 bool wake;
4805
4806 retval = __e1000_shutdown(pdev, &wake);
4807 if (retval)
4808 return retval;
4809
4810 if (wake) {
4811 pci_prepare_to_sleep(pdev);
4812 } else {
4813 pci_wake_from_d3(pdev, false);
4814 pci_set_power_state(pdev, PCI_D3hot);
4815 }
4816
4817 return 0;
4818}
4819
64798845 4820static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT
4821{
4822 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4823 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4824 struct e1000_hw *hw = &adapter->hw;
406874a7 4825 u32 err;
1da177e4 4826
d0e027db 4827 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4828 pci_restore_state(pdev);
dbb5aaeb 4829 pci_save_state(pdev);
81250297
TI
4830
4831 if (adapter->need_ioport)
4832 err = pci_enable_device(pdev);
4833 else
4834 err = pci_enable_device_mem(pdev);
c7be73bc 4835 if (err) {
675ad473 4836 pr_err("Cannot enable PCI device from suspend\n");
3d1dd8cb
AK
4837 return err;
4838 }
a4cb847d 4839 pci_set_master(pdev);
1da177e4 4840
d0e027db
AK
4841 pci_enable_wake(pdev, PCI_D3hot, 0);
4842 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4843
c7be73bc
JP
4844 if (netif_running(netdev)) {
4845 err = e1000_request_irq(adapter);
4846 if (err)
4847 return err;
4848 }
edd106fc
AK
4849
4850 e1000_power_up_phy(adapter);
1da177e4 4851 e1000_reset(adapter);
1dc32918 4852 ew32(WUS, ~0);
1da177e4 4853
0fccd0e9
JG
4854 e1000_init_manageability(adapter);
4855
96838a40 4856 if (netif_running(netdev))
1da177e4
LT
4857 e1000_up(adapter);
4858
4859 netif_device_attach(netdev);
4860
1da177e4
LT
4861 return 0;
4862}
4863#endif
c653e635
AK
4864
4865static void e1000_shutdown(struct pci_dev *pdev)
4866{
b43fcd7d
RW
4867 bool wake;
4868
4869 __e1000_shutdown(pdev, &wake);
4870
4871 if (system_state == SYSTEM_POWER_OFF) {
4872 pci_wake_from_d3(pdev, wake);
4873 pci_set_power_state(pdev, PCI_D3hot);
4874 }
c653e635
AK
4875}
4876
1da177e4
LT
4877#ifdef CONFIG_NET_POLL_CONTROLLER
4878/*
4879 * Polling 'interrupt' - used by things like netconsole to send skbs
4880 * without having to re-enable interrupts. It's not called while
4881 * the interrupt routine is executing.
4882 */
64798845 4883static void e1000_netpoll(struct net_device *netdev)
1da177e4 4884{
60490fe0 4885 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4886
1da177e4 4887 disable_irq(adapter->pdev->irq);
7d12e780 4888 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT
4889 enable_irq(adapter->pdev->irq);
4890}
4891#endif
4892
9026729b
AK
4893/**
4894 * e1000_io_error_detected - called when PCI error is detected
4895 * @pdev: Pointer to PCI device
120a5d0d 4896 * @state: The current pci connection state
9026729b
AK
4897 *
4898 * This function is called after a PCI bus error affecting
4899 * this device has been detected.
4900 */
64798845
JP
4901static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4902 pci_channel_state_t state)
9026729b
AK
4903{
4904 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4905 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK
4906
4907 netif_device_detach(netdev);
4908
eab63302
AD
4909 if (state == pci_channel_io_perm_failure)
4910 return PCI_ERS_RESULT_DISCONNECT;
4911
9026729b
AK
4912 if (netif_running(netdev))
4913 e1000_down(adapter);
72e8d6bb 4914 pci_disable_device(pdev);
9026729b
AK
4915
4916 /* Request a slot slot reset. */
4917 return PCI_ERS_RESULT_NEED_RESET;
4918}
4919
4920/**
4921 * e1000_io_slot_reset - called after the pci bus has been reset.
4922 * @pdev: Pointer to PCI device
4923 *
4924 * Restart the card from scratch, as if from a cold-boot. Implementation
4925 * resembles the first-half of the e1000_resume routine.
4926 */
4927static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4928{
4929 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4930 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4931 struct e1000_hw *hw = &adapter->hw;
81250297 4932 int err;
9026729b 4933
81250297
TI
4934 if (adapter->need_ioport)
4935 err = pci_enable_device(pdev);
4936 else
4937 err = pci_enable_device_mem(pdev);
4938 if (err) {
675ad473 4939 pr_err("Cannot re-enable PCI device after reset.\n");
9026729b
AK
4940 return PCI_ERS_RESULT_DISCONNECT;
4941 }
4942 pci_set_master(pdev);
4943
dbf38c94
LV
4944 pci_enable_wake(pdev, PCI_D3hot, 0);
4945 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4946
9026729b 4947 e1000_reset(adapter);
1dc32918 4948 ew32(WUS, ~0);
9026729b
AK
4949
4950 return PCI_ERS_RESULT_RECOVERED;
4951}
4952
4953/**
4954 * e1000_io_resume - called when traffic can start flowing again.
4955 * @pdev: Pointer to PCI device
4956 *
4957 * This callback is called when the error recovery driver tells us that
4958 * its OK to resume normal operation. Implementation resembles the
4959 * second-half of the e1000_resume routine.
4960 */
4961static void e1000_io_resume(struct pci_dev *pdev)
4962{
4963 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4964 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG
4965
4966 e1000_init_manageability(adapter);
9026729b
AK
4967
4968 if (netif_running(netdev)) {
4969 if (e1000_up(adapter)) {
675ad473 4970 pr_info("can't bring device back up after reset\n");
9026729b
AK
4971 return;
4972 }
4973 }
4974
4975 netif_device_attach(netdev);
9026729b
AK
4976}
4977
1da177e4 4978/* e1000_main.c */