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igb: add 88E1543 initialization code
[linux-2.6-block.git] / drivers / net / ethernet / intel / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
5377a416 31#include <linux/io.h>
70c71606 32#include <linux/prefetch.h>
5622e404
JP		 33#include <linux/bitops.h>
34#include <linux/if_vlan.h>
5377a416 35
1da177e4 36char e1000_driver_name[] = "e1000";
3ad2cc67 37static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
ab08853f 38#define DRV_VERSION "7.3.21-k8-NAPI"
abec42a4
SH		 39const char e1000_driver_version[] = DRV_VERSION;
40static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 41
42/* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
9baa3c34 49static const struct pci_device_id e1000_pci_tbl[] = {
1da177e4
LT		 50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
75 INTEL_E1000_ETHERNET_DEVICE(0x1075),
76 INTEL_E1000_ETHERNET_DEVICE(0x1076),
77 INTEL_E1000_ETHERNET_DEVICE(0x1077),
78 INTEL_E1000_ETHERNET_DEVICE(0x1078),
79 INTEL_E1000_ETHERNET_DEVICE(0x1079),
80 INTEL_E1000_ETHERNET_DEVICE(0x107A),
81 INTEL_E1000_ETHERNET_DEVICE(0x107B),
82 INTEL_E1000_ETHERNET_DEVICE(0x107C),
83 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 84 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 85 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
5377a416 86 INTEL_E1000_ETHERNET_DEVICE(0x2E6E),
1da177e4
LT		 87 /* required last entry */
88 {0,}
89};
90
91MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
92
35574764
NN		 93int e1000_up(struct e1000_adapter *adapter);
94void e1000_down(struct e1000_adapter *adapter);
95void e1000_reinit_locked(struct e1000_adapter *adapter);
96void e1000_reset(struct e1000_adapter *adapter);
35574764
NN		 97int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
98int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
99void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
100void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 101static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *txdr);
3ad2cc67 103static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 104 struct e1000_rx_ring *rxdr);
3ad2cc67 105static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 106 struct e1000_tx_ring *tx_ring);
3ad2cc67 107static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 108 struct e1000_rx_ring *rx_ring);
109void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 110
111static int e1000_init_module(void);
112static void e1000_exit_module(void);
113static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
9f9a12f8 114static void e1000_remove(struct pci_dev *pdev);
581d708e 115static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 116static int e1000_sw_init(struct e1000_adapter *adapter);
117static int e1000_open(struct net_device *netdev);
118static int e1000_close(struct net_device *netdev);
119static void e1000_configure_tx(struct e1000_adapter *adapter);
120static void e1000_configure_rx(struct e1000_adapter *adapter);
121static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 122static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
123static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
124static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
125 struct e1000_tx_ring *tx_ring);
126static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
127 struct e1000_rx_ring *rx_ring);
db0ce50d 128static void e1000_set_rx_mode(struct net_device *netdev);
5cf42fcd 129static void e1000_update_phy_info_task(struct work_struct *work);
a4010afe 130static void e1000_watchdog(struct work_struct *work);
5cf42fcd 131static void e1000_82547_tx_fifo_stall_task(struct work_struct *work);
3b29a56d
SH		 132static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
133 struct net_device *netdev);
1da177e4
LT		 134static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
135static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
136static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 137static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP		 138static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
139 struct e1000_tx_ring *tx_ring);
bea3348e 140static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 141static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
142 struct e1000_rx_ring *rx_ring,
143 int *work_done, int work_to_do);
edbbb3ca
JB		 144static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
145 struct e1000_rx_ring *rx_ring,
146 int *work_done, int work_to_do);
08e83316
SD		 147static void e1000_alloc_dummy_rx_buffers(struct e1000_adapter *adapter,
148 struct e1000_rx_ring *rx_ring,
149 int cleaned_count)
150{
151}
581d708e 152static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 153 struct e1000_rx_ring *rx_ring,
72d64a43 154 int cleaned_count);
edbbb3ca
JB		 155static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
156 struct e1000_rx_ring *rx_ring,
157 int cleaned_count);
1da177e4
LT		 158static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
159static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
160 int cmd);
1da177e4
LT		 161static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
162static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
163static void e1000_tx_timeout(struct net_device *dev);
65f27f38 164static void e1000_reset_task(struct work_struct *work);
1da177e4 165static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 166static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
167 struct sk_buff *skb);
1da177e4 168
5622e404 169static bool e1000_vlan_used(struct e1000_adapter *adapter);
c8f44aff
MM		 170static void e1000_vlan_mode(struct net_device *netdev,
171 netdev_features_t features);
52f5509f
JP		 172static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
173 bool filter_on);
80d5c368
PM		 174static int e1000_vlan_rx_add_vid(struct net_device *netdev,
175 __be16 proto, u16 vid);
176static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
177 __be16 proto, u16 vid);
1da177e4
LT		 178static void e1000_restore_vlan(struct e1000_adapter *adapter);
179
6fdfef16 180#ifdef CONFIG_PM
b43fcd7d 181static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 182static int e1000_resume(struct pci_dev *pdev);
183#endif
c653e635 184static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 185
186#ifdef CONFIG_NET_POLL_CONTROLLER
187/* for netdump / net console */
188static void e1000_netpoll (struct net_device *netdev);
189#endif
190
1f753861
JB		 191#define COPYBREAK_DEFAULT 256
192static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
193module_param(copybreak, uint, 0644);
194MODULE_PARM_DESC(copybreak,
195 "Maximum size of packet that is copied to a new buffer on receive");
196
9026729b
AK		 197static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
198 pci_channel_state_t state);
199static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
200static void e1000_io_resume(struct pci_dev *pdev);
201
3646f0e5 202static const struct pci_error_handlers e1000_err_handler = {
9026729b
AK		 203 .error_detected = e1000_io_error_detected,
204 .slot_reset = e1000_io_slot_reset,
205 .resume = e1000_io_resume,
206};
24025e4e 207
1da177e4
LT		 208static struct pci_driver e1000_driver = {
209 .name = e1000_driver_name,
210 .id_table = e1000_pci_tbl,
211 .probe = e1000_probe,
9f9a12f8 212 .remove = e1000_remove,
c4e24f01 213#ifdef CONFIG_PM
25985edc 214 /* Power Management Hooks */
1da177e4 215 .suspend = e1000_suspend,
c653e635 216 .resume = e1000_resume,
1da177e4 217#endif
9026729b
AK		 218 .shutdown = e1000_shutdown,
219 .err_handler = &e1000_err_handler
1da177e4
LT		 220};
221
222MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
223MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
224MODULE_LICENSE("GPL");
225MODULE_VERSION(DRV_VERSION);
226
b3f4d599 227#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
228static int debug = -1;
1da177e4
LT		 229module_param(debug, int, 0);
230MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
231
675ad473
ET		 232/**
233 * e1000_get_hw_dev - return device
234 * used by hardware layer to print debugging information
235 *
236 **/
237struct net_device *e1000_get_hw_dev(struct e1000_hw *hw)
238{
239 struct e1000_adapter *adapter = hw->back;
240 return adapter->netdev;
241}
242
1da177e4
LT		 243/**
244 * e1000_init_module - Driver Registration Routine
245 *
246 * e1000_init_module is the first routine called when the driver is
247 * loaded. All it does is register with the PCI subsystem.
248 **/
64798845 249static int __init e1000_init_module(void)
1da177e4
LT		 250{
251 int ret;
675ad473 252 pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version);
1da177e4 253
675ad473 254 pr_info("%s\n", e1000_copyright);
1da177e4 255
29917620 256 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 257 if (copybreak != COPYBREAK_DEFAULT) {
258 if (copybreak == 0)
675ad473 259 pr_info("copybreak disabled\n");
1f753861 260 else
675ad473
ET		 261 pr_info("copybreak enabled for "
262 "packets <= %u bytes\n", copybreak);
1f753861 263 }
1da177e4
LT		 264 return ret;
265}
266
267module_init(e1000_init_module);
268
269/**
270 * e1000_exit_module - Driver Exit Cleanup Routine
271 *
272 * e1000_exit_module is called just before the driver is removed
273 * from memory.
274 **/
64798845 275static void __exit e1000_exit_module(void)
1da177e4 276{
1da177e4
LT		 277 pci_unregister_driver(&e1000_driver);
278}
279
280module_exit(e1000_exit_module);
281
2db10a08
AK		 282static int e1000_request_irq(struct e1000_adapter *adapter)
283{
284 struct net_device *netdev = adapter->netdev;
3e18826c 285 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 286 int irq_flags = IRQF_SHARED;
287 int err;
2db10a08 288
e94bd23f
AK		 289 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
290 netdev);
291 if (err) {
feb8f478 292 e_err(probe, "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 293 }
2db10a08
AK		 294
295 return err;
296}
297
298static void e1000_free_irq(struct e1000_adapter *adapter)
299{
300 struct net_device *netdev = adapter->netdev;
301
302 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK		 303}
304
1da177e4
LT		 305/**
306 * e1000_irq_disable - Mask off interrupt generation on the NIC
307 * @adapter: board private structure
308 **/
64798845 309static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 310{
1dc32918
JP		 311 struct e1000_hw *hw = &adapter->hw;
312
313 ew32(IMC, ~0);
314 E1000_WRITE_FLUSH();
1da177e4
LT		 315 synchronize_irq(adapter->pdev->irq);
316}
317
318/**
319 * e1000_irq_enable - Enable default interrupt generation settings
320 * @adapter: board private structure
321 **/
64798845 322static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 323{
1dc32918
JP		 324 struct e1000_hw *hw = &adapter->hw;
325
326 ew32(IMS, IMS_ENABLE_MASK);
327 E1000_WRITE_FLUSH();
1da177e4 328}
3ad2cc67 329
64798845 330static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 331{
1dc32918 332 struct e1000_hw *hw = &adapter->hw;
2d7edb92 333 struct net_device *netdev = adapter->netdev;
1dc32918 334 u16 vid = hw->mng_cookie.vlan_id;
406874a7 335 u16 old_vid = adapter->mng_vlan_id;
96838a40 336
5622e404
JP		 337 if (!e1000_vlan_used(adapter))
338 return;
339
340 if (!test_bit(vid, adapter->active_vlans)) {
341 if (hw->mng_cookie.status &
342 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
80d5c368 343 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
c5f226fe 344 adapter->mng_vlan_id = vid;
5622e404
JP		 345 } else {
346 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
347 }
348 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
349 (vid != old_vid) &&
350 !test_bit(old_vid, adapter->active_vlans))
80d5c368
PM		 351 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
352 old_vid);
5622e404
JP		 353 } else {
354 adapter->mng_vlan_id = vid;
2d7edb92
MC		 355 }
356}
b55ccb35 357
64798845 358static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 359{
1dc32918
JP		 360 struct e1000_hw *hw = &adapter->hw;
361
0fccd0e9 362 if (adapter->en_mng_pt) {
1dc32918 363 u32 manc = er32(MANC);
0fccd0e9
JG		 364
365 /* disable hardware interception of ARP */
366 manc &= ~(E1000_MANC_ARP_EN);
367
1dc32918 368 ew32(MANC, manc);
0fccd0e9
JG		 369 }
370}
371
64798845 372static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 373{
1dc32918
JP		 374 struct e1000_hw *hw = &adapter->hw;
375
0fccd0e9 376 if (adapter->en_mng_pt) {
1dc32918 377 u32 manc = er32(MANC);
0fccd0e9
JG		 378
379 /* re-enable hardware interception of ARP */
380 manc |= E1000_MANC_ARP_EN;
381
1dc32918 382 ew32(MANC, manc);
0fccd0e9
JG		 383 }
384}
385
e0aac5a2
AK		 386/**
387 * e1000_configure - configure the hardware for RX and TX
388 * @adapter = private board structure
389 **/
390static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 391{
392 struct net_device *netdev = adapter->netdev;
2db10a08 393 int i;
1da177e4 394
db0ce50d 395 e1000_set_rx_mode(netdev);
1da177e4
LT		 396
397 e1000_restore_vlan(adapter);
0fccd0e9 398 e1000_init_manageability(adapter);
1da177e4
LT		 399
400 e1000_configure_tx(adapter);
401 e1000_setup_rctl(adapter);
402 e1000_configure_rx(adapter);
72d64a43
JK		 403 /* call E1000_DESC_UNUSED which always leaves
404 * at least 1 descriptor unused to make sure
6cfbd97b
JK		 405 * next_to_use != next_to_clean
406 */
f56799ea 407 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 408 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e 409 adapter->alloc_rx_buf(adapter, ring,
6cfbd97b 410 E1000_DESC_UNUSED(ring));
f56799ea 411 }
e0aac5a2
AK		 412}
413
414int e1000_up(struct e1000_adapter *adapter)
415{
1dc32918
JP		 416 struct e1000_hw *hw = &adapter->hw;
417
e0aac5a2
AK		 418 /* hardware has been reset, we need to reload some things */
419 e1000_configure(adapter);
420
421 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 422
bea3348e 423 napi_enable(&adapter->napi);
c3570acb 424
5de55624
MC		 425 e1000_irq_enable(adapter);
426
4cb9be7a
JB		 427 netif_wake_queue(adapter->netdev);
428
79f3d399 429 /* fire a link change interrupt to start the watchdog */
1dc32918 430 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 431 return 0;
432}
433
79f05bf0
AK		 434/**
435 * e1000_power_up_phy - restore link in case the phy was powered down
436 * @adapter: address of board private structure
437 *
438 * The phy may be powered down to save power and turn off link when the
439 * driver is unloaded and wake on lan is not enabled (among others)
440 * *** this routine MUST be followed by a call to e1000_reset ***
79f05bf0 441 **/
d658266e 442void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 443{
1dc32918 444 struct e1000_hw *hw = &adapter->hw;
406874a7 445 u16 mii_reg = 0;
79f05bf0
AK		 446
447 /* Just clear the power down bit to wake the phy back up */
1dc32918 448 if (hw->media_type == e1000_media_type_copper) {
79f05bf0 449 /* according to the manual, the phy will retain its
6cfbd97b
JK		 450 * settings across a power-down/up cycle
451 */
1dc32918 452 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 453 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 454 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 455 }
456}
457
458static void e1000_power_down_phy(struct e1000_adapter *adapter)
459{
1dc32918
JP		 460 struct e1000_hw *hw = &adapter->hw;
461
61c2505f 462 /* Power down the PHY so no link is implied when interface is down *
c3033b01 463 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 464 * (a) WoL is enabled
465 * (b) AMT is active
6cfbd97b
JK		 466 * (c) SoL/IDER session is active
467 */
1dc32918
JP		 468 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
469 hw->media_type == e1000_media_type_copper) {
406874a7 470 u16 mii_reg = 0;
61c2505f 471
1dc32918 472 switch (hw->mac_type) {
61c2505f
BA		 473 case e1000_82540:
474 case e1000_82545:
475 case e1000_82545_rev_3:
476 case e1000_82546:
5377a416 477 case e1000_ce4100:
61c2505f
BA		 478 case e1000_82546_rev_3:
479 case e1000_82541:
480 case e1000_82541_rev_2:
481 case e1000_82547:
482 case e1000_82547_rev_2:
1dc32918 483 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 484 goto out;
485 break;
61c2505f
BA		 486 default:
487 goto out;
488 }
1dc32918 489 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 490 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 491 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
4e0d8f7d 492 msleep(1);
79f05bf0 493 }
61c2505f
BA		 494out:
495 return;
79f05bf0
AK		 496}
497
a4010afe
JB		 498static void e1000_down_and_stop(struct e1000_adapter *adapter)
499{
500 set_bit(__E1000_DOWN, &adapter->flags);
8ce6909f 501
a4010afe 502 cancel_delayed_work_sync(&adapter->watchdog_task);
74a1b1ea
VD		 503
504 /*
505 * Since the watchdog task can reschedule other tasks, we should cancel
506 * it first, otherwise we can run into the situation when a work is
507 * still running after the adapter has been turned down.
508 */
509
a4010afe
JB		 510 cancel_delayed_work_sync(&adapter->phy_info_task);
511 cancel_delayed_work_sync(&adapter->fifo_stall_task);
74a1b1ea
VD		 512
513 /* Only kill reset task if adapter is not resetting */
514 if (!test_bit(__E1000_RESETTING, &adapter->flags))
515 cancel_work_sync(&adapter->reset_task);
a4010afe
JB		 516}
517
64798845 518void e1000_down(struct e1000_adapter *adapter)
1da177e4 519{
a6c42322 520 struct e1000_hw *hw = &adapter->hw;
1da177e4 521 struct net_device *netdev = adapter->netdev;
a6c42322 522 u32 rctl, tctl;
1da177e4 523
f9c029db 524 netif_carrier_off(netdev);
1314bbf3 525
a6c42322
JB		 526 /* disable receives in the hardware */
527 rctl = er32(RCTL);
528 ew32(RCTL, rctl & ~E1000_RCTL_EN);
529 /* flush and sleep below */
530
51851073 531 netif_tx_disable(netdev);
a6c42322
JB		 532
533 /* disable transmits in the hardware */
534 tctl = er32(TCTL);
535 tctl &= ~E1000_TCTL_EN;
536 ew32(TCTL, tctl);
537 /* flush both disables and wait for them to finish */
538 E1000_WRITE_FLUSH();
539 msleep(10);
540
bea3348e 541 napi_disable(&adapter->napi);
c3570acb 542
1da177e4 543 e1000_irq_disable(adapter);
c1605eb3 544
6cfbd97b 545 /* Setting DOWN must be after irq_disable to prevent
ab08853f 546 * a screaming interrupt. Setting DOWN also prevents
a4010afe 547 * tasks from rescheduling.
ab08853f 548 */
a4010afe 549 e1000_down_and_stop(adapter);
1da177e4 550
1da177e4
LT		 551 adapter->link_speed = 0;
552 adapter->link_duplex = 0;
1da177e4
LT		 553
554 e1000_reset(adapter);
581d708e
MC		 555 e1000_clean_all_tx_rings(adapter);
556 e1000_clean_all_rx_rings(adapter);
1da177e4 557}
1da177e4 558
64798845 559void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 560{
561 WARN_ON(in_interrupt());
562 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
563 msleep(1);
564 e1000_down(adapter);
565 e1000_up(adapter);
566 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 567}
568
64798845 569void e1000_reset(struct e1000_adapter *adapter)
1da177e4 570{
1dc32918 571 struct e1000_hw *hw = &adapter->hw;
406874a7 572 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 573 bool legacy_pba_adjust = false;
b7cb8c2c 574 u16 hwm;
1da177e4
LT		 575
576 /* Repartition Pba for greater than 9k mtu
577 * To take effect CTRL.RST is required.
578 */
579
1dc32918 580 switch (hw->mac_type) {
018ea44e
BA		 581 case e1000_82542_rev2_0:
582 case e1000_82542_rev2_1:
583 case e1000_82543:
584 case e1000_82544:
585 case e1000_82540:
586 case e1000_82541:
587 case e1000_82541_rev_2:
c3033b01 588 legacy_pba_adjust = true;
018ea44e
BA		 589 pba = E1000_PBA_48K;
590 break;
591 case e1000_82545:
592 case e1000_82545_rev_3:
593 case e1000_82546:
5377a416 594 case e1000_ce4100:
018ea44e
BA		 595 case e1000_82546_rev_3:
596 pba = E1000_PBA_48K;
597 break;
2d7edb92 598 case e1000_82547:
0e6ef3e0 599 case e1000_82547_rev_2:
c3033b01 600 legacy_pba_adjust = true;
2d7edb92
MC		 601 pba = E1000_PBA_30K;
602 break;
018ea44e
BA		 603 case e1000_undefined:
604 case e1000_num_macs:
2d7edb92
MC		 605 break;
606 }
607
c3033b01 608 if (legacy_pba_adjust) {
b7cb8c2c 609 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 610 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 611
1dc32918 612 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 613 adapter->tx_fifo_head = 0;
614 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
615 adapter->tx_fifo_size =
616 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
617 atomic_set(&adapter->tx_fifo_stall, 0);
618 }
b7cb8c2c 619 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 620 /* adjust PBA for jumbo frames */
1dc32918 621 ew32(PBA, pba);
018ea44e
BA		 622
623 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 624 * large enough to accommodate two full transmit packets,
018ea44e 625 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 626 * the Rx FIFO should be large enough to accommodate at least
018ea44e 627 * one full receive packet and is similarly rounded up and
6cfbd97b
JK		 628 * expressed in KB.
629 */
1dc32918 630 pba = er32(PBA);
018ea44e
BA		 631 /* upper 16 bits has Tx packet buffer allocation size in KB */
632 tx_space = pba >> 16;
633 /* lower 16 bits has Rx packet buffer allocation size in KB */
634 pba &= 0xffff;
6cfbd97b 635 /* the Tx fifo also stores 16 bytes of information about the Tx
b7cb8c2c
JB		 636 * but don't include ethernet FCS because hardware appends it
637 */
638 min_tx_space = (hw->max_frame_size +
639 sizeof(struct e1000_tx_desc) -
640 ETH_FCS_LEN) * 2;
9099cfb9 641 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 642 min_tx_space >>= 10;
b7cb8c2c
JB		 643 /* software strips receive CRC, so leave room for it */
644 min_rx_space = hw->max_frame_size;
9099cfb9 645 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 646 min_rx_space >>= 10;
647
648 /* If current Tx allocation is less than the min Tx FIFO size,
649 * and the min Tx FIFO size is less than the current Rx FIFO
6cfbd97b
JK		 650 * allocation, take space away from current Rx allocation
651 */
018ea44e
BA		 652 if (tx_space < min_tx_space &&
653 ((min_tx_space - tx_space) < pba)) {
654 pba = pba - (min_tx_space - tx_space);
655
656 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 657 switch (hw->mac_type) {
018ea44e
BA		 658 case e1000_82545 ... e1000_82546_rev_3:
659 pba &= ~(E1000_PBA_8K - 1);
660 break;
661 default:
662 break;
663 }
664
6cfbd97b
JK		 665 /* if short on Rx space, Rx wins and must trump Tx
666 * adjustment or use Early Receive if available
667 */
1532ecea
JB		 668 if (pba < min_rx_space)
669 pba = min_rx_space;
018ea44e 670 }
1da177e4 671 }
2d7edb92 672
1dc32918 673 ew32(PBA, pba);
1da177e4 674
6cfbd97b 675 /* flow control settings:
b7cb8c2c
JB		 676 * The high water mark must be low enough to fit one full frame
677 * (or the size used for early receive) above it in the Rx FIFO.
678 * Set it to the lower of:
679 * - 90% of the Rx FIFO size, and
680 * - the full Rx FIFO size minus the early receive size (for parts
681 * with ERT support assuming ERT set to E1000_ERT_2048), or
682 * - the full Rx FIFO size minus one full frame
683 */
684 hwm = min(((pba << 10) * 9 / 10),
685 ((pba << 10) - hw->max_frame_size));
686
687 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
688 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 689 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 690 hw->fc_send_xon = 1;
691 hw->fc = hw->original_fc;
1da177e4 692
2d7edb92 693 /* Allow time for pending master requests to run */
1dc32918
JP		 694 e1000_reset_hw(hw);
695 if (hw->mac_type >= e1000_82544)
696 ew32(WUC, 0);
09ae3e88 697
1dc32918 698 if (e1000_init_hw(hw))
feb8f478 699 e_dev_err("Hardware Error\n");
2d7edb92 700 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 701
702 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 703 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP		 704 hw->autoneg == 1 &&
705 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
706 u32 ctrl = er32(CTRL);
3d5460a0
JB		 707 /* clear phy power management bit if we are in gig only mode,
708 * which if enabled will attempt negotiation to 100Mb, which
6cfbd97b
JK		 709 * can cause a loss of link at power off or driver unload
710 */
3d5460a0 711 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 712 ew32(CTRL, ctrl);
3d5460a0
JB		 713 }
714
1da177e4 715 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 716 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 717
1dc32918
JP		 718 e1000_reset_adaptive(hw);
719 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 720
0fccd0e9 721 e1000_release_manageability(adapter);
1da177e4
LT		 722}
723
1aa8b471 724/* Dump the eeprom for users having checksum issues */
b4ea895d 725static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 726{
727 struct net_device *netdev = adapter->netdev;
728 struct ethtool_eeprom eeprom;
729 const struct ethtool_ops *ops = netdev->ethtool_ops;
730 u8 *data;
731 int i;
732 u16 csum_old, csum_new = 0;
733
734 eeprom.len = ops->get_eeprom_len(netdev);
735 eeprom.offset = 0;
736
737 data = kmalloc(eeprom.len, GFP_KERNEL);
e404decb 738 if (!data)
67b3c27c 739 return;
67b3c27c
AK		 740
741 ops->get_eeprom(netdev, &eeprom, data);
742
743 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
744 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
745 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
746 csum_new += data[i] + (data[i + 1] << 8);
747 csum_new = EEPROM_SUM - csum_new;
748
675ad473
ET		 749 pr_err("/*********************/\n");
750 pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old);
751 pr_err("Calculated : 0x%04x\n", csum_new);
67b3c27c 752
675ad473
ET		 753 pr_err("Offset Values\n");
754 pr_err("======== ======\n");
67b3c27c
AK		 755 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
756
675ad473
ET		 757 pr_err("Include this output when contacting your support provider.\n");
758 pr_err("This is not a software error! Something bad happened to\n");
759 pr_err("your hardware or EEPROM image. Ignoring this problem could\n");
760 pr_err("result in further problems, possibly loss of data,\n");
761 pr_err("corruption or system hangs!\n");
762 pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n");
763 pr_err("which is invalid and requires you to set the proper MAC\n");
764 pr_err("address manually before continuing to enable this network\n");
765 pr_err("device. Please inspect the EEPROM dump and report the\n");
766 pr_err("issue to your hardware vendor or Intel Customer Support.\n");
767 pr_err("/*********************/\n");
67b3c27c
AK		 768
769 kfree(data);
770}
771
81250297
TI		 772/**
773 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
774 * @pdev: PCI device information struct
775 *
776 * Return true if an adapter needs ioport resources
777 **/
778static int e1000_is_need_ioport(struct pci_dev *pdev)
779{
780 switch (pdev->device) {
781 case E1000_DEV_ID_82540EM:
782 case E1000_DEV_ID_82540EM_LOM:
783 case E1000_DEV_ID_82540EP:
784 case E1000_DEV_ID_82540EP_LOM:
785 case E1000_DEV_ID_82540EP_LP:
786 case E1000_DEV_ID_82541EI:
787 case E1000_DEV_ID_82541EI_MOBILE:
788 case E1000_DEV_ID_82541ER:
789 case E1000_DEV_ID_82541ER_LOM:
790 case E1000_DEV_ID_82541GI:
791 case E1000_DEV_ID_82541GI_LF:
792 case E1000_DEV_ID_82541GI_MOBILE:
793 case E1000_DEV_ID_82544EI_COPPER:
794 case E1000_DEV_ID_82544EI_FIBER:
795 case E1000_DEV_ID_82544GC_COPPER:
796 case E1000_DEV_ID_82544GC_LOM:
797 case E1000_DEV_ID_82545EM_COPPER:
798 case E1000_DEV_ID_82545EM_FIBER:
799 case E1000_DEV_ID_82546EB_COPPER:
800 case E1000_DEV_ID_82546EB_FIBER:
801 case E1000_DEV_ID_82546EB_QUAD_COPPER:
802 return true;
803 default:
804 return false;
805 }
806}
807
c8f44aff
MM		 808static netdev_features_t e1000_fix_features(struct net_device *netdev,
809 netdev_features_t features)
5622e404 810{
6cfbd97b
JK		 811 /* Since there is no support for separate Rx/Tx vlan accel
812 * enable/disable make sure Tx flag is always in same state as Rx.
5622e404 813 */
f646968f
PM		 814 if (features & NETIF_F_HW_VLAN_CTAG_RX)
815 features |= NETIF_F_HW_VLAN_CTAG_TX;
5622e404 816 else
f646968f 817 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
5622e404
JP		 818
819 return features;
820}
821
c8f44aff
MM		 822static int e1000_set_features(struct net_device *netdev,
823 netdev_features_t features)
e97d3207
MM		 824{
825 struct e1000_adapter *adapter = netdev_priv(netdev);
c8f44aff 826 netdev_features_t changed = features ^ netdev->features;
e97d3207 827
f646968f 828 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
5622e404
JP		 829 e1000_vlan_mode(netdev, features);
830
e825b731 831 if (!(changed & (NETIF_F_RXCSUM | NETIF_F_RXALL)))
e97d3207
MM		 832 return 0;
833
e825b731 834 netdev->features = features;
e97d3207
MM		 835 adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
836
837 if (netif_running(netdev))
838 e1000_reinit_locked(adapter);
839 else
840 e1000_reset(adapter);
841
842 return 0;
843}
844
0e7614bc
SH		 845static const struct net_device_ops e1000_netdev_ops = {
846 .ndo_open = e1000_open,
847 .ndo_stop = e1000_close,
00829823 848 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 849 .ndo_get_stats = e1000_get_stats,
850 .ndo_set_rx_mode = e1000_set_rx_mode,
851 .ndo_set_mac_address = e1000_set_mac,
5622e404 852 .ndo_tx_timeout = e1000_tx_timeout,
0e7614bc
SH		 853 .ndo_change_mtu = e1000_change_mtu,
854 .ndo_do_ioctl = e1000_ioctl,
855 .ndo_validate_addr = eth_validate_addr,
0e7614bc
SH		 856 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
857 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
858#ifdef CONFIG_NET_POLL_CONTROLLER
859 .ndo_poll_controller = e1000_netpoll,
860#endif
5622e404
JP		 861 .ndo_fix_features = e1000_fix_features,
862 .ndo_set_features = e1000_set_features,
0e7614bc
SH		 863};
864
e508be17
JB		 865/**
866 * e1000_init_hw_struct - initialize members of hw struct
867 * @adapter: board private struct
868 * @hw: structure used by e1000_hw.c
869 *
870 * Factors out initialization of the e1000_hw struct to its own function
871 * that can be called very early at init (just after struct allocation).
872 * Fields are initialized based on PCI device information and
873 * OS network device settings (MTU size).
874 * Returns negative error codes if MAC type setup fails.
875 */
876static int e1000_init_hw_struct(struct e1000_adapter *adapter,
877 struct e1000_hw *hw)
878{
879 struct pci_dev *pdev = adapter->pdev;
880
881 /* PCI config space info */
882 hw->vendor_id = pdev->vendor;
883 hw->device_id = pdev->device;
884 hw->subsystem_vendor_id = pdev->subsystem_vendor;
885 hw->subsystem_id = pdev->subsystem_device;
886 hw->revision_id = pdev->revision;
887
888 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
889
890 hw->max_frame_size = adapter->netdev->mtu +
891 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
892 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
893
894 /* identify the MAC */
895 if (e1000_set_mac_type(hw)) {
896 e_err(probe, "Unknown MAC Type\n");
897 return -EIO;
898 }
899
900 switch (hw->mac_type) {
901 default:
902 break;
903 case e1000_82541:
904 case e1000_82547:
905 case e1000_82541_rev_2:
906 case e1000_82547_rev_2:
907 hw->phy_init_script = 1;
908 break;
909 }
910
911 e1000_set_media_type(hw);
912 e1000_get_bus_info(hw);
913
914 hw->wait_autoneg_complete = false;
915 hw->tbi_compatibility_en = true;
916 hw->adaptive_ifs = true;
917
918 /* Copper options */
919
920 if (hw->media_type == e1000_media_type_copper) {
921 hw->mdix = AUTO_ALL_MODES;
922 hw->disable_polarity_correction = false;
923 hw->master_slave = E1000_MASTER_SLAVE;
924 }
925
926 return 0;
927}
928
1da177e4
LT		 929/**
930 * e1000_probe - Device Initialization Routine
931 * @pdev: PCI device information struct
932 * @ent: entry in e1000_pci_tbl
933 *
934 * Returns 0 on success, negative on failure
935 *
936 * e1000_probe initializes an adapter identified by a pci_dev structure.
937 * The OS initialization, configuring of the adapter private structure,
938 * and a hardware reset occur.
939 **/
1dd06ae8 940static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4
LT		 941{
942 struct net_device *netdev;
943 struct e1000_adapter *adapter;
1dc32918 944 struct e1000_hw *hw;
2d7edb92 945
1da177e4 946 static int cards_found = 0;
120cd576 947 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 948 int i, err, pci_using_dac;
406874a7 949 u16 eeprom_data = 0;
5377a416 950 u16 tmp = 0;
406874a7 951 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 952 int bars, need_ioport;
0795af57 953
81250297
TI		 954 /* do not allocate ioport bars when not needed */
955 need_ioport = e1000_is_need_ioport(pdev);
956 if (need_ioport) {
957 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
958 err = pci_enable_device(pdev);
959 } else {
960 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 961 err = pci_enable_device_mem(pdev);
81250297 962 }
c7be73bc 963 if (err)
1da177e4
LT		 964 return err;
965
81250297 966 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 967 if (err)
6dd62ab0 968 goto err_pci_reg;
1da177e4
LT		 969
970 pci_set_master(pdev);
dbb5aaeb
NN		 971 err = pci_save_state(pdev);
972 if (err)
973 goto err_alloc_etherdev;
1da177e4 974
6dd62ab0 975 err = -ENOMEM;
1da177e4 976 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 977 if (!netdev)
1da177e4 978 goto err_alloc_etherdev;
1da177e4 979
1da177e4
LT		 980 SET_NETDEV_DEV(netdev, &pdev->dev);
981
982 pci_set_drvdata(pdev, netdev);
60490fe0 983 adapter = netdev_priv(netdev);
1da177e4
LT		 984 adapter->netdev = netdev;
985 adapter->pdev = pdev;
b3f4d599 986 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
81250297
TI		 987 adapter->bars = bars;
988 adapter->need_ioport = need_ioport;
1da177e4 989
1dc32918
JP		 990 hw = &adapter->hw;
991 hw->back = adapter;
992
6dd62ab0 993 err = -EIO;
275f165f 994 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 995 if (!hw->hw_addr)
1da177e4 996 goto err_ioremap;
1da177e4 997
81250297
TI		 998 if (adapter->need_ioport) {
999 for (i = BAR_1; i <= BAR_5; i++) {
1000 if (pci_resource_len(pdev, i) == 0)
1001 continue;
1002 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1003 hw->io_base = pci_resource_start(pdev, i);
1004 break;
1005 }
1da177e4
LT		 1006 }
1007 }
1008
e508be17
JB		 1009 /* make ready for any if (hw->...) below */
1010 err = e1000_init_hw_struct(adapter, hw);
1011 if (err)
1012 goto err_sw_init;
1013
6cfbd97b 1014 /* there is a workaround being applied below that limits
e508be17
JB		 1015 * 64-bit DMA addresses to 64-bit hardware. There are some
1016 * 32-bit adapters that Tx hang when given 64-bit DMA addresses
1017 */
1018 pci_using_dac = 0;
1019 if ((hw->bus_type == e1000_bus_type_pcix) &&
9931a26e 1020 !dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
e508be17 1021 pci_using_dac = 1;
e508be17 1022 } else {
9931a26e 1023 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
19a0b67a
DN		 1024 if (err) {
1025 pr_err("No usable DMA config, aborting\n");
1026 goto err_dma;
1027 }
e508be17
JB		 1028 }
1029
0e7614bc 1030 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 1031 e1000_set_ethtool_ops(netdev);
1da177e4 1032 netdev->watchdog_timeo = 5 * HZ;
bea3348e 1033 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 1034
0eb5a34c 1035 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1036
1da177e4
LT		 1037 adapter->bd_number = cards_found;
1038
1039 /* setup the private structure */
1040
c7be73bc
JP		 1041 err = e1000_sw_init(adapter);
1042 if (err)
1da177e4
LT		 1043 goto err_sw_init;
1044
6dd62ab0 1045 err = -EIO;
5377a416 1046 if (hw->mac_type == e1000_ce4100) {
13acde8f
FF		 1047 hw->ce4100_gbe_mdio_base_virt =
1048 ioremap(pci_resource_start(pdev, BAR_1),
5377a416
DB		 1049 pci_resource_len(pdev, BAR_1));
1050
13acde8f 1051 if (!hw->ce4100_gbe_mdio_base_virt)
5377a416
DB		 1052 goto err_mdio_ioremap;
1053 }
2d7edb92 1054
1dc32918 1055 if (hw->mac_type >= e1000_82543) {
e97d3207 1056 netdev->hw_features = NETIF_F_SG |
5622e404 1057 NETIF_F_HW_CSUM |
f646968f
PM		 1058 NETIF_F_HW_VLAN_CTAG_RX;
1059 netdev->features = NETIF_F_HW_VLAN_CTAG_TX |
1060 NETIF_F_HW_VLAN_CTAG_FILTER;
1da177e4
LT		 1061 }
1062
1dc32918
JP		 1063 if ((hw->mac_type >= e1000_82544) &&
1064 (hw->mac_type != e1000_82547))
e97d3207
MM		 1065 netdev->hw_features |= NETIF_F_TSO;
1066
11a78dcf
BG		 1067 netdev->priv_flags |= IFF_SUPP_NOFCS;
1068
e97d3207 1069 netdev->features |= netdev->hw_features;
7500673b
TD		 1070 netdev->hw_features |= (NETIF_F_RXCSUM |
1071 NETIF_F_RXALL |
1072 NETIF_F_RXFCS);
2d7edb92 1073
7b872a55 1074 if (pci_using_dac) {
1da177e4 1075 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 1076 netdev->vlan_features |= NETIF_F_HIGHDMA;
1077 }
1da177e4 1078
7500673b
TD		 1079 netdev->vlan_features |= (NETIF_F_TSO |
1080 NETIF_F_HW_CSUM |
1081 NETIF_F_SG);
20501a69 1082
a22bb0b9
FR		 1083 /* Do not set IFF_UNICAST_FLT for VMWare's 82545EM */
1084 if (hw->device_id != E1000_DEV_ID_82545EM_COPPER ||
1085 hw->subsystem_vendor_id != PCI_VENDOR_ID_VMWARE)
1086 netdev->priv_flags |= IFF_UNICAST_FLT;
01789349 1087
1dc32918 1088 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1089
cd94dd0b 1090 /* initialize eeprom parameters */
1dc32918 1091 if (e1000_init_eeprom_params(hw)) {
feb8f478 1092 e_err(probe, "EEPROM initialization failed\n");
6dd62ab0 1093 goto err_eeprom;
cd94dd0b
AK		 1094 }
1095
96838a40 1096 /* before reading the EEPROM, reset the controller to
6cfbd97b
JK		 1097 * put the device in a known good starting state
1098 */
96838a40 1099
1dc32918 1100 e1000_reset_hw(hw);
1da177e4
LT		 1101
1102 /* make sure the EEPROM is good */
1dc32918 1103 if (e1000_validate_eeprom_checksum(hw) < 0) {
feb8f478 1104 e_err(probe, "The EEPROM Checksum Is Not Valid\n");
67b3c27c 1105 e1000_dump_eeprom(adapter);
6cfbd97b 1106 /* set MAC address to all zeroes to invalidate and temporary
67b3c27c
AK		 1107 * disable this device for the user. This blocks regular
1108 * traffic while still permitting ethtool ioctls from reaching
1109 * the hardware as well as allowing the user to run the
1110 * interface after manually setting a hw addr using
1111 * `ip set address`
1112 */
1dc32918 1113 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1114 } else {
1115 /* copy the MAC address out of the EEPROM */
1dc32918 1116 if (e1000_read_mac_addr(hw))
feb8f478 1117 e_err(probe, "EEPROM Read Error\n");
1da177e4 1118 }
dbedd44e 1119 /* don't block initialization here due to bad MAC address */
1dc32918 1120 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1121
aaeb6cdf 1122 if (!is_valid_ether_addr(netdev->dev_addr))
feb8f478 1123 e_err(probe, "Invalid MAC Address\n");
1da177e4 1124
1da177e4 1125
a4010afe
JB		 1126 INIT_DELAYED_WORK(&adapter->watchdog_task, e1000_watchdog);
1127 INIT_DELAYED_WORK(&adapter->fifo_stall_task,
1128 e1000_82547_tx_fifo_stall_task);
1129 INIT_DELAYED_WORK(&adapter->phy_info_task, e1000_update_phy_info_task);
65f27f38 1130 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1131
1da177e4
LT		 1132 e1000_check_options(adapter);
1133
1134 /* Initial Wake on LAN setting
1135 * If APM wake is enabled in the EEPROM,
1136 * enable the ACPI Magic Packet filter
1137 */
1138
1dc32918 1139 switch (hw->mac_type) {
1da177e4
LT		 1140 case e1000_82542_rev2_0:
1141 case e1000_82542_rev2_1:
1142 case e1000_82543:
1143 break;
1144 case e1000_82544:
1dc32918 1145 e1000_read_eeprom(hw,
1da177e4
LT		 1146 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1147 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1148 break;
1149 case e1000_82546:
1150 case e1000_82546_rev_3:
1dc32918
JP		 1151 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1152 e1000_read_eeprom(hw,
1da177e4
LT		 1153 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1154 break;
1155 }
1156 /* Fall Through */
1157 default:
1dc32918 1158 e1000_read_eeprom(hw,
1da177e4
LT		 1159 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1160 break;
1161 }
96838a40 1162 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1163 adapter->eeprom_wol |= E1000_WUFC_MAG;
1164
1165 /* now that we have the eeprom settings, apply the special cases
1166 * where the eeprom may be wrong or the board simply won't support
6cfbd97b
JK		 1167 * wake on lan on a particular port
1168 */
120cd576
JB		 1169 switch (pdev->device) {
1170 case E1000_DEV_ID_82546GB_PCIE:
1171 adapter->eeprom_wol = 0;
1172 break;
1173 case E1000_DEV_ID_82546EB_FIBER:
1174 case E1000_DEV_ID_82546GB_FIBER:
120cd576 1175 /* Wake events only supported on port A for dual fiber
6cfbd97b
JK		 1176 * regardless of eeprom setting
1177 */
1dc32918 1178 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1179 adapter->eeprom_wol = 0;
1180 break;
1181 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1182 /* if quad port adapter, disable WoL on all but port A */
1183 if (global_quad_port_a != 0)
1184 adapter->eeprom_wol = 0;
1185 else
3db1cd5c 1186 adapter->quad_port_a = true;
120cd576
JB		 1187 /* Reset for multiple quad port adapters */
1188 if (++global_quad_port_a == 4)
1189 global_quad_port_a = 0;
1190 break;
1191 }
1192
1193 /* initialize the wol settings based on the eeprom settings */
1194 adapter->wol = adapter->eeprom_wol;
de126489 1195 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1196
5377a416
DB		 1197 /* Auto detect PHY address */
1198 if (hw->mac_type == e1000_ce4100) {
1199 for (i = 0; i < 32; i++) {
1200 hw->phy_addr = i;
1201 e1000_read_phy_reg(hw, PHY_ID2, &tmp);
1202 if (tmp == 0 || tmp == 0xFF) {
1203 if (i == 31)
1204 goto err_eeprom;
1205 continue;
1206 } else
1207 break;
1208 }
1209 }
1210
675ad473
ET		 1211 /* reset the hardware with the new settings */
1212 e1000_reset(adapter);
1213
1214 strcpy(netdev->name, "eth%d");
1215 err = register_netdev(netdev);
1216 if (err)
1217 goto err_register;
1218
52f5509f 1219 e1000_vlan_filter_on_off(adapter, false);
5622e404 1220
fb3d47d4 1221 /* print bus type/speed/width info */
feb8f478 1222 e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n",
7837e58c
JP		 1223 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1224 ((hw->bus_speed == e1000_bus_speed_133) ? 133 :
1225 (hw->bus_speed == e1000_bus_speed_120) ? 120 :
1226 (hw->bus_speed == e1000_bus_speed_100) ? 100 :
1227 (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33),
1228 ((hw->bus_width == e1000_bus_width_64) ? 64 : 32),
1229 netdev->dev_addr);
1314bbf3 1230
eb62efd2
JB		 1231 /* carrier off reporting is important to ethtool even BEFORE open */
1232 netif_carrier_off(netdev);
1233
feb8f478 1234 e_info(probe, "Intel(R) PRO/1000 Network Connection\n");
1da177e4
LT		 1235
1236 cards_found++;
1237 return 0;
1238
1239err_register:
6dd62ab0 1240err_eeprom:
1532ecea 1241 e1000_phy_hw_reset(hw);
6dd62ab0 1242
1dc32918
JP		 1243 if (hw->flash_address)
1244 iounmap(hw->flash_address);
6dd62ab0
VA		 1245 kfree(adapter->tx_ring);
1246 kfree(adapter->rx_ring);
e508be17 1247err_dma:
1da177e4 1248err_sw_init:
5377a416 1249err_mdio_ioremap:
13acde8f 1250 iounmap(hw->ce4100_gbe_mdio_base_virt);
1dc32918 1251 iounmap(hw->hw_addr);
1da177e4
LT		 1252err_ioremap:
1253 free_netdev(netdev);
1254err_alloc_etherdev:
81250297 1255 pci_release_selected_regions(pdev, bars);
6dd62ab0 1256err_pci_reg:
6dd62ab0 1257 pci_disable_device(pdev);
1da177e4
LT		 1258 return err;
1259}
1260
1261/**
1262 * e1000_remove - Device Removal Routine
1263 * @pdev: PCI device information struct
1264 *
1265 * e1000_remove is called by the PCI subsystem to alert the driver
1266 * that it should release a PCI device. The could be caused by a
1267 * Hot-Plug event, or because the driver is going to be removed from
1268 * memory.
1269 **/
9f9a12f8 1270static void e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1271{
1272 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1273 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1274 struct e1000_hw *hw = &adapter->hw;
1da177e4 1275
a4010afe 1276 e1000_down_and_stop(adapter);
0fccd0e9 1277 e1000_release_manageability(adapter);
1da177e4 1278
bea3348e
SH		 1279 unregister_netdev(netdev);
1280
1532ecea 1281 e1000_phy_hw_reset(hw);
1da177e4 1282
24025e4e
MC		 1283 kfree(adapter->tx_ring);
1284 kfree(adapter->rx_ring);
24025e4e 1285
1c26750c 1286 if (hw->mac_type == e1000_ce4100)
13acde8f 1287 iounmap(hw->ce4100_gbe_mdio_base_virt);
1dc32918
JP		 1288 iounmap(hw->hw_addr);
1289 if (hw->flash_address)
1290 iounmap(hw->flash_address);
81250297 1291 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1292
1293 free_netdev(netdev);
1294
1295 pci_disable_device(pdev);
1296}
1297
1298/**
1299 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1300 * @adapter: board private structure to initialize
1301 *
1302 * e1000_sw_init initializes the Adapter private data structure.
e508be17 1303 * e1000_init_hw_struct MUST be called before this function
1da177e4 1304 **/
9f9a12f8 1305static int e1000_sw_init(struct e1000_adapter *adapter)
1da177e4 1306{
eb0f8054 1307 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4 1308
f56799ea
JK		 1309 adapter->num_tx_queues = 1;
1310 adapter->num_rx_queues = 1;
581d708e
MC		 1311
1312 if (e1000_alloc_queues(adapter)) {
feb8f478 1313 e_err(probe, "Unable to allocate memory for queues\n");
581d708e
MC		 1314 return -ENOMEM;
1315 }
1316
47313054 1317 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1318 e1000_irq_disable(adapter);
1319
1da177e4 1320 spin_lock_init(&adapter->stats_lock);
1da177e4 1321
1314bbf3
AK		 1322 set_bit(__E1000_DOWN, &adapter->flags);
1323
1da177e4
LT		 1324 return 0;
1325}
1326
581d708e
MC		 1327/**
1328 * e1000_alloc_queues - Allocate memory for all rings
1329 * @adapter: board private structure to initialize
1330 *
1331 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1332 * number of queues at compile-time.
581d708e 1333 **/
9f9a12f8 1334static int e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1335{
1c7e5b12
YB		 1336 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1337 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1338 if (!adapter->tx_ring)
1339 return -ENOMEM;
581d708e 1340
1c7e5b12
YB		 1341 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1342 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1343 if (!adapter->rx_ring) {
1344 kfree(adapter->tx_ring);
1345 return -ENOMEM;
1346 }
581d708e 1347
581d708e
MC		 1348 return E1000_SUCCESS;
1349}
1350
1da177e4
LT		 1351/**
1352 * e1000_open - Called when a network interface is made active
1353 * @netdev: network interface device structure
1354 *
1355 * Returns 0 on success, negative value on failure
1356 *
1357 * The open entry point is called when a network interface is made
1358 * active by the system (IFF_UP). At this point all resources needed
1359 * for transmit and receive operations are allocated, the interrupt
a4010afe 1360 * handler is registered with the OS, the watchdog task is started,
1da177e4
LT		 1361 * and the stack is notified that the interface is ready.
1362 **/
64798845 1363static int e1000_open(struct net_device *netdev)
1da177e4 1364{
60490fe0 1365 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1366 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1367 int err;
1368
2db10a08 1369 /* disallow open during test */
1314bbf3 1370 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1371 return -EBUSY;
1372
eb62efd2
JB		 1373 netif_carrier_off(netdev);
1374
1da177e4 1375 /* allocate transmit descriptors */
e0aac5a2
AK		 1376 err = e1000_setup_all_tx_resources(adapter);
1377 if (err)
1da177e4
LT		 1378 goto err_setup_tx;
1379
1380 /* allocate receive descriptors */
e0aac5a2 1381 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1382 if (err)
e0aac5a2 1383 goto err_setup_rx;
b5bf28cd 1384
79f05bf0
AK		 1385 e1000_power_up_phy(adapter);
1386
2d7edb92 1387 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1388 if ((hw->mng_cookie.status &
2d7edb92
MC		 1389 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1390 e1000_update_mng_vlan(adapter);
1391 }
1da177e4 1392
e0aac5a2
AK		 1393 /* before we allocate an interrupt, we must be ready to handle it.
1394 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1395 * as soon as we call pci_request_irq, so we have to setup our
6cfbd97b
JK		 1396 * clean_rx handler before we do so.
1397 */
e0aac5a2
AK		 1398 e1000_configure(adapter);
1399
1400 err = e1000_request_irq(adapter);
1401 if (err)
1402 goto err_req_irq;
1403
1404 /* From here on the code is the same as e1000_up() */
1405 clear_bit(__E1000_DOWN, &adapter->flags);
1406
bea3348e 1407 napi_enable(&adapter->napi);
47313054 1408
e0aac5a2
AK		 1409 e1000_irq_enable(adapter);
1410
076152d5
BH		 1411 netif_start_queue(netdev);
1412
e0aac5a2 1413 /* fire a link status change interrupt to start the watchdog */
1dc32918 1414 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1415
1da177e4
LT		 1416 return E1000_SUCCESS;
1417
b5bf28cd 1418err_req_irq:
e0aac5a2 1419 e1000_power_down_phy(adapter);
581d708e 1420 e1000_free_all_rx_resources(adapter);
1da177e4 1421err_setup_rx:
581d708e 1422 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1423err_setup_tx:
1424 e1000_reset(adapter);
1425
1426 return err;
1427}
1428
1429/**
1430 * e1000_close - Disables a network interface
1431 * @netdev: network interface device structure
1432 *
1433 * Returns 0, this is not allowed to fail
1434 *
1435 * The close entry point is called when an interface is de-activated
1436 * by the OS. The hardware is still under the drivers control, but
1437 * needs to be disabled. A global MAC reset is issued to stop the
1438 * hardware, and all transmit and receive resources are freed.
1439 **/
64798845 1440static int e1000_close(struct net_device *netdev)
1da177e4 1441{
60490fe0 1442 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1443 struct e1000_hw *hw = &adapter->hw;
6a7d64e3 1444 int count = E1000_CHECK_RESET_COUNT;
1445
1446 while (test_bit(__E1000_RESETTING, &adapter->flags) && count--)
1447 usleep_range(10000, 20000);
1da177e4 1448
2db10a08 1449 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1450 e1000_down(adapter);
79f05bf0 1451 e1000_power_down_phy(adapter);
2db10a08 1452 e1000_free_irq(adapter);
1da177e4 1453
581d708e
MC		 1454 e1000_free_all_tx_resources(adapter);
1455 e1000_free_all_rx_resources(adapter);
1da177e4 1456
4666560a 1457 /* kill manageability vlan ID if supported, but not if a vlan with
6cfbd97b
JK		 1458 * the same ID is registered on the host OS (let 8021q kill it)
1459 */
1dc32918 1460 if ((hw->mng_cookie.status &
6cfbd97b
JK		 1461 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1462 !test_bit(adapter->mng_vlan_id, adapter->active_vlans)) {
80d5c368
PM		 1463 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
1464 adapter->mng_vlan_id);
2d7edb92 1465 }
b55ccb35 1466
1da177e4
LT		 1467 return 0;
1468}
1469
1470/**
1471 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1472 * @adapter: address of board private structure
2d7edb92
MC		 1473 * @start: address of beginning of memory
1474 * @len: length of memory
1da177e4 1475 **/
64798845
JP		 1476static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1477 unsigned long len)
1da177e4 1478{
1dc32918 1479 struct e1000_hw *hw = &adapter->hw;
e982f17c 1480 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1481 unsigned long end = begin + len;
1482
2648345f 1483 /* First rev 82545 and 82546 need to not allow any memory
6cfbd97b
JK		 1484 * write location to cross 64k boundary due to errata 23
1485 */
1dc32918 1486 if (hw->mac_type == e1000_82545 ||
5377a416 1487 hw->mac_type == e1000_ce4100 ||
1dc32918 1488 hw->mac_type == e1000_82546) {
c3033b01 1489 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1490 }
1491
c3033b01 1492 return true;
1da177e4
LT		 1493}
1494
1495/**
1496 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1497 * @adapter: board private structure
581d708e 1498 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1499 *
1500 * Return 0 on success, negative on failure
1501 **/
64798845
JP		 1502static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1503 struct e1000_tx_ring *txdr)
1da177e4 1504{
1da177e4
LT		 1505 struct pci_dev *pdev = adapter->pdev;
1506 int size;
1507
580f321d 1508 size = sizeof(struct e1000_tx_buffer) * txdr->count;
89bf67f1 1509 txdr->buffer_info = vzalloc(size);
14f8dc49 1510 if (!txdr->buffer_info)
1da177e4 1511 return -ENOMEM;
1da177e4
LT		 1512
1513 /* round up to nearest 4K */
1514
1515 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1516 txdr->size = ALIGN(txdr->size, 4096);
1da177e4 1517
b16f53be
NN		 1518 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1519 GFP_KERNEL);
96838a40 1520 if (!txdr->desc) {
1da177e4 1521setup_tx_desc_die:
1da177e4
LT		 1522 vfree(txdr->buffer_info);
1523 return -ENOMEM;
1524 }
1525
2648345f 1526 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1527 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1528 void *olddesc = txdr->desc;
1529 dma_addr_t olddma = txdr->dma;
feb8f478 1530 e_err(tx_err, "txdr align check failed: %u bytes at %p\n",
675ad473 1531 txdr->size, txdr->desc);
2648345f 1532 /* Try again, without freeing the previous */
b16f53be
NN		 1533 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
1534 &txdr->dma, GFP_KERNEL);
2648345f 1535 /* Failed allocation, critical failure */
96838a40 1536 if (!txdr->desc) {
b16f53be
NN		 1537 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1538 olddma);
1da177e4
LT		 1539 goto setup_tx_desc_die;
1540 }
1541
1542 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1543 /* give up */
b16f53be
NN		 1544 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
1545 txdr->dma);
1546 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1547 olddma);
feb8f478 1548 e_err(probe, "Unable to allocate aligned memory "
675ad473 1549 "for the transmit descriptor ring\n");
1da177e4
LT		 1550 vfree(txdr->buffer_info);
1551 return -ENOMEM;
1552 } else {
2648345f 1553 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1554 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1555 olddma);
1da177e4
LT		 1556 }
1557 }
1558 memset(txdr->desc, 0, txdr->size);
1559
1560 txdr->next_to_use = 0;
1561 txdr->next_to_clean = 0;
1562
1563 return 0;
1564}
1565
581d708e
MC		 1566/**
1567 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1568 * (Descriptors) for all queues
1569 * @adapter: board private structure
1570 *
581d708e
MC		 1571 * Return 0 on success, negative on failure
1572 **/
64798845 1573int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1574{
1575 int i, err = 0;
1576
f56799ea 1577 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1578 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1579 if (err) {
feb8f478 1580 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1581 for (i-- ; i >= 0; i--)
1582 e1000_free_tx_resources(adapter,
1583 &adapter->tx_ring[i]);
581d708e
MC		 1584 break;
1585 }
1586 }
1587
1588 return err;
1589}
1590
1da177e4
LT		 1591/**
1592 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1593 * @adapter: board private structure
1594 *
1595 * Configure the Tx unit of the MAC after a reset.
1596 **/
64798845 1597static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1598{
406874a7 1599 u64 tdba;
581d708e 1600 struct e1000_hw *hw = &adapter->hw;
1532ecea 1601 u32 tdlen, tctl, tipg;
406874a7 1602 u32 ipgr1, ipgr2;
1da177e4
LT		 1603
1604 /* Setup the HW Tx Head and Tail descriptor pointers */
1605
f56799ea 1606 switch (adapter->num_tx_queues) {
24025e4e
MC		 1607 case 1:
1608 default:
581d708e
MC		 1609 tdba = adapter->tx_ring[0].dma;
1610 tdlen = adapter->tx_ring[0].count *
1611 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1612 ew32(TDLEN, tdlen);
1613 ew32(TDBAH, (tdba >> 32));
1614 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1615 ew32(TDT, 0);
1616 ew32(TDH, 0);
6cfbd97b
JK		 1617 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ?
1618 E1000_TDH : E1000_82542_TDH);
1619 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ?
1620 E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1621 break;
1622 }
1da177e4
LT		 1623
1624 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1625 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1626 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1627 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1628 else
1629 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1630
581d708e 1631 switch (hw->mac_type) {
1da177e4
LT		 1632 case e1000_82542_rev2_0:
1633 case e1000_82542_rev2_1:
1634 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1635 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1636 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1637 break;
1638 default:
0fadb059
JK		 1639 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1640 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1641 break;
1da177e4 1642 }
0fadb059
JK		 1643 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1644 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1645 ew32(TIPG, tipg);
1da177e4
LT		 1646
1647 /* Set the Tx Interrupt Delay register */
1648
1dc32918 1649 ew32(TIDV, adapter->tx_int_delay);
581d708e 1650 if (hw->mac_type >= e1000_82540)
1dc32918 1651 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1652
1653 /* Program the Transmit Control Register */
1654
1dc32918 1655 tctl = er32(TCTL);
1da177e4 1656 tctl &= ~E1000_TCTL_CT;
7e6c9861 1657 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1658 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1659
581d708e 1660 e1000_config_collision_dist(hw);
1da177e4
LT		 1661
1662 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1663 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1664
1665 /* only set IDE if we are delaying interrupts using the timers */
1666 if (adapter->tx_int_delay)
1667 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1668
581d708e 1669 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1670 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1671 else
1672 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1673
1674 /* Cache if we're 82544 running in PCI-X because we'll
6cfbd97b
JK		 1675 * need this to apply a workaround later in the send path.
1676 */
581d708e
MC		 1677 if (hw->mac_type == e1000_82544 &&
1678 hw->bus_type == e1000_bus_type_pcix)
3db1cd5c 1679 adapter->pcix_82544 = true;
7e6c9861 1680
1dc32918 1681 ew32(TCTL, tctl);
7e6c9861 1682
1da177e4
LT		 1683}
1684
1685/**
1686 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1687 * @adapter: board private structure
581d708e 1688 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1689 *
1690 * Returns 0 on success, negative on failure
1691 **/
64798845
JP		 1692static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1693 struct e1000_rx_ring *rxdr)
1da177e4 1694{
1da177e4 1695 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1696 int size, desc_len;
1da177e4 1697
93f0afe9 1698 size = sizeof(struct e1000_rx_buffer) * rxdr->count;
89bf67f1 1699 rxdr->buffer_info = vzalloc(size);
14f8dc49 1700 if (!rxdr->buffer_info)
1da177e4 1701 return -ENOMEM;
1da177e4 1702
1532ecea 1703 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1704
1da177e4
LT		 1705 /* Round up to nearest 4K */
1706
2d7edb92 1707 rxdr->size = rxdr->count * desc_len;
9099cfb9 1708 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4 1709
b16f53be
NN		 1710 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1711 GFP_KERNEL);
581d708e 1712 if (!rxdr->desc) {
1da177e4 1713setup_rx_desc_die:
1da177e4
LT		 1714 vfree(rxdr->buffer_info);
1715 return -ENOMEM;
1716 }
1717
2648345f 1718 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1719 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1720 void *olddesc = rxdr->desc;
1721 dma_addr_t olddma = rxdr->dma;
feb8f478 1722 e_err(rx_err, "rxdr align check failed: %u bytes at %p\n",
675ad473 1723 rxdr->size, rxdr->desc);
2648345f 1724 /* Try again, without freeing the previous */
b16f53be
NN		 1725 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size,
1726 &rxdr->dma, GFP_KERNEL);
2648345f 1727 /* Failed allocation, critical failure */
581d708e 1728 if (!rxdr->desc) {
b16f53be
NN		 1729 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1730 olddma);
1da177e4
LT		 1731 goto setup_rx_desc_die;
1732 }
1733
1734 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1735 /* give up */
b16f53be
NN		 1736 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
1737 rxdr->dma);
1738 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1739 olddma);
feb8f478
ET		 1740 e_err(probe, "Unable to allocate aligned memory for "
1741 "the Rx descriptor ring\n");
581d708e 1742 goto setup_rx_desc_die;
1da177e4 1743 } else {
2648345f 1744 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1745 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1746 olddma);
1da177e4
LT		 1747 }
1748 }
1749 memset(rxdr->desc, 0, rxdr->size);
1750
1751 rxdr->next_to_clean = 0;
1752 rxdr->next_to_use = 0;
edbbb3ca 1753 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1754
1755 return 0;
1756}
1757
581d708e
MC		 1758/**
1759 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1760 * (Descriptors) for all queues
1761 * @adapter: board private structure
1762 *
581d708e
MC		 1763 * Return 0 on success, negative on failure
1764 **/
64798845 1765int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1766{
1767 int i, err = 0;
1768
f56799ea 1769 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1770 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1771 if (err) {
feb8f478 1772 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1773 for (i-- ; i >= 0; i--)
1774 e1000_free_rx_resources(adapter,
1775 &adapter->rx_ring[i]);
581d708e
MC		 1776 break;
1777 }
1778 }
1779
1780 return err;
1781}
1782
1da177e4 1783/**
2648345f 1784 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1785 * @adapter: Board private structure
1786 **/
64798845 1787static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1788{
1dc32918 1789 struct e1000_hw *hw = &adapter->hw;
630b25cd 1790 u32 rctl;
1da177e4 1791
1dc32918 1792 rctl = er32(RCTL);
1da177e4
LT		 1793
1794 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1795
d5bc77a2
DN		 1796 rctl |= E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
1797 E1000_RCTL_RDMTS_HALF |
1dc32918 1798 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1799
1dc32918 1800 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1801 rctl |= E1000_RCTL_SBP;
1802 else
1803 rctl &= ~E1000_RCTL_SBP;
1804
2d7edb92
MC		 1805 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1806 rctl &= ~E1000_RCTL_LPE;
1807 else
1808 rctl |= E1000_RCTL_LPE;
1809
1da177e4 1810 /* Setup buffer sizes */
9e2feace
AK		 1811 rctl &= ~E1000_RCTL_SZ_4096;
1812 rctl |= E1000_RCTL_BSEX;
1813 switch (adapter->rx_buffer_len) {
a1415ee6
JK		 1814 case E1000_RXBUFFER_2048:
1815 default:
1816 rctl |= E1000_RCTL_SZ_2048;
1817 rctl &= ~E1000_RCTL_BSEX;
1818 break;
1819 case E1000_RXBUFFER_4096:
1820 rctl |= E1000_RCTL_SZ_4096;
1821 break;
1822 case E1000_RXBUFFER_8192:
1823 rctl |= E1000_RCTL_SZ_8192;
1824 break;
1825 case E1000_RXBUFFER_16384:
1826 rctl |= E1000_RCTL_SZ_16384;
1827 break;
2d7edb92
MC		 1828 }
1829
e825b731
BG		 1830 /* This is useful for sniffing bad packets. */
1831 if (adapter->netdev->features & NETIF_F_RXALL) {
1832 /* UPE and MPE will be handled by normal PROMISC logic
6cfbd97b
JK		 1833 * in e1000e_set_rx_mode
1834 */
e825b731
BG		 1835 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
1836 E1000_RCTL_BAM | /* RX All Bcast Pkts */
1837 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
1838
1839 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
1840 E1000_RCTL_DPF | /* Allow filtered pause */
1841 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
1842 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
1843 * and that breaks VLANs.
1844 */
1845 }
1846
1dc32918 1847 ew32(RCTL, rctl);
1da177e4
LT		 1848}
1849
1850/**
1851 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1852 * @adapter: board private structure
1853 *
1854 * Configure the Rx unit of the MAC after a reset.
1855 **/
64798845 1856static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1857{
406874a7 1858 u64 rdba;
581d708e 1859 struct e1000_hw *hw = &adapter->hw;
1532ecea 1860 u32 rdlen, rctl, rxcsum;
2d7edb92 1861
edbbb3ca
JB		 1862 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1863 rdlen = adapter->rx_ring[0].count *
1864 sizeof(struct e1000_rx_desc);
1865 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1866 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1867 } else {
1868 rdlen = adapter->rx_ring[0].count *
1869 sizeof(struct e1000_rx_desc);
1870 adapter->clean_rx = e1000_clean_rx_irq;
1871 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1872 }
1da177e4
LT		 1873
1874 /* disable receives while setting up the descriptors */
1dc32918
JP		 1875 rctl = er32(RCTL);
1876 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1877
1878 /* set the Receive Delay Timer Register */
1dc32918 1879 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1880
581d708e 1881 if (hw->mac_type >= e1000_82540) {
1dc32918 1882 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1883 if (adapter->itr_setting != 0)
1dc32918 1884 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1885 }
1886
581d708e 1887 /* Setup the HW Rx Head and Tail Descriptor Pointers and
6cfbd97b
JK		 1888 * the Base and Length of the Rx Descriptor Ring
1889 */
f56799ea 1890 switch (adapter->num_rx_queues) {
24025e4e
MC		 1891 case 1:
1892 default:
581d708e 1893 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 1894 ew32(RDLEN, rdlen);
1895 ew32(RDBAH, (rdba >> 32));
1896 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1897 ew32(RDT, 0);
1898 ew32(RDH, 0);
6cfbd97b
JK		 1899 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ?
1900 E1000_RDH : E1000_82542_RDH);
1901 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ?
1902 E1000_RDT : E1000_82542_RDT);
581d708e 1903 break;
24025e4e
MC		 1904 }
1905
1da177e4 1906 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1907 if (hw->mac_type >= e1000_82543) {
1dc32918 1908 rxcsum = er32(RXCSUM);
630b25cd 1909 if (adapter->rx_csum)
2d7edb92 1910 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1911 else
2d7edb92 1912 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1913 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1914 ew32(RXCSUM, rxcsum);
1da177e4
LT		 1915 }
1916
1917 /* Enable Receives */
d5bc77a2 1918 ew32(RCTL, rctl | E1000_RCTL_EN);
1da177e4
LT		 1919}
1920
1921/**
581d708e 1922 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1923 * @adapter: board private structure
581d708e 1924 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1925 *
1926 * Free all transmit software resources
1927 **/
64798845
JP		 1928static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1929 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1930{
1931 struct pci_dev *pdev = adapter->pdev;
1932
581d708e 1933 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1934
581d708e
MC		 1935 vfree(tx_ring->buffer_info);
1936 tx_ring->buffer_info = NULL;
1da177e4 1937
b16f53be
NN		 1938 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1939 tx_ring->dma);
1da177e4 1940
581d708e
MC		 1941 tx_ring->desc = NULL;
1942}
1943
1944/**
1945 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1946 * @adapter: board private structure
1947 *
1948 * Free all transmit software resources
1949 **/
64798845 1950void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1951{
1952 int i;
1953
f56799ea 1954 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1955 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1956}
1957
580f321d
FW		 1958static void
1959e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1960 struct e1000_tx_buffer *buffer_info)
1da177e4 1961{
602c0554
AD		 1962 if (buffer_info->dma) {
1963 if (buffer_info->mapped_as_page)
b16f53be
NN		 1964 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1965 buffer_info->length, DMA_TO_DEVICE);
602c0554 1966 else
b16f53be 1967 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
602c0554 1968 buffer_info->length,
b16f53be 1969 DMA_TO_DEVICE);
602c0554
AD		 1970 buffer_info->dma = 0;
1971 }
a9ebadd6 1972 if (buffer_info->skb) {
1da177e4 1973 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 1974 buffer_info->skb = NULL;
1975 }
37e73df8 1976 buffer_info->time_stamp = 0;
a9ebadd6 1977 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 1978}
1979
1980/**
1981 * e1000_clean_tx_ring - Free Tx Buffers
1982 * @adapter: board private structure
581d708e 1983 * @tx_ring: ring to be cleaned
1da177e4 1984 **/
64798845
JP		 1985static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1986 struct e1000_tx_ring *tx_ring)
1da177e4 1987{
1dc32918 1988 struct e1000_hw *hw = &adapter->hw;
580f321d 1989 struct e1000_tx_buffer *buffer_info;
1da177e4
LT		 1990 unsigned long size;
1991 unsigned int i;
1992
1993 /* Free all the Tx ring sk_buffs */
1994
96838a40 1995 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1996 buffer_info = &tx_ring->buffer_info[i];
1997 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1998 }
1999
2f66fd36 2000 netdev_reset_queue(adapter->netdev);
580f321d 2001 size = sizeof(struct e1000_tx_buffer) * tx_ring->count;
1da177e4
LT		 2002 memset(tx_ring->buffer_info, 0, size);
2003
2004 /* Zero out the descriptor ring */
2005
2006 memset(tx_ring->desc, 0, tx_ring->size);
2007
2008 tx_ring->next_to_use = 0;
2009 tx_ring->next_to_clean = 0;
3db1cd5c 2010 tx_ring->last_tx_tso = false;
1da177e4 2011
1dc32918
JP		 2012 writel(0, hw->hw_addr + tx_ring->tdh);
2013 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2014}
2015
2016/**
2017 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2018 * @adapter: board private structure
2019 **/
64798845 2020static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2021{
2022 int i;
2023
f56799ea 2024 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2025 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2026}
2027
2028/**
2029 * e1000_free_rx_resources - Free Rx Resources
2030 * @adapter: board private structure
581d708e 2031 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2032 *
2033 * Free all receive software resources
2034 **/
64798845
JP		 2035static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2036 struct e1000_rx_ring *rx_ring)
1da177e4 2037{
1da177e4
LT		 2038 struct pci_dev *pdev = adapter->pdev;
2039
581d708e 2040 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2041
2042 vfree(rx_ring->buffer_info);
2043 rx_ring->buffer_info = NULL;
2044
b16f53be
NN		 2045 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2046 rx_ring->dma);
1da177e4
LT		 2047
2048 rx_ring->desc = NULL;
2049}
2050
2051/**
581d708e 2052 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2053 * @adapter: board private structure
581d708e
MC		 2054 *
2055 * Free all receive software resources
2056 **/
64798845 2057void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2058{
2059 int i;
2060
f56799ea 2061 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2062 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2063}
2064
13809609
FW		 2065#define E1000_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN)
2066static unsigned int e1000_frag_len(const struct e1000_adapter *a)
2067{
2068 return SKB_DATA_ALIGN(a->rx_buffer_len + E1000_HEADROOM) +
2069 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
2070}
2071
2072static void *e1000_alloc_frag(const struct e1000_adapter *a)
2073{
2074 unsigned int len = e1000_frag_len(a);
2075 u8 *data = netdev_alloc_frag(len);
2076
2077 if (likely(data))
2078 data += E1000_HEADROOM;
2079 return data;
2080}
2081
581d708e
MC		 2082/**
2083 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2084 * @adapter: board private structure
2085 * @rx_ring: ring to free buffers from
1da177e4 2086 **/
64798845
JP		 2087static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2088 struct e1000_rx_ring *rx_ring)
1da177e4 2089{
1dc32918 2090 struct e1000_hw *hw = &adapter->hw;
93f0afe9 2091 struct e1000_rx_buffer *buffer_info;
1da177e4
LT		 2092 struct pci_dev *pdev = adapter->pdev;
2093 unsigned long size;
630b25cd 2094 unsigned int i;
1da177e4 2095
13809609 2096 /* Free all the Rx netfrags */
96838a40 2097 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2098 buffer_info = &rx_ring->buffer_info[i];
13809609
FW		 2099 if (adapter->clean_rx == e1000_clean_rx_irq) {
2100 if (buffer_info->dma)
2101 dma_unmap_single(&pdev->dev, buffer_info->dma,
2102 adapter->rx_buffer_len,
2103 DMA_FROM_DEVICE);
2104 if (buffer_info->rxbuf.data) {
6bf93ba8 2105 skb_free_frag(buffer_info->rxbuf.data);
13809609
FW		 2106 buffer_info->rxbuf.data = NULL;
2107 }
2108 } else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
2109 if (buffer_info->dma)
2110 dma_unmap_page(&pdev->dev, buffer_info->dma,
2111 adapter->rx_buffer_len,
2112 DMA_FROM_DEVICE);
2113 if (buffer_info->rxbuf.page) {
2114 put_page(buffer_info->rxbuf.page);
2115 buffer_info->rxbuf.page = NULL;
2116 }
679be3ba 2117 }
1da177e4 2118
679be3ba 2119 buffer_info->dma = 0;
1da177e4
LT		 2120 }
2121
edbbb3ca 2122 /* there also may be some cached data from a chained receive */
de591c78
FW		 2123 napi_free_frags(&adapter->napi);
2124 rx_ring->rx_skb_top = NULL;
edbbb3ca 2125
93f0afe9 2126 size = sizeof(struct e1000_rx_buffer) * rx_ring->count;
1da177e4
LT		 2127 memset(rx_ring->buffer_info, 0, size);
2128
2129 /* Zero out the descriptor ring */
1da177e4
LT		 2130 memset(rx_ring->desc, 0, rx_ring->size);
2131
2132 rx_ring->next_to_clean = 0;
2133 rx_ring->next_to_use = 0;
2134
1dc32918
JP		 2135 writel(0, hw->hw_addr + rx_ring->rdh);
2136 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2137}
2138
2139/**
2140 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2141 * @adapter: board private structure
2142 **/
64798845 2143static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2144{
2145 int i;
2146
f56799ea 2147 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2148 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2149}
2150
2151/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2152 * and memory write and invalidate disabled for certain operations
2153 */
64798845 2154static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2155{
1dc32918 2156 struct e1000_hw *hw = &adapter->hw;
1da177e4 2157 struct net_device *netdev = adapter->netdev;
406874a7 2158 u32 rctl;
1da177e4 2159
1dc32918 2160 e1000_pci_clear_mwi(hw);
1da177e4 2161
1dc32918 2162 rctl = er32(RCTL);
1da177e4 2163 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2164 ew32(RCTL, rctl);
2165 E1000_WRITE_FLUSH();
1da177e4
LT		 2166 mdelay(5);
2167
96838a40 2168 if (netif_running(netdev))
581d708e 2169 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2170}
2171
64798845 2172static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2173{
1dc32918 2174 struct e1000_hw *hw = &adapter->hw;
1da177e4 2175 struct net_device *netdev = adapter->netdev;
406874a7 2176 u32 rctl;
1da177e4 2177
1dc32918 2178 rctl = er32(RCTL);
1da177e4 2179 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2180 ew32(RCTL, rctl);
2181 E1000_WRITE_FLUSH();
1da177e4
LT		 2182 mdelay(5);
2183
1dc32918
JP		 2184 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2185 e1000_pci_set_mwi(hw);
1da177e4 2186
96838a40 2187 if (netif_running(netdev)) {
72d64a43
JK		 2188 /* No need to loop, because 82542 supports only 1 queue */
2189 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2190 e1000_configure_rx(adapter);
72d64a43 2191 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2192 }
2193}
2194
2195/**
2196 * e1000_set_mac - Change the Ethernet Address of the NIC
2197 * @netdev: network interface device structure
2198 * @p: pointer to an address structure
2199 *
2200 * Returns 0 on success, negative on failure
2201 **/
64798845 2202static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2203{
60490fe0 2204 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2205 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2206 struct sockaddr *addr = p;
2207
96838a40 2208 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2209 return -EADDRNOTAVAIL;
2210
2211 /* 82542 2.0 needs to be in reset to write receive address registers */
2212
1dc32918 2213 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2214 e1000_enter_82542_rst(adapter);
2215
2216 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2217 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2218
1dc32918 2219 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2220
1dc32918 2221 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2222 e1000_leave_82542_rst(adapter);
2223
2224 return 0;
2225}
2226
2227/**
db0ce50d 2228 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2229 * @netdev: network interface device structure
2230 *
db0ce50d
PM		 2231 * The set_rx_mode entry point is called whenever the unicast or multicast
2232 * address lists or the network interface flags are updated. This routine is
2233 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2234 * promiscuous mode, and all-multi behavior.
2235 **/
64798845 2236static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2237{
60490fe0 2238 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2239 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2240 struct netdev_hw_addr *ha;
2241 bool use_uc = false;
406874a7
JP		 2242 u32 rctl;
2243 u32 hash_value;
868d5309 2244 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2245 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2246 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2247
14f8dc49 2248 if (!mcarray)
81c52285 2249 return;
cd94dd0b 2250
2648345f
MC		 2251 /* Check for Promiscuous and All Multicast modes */
2252
1dc32918 2253 rctl = er32(RCTL);
1da177e4 2254
96838a40 2255 if (netdev->flags & IFF_PROMISC) {
1da177e4 2256 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2257 rctl &= ~E1000_RCTL_VFE;
1da177e4 2258 } else {
1532ecea 2259 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2260 rctl |= E1000_RCTL_MPE;
1532ecea 2261 else
746b9f02 2262 rctl &= ~E1000_RCTL_MPE;
1532ecea 2263 /* Enable VLAN filter if there is a VLAN */
5622e404 2264 if (e1000_vlan_used(adapter))
1532ecea 2265 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2266 }
2267
32e7bfc4 2268 if (netdev_uc_count(netdev) > rar_entries - 1) {
db0ce50d
PM		 2269 rctl |= E1000_RCTL_UPE;
2270 } else if (!(netdev->flags & IFF_PROMISC)) {
2271 rctl &= ~E1000_RCTL_UPE;
ccffad25 2272 use_uc = true;
1da177e4
LT		 2273 }
2274
1dc32918 2275 ew32(RCTL, rctl);
1da177e4
LT		 2276
2277 /* 82542 2.0 needs to be in reset to write receive address registers */
2278
96838a40 2279 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2280 e1000_enter_82542_rst(adapter);
2281
db0ce50d
PM		 2282 /* load the first 14 addresses into the exact filters 1-14. Unicast
2283 * addresses take precedence to avoid disabling unicast filtering
2284 * when possible.
2285 *
b595076a 2286 * RAR 0 is used for the station MAC address
1da177e4
LT		 2287 * if there are not 14 addresses, go ahead and clear the filters
2288 */
ccffad25
JP		 2289 i = 1;
2290 if (use_uc)
32e7bfc4 2291 netdev_for_each_uc_addr(ha, netdev) {
ccffad25
JP		 2292 if (i == rar_entries)
2293 break;
2294 e1000_rar_set(hw, ha->addr, i++);
2295 }
2296
22bedad3 2297 netdev_for_each_mc_addr(ha, netdev) {
7a81e9f3
JP		 2298 if (i == rar_entries) {
2299 /* load any remaining addresses into the hash table */
2300 u32 hash_reg, hash_bit, mta;
22bedad3 2301 hash_value = e1000_hash_mc_addr(hw, ha->addr);
7a81e9f3
JP		 2302 hash_reg = (hash_value >> 5) & 0x7F;
2303 hash_bit = hash_value & 0x1F;
2304 mta = (1 << hash_bit);
2305 mcarray[hash_reg] |= mta;
10886af5 2306 } else {
22bedad3 2307 e1000_rar_set(hw, ha->addr, i++);
1da177e4
LT		 2308 }
2309 }
2310
7a81e9f3
JP		 2311 for (; i < rar_entries; i++) {
2312 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2313 E1000_WRITE_FLUSH();
2314 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2315 E1000_WRITE_FLUSH();
1da177e4
LT		 2316 }
2317
81c52285 2318 /* write the hash table completely, write from bottom to avoid
6cfbd97b
JK		 2319 * both stupid write combining chipsets, and flushing each write
2320 */
81c52285 2321 for (i = mta_reg_count - 1; i >= 0 ; i--) {
6cfbd97b 2322 /* If we are on an 82544 has an errata where writing odd
81c52285
JB		 2323 * offsets overwrites the previous even offset, but writing
2324 * backwards over the range solves the issue by always
2325 * writing the odd offset first
2326 */
2327 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2328 }
2329 E1000_WRITE_FLUSH();
2330
96838a40 2331 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2332 e1000_leave_82542_rst(adapter);
81c52285
JB		 2333
2334 kfree(mcarray);
1da177e4
LT		 2335}
2336
a4010afe
JB		 2337/**
2338 * e1000_update_phy_info_task - get phy info
2339 * @work: work struct contained inside adapter struct
2340 *
2341 * Need to wait a few seconds after link up to get diagnostic information from
2342 * the phy
2343 */
5cf42fcd
JB		 2344static void e1000_update_phy_info_task(struct work_struct *work)
2345{
2346 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2347 struct e1000_adapter,
2348 phy_info_task.work);
b2f963bf 2349
a4010afe 2350 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
1da177e4
LT		 2351}
2352
5cf42fcd
JB		 2353/**
2354 * e1000_82547_tx_fifo_stall_task - task to complete work
2355 * @work: work struct contained inside adapter struct
2356 **/
2357static void e1000_82547_tx_fifo_stall_task(struct work_struct *work)
2358{
2359 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2360 struct e1000_adapter,
2361 fifo_stall_task.work);
1dc32918 2362 struct e1000_hw *hw = &adapter->hw;
1da177e4 2363 struct net_device *netdev = adapter->netdev;
406874a7 2364 u32 tctl;
1da177e4 2365
96838a40 2366 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2367 if ((er32(TDT) == er32(TDH)) &&
2368 (er32(TDFT) == er32(TDFH)) &&
2369 (er32(TDFTS) == er32(TDFHS))) {
2370 tctl = er32(TCTL);
2371 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2372 ew32(TDFT, adapter->tx_head_addr);
2373 ew32(TDFH, adapter->tx_head_addr);
2374 ew32(TDFTS, adapter->tx_head_addr);
2375 ew32(TDFHS, adapter->tx_head_addr);
2376 ew32(TCTL, tctl);
2377 E1000_WRITE_FLUSH();
1da177e4
LT		 2378
2379 adapter->tx_fifo_head = 0;
2380 atomic_set(&adapter->tx_fifo_stall, 0);
2381 netif_wake_queue(netdev);
baa34745 2382 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
a4010afe 2383 schedule_delayed_work(&adapter->fifo_stall_task, 1);
1da177e4
LT		 2384 }
2385 }
2386}
2387
b548192a 2388bool e1000_has_link(struct e1000_adapter *adapter)
be0f0719
JB		 2389{
2390 struct e1000_hw *hw = &adapter->hw;
2391 bool link_active = false;
be0f0719 2392
6d9e5130
NS		 2393 /* get_link_status is set on LSC (link status) interrupt or rx
2394 * sequence error interrupt (except on intel ce4100).
2395 * get_link_status will stay false until the
2396 * e1000_check_for_link establishes link for copper adapters
2397 * ONLY
be0f0719
JB		 2398 */
2399 switch (hw->media_type) {
2400 case e1000_media_type_copper:
6d9e5130
NS		 2401 if (hw->mac_type == e1000_ce4100)
2402 hw->get_link_status = 1;
be0f0719 2403 if (hw->get_link_status) {
120a5d0d 2404 e1000_check_for_link(hw);
be0f0719
JB		 2405 link_active = !hw->get_link_status;
2406 } else {
2407 link_active = true;
2408 }
2409 break;
2410 case e1000_media_type_fiber:
120a5d0d 2411 e1000_check_for_link(hw);
be0f0719
JB		 2412 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2413 break;
2414 case e1000_media_type_internal_serdes:
120a5d0d 2415 e1000_check_for_link(hw);
be0f0719
JB		 2416 link_active = hw->serdes_has_link;
2417 break;
2418 default:
2419 break;
2420 }
2421
2422 return link_active;
2423}
2424
1da177e4 2425/**
a4010afe
JB		 2426 * e1000_watchdog - work function
2427 * @work: work struct contained inside adapter struct
1da177e4 2428 **/
a4010afe 2429static void e1000_watchdog(struct work_struct *work)
1da177e4 2430{
a4010afe
JB		 2431 struct e1000_adapter *adapter = container_of(work,
2432 struct e1000_adapter,
2433 watchdog_task.work);
1dc32918 2434 struct e1000_hw *hw = &adapter->hw;
1da177e4 2435 struct net_device *netdev = adapter->netdev;
545c67c0 2436 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2437 u32 link, tctl;
90fb5135 2438
be0f0719
JB		 2439 link = e1000_has_link(adapter);
2440 if ((netif_carrier_ok(netdev)) && link)
2441 goto link_up;
1da177e4 2442
96838a40
JB		 2443 if (link) {
2444 if (!netif_carrier_ok(netdev)) {
406874a7 2445 u32 ctrl;
c3033b01 2446 bool txb2b = true;
be0f0719 2447 /* update snapshot of PHY registers on LSC */
1dc32918 2448 e1000_get_speed_and_duplex(hw,
6cfbd97b
JK		 2449 &adapter->link_speed,
2450 &adapter->link_duplex);
1da177e4 2451
1dc32918 2452 ctrl = er32(CTRL);
675ad473
ET		 2453 pr_info("%s NIC Link is Up %d Mbps %s, "
2454 "Flow Control: %s\n",
2455 netdev->name,
2456 adapter->link_speed,
2457 adapter->link_duplex == FULL_DUPLEX ?
2458 "Full Duplex" : "Half Duplex",
2459 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2460 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2461 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2462 E1000_CTRL_TFCE) ? "TX" : "None")));
1da177e4 2463
39ca5f03 2464 /* adjust timeout factor according to speed/duplex */
66a2b0a3 2465 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2466 switch (adapter->link_speed) {
2467 case SPEED_10:
c3033b01 2468 txb2b = false;
be0f0719 2469 adapter->tx_timeout_factor = 16;
7e6c9861
JK		 2470 break;
2471 case SPEED_100:
c3033b01 2472 txb2b = false;
7e6c9861
JK		 2473 /* maybe add some timeout factor ? */
2474 break;
2475 }
2476
1532ecea 2477 /* enable transmits in the hardware */
1dc32918 2478 tctl = er32(TCTL);
7e6c9861 2479 tctl |= E1000_TCTL_EN;
1dc32918 2480 ew32(TCTL, tctl);
66a2b0a3 2481
1da177e4 2482 netif_carrier_on(netdev);
baa34745 2483 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2484 schedule_delayed_work(&adapter->phy_info_task,
2485 2 * HZ);
1da177e4
LT		 2486 adapter->smartspeed = 0;
2487 }
2488 } else {
96838a40 2489 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2490 adapter->link_speed = 0;
2491 adapter->link_duplex = 0;
675ad473
ET		 2492 pr_info("%s NIC Link is Down\n",
2493 netdev->name);
1da177e4 2494 netif_carrier_off(netdev);
baa34745
JB		 2495
2496 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2497 schedule_delayed_work(&adapter->phy_info_task,
2498 2 * HZ);
1da177e4
LT		 2499 }
2500
2501 e1000_smartspeed(adapter);
2502 }
2503
be0f0719 2504link_up:
1da177e4
LT		 2505 e1000_update_stats(adapter);
2506
1dc32918 2507 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2508 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2509 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2510 adapter->colc_old = adapter->stats.colc;
2511
2512 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2513 adapter->gorcl_old = adapter->stats.gorcl;
2514 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2515 adapter->gotcl_old = adapter->stats.gotcl;
2516
1dc32918 2517 e1000_update_adaptive(hw);
1da177e4 2518
f56799ea 2519 if (!netif_carrier_ok(netdev)) {
581d708e 2520 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2521 /* We've lost link, so the controller stops DMA,
2522 * but we've got queued Tx work that's never going
2523 * to get done, so reset controller to flush Tx.
6cfbd97b
JK		 2524 * (Do the reset outside of interrupt context).
2525 */
87041639
JK		 2526 adapter->tx_timeout_count++;
2527 schedule_work(&adapter->reset_task);
0ef4eedc 2528 /* exit immediately since reset is imminent */
b2f963bf 2529 return;
1da177e4
LT		 2530 }
2531 }
2532
eab2abf5
JB		 2533 /* Simple mode for Interrupt Throttle Rate (ITR) */
2534 if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) {
6cfbd97b 2535 /* Symmetric Tx/Rx gets a reduced ITR=2000;
eab2abf5
JB		 2536 * Total asymmetrical Tx or Rx gets ITR=8000;
2537 * everyone else is between 2000-8000.
2538 */
2539 u32 goc = (adapter->gotcl + adapter->gorcl) / 10000;
2540 u32 dif = (adapter->gotcl > adapter->gorcl ?
2541 adapter->gotcl - adapter->gorcl :
2542 adapter->gorcl - adapter->gotcl) / 10000;
2543 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2544
2545 ew32(ITR, 1000000000 / (itr * 256));
2546 }
2547
1da177e4 2548 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2549 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2550
2648345f 2551 /* Force detection of hung controller every watchdog period */
c3033b01 2552 adapter->detect_tx_hung = true;
1da177e4 2553
a4010afe 2554 /* Reschedule the task */
baa34745 2555 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 2556 schedule_delayed_work(&adapter->watchdog_task, 2 * HZ);
1da177e4
LT		 2557}
2558
835bb129
JB		 2559enum latency_range {
2560 lowest_latency = 0,
2561 low_latency = 1,
2562 bulk_latency = 2,
2563 latency_invalid = 255
2564};
2565
2566/**
2567 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB		 2568 * @adapter: pointer to adapter
2569 * @itr_setting: current adapter->itr
2570 * @packets: the number of packets during this measurement interval
2571 * @bytes: the number of bytes during this measurement interval
2572 *
835bb129
JB		 2573 * Stores a new ITR value based on packets and byte
2574 * counts during the last interrupt. The advantage of per interrupt
2575 * computation is faster updates and more accurate ITR for the current
2576 * traffic pattern. Constants in this function were computed
2577 * based on theoretical maximum wire speed and thresholds were set based
2578 * on testing data as well as attempting to minimize response time
2579 * while increasing bulk throughput.
2580 * this functionality is controlled by the InterruptThrottleRate module
2581 * parameter (see e1000_param.c)
835bb129
JB		 2582 **/
2583static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2584 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2585{
2586 unsigned int retval = itr_setting;
2587 struct e1000_hw *hw = &adapter->hw;
2588
2589 if (unlikely(hw->mac_type < e1000_82540))
2590 goto update_itr_done;
2591
2592 if (packets == 0)
2593 goto update_itr_done;
2594
835bb129
JB		 2595 switch (itr_setting) {
2596 case lowest_latency:
2b65326e
JB		 2597 /* jumbo frames get bulk treatment*/
2598 if (bytes/packets > 8000)
2599 retval = bulk_latency;
2600 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2601 retval = low_latency;
2602 break;
2603 case low_latency: /* 50 usec aka 20000 ints/s */
2604 if (bytes > 10000) {
2b65326e
JB		 2605 /* jumbo frames need bulk latency setting */
2606 if (bytes/packets > 8000)
2607 retval = bulk_latency;
2608 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2609 retval = bulk_latency;
2610 else if ((packets > 35))
2611 retval = lowest_latency;
2b65326e
JB		 2612 } else if (bytes/packets > 2000)
2613 retval = bulk_latency;
2614 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2615 retval = lowest_latency;
2616 break;
2617 case bulk_latency: /* 250 usec aka 4000 ints/s */
2618 if (bytes > 25000) {
2619 if (packets > 35)
2620 retval = low_latency;
2b65326e
JB		 2621 } else if (bytes < 6000) {
2622 retval = low_latency;
835bb129
JB		 2623 }
2624 break;
2625 }
2626
2627update_itr_done:
2628 return retval;
2629}
2630
2631static void e1000_set_itr(struct e1000_adapter *adapter)
2632{
2633 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2634 u16 current_itr;
2635 u32 new_itr = adapter->itr;
835bb129
JB		 2636
2637 if (unlikely(hw->mac_type < e1000_82540))
2638 return;
2639
2640 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2641 if (unlikely(adapter->link_speed != SPEED_1000)) {
2642 current_itr = 0;
2643 new_itr = 4000;
2644 goto set_itr_now;
2645 }
2646
6cfbd97b
JK		 2647 adapter->tx_itr = e1000_update_itr(adapter, adapter->tx_itr,
2648 adapter->total_tx_packets,
2649 adapter->total_tx_bytes);
2b65326e
JB		 2650 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2651 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2652 adapter->tx_itr = low_latency;
2653
6cfbd97b
JK		 2654 adapter->rx_itr = e1000_update_itr(adapter, adapter->rx_itr,
2655 adapter->total_rx_packets,
2656 adapter->total_rx_bytes);
2b65326e
JB		 2657 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2658 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2659 adapter->rx_itr = low_latency;
835bb129
JB		 2660
2661 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2662
835bb129
JB		 2663 switch (current_itr) {
2664 /* counts and packets in update_itr are dependent on these numbers */
2665 case lowest_latency:
2666 new_itr = 70000;
2667 break;
2668 case low_latency:
2669 new_itr = 20000; /* aka hwitr = ~200 */
2670 break;
2671 case bulk_latency:
2672 new_itr = 4000;
2673 break;
2674 default:
2675 break;
2676 }
2677
2678set_itr_now:
2679 if (new_itr != adapter->itr) {
2680 /* this attempts to bias the interrupt rate towards Bulk
2681 * by adding intermediate steps when interrupt rate is
6cfbd97b
JK		 2682 * increasing
2683 */
835bb129 2684 new_itr = new_itr > adapter->itr ?
6cfbd97b
JK		 2685 min(adapter->itr + (new_itr >> 2), new_itr) :
2686 new_itr;
835bb129 2687 adapter->itr = new_itr;
1dc32918 2688 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129 2689 }
835bb129
JB		 2690}
2691
1da177e4
LT		 2692#define E1000_TX_FLAGS_CSUM 0x00000001
2693#define E1000_TX_FLAGS_VLAN 0x00000002
2694#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2695#define E1000_TX_FLAGS_IPV4 0x00000008
11a78dcf 2696#define E1000_TX_FLAGS_NO_FCS 0x00000010
1da177e4
LT		 2697#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2698#define E1000_TX_FLAGS_VLAN_SHIFT 16
2699
64798845 2700static int e1000_tso(struct e1000_adapter *adapter,
06f4d033
VY		 2701 struct e1000_tx_ring *tx_ring, struct sk_buff *skb,
2702 __be16 protocol)
1da177e4 2703{
1da177e4 2704 struct e1000_context_desc *context_desc;
580f321d 2705 struct e1000_tx_buffer *buffer_info;
1da177e4 2706 unsigned int i;
406874a7
JP		 2707 u32 cmd_length = 0;
2708 u16 ipcse = 0, tucse, mss;
2709 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4 2710
89114afd 2711 if (skb_is_gso(skb)) {
4a54b1e5
FR		 2712 int err;
2713
2714 err = skb_cow_head(skb, 0);
2715 if (err < 0)
2716 return err;
1da177e4 2717
ab6a5bb6 2718 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2719 mss = skb_shinfo(skb)->gso_size;
06f4d033 2720 if (protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2721 struct iphdr *iph = ip_hdr(skb);
2722 iph->tot_len = 0;
2723 iph->check = 0;
aa8223c7
ACM		 2724 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2725 iph->daddr, 0,
2726 IPPROTO_TCP,
2727 0);
2d7edb92 2728 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2729 ipcse = skb_transport_offset(skb) - 1;
06f4d033 2730 } else if (skb_is_gso_v6(skb)) {
0660e03f 2731 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2732 tcp_hdr(skb)->check =
0660e03f
ACM		 2733 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2734 &ipv6_hdr(skb)->daddr,
2735 0, IPPROTO_TCP, 0);
2d7edb92 2736 ipcse = 0;
2d7edb92 2737 }
bbe735e4 2738 ipcss = skb_network_offset(skb);
eddc9ec5 2739 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2740 tucss = skb_transport_offset(skb);
aa8223c7 2741 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2742 tucse = 0;
2743
2744 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2745 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2746
581d708e
MC		 2747 i = tx_ring->next_to_use;
2748 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2749 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2750
2751 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2752 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2753 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2754 context_desc->upper_setup.tcp_fields.tucss = tucss;
2755 context_desc->upper_setup.tcp_fields.tucso = tucso;
2756 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2757 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2758 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2759 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2760
545c67c0 2761 buffer_info->time_stamp = jiffies;
a9ebadd6 2762 buffer_info->next_to_watch = i;
545c67c0 2763
581d708e
MC		 2764 if (++i == tx_ring->count) i = 0;
2765 tx_ring->next_to_use = i;
1da177e4 2766
c3033b01 2767 return true;
1da177e4 2768 }
c3033b01 2769 return false;
1da177e4
LT		 2770}
2771
64798845 2772static bool e1000_tx_csum(struct e1000_adapter *adapter,
06f4d033
VY		 2773 struct e1000_tx_ring *tx_ring, struct sk_buff *skb,
2774 __be16 protocol)
1da177e4
LT		 2775{
2776 struct e1000_context_desc *context_desc;
580f321d 2777 struct e1000_tx_buffer *buffer_info;
1da177e4 2778 unsigned int i;
406874a7 2779 u8 css;
3ed30676 2780 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2781
3ed30676
DG		 2782 if (skb->ip_summed != CHECKSUM_PARTIAL)
2783 return false;
1da177e4 2784
06f4d033 2785 switch (protocol) {
09640e63 2786 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2787 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2788 cmd_len |= E1000_TXD_CMD_TCP;
2789 break;
09640e63 2790 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2791 /* XXX not handling all IPV6 headers */
2792 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2793 cmd_len |= E1000_TXD_CMD_TCP;
2794 break;
2795 default:
2796 if (unlikely(net_ratelimit()))
feb8f478
ET		 2797 e_warn(drv, "checksum_partial proto=%x!\n",
2798 skb->protocol);
3ed30676
DG		 2799 break;
2800 }
1da177e4 2801
0d0b1672 2802 css = skb_checksum_start_offset(skb);
1da177e4 2803
3ed30676
DG		 2804 i = tx_ring->next_to_use;
2805 buffer_info = &tx_ring->buffer_info[i];
2806 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2807
3ed30676
DG		 2808 context_desc->lower_setup.ip_config = 0;
2809 context_desc->upper_setup.tcp_fields.tucss = css;
2810 context_desc->upper_setup.tcp_fields.tucso =
2811 css + skb->csum_offset;
2812 context_desc->upper_setup.tcp_fields.tucse = 0;
2813 context_desc->tcp_seg_setup.data = 0;
2814 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2815
3ed30676
DG		 2816 buffer_info->time_stamp = jiffies;
2817 buffer_info->next_to_watch = i;
1da177e4 2818
3ed30676
DG		 2819 if (unlikely(++i == tx_ring->count)) i = 0;
2820 tx_ring->next_to_use = i;
2821
2822 return true;
1da177e4
LT		 2823}
2824
2825#define E1000_MAX_TXD_PWR 12
2826#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2827
64798845
JP		 2828static int e1000_tx_map(struct e1000_adapter *adapter,
2829 struct e1000_tx_ring *tx_ring,
2830 struct sk_buff *skb, unsigned int first,
2831 unsigned int max_per_txd, unsigned int nr_frags,
2832 unsigned int mss)
1da177e4 2833{
1dc32918 2834 struct e1000_hw *hw = &adapter->hw;
602c0554 2835 struct pci_dev *pdev = adapter->pdev;
580f321d 2836 struct e1000_tx_buffer *buffer_info;
d20b606c 2837 unsigned int len = skb_headlen(skb);
602c0554 2838 unsigned int offset = 0, size, count = 0, i;
31c15a2f 2839 unsigned int f, bytecount, segs;
1da177e4
LT		 2840
2841 i = tx_ring->next_to_use;
2842
96838a40 2843 while (len) {
37e73df8 2844 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2845 size = min(len, max_per_txd);
fd803241
JK		 2846 /* Workaround for Controller erratum --
2847 * descriptor for non-tso packet in a linear SKB that follows a
2848 * tso gets written back prematurely before the data is fully
6cfbd97b
JK		 2849 * DMA'd to the controller
2850 */
fd803241 2851 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2852 !skb_is_gso(skb)) {
3db1cd5c 2853 tx_ring->last_tx_tso = false;
fd803241
JK		 2854 size -= 4;
2855 }
2856
1da177e4 2857 /* Workaround for premature desc write-backs
6cfbd97b
JK		 2858 * in TSO mode. Append 4-byte sentinel desc
2859 */
96838a40 2860 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2861 size -= 4;
97338bde
MC		 2862 /* work-around for errata 10 and it applies
2863 * to all controllers in PCI-X mode
2864 * The fix is to make sure that the first descriptor of a
2865 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2866 */
1dc32918 2867 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2868 (size > 2015) && count == 0))
2869 size = 2015;
96838a40 2870
1da177e4 2871 /* Workaround for potential 82544 hang in PCI-X. Avoid
6cfbd97b
JK		 2872 * terminating buffers within evenly-aligned dwords.
2873 */
96838a40 2874 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2875 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2876 size > 4))
2877 size -= 4;
2878
2879 buffer_info->length = size;
cdd7549e 2880 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2881 buffer_info->time_stamp = jiffies;
602c0554 2882 buffer_info->mapped_as_page = false;
b16f53be
NN		 2883 buffer_info->dma = dma_map_single(&pdev->dev,
2884 skb->data + offset,
6cfbd97b 2885 size, DMA_TO_DEVICE);
b16f53be 2886 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2887 goto dma_error;
a9ebadd6 2888 buffer_info->next_to_watch = i;
1da177e4
LT		 2889
2890 len -= size;
2891 offset += size;
2892 count++;
37e73df8
AD		 2893 if (len) {
2894 i++;
2895 if (unlikely(i == tx_ring->count))
2896 i = 0;
2897 }
1da177e4
LT		 2898 }
2899
96838a40 2900 for (f = 0; f < nr_frags; f++) {
9e903e08 2901 const struct skb_frag_struct *frag;
1da177e4
LT		 2902
2903 frag = &skb_shinfo(skb)->frags[f];
9e903e08 2904 len = skb_frag_size(frag);
877749bf 2905 offset = 0;
1da177e4 2906
96838a40 2907 while (len) {
877749bf 2908 unsigned long bufend;
37e73df8
AD		 2909 i++;
2910 if (unlikely(i == tx_ring->count))
2911 i = 0;
2912
1da177e4
LT		 2913 buffer_info = &tx_ring->buffer_info[i];
2914 size = min(len, max_per_txd);
1da177e4 2915 /* Workaround for premature desc write-backs
6cfbd97b
JK		 2916 * in TSO mode. Append 4-byte sentinel desc
2917 */
2918 if (unlikely(mss && f == (nr_frags-1) &&
2919 size == len && size > 8))
1da177e4 2920 size -= 4;
1da177e4
LT		 2921 /* Workaround for potential 82544 hang in PCI-X.
2922 * Avoid terminating buffers within evenly-aligned
6cfbd97b
JK		 2923 * dwords.
2924 */
877749bf
IC		 2925 bufend = (unsigned long)
2926 page_to_phys(skb_frag_page(frag));
2927 bufend += offset + size - 1;
96838a40 2928 if (unlikely(adapter->pcix_82544 &&
877749bf
IC		 2929 !(bufend & 4) &&
2930 size > 4))
1da177e4
LT		 2931 size -= 4;
2932
2933 buffer_info->length = size;
1da177e4 2934 buffer_info->time_stamp = jiffies;
602c0554 2935 buffer_info->mapped_as_page = true;
877749bf
IC		 2936 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
2937 offset, size, DMA_TO_DEVICE);
b16f53be 2938 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2939 goto dma_error;
a9ebadd6 2940 buffer_info->next_to_watch = i;
1da177e4
LT		 2941
2942 len -= size;
2943 offset += size;
2944 count++;
1da177e4
LT		 2945 }
2946 }
2947
31c15a2f
DN		 2948 segs = skb_shinfo(skb)->gso_segs ?: 1;
2949 /* multiply data chunks by size of headers */
2950 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
2951
1da177e4 2952 tx_ring->buffer_info[i].skb = skb;
31c15a2f
DN		 2953 tx_ring->buffer_info[i].segs = segs;
2954 tx_ring->buffer_info[i].bytecount = bytecount;
1da177e4
LT		 2955 tx_ring->buffer_info[first].next_to_watch = i;
2956
2957 return count;
602c0554
AD		 2958
2959dma_error:
2960 dev_err(&pdev->dev, "TX DMA map failed\n");
2961 buffer_info->dma = 0;
c1fa347f 2962 if (count)
602c0554 2963 count--;
c1fa347f
RK		 2964
2965 while (count--) {
2966 if (i==0)
602c0554 2967 i += tx_ring->count;
c1fa347f 2968 i--;
602c0554
AD		 2969 buffer_info = &tx_ring->buffer_info[i];
2970 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2971 }
2972
2973 return 0;
1da177e4
LT		 2974}
2975
64798845
JP		 2976static void e1000_tx_queue(struct e1000_adapter *adapter,
2977 struct e1000_tx_ring *tx_ring, int tx_flags,
2978 int count)
1da177e4 2979{
1da177e4 2980 struct e1000_tx_desc *tx_desc = NULL;
580f321d 2981 struct e1000_tx_buffer *buffer_info;
406874a7 2982 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 2983 unsigned int i;
2984
96838a40 2985 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4 2986 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
6cfbd97b 2987 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2988 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2989
96838a40 2990 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2991 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2992 }
2993
96838a40 2994 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2995 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2996 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2997 }
2998
96838a40 2999 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3000 txd_lower |= E1000_TXD_CMD_VLE;
3001 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3002 }
3003
11a78dcf
BG		 3004 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
3005 txd_lower &= ~(E1000_TXD_CMD_IFCS);
3006
1da177e4
LT		 3007 i = tx_ring->next_to_use;
3008
96838a40 3009 while (count--) {
1da177e4
LT		 3010 buffer_info = &tx_ring->buffer_info[i];
3011 tx_desc = E1000_TX_DESC(*tx_ring, i);
3012 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3013 tx_desc->lower.data =
3014 cpu_to_le32(txd_lower | buffer_info->length);
3015 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3016 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3017 }
3018
3019 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3020
11a78dcf
BG		 3021 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
3022 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
3023 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
3024
1da177e4
LT		 3025 /* Force memory writes to complete before letting h/w
3026 * know there are new descriptors to fetch. (Only
3027 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 3028 * such as IA-64).
3029 */
1da177e4
LT		 3030 wmb();
3031
3032 tx_ring->next_to_use = i;
1da177e4
LT		 3033}
3034
1aa8b471 3035/* 82547 workaround to avoid controller hang in half-duplex environment.
1da177e4
LT		 3036 * The workaround is to avoid queuing a large packet that would span
3037 * the internal Tx FIFO ring boundary by notifying the stack to resend
3038 * the packet at a later time. This gives the Tx FIFO an opportunity to
3039 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3040 * to the beginning of the Tx FIFO.
1aa8b471 3041 */
1da177e4
LT		 3042
3043#define E1000_FIFO_HDR 0x10
3044#define E1000_82547_PAD_LEN 0x3E0
3045
64798845
JP		 3046static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3047 struct sk_buff *skb)
1da177e4 3048{
406874a7
JP		 3049 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3050 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3051
9099cfb9 3052 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3053
96838a40 3054 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3055 goto no_fifo_stall_required;
3056
96838a40 3057 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3058 return 1;
3059
96838a40 3060 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3061 atomic_set(&adapter->tx_fifo_stall, 1);
3062 return 1;
3063 }
3064
3065no_fifo_stall_required:
3066 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3067 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3068 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3069 return 0;
3070}
3071
65c7973f
JB		 3072static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3073{
3074 struct e1000_adapter *adapter = netdev_priv(netdev);
3075 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3076
3077 netif_stop_queue(netdev);
3078 /* Herbert's original patch had:
3079 * smp_mb__after_netif_stop_queue();
6cfbd97b
JK		 3080 * but since that doesn't exist yet, just open code it.
3081 */
65c7973f
JB		 3082 smp_mb();
3083
3084 /* We need to check again in a case another CPU has just
6cfbd97b
JK		 3085 * made room available.
3086 */
65c7973f
JB		 3087 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3088 return -EBUSY;
3089
3090 /* A reprieve! */
3091 netif_start_queue(netdev);
fcfb1224 3092 ++adapter->restart_queue;
65c7973f
JB		 3093 return 0;
3094}
3095
3096static int e1000_maybe_stop_tx(struct net_device *netdev,
6cfbd97b 3097 struct e1000_tx_ring *tx_ring, int size)
65c7973f
JB		 3098{
3099 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3100 return 0;
3101 return __e1000_maybe_stop_tx(netdev, size);
3102}
3103
1da177e4 3104#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 3105static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
3106 struct net_device *netdev)
1da177e4 3107{
60490fe0 3108 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3109 struct e1000_hw *hw = &adapter->hw;
581d708e 3110 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3111 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3112 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3113 unsigned int tx_flags = 0;
e743d313 3114 unsigned int len = skb_headlen(skb);
6d1e3aa7
KK		 3115 unsigned int nr_frags;
3116 unsigned int mss;
1da177e4 3117 int count = 0;
76c224bc 3118 int tso;
1da177e4 3119 unsigned int f;
06f4d033 3120 __be16 protocol = vlan_get_protocol(skb);
1da177e4 3121
6cfbd97b 3122 /* This goes back to the question of how to logically map a Tx queue
65c7973f 3123 * to a flow. Right now, performance is impacted slightly negatively
6cfbd97b
JK		 3124 * if using multiple Tx queues. If the stack breaks away from a
3125 * single qdisc implementation, we can look at this again.
3126 */
581d708e 3127 tx_ring = adapter->tx_ring;
24025e4e 3128
59d86c76
TD		 3129 /* On PCI/PCI-X HW, if packet size is less than ETH_ZLEN,
3130 * packets may get corrupted during padding by HW.
3131 * To WA this issue, pad all small packets manually.
3132 */
a94d9e22
AD		 3133 if (eth_skb_pad(skb))
3134 return NETDEV_TX_OK;
59d86c76 3135
7967168c 3136 mss = skb_shinfo(skb)->gso_size;
76c224bc 3137 /* The controller does a simple calculation to
1da177e4
LT		 3138 * make sure there is enough room in the FIFO before
3139 * initiating the DMA for each buffer. The calc is:
3140 * 4 = ceil(buffer len/mss). To make sure we don't
3141 * overrun the FIFO, adjust the max buffer len if mss
6cfbd97b
JK		 3142 * drops.
3143 */
96838a40 3144 if (mss) {
406874a7 3145 u8 hdr_len;
1da177e4
LT		 3146 max_per_txd = min(mss << 2, max_per_txd);
3147 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3148
ab6a5bb6 3149 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3150 if (skb->data_len && hdr_len == len) {
1dc32918 3151 switch (hw->mac_type) {
9f687888 3152 unsigned int pull_size;
683a2aa3
HX		 3153 case e1000_82544:
3154 /* Make sure we have room to chop off 4 bytes,
3155 * and that the end alignment will work out to
3156 * this hardware's requirements
3157 * NOTE: this is a TSO only workaround
3158 * if end byte alignment not correct move us
6cfbd97b
JK		 3159 * into the next dword
3160 */
3161 if ((unsigned long)(skb_tail_pointer(skb) - 1)
3162 & 4)
683a2aa3
HX		 3163 break;
3164 /* fall through */
9f687888
JK		 3165 pull_size = min((unsigned int)4, skb->data_len);
3166 if (!__pskb_pull_tail(skb, pull_size)) {
feb8f478
ET		 3167 e_err(drv, "__pskb_pull_tail "
3168 "failed.\n");
9f687888 3169 dev_kfree_skb_any(skb);
749dfc70 3170 return NETDEV_TX_OK;
9f687888 3171 }
e743d313 3172 len = skb_headlen(skb);
9f687888
JK		 3173 break;
3174 default:
3175 /* do nothing */
3176 break;
d74bbd3b 3177 }
9a3056da 3178 }
1da177e4
LT		 3179 }
3180
9a3056da 3181 /* reserve a descriptor for the offload context */
84fa7933 3182 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3183 count++;
2648345f 3184 count++;
fd803241 3185
fd803241 3186 /* Controller Erratum workaround */
89114afd 3187 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3188 count++;
fd803241 3189
1da177e4
LT		 3190 count += TXD_USE_COUNT(len, max_txd_pwr);
3191
96838a40 3192 if (adapter->pcix_82544)
1da177e4
LT		 3193 count++;
3194
96838a40 3195 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3196 * in PCI-X mode, so add one more descriptor to the count
3197 */
1dc32918 3198 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3199 (len > 2015)))
3200 count++;
3201
1da177e4 3202 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3203 for (f = 0; f < nr_frags; f++)
9e903e08 3204 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),
1da177e4 3205 max_txd_pwr);
96838a40 3206 if (adapter->pcix_82544)
1da177e4
LT		 3207 count += nr_frags;
3208
1da177e4 3209 /* need: count + 2 desc gap to keep tail from touching
6cfbd97b
JK		 3210 * head, otherwise try next time
3211 */
8017943e 3212 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3213 return NETDEV_TX_BUSY;
1da177e4 3214
a4010afe
JB		 3215 if (unlikely((hw->mac_type == e1000_82547) &&
3216 (e1000_82547_fifo_workaround(adapter, skb)))) {
3217 netif_stop_queue(netdev);
3218 if (!test_bit(__E1000_DOWN, &adapter->flags))
3219 schedule_delayed_work(&adapter->fifo_stall_task, 1);
3220 return NETDEV_TX_BUSY;
1da177e4
LT		 3221 }
3222
df8a39de 3223 if (skb_vlan_tag_present(skb)) {
1da177e4 3224 tx_flags |= E1000_TX_FLAGS_VLAN;
df8a39de
JP		 3225 tx_flags |= (skb_vlan_tag_get(skb) <<
3226 E1000_TX_FLAGS_VLAN_SHIFT);
1da177e4
LT		 3227 }
3228
581d708e 3229 first = tx_ring->next_to_use;
96838a40 3230
06f4d033 3231 tso = e1000_tso(adapter, tx_ring, skb, protocol);
1da177e4
LT		 3232 if (tso < 0) {
3233 dev_kfree_skb_any(skb);
3234 return NETDEV_TX_OK;
3235 }
3236
fd803241 3237 if (likely(tso)) {
8fce4731 3238 if (likely(hw->mac_type != e1000_82544))
3db1cd5c 3239 tx_ring->last_tx_tso = true;
1da177e4 3240 tx_flags |= E1000_TX_FLAGS_TSO;
06f4d033 3241 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb, protocol)))
1da177e4
LT		 3242 tx_flags |= E1000_TX_FLAGS_CSUM;
3243
06f4d033 3244 if (protocol == htons(ETH_P_IP))
2d7edb92
MC		 3245 tx_flags |= E1000_TX_FLAGS_IPV4;
3246
11a78dcf
BG		 3247 if (unlikely(skb->no_fcs))
3248 tx_flags |= E1000_TX_FLAGS_NO_FCS;
3249
37e73df8 3250 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
6cfbd97b 3251 nr_frags, mss);
1da177e4 3252
37e73df8 3253 if (count) {
2f66fd36 3254 netdev_sent_queue(netdev, skb->len);
eab467f5
WB		 3255 skb_tx_timestamp(skb);
3256
37e73df8 3257 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD		 3258 /* Make sure there is space in the ring for the next send. */
3259 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3260
8a4d0b93
FW		 3261 if (!skb->xmit_more ||
3262 netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
3263 writel(tx_ring->next_to_use, hw->hw_addr + tx_ring->tdt);
3264 /* we need this if more than one processor can write to
3265 * our tail at a time, it synchronizes IO on IA64/Altix
3266 * systems
3267 */
3268 mmiowb();
3269 }
37e73df8
AD		 3270 } else {
3271 dev_kfree_skb_any(skb);
3272 tx_ring->buffer_info[first].time_stamp = 0;
3273 tx_ring->next_to_use = first;
3274 }
1da177e4 3275
1da177e4
LT		 3276 return NETDEV_TX_OK;
3277}
3278
b04e36ba
TD		 3279#define NUM_REGS 38 /* 1 based count */
3280static void e1000_regdump(struct e1000_adapter *adapter)
3281{
3282 struct e1000_hw *hw = &adapter->hw;
3283 u32 regs[NUM_REGS];
3284 u32 *regs_buff = regs;
3285 int i = 0;
3286
e29b5d8f
TD		 3287 static const char * const reg_name[] = {
3288 "CTRL", "STATUS",
3289 "RCTL", "RDLEN", "RDH", "RDT", "RDTR",
3290 "TCTL", "TDBAL", "TDBAH", "TDLEN", "TDH", "TDT",
3291 "TIDV", "TXDCTL", "TADV", "TARC0",
3292 "TDBAL1", "TDBAH1", "TDLEN1", "TDH1", "TDT1",
3293 "TXDCTL1", "TARC1",
3294 "CTRL_EXT", "ERT", "RDBAL", "RDBAH",
3295 "TDFH", "TDFT", "TDFHS", "TDFTS", "TDFPC",
3296 "RDFH", "RDFT", "RDFHS", "RDFTS", "RDFPC"
b04e36ba
TD		 3297 };
3298
3299 regs_buff[0] = er32(CTRL);
3300 regs_buff[1] = er32(STATUS);
3301
3302 regs_buff[2] = er32(RCTL);
3303 regs_buff[3] = er32(RDLEN);
3304 regs_buff[4] = er32(RDH);
3305 regs_buff[5] = er32(RDT);
3306 regs_buff[6] = er32(RDTR);
3307
3308 regs_buff[7] = er32(TCTL);
3309 regs_buff[8] = er32(TDBAL);
3310 regs_buff[9] = er32(TDBAH);
3311 regs_buff[10] = er32(TDLEN);
3312 regs_buff[11] = er32(TDH);
3313 regs_buff[12] = er32(TDT);
3314 regs_buff[13] = er32(TIDV);
3315 regs_buff[14] = er32(TXDCTL);
3316 regs_buff[15] = er32(TADV);
3317 regs_buff[16] = er32(TARC0);
3318
3319 regs_buff[17] = er32(TDBAL1);
3320 regs_buff[18] = er32(TDBAH1);
3321 regs_buff[19] = er32(TDLEN1);
3322 regs_buff[20] = er32(TDH1);
3323 regs_buff[21] = er32(TDT1);
3324 regs_buff[22] = er32(TXDCTL1);
3325 regs_buff[23] = er32(TARC1);
3326 regs_buff[24] = er32(CTRL_EXT);
3327 regs_buff[25] = er32(ERT);
3328 regs_buff[26] = er32(RDBAL0);
3329 regs_buff[27] = er32(RDBAH0);
3330 regs_buff[28] = er32(TDFH);
3331 regs_buff[29] = er32(TDFT);
3332 regs_buff[30] = er32(TDFHS);
3333 regs_buff[31] = er32(TDFTS);
3334 regs_buff[32] = er32(TDFPC);
3335 regs_buff[33] = er32(RDFH);
3336 regs_buff[34] = er32(RDFT);
3337 regs_buff[35] = er32(RDFHS);
3338 regs_buff[36] = er32(RDFTS);
3339 regs_buff[37] = er32(RDFPC);
3340
3341 pr_info("Register dump\n");
e29b5d8f
TD		 3342 for (i = 0; i < NUM_REGS; i++)
3343 pr_info("%-15s %08x\n", reg_name[i], regs_buff[i]);
b04e36ba
TD		 3344}
3345
3346/*
3347 * e1000_dump: Print registers, tx ring and rx ring
3348 */
3349static void e1000_dump(struct e1000_adapter *adapter)
3350{
3351 /* this code doesn't handle multiple rings */
3352 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3353 struct e1000_rx_ring *rx_ring = adapter->rx_ring;
3354 int i;
3355
3356 if (!netif_msg_hw(adapter))
3357 return;
3358
3359 /* Print Registers */
3360 e1000_regdump(adapter);
3361
6cfbd97b 3362 /* transmit dump */
b04e36ba
TD		 3363 pr_info("TX Desc ring0 dump\n");
3364
3365 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
3366 *
3367 * Legacy Transmit Descriptor
3368 * +--------------------------------------------------------------+
3369 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
3370 * +--------------------------------------------------------------+
3371 * 8 | Special | CSS | Status | CMD | CSO | Length |
3372 * +--------------------------------------------------------------+
3373 * 63 48 47 36 35 32 31 24 23 16 15 0
3374 *
3375 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
3376 * 63 48 47 40 39 32 31 16 15 8 7 0
3377 * +----------------------------------------------------------------+
3378 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
3379 * +----------------------------------------------------------------+
3380 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
3381 * +----------------------------------------------------------------+
3382 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
3383 *
3384 * Extended Data Descriptor (DTYP=0x1)
3385 * +----------------------------------------------------------------+
3386 * 0 | Buffer Address [63:0] |
3387 * +----------------------------------------------------------------+
3388 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
3389 * +----------------------------------------------------------------+
3390 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
3391 */
e29b5d8f
TD		 3392 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestmp bi->skb\n");
3393 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestmp bi->skb\n");
b04e36ba
TD		 3394
3395 if (!netif_msg_tx_done(adapter))
3396 goto rx_ring_summary;
3397
3398 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
3399 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
580f321d 3400 struct e1000_tx_buffer *buffer_info = &tx_ring->buffer_info[i];
dd7f5c9e 3401 struct my_u { __le64 a; __le64 b; };
b04e36ba 3402 struct my_u *u = (struct my_u *)tx_desc;
e29b5d8f
TD		 3403 const char *type;
3404
b04e36ba 3405 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
e29b5d8f 3406 type = "NTC/U";
b04e36ba 3407 else if (i == tx_ring->next_to_use)
e29b5d8f 3408 type = "NTU";
b04e36ba 3409 else if (i == tx_ring->next_to_clean)
e29b5d8f 3410 type = "NTC";
b04e36ba 3411 else
e29b5d8f 3412 type = "";
b04e36ba 3413
e29b5d8f
TD		 3414 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p %s\n",
3415 ((le64_to_cpu(u->b) & (1<<20)) ? 'd' : 'c'), i,
3416 le64_to_cpu(u->a), le64_to_cpu(u->b),
3417 (u64)buffer_info->dma, buffer_info->length,
3418 buffer_info->next_to_watch,
3419 (u64)buffer_info->time_stamp, buffer_info->skb, type);
b04e36ba
TD		 3420 }
3421
3422rx_ring_summary:
6cfbd97b 3423 /* receive dump */
b04e36ba
TD		 3424 pr_info("\nRX Desc ring dump\n");
3425
3426 /* Legacy Receive Descriptor Format
3427 *
3428 * +-----------------------------------------------------+
3429 * | Buffer Address [63:0] |
3430 * +-----------------------------------------------------+
3431 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
3432 * +-----------------------------------------------------+
3433 * 63 48 47 40 39 32 31 16 15 0
3434 */
e29b5d8f 3435 pr_info("R[desc] [address 63:0 ] [vl er S cks ln] [bi->dma ] [bi->skb]\n");
b04e36ba
TD		 3436
3437 if (!netif_msg_rx_status(adapter))
3438 goto exit;
3439
3440 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
3441 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rx_ring, i);
93f0afe9 3442 struct e1000_rx_buffer *buffer_info = &rx_ring->buffer_info[i];
dd7f5c9e 3443 struct my_u { __le64 a; __le64 b; };
b04e36ba 3444 struct my_u *u = (struct my_u *)rx_desc;
e29b5d8f
TD		 3445 const char *type;
3446
b04e36ba 3447 if (i == rx_ring->next_to_use)
e29b5d8f 3448 type = "NTU";
b04e36ba 3449 else if (i == rx_ring->next_to_clean)
e29b5d8f 3450 type = "NTC";
b04e36ba 3451 else
e29b5d8f 3452 type = "";
b04e36ba 3453
e29b5d8f
TD		 3454 pr_info("R[0x%03X] %016llX %016llX %016llX %p %s\n",
3455 i, le64_to_cpu(u->a), le64_to_cpu(u->b),
13809609 3456 (u64)buffer_info->dma, buffer_info->rxbuf.data, type);
b04e36ba
TD		 3457 } /* for */
3458
3459 /* dump the descriptor caches */
3460 /* rx */
e29b5d8f 3461 pr_info("Rx descriptor cache in 64bit format\n");
b04e36ba 3462 for (i = 0x6000; i <= 0x63FF ; i += 0x10) {
e29b5d8f
TD		 3463 pr_info("R%04X: %08X|%08X %08X|%08X\n",
3464 i,
3465 readl(adapter->hw.hw_addr + i+4),
3466 readl(adapter->hw.hw_addr + i),
3467 readl(adapter->hw.hw_addr + i+12),
3468 readl(adapter->hw.hw_addr + i+8));
b04e36ba
TD		 3469 }
3470 /* tx */
e29b5d8f 3471 pr_info("Tx descriptor cache in 64bit format\n");
b04e36ba 3472 for (i = 0x7000; i <= 0x73FF ; i += 0x10) {
e29b5d8f
TD		 3473 pr_info("T%04X: %08X|%08X %08X|%08X\n",
3474 i,
3475 readl(adapter->hw.hw_addr + i+4),
3476 readl(adapter->hw.hw_addr + i),
3477 readl(adapter->hw.hw_addr + i+12),
3478 readl(adapter->hw.hw_addr + i+8));
b04e36ba
TD		 3479 }
3480exit:
3481 return;
3482}
3483
1da177e4
LT		 3484/**
3485 * e1000_tx_timeout - Respond to a Tx Hang
3486 * @netdev: network interface device structure
3487 **/
64798845 3488static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3489{
60490fe0 3490 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3491
3492 /* Do the reset outside of interrupt context */
87041639
JK		 3493 adapter->tx_timeout_count++;
3494 schedule_work(&adapter->reset_task);
1da177e4
LT		 3495}
3496
64798845 3497static void e1000_reset_task(struct work_struct *work)
1da177e4 3498{
65f27f38
DH		 3499 struct e1000_adapter *adapter =
3500 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3501
b04e36ba 3502 e_err(drv, "Reset adapter\n");
b2f963bf 3503 e1000_reinit_locked(adapter);
1da177e4
LT		 3504}
3505
3506/**
3507 * e1000_get_stats - Get System Network Statistics
3508 * @netdev: network interface device structure
3509 *
3510 * Returns the address of the device statistics structure.
a4010afe 3511 * The statistics are actually updated from the watchdog.
1da177e4 3512 **/
64798845 3513static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3514{
6b7660cd 3515 /* only return the current stats */
5fe31def 3516 return &netdev->stats;
1da177e4
LT		 3517}
3518
3519/**
3520 * e1000_change_mtu - Change the Maximum Transfer Unit
3521 * @netdev: network interface device structure
3522 * @new_mtu: new value for maximum frame size
3523 *
3524 * Returns 0 on success, negative on failure
3525 **/
64798845 3526static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3527{
60490fe0 3528 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3529 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3530 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3531
96838a40
JB		 3532 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3533 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
feb8f478 3534 e_err(probe, "Invalid MTU setting\n");
1da177e4 3535 return -EINVAL;
2d7edb92 3536 }
1da177e4 3537
997f5cbd 3538 /* Adapter-specific max frame size limits. */
1dc32918 3539 switch (hw->mac_type) {
9e2feace 3540 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3541 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
feb8f478 3542 e_err(probe, "Jumbo Frames not supported.\n");
2d7edb92 3543 return -EINVAL;
2d7edb92 3544 }
997f5cbd 3545 break;
997f5cbd
JK		 3546 default:
3547 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3548 break;
1da177e4
LT		 3549 }
3550
3d6114e7
JB		 3551 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3552 msleep(1);
3553 /* e1000_down has a dependency on max_frame_size */
3554 hw->max_frame_size = max_frame;
08e83316
SD		 3555 if (netif_running(netdev)) {
3556 /* prevent buffers from being reallocated */
3557 adapter->alloc_rx_buf = e1000_alloc_dummy_rx_buffers;
3d6114e7 3558 e1000_down(adapter);
08e83316 3559 }
3d6114e7 3560
87f5032e 3561 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3562 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3563 * larger slab size.
3564 * i.e. RXBUFFER_2048 --> size-4096 slab
6cfbd97b
JK		 3565 * however with the new *_jumbo_rx* routines, jumbo receives will use
3566 * fragmented skbs
3567 */
9e2feace 3568
9926146b 3569 if (max_frame <= E1000_RXBUFFER_2048)
9e2feace 3570 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3571 else
3572#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3573 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3574#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3575 adapter->rx_buffer_len = PAGE_SIZE;
3576#endif
9e2feace
AK		 3577
3578 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3579 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3580 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3581 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3582 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3583
675ad473
ET		 3584 pr_info("%s changing MTU from %d to %d\n",
3585 netdev->name, netdev->mtu, new_mtu);
2d7edb92
MC		 3586 netdev->mtu = new_mtu;
3587
2db10a08 3588 if (netif_running(netdev))
3d6114e7
JB		 3589 e1000_up(adapter);
3590 else
3591 e1000_reset(adapter);
3592
3593 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3594
1da177e4
LT		 3595 return 0;
3596}
3597
3598/**
3599 * e1000_update_stats - Update the board statistics counters
3600 * @adapter: board private structure
3601 **/
64798845 3602void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3603{
5fe31def 3604 struct net_device *netdev = adapter->netdev;
1da177e4 3605 struct e1000_hw *hw = &adapter->hw;
282f33c9 3606 struct pci_dev *pdev = adapter->pdev;
1da177e4 3607 unsigned long flags;
406874a7 3608 u16 phy_tmp;
1da177e4
LT		 3609
3610#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3611
6cfbd97b 3612 /* Prevent stats update while adapter is being reset, or if the pci
282f33c9
LV		 3613 * connection is down.
3614 */
9026729b 3615 if (adapter->link_speed == 0)
282f33c9 3616 return;
81b1955e 3617 if (pci_channel_offline(pdev))
9026729b
AK		 3618 return;
3619
1da177e4
LT		 3620 spin_lock_irqsave(&adapter->stats_lock, flags);
3621
828d055f 3622 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3623 * called from the interrupt context, so they must only
3624 * be written while holding adapter->stats_lock
3625 */
3626
1dc32918
JP		 3627 adapter->stats.crcerrs += er32(CRCERRS);
3628 adapter->stats.gprc += er32(GPRC);
3629 adapter->stats.gorcl += er32(GORCL);
3630 adapter->stats.gorch += er32(GORCH);
3631 adapter->stats.bprc += er32(BPRC);
3632 adapter->stats.mprc += er32(MPRC);
3633 adapter->stats.roc += er32(ROC);
3634
1532ecea
JB		 3635 adapter->stats.prc64 += er32(PRC64);
3636 adapter->stats.prc127 += er32(PRC127);
3637 adapter->stats.prc255 += er32(PRC255);
3638 adapter->stats.prc511 += er32(PRC511);
3639 adapter->stats.prc1023 += er32(PRC1023);
3640 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP		 3641
3642 adapter->stats.symerrs += er32(SYMERRS);
3643 adapter->stats.mpc += er32(MPC);
3644 adapter->stats.scc += er32(SCC);
3645 adapter->stats.ecol += er32(ECOL);
3646 adapter->stats.mcc += er32(MCC);
3647 adapter->stats.latecol += er32(LATECOL);
3648 adapter->stats.dc += er32(DC);
3649 adapter->stats.sec += er32(SEC);
3650 adapter->stats.rlec += er32(RLEC);
3651 adapter->stats.xonrxc += er32(XONRXC);
3652 adapter->stats.xontxc += er32(XONTXC);
3653 adapter->stats.xoffrxc += er32(XOFFRXC);
3654 adapter->stats.xofftxc += er32(XOFFTXC);
3655 adapter->stats.fcruc += er32(FCRUC);
3656 adapter->stats.gptc += er32(GPTC);
3657 adapter->stats.gotcl += er32(GOTCL);
3658 adapter->stats.gotch += er32(GOTCH);
3659 adapter->stats.rnbc += er32(RNBC);
3660 adapter->stats.ruc += er32(RUC);
3661 adapter->stats.rfc += er32(RFC);
3662 adapter->stats.rjc += er32(RJC);
3663 adapter->stats.torl += er32(TORL);
3664 adapter->stats.torh += er32(TORH);
3665 adapter->stats.totl += er32(TOTL);
3666 adapter->stats.toth += er32(TOTH);
3667 adapter->stats.tpr += er32(TPR);
3668
1532ecea
JB		 3669 adapter->stats.ptc64 += er32(PTC64);
3670 adapter->stats.ptc127 += er32(PTC127);
3671 adapter->stats.ptc255 += er32(PTC255);
3672 adapter->stats.ptc511 += er32(PTC511);
3673 adapter->stats.ptc1023 += er32(PTC1023);
3674 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP		 3675
3676 adapter->stats.mptc += er32(MPTC);
3677 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3678
3679 /* used for adaptive IFS */
3680
1dc32918 3681 hw->tx_packet_delta = er32(TPT);
1da177e4 3682 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3683 hw->collision_delta = er32(COLC);
1da177e4
LT		 3684 adapter->stats.colc += hw->collision_delta;
3685
96838a40 3686 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3687 adapter->stats.algnerrc += er32(ALGNERRC);
3688 adapter->stats.rxerrc += er32(RXERRC);
3689 adapter->stats.tncrs += er32(TNCRS);
3690 adapter->stats.cexterr += er32(CEXTERR);
3691 adapter->stats.tsctc += er32(TSCTC);
3692 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT		 3693 }
3694
3695 /* Fill out the OS statistics structure */
5fe31def
AK		 3696 netdev->stats.multicast = adapter->stats.mprc;
3697 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT		 3698
3699 /* Rx Errors */
3700
87041639 3701 /* RLEC on some newer hardware can be incorrect so build
6cfbd97b
JK		 3702 * our own version based on RUC and ROC
3703 */
5fe31def 3704 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3705 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3706 adapter->stats.ruc + adapter->stats.roc +
3707 adapter->stats.cexterr;
49559854 3708 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK		 3709 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3710 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3711 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3712 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT		 3713
3714 /* Tx Errors */
49559854 3715 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK		 3716 netdev->stats.tx_errors = adapter->stats.txerrc;
3717 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3718 netdev->stats.tx_window_errors = adapter->stats.latecol;
3719 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3720 if (hw->bad_tx_carr_stats_fd &&
167fb284 3721 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3722 netdev->stats.tx_carrier_errors = 0;
167fb284
JG		 3723 adapter->stats.tncrs = 0;
3724 }
1da177e4
LT		 3725
3726 /* Tx Dropped needs to be maintained elsewhere */
3727
3728 /* Phy Stats */
96838a40
JB		 3729 if (hw->media_type == e1000_media_type_copper) {
3730 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3731 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3732 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3733 adapter->phy_stats.idle_errors += phy_tmp;
3734 }
3735
96838a40 3736 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3737 (hw->phy_type == e1000_phy_m88) &&
3738 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3739 adapter->phy_stats.receive_errors += phy_tmp;
3740 }
3741
15e376b4 3742 /* Management Stats */
1dc32918
JP		 3743 if (hw->has_smbus) {
3744 adapter->stats.mgptc += er32(MGTPTC);
3745 adapter->stats.mgprc += er32(MGTPRC);
3746 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3747 }
3748
1da177e4
LT		 3749 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3750}
9ac98284 3751
1da177e4
LT		 3752/**
3753 * e1000_intr - Interrupt Handler
3754 * @irq: interrupt number
3755 * @data: pointer to a network interface device structure
1da177e4 3756 **/
64798845 3757static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3758{
3759 struct net_device *netdev = data;
60490fe0 3760 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3761 struct e1000_hw *hw = &adapter->hw;
1532ecea 3762 u32 icr = er32(ICR);
c3570acb 3763
4c11b8ad 3764 if (unlikely((!icr)))
835bb129
JB		 3765 return IRQ_NONE; /* Not our interrupt */
3766
6cfbd97b 3767 /* we might have caused the interrupt, but the above
4c11b8ad
JB		 3768 * read cleared it, and just in case the driver is
3769 * down there is nothing to do so return handled
3770 */
3771 if (unlikely(test_bit(__E1000_DOWN, &adapter->flags)))
3772 return IRQ_HANDLED;
3773
96838a40 3774 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3775 hw->get_link_status = 1;
1314bbf3
AK		 3776 /* guard against interrupt when we're going down */
3777 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 3778 schedule_delayed_work(&adapter->watchdog_task, 1);
1da177e4
LT		 3779 }
3780
1532ecea
JB		 3781 /* disable interrupts, without the synchronize_irq bit */
3782 ew32(IMC, ~0);
3783 E1000_WRITE_FLUSH();
3784
288379f0 3785 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3786 adapter->total_tx_bytes = 0;
3787 adapter->total_tx_packets = 0;
3788 adapter->total_rx_bytes = 0;
3789 adapter->total_rx_packets = 0;
288379f0 3790 __napi_schedule(&adapter->napi);
a6c42322 3791 } else {
90fb5135 3792 /* this really should not happen! if it does it is basically a
6cfbd97b
JK		 3793 * bug, but not a hard error, so enable ints and continue
3794 */
a6c42322
JB		 3795 if (!test_bit(__E1000_DOWN, &adapter->flags))
3796 e1000_irq_enable(adapter);
3797 }
1da177e4 3798
1da177e4
LT		 3799 return IRQ_HANDLED;
3800}
3801
1da177e4
LT		 3802/**
3803 * e1000_clean - NAPI Rx polling callback
3804 * @adapter: board private structure
3805 **/
64798845 3806static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3807{
6cfbd97b
JK		 3808 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
3809 napi);
650b5a5c 3810 int tx_clean_complete = 0, work_done = 0;
581d708e 3811
650b5a5c 3812 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3813
650b5a5c 3814 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3815
650b5a5c 3816 if (!tx_clean_complete)
d2c7ddd6
DM		 3817 work_done = budget;
3818
53e52c72
DM		 3819 /* If budget not fully consumed, exit the polling mode */
3820 if (work_done < budget) {
835bb129
JB		 3821 if (likely(adapter->itr_setting & 3))
3822 e1000_set_itr(adapter);
32b3e08f 3823 napi_complete_done(napi, work_done);
a6c42322
JB		 3824 if (!test_bit(__E1000_DOWN, &adapter->flags))
3825 e1000_irq_enable(adapter);
1da177e4
LT		 3826 }
3827
bea3348e 3828 return work_done;
1da177e4
LT		 3829}
3830
1da177e4
LT		 3831/**
3832 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3833 * @adapter: board private structure
3834 **/
64798845
JP		 3835static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3836 struct e1000_tx_ring *tx_ring)
1da177e4 3837{
1dc32918 3838 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3839 struct net_device *netdev = adapter->netdev;
3840 struct e1000_tx_desc *tx_desc, *eop_desc;
580f321d 3841 struct e1000_tx_buffer *buffer_info;
1da177e4 3842 unsigned int i, eop;
2a1af5d7 3843 unsigned int count = 0;
835bb129 3844 unsigned int total_tx_bytes=0, total_tx_packets=0;
2f66fd36 3845 unsigned int bytes_compl = 0, pkts_compl = 0;
1da177e4
LT		 3846
3847 i = tx_ring->next_to_clean;
3848 eop = tx_ring->buffer_info[i].next_to_watch;
3849 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3850
ccfb342c
AD		 3851 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3852 (count < tx_ring->count)) {
843f4267 3853 bool cleaned = false;
837a1dba 3854 dma_rmb(); /* read buffer_info after eop_desc */
843f4267 3855 for ( ; !cleaned; count++) {
1da177e4
LT		 3856 tx_desc = E1000_TX_DESC(*tx_ring, i);
3857 buffer_info = &tx_ring->buffer_info[i];
3858 cleaned = (i == eop);
3859
835bb129 3860 if (cleaned) {
31c15a2f
DN		 3861 total_tx_packets += buffer_info->segs;
3862 total_tx_bytes += buffer_info->bytecount;
2f66fd36
OESC		 3863 if (buffer_info->skb) {
3864 bytes_compl += buffer_info->skb->len;
3865 pkts_compl++;
3866 }
3867
835bb129 3868 }
fd803241 3869 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3870 tx_desc->upper.data = 0;
1da177e4 3871
96838a40 3872 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3873 }
581d708e 3874
1da177e4
LT		 3875 eop = tx_ring->buffer_info[i].next_to_watch;
3876 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3877 }
3878
3879 tx_ring->next_to_clean = i;
3880
2f66fd36
OESC		 3881 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
3882
77b2aad5 3883#define TX_WAKE_THRESHOLD 32
843f4267 3884 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3885 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3886 /* Make sure that anybody stopping the queue after this
3887 * sees the new next_to_clean.
3888 */
3889 smp_mb();
cdd7549e
JB		 3890
3891 if (netif_queue_stopped(netdev) &&
3892 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3893 netif_wake_queue(netdev);
fcfb1224
JB		 3894 ++adapter->restart_queue;
3895 }
77b2aad5 3896 }
2648345f 3897
581d708e 3898 if (adapter->detect_tx_hung) {
2648345f 3899 /* Detect a transmit hang in hardware, this serializes the
6cfbd97b
JK		 3900 * check with the clearing of time_stamp and movement of i
3901 */
c3033b01 3902 adapter->detect_tx_hung = false;
cdd7549e
JB		 3903 if (tx_ring->buffer_info[eop].time_stamp &&
3904 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
6cfbd97b 3905 (adapter->tx_timeout_factor * HZ)) &&
8e95a202 3906 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3907
3908 /* detected Tx unit hang */
feb8f478 3909 e_err(drv, "Detected Tx Unit Hang\n"
675ad473
ET		 3910 " Tx Queue <%lu>\n"
3911 " TDH <%x>\n"
3912 " TDT <%x>\n"
3913 " next_to_use <%x>\n"
3914 " next_to_clean <%x>\n"
3915 "buffer_info[next_to_clean]\n"
3916 " time_stamp <%lx>\n"
3917 " next_to_watch <%x>\n"
3918 " jiffies <%lx>\n"
3919 " next_to_watch.status <%x>\n",
49a45a06 3920 (unsigned long)(tx_ring - adapter->tx_ring),
1dc32918
JP		 3921 readl(hw->hw_addr + tx_ring->tdh),
3922 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3923 tx_ring->next_to_use,
392137fa 3924 tx_ring->next_to_clean,
cdd7549e 3925 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3926 eop,
3927 jiffies,
3928 eop_desc->upper.fields.status);
b04e36ba 3929 e1000_dump(adapter);
1da177e4 3930 netif_stop_queue(netdev);
70b8f1e1 3931 }
1da177e4 3932 }
835bb129
JB		 3933 adapter->total_tx_bytes += total_tx_bytes;
3934 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK		 3935 netdev->stats.tx_bytes += total_tx_bytes;
3936 netdev->stats.tx_packets += total_tx_packets;
807540ba 3937 return count < tx_ring->count;
1da177e4
LT		 3938}
3939
3940/**
3941 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3942 * @adapter: board private structure
3943 * @status_err: receive descriptor status and error fields
3944 * @csum: receive descriptor csum field
3945 * @sk_buff: socket buffer with received data
1da177e4 3946 **/
64798845
JP		 3947static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3948 u32 csum, struct sk_buff *skb)
1da177e4 3949{
1dc32918 3950 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3951 u16 status = (u16)status_err;
3952 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 3953
3954 skb_checksum_none_assert(skb);
2d7edb92 3955
1da177e4 3956 /* 82543 or newer only */
1dc32918 3957 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3958 /* Ignore Checksum bit is set */
96838a40 3959 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3960 /* TCP/UDP checksum error bit is set */
96838a40 3961 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3962 /* let the stack verify checksum errors */
1da177e4 3963 adapter->hw_csum_err++;
2d7edb92
MC		 3964 return;
3965 }
3966 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB		 3967 if (!(status & E1000_RXD_STAT_TCPCS))
3968 return;
3969
2d7edb92
MC		 3970 /* It must be a TCP or UDP packet with a valid checksum */
3971 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3972 /* TCP checksum is good */
3973 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3974 }
2d7edb92 3975 adapter->hw_csum_good++;
1da177e4
LT		 3976}
3977
edbbb3ca 3978/**
13809609 3979 * e1000_consume_page - helper function for jumbo Rx path
edbbb3ca 3980 **/
93f0afe9 3981static void e1000_consume_page(struct e1000_rx_buffer *bi, struct sk_buff *skb,
6cfbd97b 3982 u16 length)
edbbb3ca 3983{
13809609 3984 bi->rxbuf.page = NULL;
edbbb3ca
JB		 3985 skb->len += length;
3986 skb->data_len += length;
ed64b3cc 3987 skb->truesize += PAGE_SIZE;
edbbb3ca
JB		 3988}
3989
3990/**
3991 * e1000_receive_skb - helper function to handle rx indications
3992 * @adapter: board private structure
3993 * @status: descriptor status field as written by hardware
3994 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3995 * @skb: pointer to sk_buff to be indicated to stack
3996 */
3997static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3998 __le16 vlan, struct sk_buff *skb)
3999{
6a08d194
JB		 4000 skb->protocol = eth_type_trans(skb, adapter->netdev);
4001
5622e404
JP		 4002 if (status & E1000_RXD_STAT_VP) {
4003 u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
4004
86a9bad3 4005 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
5622e404
JP		 4006 }
4007 napi_gro_receive(&adapter->napi, skb);
edbbb3ca
JB		 4008}
4009
4f0aeb1e
FW		 4010/**
4011 * e1000_tbi_adjust_stats
4012 * @hw: Struct containing variables accessed by shared code
4013 * @frame_len: The length of the frame in question
4014 * @mac_addr: The Ethernet destination address of the frame in question
4015 *
4016 * Adjusts the statistic counters when a frame is accepted by TBI_ACCEPT
4017 */
4018static void e1000_tbi_adjust_stats(struct e1000_hw *hw,
4019 struct e1000_hw_stats *stats,
4020 u32 frame_len, const u8 *mac_addr)
4021{
4022 u64 carry_bit;
4023
4024 /* First adjust the frame length. */
4025 frame_len--;
4026 /* We need to adjust the statistics counters, since the hardware
4027 * counters overcount this packet as a CRC error and undercount
4028 * the packet as a good packet
4029 */
4030 /* This packet should not be counted as a CRC error. */
4031 stats->crcerrs--;
4032 /* This packet does count as a Good Packet Received. */
4033 stats->gprc++;
4034
4035 /* Adjust the Good Octets received counters */
4036 carry_bit = 0x80000000 & stats->gorcl;
4037 stats->gorcl += frame_len;
4038 /* If the high bit of Gorcl (the low 32 bits of the Good Octets
4039 * Received Count) was one before the addition,
4040 * AND it is zero after, then we lost the carry out,
4041 * need to add one to Gorch (Good Octets Received Count High).
4042 * This could be simplified if all environments supported
4043 * 64-bit integers.
4044 */
4045 if (carry_bit && ((stats->gorcl & 0x80000000) == 0))
4046 stats->gorch++;
4047 /* Is this a broadcast or multicast? Check broadcast first,
4048 * since the test for a multicast frame will test positive on
4049 * a broadcast frame.
4050 */
4051 if (is_broadcast_ether_addr(mac_addr))
4052 stats->bprc++;
4053 else if (is_multicast_ether_addr(mac_addr))
4054 stats->mprc++;
4055
4056 if (frame_len == hw->max_frame_size) {
4057 /* In this case, the hardware has overcounted the number of
4058 * oversize frames.
4059 */
4060 if (stats->roc > 0)
4061 stats->roc--;
4062 }
4063
4064 /* Adjust the bin counters when the extra byte put the frame in the
4065 * wrong bin. Remember that the frame_len was adjusted above.
4066 */
4067 if (frame_len == 64) {
4068 stats->prc64++;
4069 stats->prc127--;
4070 } else if (frame_len == 127) {
4071 stats->prc127++;
4072 stats->prc255--;
4073 } else if (frame_len == 255) {
4074 stats->prc255++;
4075 stats->prc511--;
4076 } else if (frame_len == 511) {
4077 stats->prc511++;
4078 stats->prc1023--;
4079 } else if (frame_len == 1023) {
4080 stats->prc1023++;
4081 stats->prc1522--;
4082 } else if (frame_len == 1522) {
4083 stats->prc1522++;
4084 }
4085}
4086
2037110c
FW		 4087static bool e1000_tbi_should_accept(struct e1000_adapter *adapter,
4088 u8 status, u8 errors,
4089 u32 length, const u8 *data)
4090{
4091 struct e1000_hw *hw = &adapter->hw;
4092 u8 last_byte = *(data + length - 1);
4093
4094 if (TBI_ACCEPT(hw, status, errors, length, last_byte)) {
4095 unsigned long irq_flags;
4096
4097 spin_lock_irqsave(&adapter->stats_lock, irq_flags);
4098 e1000_tbi_adjust_stats(hw, &adapter->stats, length, data);
4099 spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);
4100
4101 return true;
4102 }
4103
4104 return false;
4105}
4106
2b294b18
FW		 4107static struct sk_buff *e1000_alloc_rx_skb(struct e1000_adapter *adapter,
4108 unsigned int bufsz)
4109{
67fd893e 4110 struct sk_buff *skb = napi_alloc_skb(&adapter->napi, bufsz);
2b294b18
FW		 4111
4112 if (unlikely(!skb))
4113 adapter->alloc_rx_buff_failed++;
4114 return skb;
4115}
4116
edbbb3ca
JB		 4117/**
4118 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
4119 * @adapter: board private structure
4120 * @rx_ring: ring to clean
4121 * @work_done: amount of napi work completed this call
4122 * @work_to_do: max amount of work allowed for this call to do
4123 *
4124 * the return value indicates whether actual cleaning was done, there
4125 * is no guarantee that everything was cleaned
4126 */
4127static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
4128 struct e1000_rx_ring *rx_ring,
4129 int *work_done, int work_to_do)
4130{
edbbb3ca
JB		 4131 struct net_device *netdev = adapter->netdev;
4132 struct pci_dev *pdev = adapter->pdev;
4133 struct e1000_rx_desc *rx_desc, *next_rxd;
93f0afe9 4134 struct e1000_rx_buffer *buffer_info, *next_buffer;
edbbb3ca
JB		 4135 u32 length;
4136 unsigned int i;
4137 int cleaned_count = 0;
4138 bool cleaned = false;
4139 unsigned int total_rx_bytes=0, total_rx_packets=0;
4140
4141 i = rx_ring->next_to_clean;
4142 rx_desc = E1000_RX_DESC(*rx_ring, i);
4143 buffer_info = &rx_ring->buffer_info[i];
4144
4145 while (rx_desc->status & E1000_RXD_STAT_DD) {
4146 struct sk_buff *skb;
4147 u8 status;
4148
4149 if (*work_done >= work_to_do)
4150 break;
4151 (*work_done)++;
837a1dba 4152 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
edbbb3ca
JB		 4153
4154 status = rx_desc->status;
edbbb3ca
JB		 4155
4156 if (++i == rx_ring->count) i = 0;
4157 next_rxd = E1000_RX_DESC(*rx_ring, i);
4158 prefetch(next_rxd);
4159
4160 next_buffer = &rx_ring->buffer_info[i];
4161
4162 cleaned = true;
4163 cleaned_count++;
b16f53be 4164 dma_unmap_page(&pdev->dev, buffer_info->dma,
93f0afe9 4165 adapter->rx_buffer_len, DMA_FROM_DEVICE);
edbbb3ca
JB		 4166 buffer_info->dma = 0;
4167
4168 length = le16_to_cpu(rx_desc->length);
4169
4170 /* errors is only valid for DD + EOP descriptors */
4171 if (unlikely((status & E1000_RXD_STAT_EOP) &&
4172 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
13809609 4173 u8 *mapped = page_address(buffer_info->rxbuf.page);
2037110c
FW		 4174
4175 if (e1000_tbi_should_accept(adapter, status,
4176 rx_desc->errors,
4177 length, mapped)) {
edbbb3ca 4178 length--;
2037110c
FW		 4179 } else if (netdev->features & NETIF_F_RXALL) {
4180 goto process_skb;
edbbb3ca 4181 } else {
edbbb3ca 4182 /* an error means any chain goes out the window
6cfbd97b
JK		 4183 * too
4184 */
edbbb3ca
JB		 4185 if (rx_ring->rx_skb_top)
4186 dev_kfree_skb(rx_ring->rx_skb_top);
4187 rx_ring->rx_skb_top = NULL;
4188 goto next_desc;
4189 }
4190 }
4191
4192#define rxtop rx_ring->rx_skb_top
e825b731 4193process_skb:
edbbb3ca
JB		 4194 if (!(status & E1000_RXD_STAT_EOP)) {
4195 /* this descriptor is only the beginning (or middle) */
4196 if (!rxtop) {
4197 /* this is the beginning of a chain */
de591c78 4198 rxtop = napi_get_frags(&adapter->napi);
13809609
FW		 4199 if (!rxtop)
4200 break;
4201
4202 skb_fill_page_desc(rxtop, 0,
4203 buffer_info->rxbuf.page,
6cfbd97b 4204 0, length);
edbbb3ca
JB		 4205 } else {
4206 /* this is the middle of a chain */
4207 skb_fill_page_desc(rxtop,
4208 skb_shinfo(rxtop)->nr_frags,
13809609 4209 buffer_info->rxbuf.page, 0, length);
edbbb3ca
JB		 4210 }
4211 e1000_consume_page(buffer_info, rxtop, length);
4212 goto next_desc;
4213 } else {
4214 if (rxtop) {
4215 /* end of the chain */
4216 skb_fill_page_desc(rxtop,
4217 skb_shinfo(rxtop)->nr_frags,
13809609 4218 buffer_info->rxbuf.page, 0, length);
edbbb3ca
JB		 4219 skb = rxtop;
4220 rxtop = NULL;
4221 e1000_consume_page(buffer_info, skb, length);
4222 } else {
13809609 4223 struct page *p;
edbbb3ca 4224 /* no chain, got EOP, this buf is the packet
6cfbd97b
JK		 4225 * copybreak to save the put_page/alloc_page
4226 */
13809609 4227 p = buffer_info->rxbuf.page;
de591c78 4228 if (length <= copybreak) {
edbbb3ca 4229 u8 *vaddr;
13809609 4230
de591c78
FW		 4231 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4232 length -= 4;
4233 skb = e1000_alloc_rx_skb(adapter,
4234 length);
4235 if (!skb)
4236 break;
4237
13809609 4238 vaddr = kmap_atomic(p);
6cfbd97b
JK		 4239 memcpy(skb_tail_pointer(skb), vaddr,
4240 length);
4679026d 4241 kunmap_atomic(vaddr);
edbbb3ca 4242 /* re-use the page, so don't erase
13809609 4243 * buffer_info->rxbuf.page
6cfbd97b 4244 */
edbbb3ca 4245 skb_put(skb, length);
de591c78
FW		 4246 e1000_rx_checksum(adapter,
4247 status | rx_desc->errors << 24,
4248 le16_to_cpu(rx_desc->csum), skb);
4249
4250 total_rx_bytes += skb->len;
4251 total_rx_packets++;
4252
4253 e1000_receive_skb(adapter, status,
4254 rx_desc->special, skb);
4255 goto next_desc;
edbbb3ca 4256 } else {
de591c78
FW		 4257 skb = napi_get_frags(&adapter->napi);
4258 if (!skb) {
4259 adapter->alloc_rx_buff_failed++;
4260 break;
4261 }
13809609 4262 skb_fill_page_desc(skb, 0, p, 0,
6cfbd97b 4263 length);
edbbb3ca 4264 e1000_consume_page(buffer_info, skb,
6cfbd97b 4265 length);
edbbb3ca
JB		 4266 }
4267 }
4268 }
4269
4270 /* Receive Checksum Offload XXX recompute due to CRC strip? */
4271 e1000_rx_checksum(adapter,
6cfbd97b
JK		 4272 (u32)(status) |
4273 ((u32)(rx_desc->errors) << 24),
4274 le16_to_cpu(rx_desc->csum), skb);
edbbb3ca 4275
b0d1562c
BG		 4276 total_rx_bytes += (skb->len - 4); /* don't count FCS */
4277 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4278 pskb_trim(skb, skb->len - 4);
edbbb3ca
JB		 4279 total_rx_packets++;
4280
de591c78
FW		 4281 if (status & E1000_RXD_STAT_VP) {
4282 __le16 vlan = rx_desc->special;
4283 u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
4284
4285 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
edbbb3ca
JB		 4286 }
4287
de591c78 4288 napi_gro_frags(&adapter->napi);
edbbb3ca
JB		 4289
4290next_desc:
4291 rx_desc->status = 0;
4292
4293 /* return some buffers to hardware, one at a time is too slow */
4294 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4295 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4296 cleaned_count = 0;
4297 }
4298
4299 /* use prefetched values */
4300 rx_desc = next_rxd;
4301 buffer_info = next_buffer;
4302 }
4303 rx_ring->next_to_clean = i;
4304
4305 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4306 if (cleaned_count)
4307 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4308
4309 adapter->total_rx_packets += total_rx_packets;
4310 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4311 netdev->stats.rx_bytes += total_rx_bytes;
4312 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB		 4313 return cleaned;
4314}
4315
6cfbd97b 4316/* this should improve performance for small packets with large amounts
57bf6eef
JP		 4317 * of reassembly being done in the stack
4318 */
2b294b18 4319static struct sk_buff *e1000_copybreak(struct e1000_adapter *adapter,
93f0afe9 4320 struct e1000_rx_buffer *buffer_info,
2b294b18 4321 u32 length, const void *data)
57bf6eef 4322{
2b294b18 4323 struct sk_buff *skb;
57bf6eef
JP		 4324
4325 if (length > copybreak)
2b294b18 4326 return NULL;
57bf6eef 4327
2b294b18
FW		 4328 skb = e1000_alloc_rx_skb(adapter, length);
4329 if (!skb)
4330 return NULL;
4331
4332 dma_sync_single_for_cpu(&adapter->pdev->dev, buffer_info->dma,
4333 length, DMA_FROM_DEVICE);
4334
4335 memcpy(skb_put(skb, length), data, length);
57bf6eef 4336
2b294b18 4337 return skb;
57bf6eef
JP		 4338}
4339
1da177e4 4340/**
2d7edb92 4341 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 4342 * @adapter: board private structure
edbbb3ca
JB		 4343 * @rx_ring: ring to clean
4344 * @work_done: amount of napi work completed this call
4345 * @work_to_do: max amount of work allowed for this call to do
4346 */
64798845
JP		 4347static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
4348 struct e1000_rx_ring *rx_ring,
4349 int *work_done, int work_to_do)
1da177e4 4350{
1da177e4
LT		 4351 struct net_device *netdev = adapter->netdev;
4352 struct pci_dev *pdev = adapter->pdev;
86c3d59f 4353 struct e1000_rx_desc *rx_desc, *next_rxd;
93f0afe9 4354 struct e1000_rx_buffer *buffer_info, *next_buffer;
406874a7 4355 u32 length;
1da177e4 4356 unsigned int i;
72d64a43 4357 int cleaned_count = 0;
c3033b01 4358 bool cleaned = false;
835bb129 4359 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 4360
4361 i = rx_ring->next_to_clean;
4362 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4363 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4364
b92ff8ee 4365 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4366 struct sk_buff *skb;
13809609 4367 u8 *data;
a292ca6e 4368 u8 status;
90fb5135 4369
96838a40 4370 if (*work_done >= work_to_do)
1da177e4
LT		 4371 break;
4372 (*work_done)++;
837a1dba 4373 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
c3570acb 4374
a292ca6e 4375 status = rx_desc->status;
2b294b18 4376 length = le16_to_cpu(rx_desc->length);
86c3d59f 4377
13809609
FW		 4378 data = buffer_info->rxbuf.data;
4379 prefetch(data);
4380 skb = e1000_copybreak(adapter, buffer_info, length, data);
2b294b18 4381 if (!skb) {
13809609
FW		 4382 unsigned int frag_len = e1000_frag_len(adapter);
4383
4384 skb = build_skb(data - E1000_HEADROOM, frag_len);
4385 if (!skb) {
4386 adapter->alloc_rx_buff_failed++;
4387 break;
4388 }
4389
4390 skb_reserve(skb, E1000_HEADROOM);
2b294b18 4391 dma_unmap_single(&pdev->dev, buffer_info->dma,
93f0afe9
FW		 4392 adapter->rx_buffer_len,
4393 DMA_FROM_DEVICE);
2b294b18 4394 buffer_info->dma = 0;
13809609 4395 buffer_info->rxbuf.data = NULL;
2b294b18 4396 }
30320be8 4397
86c3d59f
JB		 4398 if (++i == rx_ring->count) i = 0;
4399 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4400 prefetch(next_rxd);
4401
86c3d59f 4402 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4403
c3033b01 4404 cleaned = true;
72d64a43 4405 cleaned_count++;
1da177e4 4406
ea30e119 4407 /* !EOP means multiple descriptors were used to store a single
40a14dea
JB		 4408 * packet, if thats the case we need to toss it. In fact, we
4409 * to toss every packet with the EOP bit clear and the next
4410 * frame that _does_ have the EOP bit set, as it is by
4411 * definition only a frame fragment
4412 */
4413 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
4414 adapter->discarding = true;
4415
4416 if (adapter->discarding) {
a1415ee6 4417 /* All receives must fit into a single buffer */
2037110c 4418 netdev_dbg(netdev, "Receive packet consumed multiple buffers\n");
2b294b18 4419 dev_kfree_skb(skb);
40a14dea
JB		 4420 if (status & E1000_RXD_STAT_EOP)
4421 adapter->discarding = false;
1da177e4
LT		 4422 goto next_desc;
4423 }
4424
96838a40 4425 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
2037110c
FW		 4426 if (e1000_tbi_should_accept(adapter, status,
4427 rx_desc->errors,
13809609 4428 length, data)) {
1da177e4 4429 length--;
2037110c
FW		 4430 } else if (netdev->features & NETIF_F_RXALL) {
4431 goto process_skb;
1da177e4 4432 } else {
2b294b18 4433 dev_kfree_skb(skb);
1da177e4
LT		 4434 goto next_desc;
4435 }
1cb5821f 4436 }
1da177e4 4437
e825b731 4438process_skb:
b0d1562c 4439 total_rx_bytes += (length - 4); /* don't count FCS */
835bb129
JB		 4440 total_rx_packets++;
4441
b0d1562c
BG		 4442 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4443 /* adjust length to remove Ethernet CRC, this must be
4444 * done after the TBI_ACCEPT workaround above
4445 */
4446 length -= 4;
4447
13809609 4448 if (buffer_info->rxbuf.data == NULL)
2b294b18
FW		 4449 skb_put(skb, length);
4450 else /* copybreak skb */
4451 skb_trim(skb, length);
1da177e4
LT		 4452
4453 /* Receive Checksum Offload */
a292ca6e 4454 e1000_rx_checksum(adapter,
406874a7
JP		 4455 (u32)(status) |
4456 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4457 le16_to_cpu(rx_desc->csum), skb);
96838a40 4458
edbbb3ca 4459 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 4460
1da177e4
LT		 4461next_desc:
4462 rx_desc->status = 0;
1da177e4 4463
72d64a43
JK		 4464 /* return some buffers to hardware, one at a time is too slow */
4465 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4466 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4467 cleaned_count = 0;
4468 }
4469
30320be8 4470 /* use prefetched values */
86c3d59f
JB		 4471 rx_desc = next_rxd;
4472 buffer_info = next_buffer;
1da177e4 4473 }
1da177e4 4474 rx_ring->next_to_clean = i;
72d64a43
JK		 4475
4476 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4477 if (cleaned_count)
4478 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4479
835bb129
JB		 4480 adapter->total_rx_packets += total_rx_packets;
4481 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4482 netdev->stats.rx_bytes += total_rx_bytes;
4483 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4484 return cleaned;
4485}
4486
edbbb3ca
JB		 4487/**
4488 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
4489 * @adapter: address of board private structure
4490 * @rx_ring: pointer to receive ring structure
4491 * @cleaned_count: number of buffers to allocate this pass
4492 **/
edbbb3ca
JB		 4493static void
4494e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
6cfbd97b 4495 struct e1000_rx_ring *rx_ring, int cleaned_count)
edbbb3ca 4496{
edbbb3ca
JB		 4497 struct pci_dev *pdev = adapter->pdev;
4498 struct e1000_rx_desc *rx_desc;
93f0afe9 4499 struct e1000_rx_buffer *buffer_info;
edbbb3ca 4500 unsigned int i;
edbbb3ca
JB		 4501
4502 i = rx_ring->next_to_use;
4503 buffer_info = &rx_ring->buffer_info[i];
4504
4505 while (cleaned_count--) {
edbbb3ca 4506 /* allocate a new page if necessary */
13809609
FW		 4507 if (!buffer_info->rxbuf.page) {
4508 buffer_info->rxbuf.page = alloc_page(GFP_ATOMIC);
4509 if (unlikely(!buffer_info->rxbuf.page)) {
edbbb3ca
JB		 4510 adapter->alloc_rx_buff_failed++;
4511 break;
4512 }
4513 }
4514
b5abb028 4515 if (!buffer_info->dma) {
b16f53be 4516 buffer_info->dma = dma_map_page(&pdev->dev,
13809609
FW		 4517 buffer_info->rxbuf.page, 0,
4518 adapter->rx_buffer_len,
b16f53be
NN		 4519 DMA_FROM_DEVICE);
4520 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
13809609
FW		 4521 put_page(buffer_info->rxbuf.page);
4522 buffer_info->rxbuf.page = NULL;
b5abb028
AB		 4523 buffer_info->dma = 0;
4524 adapter->alloc_rx_buff_failed++;
13809609 4525 break;
b5abb028
AB		 4526 }
4527 }
edbbb3ca
JB		 4528
4529 rx_desc = E1000_RX_DESC(*rx_ring, i);
4530 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4531
4532 if (unlikely(++i == rx_ring->count))
4533 i = 0;
4534 buffer_info = &rx_ring->buffer_info[i];
4535 }
4536
4537 if (likely(rx_ring->next_to_use != i)) {
4538 rx_ring->next_to_use = i;
4539 if (unlikely(i-- == 0))
4540 i = (rx_ring->count - 1);
4541
4542 /* Force memory writes to complete before letting h/w
4543 * know there are new descriptors to fetch. (Only
4544 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 4545 * such as IA-64).
4546 */
edbbb3ca
JB		 4547 wmb();
4548 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4549 }
4550}
4551
1da177e4 4552/**
2d7edb92 4553 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4554 * @adapter: address of board private structure
4555 **/
64798845
JP		 4556static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4557 struct e1000_rx_ring *rx_ring,
4558 int cleaned_count)
1da177e4 4559{
1dc32918 4560 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4561 struct pci_dev *pdev = adapter->pdev;
4562 struct e1000_rx_desc *rx_desc;
93f0afe9 4563 struct e1000_rx_buffer *buffer_info;
2648345f 4564 unsigned int i;
89d71a66 4565 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT		 4566
4567 i = rx_ring->next_to_use;
4568 buffer_info = &rx_ring->buffer_info[i];
4569
a292ca6e 4570 while (cleaned_count--) {
13809609
FW		 4571 void *data;
4572
4573 if (buffer_info->rxbuf.data)
2b294b18 4574 goto skip;
a292ca6e 4575
13809609
FW		 4576 data = e1000_alloc_frag(adapter);
4577 if (!data) {
1da177e4 4578 /* Better luck next round */
72d64a43 4579 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4580 break;
4581 }
4582
2648345f 4583 /* Fix for errata 23, can't cross 64kB boundary */
13809609
FW		 4584 if (!e1000_check_64k_bound(adapter, data, bufsz)) {
4585 void *olddata = data;
feb8f478 4586 e_err(rx_err, "skb align check failed: %u bytes at "
13809609 4587 "%p\n", bufsz, data);
2648345f 4588 /* Try again, without freeing the previous */
13809609 4589 data = e1000_alloc_frag(adapter);
2648345f 4590 /* Failed allocation, critical failure */
13809609 4591 if (!data) {
6bf93ba8 4592 skb_free_frag(olddata);
edbbb3ca 4593 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4594 break;
4595 }
2648345f 4596
13809609 4597 if (!e1000_check_64k_bound(adapter, data, bufsz)) {
1da177e4 4598 /* give up */
6bf93ba8
AD		 4599 skb_free_frag(data);
4600 skb_free_frag(olddata);
edbbb3ca 4601 adapter->alloc_rx_buff_failed++;
13809609 4602 break;
1da177e4 4603 }
ca6f7224
CH		 4604
4605 /* Use new allocation */
6bf93ba8 4606 skb_free_frag(olddata);
1da177e4 4607 }
b16f53be 4608 buffer_info->dma = dma_map_single(&pdev->dev,
13809609 4609 data,
93f0afe9 4610 adapter->rx_buffer_len,
b16f53be
NN		 4611 DMA_FROM_DEVICE);
4612 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
6bf93ba8 4613 skb_free_frag(data);
b5abb028
AB		 4614 buffer_info->dma = 0;
4615 adapter->alloc_rx_buff_failed++;
13809609 4616 break;
b5abb028 4617 }
1da177e4 4618
6cfbd97b 4619 /* XXX if it was allocated cleanly it will never map to a
edbbb3ca
JB		 4620 * boundary crossing
4621 */
4622
2648345f
MC		 4623 /* Fix for errata 23, can't cross 64kB boundary */
4624 if (!e1000_check_64k_bound(adapter,
4625 (void *)(unsigned long)buffer_info->dma,
4626 adapter->rx_buffer_len)) {
feb8f478
ET		 4627 e_err(rx_err, "dma align check failed: %u bytes at "
4628 "%p\n", adapter->rx_buffer_len,
675ad473 4629 (void *)(unsigned long)buffer_info->dma);
1da177e4 4630
b16f53be 4631 dma_unmap_single(&pdev->dev, buffer_info->dma,
1da177e4 4632 adapter->rx_buffer_len,
b16f53be 4633 DMA_FROM_DEVICE);
13809609 4634
6bf93ba8 4635 skb_free_frag(data);
13809609 4636 buffer_info->rxbuf.data = NULL;
679be3ba 4637 buffer_info->dma = 0;
1da177e4 4638
edbbb3ca 4639 adapter->alloc_rx_buff_failed++;
13809609 4640 break;
1da177e4 4641 }
13809609
FW		 4642 buffer_info->rxbuf.data = data;
4643 skip:
1da177e4
LT		 4644 rx_desc = E1000_RX_DESC(*rx_ring, i);
4645 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4646
96838a40
JB		 4647 if (unlikely(++i == rx_ring->count))
4648 i = 0;
1da177e4
LT		 4649 buffer_info = &rx_ring->buffer_info[i];
4650 }
4651
b92ff8ee
JB		 4652 if (likely(rx_ring->next_to_use != i)) {
4653 rx_ring->next_to_use = i;
4654 if (unlikely(i-- == 0))
4655 i = (rx_ring->count - 1);
4656
4657 /* Force memory writes to complete before letting h/w
4658 * know there are new descriptors to fetch. (Only
4659 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 4660 * such as IA-64).
4661 */
b92ff8ee 4662 wmb();
1dc32918 4663 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4664 }
1da177e4
LT		 4665}
4666
4667/**
4668 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4669 * @adapter:
4670 **/
64798845 4671static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4672{
1dc32918 4673 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4674 u16 phy_status;
4675 u16 phy_ctrl;
1da177e4 4676
1dc32918
JP		 4677 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4678 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4679 return;
4680
96838a40 4681 if (adapter->smartspeed == 0) {
1da177e4 4682 /* If Master/Slave config fault is asserted twice,
6cfbd97b
JK		 4683 * we assume back-to-back
4684 */
1dc32918 4685 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4686 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4687 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4688 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4689 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4690 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4691 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4692 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4693 phy_ctrl);
4694 adapter->smartspeed++;
1dc32918
JP		 4695 if (!e1000_phy_setup_autoneg(hw) &&
4696 !e1000_read_phy_reg(hw, PHY_CTRL,
6cfbd97b 4697 &phy_ctrl)) {
1da177e4
LT		 4698 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4699 MII_CR_RESTART_AUTO_NEG);
1dc32918 4700 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4701 phy_ctrl);
4702 }
4703 }
4704 return;
96838a40 4705 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4706 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4707 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4708 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4709 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4710 if (!e1000_phy_setup_autoneg(hw) &&
4711 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4712 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4713 MII_CR_RESTART_AUTO_NEG);
1dc32918 4714 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4715 }
4716 }
4717 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4718 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4719 adapter->smartspeed = 0;
4720}
4721
4722/**
4723 * e1000_ioctl -
4724 * @netdev:
4725 * @ifreq:
4726 * @cmd:
4727 **/
64798845 4728static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4729{
4730 switch (cmd) {
4731 case SIOCGMIIPHY:
4732 case SIOCGMIIREG:
4733 case SIOCSMIIREG:
4734 return e1000_mii_ioctl(netdev, ifr, cmd);
4735 default:
4736 return -EOPNOTSUPP;
4737 }
4738}
4739
4740/**
4741 * e1000_mii_ioctl -
4742 * @netdev:
4743 * @ifreq:
4744 * @cmd:
4745 **/
64798845
JP		 4746static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4747 int cmd)
1da177e4 4748{
60490fe0 4749 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4750 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4751 struct mii_ioctl_data *data = if_mii(ifr);
4752 int retval;
406874a7 4753 u16 mii_reg;
97876fc6 4754 unsigned long flags;
1da177e4 4755
1dc32918 4756 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4757 return -EOPNOTSUPP;
4758
4759 switch (cmd) {
4760 case SIOCGMIIPHY:
1dc32918 4761 data->phy_id = hw->phy_addr;
1da177e4
LT		 4762 break;
4763 case SIOCGMIIREG:
97876fc6 4764 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4765 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4766 &data->val_out)) {
4767 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4768 return -EIO;
97876fc6
MC		 4769 }
4770 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4771 break;
4772 case SIOCSMIIREG:
96838a40 4773 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4774 return -EFAULT;
4775 mii_reg = data->val_in;
97876fc6 4776 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4777 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4778 mii_reg)) {
4779 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4780 return -EIO;
97876fc6 4781 }
f0163ac4 4782 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4783 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4784 switch (data->reg_num) {
4785 case PHY_CTRL:
96838a40 4786 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4787 break;
96838a40 4788 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4789 hw->autoneg = 1;
4790 hw->autoneg_advertised = 0x2F;
1da177e4 4791 } else {
14ad2513 4792 u32 speed;
1da177e4 4793 if (mii_reg & 0x40)
14ad2513 4794 speed = SPEED_1000;
1da177e4 4795 else if (mii_reg & 0x2000)
14ad2513 4796 speed = SPEED_100;
1da177e4 4797 else
14ad2513
DD		 4798 speed = SPEED_10;
4799 retval = e1000_set_spd_dplx(
4800 adapter, speed,
4801 ((mii_reg & 0x100)
4802 ? DUPLEX_FULL :
4803 DUPLEX_HALF));
f0163ac4 4804 if (retval)
1da177e4
LT		 4805 return retval;
4806 }
2db10a08
AK		 4807 if (netif_running(adapter->netdev))
4808 e1000_reinit_locked(adapter);
4809 else
1da177e4
LT		 4810 e1000_reset(adapter);
4811 break;
4812 case M88E1000_PHY_SPEC_CTRL:
4813 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4814 if (e1000_phy_reset(hw))
1da177e4
LT		 4815 return -EIO;
4816 break;
4817 }
4818 } else {
4819 switch (data->reg_num) {
4820 case PHY_CTRL:
96838a40 4821 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4822 break;
2db10a08
AK		 4823 if (netif_running(adapter->netdev))
4824 e1000_reinit_locked(adapter);
4825 else
1da177e4
LT		 4826 e1000_reset(adapter);
4827 break;
4828 }
4829 }
4830 break;
4831 default:
4832 return -EOPNOTSUPP;
4833 }
4834 return E1000_SUCCESS;
4835}
4836
64798845 4837void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4838{
4839 struct e1000_adapter *adapter = hw->back;
2648345f 4840 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4841
96838a40 4842 if (ret_val)
feb8f478 4843 e_err(probe, "Error in setting MWI\n");
1da177e4
LT		 4844}
4845
64798845 4846void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4847{
4848 struct e1000_adapter *adapter = hw->back;
4849
4850 pci_clear_mwi(adapter->pdev);
4851}
4852
64798845 4853int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4854{
4855 struct e1000_adapter *adapter = hw->back;
4856 return pcix_get_mmrbc(adapter->pdev);
4857}
4858
64798845 4859void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4860{
4861 struct e1000_adapter *adapter = hw->back;
4862 pcix_set_mmrbc(adapter->pdev, mmrbc);
4863}
4864
64798845 4865void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4866{
4867 outl(value, port);
4868}
4869
5622e404
JP		 4870static bool e1000_vlan_used(struct e1000_adapter *adapter)
4871{
4872 u16 vid;
4873
4874 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4875 return true;
4876 return false;
4877}
4878
52f5509f
JP		 4879static void __e1000_vlan_mode(struct e1000_adapter *adapter,
4880 netdev_features_t features)
4881{
4882 struct e1000_hw *hw = &adapter->hw;
4883 u32 ctrl;
4884
4885 ctrl = er32(CTRL);
f646968f 4886 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
52f5509f
JP		 4887 /* enable VLAN tag insert/strip */
4888 ctrl |= E1000_CTRL_VME;
4889 } else {
4890 /* disable VLAN tag insert/strip */
4891 ctrl &= ~E1000_CTRL_VME;
4892 }
4893 ew32(CTRL, ctrl);
4894}
5622e404
JP		 4895static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
4896 bool filter_on)
1da177e4 4897{
1dc32918 4898 struct e1000_hw *hw = &adapter->hw;
5622e404 4899 u32 rctl;
1da177e4 4900
9150b76a
JB		 4901 if (!test_bit(__E1000_DOWN, &adapter->flags))
4902 e1000_irq_disable(adapter);
1da177e4 4903
52f5509f 4904 __e1000_vlan_mode(adapter, adapter->netdev->features);
5622e404 4905 if (filter_on) {
1532ecea
JB		 4906 /* enable VLAN receive filtering */
4907 rctl = er32(RCTL);
4908 rctl &= ~E1000_RCTL_CFIEN;
5622e404 4909 if (!(adapter->netdev->flags & IFF_PROMISC))
1532ecea
JB		 4910 rctl |= E1000_RCTL_VFE;
4911 ew32(RCTL, rctl);
4912 e1000_update_mng_vlan(adapter);
1da177e4 4913 } else {
1532ecea
JB		 4914 /* disable VLAN receive filtering */
4915 rctl = er32(RCTL);
4916 rctl &= ~E1000_RCTL_VFE;
4917 ew32(RCTL, rctl);
5622e404 4918 }
fd38d7a0 4919
5622e404
JP		 4920 if (!test_bit(__E1000_DOWN, &adapter->flags))
4921 e1000_irq_enable(adapter);
4922}
4923
c8f44aff 4924static void e1000_vlan_mode(struct net_device *netdev,
52f5509f 4925 netdev_features_t features)
5622e404
JP		 4926{
4927 struct e1000_adapter *adapter = netdev_priv(netdev);
5622e404
JP		 4928
4929 if (!test_bit(__E1000_DOWN, &adapter->flags))
4930 e1000_irq_disable(adapter);
4931
52f5509f 4932 __e1000_vlan_mode(adapter, features);
1da177e4 4933
9150b76a
JB		 4934 if (!test_bit(__E1000_DOWN, &adapter->flags))
4935 e1000_irq_enable(adapter);
1da177e4
LT		 4936}
4937
80d5c368
PM		 4938static int e1000_vlan_rx_add_vid(struct net_device *netdev,
4939 __be16 proto, u16 vid)
1da177e4 4940{
60490fe0 4941 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4942 struct e1000_hw *hw = &adapter->hw;
406874a7 4943 u32 vfta, index;
96838a40 4944
1dc32918 4945 if ((hw->mng_cookie.status &
96838a40
JB		 4946 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4947 (vid == adapter->mng_vlan_id))
8e586137 4948 return 0;
5622e404
JP		 4949
4950 if (!e1000_vlan_used(adapter))
4951 e1000_vlan_filter_on_off(adapter, true);
4952
1da177e4
LT		 4953 /* add VID to filter table */
4954 index = (vid >> 5) & 0x7F;
1dc32918 4955 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4956 vfta |= (1 << (vid & 0x1F));
1dc32918 4957 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4958
4959 set_bit(vid, adapter->active_vlans);
8e586137
JP		 4960
4961 return 0;
1da177e4
LT		 4962}
4963
80d5c368
PM		 4964static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
4965 __be16 proto, u16 vid)
1da177e4 4966{
60490fe0 4967 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4968 struct e1000_hw *hw = &adapter->hw;
406874a7 4969 u32 vfta, index;
1da177e4 4970
9150b76a
JB		 4971 if (!test_bit(__E1000_DOWN, &adapter->flags))
4972 e1000_irq_disable(adapter);
9150b76a
JB		 4973 if (!test_bit(__E1000_DOWN, &adapter->flags))
4974 e1000_irq_enable(adapter);
1da177e4
LT		 4975
4976 /* remove VID from filter table */
4977 index = (vid >> 5) & 0x7F;
1dc32918 4978 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4979 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4980 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4981
4982 clear_bit(vid, adapter->active_vlans);
4983
4984 if (!e1000_vlan_used(adapter))
4985 e1000_vlan_filter_on_off(adapter, false);
8e586137
JP		 4986
4987 return 0;
1da177e4
LT		 4988}
4989
64798845 4990static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4 4991{
5622e404 4992 u16 vid;
1da177e4 4993
5622e404
JP		 4994 if (!e1000_vlan_used(adapter))
4995 return;
4996
4997 e1000_vlan_filter_on_off(adapter, true);
4998 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
80d5c368 4999 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
1da177e4
LT		 5000}
5001
14ad2513 5002int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
1da177e4 5003{
1dc32918
JP		 5004 struct e1000_hw *hw = &adapter->hw;
5005
5006 hw->autoneg = 0;
1da177e4 5007
14ad2513 5008 /* Make sure dplx is at most 1 bit and lsb of speed is not set
6cfbd97b
JK		 5009 * for the switch() below to work
5010 */
14ad2513
DD		 5011 if ((spd & 1) || (dplx & ~1))
5012 goto err_inval;
5013
6921368f 5014 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 5015 if ((hw->media_type == e1000_media_type_fiber) &&
14ad2513
DD		 5016 spd != SPEED_1000 &&
5017 dplx != DUPLEX_FULL)
5018 goto err_inval;
6921368f 5019
14ad2513 5020 switch (spd + dplx) {
1da177e4 5021 case SPEED_10 + DUPLEX_HALF:
1dc32918 5022 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 5023 break;
5024 case SPEED_10 + DUPLEX_FULL:
1dc32918 5025 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 5026 break;
5027 case SPEED_100 + DUPLEX_HALF:
1dc32918 5028 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 5029 break;
5030 case SPEED_100 + DUPLEX_FULL:
1dc32918 5031 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 5032 break;
5033 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 5034 hw->autoneg = 1;
5035 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 5036 break;
5037 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5038 default:
14ad2513 5039 goto err_inval;
1da177e4 5040 }
c819bbd5
JB		 5041
5042 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
5043 hw->mdix = AUTO_ALL_MODES;
5044
1da177e4 5045 return 0;
14ad2513
DD		 5046
5047err_inval:
5048 e_err(probe, "Unsupported Speed/Duplex configuration\n");
5049 return -EINVAL;
1da177e4
LT		 5050}
5051
b43fcd7d 5052static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 5053{
5054 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5055 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5056 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 5057 u32 ctrl, ctrl_ext, rctl, status;
5058 u32 wufc = adapter->wol;
6fdfef16 5059#ifdef CONFIG_PM
240b1710 5060 int retval = 0;
6fdfef16 5061#endif
1da177e4
LT		 5062
5063 netif_device_detach(netdev);
5064
2db10a08 5065 if (netif_running(netdev)) {
6a7d64e3 5066 int count = E1000_CHECK_RESET_COUNT;
5067
5068 while (test_bit(__E1000_RESETTING, &adapter->flags) && count--)
5069 usleep_range(10000, 20000);
5070
2db10a08 5071 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 5072 e1000_down(adapter);
2db10a08 5073 }
1da177e4 5074
2f82665f 5075#ifdef CONFIG_PM
1d33e9c6 5076 retval = pci_save_state(pdev);
3a3847e0 5077 if (retval)
2f82665f
JB		 5078 return retval;
5079#endif
5080
1dc32918 5081 status = er32(STATUS);
96838a40 5082 if (status & E1000_STATUS_LU)
1da177e4
LT		 5083 wufc &= ~E1000_WUFC_LNKC;
5084
96838a40 5085 if (wufc) {
1da177e4 5086 e1000_setup_rctl(adapter);
db0ce50d 5087 e1000_set_rx_mode(netdev);
1da177e4 5088
b868179c
DN		 5089 rctl = er32(RCTL);
5090
1da177e4 5091 /* turn on all-multi mode if wake on multicast is enabled */
b868179c 5092 if (wufc & E1000_WUFC_MC)
1da177e4 5093 rctl |= E1000_RCTL_MPE;
b868179c
DN		 5094
5095 /* enable receives in the hardware */
5096 ew32(RCTL, rctl | E1000_RCTL_EN);
1da177e4 5097
1dc32918
JP		 5098 if (hw->mac_type >= e1000_82540) {
5099 ctrl = er32(CTRL);
1da177e4
LT		 5100 /* advertise wake from D3Cold */
5101 #define E1000_CTRL_ADVD3WUC 0x00100000
5102 /* phy power management enable */
5103 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5104 ctrl |= E1000_CTRL_ADVD3WUC |
5105 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 5106 ew32(CTRL, ctrl);
1da177e4
LT		 5107 }
5108
1dc32918 5109 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 5110 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 5111 /* keep the laser running in D3 */
1dc32918 5112 ctrl_ext = er32(CTRL_EXT);
1da177e4 5113 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 5114 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 5115 }
5116
1dc32918
JP		 5117 ew32(WUC, E1000_WUC_PME_EN);
5118 ew32(WUFC, wufc);
1da177e4 5119 } else {
1dc32918
JP		 5120 ew32(WUC, 0);
5121 ew32(WUFC, 0);
1da177e4
LT		 5122 }
5123
0fccd0e9
JG		 5124 e1000_release_manageability(adapter);
5125
b43fcd7d
RW		 5126 *enable_wake = !!wufc;
5127
0fccd0e9 5128 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 5129 if (adapter->en_mng_pt)
5130 *enable_wake = true;
1da177e4 5131
edd106fc
AK		 5132 if (netif_running(netdev))
5133 e1000_free_irq(adapter);
5134
1da177e4 5135 pci_disable_device(pdev);
240b1710 5136
1da177e4
LT		 5137 return 0;
5138}
5139
2f82665f 5140#ifdef CONFIG_PM
b43fcd7d
RW		 5141static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5142{
5143 int retval;
5144 bool wake;
5145
5146 retval = __e1000_shutdown(pdev, &wake);
5147 if (retval)
5148 return retval;
5149
5150 if (wake) {
5151 pci_prepare_to_sleep(pdev);
5152 } else {
5153 pci_wake_from_d3(pdev, false);
5154 pci_set_power_state(pdev, PCI_D3hot);
5155 }
5156
5157 return 0;
5158}
5159
64798845 5160static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 5161{
5162 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5163 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5164 struct e1000_hw *hw = &adapter->hw;
406874a7 5165 u32 err;
1da177e4 5166
d0e027db 5167 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 5168 pci_restore_state(pdev);
dbb5aaeb 5169 pci_save_state(pdev);
81250297
TI		 5170
5171 if (adapter->need_ioport)
5172 err = pci_enable_device(pdev);
5173 else
5174 err = pci_enable_device_mem(pdev);
c7be73bc 5175 if (err) {
675ad473 5176 pr_err("Cannot enable PCI device from suspend\n");
3d1dd8cb
AK		 5177 return err;
5178 }
a4cb847d 5179 pci_set_master(pdev);
1da177e4 5180
d0e027db
AK		 5181 pci_enable_wake(pdev, PCI_D3hot, 0);
5182 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 5183
c7be73bc
JP		 5184 if (netif_running(netdev)) {
5185 err = e1000_request_irq(adapter);
5186 if (err)
5187 return err;
5188 }
edd106fc
AK		 5189
5190 e1000_power_up_phy(adapter);
1da177e4 5191 e1000_reset(adapter);
1dc32918 5192 ew32(WUS, ~0);
1da177e4 5193
0fccd0e9
JG		 5194 e1000_init_manageability(adapter);
5195
96838a40 5196 if (netif_running(netdev))
1da177e4
LT		 5197 e1000_up(adapter);
5198
5199 netif_device_attach(netdev);
5200
1da177e4
LT		 5201 return 0;
5202}
5203#endif
c653e635
AK		 5204
5205static void e1000_shutdown(struct pci_dev *pdev)
5206{
b43fcd7d
RW		 5207 bool wake;
5208
5209 __e1000_shutdown(pdev, &wake);
5210
5211 if (system_state == SYSTEM_POWER_OFF) {
5212 pci_wake_from_d3(pdev, wake);
5213 pci_set_power_state(pdev, PCI_D3hot);
5214 }
c653e635
AK		 5215}
5216
1da177e4 5217#ifdef CONFIG_NET_POLL_CONTROLLER
6cfbd97b 5218/* Polling 'interrupt' - used by things like netconsole to send skbs
1da177e4
LT		 5219 * without having to re-enable interrupts. It's not called while
5220 * the interrupt routine is executing.
5221 */
64798845 5222static void e1000_netpoll(struct net_device *netdev)
1da177e4 5223{
60490fe0 5224 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 5225
1da177e4 5226 disable_irq(adapter->pdev->irq);
7d12e780 5227 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 5228 enable_irq(adapter->pdev->irq);
5229}
5230#endif
5231
9026729b
AK		 5232/**
5233 * e1000_io_error_detected - called when PCI error is detected
5234 * @pdev: Pointer to PCI device
120a5d0d 5235 * @state: The current pci connection state
9026729b
AK		 5236 *
5237 * This function is called after a PCI bus error affecting
5238 * this device has been detected.
5239 */
64798845
JP		 5240static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5241 pci_channel_state_t state)
9026729b
AK		 5242{
5243 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5244 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 5245
5246 netif_device_detach(netdev);
5247
eab63302
AD		 5248 if (state == pci_channel_io_perm_failure)
5249 return PCI_ERS_RESULT_DISCONNECT;
5250
9026729b
AK		 5251 if (netif_running(netdev))
5252 e1000_down(adapter);
72e8d6bb 5253 pci_disable_device(pdev);
9026729b
AK		 5254
5255 /* Request a slot slot reset. */
5256 return PCI_ERS_RESULT_NEED_RESET;
5257}
5258
5259/**
5260 * e1000_io_slot_reset - called after the pci bus has been reset.
5261 * @pdev: Pointer to PCI device
5262 *
5263 * Restart the card from scratch, as if from a cold-boot. Implementation
5264 * resembles the first-half of the e1000_resume routine.
5265 */
5266static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5267{
5268 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5269 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5270 struct e1000_hw *hw = &adapter->hw;
81250297 5271 int err;
9026729b 5272
81250297
TI		 5273 if (adapter->need_ioport)
5274 err = pci_enable_device(pdev);
5275 else
5276 err = pci_enable_device_mem(pdev);
5277 if (err) {
675ad473 5278 pr_err("Cannot re-enable PCI device after reset.\n");
9026729b
AK		 5279 return PCI_ERS_RESULT_DISCONNECT;
5280 }
5281 pci_set_master(pdev);
5282
dbf38c94
LV		 5283 pci_enable_wake(pdev, PCI_D3hot, 0);
5284 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 5285
9026729b 5286 e1000_reset(adapter);
1dc32918 5287 ew32(WUS, ~0);
9026729b
AK		 5288
5289 return PCI_ERS_RESULT_RECOVERED;
5290}
5291
5292/**
5293 * e1000_io_resume - called when traffic can start flowing again.
5294 * @pdev: Pointer to PCI device
5295 *
5296 * This callback is called when the error recovery driver tells us that
5297 * its OK to resume normal operation. Implementation resembles the
5298 * second-half of the e1000_resume routine.
5299 */
5300static void e1000_io_resume(struct pci_dev *pdev)
5301{
5302 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5303 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG		 5304
5305 e1000_init_manageability(adapter);
9026729b
AK		 5306
5307 if (netif_running(netdev)) {
5308 if (e1000_up(adapter)) {
675ad473 5309 pr_info("can't bring device back up after reset\n");
9026729b
AK		 5310 return;
5311 }
5312 }
5313
5314 netif_device_attach(netdev);
9026729b
AK		 5315}
5316
1da177e4 5317/* e1000_main.c */
Linux 6.x block layer and io_uring tree(s)