[linux-block.git] / drivers / net / ethernet / huawei / hinic / hinic_dev.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Huawei HiNIC PCI Express Linux driver
 * Copyright(c) 2017 Huawei Technologies Co., Ltd
 */

#ifndef HINIC_DEV_H
#define HINIC_DEV_H

#include <linux/netdevice.h>
#include <linux/types.h>
#include <linux/semaphore.h>
#include <linux/workqueue.h>
#include <linux/bitops.h>

#include "hinic_hw_dev.h"
#include "hinic_tx.h"
#include "hinic_rx.h"
#include "hinic_sriov.h"

#define HINIC_DRV_NAME          "hinic"

#define LP_PKT_CNT		64

#define HINIC_MAX_JUMBO_FRAME_SIZE      15872
#define HINIC_MAX_MTU_SIZE      (HINIC_MAX_JUMBO_FRAME_SIZE - ETH_HLEN - ETH_FCS_LEN)
#define HINIC_MIN_MTU_SIZE      256

enum hinic_flags {
	HINIC_LINK_UP = BIT(0),
	HINIC_INTF_UP = BIT(1),
	HINIC_RSS_ENABLE = BIT(2),
	HINIC_LINK_DOWN = BIT(3),
	HINIC_LP_TEST = BIT(4),
};

struct hinic_rx_mode_work {
	struct work_struct      work;
	u32                     rx_mode;
};

struct hinic_rss_type {
	u8 tcp_ipv6_ext;
	u8 ipv6_ext;
	u8 tcp_ipv6;
	u8 ipv6;
	u8 tcp_ipv4;
	u8 ipv4;
	u8 udp_ipv6;
	u8 udp_ipv4;
};

enum hinic_rss_hash_type {
	HINIC_RSS_HASH_ENGINE_TYPE_XOR,
	HINIC_RSS_HASH_ENGINE_TYPE_TOEP,
	HINIC_RSS_HASH_ENGINE_TYPE_MAX,
};

struct hinic_intr_coal_info {
	u8	pending_limt;
	u8	coalesce_timer_cfg;
	u8	resend_timer_cfg;
};

enum hinic_dbg_type {
	HINIC_DBG_SQ_INFO,
	HINIC_DBG_RQ_INFO,
	HINIC_DBG_FUNC_TABLE,
};

struct hinic_debug_priv {
	struct hinic_dev	*dev;
	void			*object;
	enum hinic_dbg_type	type;
	struct dentry		*root;
	int			field_id[64];
};

struct hinic_dev {
	struct net_device               *netdev;
	struct hinic_hwdev              *hwdev;

	u32                             msg_enable;
	unsigned int                    tx_weight;
	unsigned int                    rx_weight;
	u16				num_qps;
	u16				max_qps;

	unsigned int                    flags;

	struct semaphore                mgmt_lock;
	unsigned long                   *vlan_bitmap;

	struct hinic_rx_mode_work       rx_mode_work;
	struct workqueue_struct         *workq;

	struct hinic_txq                *txqs;
	struct hinic_rxq                *rxqs;
	u16				sq_depth;
	u16				rq_depth;

	u8				rss_tmpl_idx;
	u8				rss_hash_engine;
	u16				num_rss;
	u16				rss_limit;
	struct hinic_rss_type		rss_type;
	u8				*rss_hkey_user;
	s32				*rss_indir_user;
	struct hinic_intr_coal_info	*rx_intr_coalesce;
	struct hinic_intr_coal_info	*tx_intr_coalesce;
	struct hinic_sriov_info sriov_info;
	int				lb_test_rx_idx;
	int				lb_pkt_len;
	u8				*lb_test_rx_buf;

	struct dentry			*dbgfs_root;
	struct dentry			*sq_dbgfs;
	struct dentry			*rq_dbgfs;
	struct dentry			*func_tbl_dbgfs;
	struct hinic_debug_priv		*dbg;
	struct devlink			*devlink;
	bool				cable_unplugged;
	bool				module_unrecognized;
};

struct hinic_devlink_priv {
	struct hinic_hwdev		*hwdev;
	struct devlink_health_reporter  *hw_fault_reporter;
	struct devlink_health_reporter  *fw_fault_reporter;
};

#endif
Commit	Line	Data
2025cf9e	1	/* SPDX-License-Identifier: GPL-2.0-only */
51ba902a AK	2	/*
	3	* Huawei HiNIC PCI Express Linux driver
	4	* Copyright(c) 2017 Huawei Technologies Co., Ltd
51ba902a AK	5	*/
	6
	7	#ifndef HINIC_DEV_H
	8	#define HINIC_DEV_H
	9
	10	#include <linux/netdevice.h>
	11	#include <linux/types.h>
25a3ba61	12	#include <linux/semaphore.h>
c4d06d2d AK	13	#include <linux/workqueue.h>
c4d06d2d AK	14	#include <linux/bitops.h>
51ba902a AK	15
51ba902a AK	16	#include "hinic_hw_dev.h"
c3e79baf AK	17	#include "hinic_tx.h"
c3e79baf AK	18	#include "hinic_rx.h"
7dd29ee1	19	#include "hinic_sriov.h"
51ba902a AK	20
	21	#define HINIC_DRV_NAME "hinic"
	22
4aa218a4 L	23	#define LP_PKT_CNT 64
4aa218a4 L	24
022f19cf	25	#define HINIC_MAX_JUMBO_FRAME_SIZE 15872
	26	#define HINIC_MAX_MTU_SIZE (HINIC_MAX_JUMBO_FRAME_SIZE - ETH_HLEN - ETH_FCS_LEN)
	27	#define HINIC_MIN_MTU_SIZE 256
	28
c4d06d2d AK	29	enum hinic_flags {
	30	HINIC_LINK_UP = BIT(0),
	31	HINIC_INTF_UP = BIT(1),
421e9526	32	HINIC_RSS_ENABLE = BIT(2),
7dd29ee1	33	HINIC_LINK_DOWN = BIT(3),
4aa218a4	34	HINIC_LP_TEST = BIT(4),
c4d06d2d AK	35	};
	36
	37	struct hinic_rx_mode_work {
	38	struct work_struct work;
	39	u32 rx_mode;
	40	};
	41
421e9526 XC	42	struct hinic_rss_type {
	43	u8 tcp_ipv6_ext;
	44	u8 ipv6_ext;
	45	u8 tcp_ipv6;
	46	u8 ipv6;
	47	u8 tcp_ipv4;
	48	u8 ipv4;
	49	u8 udp_ipv6;
	50	u8 udp_ipv4;
	51	};
	52
	53	enum hinic_rss_hash_type {
	54	HINIC_RSS_HASH_ENGINE_TYPE_XOR,
	55	HINIC_RSS_HASH_ENGINE_TYPE_TOEP,
	56	HINIC_RSS_HASH_ENGINE_TYPE_MAX,
	57	};
	58
a0337c0d L	59	struct hinic_intr_coal_info {
	60	u8 pending_limt;
	61	u8 coalesce_timer_cfg;
	62	u8 resend_timer_cfg;
	63	};
	64
253ac3a9 L	65	enum hinic_dbg_type {
253ac3a9 L	66	HINIC_DBG_SQ_INFO,
626f0603	67	HINIC_DBG_RQ_INFO,
5215e162	68	HINIC_DBG_FUNC_TABLE,
253ac3a9 L	69	};
	70
	71	struct hinic_debug_priv {
	72	struct hinic_dev *dev;
	73	void *object;
	74	enum hinic_dbg_type type;
	75	struct dentry *root;
	76	int field_id[64];
	77	};
	78
51ba902a AK	79	struct hinic_dev {
	80	struct net_device *netdev;
	81	struct hinic_hwdev *hwdev;
	82
	83	u32 msg_enable;
00e57a6d	84	unsigned int tx_weight;
e2585ea7	85	unsigned int rx_weight;
421e9526 XC	86	u16 num_qps;
421e9526 XC	87	u16 max_qps;
25a3ba61	88
c4d06d2d AK	89	unsigned int flags;
c4d06d2d AK	90
25a3ba61 AK	91	struct semaphore mgmt_lock;
25a3ba61 AK	92	unsigned long *vlan_bitmap;
c4d06d2d AK	93
	94	struct hinic_rx_mode_work rx_mode_work;
	95	struct workqueue_struct *workq;
c3e79baf AK	96
	97	struct hinic_txq *txqs;
	98	struct hinic_rxq *rxqs;
bcab6782 L	99	u16 sq_depth;
bcab6782 L	100	u16 rq_depth;
edd384f6	101
421e9526 XC	102	u8 rss_tmpl_idx;
	103	u8 rss_hash_engine;
	104	u16 num_rss;
	105	u16 rss_limit;
	106	struct hinic_rss_type rss_type;
4fdc51bb XC	107	u8 *rss_hkey_user;
4fdc51bb XC	108	s32 *rss_indir_user;
a0337c0d L	109	struct hinic_intr_coal_info *rx_intr_coalesce;
a0337c0d L	110	struct hinic_intr_coal_info *tx_intr_coalesce;
7dd29ee1	111	struct hinic_sriov_info sriov_info;
4aa218a4 L	112	int lb_test_rx_idx;
	113	int lb_pkt_len;
	114	u8 *lb_test_rx_buf;
253ac3a9 L	115
	116	struct dentry *dbgfs_root;
	117	struct dentry *sq_dbgfs;
626f0603	118	struct dentry *rq_dbgfs;
5215e162 L	119	struct dentry *func_tbl_dbgfs;
5215e162 L	120	struct hinic_debug_priv *dbg;
5e126e7c	121	struct devlink *devlink;
c15850c7 L	122	bool cable_unplugged;
c15850c7 L	123	bool module_unrecognized;
5e126e7c L	124	};
	125
	126	struct hinic_devlink_priv {
	127	struct hinic_hwdev *hwdev;
c15850c7 L	128	struct devlink_health_reporter *hw_fault_reporter;
c15850c7 L	129	struct devlink_health_reporter *fw_fault_reporter;
51ba902a AK	130	};
	131
	132	#endif