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Replace <asm/uaccess.h> with <linux/uaccess.h> globally
[linux-block.git] / drivers / net / ethernet / freescale / gianfar_ethtool.c
CommitLineData
1da177e4 1/*
3396c782 2 * drivers/net/ethernet/freescale/gianfar_ethtool.c
1da177e4
LT		 3 *
4 * Gianfar Ethernet Driver
5 * Ethtool support for Gianfar Enet
6 * Based on e1000 ethtool support
7 *
8 * Author: Andy Fleming
4c8d3d99 9 * Maintainer: Kumar Gala
a12f801d 10 * Modifier: Sandeep Gopalpet <sandeep.kumar@freescale.com>
1da177e4 11 *
6c43e046 12 * Copyright 2003-2006, 2008-2009, 2011 Freescale Semiconductor, Inc.
1da177e4 13 *
6aa20a22
JG		 14 * This software may be used and distributed according to
15 * the terms of the GNU Public License, Version 2, incorporated herein
1da177e4
LT		 16 * by reference.
17 */
18
59deab26
JP		 19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
1da177e4 21#include <linux/kernel.h>
1da177e4
LT		 22#include <linux/string.h>
23#include <linux/errno.h>
1da177e4 24#include <linux/interrupt.h>
1da177e4
LT		 25#include <linux/delay.h>
26#include <linux/netdevice.h>
27#include <linux/etherdevice.h>
65a85a8d 28#include <linux/net_tstamp.h>
1da177e4
LT		 29#include <linux/skbuff.h>
30#include <linux/spinlock.h>
31#include <linux/mm.h>
32
33#include <asm/io.h>
34#include <asm/irq.h>
7c0f6ba6 35#include <linux/uaccess.h>
1da177e4 36#include <linux/module.h>
1da177e4
LT		 37#include <linux/crc32.h>
38#include <asm/types.h>
1da177e4 39#include <linux/ethtool.h>
bb40dcbb
AF		 40#include <linux/mii.h>
41#include <linux/phy.h>
4aa3a715 42#include <linux/sort.h>
380b153c 43#include <linux/if_vlan.h>
1da177e4
LT		 44
45#include "gianfar.h"
46
bb40dcbb
AF		 47#define GFAR_MAX_COAL_USECS 0xffff
48#define GFAR_MAX_COAL_FRAMES 0xff
0bbaf069 49static void gfar_fill_stats(struct net_device *dev, struct ethtool_stats *dummy,
cbfc6071 50 u64 *buf);
0bbaf069 51static void gfar_gstrings(struct net_device *dev, u32 stringset, u8 * buf);
cbfc6071
JC		 52static int gfar_gcoalesce(struct net_device *dev,
53 struct ethtool_coalesce *cvals);
54static int gfar_scoalesce(struct net_device *dev,
55 struct ethtool_coalesce *cvals);
56static void gfar_gringparam(struct net_device *dev,
57 struct ethtool_ringparam *rvals);
58static int gfar_sringparam(struct net_device *dev,
59 struct ethtool_ringparam *rvals);
60static void gfar_gdrvinfo(struct net_device *dev,
61 struct ethtool_drvinfo *drvinfo);
1da177e4 62
30f7e310 63static const char stat_gstrings[][ETH_GSTRING_LEN] = {
76f31e8b
CM		 64 /* extra stats */
65 "rx-allocation-errors",
1da177e4
LT		 66 "rx-large-frame-errors",
67 "rx-short-frame-errors",
68 "rx-non-octet-errors",
69 "rx-crc-errors",
70 "rx-overrun-errors",
71 "rx-busy-errors",
72 "rx-babbling-errors",
73 "rx-truncated-frames",
74 "ethernet-bus-error",
75 "tx-babbling-errors",
76 "tx-underrun-errors",
1da177e4 77 "tx-timeout-errors",
76f31e8b 78 /* rmon stats */
1da177e4
LT		 79 "tx-rx-64-frames",
80 "tx-rx-65-127-frames",
81 "tx-rx-128-255-frames",
82 "tx-rx-256-511-frames",
83 "tx-rx-512-1023-frames",
84 "tx-rx-1024-1518-frames",
85 "tx-rx-1519-1522-good-vlan",
86 "rx-bytes",
87 "rx-packets",
88 "rx-fcs-errors",
89 "receive-multicast-packet",
90 "receive-broadcast-packet",
91 "rx-control-frame-packets",
92 "rx-pause-frame-packets",
93 "rx-unknown-op-code",
94 "rx-alignment-error",
95 "rx-frame-length-error",
96 "rx-code-error",
97 "rx-carrier-sense-error",
98 "rx-undersize-packets",
99 "rx-oversize-packets",
100 "rx-fragmented-frames",
101 "rx-jabber-frames",
102 "rx-dropped-frames",
103 "tx-byte-counter",
104 "tx-packets",
105 "tx-multicast-packets",
106 "tx-broadcast-packets",
107 "tx-pause-control-frames",
108 "tx-deferral-packets",
109 "tx-excessive-deferral-packets",
110 "tx-single-collision-packets",
111 "tx-multiple-collision-packets",
112 "tx-late-collision-packets",
113 "tx-excessive-collision-packets",
114 "tx-total-collision",
115 "reserved",
116 "tx-dropped-frames",
117 "tx-jabber-frames",
118 "tx-fcs-errors",
119 "tx-control-frames",
120 "tx-oversize-frames",
121 "tx-undersize-frames",
122 "tx-fragmented-frames",
123};
124
0bbaf069
KG		 125/* Fill in a buffer with the strings which correspond to the
126 * stats */
127static void gfar_gstrings(struct net_device *dev, u32 stringset, u8 * buf)
128{
129 struct gfar_private *priv = netdev_priv(dev);
7f7f5316 130
b31a1d8b 131 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON)
0bbaf069
KG		 132 memcpy(buf, stat_gstrings, GFAR_STATS_LEN * ETH_GSTRING_LEN);
133 else
134 memcpy(buf, stat_gstrings,
cbfc6071 135 GFAR_EXTRA_STATS_LEN * ETH_GSTRING_LEN);
0bbaf069
KG		 136}
137
1da177e4
LT		 138/* Fill in an array of 64-bit statistics from various sources.
139 * This array will be appended to the end of the ethtool_stats
140 * structure, and returned to user space
141 */
cbfc6071
JC		 142static void gfar_fill_stats(struct net_device *dev, struct ethtool_stats *dummy,
143 u64 *buf)
1da177e4
LT		 144{
145 int i;
146 struct gfar_private *priv = netdev_priv(dev);
46ceb60c 147 struct gfar __iomem *regs = priv->gfargrp[0].regs;
212079df 148 atomic64_t *extra = (atomic64_t *)&priv->extra_stats;
1da177e4 149
68719786 150 for (i = 0; i < GFAR_EXTRA_STATS_LEN; i++)
212079df 151 buf[i] = atomic64_read(&extra[i]);
68719786 152
b31a1d8b 153 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
f4983704 154 u32 __iomem *rmon = (u32 __iomem *) &regs->rmon;
1da177e4 155
68719786
PG		 156 for (; i < GFAR_STATS_LEN; i++, rmon++)
157 buf[i] = (u64) gfar_read(rmon);
158 }
1da177e4
LT		 159}
160
b9f2c044 161static int gfar_sset_count(struct net_device *dev, int sset)
1da177e4 162{
1da177e4 163 struct gfar_private *priv = netdev_priv(dev);
1da177e4 164
b9f2c044
JG		 165 switch (sset) {
166 case ETH_SS_STATS:
b31a1d8b 167 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON)
b9f2c044
JG		 168 return GFAR_STATS_LEN;
169 else
170 return GFAR_EXTRA_STATS_LEN;
171 default:
172 return -EOPNOTSUPP;
173 }
1da177e4
LT		 174}
175
1da177e4 176/* Fills in the drvinfo structure with some basic info */
cbfc6071
JC		 177static void gfar_gdrvinfo(struct net_device *dev,
178 struct ethtool_drvinfo *drvinfo)
1da177e4 179{
7826d43f
JP		 180 strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
181 strlcpy(drvinfo->version, gfar_driver_version,
182 sizeof(drvinfo->version));
183 strlcpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
184 strlcpy(drvinfo->bus_info, "N/A", sizeof(drvinfo->bus_info));
1da177e4
LT		 185}
186
1da177e4 187/* Return the length of the register structure */
0bbaf069 188static int gfar_reglen(struct net_device *dev)
1da177e4
LT		 189{
190 return sizeof (struct gfar);
191}
192
193/* Return a dump of the GFAR register space */
cbfc6071
JC		 194static void gfar_get_regs(struct net_device *dev, struct ethtool_regs *regs,
195 void *regbuf)
1da177e4
LT		 196{
197 int i;
198 struct gfar_private *priv = netdev_priv(dev);
46ceb60c 199 u32 __iomem *theregs = (u32 __iomem *) priv->gfargrp[0].regs;
1da177e4
LT		 200 u32 *buf = (u32 *) regbuf;
201
202 for (i = 0; i < sizeof (struct gfar) / sizeof (u32); i++)
cc8c6e37 203 buf[i] = gfar_read(&theregs[i]);
1da177e4
LT		 204}
205
1da177e4
LT		 206/* Convert microseconds to ethernet clock ticks, which changes
207 * depending on what speed the controller is running at */
cbfc6071
JC		 208static unsigned int gfar_usecs2ticks(struct gfar_private *priv,
209 unsigned int usecs)
1da177e4 210{
4c4a6b0e
PR		 211 struct net_device *ndev = priv->ndev;
212 struct phy_device *phydev = ndev->phydev;
1da177e4
LT		 213 unsigned int count;
214
215 /* The timer is different, depending on the interface speed */
4c4a6b0e 216 switch (phydev->speed) {
bb40dcbb 217 case SPEED_1000:
1da177e4
LT		 218 count = GFAR_GBIT_TIME;
219 break;
bb40dcbb 220 case SPEED_100:
1da177e4
LT		 221 count = GFAR_100_TIME;
222 break;
bb40dcbb 223 case SPEED_10:
1da177e4
LT		 224 default:
225 count = GFAR_10_TIME;
226 break;
227 }
228
229 /* Make sure we return a number greater than 0
230 * if usecs > 0 */
807540ba 231 return (usecs * 1000 + count - 1) / count;
1da177e4
LT		 232}
233
234/* Convert ethernet clock ticks to microseconds */
cbfc6071
JC		 235static unsigned int gfar_ticks2usecs(struct gfar_private *priv,
236 unsigned int ticks)
1da177e4 237{
4c4a6b0e
PR		 238 struct net_device *ndev = priv->ndev;
239 struct phy_device *phydev = ndev->phydev;
1da177e4
LT		 240 unsigned int count;
241
242 /* The timer is different, depending on the interface speed */
4c4a6b0e 243 switch (phydev->speed) {
bb40dcbb 244 case SPEED_1000:
1da177e4
LT		 245 count = GFAR_GBIT_TIME;
246 break;
bb40dcbb 247 case SPEED_100:
1da177e4
LT		 248 count = GFAR_100_TIME;
249 break;
bb40dcbb 250 case SPEED_10:
1da177e4
LT		 251 default:
252 count = GFAR_10_TIME;
253 break;
254 }
255
256 /* Make sure we return a number greater than 0 */
257 /* if ticks is > 0 */
807540ba 258 return (ticks * count) / 1000;
1da177e4
LT		 259}
260
261/* Get the coalescing parameters, and put them in the cvals
262 * structure. */
cbfc6071
JC		 263static int gfar_gcoalesce(struct net_device *dev,
264 struct ethtool_coalesce *cvals)
1da177e4
LT		 265{
266 struct gfar_private *priv = netdev_priv(dev);
a12f801d
SG		 267 struct gfar_priv_rx_q *rx_queue = NULL;
268 struct gfar_priv_tx_q *tx_queue = NULL;
b46a8454
DH		 269 unsigned long rxtime;
270 unsigned long rxcount;
271 unsigned long txtime;
272 unsigned long txcount;
6aa20a22 273
b31a1d8b 274 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_COALESCE))
0bbaf069 275 return -EOPNOTSUPP;
1da177e4 276
4c4a6b0e 277 if (!dev->phydev)
bb40dcbb
AF		 278 return -ENODEV;
279
fba4ed03
SG		 280 rx_queue = priv->rx_queue[0];
281 tx_queue = priv->tx_queue[0];
a12f801d
SG		 282
283 rxtime = get_ictt_value(rx_queue->rxic);
284 rxcount = get_icft_value(rx_queue->rxic);
285 txtime = get_ictt_value(tx_queue->txic);
286 txcount = get_icft_value(tx_queue->txic);
b46a8454
DH		 287 cvals->rx_coalesce_usecs = gfar_ticks2usecs(priv, rxtime);
288 cvals->rx_max_coalesced_frames = rxcount;
1da177e4 289
b46a8454
DH		 290 cvals->tx_coalesce_usecs = gfar_ticks2usecs(priv, txtime);
291 cvals->tx_max_coalesced_frames = txcount;
1da177e4
LT		 292
293 cvals->use_adaptive_rx_coalesce = 0;
294 cvals->use_adaptive_tx_coalesce = 0;
295
296 cvals->pkt_rate_low = 0;
297 cvals->rx_coalesce_usecs_low = 0;
298 cvals->rx_max_coalesced_frames_low = 0;
299 cvals->tx_coalesce_usecs_low = 0;
300 cvals->tx_max_coalesced_frames_low = 0;
301
302 /* When the packet rate is below pkt_rate_high but above
303 * pkt_rate_low (both measured in packets per second) the
304 * normal {rx,tx}_* coalescing parameters are used.
305 */
306
307 /* When the packet rate is (measured in packets per second)
308 * is above pkt_rate_high, the {rx,tx}_*_high parameters are
309 * used.
310 */
311 cvals->pkt_rate_high = 0;
312 cvals->rx_coalesce_usecs_high = 0;
313 cvals->rx_max_coalesced_frames_high = 0;
314 cvals->tx_coalesce_usecs_high = 0;
315 cvals->tx_max_coalesced_frames_high = 0;
316
317 /* How often to do adaptive coalescing packet rate sampling,
318 * measured in seconds. Must not be zero.
319 */
320 cvals->rate_sample_interval = 0;
321
322 return 0;
323}
324
325/* Change the coalescing values.
326 * Both cvals->*_usecs and cvals->*_frames have to be > 0
327 * in order for coalescing to be active
328 */
cbfc6071
JC		 329static int gfar_scoalesce(struct net_device *dev,
330 struct ethtool_coalesce *cvals)
1da177e4
LT		 331{
332 struct gfar_private *priv = netdev_priv(dev);
f19015ba 333 int i, err = 0;
1da177e4 334
b31a1d8b 335 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_COALESCE))
0bbaf069
KG		 336 return -EOPNOTSUPP;
337
4c4a6b0e 338 if (!dev->phydev)
bb40dcbb
AF		 339 return -ENODEV;
340
341 /* Check the bounds of the values */
342 if (cvals->rx_coalesce_usecs > GFAR_MAX_COAL_USECS) {
375d6a1b
JP		 343 netdev_info(dev, "Coalescing is limited to %d microseconds\n",
344 GFAR_MAX_COAL_USECS);
bb40dcbb
AF		 345 return -EINVAL;
346 }
347
348 if (cvals->rx_max_coalesced_frames > GFAR_MAX_COAL_FRAMES) {
375d6a1b
JP		 349 netdev_info(dev, "Coalescing is limited to %d frames\n",
350 GFAR_MAX_COAL_FRAMES);
bb40dcbb
AF		 351 return -EINVAL;
352 }
353
f19015ba
CM		 354 /* Check the bounds of the values */
355 if (cvals->tx_coalesce_usecs > GFAR_MAX_COAL_USECS) {
356 netdev_info(dev, "Coalescing is limited to %d microseconds\n",
357 GFAR_MAX_COAL_USECS);
358 return -EINVAL;
359 }
360
361 if (cvals->tx_max_coalesced_frames > GFAR_MAX_COAL_FRAMES) {
362 netdev_info(dev, "Coalescing is limited to %d frames\n",
363 GFAR_MAX_COAL_FRAMES);
364 return -EINVAL;
365 }
366
367 while (test_and_set_bit_lock(GFAR_RESETTING, &priv->state))
368 cpu_relax();
369
370 /* Set up rx coalescing */
371 if ((cvals->rx_coalesce_usecs == 0) ||
372 (cvals->rx_max_coalesced_frames == 0)) {
373 for (i = 0; i < priv->num_rx_queues; i++)
374 priv->rx_queue[i]->rxcoalescing = 0;
375 } else {
376 for (i = 0; i < priv->num_rx_queues; i++)
377 priv->rx_queue[i]->rxcoalescing = 1;
378 }
379
46ceb60c
SG		 380 for (i = 0; i < priv->num_rx_queues; i++) {
381 priv->rx_queue[i]->rxic = mk_ic_value(
382 cvals->rx_max_coalesced_frames,
383 gfar_usecs2ticks(priv, cvals->rx_coalesce_usecs));
384 }
1da177e4
LT		 385
386 /* Set up tx coalescing */
387 if ((cvals->tx_coalesce_usecs == 0) ||
46ceb60c
SG		 388 (cvals->tx_max_coalesced_frames == 0)) {
389 for (i = 0; i < priv->num_tx_queues; i++)
390 priv->tx_queue[i]->txcoalescing = 0;
391 } else {
392 for (i = 0; i < priv->num_tx_queues; i++)
393 priv->tx_queue[i]->txcoalescing = 1;
394 }
1da177e4 395
46ceb60c
SG		 396 for (i = 0; i < priv->num_tx_queues; i++) {
397 priv->tx_queue[i]->txic = mk_ic_value(
398 cvals->tx_max_coalesced_frames,
399 gfar_usecs2ticks(priv, cvals->tx_coalesce_usecs));
400 }
1da177e4 401
f19015ba
CM		 402 if (dev->flags & IFF_UP) {
403 stop_gfar(dev);
404 err = startup_gfar(dev);
405 } else {
406 gfar_mac_reset(priv);
407 }
408
409 clear_bit_unlock(GFAR_RESETTING, &priv->state);
1da177e4 410
f19015ba 411 return err;
1da177e4
LT		 412}
413
414/* Fills in rvals with the current ring parameters. Currently,
415 * rx, rx_mini, and rx_jumbo rings are the same size, as mini and
416 * jumbo are ignored by the driver */
cbfc6071
JC		 417static void gfar_gringparam(struct net_device *dev,
418 struct ethtool_ringparam *rvals)
1da177e4
LT		 419{
420 struct gfar_private *priv = netdev_priv(dev);
a12f801d
SG		 421 struct gfar_priv_tx_q *tx_queue = NULL;
422 struct gfar_priv_rx_q *rx_queue = NULL;
423
fba4ed03
SG		 424 tx_queue = priv->tx_queue[0];
425 rx_queue = priv->rx_queue[0];
1da177e4
LT		 426
427 rvals->rx_max_pending = GFAR_RX_MAX_RING_SIZE;
428 rvals->rx_mini_max_pending = GFAR_RX_MAX_RING_SIZE;
429 rvals->rx_jumbo_max_pending = GFAR_RX_MAX_RING_SIZE;
430 rvals->tx_max_pending = GFAR_TX_MAX_RING_SIZE;
431
432 /* Values changeable by the user. The valid values are
433 * in the range 1 to the "*_max_pending" counterpart above.
434 */
a12f801d
SG		 435 rvals->rx_pending = rx_queue->rx_ring_size;
436 rvals->rx_mini_pending = rx_queue->rx_ring_size;
437 rvals->rx_jumbo_pending = rx_queue->rx_ring_size;
438 rvals->tx_pending = tx_queue->tx_ring_size;
1da177e4
LT		 439}
440
441/* Change the current ring parameters, stopping the controller if
7cca336a 442 * necessary so that we don't mess things up while we're in motion.
cbfc6071
JC		 443 */
444static int gfar_sringparam(struct net_device *dev,
445 struct ethtool_ringparam *rvals)
1da177e4 446{
1da177e4 447 struct gfar_private *priv = netdev_priv(dev);
7cca336a 448 int err = 0, i;
1da177e4
LT		 449
450 if (rvals->rx_pending > GFAR_RX_MAX_RING_SIZE)
451 return -EINVAL;
452
453 if (!is_power_of_2(rvals->rx_pending)) {
59deab26 454 netdev_err(dev, "Ring sizes must be a power of 2\n");
1da177e4
LT		 455 return -EINVAL;
456 }
457
458 if (rvals->tx_pending > GFAR_TX_MAX_RING_SIZE)
459 return -EINVAL;
460
461 if (!is_power_of_2(rvals->tx_pending)) {
59deab26 462 netdev_err(dev, "Ring sizes must be a power of 2\n");
1da177e4
LT		 463 return -EINVAL;
464 }
465
0851133b
CM		 466 while (test_and_set_bit_lock(GFAR_RESETTING, &priv->state))
467 cpu_relax();
468
7cca336a 469 if (dev->flags & IFF_UP)
0bbaf069 470 stop_gfar(dev);
1da177e4 471
7cca336a
CM		 472 /* Change the sizes */
473 for (i = 0; i < priv->num_rx_queues; i++)
fba4ed03 474 priv->rx_queue[i]->rx_ring_size = rvals->rx_pending;
7cca336a
CM		 475
476 for (i = 0; i < priv->num_tx_queues; i++)
fba4ed03 477 priv->tx_queue[i]->tx_ring_size = rvals->tx_pending;
1da177e4 478
0bbaf069 479 /* Rebuild the rings with the new size */
0851133b 480 if (dev->flags & IFF_UP)
0bbaf069 481 err = startup_gfar(dev);
0851133b
CM		 482
483 clear_bit_unlock(GFAR_RESETTING, &priv->state);
484
0bbaf069
KG		 485 return err;
486}
1da177e4 487
23402bdd
CM		 488static void gfar_gpauseparam(struct net_device *dev,
489 struct ethtool_pauseparam *epause)
490{
491 struct gfar_private *priv = netdev_priv(dev);
492
493 epause->autoneg = !!priv->pause_aneg_en;
494 epause->rx_pause = !!priv->rx_pause_en;
495 epause->tx_pause = !!priv->tx_pause_en;
496}
497
498static int gfar_spauseparam(struct net_device *dev,
499 struct ethtool_pauseparam *epause)
500{
501 struct gfar_private *priv = netdev_priv(dev);
4c4a6b0e 502 struct phy_device *phydev = dev->phydev;
23402bdd
CM		 503 struct gfar __iomem *regs = priv->gfargrp[0].regs;
504 u32 oldadv, newadv;
505
98a46d46
CM		 506 if (!phydev)
507 return -ENODEV;
508
23402bdd
CM		 509 if (!(phydev->supported & SUPPORTED_Pause) ||
510 (!(phydev->supported & SUPPORTED_Asym_Pause) &&
511 (epause->rx_pause != epause->tx_pause)))
512 return -EINVAL;
513
514 priv->rx_pause_en = priv->tx_pause_en = 0;
515 if (epause->rx_pause) {
516 priv->rx_pause_en = 1;
517
518 if (epause->tx_pause) {
519 priv->tx_pause_en = 1;
520 /* FLOW_CTRL_RX & TX */
521 newadv = ADVERTISED_Pause;
522 } else /* FLOW_CTLR_RX */
523 newadv = ADVERTISED_Pause | ADVERTISED_Asym_Pause;
524 } else if (epause->tx_pause) {
525 priv->tx_pause_en = 1;
526 /* FLOW_CTLR_TX */
527 newadv = ADVERTISED_Asym_Pause;
528 } else
529 newadv = 0;
530
531 if (epause->autoneg)
532 priv->pause_aneg_en = 1;
533 else
534 priv->pause_aneg_en = 0;
535
536 oldadv = phydev->advertising &
537 (ADVERTISED_Pause | ADVERTISED_Asym_Pause);
538 if (oldadv != newadv) {
539 phydev->advertising &=
540 ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
541 phydev->advertising |= newadv;
542 if (phydev->autoneg)
543 /* inform link partner of our
544 * new flow ctrl settings
545 */
546 return phy_start_aneg(phydev);
547
548 if (!epause->autoneg) {
549 u32 tempval;
550 tempval = gfar_read(&regs->maccfg1);
551 tempval &= ~(MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
45b679c9
MP		 552
553 priv->tx_actual_en = 0;
554 if (priv->tx_pause_en) {
555 priv->tx_actual_en = 1;
23402bdd 556 tempval |= MACCFG1_TX_FLOW;
45b679c9
MP		 557 }
558
23402bdd
CM		 559 if (priv->rx_pause_en)
560 tempval |= MACCFG1_RX_FLOW;
561 gfar_write(&regs->maccfg1, tempval);
562 }
563 }
564
565 return 0;
566}
567
c8f44aff 568int gfar_set_features(struct net_device *dev, netdev_features_t features)
0bbaf069 569{
c8f44aff 570 netdev_features_t changed = dev->features ^ features;
0851133b 571 struct gfar_private *priv = netdev_priv(dev);
7cca336a 572 int err = 0;
1da177e4 573
88302648
CM		 574 if (!(changed & (NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
575 NETIF_F_RXCSUM)))
8b3afe95 576 return 0;
a12f801d 577
0851133b
CM		 578 while (test_and_set_bit_lock(GFAR_RESETTING, &priv->state))
579 cpu_relax();
580
88302648
CM		 581 dev->features = features;
582
0bbaf069 583 if (dev->flags & IFF_UP) {
0bbaf069 584 /* Now we take down the rings to rebuild them */
1da177e4 585 stop_gfar(dev);
1da177e4 586 err = startup_gfar(dev);
0851133b
CM		 587 } else {
588 gfar_mac_reset(priv);
12dea57b 589 }
0851133b
CM		 590
591 clear_bit_unlock(GFAR_RESETTING, &priv->state);
592
1da177e4
LT		 593 return err;
594}
595
0bbaf069 596static uint32_t gfar_get_msglevel(struct net_device *dev)
6aa20a22 597{
0bbaf069 598 struct gfar_private *priv = netdev_priv(dev);
cbfc6071 599
0bbaf069 600 return priv->msg_enable;
6aa20a22
JG		 601}
602
0bbaf069 603static void gfar_set_msglevel(struct net_device *dev, uint32_t data)
6aa20a22 604{
0bbaf069 605 struct gfar_private *priv = netdev_priv(dev);
cbfc6071 606
0bbaf069
KG		 607 priv->msg_enable = data;
608}
609
d87eb127
SW		 610#ifdef CONFIG_PM
611static void gfar_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
612{
613 struct gfar_private *priv = netdev_priv(dev);
614
3e905b80
CM		 615 wol->supported = 0;
616 wol->wolopts = 0;
617
618 if (priv->wol_supported & GFAR_WOL_MAGIC)
619 wol->supported |= WAKE_MAGIC;
620
621 if (priv->wol_supported & GFAR_WOL_FILER_UCAST)
622 wol->supported |= WAKE_UCAST;
623
624 if (priv->wol_opts & GFAR_WOL_MAGIC)
625 wol->wolopts |= WAKE_MAGIC;
626
627 if (priv->wol_opts & GFAR_WOL_FILER_UCAST)
628 wol->wolopts |= WAKE_UCAST;
d87eb127
SW		 629}
630
631static int gfar_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
632{
633 struct gfar_private *priv = netdev_priv(dev);
3e905b80
CM		 634 u16 wol_opts = 0;
635 int err;
d87eb127 636
3e905b80 637 if (!priv->wol_supported && wol->wolopts)
d87eb127
SW		 638 return -EINVAL;
639
3e905b80 640 if (wol->wolopts & ~(WAKE_MAGIC | WAKE_UCAST))
d87eb127
SW		 641 return -EINVAL;
642
3e905b80
CM		 643 if (wol->wolopts & WAKE_MAGIC) {
644 wol_opts |= GFAR_WOL_MAGIC;
645 } else {
646 if (wol->wolopts & WAKE_UCAST)
647 wol_opts |= GFAR_WOL_FILER_UCAST;
648 }
649
650 wol_opts &= priv->wol_supported;
651 priv->wol_opts = 0;
652
653 err = device_set_wakeup_enable(priv->dev, wol_opts);
654 if (err)
655 return err;
6c4f1994 656
3e905b80 657 priv->wol_opts = wol_opts;
d87eb127
SW		 658
659 return 0;
660}
661#endif
0bbaf069 662
7a8b3372
SG		 663static void ethflow_to_filer_rules (struct gfar_private *priv, u64 ethflow)
664{
665 u32 fcr = 0x0, fpr = FPR_FILER_MASK;
666
667 if (ethflow & RXH_L2DA) {
5188f7e5 668 fcr = RQFCR_PID_DAH | RQFCR_CMP_NOMATCH |
cbfc6071 669 RQFCR_HASH | RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 670 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
671 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 672 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
673 priv->cur_filer_idx = priv->cur_filer_idx - 1;
674
5188f7e5 675 fcr = RQFCR_PID_DAL | RQFCR_CMP_NOMATCH |
cbfc6071 676 RQFCR_HASH | RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 677 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
678 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 679 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
680 priv->cur_filer_idx = priv->cur_filer_idx - 1;
681 }
682
683 if (ethflow & RXH_VLAN) {
684 fcr = RQFCR_PID_VID | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 685 RQFCR_AND | RQFCR_HASHTBL_0;
7a8b3372 686 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
6c43e046
WJB		 687 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
688 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 689 priv->cur_filer_idx = priv->cur_filer_idx - 1;
690 }
691
692 if (ethflow & RXH_IP_SRC) {
693 fcr = RQFCR_PID_SIA | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 694 RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 695 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
696 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 697 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
698 priv->cur_filer_idx = priv->cur_filer_idx - 1;
699 }
700
701 if (ethflow & (RXH_IP_DST)) {
702 fcr = RQFCR_PID_DIA | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 703 RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 704 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
705 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 706 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
707 priv->cur_filer_idx = priv->cur_filer_idx - 1;
708 }
709
710 if (ethflow & RXH_L3_PROTO) {
711 fcr = RQFCR_PID_L4P | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 712 RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 713 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
714 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 715 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
716 priv->cur_filer_idx = priv->cur_filer_idx - 1;
717 }
718
719 if (ethflow & RXH_L4_B_0_1) {
720 fcr = RQFCR_PID_SPT | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 721 RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 722 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
723 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 724 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
725 priv->cur_filer_idx = priv->cur_filer_idx - 1;
726 }
727
728 if (ethflow & RXH_L4_B_2_3) {
729 fcr = RQFCR_PID_DPT | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 730 RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 731 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
732 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 733 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
734 priv->cur_filer_idx = priv->cur_filer_idx - 1;
735 }
736}
737
cbfc6071
JC		 738static int gfar_ethflow_to_filer_table(struct gfar_private *priv, u64 ethflow,
739 u64 class)
7a8b3372
SG		 740{
741 unsigned int last_rule_idx = priv->cur_filer_idx;
742 unsigned int cmp_rqfpr;
588dc911
WS		 743 unsigned int *local_rqfpr;
744 unsigned int *local_rqfcr;
7a8b3372
SG		 745 int i = 0x0, k = 0x0;
746 int j = MAX_FILER_IDX, l = 0x0;
588dc911
WS		 747 int ret = 1;
748
b2adaca9
JP		 749 local_rqfpr = kmalloc_array(MAX_FILER_IDX + 1, sizeof(unsigned int),
750 GFP_KERNEL);
751 local_rqfcr = kmalloc_array(MAX_FILER_IDX + 1, sizeof(unsigned int),
752 GFP_KERNEL);
588dc911 753 if (!local_rqfpr || !local_rqfcr) {
588dc911
WS		 754 ret = 0;
755 goto err;
756 }
7a8b3372
SG		 757
758 switch (class) {
759 case TCP_V4_FLOW:
760 cmp_rqfpr = RQFPR_IPV4 |RQFPR_TCP;
761 break;
762 case UDP_V4_FLOW:
763 cmp_rqfpr = RQFPR_IPV4 |RQFPR_UDP;
764 break;
765 case TCP_V6_FLOW:
766 cmp_rqfpr = RQFPR_IPV6 |RQFPR_TCP;
767 break;
768 case UDP_V6_FLOW:
769 cmp_rqfpr = RQFPR_IPV6 |RQFPR_UDP;
770 break;
7a8b3372 771 default:
375d6a1b
JP		 772 netdev_err(priv->ndev,
773 "Right now this class is not supported\n");
588dc911
WS		 774 ret = 0;
775 goto err;
7a8b3372
SG		 776 }
777
778 for (i = 0; i < MAX_FILER_IDX + 1; i++) {
6c43e046
WJB		 779 local_rqfpr[j] = priv->ftp_rqfpr[i];
780 local_rqfcr[j] = priv->ftp_rqfcr[i];
7a8b3372 781 j--;
cbfc6071
JC		 782 if ((priv->ftp_rqfcr[i] ==
783 (RQFCR_PID_PARSE | RQFCR_CLE | RQFCR_AND)) &&
784 (priv->ftp_rqfpr[i] == cmp_rqfpr))
7a8b3372
SG		 785 break;
786 }
787
788 if (i == MAX_FILER_IDX + 1) {
375d6a1b
JP		 789 netdev_err(priv->ndev,
790 "No parse rule found, can't create hash rules\n");
588dc911
WS		 791 ret = 0;
792 goto err;
7a8b3372
SG		 793 }
794
795 /* If a match was found, then it begins the starting of a cluster rule
796 * if it was already programmed, we need to overwrite these rules
797 */
798 for (l = i+1; l < MAX_FILER_IDX; l++) {
6c43e046 799 if ((priv->ftp_rqfcr[l] & RQFCR_CLE) &&
cbfc6071 800 !(priv->ftp_rqfcr[l] & RQFCR_AND)) {
6c43e046 801 priv->ftp_rqfcr[l] = RQFCR_CLE | RQFCR_CMP_EXACT |
cbfc6071 802 RQFCR_HASHTBL_0 | RQFCR_PID_MASK;
6c43e046
WJB		 803 priv->ftp_rqfpr[l] = FPR_FILER_MASK;
804 gfar_write_filer(priv, l, priv->ftp_rqfcr[l],
cbfc6071 805 priv->ftp_rqfpr[l]);
7a8b3372
SG		 806 break;
807 }
808
6c43e046
WJB		 809 if (!(priv->ftp_rqfcr[l] & RQFCR_CLE) &&
810 (priv->ftp_rqfcr[l] & RQFCR_AND))
7a8b3372
SG		 811 continue;
812 else {
6c43e046
WJB		 813 local_rqfpr[j] = priv->ftp_rqfpr[l];
814 local_rqfcr[j] = priv->ftp_rqfcr[l];
7a8b3372
SG		 815 j--;
816 }
817 }
818
819 priv->cur_filer_idx = l - 1;
820 last_rule_idx = l;
821
822 /* hash rules */
823 ethflow_to_filer_rules(priv, ethflow);
824
825 /* Write back the popped out rules again */
826 for (k = j+1; k < MAX_FILER_IDX; k++) {
6c43e046
WJB		 827 priv->ftp_rqfpr[priv->cur_filer_idx] = local_rqfpr[k];
828 priv->ftp_rqfcr[priv->cur_filer_idx] = local_rqfcr[k];
7a8b3372 829 gfar_write_filer(priv, priv->cur_filer_idx,
cbfc6071 830 local_rqfcr[k], local_rqfpr[k]);
7a8b3372
SG		 831 if (!priv->cur_filer_idx)
832 break;
833 priv->cur_filer_idx = priv->cur_filer_idx - 1;
834 }
835
588dc911
WS		 836err:
837 kfree(local_rqfcr);
838 kfree(local_rqfpr);
839 return ret;
7a8b3372
SG		 840}
841
cbfc6071
JC		 842static int gfar_set_hash_opts(struct gfar_private *priv,
843 struct ethtool_rxnfc *cmd)
7a8b3372 844{
7a8b3372
SG		 845 /* write the filer rules here */
846 if (!gfar_ethflow_to_filer_table(priv, cmd->data, cmd->flow_type))
bde3528f 847 return -EINVAL;
7a8b3372
SG		 848
849 return 0;
850}
851
4aa3a715
SP		 852static int gfar_check_filer_hardware(struct gfar_private *priv)
853{
42851e88 854 struct gfar __iomem *regs = priv->gfargrp[0].regs;
4aa3a715
SP		 855 u32 i;
856
4aa3a715
SP		 857 /* Check if we are in FIFO mode */
858 i = gfar_read(&regs->ecntrl);
859 i &= ECNTRL_FIFM;
860 if (i == ECNTRL_FIFM) {
861 netdev_notice(priv->ndev, "Interface in FIFO mode\n");
862 i = gfar_read(&regs->rctrl);
863 i &= RCTRL_PRSDEP_MASK | RCTRL_PRSFM;
864 if (i == (RCTRL_PRSDEP_MASK | RCTRL_PRSFM)) {
865 netdev_info(priv->ndev,
cbfc6071 866 "Receive Queue Filtering enabled\n");
4aa3a715
SP		 867 } else {
868 netdev_warn(priv->ndev,
cbfc6071 869 "Receive Queue Filtering disabled\n");
4aa3a715
SP		 870 return -EOPNOTSUPP;
871 }
872 }
873 /* Or in standard mode */
874 else {
875 i = gfar_read(&regs->rctrl);
876 i &= RCTRL_PRSDEP_MASK;
877 if (i == RCTRL_PRSDEP_MASK) {
878 netdev_info(priv->ndev,
cbfc6071 879 "Receive Queue Filtering enabled\n");
4aa3a715
SP		 880 } else {
881 netdev_warn(priv->ndev,
cbfc6071 882 "Receive Queue Filtering disabled\n");
4aa3a715
SP		 883 return -EOPNOTSUPP;
884 }
885 }
886
887 /* Sets the properties for arbitrary filer rule
cbfc6071
JC		 888 * to the first 4 Layer 4 Bytes
889 */
42851e88 890 gfar_write(&regs->rbifx, 0xC0C1C2C3);
4aa3a715
SP		 891 return 0;
892}
893
4aa3a715
SP		 894/* Write a mask to filer cache */
895static void gfar_set_mask(u32 mask, struct filer_table *tab)
896{
897 tab->fe[tab->index].ctrl = RQFCR_AND | RQFCR_PID_MASK | RQFCR_CMP_EXACT;
898 tab->fe[tab->index].prop = mask;
899 tab->index++;
900}
901
902/* Sets parse bits (e.g. IP or TCP) */
903static void gfar_set_parse_bits(u32 value, u32 mask, struct filer_table *tab)
904{
905 gfar_set_mask(mask, tab);
cbfc6071
JC		 906 tab->fe[tab->index].ctrl = RQFCR_CMP_EXACT | RQFCR_PID_PARSE |
907 RQFCR_AND;
4aa3a715
SP		 908 tab->fe[tab->index].prop = value;
909 tab->index++;
910}
911
912static void gfar_set_general_attribute(u32 value, u32 mask, u32 flag,
cbfc6071 913 struct filer_table *tab)
4aa3a715
SP		 914{
915 gfar_set_mask(mask, tab);
916 tab->fe[tab->index].ctrl = RQFCR_CMP_EXACT | RQFCR_AND | flag;
917 tab->fe[tab->index].prop = value;
918 tab->index++;
919}
920
cbfc6071 921/* For setting a tuple of value and mask of type flag
4aa3a715
SP		 922 * Example:
923 * IP-Src = 10.0.0.0/255.0.0.0
924 * value: 0x0A000000 mask: FF000000 flag: RQFPR_IPV4
925 *
926 * Ethtool gives us a value=0 and mask=~0 for don't care a tuple
927 * For a don't care mask it gives us a 0
928 *
929 * The check if don't care and the mask adjustment if mask=0 is done for VLAN
930 * and MAC stuff on an upper level (due to missing information on this level).
931 * For these guys we can discard them if they are value=0 and mask=0.
932 *
933 * Further the all masks are one-padded for better hardware efficiency.
934 */
935static void gfar_set_attribute(u32 value, u32 mask, u32 flag,
cbfc6071 936 struct filer_table *tab)
4aa3a715
SP		 937{
938 switch (flag) {
380b153c 939 /* 3bit */
4aa3a715
SP		 940 case RQFCR_PID_PRI:
941 if (!(value | mask))
942 return;
943 mask |= RQFCR_PID_PRI_MASK;
944 break;
945 /* 8bit */
946 case RQFCR_PID_L4P:
947 case RQFCR_PID_TOS:
948 if (!~(mask | RQFCR_PID_L4P_MASK))
949 return;
950 if (!mask)
951 mask = ~0;
952 else
953 mask |= RQFCR_PID_L4P_MASK;
954 break;
955 /* 12bit */
956 case RQFCR_PID_VID:
957 if (!(value | mask))
958 return;
959 mask |= RQFCR_PID_VID_MASK;
960 break;
961 /* 16bit */
962 case RQFCR_PID_DPT:
963 case RQFCR_PID_SPT:
964 case RQFCR_PID_ETY:
965 if (!~(mask | RQFCR_PID_PORT_MASK))
966 return;
967 if (!mask)
968 mask = ~0;
969 else
970 mask |= RQFCR_PID_PORT_MASK;
971 break;
972 /* 24bit */
973 case RQFCR_PID_DAH:
974 case RQFCR_PID_DAL:
975 case RQFCR_PID_SAH:
976 case RQFCR_PID_SAL:
977 if (!(value | mask))
978 return;
979 mask |= RQFCR_PID_MAC_MASK;
980 break;
981 /* for all real 32bit masks */
982 default:
983 if (!~mask)
984 return;
985 if (!mask)
986 mask = ~0;
987 break;
988 }
989 gfar_set_general_attribute(value, mask, flag, tab);
990}
991
992/* Translates value and mask for UDP, TCP or SCTP */
993static void gfar_set_basic_ip(struct ethtool_tcpip4_spec *value,
cbfc6071
JC		 994 struct ethtool_tcpip4_spec *mask,
995 struct filer_table *tab)
4aa3a715 996{
42851e88
CM		 997 gfar_set_attribute(be32_to_cpu(value->ip4src),
998 be32_to_cpu(mask->ip4src),
999 RQFCR_PID_SIA, tab);
1000 gfar_set_attribute(be32_to_cpu(value->ip4dst),
1001 be32_to_cpu(mask->ip4dst),
1002 RQFCR_PID_DIA, tab);
1003 gfar_set_attribute(be16_to_cpu(value->pdst),
1004 be16_to_cpu(mask->pdst),
1005 RQFCR_PID_DPT, tab);
1006 gfar_set_attribute(be16_to_cpu(value->psrc),
1007 be16_to_cpu(mask->psrc),
1008 RQFCR_PID_SPT, tab);
4aa3a715
SP		 1009 gfar_set_attribute(value->tos, mask->tos, RQFCR_PID_TOS, tab);
1010}
1011
1012/* Translates value and mask for RAW-IP4 */
1013static void gfar_set_user_ip(struct ethtool_usrip4_spec *value,
cbfc6071
JC		 1014 struct ethtool_usrip4_spec *mask,
1015 struct filer_table *tab)
4aa3a715 1016{
42851e88
CM		 1017 gfar_set_attribute(be32_to_cpu(value->ip4src),
1018 be32_to_cpu(mask->ip4src),
1019 RQFCR_PID_SIA, tab);
1020 gfar_set_attribute(be32_to_cpu(value->ip4dst),
1021 be32_to_cpu(mask->ip4dst),
1022 RQFCR_PID_DIA, tab);
4aa3a715
SP		 1023 gfar_set_attribute(value->tos, mask->tos, RQFCR_PID_TOS, tab);
1024 gfar_set_attribute(value->proto, mask->proto, RQFCR_PID_L4P, tab);
42851e88
CM		 1025 gfar_set_attribute(be32_to_cpu(value->l4_4_bytes),
1026 be32_to_cpu(mask->l4_4_bytes),
1027 RQFCR_PID_ARB, tab);
4aa3a715
SP		 1028
1029}
1030
1031/* Translates value and mask for ETHER spec */
1032static void gfar_set_ether(struct ethhdr *value, struct ethhdr *mask,
cbfc6071 1033 struct filer_table *tab)
4aa3a715
SP		 1034{
1035 u32 upper_temp_mask = 0;
1036 u32 lower_temp_mask = 0;
cbfc6071 1037
4aa3a715
SP		 1038 /* Source address */
1039 if (!is_broadcast_ether_addr(mask->h_source)) {
4aa3a715
SP		 1040 if (is_zero_ether_addr(mask->h_source)) {
1041 upper_temp_mask = 0xFFFFFFFF;
1042 lower_temp_mask = 0xFFFFFFFF;
1043 } else {
cbfc6071
JC		 1044 upper_temp_mask = mask->h_source[0] << 16 |
1045 mask->h_source[1] << 8 |
1046 mask->h_source[2];
1047 lower_temp_mask = mask->h_source[3] << 16 |
1048 mask->h_source[4] << 8 |
1049 mask->h_source[5];
4aa3a715
SP		 1050 }
1051 /* Upper 24bit */
cbfc6071
JC		 1052 gfar_set_attribute(value->h_source[0] << 16 |
1053 value->h_source[1] << 8 |
1054 value->h_source[2],
1055 upper_temp_mask, RQFCR_PID_SAH, tab);
4aa3a715 1056 /* And the same for the lower part */
cbfc6071
JC		 1057 gfar_set_attribute(value->h_source[3] << 16 |
1058 value->h_source[4] << 8 |
1059 value->h_source[5],
1060 lower_temp_mask, RQFCR_PID_SAL, tab);
4aa3a715
SP		 1061 }
1062 /* Destination address */
1063 if (!is_broadcast_ether_addr(mask->h_dest)) {
4aa3a715 1064 /* Special for destination is limited broadcast */
cbfc6071
JC		 1065 if ((is_broadcast_ether_addr(value->h_dest) &&
1066 is_zero_ether_addr(mask->h_dest))) {
4aa3a715
SP		 1067 gfar_set_parse_bits(RQFPR_EBC, RQFPR_EBC, tab);
1068 } else {
4aa3a715
SP		 1069 if (is_zero_ether_addr(mask->h_dest)) {
1070 upper_temp_mask = 0xFFFFFFFF;
1071 lower_temp_mask = 0xFFFFFFFF;
1072 } else {
cbfc6071
JC		 1073 upper_temp_mask = mask->h_dest[0] << 16 |
1074 mask->h_dest[1] << 8 |
1075 mask->h_dest[2];
1076 lower_temp_mask = mask->h_dest[3] << 16 |
1077 mask->h_dest[4] << 8 |
1078 mask->h_dest[5];
4aa3a715
SP		 1079 }
1080
1081 /* Upper 24bit */
cbfc6071
JC		 1082 gfar_set_attribute(value->h_dest[0] << 16 |
1083 value->h_dest[1] << 8 |
1084 value->h_dest[2],
1085 upper_temp_mask, RQFCR_PID_DAH, tab);
4aa3a715 1086 /* And the same for the lower part */
cbfc6071
JC		 1087 gfar_set_attribute(value->h_dest[3] << 16 |
1088 value->h_dest[4] << 8 |
1089 value->h_dest[5],
1090 lower_temp_mask, RQFCR_PID_DAL, tab);
4aa3a715
SP		 1091 }
1092 }
1093
42851e88
CM		 1094 gfar_set_attribute(be16_to_cpu(value->h_proto),
1095 be16_to_cpu(mask->h_proto),
1096 RQFCR_PID_ETY, tab);
1097}
1098
1099static inline u32 vlan_tci_vid(struct ethtool_rx_flow_spec *rule)
1100{
1101 return be16_to_cpu(rule->h_ext.vlan_tci) & VLAN_VID_MASK;
1102}
1103
1104static inline u32 vlan_tci_vidm(struct ethtool_rx_flow_spec *rule)
1105{
1106 return be16_to_cpu(rule->m_ext.vlan_tci) & VLAN_VID_MASK;
1107}
1108
1109static inline u32 vlan_tci_cfi(struct ethtool_rx_flow_spec *rule)
1110{
1111 return be16_to_cpu(rule->h_ext.vlan_tci) & VLAN_CFI_MASK;
1112}
1113
1114static inline u32 vlan_tci_cfim(struct ethtool_rx_flow_spec *rule)
1115{
1116 return be16_to_cpu(rule->m_ext.vlan_tci) & VLAN_CFI_MASK;
1117}
1118
1119static inline u32 vlan_tci_prio(struct ethtool_rx_flow_spec *rule)
1120{
1121 return (be16_to_cpu(rule->h_ext.vlan_tci) & VLAN_PRIO_MASK) >>
1122 VLAN_PRIO_SHIFT;
1123}
1124
1125static inline u32 vlan_tci_priom(struct ethtool_rx_flow_spec *rule)
1126{
1127 return (be16_to_cpu(rule->m_ext.vlan_tci) & VLAN_PRIO_MASK) >>
1128 VLAN_PRIO_SHIFT;
4aa3a715
SP		 1129}
1130
1131/* Convert a rule to binary filter format of gianfar */
1132static int gfar_convert_to_filer(struct ethtool_rx_flow_spec *rule,
cbfc6071 1133 struct filer_table *tab)
4aa3a715
SP		 1134{
1135 u32 vlan = 0, vlan_mask = 0;
1136 u32 id = 0, id_mask = 0;
1137 u32 cfi = 0, cfi_mask = 0;
1138 u32 prio = 0, prio_mask = 0;
4aa3a715
SP		 1139 u32 old_index = tab->index;
1140
1141 /* Check if vlan is wanted */
42851e88
CM		 1142 if ((rule->flow_type & FLOW_EXT) &&
1143 (rule->m_ext.vlan_tci != cpu_to_be16(0xFFFF))) {
4aa3a715 1144 if (!rule->m_ext.vlan_tci)
42851e88 1145 rule->m_ext.vlan_tci = cpu_to_be16(0xFFFF);
4aa3a715
SP		 1146
1147 vlan = RQFPR_VLN;
1148 vlan_mask = RQFPR_VLN;
1149
1150 /* Separate the fields */
42851e88
CM		 1151 id = vlan_tci_vid(rule);
1152 id_mask = vlan_tci_vidm(rule);
1153 cfi = vlan_tci_cfi(rule);
1154 cfi_mask = vlan_tci_cfim(rule);
1155 prio = vlan_tci_prio(rule);
1156 prio_mask = vlan_tci_priom(rule);
380b153c
SP		 1157
1158 if (cfi == VLAN_TAG_PRESENT && cfi_mask == VLAN_TAG_PRESENT) {
4aa3a715
SP		 1159 vlan |= RQFPR_CFI;
1160 vlan_mask |= RQFPR_CFI;
cbfc6071
JC		 1161 } else if (cfi != VLAN_TAG_PRESENT &&
1162 cfi_mask == VLAN_TAG_PRESENT) {
4aa3a715
SP		 1163 vlan_mask |= RQFPR_CFI;
1164 }
1165 }
1166
1167 switch (rule->flow_type & ~FLOW_EXT) {
1168 case TCP_V4_FLOW:
1169 gfar_set_parse_bits(RQFPR_IPV4 | RQFPR_TCP | vlan,
cbfc6071 1170 RQFPR_IPV4 | RQFPR_TCP | vlan_mask, tab);
4aa3a715 1171 gfar_set_basic_ip(&rule->h_u.tcp_ip4_spec,
cbfc6071 1172 &rule->m_u.tcp_ip4_spec, tab);
4aa3a715
SP		 1173 break;
1174 case UDP_V4_FLOW:
1175 gfar_set_parse_bits(RQFPR_IPV4 | RQFPR_UDP | vlan,
cbfc6071 1176 RQFPR_IPV4 | RQFPR_UDP | vlan_mask, tab);
4aa3a715 1177 gfar_set_basic_ip(&rule->h_u.udp_ip4_spec,
cbfc6071 1178 &rule->m_u.udp_ip4_spec, tab);
4aa3a715
SP		 1179 break;
1180 case SCTP_V4_FLOW:
1181 gfar_set_parse_bits(RQFPR_IPV4 | vlan, RQFPR_IPV4 | vlan_mask,
cbfc6071 1182 tab);
4aa3a715 1183 gfar_set_attribute(132, 0, RQFCR_PID_L4P, tab);
cbfc6071
JC		 1184 gfar_set_basic_ip((struct ethtool_tcpip4_spec *)&rule->h_u,
1185 (struct ethtool_tcpip4_spec *)&rule->m_u,
1186 tab);
4aa3a715
SP		 1187 break;
1188 case IP_USER_FLOW:
1189 gfar_set_parse_bits(RQFPR_IPV4 | vlan, RQFPR_IPV4 | vlan_mask,
cbfc6071 1190 tab);
4aa3a715 1191 gfar_set_user_ip((struct ethtool_usrip4_spec *) &rule->h_u,
cbfc6071
JC		 1192 (struct ethtool_usrip4_spec *) &rule->m_u,
1193 tab);
4aa3a715
SP		 1194 break;
1195 case ETHER_FLOW:
1196 if (vlan)
1197 gfar_set_parse_bits(vlan, vlan_mask, tab);
1198 gfar_set_ether((struct ethhdr *) &rule->h_u,
cbfc6071 1199 (struct ethhdr *) &rule->m_u, tab);
4aa3a715
SP		 1200 break;
1201 default:
1202 return -1;
1203 }
1204
1205 /* Set the vlan attributes in the end */
1206 if (vlan) {
1207 gfar_set_attribute(id, id_mask, RQFCR_PID_VID, tab);
1208 gfar_set_attribute(prio, prio_mask, RQFCR_PID_PRI, tab);
1209 }
1210
1211 /* If there has been nothing written till now, it must be a default */
1212 if (tab->index == old_index) {
1213 gfar_set_mask(0xFFFFFFFF, tab);
1214 tab->fe[tab->index].ctrl = 0x20;
1215 tab->fe[tab->index].prop = 0x0;
1216 tab->index++;
1217 }
1218
1219 /* Remove last AND */
1220 tab->fe[tab->index - 1].ctrl &= (~RQFCR_AND);
1221
1222 /* Specify which queue to use or to drop */
1223 if (rule->ring_cookie == RX_CLS_FLOW_DISC)
1224 tab->fe[tab->index - 1].ctrl |= RQFCR_RJE;
1225 else
1226 tab->fe[tab->index - 1].ctrl |= (rule->ring_cookie << 10);
1227
1228 /* Only big enough entries can be clustered */
1229 if (tab->index > (old_index + 2)) {
1230 tab->fe[old_index + 1].ctrl |= RQFCR_CLE;
1231 tab->fe[tab->index - 1].ctrl |= RQFCR_CLE;
1232 }
1233
cbfc6071
JC		 1234 /* In rare cases the cache can be full while there is
1235 * free space in hw
1236 */
4aa3a715
SP		 1237 if (tab->index > MAX_FILER_CACHE_IDX - 1)
1238 return -EBUSY;
1239
1240 return 0;
1241}
1242
4aa3a715
SP		 1243/* Write the bit-pattern from software's buffer to hardware registers */
1244static int gfar_write_filer_table(struct gfar_private *priv,
cbfc6071 1245 struct filer_table *tab)
4aa3a715
SP		 1246{
1247 u32 i = 0;
1248 if (tab->index > MAX_FILER_IDX - 1)
1249 return -EBUSY;
1250
4aa3a715 1251 /* Fill regular entries */
a898fe04 1252 for (; i < MAX_FILER_IDX && (tab->fe[i].ctrl | tab->fe[i].prop); i++)
4aa3a715
SP		 1253 gfar_write_filer(priv, i, tab->fe[i].ctrl, tab->fe[i].prop);
1254 /* Fill the rest with fall-troughs */
a898fe04 1255 for (; i < MAX_FILER_IDX; i++)
4aa3a715
SP		 1256 gfar_write_filer(priv, i, 0x60, 0xFFFFFFFF);
1257 /* Last entry must be default accept
cbfc6071
JC		 1258 * because that's what people expect
1259 */
4aa3a715
SP		 1260 gfar_write_filer(priv, i, 0x20, 0x0);
1261
4aa3a715
SP		 1262 return 0;
1263}
1264
1265static int gfar_check_capability(struct ethtool_rx_flow_spec *flow,
cbfc6071 1266 struct gfar_private *priv)
4aa3a715
SP		 1267{
1268
1269 if (flow->flow_type & FLOW_EXT) {
1270 if (~flow->m_ext.data[0] || ~flow->m_ext.data[1])
1271 netdev_warn(priv->ndev,
cbfc6071 1272 "User-specific data not supported!\n");
4aa3a715
SP		 1273 if (~flow->m_ext.vlan_etype)
1274 netdev_warn(priv->ndev,
cbfc6071 1275 "VLAN-etype not supported!\n");
4aa3a715
SP		 1276 }
1277 if (flow->flow_type == IP_USER_FLOW)
1278 if (flow->h_u.usr_ip4_spec.ip_ver != ETH_RX_NFC_IP4)
1279 netdev_warn(priv->ndev,
cbfc6071 1280 "IP-Version differing from IPv4 not supported!\n");
4aa3a715
SP		 1281
1282 return 0;
1283}
1284
1285static int gfar_process_filer_changes(struct gfar_private *priv)
1286{
1287 struct ethtool_flow_spec_container *j;
1288 struct filer_table *tab;
4aa3a715
SP		 1289 s32 ret = 0;
1290
1291 /* So index is set to zero, too! */
1292 tab = kzalloc(sizeof(*tab), GFP_KERNEL);
1293 if (tab == NULL)
1294 return -ENOMEM;
1295
1296 /* Now convert the existing filer data from flow_spec into
cbfc6071
JC		 1297 * filer tables binary format
1298 */
4aa3a715
SP		 1299 list_for_each_entry(j, &priv->rx_list.list, list) {
1300 ret = gfar_convert_to_filer(&j->fs, tab);
1301 if (ret == -EBUSY) {
cbfc6071
JC		 1302 netdev_err(priv->ndev,
1303 "Rule not added: No free space!\n");
4aa3a715
SP		 1304 goto end;
1305 }
1306 if (ret == -1) {
cbfc6071
JC		 1307 netdev_err(priv->ndev,
1308 "Rule not added: Unsupported Flow-type!\n");
4aa3a715
SP		 1309 goto end;
1310 }
1311 }
1312
4aa3a715
SP		 1313 /* Write everything to hardware */
1314 ret = gfar_write_filer_table(priv, tab);
1315 if (ret == -EBUSY) {
1316 netdev_err(priv->ndev, "Rule not added: No free space!\n");
1317 goto end;
1318 }
1319
cbfc6071
JC		 1320end:
1321 kfree(tab);
4aa3a715
SP		 1322 return ret;
1323}
1324
1325static void gfar_invert_masks(struct ethtool_rx_flow_spec *flow)
1326{
1327 u32 i = 0;
1328
1329 for (i = 0; i < sizeof(flow->m_u); i++)
1330 flow->m_u.hdata[i] ^= 0xFF;
1331
42851e88
CM		 1332 flow->m_ext.vlan_etype ^= cpu_to_be16(0xFFFF);
1333 flow->m_ext.vlan_tci ^= cpu_to_be16(0xFFFF);
1334 flow->m_ext.data[0] ^= cpu_to_be32(~0);
1335 flow->m_ext.data[1] ^= cpu_to_be32(~0);
4aa3a715
SP		 1336}
1337
1338static int gfar_add_cls(struct gfar_private *priv,
cbfc6071 1339 struct ethtool_rx_flow_spec *flow)
4aa3a715
SP		 1340{
1341 struct ethtool_flow_spec_container *temp, *comp;
1342 int ret = 0;
1343
1344 temp = kmalloc(sizeof(*temp), GFP_KERNEL);
1345 if (temp == NULL)
1346 return -ENOMEM;
1347 memcpy(&temp->fs, flow, sizeof(temp->fs));
1348
1349 gfar_invert_masks(&temp->fs);
1350 ret = gfar_check_capability(&temp->fs, priv);
1351 if (ret)
1352 goto clean_mem;
1353 /* Link in the new element at the right @location */
1354 if (list_empty(&priv->rx_list.list)) {
1355 ret = gfar_check_filer_hardware(priv);
1356 if (ret != 0)
1357 goto clean_mem;
1358 list_add(&temp->list, &priv->rx_list.list);
1359 goto process;
1360 } else {
4aa3a715
SP		 1361 list_for_each_entry(comp, &priv->rx_list.list, list) {
1362 if (comp->fs.location > flow->location) {
1363 list_add_tail(&temp->list, &comp->list);
1364 goto process;
1365 }
1366 if (comp->fs.location == flow->location) {
1367 netdev_err(priv->ndev,
cbfc6071
JC		 1368 "Rule not added: ID %d not free!\n",
1369 flow->location);
4aa3a715
SP		 1370 ret = -EBUSY;
1371 goto clean_mem;
1372 }
1373 }
1374 list_add_tail(&temp->list, &priv->rx_list.list);
1375 }
1376
1377process:
b5c8c890 1378 priv->rx_list.count++;
4aa3a715
SP		 1379 ret = gfar_process_filer_changes(priv);
1380 if (ret)
1381 goto clean_list;
4aa3a715
SP		 1382 return ret;
1383
1384clean_list:
b5c8c890 1385 priv->rx_list.count--;
4aa3a715
SP		 1386 list_del(&temp->list);
1387clean_mem:
1388 kfree(temp);
1389 return ret;
1390}
1391
1392static int gfar_del_cls(struct gfar_private *priv, u32 loc)
1393{
1394 struct ethtool_flow_spec_container *comp;
1395 u32 ret = -EINVAL;
1396
1397 if (list_empty(&priv->rx_list.list))
1398 return ret;
1399
1400 list_for_each_entry(comp, &priv->rx_list.list, list) {
1401 if (comp->fs.location == loc) {
1402 list_del(&comp->list);
1403 kfree(comp);
1404 priv->rx_list.count--;
1405 gfar_process_filer_changes(priv);
1406 ret = 0;
1407 break;
1408 }
1409 }
1410
1411 return ret;
4aa3a715
SP		 1412}
1413
1414static int gfar_get_cls(struct gfar_private *priv, struct ethtool_rxnfc *cmd)
1415{
1416 struct ethtool_flow_spec_container *comp;
1417 u32 ret = -EINVAL;
1418
1419 list_for_each_entry(comp, &priv->rx_list.list, list) {
1420 if (comp->fs.location == cmd->fs.location) {
1421 memcpy(&cmd->fs, &comp->fs, sizeof(cmd->fs));
1422 gfar_invert_masks(&cmd->fs);
1423 ret = 0;
1424 break;
1425 }
1426 }
1427
1428 return ret;
1429}
1430
1431static int gfar_get_cls_all(struct gfar_private *priv,
cbfc6071 1432 struct ethtool_rxnfc *cmd, u32 *rule_locs)
4aa3a715
SP		 1433{
1434 struct ethtool_flow_spec_container *comp;
1435 u32 i = 0;
1436
1437 list_for_each_entry(comp, &priv->rx_list.list, list) {
710778ff
BH		 1438 if (i == cmd->rule_cnt)
1439 return -EMSGSIZE;
1440 rule_locs[i] = comp->fs.location;
1441 i++;
4aa3a715
SP		 1442 }
1443
1444 cmd->data = MAX_FILER_IDX;
473e64ee 1445 cmd->rule_cnt = i;
4aa3a715
SP		 1446
1447 return 0;
1448}
1449
7a8b3372
SG		 1450static int gfar_set_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1451{
1452 struct gfar_private *priv = netdev_priv(dev);
1453 int ret = 0;
1454
0851133b
CM		 1455 if (test_bit(GFAR_RESETTING, &priv->state))
1456 return -EBUSY;
1457
4aa3a715
SP		 1458 mutex_lock(&priv->rx_queue_access);
1459
1460 switch (cmd->cmd) {
7a8b3372
SG		 1461 case ETHTOOL_SRXFH:
1462 ret = gfar_set_hash_opts(priv, cmd);
1463 break;
4aa3a715 1464 case ETHTOOL_SRXCLSRLINS:
3a73e49c
BH		 1465 if ((cmd->fs.ring_cookie != RX_CLS_FLOW_DISC &&
1466 cmd->fs.ring_cookie >= priv->num_rx_queues) ||
1467 cmd->fs.location >= MAX_FILER_IDX) {
4aa3a715
SP		 1468 ret = -EINVAL;
1469 break;
1470 }
1471 ret = gfar_add_cls(priv, &cmd->fs);
1472 break;
1473 case ETHTOOL_SRXCLSRLDEL:
1474 ret = gfar_del_cls(priv, cmd->fs.location);
1475 break;
7a8b3372
SG		 1476 default:
1477 ret = -EINVAL;
1478 }
1479
4aa3a715
SP		 1480 mutex_unlock(&priv->rx_queue_access);
1481
1482 return ret;
1483}
1484
1485static int gfar_get_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
cbfc6071 1486 u32 *rule_locs)
4aa3a715
SP		 1487{
1488 struct gfar_private *priv = netdev_priv(dev);
1489 int ret = 0;
1490
1491 switch (cmd->cmd) {
1492 case ETHTOOL_GRXRINGS:
1493 cmd->data = priv->num_rx_queues;
1494 break;
1495 case ETHTOOL_GRXCLSRLCNT:
1496 cmd->rule_cnt = priv->rx_list.count;
1497 break;
1498 case ETHTOOL_GRXCLSRULE:
1499 ret = gfar_get_cls(priv, cmd);
1500 break;
1501 case ETHTOOL_GRXCLSRLALL:
815c7db5 1502 ret = gfar_get_cls_all(priv, cmd, rule_locs);
4aa3a715
SP		 1503 break;
1504 default:
1505 ret = -EINVAL;
1506 break;
1507 }
1508
7a8b3372
SG		 1509 return ret;
1510}
1511
66636287 1512int gfar_phc_index = -1;
28889b7e 1513EXPORT_SYMBOL(gfar_phc_index);
66636287
RC		 1514
1515static int gfar_get_ts_info(struct net_device *dev,
1516 struct ethtool_ts_info *info)
1517{
1518 struct gfar_private *priv = netdev_priv(dev);
1519
1520 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)) {
cbfc6071
JC		 1521 info->so_timestamping = SOF_TIMESTAMPING_RX_SOFTWARE |
1522 SOF_TIMESTAMPING_SOFTWARE;
66636287
RC		 1523 info->phc_index = -1;
1524 return 0;
1525 }
cbfc6071
JC		 1526 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
1527 SOF_TIMESTAMPING_RX_HARDWARE |
1528 SOF_TIMESTAMPING_RAW_HARDWARE;
66636287 1529 info->phc_index = gfar_phc_index;
cbfc6071
JC		 1530 info->tx_types = (1 << HWTSTAMP_TX_OFF) |
1531 (1 << HWTSTAMP_TX_ON);
1532 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
1533 (1 << HWTSTAMP_FILTER_ALL);
66636287
RC		 1534 return 0;
1535}
1536
7282d491 1537const struct ethtool_ops gfar_ethtool_ops = {
1da177e4
LT		 1538 .get_drvinfo = gfar_gdrvinfo,
1539 .get_regs_len = gfar_reglen,
1540 .get_regs = gfar_get_regs,
1541 .get_link = ethtool_op_get_link,
1542 .get_coalesce = gfar_gcoalesce,
1543 .set_coalesce = gfar_scoalesce,
1544 .get_ringparam = gfar_gringparam,
1545 .set_ringparam = gfar_sringparam,
23402bdd
CM		 1546 .get_pauseparam = gfar_gpauseparam,
1547 .set_pauseparam = gfar_spauseparam,
1da177e4 1548 .get_strings = gfar_gstrings,
b9f2c044 1549 .get_sset_count = gfar_sset_count,
1da177e4 1550 .get_ethtool_stats = gfar_fill_stats,
0bbaf069
KG		 1551 .get_msglevel = gfar_get_msglevel,
1552 .set_msglevel = gfar_set_msglevel,
d87eb127
SW		 1553#ifdef CONFIG_PM
1554 .get_wol = gfar_get_wol,
1555 .set_wol = gfar_set_wol,
1556#endif
7a8b3372 1557 .set_rxnfc = gfar_set_nfc,
4aa3a715 1558 .get_rxnfc = gfar_get_nfc,
66636287 1559 .get_ts_info = gfar_get_ts_info,
cd5f9bb4
PR		 1560 .get_link_ksettings = phy_ethtool_get_link_ksettings,
1561 .set_link_ksettings = phy_ethtool_set_link_ksettings,
1da177e4 1562};
Linux 6.x block layer and io_uring tree(s)