[linux-2.6-block.git] / drivers / net / ethernet / freescale / dpaa / dpaa_eth.h

/* Copyright 2008 - 2016 Freescale Semiconductor Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *	 notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *	 notice, this list of conditions and the following disclaimer in the
 *	 documentation and/or other materials provided with the distribution.
 *     * Neither the name of Freescale Semiconductor nor the
 *	 names of its contributors may be used to endorse or promote products
 *	 derived from this software without specific prior written permission.
 *
 * ALTERNATIVELY, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") as published by the Free Software
 * Foundation, either version 2 of that License or (at your option) any
 * later version.
 *
 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef __DPAA_H
#define __DPAA_H

#include <linux/netdevice.h>
#include <soc/fsl/qman.h>
#include <soc/fsl/bman.h>

#include "fman.h"
#include "mac.h"

#define DPAA_ETH_TXQ_NUM	NR_CPUS

#define DPAA_BPS_NUM 3 /* number of bpools per interface */

/* More detailed FQ types - used for fine-grained WQ assignments */
enum dpaa_fq_type {
	FQ_TYPE_RX_DEFAULT = 1, /* Rx Default FQs */
	FQ_TYPE_RX_ERROR,	/* Rx Error FQs */
	FQ_TYPE_TX,		/* "Real" Tx FQs */
	FQ_TYPE_TX_CONFIRM,	/* Tx default Conf FQ (actually an Rx FQ) */
	FQ_TYPE_TX_CONF_MQ,	/* Tx conf FQs (one for each Tx FQ) */
	FQ_TYPE_TX_ERROR,	/* Tx Error FQs (these are actually Rx FQs) */
};

struct dpaa_fq {
	struct qman_fq fq_base;
	struct list_head list;
	struct net_device *net_dev;
	bool init;
	u32 fqid;
	u32 flags;
	u16 channel;
	u8 wq;
	enum dpaa_fq_type fq_type;
};

struct dpaa_fq_cbs {
	struct qman_fq rx_defq;
	struct qman_fq tx_defq;
	struct qman_fq rx_errq;
	struct qman_fq tx_errq;
	struct qman_fq egress_ern;
};

struct dpaa_bp {
	/* device used in the DMA mapping operations */
	struct device *dev;
	/* current number of buffers in the buffer pool alloted to each CPU */
	int __percpu *percpu_count;
	/* all buffers allocated for this pool have this raw size */
	size_t raw_size;
	/* all buffers in this pool have this same usable size */
	size_t size;
	/* the buffer pools are initialized with config_count buffers for each
	 * CPU; at runtime the number of buffers per CPU is constantly brought
	 * back to this level
	 */
	u16 config_count;
	u8 bpid;
	struct bman_pool *pool;
	/* bpool can be seeded before use by this cb */
	int (*seed_cb)(struct dpaa_bp *);
	/* bpool can be emptied before freeing by this cb */
	void (*free_buf_cb)(const struct dpaa_bp *, struct bm_buffer *);
	atomic_t refs;
};

struct dpaa_napi_portal {
	struct napi_struct napi;
	struct qman_portal *p;
	bool down;
};

struct dpaa_percpu_priv {
	struct net_device *net_dev;
	struct dpaa_napi_portal np;
	struct rtnl_link_stats64 stats;
};

struct dpaa_buffer_layout {
	u16 priv_data_size;
};

struct dpaa_priv {
	struct dpaa_percpu_priv __percpu *percpu_priv;
	struct dpaa_bp *dpaa_bps[DPAA_BPS_NUM];
	/* Store here the needed Tx headroom for convenience and speed
	 * (even though it can be computed based on the fields of buf_layout)
	 */
	u16 tx_headroom;
	struct net_device *net_dev;
	struct mac_device *mac_dev;
	struct qman_fq *egress_fqs[DPAA_ETH_TXQ_NUM];
	struct qman_fq *conf_fqs[DPAA_ETH_TXQ_NUM];

	u16 channel;
	struct list_head dpaa_fq_list;

	u32 msg_enable;	/* net_device message level */

	struct {
		/* All egress queues to a given net device belong to one
		 * (and the same) congestion group.
		 */
		struct qman_cgr cgr;
	} cgr_data;
	/* Use a per-port CGR for ingress traffic. */
	bool use_ingress_cgr;
	struct qman_cgr ingress_cgr;

	struct dpaa_buffer_layout buf_layout[2];
	u16 rx_headroom;
};

/* from dpaa_ethtool.c */
extern const struct ethtool_ops dpaa_ethtool_ops;
#endif	/* __DPAA_H */
Commit	Line	Data
9ad1a374 MB	1	/* Copyright 2008 - 2016 Freescale Semiconductor Inc.
	2	*
	3	* Redistribution and use in source and binary forms, with or without
	4	* modification, are permitted provided that the following conditions are met:
	5	* * Redistributions of source code must retain the above copyright
	6	* notice, this list of conditions and the following disclaimer.
	7	* * Redistributions in binary form must reproduce the above copyright
	8	* notice, this list of conditions and the following disclaimer in the
	9	* documentation and/or other materials provided with the distribution.
	10	* * Neither the name of Freescale Semiconductor nor the
	11	* names of its contributors may be used to endorse or promote products
	12	* derived from this software without specific prior written permission.
	13	*
	14	* ALTERNATIVELY, this software may be distributed under the terms of the
	15	* GNU General Public License ("GPL") as published by the Free Software
	16	* Foundation, either version 2 of that License or (at your option) any
	17	* later version.
	18	*
	19	* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
	20	* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
	21	* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
	22	* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
	23	* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
	24	* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
	25	* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
	26	* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	27	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
	28	* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	29	*/
	30
	31	#ifndef __DPAA_H
	32	#define __DPAA_H
	33
	34	#include <linux/netdevice.h>
	35	#include <soc/fsl/qman.h>
	36	#include <soc/fsl/bman.h>
	37
	38	#include "fman.h"
	39	#include "mac.h"
	40
	41	#define DPAA_ETH_TXQ_NUM NR_CPUS
	42
	43	#define DPAA_BPS_NUM 3 /* number of bpools per interface */
	44
	45	/* More detailed FQ types - used for fine-grained WQ assignments */
	46	enum dpaa_fq_type {
	47	FQ_TYPE_RX_DEFAULT = 1, /* Rx Default FQs */
	48	FQ_TYPE_RX_ERROR, /* Rx Error FQs */
	49	FQ_TYPE_TX, /* "Real" Tx FQs */
	50	FQ_TYPE_TX_CONFIRM, /* Tx default Conf FQ (actually an Rx FQ) */
	51	FQ_TYPE_TX_CONF_MQ, /* Tx conf FQs (one for each Tx FQ) */
	52	FQ_TYPE_TX_ERROR, /* Tx Error FQs (these are actually Rx FQs) */
	53	};
	54
	55	struct dpaa_fq {
	56	struct qman_fq fq_base;
	57	struct list_head list;
	58	struct net_device *net_dev;
	59	bool init;
	60	u32 fqid;
	61	u32 flags;
	62	u16 channel;
	63	u8 wq;
	64	enum dpaa_fq_type fq_type;
65	};
66
67	struct dpaa_fq_cbs {
68	struct qman_fq rx_defq;
69	struct qman_fq tx_defq;
70	struct qman_fq rx_errq;
71	struct qman_fq tx_errq;
72	struct qman_fq egress_ern;
73	};
74
75	struct dpaa_bp {
76	/* device used in the DMA mapping operations */
77	struct device *dev;
78	/* current number of buffers in the buffer pool alloted to each CPU */
79	int __percpu *percpu_count;
80	/* all buffers allocated for this pool have this raw size */
81	size_t raw_size;
82	/* all buffers in this pool have this same usable size */
83	size_t size;
84	/* the buffer pools are initialized with config_count buffers for each
85	* CPU; at runtime the number of buffers per CPU is constantly brought
86	* back to this level
87	*/
88	u16 config_count;
89	u8 bpid;
90	struct bman_pool *pool;
91	/* bpool can be seeded before use by this cb */
92	int (seed_cb)(struct dpaa_bp );
93	/* bpool can be emptied before freeing by this cb */
94	void (free_buf_cb)(const struct dpaa_bp , struct bm_buffer *);
95	atomic_t refs;
96	};
97
98	struct dpaa_napi_portal {
99	struct napi_struct napi;
100	struct qman_portal *p;
101	bool down;
102	};
103
104	struct dpaa_percpu_priv {
105	struct net_device *net_dev;
106	struct dpaa_napi_portal np;
107	struct rtnl_link_stats64 stats;
108	};
109
110	struct dpaa_buffer_layout {
111	u16 priv_data_size;
112	};
113
114	struct dpaa_priv {
115	struct dpaa_percpu_priv __percpu *percpu_priv;
116	struct dpaa_bp *dpaa_bps[DPAA_BPS_NUM];
117	/* Store here the needed Tx headroom for convenience and speed
118	* (even though it can be computed based on the fields of buf_layout)
119	*/
120	u16 tx_headroom;
121	struct net_device *net_dev;
122	struct mac_device *mac_dev;
123	struct qman_fq *egress_fqs[DPAA_ETH_TXQ_NUM];
124	struct qman_fq *conf_fqs[DPAA_ETH_TXQ_NUM];
125
126	u16 channel;
127	struct list_head dpaa_fq_list;
128
129	u32 msg_enable; /* net_device message level */
130
131	struct {
132	/* All egress queues to a given net device belong to one
133	* (and the same) congestion group.
134	*/
135	struct qman_cgr cgr;
136	} cgr_data;
137	/* Use a per-port CGR for ingress traffic. */
138	bool use_ingress_cgr;
139	struct qman_cgr ingress_cgr;
140
141	struct dpaa_buffer_layout buf_layout[2];
142	u16 rx_headroom;
143	};
b0cdb168 MB	144
	145	/* from dpaa_ethtool.c */
	146	extern const struct ethtool_ops dpaa_ethtool_ops;
9ad1a374	147	#endif /* __DPAA_H */