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Merge git://www.linux-watchdog.org/linux-watchdog
[linux-2.6-block.git] / drivers / net / ethernet / cisco / enic / vnic_dev.c
CommitLineData
01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
SF		 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/kernel.h>
21#include <linux/errno.h>
22#include <linux/types.h>
23#include <linux/pci.h>
24#include <linux/delay.h>
25#include <linux/if_ether.h>
26
27#include "vnic_resource.h"
28#include "vnic_devcmd.h"
29#include "vnic_dev.h"
30#include "vnic_stats.h"
31
70feadf3
VK		 32enum vnic_proxy_type {
33 PROXY_NONE,
34 PROXY_BY_BDF,
889d13f5 35 PROXY_BY_INDEX,
70feadf3
VK		 36};
37
01f2e4ea
SF		 38struct vnic_res {
39 void __iomem *vaddr;
27e6c7d3 40 dma_addr_t bus_addr;
01f2e4ea
SF		 41 unsigned int count;
42};
43
ea7ea65a
VK		 44struct vnic_intr_coal_timer_info {
45 u32 mul;
46 u32 div;
47 u32 max_usec;
48};
49
01f2e4ea
SF		 50struct vnic_dev {
51 void *priv;
52 struct pci_dev *pdev;
53 struct vnic_res res[RES_TYPE_MAX];
54 enum vnic_dev_intr_mode intr_mode;
55 struct vnic_devcmd __iomem *devcmd;
56 struct vnic_devcmd_notify *notify;
57 struct vnic_devcmd_notify notify_copy;
58 dma_addr_t notify_pa;
27372bf5 59 u32 notify_sz;
01f2e4ea
SF		 60 dma_addr_t linkstatus_pa;
61 struct vnic_stats *stats;
62 dma_addr_t stats_pa;
63 struct vnic_devcmd_fw_info *fw_info;
64 dma_addr_t fw_info_pa;
70feadf3
VK		 65 enum vnic_proxy_type proxy;
66 u32 proxy_index;
67 u64 args[VNIC_DEVCMD_NARGS];
ea7ea65a 68 struct vnic_intr_coal_timer_info intr_coal_timer_info;
01f2e4ea
SF		 69};
70
71#define VNIC_MAX_RES_HDR_SIZE \
72 (sizeof(struct vnic_resource_header) + \
73 sizeof(struct vnic_resource) * RES_TYPE_MAX)
74#define VNIC_RES_STRIDE 128
75
76void *vnic_dev_priv(struct vnic_dev *vdev)
77{
78 return vdev->priv;
79}
80
81static int vnic_dev_discover_res(struct vnic_dev *vdev,
27e6c7d3 82 struct vnic_dev_bar *bar, unsigned int num_bars)
01f2e4ea
SF		 83{
84 struct vnic_resource_header __iomem *rh;
90cf0b53 85 struct mgmt_barmap_hdr __iomem *mrh;
01f2e4ea
SF		 86 struct vnic_resource __iomem *r;
87 u8 type;
88
27e6c7d3
SF		 89 if (num_bars == 0)
90 return -EINVAL;
91
01f2e4ea 92 if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
a7a79deb 93 pr_err("vNIC BAR0 res hdr length error\n");
01f2e4ea
SF		 94 return -EINVAL;
95 }
96
90cf0b53
RP		 97 rh = bar->vaddr;
98 mrh = bar->vaddr;
01f2e4ea 99 if (!rh) {
a7a79deb 100 pr_err("vNIC BAR0 res hdr not mem-mapped\n");
01f2e4ea
SF		 101 return -EINVAL;
102 }
103
90cf0b53
RP		 104 /* Check for mgmt vnic in addition to normal vnic */
105 if ((ioread32(&rh->magic) != VNIC_RES_MAGIC) ||
106 (ioread32(&rh->version) != VNIC_RES_VERSION)) {
107 if ((ioread32(&mrh->magic) != MGMTVNIC_MAGIC) ||
108 (ioread32(&mrh->version) != MGMTVNIC_VERSION)) {
109 pr_err("vNIC BAR0 res magic/version error "
110 "exp (%lx/%lx) or (%lx/%lx), curr (%x/%x)\n",
01f2e4ea 111 VNIC_RES_MAGIC, VNIC_RES_VERSION,
90cf0b53 112 MGMTVNIC_MAGIC, MGMTVNIC_VERSION,
01f2e4ea 113 ioread32(&rh->magic), ioread32(&rh->version));
90cf0b53
RP		 114 return -EINVAL;
115 }
01f2e4ea
SF		 116 }
117
90cf0b53
RP		 118 if (ioread32(&mrh->magic) == MGMTVNIC_MAGIC)
119 r = (struct vnic_resource __iomem *)(mrh + 1);
120 else
121 r = (struct vnic_resource __iomem *)(rh + 1);
122
01f2e4ea
SF		 123
124 while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
125
126 u8 bar_num = ioread8(&r->bar);
127 u32 bar_offset = ioread32(&r->bar_offset);
128 u32 count = ioread32(&r->count);
129 u32 len;
130
131 r++;
132
27e6c7d3
SF		 133 if (bar_num >= num_bars)
134 continue;
135
136 if (!bar[bar_num].len || !bar[bar_num].vaddr)
01f2e4ea
SF		 137 continue;
138
139 switch (type) {
140 case RES_TYPE_WQ:
141 case RES_TYPE_RQ:
142 case RES_TYPE_CQ:
143 case RES_TYPE_INTR_CTRL:
144 /* each count is stride bytes long */
145 len = count * VNIC_RES_STRIDE;
27e6c7d3 146 if (len + bar_offset > bar[bar_num].len) {
a7a79deb 147 pr_err("vNIC BAR0 resource %d "
01f2e4ea
SF		 148 "out-of-bounds, offset 0x%x + "
149 "size 0x%x > bar len 0x%lx\n",
150 type, bar_offset,
151 len,
27e6c7d3 152 bar[bar_num].len);
01f2e4ea
SF		 153 return -EINVAL;
154 }
155 break;
156 case RES_TYPE_INTR_PBA_LEGACY:
157 case RES_TYPE_DEVCMD:
158 len = count;
159 break;
160 default:
161 continue;
162 }
163
164 vdev->res[type].count = count;
27e6c7d3
SF		 165 vdev->res[type].vaddr = (char __iomem *)bar[bar_num].vaddr +
166 bar_offset;
167 vdev->res[type].bus_addr = bar[bar_num].bus_addr + bar_offset;
01f2e4ea
SF		 168 }
169
170 return 0;
171}
172
173unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
174 enum vnic_res_type type)
175{
176 return vdev->res[type].count;
177}
4a50ddfd 178EXPORT_SYMBOL(vnic_dev_get_res_count);
01f2e4ea
SF		 179
180void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
181 unsigned int index)
182{
183 if (!vdev->res[type].vaddr)
184 return NULL;
185
186 switch (type) {
187 case RES_TYPE_WQ:
188 case RES_TYPE_RQ:
189 case RES_TYPE_CQ:
190 case RES_TYPE_INTR_CTRL:
191 return (char __iomem *)vdev->res[type].vaddr +
192 index * VNIC_RES_STRIDE;
193 default:
194 return (char __iomem *)vdev->res[type].vaddr;
195 }
196}
4a50ddfd 197EXPORT_SYMBOL(vnic_dev_get_res);
01f2e4ea 198
2fdba388 199static unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
01f2e4ea
SF		 200 unsigned int desc_count, unsigned int desc_size)
201{
202 /* The base address of the desc rings must be 512 byte aligned.
203 * Descriptor count is aligned to groups of 32 descriptors. A
204 * count of 0 means the maximum 4096 descriptors. Descriptor
205 * size is aligned to 16 bytes.
206 */
207
208 unsigned int count_align = 32;
209 unsigned int desc_align = 16;
210
211 ring->base_align = 512;
212
213 if (desc_count == 0)
214 desc_count = 4096;
215
216 ring->desc_count = ALIGN(desc_count, count_align);
217
218 ring->desc_size = ALIGN(desc_size, desc_align);
219
220 ring->size = ring->desc_count * ring->desc_size;
221 ring->size_unaligned = ring->size + ring->base_align;
222
223 return ring->size_unaligned;
224}
225
226void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
227{
228 memset(ring->descs, 0, ring->size);
229}
230
231int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
232 unsigned int desc_count, unsigned int desc_size)
233{
234 vnic_dev_desc_ring_size(ring, desc_count, desc_size);
235
236 ring->descs_unaligned = pci_alloc_consistent(vdev->pdev,
237 ring->size_unaligned,
238 &ring->base_addr_unaligned);
239
240 if (!ring->descs_unaligned) {
a7a79deb 241 pr_err("Failed to allocate ring (size=%d), aborting\n",
01f2e4ea
SF		 242 (int)ring->size);
243 return -ENOMEM;
244 }
245
246 ring->base_addr = ALIGN(ring->base_addr_unaligned,
247 ring->base_align);
248 ring->descs = (u8 *)ring->descs_unaligned +
249 (ring->base_addr - ring->base_addr_unaligned);
250
251 vnic_dev_clear_desc_ring(ring);
252
253 ring->desc_avail = ring->desc_count - 1;
254
255 return 0;
256}
257
258void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
259{
260 if (ring->descs) {
261 pci_free_consistent(vdev->pdev,
262 ring->size_unaligned,
263 ring->descs_unaligned,
264 ring->base_addr_unaligned);
265 ring->descs = NULL;
266 }
267}
268
70feadf3
VK		 269static int _vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
270 int wait)
01f2e4ea
SF		 271{
272 struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
70feadf3 273 unsigned int i;
01f2e4ea
SF		 274 int delay;
275 u32 status;
01f2e4ea
SF		 276 int err;
277
278 status = ioread32(&devcmd->status);
506e1198
VK		 279 if (status == 0xFFFFFFFF) {
280 /* PCI-e target device is gone */
281 return -ENODEV;
282 }
01f2e4ea 283 if (status & STAT_BUSY) {
a7a79deb 284 pr_err("Busy devcmd %d\n", _CMD_N(cmd));
01f2e4ea
SF		 285 return -EBUSY;
286 }
287
288 if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
70feadf3
VK		 289 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
290 writeq(vdev->args[i], &devcmd->args[i]);
01f2e4ea
SF		 291 wmb();
292 }
293
294 iowrite32(cmd, &devcmd->cmd);
295
296 if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
27e6c7d3 297 return 0;
01f2e4ea
SF		 298
299 for (delay = 0; delay < wait; delay++) {
300
301 udelay(100);
302
303 status = ioread32(&devcmd->status);
506e1198
VK		 304 if (status == 0xFFFFFFFF) {
305 /* PCI-e target device is gone */
306 return -ENODEV;
307 }
70feadf3 308
01f2e4ea
SF		 309 if (!(status & STAT_BUSY)) {
310
311 if (status & STAT_ERROR) {
27372bf5 312 err = (int)readq(&devcmd->args[0]);
07783f39
SA		 313 if (err == ERR_EINVAL &&
314 cmd == CMD_CAPABILITY)
10cc8844 315 return -err;
27372bf5
SF		 316 if (err != ERR_ECMDUNKNOWN ||
317 cmd != CMD_CAPABILITY)
a7a79deb 318 pr_err("Error %d devcmd %d\n",
27372bf5 319 err, _CMD_N(cmd));
10cc8844 320 return -err;
01f2e4ea
SF		 321 }
322
323 if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
324 rmb();
70feadf3
VK		 325 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
326 vdev->args[i] = readq(&devcmd->args[i]);
01f2e4ea
SF		 327 }
328
329 return 0;
330 }
331 }
332
a7a79deb 333 pr_err("Timedout devcmd %d\n", _CMD_N(cmd));
01f2e4ea
SF		 334 return -ETIMEDOUT;
335}
336
889d13f5
RP		 337static int vnic_dev_cmd_proxy(struct vnic_dev *vdev,
338 enum vnic_devcmd_cmd proxy_cmd, enum vnic_devcmd_cmd cmd,
339 u64 *a0, u64 *a1, int wait)
70feadf3
VK		 340{
341 u32 status;
342 int err;
343
344 memset(vdev->args, 0, sizeof(vdev->args));
345
889d13f5 346 vdev->args[0] = vdev->proxy_index;
70feadf3
VK		 347 vdev->args[1] = cmd;
348 vdev->args[2] = *a0;
349 vdev->args[3] = *a1;
350
889d13f5 351 err = _vnic_dev_cmd(vdev, proxy_cmd, wait);
70feadf3
VK		 352 if (err)
353 return err;
354
355 status = (u32)vdev->args[0];
356 if (status & STAT_ERROR) {
357 err = (int)vdev->args[1];
358 if (err != ERR_ECMDUNKNOWN ||
359 cmd != CMD_CAPABILITY)
360 pr_err("Error %d proxy devcmd %d\n", err, _CMD_N(cmd));
361 return err;
362 }
363
364 *a0 = vdev->args[1];
365 *a1 = vdev->args[2];
366
367 return 0;
368}
369
370static int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,
371 enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
372{
373 int err;
374
375 vdev->args[0] = *a0;
376 vdev->args[1] = *a1;
377
378 err = _vnic_dev_cmd(vdev, cmd, wait);
379
380 *a0 = vdev->args[0];
381 *a1 = vdev->args[1];
382
383 return err;
384}
385
889d13f5
RP		 386void vnic_dev_cmd_proxy_by_index_start(struct vnic_dev *vdev, u16 index)
387{
388 vdev->proxy = PROXY_BY_INDEX;
389 vdev->proxy_index = index;
390}
391
392void vnic_dev_cmd_proxy_end(struct vnic_dev *vdev)
393{
394 vdev->proxy = PROXY_NONE;
395 vdev->proxy_index = 0;
396}
397
70feadf3
VK		 398int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
399 u64 *a0, u64 *a1, int wait)
400{
401 memset(vdev->args, 0, sizeof(vdev->args));
402
403 switch (vdev->proxy) {
889d13f5
RP		 404 case PROXY_BY_INDEX:
405 return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_INDEX, cmd,
406 a0, a1, wait);
70feadf3 407 case PROXY_BY_BDF:
889d13f5
RP		 408 return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_BDF, cmd,
409 a0, a1, wait);
70feadf3
VK		 410 case PROXY_NONE:
411 default:
412 return vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);
413 }
414}
415
5e4232ee 416static int vnic_dev_capable(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd)
27372bf5
SF		 417{
418 u64 a0 = (u32)cmd, a1 = 0;
419 int wait = 1000;
420 int err;
421
422 err = vnic_dev_cmd(vdev, CMD_CAPABILITY, &a0, &a1, wait);
423
424 return !(err || a0);
425}
426
01f2e4ea
SF		 427int vnic_dev_fw_info(struct vnic_dev *vdev,
428 struct vnic_devcmd_fw_info **fw_info)
429{
430 u64 a0, a1 = 0;
431 int wait = 1000;
432 int err = 0;
433
434 if (!vdev->fw_info) {
435 vdev->fw_info = pci_alloc_consistent(vdev->pdev,
436 sizeof(struct vnic_devcmd_fw_info),
437 &vdev->fw_info_pa);
438 if (!vdev->fw_info)
439 return -ENOMEM;
440
ea0f0d8b
VK		 441 memset(vdev->fw_info, 0, sizeof(struct vnic_devcmd_fw_info));
442
01f2e4ea 443 a0 = vdev->fw_info_pa;
ea0f0d8b 444 a1 = sizeof(struct vnic_devcmd_fw_info);
01f2e4ea
SF		 445
446 /* only get fw_info once and cache it */
f8a6dd59
NP		 447 if (vnic_dev_capable(vdev, CMD_MCPU_FW_INFO))
448 err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO,
449 &a0, &a1, wait);
450 else
ea0f0d8b
VK		 451 err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO_OLD,
452 &a0, &a1, wait);
01f2e4ea
SF		 453 }
454
455 *fw_info = vdev->fw_info;
456
457 return err;
458}
459
460int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
461 void *value)
462{
463 u64 a0, a1;
464 int wait = 1000;
465 int err;
466
467 a0 = offset;
468 a1 = size;
469
470 err = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
471
472 switch (size) {
473 case 1: *(u8 *)value = (u8)a0; break;
474 case 2: *(u16 *)value = (u16)a0; break;
475 case 4: *(u32 *)value = (u32)a0; break;
476 case 8: *(u64 *)value = a0; break;
477 default: BUG(); break;
478 }
479
480 return err;
481}
482
01f2e4ea
SF		 483int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
484{
485 u64 a0, a1;
486 int wait = 1000;
487
488 if (!vdev->stats) {
489 vdev->stats = pci_alloc_consistent(vdev->pdev,
490 sizeof(struct vnic_stats), &vdev->stats_pa);
491 if (!vdev->stats)
492 return -ENOMEM;
493 }
494
495 *stats = vdev->stats;
496 a0 = vdev->stats_pa;
497 a1 = sizeof(struct vnic_stats);
498
499 return vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
500}
501
502int vnic_dev_close(struct vnic_dev *vdev)
503{
504 u64 a0 = 0, a1 = 0;
505 int wait = 1000;
506 return vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
507}
508
2db77e0f 509int vnic_dev_enable_wait(struct vnic_dev *vdev)
01f2e4ea
SF		 510{
511 u64 a0 = 0, a1 = 0;
512 int wait = 1000;
2db77e0f 513
f8a6dd59
NP		 514 if (vnic_dev_capable(vdev, CMD_ENABLE_WAIT))
515 return vnic_dev_cmd(vdev, CMD_ENABLE_WAIT, &a0, &a1, wait);
516 else
2db77e0f 517 return vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
01f2e4ea
SF		 518}
519
520int vnic_dev_disable(struct vnic_dev *vdev)
521{
522 u64 a0 = 0, a1 = 0;
523 int wait = 1000;
524 return vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
525}
526
527int vnic_dev_open(struct vnic_dev *vdev, int arg)
528{
529 u64 a0 = (u32)arg, a1 = 0;
530 int wait = 1000;
531 return vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
532}
533
534int vnic_dev_open_done(struct vnic_dev *vdev, int *done)
535{
536 u64 a0 = 0, a1 = 0;
537 int wait = 1000;
538 int err;
539
540 *done = 0;
541
542 err = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
543 if (err)
544 return err;
545
546 *done = (a0 == 0);
547
548 return 0;
549}
550
2fdba388 551static int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)
01f2e4ea
SF		 552{
553 u64 a0 = (u32)arg, a1 = 0;
554 int wait = 1000;
555 return vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);
556}
557
2fdba388 558static int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)
01f2e4ea
SF		 559{
560 u64 a0 = 0, a1 = 0;
561 int wait = 1000;
562 int err;
563
564 *done = 0;
565
566 err = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);
567 if (err)
568 return err;
569
570 *done = (a0 == 0);
571
572 return 0;
573}
574
99ef5639
VK		 575int vnic_dev_hang_reset(struct vnic_dev *vdev, int arg)
576{
577 u64 a0 = (u32)arg, a1 = 0;
578 int wait = 1000;
579 int err;
580
f8a6dd59
NP		 581 if (vnic_dev_capable(vdev, CMD_HANG_RESET)) {
582 return vnic_dev_cmd(vdev, CMD_HANG_RESET,
583 &a0, &a1, wait);
584 } else {
99ef5639
VK		 585 err = vnic_dev_soft_reset(vdev, arg);
586 if (err)
587 return err;
99ef5639
VK		 588 return vnic_dev_init(vdev, 0);
589 }
99ef5639
VK		 590}
591
592int vnic_dev_hang_reset_done(struct vnic_dev *vdev, int *done)
593{
594 u64 a0 = 0, a1 = 0;
595 int wait = 1000;
596 int err;
597
598 *done = 0;
599
f8a6dd59
NP		 600 if (vnic_dev_capable(vdev, CMD_HANG_RESET_STATUS)) {
601 err = vnic_dev_cmd(vdev, CMD_HANG_RESET_STATUS,
602 &a0, &a1, wait);
603 if (err)
604 return err;
605 } else {
606 return vnic_dev_soft_reset_done(vdev, done);
99ef5639
VK		 607 }
608
609 *done = (a0 == 0);
610
611 return 0;
612}
613
01f2e4ea
SF		 614int vnic_dev_hang_notify(struct vnic_dev *vdev)
615{
616 u64 a0, a1;
617 int wait = 1000;
618 return vnic_dev_cmd(vdev, CMD_HANG_NOTIFY, &a0, &a1, wait);
619}
620
b13423ee 621int vnic_dev_get_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
01f2e4ea
SF		 622{
623 u64 a0, a1;
624 int wait = 1000;
625 int err, i;
626
627 for (i = 0; i < ETH_ALEN; i++)
628 mac_addr[i] = 0;
629
b13423ee 630 err = vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);
01f2e4ea
SF		 631 if (err)
632 return err;
633
634 for (i = 0; i < ETH_ALEN; i++)
635 mac_addr[i] = ((u8 *)&a0)[i];
636
637 return 0;
638}
639
383ab92f 640int vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
01f2e4ea
SF		 641 int broadcast, int promisc, int allmulti)
642{
643 u64 a0, a1 = 0;
644 int wait = 1000;
645 int err;
646
647 a0 = (directed ? CMD_PFILTER_DIRECTED : 0) |
648 (multicast ? CMD_PFILTER_MULTICAST : 0) |
649 (broadcast ? CMD_PFILTER_BROADCAST : 0) |
650 (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |
651 (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);
652
653 err = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);
654 if (err)
a7a79deb 655 pr_err("Can't set packet filter\n");
383ab92f
VK		 656
657 return err;
01f2e4ea
SF		 658}
659
f009618a 660int vnic_dev_add_addr(struct vnic_dev *vdev, const u8 *addr)
01f2e4ea
SF		 661{
662 u64 a0 = 0, a1 = 0;
663 int wait = 1000;
664 int err;
665 int i;
666
667 for (i = 0; i < ETH_ALEN; i++)
668 ((u8 *)&a0)[i] = addr[i];
669
670 err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
671 if (err)
a7a79deb 672 pr_err("Can't add addr [%pM], %d\n", addr, err);
f8bd9091
SF		 673
674 return err;
01f2e4ea
SF		 675}
676
f009618a 677int vnic_dev_del_addr(struct vnic_dev *vdev, const u8 *addr)
01f2e4ea
SF		 678{
679 u64 a0 = 0, a1 = 0;
680 int wait = 1000;
681 int err;
682 int i;
683
684 for (i = 0; i < ETH_ALEN; i++)
685 ((u8 *)&a0)[i] = addr[i];
686
687 err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a0, &a1, wait);
688 if (err)
a7a79deb 689 pr_err("Can't del addr [%pM], %d\n", addr, err);
f8bd9091
SF		 690
691 return err;
01f2e4ea
SF		 692}
693
f8cac14a
VK		 694int vnic_dev_set_ig_vlan_rewrite_mode(struct vnic_dev *vdev,
695 u8 ig_vlan_rewrite_mode)
696{
697 u64 a0 = ig_vlan_rewrite_mode, a1 = 0;
698 int wait = 1000;
f8cac14a 699
f8a6dd59
NP		 700 if (vnic_dev_capable(vdev, CMD_IG_VLAN_REWRITE_MODE))
701 return vnic_dev_cmd(vdev, CMD_IG_VLAN_REWRITE_MODE,
702 &a0, &a1, wait);
703 else
f8cac14a 704 return 0;
f8cac14a
VK		 705}
706
2fdba388 707static int vnic_dev_notify_setcmd(struct vnic_dev *vdev,
d883aa76 708 void *notify_addr, dma_addr_t notify_pa, u16 intr)
01f2e4ea
SF		 709{
710 u64 a0, a1;
711 int wait = 1000;
27372bf5 712 int r;
01f2e4ea 713
d883aa76
VK		 714 memset(notify_addr, 0, sizeof(struct vnic_devcmd_notify));
715 vdev->notify = notify_addr;
716 vdev->notify_pa = notify_pa;
01f2e4ea 717
d883aa76 718 a0 = (u64)notify_pa;
01f2e4ea
SF		 719 a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;
720 a1 += sizeof(struct vnic_devcmd_notify);
721
27372bf5
SF		 722 r = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
723 vdev->notify_sz = (r == 0) ? (u32)a1 : 0;
724 return r;
01f2e4ea
SF		 725}
726
d883aa76
VK		 727int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
728{
729 void *notify_addr;
730 dma_addr_t notify_pa;
731
732 if (vdev->notify || vdev->notify_pa) {
a7a79deb 733 pr_err("notify block %p still allocated", vdev->notify);
d883aa76
VK		 734 return -EINVAL;
735 }
736
737 notify_addr = pci_alloc_consistent(vdev->pdev,
738 sizeof(struct vnic_devcmd_notify),
739 &notify_pa);
740 if (!notify_addr)
741 return -ENOMEM;
742
743 return vnic_dev_notify_setcmd(vdev, notify_addr, notify_pa, intr);
744}
745
2fdba388 746static int vnic_dev_notify_unsetcmd(struct vnic_dev *vdev)
01f2e4ea
SF		 747{
748 u64 a0, a1;
749 int wait = 1000;
383ab92f 750 int err;
01f2e4ea
SF		 751
752 a0 = 0; /* paddr = 0 to unset notify buffer */
753 a1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */
754 a1 += sizeof(struct vnic_devcmd_notify);
755
383ab92f 756 err = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
d883aa76
VK		 757 vdev->notify = NULL;
758 vdev->notify_pa = 0;
27372bf5 759 vdev->notify_sz = 0;
383ab92f
VK		 760
761 return err;
01f2e4ea
SF		 762}
763
383ab92f 764int vnic_dev_notify_unset(struct vnic_dev *vdev)
d883aa76
VK		 765{
766 if (vdev->notify) {
767 pci_free_consistent(vdev->pdev,
768 sizeof(struct vnic_devcmd_notify),
769 vdev->notify,
770 vdev->notify_pa);
771 }
772
383ab92f 773 return vnic_dev_notify_unsetcmd(vdev);
d883aa76
VK		 774}
775
01f2e4ea
SF		 776static int vnic_dev_notify_ready(struct vnic_dev *vdev)
777{
778 u32 *words;
27372bf5 779 unsigned int nwords = vdev->notify_sz / 4;
01f2e4ea
SF		 780 unsigned int i;
781 u32 csum;
782
27372bf5 783 if (!vdev->notify || !vdev->notify_sz)
01f2e4ea
SF		 784 return 0;
785
786 do {
787 csum = 0;
27372bf5 788 memcpy(&vdev->notify_copy, vdev->notify, vdev->notify_sz);
01f2e4ea
SF		 789 words = (u32 *)&vdev->notify_copy;
790 for (i = 1; i < nwords; i++)
791 csum += words[i];
792 } while (csum != words[0]);
793
794 return 1;
795}
796
797int vnic_dev_init(struct vnic_dev *vdev, int arg)
798{
799 u64 a0 = (u32)arg, a1 = 0;
800 int wait = 1000;
4cdc44a2 801 int r = 0;
27372bf5 802
29046f9b 803 if (vnic_dev_capable(vdev, CMD_INIT))
27372bf5
SF		 804 r = vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
805 else {
806 vnic_dev_cmd(vdev, CMD_INIT_v1, &a0, &a1, wait);
807 if (a0 & CMD_INITF_DEFAULT_MAC) {
70feadf3
VK		 808 /* Emulate these for old CMD_INIT_v1 which
809 * didn't pass a0 so no CMD_INITF_*.
810 */
b13423ee 811 vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);
27372bf5
SF		 812 vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
813 }
4cdc44a2
SF		 814 }
815 return r;
01f2e4ea
SF		 816}
817
f8bd9091
SF		 818int vnic_dev_deinit(struct vnic_dev *vdev)
819{
820 u64 a0 = 0, a1 = 0;
821 int wait = 1000;
822
823 return vnic_dev_cmd(vdev, CMD_DEINIT, &a0, &a1, wait);
824}
825
ea7ea65a
VK		 826void vnic_dev_intr_coal_timer_info_default(struct vnic_dev *vdev)
827{
828 /* Default: hardware intr coal timer is in units of 1.5 usecs */
829 vdev->intr_coal_timer_info.mul = 2;
830 vdev->intr_coal_timer_info.div = 3;
831 vdev->intr_coal_timer_info.max_usec =
832 vnic_dev_intr_coal_timer_hw_to_usec(vdev, 0xffff);
833}
834
835int vnic_dev_intr_coal_timer_info(struct vnic_dev *vdev)
836{
837 int wait = 1000;
838 int err;
839
840 memset(vdev->args, 0, sizeof(vdev->args));
841
f8a6dd59
NP		 842 if (vnic_dev_capable(vdev, CMD_INTR_COAL_CONVERT))
843 err = _vnic_dev_cmd(vdev, CMD_INTR_COAL_CONVERT, wait);
844 else
845 err = ERR_ECMDUNKNOWN;
ea7ea65a
VK		 846
847 /* Use defaults when firmware doesn't support the devcmd at all or
848 * supports it for only specific hardware
849 */
850 if ((err == ERR_ECMDUNKNOWN) ||
851 (!err && !(vdev->args[0] && vdev->args[1] && vdev->args[2]))) {
852 pr_warning("Using default conversion factor for "
853 "interrupt coalesce timer\n");
854 vnic_dev_intr_coal_timer_info_default(vdev);
855 return 0;
856 }
857
f8a6dd59
NP		 858 if (!err) {
859 vdev->intr_coal_timer_info.mul = (u32) vdev->args[0];
860 vdev->intr_coal_timer_info.div = (u32) vdev->args[1];
861 vdev->intr_coal_timer_info.max_usec = (u32) vdev->args[2];
862 }
ea7ea65a
VK		 863
864 return err;
865}
866
01f2e4ea
SF		 867int vnic_dev_link_status(struct vnic_dev *vdev)
868{
01f2e4ea
SF		 869 if (!vnic_dev_notify_ready(vdev))
870 return 0;
871
872 return vdev->notify_copy.link_state;
873}
874
875u32 vnic_dev_port_speed(struct vnic_dev *vdev)
876{
877 if (!vnic_dev_notify_ready(vdev))
878 return 0;
879
880 return vdev->notify_copy.port_speed;
881}
882
883u32 vnic_dev_msg_lvl(struct vnic_dev *vdev)
884{
885 if (!vnic_dev_notify_ready(vdev))
886 return 0;
887
888 return vdev->notify_copy.msglvl;
889}
890
891u32 vnic_dev_mtu(struct vnic_dev *vdev)
892{
893 if (!vnic_dev_notify_ready(vdev))
894 return 0;
895
896 return vdev->notify_copy.mtu;
897}
898
899void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
900 enum vnic_dev_intr_mode intr_mode)
901{
902 vdev->intr_mode = intr_mode;
903}
904
905enum vnic_dev_intr_mode vnic_dev_get_intr_mode(
906 struct vnic_dev *vdev)
907{
908 return vdev->intr_mode;
909}
910
ea7ea65a
VK		 911u32 vnic_dev_intr_coal_timer_usec_to_hw(struct vnic_dev *vdev, u32 usec)
912{
913 return (usec * vdev->intr_coal_timer_info.mul) /
914 vdev->intr_coal_timer_info.div;
915}
916
917u32 vnic_dev_intr_coal_timer_hw_to_usec(struct vnic_dev *vdev, u32 hw_cycles)
918{
919 return (hw_cycles * vdev->intr_coal_timer_info.div) /
920 vdev->intr_coal_timer_info.mul;
921}
922
923u32 vnic_dev_get_intr_coal_timer_max(struct vnic_dev *vdev)
924{
925 return vdev->intr_coal_timer_info.max_usec;
926}
927
01f2e4ea
SF		 928void vnic_dev_unregister(struct vnic_dev *vdev)
929{
930 if (vdev) {
931 if (vdev->notify)
932 pci_free_consistent(vdev->pdev,
933 sizeof(struct vnic_devcmd_notify),
934 vdev->notify,
935 vdev->notify_pa);
01f2e4ea
SF		 936 if (vdev->stats)
937 pci_free_consistent(vdev->pdev,
29046f9b 938 sizeof(struct vnic_stats),
01f2e4ea
SF		 939 vdev->stats, vdev->stats_pa);
940 if (vdev->fw_info)
941 pci_free_consistent(vdev->pdev,
942 sizeof(struct vnic_devcmd_fw_info),
943 vdev->fw_info, vdev->fw_info_pa);
944 kfree(vdev);
945 }
946}
4a50ddfd 947EXPORT_SYMBOL(vnic_dev_unregister);
01f2e4ea
SF		 948
949struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
27e6c7d3
SF		 950 void *priv, struct pci_dev *pdev, struct vnic_dev_bar *bar,
951 unsigned int num_bars)
01f2e4ea
SF		 952{
953 if (!vdev) {
954 vdev = kzalloc(sizeof(struct vnic_dev), GFP_ATOMIC);
955 if (!vdev)
956 return NULL;
957 }
958
959 vdev->priv = priv;
960 vdev->pdev = pdev;
961
27e6c7d3 962 if (vnic_dev_discover_res(vdev, bar, num_bars))
01f2e4ea
SF		 963 goto err_out;
964
965 vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
966 if (!vdev->devcmd)
967 goto err_out;
968
969 return vdev;
970
971err_out:
972 vnic_dev_unregister(vdev);
973 return NULL;
974}
4a50ddfd 975EXPORT_SYMBOL(vnic_dev_register);
976
977struct pci_dev *vnic_dev_get_pdev(struct vnic_dev *vdev)
978{
979 return vdev->pdev;
980}
981EXPORT_SYMBOL(vnic_dev_get_pdev);
01f2e4ea 982
9085fd09
RP		 983int vnic_dev_init_prov2(struct vnic_dev *vdev, u8 *buf, u32 len)
984{
985 u64 a0, a1 = len;
986 int wait = 1000;
987 dma_addr_t prov_pa;
988 void *prov_buf;
989 int ret;
990
991 prov_buf = pci_alloc_consistent(vdev->pdev, len, &prov_pa);
992 if (!prov_buf)
993 return -ENOMEM;
27372bf5 994
9085fd09
RP		 995 memcpy(prov_buf, buf, len);
996
997 a0 = prov_pa;
998
999 ret = vnic_dev_cmd(vdev, CMD_INIT_PROV_INFO2, &a0, &a1, wait);
1000
1001 pci_free_consistent(vdev->pdev, len, prov_buf, prov_pa);
1002
1003 return ret;
1004}
1005
1006int vnic_dev_enable2(struct vnic_dev *vdev, int active)
1007{
1008 u64 a0, a1 = 0;
1009 int wait = 1000;
1010
1011 a0 = (active ? CMD_ENABLE2_ACTIVE : 0);
1012
1013 return vnic_dev_cmd(vdev, CMD_ENABLE2, &a0, &a1, wait);
1014}
1015
1016static int vnic_dev_cmd_status(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
1017 int *status)
1018{
1019 u64 a0 = cmd, a1 = 0;
1020 int wait = 1000;
1021 int ret;
1022
1023 ret = vnic_dev_cmd(vdev, CMD_STATUS, &a0, &a1, wait);
1024 if (!ret)
1025 *status = (int)a0;
1026
1027 return ret;
1028}
1029
1030int vnic_dev_enable2_done(struct vnic_dev *vdev, int *status)
1031{
1032 return vnic_dev_cmd_status(vdev, CMD_ENABLE2, status);
1033}
1034
1035int vnic_dev_deinit_done(struct vnic_dev *vdev, int *status)
1036{
1037 return vnic_dev_cmd_status(vdev, CMD_DEINIT, status);
1038}
d6c81bc6
RP		 1039
1040int vnic_dev_set_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
1041{
1042 u64 a0, a1;
1043 int wait = 1000;
1044 int i;
1045
1046 for (i = 0; i < ETH_ALEN; i++)
1047 ((u8 *)&a0)[i] = mac_addr[i];
1048
1049 return vnic_dev_cmd(vdev, CMD_SET_MAC_ADDR, &a0, &a1, wait);
1050}
63118527
GV		 1051
1052/* vnic_dev_classifier: Add/Delete classifier entries
1053 * @vdev: vdev of the device
1054 * @cmd: CLSF_ADD for Add filter
1055 * CLSF_DEL for Delete filter
1056 * @entry: In case of ADD filter, the caller passes the RQ number in this
1057 * variable.
1058 *
1059 * This function stores the filter_id returned by the firmware in the
1060 * same variable before return;
1061 *
1062 * In case of DEL filter, the caller passes the RQ number. Return
1063 * value is irrelevant.
1064 * @data: filter data
1065 */
1066int vnic_dev_classifier(struct vnic_dev *vdev, u8 cmd, u16 *entry,
1067 struct filter *data)
1068{
1069 u64 a0, a1;
1070 int wait = 1000;
1071 dma_addr_t tlv_pa;
1072 int ret = -EINVAL;
1073 struct filter_tlv *tlv, *tlv_va;
1074 struct filter_action *action;
1075 u64 tlv_size;
1076
1077 if (cmd == CLSF_ADD) {
1078 tlv_size = sizeof(struct filter) +
1079 sizeof(struct filter_action) +
1080 2 * sizeof(struct filter_tlv);
1081 tlv_va = pci_alloc_consistent(vdev->pdev, tlv_size, &tlv_pa);
1082 if (!tlv_va)
1083 return -ENOMEM;
1084 tlv = tlv_va;
1085 a0 = tlv_pa;
1086 a1 = tlv_size;
1087 memset(tlv, 0, tlv_size);
1088 tlv->type = CLSF_TLV_FILTER;
1089 tlv->length = sizeof(struct filter);
1090 *(struct filter *)&tlv->val = *data;
1091
1092 tlv = (struct filter_tlv *)((char *)tlv +
1093 sizeof(struct filter_tlv) +
1094 sizeof(struct filter));
1095
1096 tlv->type = CLSF_TLV_ACTION;
1097 tlv->length = sizeof(struct filter_action);
1098 action = (struct filter_action *)&tlv->val;
1099 action->type = FILTER_ACTION_RQ_STEERING;
1100 action->u.rq_idx = *entry;
1101
1102 ret = vnic_dev_cmd(vdev, CMD_ADD_FILTER, &a0, &a1, wait);
1103 *entry = (u16)a0;
1104 pci_free_consistent(vdev->pdev, tlv_size, tlv_va, tlv_pa);
1105 } else if (cmd == CLSF_DEL) {
1106 a0 = *entry;
1107 ret = vnic_dev_cmd(vdev, CMD_DEL_FILTER, &a0, &a1, wait);
1108 }
1109
1110 return ret;
1111}
Linux 6.x block layer and io_uring tree(s)