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smsc: smc911x: Fix sparse warnings
[linux-block.git] / drivers / net / ethernet / cisco / enic / enic_main.c
CommitLineData
01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
SF		 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
a6b7a407 26#include <linux/interrupt.h>
01f2e4ea
SF		 27#include <linux/workqueue.h>
28#include <linux/pci.h>
29#include <linux/netdevice.h>
30#include <linux/etherdevice.h>
01789349 31#include <linux/if.h>
01f2e4ea
SF		 32#include <linux/if_ether.h>
33#include <linux/if_vlan.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/ip.h>
37#include <linux/ipv6.h>
38#include <linux/tcp.h>
29046f9b 39#include <linux/rtnetlink.h>
70c71606 40#include <linux/prefetch.h>
b7c6bfb7 41#include <net/ip6_checksum.h>
01f2e4ea
SF		 42
43#include "cq_enet_desc.h"
44#include "vnic_dev.h"
45#include "vnic_intr.h"
46#include "vnic_stats.h"
f8bd9091 47#include "vnic_vic.h"
01f2e4ea
SF		 48#include "enic_res.h"
49#include "enic.h"
51987461 50#include "enic_dev.h"
b3abfbd2 51#include "enic_pp.h"
01f2e4ea
SF		 52
53#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
ea0d7d91
SF		 54#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
55#define MAX_TSO (1 << 16)
56#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
57
58#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
f8bd9091 59#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
3a4adef5 60#define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */
01f2e4ea
SF		 61
62/* Supported devices */
a3aa1884 63static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
ea0d7d91 64 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
f8bd9091 65 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
3a4adef5 66 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
01f2e4ea
SF		 67 { 0, } /* end of table */
68};
69
70MODULE_DESCRIPTION(DRV_DESCRIPTION);
71MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
72MODULE_LICENSE("GPL");
73MODULE_VERSION(DRV_VERSION);
74MODULE_DEVICE_TABLE(pci, enic_id_table);
75
76struct enic_stat {
77 char name[ETH_GSTRING_LEN];
78 unsigned int offset;
79};
80
81#define ENIC_TX_STAT(stat) \
82 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
83#define ENIC_RX_STAT(stat) \
84 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
85
86static const struct enic_stat enic_tx_stats[] = {
87 ENIC_TX_STAT(tx_frames_ok),
88 ENIC_TX_STAT(tx_unicast_frames_ok),
89 ENIC_TX_STAT(tx_multicast_frames_ok),
90 ENIC_TX_STAT(tx_broadcast_frames_ok),
91 ENIC_TX_STAT(tx_bytes_ok),
92 ENIC_TX_STAT(tx_unicast_bytes_ok),
93 ENIC_TX_STAT(tx_multicast_bytes_ok),
94 ENIC_TX_STAT(tx_broadcast_bytes_ok),
95 ENIC_TX_STAT(tx_drops),
96 ENIC_TX_STAT(tx_errors),
97 ENIC_TX_STAT(tx_tso),
98};
99
100static const struct enic_stat enic_rx_stats[] = {
101 ENIC_RX_STAT(rx_frames_ok),
102 ENIC_RX_STAT(rx_frames_total),
103 ENIC_RX_STAT(rx_unicast_frames_ok),
104 ENIC_RX_STAT(rx_multicast_frames_ok),
105 ENIC_RX_STAT(rx_broadcast_frames_ok),
106 ENIC_RX_STAT(rx_bytes_ok),
107 ENIC_RX_STAT(rx_unicast_bytes_ok),
108 ENIC_RX_STAT(rx_multicast_bytes_ok),
109 ENIC_RX_STAT(rx_broadcast_bytes_ok),
110 ENIC_RX_STAT(rx_drop),
111 ENIC_RX_STAT(rx_no_bufs),
112 ENIC_RX_STAT(rx_errors),
113 ENIC_RX_STAT(rx_rss),
114 ENIC_RX_STAT(rx_crc_errors),
115 ENIC_RX_STAT(rx_frames_64),
116 ENIC_RX_STAT(rx_frames_127),
117 ENIC_RX_STAT(rx_frames_255),
118 ENIC_RX_STAT(rx_frames_511),
119 ENIC_RX_STAT(rx_frames_1023),
120 ENIC_RX_STAT(rx_frames_1518),
121 ENIC_RX_STAT(rx_frames_to_max),
122};
123
124static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
125static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
126
3f192795 127int enic_is_dynamic(struct enic *enic)
f8bd9091
SF		 128{
129 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
130}
131
8749b427
RP		 132int enic_sriov_enabled(struct enic *enic)
133{
134 return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
135}
136
3a4adef5
RP		 137static int enic_is_sriov_vf(struct enic *enic)
138{
139 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
140}
141
889d13f5
RP		 142int enic_is_valid_vf(struct enic *enic, int vf)
143{
144#ifdef CONFIG_PCI_IOV
145 return vf >= 0 && vf < enic->num_vfs;
146#else
147 return 0;
148#endif
149}
150
717258ba
VK		 151static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
152{
153 return rq;
154}
155
156static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
157{
158 return enic->rq_count + wq;
159}
160
161static inline unsigned int enic_legacy_io_intr(void)
162{
163 return 0;
164}
165
166static inline unsigned int enic_legacy_err_intr(void)
167{
168 return 1;
169}
170
171static inline unsigned int enic_legacy_notify_intr(void)
172{
173 return 2;
174}
175
176static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
177{
7d260ec2 178 return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset;
717258ba
VK		 179}
180
181static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
182{
7d260ec2 183 return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset;
717258ba
VK		 184}
185
186static inline unsigned int enic_msix_err_intr(struct enic *enic)
187{
188 return enic->rq_count + enic->wq_count;
189}
190
191static inline unsigned int enic_msix_notify_intr(struct enic *enic)
192{
193 return enic->rq_count + enic->wq_count + 1;
194}
195
01f2e4ea
SF		 196static int enic_get_settings(struct net_device *netdev,
197 struct ethtool_cmd *ecmd)
198{
199 struct enic *enic = netdev_priv(netdev);
200
201 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
202 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
203 ecmd->port = PORT_FIBRE;
204 ecmd->transceiver = XCVR_EXTERNAL;
205
206 if (netif_carrier_ok(netdev)) {
70739497 207 ethtool_cmd_speed_set(ecmd, vnic_dev_port_speed(enic->vdev));
01f2e4ea
SF		 208 ecmd->duplex = DUPLEX_FULL;
209 } else {
70739497 210 ethtool_cmd_speed_set(ecmd, -1);
01f2e4ea
SF		 211 ecmd->duplex = -1;
212 }
213
214 ecmd->autoneg = AUTONEG_DISABLE;
215
216 return 0;
217}
218
219static void enic_get_drvinfo(struct net_device *netdev,
220 struct ethtool_drvinfo *drvinfo)
221{
222 struct enic *enic = netdev_priv(netdev);
223 struct vnic_devcmd_fw_info *fw_info;
224
383ab92f 225 enic_dev_fw_info(enic, &fw_info);
01f2e4ea 226
612a94d6
RJ		 227 strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
228 strlcpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
229 strlcpy(drvinfo->fw_version, fw_info->fw_version,
01f2e4ea 230 sizeof(drvinfo->fw_version));
612a94d6 231 strlcpy(drvinfo->bus_info, pci_name(enic->pdev),
01f2e4ea
SF		 232 sizeof(drvinfo->bus_info));
233}
234
235static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
236{
237 unsigned int i;
238
239 switch (stringset) {
240 case ETH_SS_STATS:
241 for (i = 0; i < enic_n_tx_stats; i++) {
242 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
243 data += ETH_GSTRING_LEN;
244 }
245 for (i = 0; i < enic_n_rx_stats; i++) {
246 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
247 data += ETH_GSTRING_LEN;
248 }
249 break;
250 }
251}
252
25f0a061 253static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 254{
25f0a061
SF		 255 switch (sset) {
256 case ETH_SS_STATS:
257 return enic_n_tx_stats + enic_n_rx_stats;
258 default:
259 return -EOPNOTSUPP;
260 }
01f2e4ea
SF		 261}
262
263static void enic_get_ethtool_stats(struct net_device *netdev,
264 struct ethtool_stats *stats, u64 *data)
265{
266 struct enic *enic = netdev_priv(netdev);
267 struct vnic_stats *vstats;
268 unsigned int i;
269
383ab92f 270 enic_dev_stats_dump(enic, &vstats);
01f2e4ea
SF		 271
272 for (i = 0; i < enic_n_tx_stats; i++)
273 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
274 for (i = 0; i < enic_n_rx_stats; i++)
275 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
276}
277
01f2e4ea
SF		 278static u32 enic_get_msglevel(struct net_device *netdev)
279{
280 struct enic *enic = netdev_priv(netdev);
281 return enic->msg_enable;
282}
283
284static void enic_set_msglevel(struct net_device *netdev, u32 value)
285{
286 struct enic *enic = netdev_priv(netdev);
287 enic->msg_enable = value;
288}
289
7c844599
SF		 290static int enic_get_coalesce(struct net_device *netdev,
291 struct ethtool_coalesce *ecmd)
292{
293 struct enic *enic = netdev_priv(netdev);
294
295 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
296 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
297
298 return 0;
299}
300
301static int enic_set_coalesce(struct net_device *netdev,
302 struct ethtool_coalesce *ecmd)
303{
304 struct enic *enic = netdev_priv(netdev);
305 u32 tx_coalesce_usecs;
306 u32 rx_coalesce_usecs;
717258ba 307 unsigned int i, intr;
7c844599 308
ea7ea65a
VK		 309 tx_coalesce_usecs = min_t(u32, ecmd->tx_coalesce_usecs,
310 vnic_dev_get_intr_coal_timer_max(enic->vdev));
311 rx_coalesce_usecs = min_t(u32, ecmd->rx_coalesce_usecs,
312 vnic_dev_get_intr_coal_timer_max(enic->vdev));
7c844599
SF		 313
314 switch (vnic_dev_get_intr_mode(enic->vdev)) {
315 case VNIC_DEV_INTR_MODE_INTX:
316 if (tx_coalesce_usecs != rx_coalesce_usecs)
317 return -EINVAL;
318
717258ba
VK		 319 intr = enic_legacy_io_intr();
320 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 321 tx_coalesce_usecs);
7c844599
SF		 322 break;
323 case VNIC_DEV_INTR_MODE_MSI:
324 if (tx_coalesce_usecs != rx_coalesce_usecs)
325 return -EINVAL;
326
327 vnic_intr_coalescing_timer_set(&enic->intr[0],
ea7ea65a 328 tx_coalesce_usecs);
7c844599
SF		 329 break;
330 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 331 for (i = 0; i < enic->wq_count; i++) {
332 intr = enic_msix_wq_intr(enic, i);
333 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 334 tx_coalesce_usecs);
717258ba
VK		 335 }
336
337 for (i = 0; i < enic->rq_count; i++) {
338 intr = enic_msix_rq_intr(enic, i);
339 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 340 rx_coalesce_usecs);
717258ba
VK		 341 }
342
7c844599
SF		 343 break;
344 default:
345 break;
346 }
347
348 enic->tx_coalesce_usecs = tx_coalesce_usecs;
349 enic->rx_coalesce_usecs = rx_coalesce_usecs;
350
351 return 0;
352}
353
0fc0b732 354static const struct ethtool_ops enic_ethtool_ops = {
01f2e4ea
SF		 355 .get_settings = enic_get_settings,
356 .get_drvinfo = enic_get_drvinfo,
357 .get_msglevel = enic_get_msglevel,
358 .set_msglevel = enic_set_msglevel,
359 .get_link = ethtool_op_get_link,
360 .get_strings = enic_get_strings,
25f0a061 361 .get_sset_count = enic_get_sset_count,
01f2e4ea 362 .get_ethtool_stats = enic_get_ethtool_stats,
7c844599
SF		 363 .get_coalesce = enic_get_coalesce,
364 .set_coalesce = enic_set_coalesce,
01f2e4ea
SF		 365};
366
367static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
368{
369 struct enic *enic = vnic_dev_priv(wq->vdev);
370
371 if (buf->sop)
372 pci_unmap_single(enic->pdev, buf->dma_addr,
373 buf->len, PCI_DMA_TODEVICE);
374 else
375 pci_unmap_page(enic->pdev, buf->dma_addr,
376 buf->len, PCI_DMA_TODEVICE);
377
378 if (buf->os_buf)
379 dev_kfree_skb_any(buf->os_buf);
380}
381
382static void enic_wq_free_buf(struct vnic_wq *wq,
383 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
384{
385 enic_free_wq_buf(wq, buf);
386}
387
388static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
389 u8 type, u16 q_number, u16 completed_index, void *opaque)
390{
391 struct enic *enic = vnic_dev_priv(vdev);
392
393 spin_lock(&enic->wq_lock[q_number]);
394
395 vnic_wq_service(&enic->wq[q_number], cq_desc,
396 completed_index, enic_wq_free_buf,
397 opaque);
398
399 if (netif_queue_stopped(enic->netdev) &&
ea0d7d91
SF		 400 vnic_wq_desc_avail(&enic->wq[q_number]) >=
401 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
01f2e4ea
SF		 402 netif_wake_queue(enic->netdev);
403
404 spin_unlock(&enic->wq_lock[q_number]);
405
406 return 0;
407}
408
409static void enic_log_q_error(struct enic *enic)
410{
411 unsigned int i;
412 u32 error_status;
413
414 for (i = 0; i < enic->wq_count; i++) {
415 error_status = vnic_wq_error_status(&enic->wq[i]);
416 if (error_status)
a7a79deb
VK		 417 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
418 i, error_status);
01f2e4ea
SF		 419 }
420
421 for (i = 0; i < enic->rq_count; i++) {
422 error_status = vnic_rq_error_status(&enic->rq[i]);
423 if (error_status)
a7a79deb
VK		 424 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
425 i, error_status);
01f2e4ea
SF		 426 }
427}
428
383ab92f 429static void enic_msglvl_check(struct enic *enic)
01f2e4ea 430{
383ab92f 431 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
01f2e4ea 432
383ab92f 433 if (msg_enable != enic->msg_enable) {
a7a79deb
VK		 434 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
435 enic->msg_enable, msg_enable);
383ab92f 436 enic->msg_enable = msg_enable;
01f2e4ea
SF		 437 }
438}
439
440static void enic_mtu_check(struct enic *enic)
441{
442 u32 mtu = vnic_dev_mtu(enic->vdev);
a7a79deb 443 struct net_device *netdev = enic->netdev;
01f2e4ea 444
491598a4 445 if (mtu && mtu != enic->port_mtu) {
7c844599 446 enic->port_mtu = mtu;
7335903c 447 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
c97c894d
RP		 448 mtu = max_t(int, ENIC_MIN_MTU,
449 min_t(int, ENIC_MAX_MTU, mtu));
450 if (mtu != netdev->mtu)
451 schedule_work(&enic->change_mtu_work);
452 } else {
453 if (mtu < netdev->mtu)
454 netdev_warn(netdev,
455 "interface MTU (%d) set higher "
456 "than switch port MTU (%d)\n",
457 netdev->mtu, mtu);
458 }
01f2e4ea
SF		 459 }
460}
461
383ab92f 462static void enic_link_check(struct enic *enic)
01f2e4ea 463{
383ab92f
VK		 464 int link_status = vnic_dev_link_status(enic->vdev);
465 int carrier_ok = netif_carrier_ok(enic->netdev);
01f2e4ea 466
383ab92f 467 if (link_status && !carrier_ok) {
a7a79deb 468 netdev_info(enic->netdev, "Link UP\n");
383ab92f
VK		 469 netif_carrier_on(enic->netdev);
470 } else if (!link_status && carrier_ok) {
a7a79deb 471 netdev_info(enic->netdev, "Link DOWN\n");
383ab92f 472 netif_carrier_off(enic->netdev);
01f2e4ea
SF		 473 }
474}
475
476static void enic_notify_check(struct enic *enic)
477{
478 enic_msglvl_check(enic);
479 enic_mtu_check(enic);
480 enic_link_check(enic);
481}
482
483#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
484
485static irqreturn_t enic_isr_legacy(int irq, void *data)
486{
487 struct net_device *netdev = data;
488 struct enic *enic = netdev_priv(netdev);
717258ba
VK		 489 unsigned int io_intr = enic_legacy_io_intr();
490 unsigned int err_intr = enic_legacy_err_intr();
491 unsigned int notify_intr = enic_legacy_notify_intr();
01f2e4ea
SF		 492 u32 pba;
493
717258ba 494 vnic_intr_mask(&enic->intr[io_intr]);
01f2e4ea
SF		 495
496 pba = vnic_intr_legacy_pba(enic->legacy_pba);
497 if (!pba) {
717258ba 498 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 499 return IRQ_NONE; /* not our interrupt */
500 }
501
717258ba
VK		 502 if (ENIC_TEST_INTR(pba, notify_intr)) {
503 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
01f2e4ea 504 enic_notify_check(enic);
ed8af6b2 505 }
01f2e4ea 506
717258ba
VK		 507 if (ENIC_TEST_INTR(pba, err_intr)) {
508 vnic_intr_return_all_credits(&enic->intr[err_intr]);
01f2e4ea
SF		 509 enic_log_q_error(enic);
510 /* schedule recovery from WQ/RQ error */
511 schedule_work(&enic->reset);
512 return IRQ_HANDLED;
513 }
514
717258ba
VK		 515 if (ENIC_TEST_INTR(pba, io_intr)) {
516 if (napi_schedule_prep(&enic->napi[0]))
517 __napi_schedule(&enic->napi[0]);
01f2e4ea 518 } else {
717258ba 519 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 520 }
521
522 return IRQ_HANDLED;
523}
524
525static irqreturn_t enic_isr_msi(int irq, void *data)
526{
527 struct enic *enic = data;
528
529 /* With MSI, there is no sharing of interrupts, so this is
530 * our interrupt and there is no need to ack it. The device
531 * is not providing per-vector masking, so the OS will not
532 * write to PCI config space to mask/unmask the interrupt.
533 * We're using mask_on_assertion for MSI, so the device
534 * automatically masks the interrupt when the interrupt is
535 * generated. Later, when exiting polling, the interrupt
536 * will be unmasked (see enic_poll).
537 *
538 * Also, the device uses the same PCIe Traffic Class (TC)
539 * for Memory Write data and MSI, so there are no ordering
540 * issues; the MSI will always arrive at the Root Complex
541 * _after_ corresponding Memory Writes (i.e. descriptor
542 * writes).
543 */
544
717258ba 545 napi_schedule(&enic->napi[0]);
01f2e4ea
SF		 546
547 return IRQ_HANDLED;
548}
549
550static irqreturn_t enic_isr_msix_rq(int irq, void *data)
551{
717258ba 552 struct napi_struct *napi = data;
01f2e4ea
SF		 553
554 /* schedule NAPI polling for RQ cleanup */
717258ba 555 napi_schedule(napi);
01f2e4ea
SF		 556
557 return IRQ_HANDLED;
558}
559
560static irqreturn_t enic_isr_msix_wq(int irq, void *data)
561{
562 struct enic *enic = data;
717258ba
VK		 563 unsigned int cq = enic_cq_wq(enic, 0);
564 unsigned int intr = enic_msix_wq_intr(enic, 0);
01f2e4ea
SF		 565 unsigned int wq_work_to_do = -1; /* no limit */
566 unsigned int wq_work_done;
567
717258ba 568 wq_work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 569 wq_work_to_do, enic_wq_service, NULL);
570
717258ba 571 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 572 wq_work_done,
573 1 /* unmask intr */,
574 1 /* reset intr timer */);
575
576 return IRQ_HANDLED;
577}
578
579static irqreturn_t enic_isr_msix_err(int irq, void *data)
580{
581 struct enic *enic = data;
717258ba 582 unsigned int intr = enic_msix_err_intr(enic);
01f2e4ea 583
717258ba 584 vnic_intr_return_all_credits(&enic->intr[intr]);
ed8af6b2 585
01f2e4ea
SF		 586 enic_log_q_error(enic);
587
588 /* schedule recovery from WQ/RQ error */
589 schedule_work(&enic->reset);
590
591 return IRQ_HANDLED;
592}
593
594static irqreturn_t enic_isr_msix_notify(int irq, void *data)
595{
596 struct enic *enic = data;
717258ba 597 unsigned int intr = enic_msix_notify_intr(enic);
01f2e4ea 598
717258ba 599 vnic_intr_return_all_credits(&enic->intr[intr]);
01f2e4ea 600 enic_notify_check(enic);
01f2e4ea
SF		 601
602 return IRQ_HANDLED;
603}
604
605static inline void enic_queue_wq_skb_cont(struct enic *enic,
606 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 607 unsigned int len_left, int loopback)
01f2e4ea 608{
9e903e08 609 const skb_frag_t *frag;
01f2e4ea
SF		 610
611 /* Queue additional data fragments */
612 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
9e903e08 613 len_left -= skb_frag_size(frag);
01f2e4ea 614 enic_queue_wq_desc_cont(wq, skb,
4bf5adbf 615 skb_frag_dma_map(&enic->pdev->dev,
9e903e08 616 frag, 0, skb_frag_size(frag),
5d6bcdfe 617 DMA_TO_DEVICE),
9e903e08 618 skb_frag_size(frag),
1825aca6
VK		 619 (len_left == 0), /* EOP? */
620 loopback);
01f2e4ea
SF		 621 }
622}
623
624static inline void enic_queue_wq_skb_vlan(struct enic *enic,
625 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 626 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 627{
628 unsigned int head_len = skb_headlen(skb);
629 unsigned int len_left = skb->len - head_len;
630 int eop = (len_left == 0);
631
ea0d7d91
SF		 632 /* Queue the main skb fragment. The fragments are no larger
633 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
634 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
635 * per fragment is queued.
636 */
01f2e4ea
SF		 637 enic_queue_wq_desc(wq, skb,
638 pci_map_single(enic->pdev, skb->data,
639 head_len, PCI_DMA_TODEVICE),
640 head_len,
641 vlan_tag_insert, vlan_tag,
1825aca6 642 eop, loopback);
01f2e4ea
SF		 643
644 if (!eop)
1825aca6 645 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 646}
647
648static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
649 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 650 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 651{
652 unsigned int head_len = skb_headlen(skb);
653 unsigned int len_left = skb->len - head_len;
0d0b1672 654 unsigned int hdr_len = skb_checksum_start_offset(skb);
01f2e4ea
SF		 655 unsigned int csum_offset = hdr_len + skb->csum_offset;
656 int eop = (len_left == 0);
657
ea0d7d91
SF		 658 /* Queue the main skb fragment. The fragments are no larger
659 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
660 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
661 * per fragment is queued.
662 */
01f2e4ea
SF		 663 enic_queue_wq_desc_csum_l4(wq, skb,
664 pci_map_single(enic->pdev, skb->data,
665 head_len, PCI_DMA_TODEVICE),
666 head_len,
667 csum_offset,
668 hdr_len,
669 vlan_tag_insert, vlan_tag,
1825aca6 670 eop, loopback);
01f2e4ea
SF		 671
672 if (!eop)
1825aca6 673 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 674}
675
676static inline void enic_queue_wq_skb_tso(struct enic *enic,
677 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
1825aca6 678 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea 679{
ea0d7d91
SF		 680 unsigned int frag_len_left = skb_headlen(skb);
681 unsigned int len_left = skb->len - frag_len_left;
01f2e4ea
SF		 682 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
683 int eop = (len_left == 0);
ea0d7d91
SF		 684 unsigned int len;
685 dma_addr_t dma_addr;
686 unsigned int offset = 0;
687 skb_frag_t *frag;
01f2e4ea
SF		 688
689 /* Preload TCP csum field with IP pseudo hdr calculated
690 * with IP length set to zero. HW will later add in length
691 * to each TCP segment resulting from the TSO.
692 */
693
09640e63 694 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
01f2e4ea
SF		 695 ip_hdr(skb)->check = 0;
696 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
697 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 698 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
SF		 699 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
700 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
701 }
702
ea0d7d91
SF		 703 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
704 * for the main skb fragment
705 */
706 while (frag_len_left) {
707 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
708 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
709 len, PCI_DMA_TODEVICE);
710 enic_queue_wq_desc_tso(wq, skb,
711 dma_addr,
712 len,
713 mss, hdr_len,
714 vlan_tag_insert, vlan_tag,
1825aca6 715 eop && (len == frag_len_left), loopback);
ea0d7d91
SF		 716 frag_len_left -= len;
717 offset += len;
718 }
01f2e4ea 719
ea0d7d91
SF		 720 if (eop)
721 return;
722
723 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
724 * for additional data fragments
725 */
726 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
9e903e08
ED		 727 len_left -= skb_frag_size(frag);
728 frag_len_left = skb_frag_size(frag);
4bf5adbf 729 offset = 0;
ea0d7d91
SF		 730
731 while (frag_len_left) {
732 len = min(frag_len_left,
733 (unsigned int)WQ_ENET_MAX_DESC_LEN);
4bf5adbf
IC		 734 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
735 offset, len,
5d6bcdfe 736 DMA_TO_DEVICE);
ea0d7d91
SF		 737 enic_queue_wq_desc_cont(wq, skb,
738 dma_addr,
739 len,
740 (len_left == 0) &&
1825aca6
VK		 741 (len == frag_len_left), /* EOP? */
742 loopback);
ea0d7d91
SF		 743 frag_len_left -= len;
744 offset += len;
745 }
746 }
01f2e4ea
SF		 747}
748
749static inline void enic_queue_wq_skb(struct enic *enic,
750 struct vnic_wq *wq, struct sk_buff *skb)
751{
752 unsigned int mss = skb_shinfo(skb)->gso_size;
753 unsigned int vlan_tag = 0;
754 int vlan_tag_insert = 0;
1825aca6 755 int loopback = 0;
01f2e4ea 756
eab6d18d 757 if (vlan_tx_tag_present(skb)) {
01f2e4ea
SF		 758 /* VLAN tag from trunking driver */
759 vlan_tag_insert = 1;
760 vlan_tag = vlan_tx_tag_get(skb);
1825aca6
VK		 761 } else if (enic->loop_enable) {
762 vlan_tag = enic->loop_tag;
763 loopback = 1;
01f2e4ea
SF		 764 }
765
766 if (mss)
767 enic_queue_wq_skb_tso(enic, wq, skb, mss,
1825aca6 768 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 769 else if (skb->ip_summed == CHECKSUM_PARTIAL)
770 enic_queue_wq_skb_csum_l4(enic, wq, skb,
1825aca6 771 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 772 else
773 enic_queue_wq_skb_vlan(enic, wq, skb,
1825aca6 774 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 775}
776
ed8af6b2 777/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325 778static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
d87fd25d 779 struct net_device *netdev)
01f2e4ea
SF		 780{
781 struct enic *enic = netdev_priv(netdev);
782 struct vnic_wq *wq = &enic->wq[0];
783 unsigned long flags;
784
785 if (skb->len <= 0) {
786 dev_kfree_skb(skb);
787 return NETDEV_TX_OK;
788 }
789
790 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
791 * which is very likely. In the off chance it's going to take
792 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
793 */
794
795 if (skb_shinfo(skb)->gso_size == 0 &&
796 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
797 skb_linearize(skb)) {
798 dev_kfree_skb(skb);
799 return NETDEV_TX_OK;
800 }
801
802 spin_lock_irqsave(&enic->wq_lock[0], flags);
803
ea0d7d91
SF		 804 if (vnic_wq_desc_avail(wq) <
805 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
SF		 806 netif_stop_queue(netdev);
807 /* This is a hard error, log it */
a7a79deb 808 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
01f2e4ea
SF		 809 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
810 return NETDEV_TX_BUSY;
811 }
812
813 enic_queue_wq_skb(enic, wq, skb);
814
ea0d7d91 815 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF		 816 netif_stop_queue(netdev);
817
01f2e4ea
SF		 818 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
819
820 return NETDEV_TX_OK;
821}
822
823/* dev_base_lock rwlock held, nominally process context */
f20530bc 824static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
825 struct rtnl_link_stats64 *net_stats)
01f2e4ea
SF		 826{
827 struct enic *enic = netdev_priv(netdev);
828 struct vnic_stats *stats;
829
383ab92f 830 enic_dev_stats_dump(enic, &stats);
01f2e4ea 831
25f0a061
SF		 832 net_stats->tx_packets = stats->tx.tx_frames_ok;
833 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
834 net_stats->tx_errors = stats->tx.tx_errors;
835 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 836
25f0a061
SF		 837 net_stats->rx_packets = stats->rx.rx_frames_ok;
838 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
839 net_stats->rx_errors = stats->rx.rx_errors;
840 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
350991e1 841 net_stats->rx_over_errors = enic->rq_truncated_pkts;
bd9fb1a4 842 net_stats->rx_crc_errors = enic->rq_bad_fcs;
350991e1 843 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
01f2e4ea 844
25f0a061 845 return net_stats;
01f2e4ea
SF		 846}
847
b3abfbd2 848void enic_reset_addr_lists(struct enic *enic)
01f2e4ea
SF		 849{
850 enic->mc_count = 0;
e0afe53f 851 enic->uc_count = 0;
99ef5639 852 enic->flags = 0;
01f2e4ea
SF		 853}
854
855static int enic_set_mac_addr(struct net_device *netdev, char *addr)
856{
f8bd9091
SF		 857 struct enic *enic = netdev_priv(netdev);
858
7335903c 859 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
f8bd9091
SF		 860 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
861 return -EADDRNOTAVAIL;
862 } else {
863 if (!is_valid_ether_addr(addr))
864 return -EADDRNOTAVAIL;
865 }
01f2e4ea
SF		 866
867 memcpy(netdev->dev_addr, addr, netdev->addr_len);
868
869 return 0;
870}
871
f8bd9091
SF		 872static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
873{
874 struct enic *enic = netdev_priv(netdev);
875 struct sockaddr *saddr = p;
876 char *addr = saddr->sa_data;
877 int err;
878
879 if (netif_running(enic->netdev)) {
880 err = enic_dev_del_station_addr(enic);
881 if (err)
882 return err;
883 }
884
885 err = enic_set_mac_addr(netdev, addr);
886 if (err)
887 return err;
888
889 if (netif_running(enic->netdev)) {
890 err = enic_dev_add_station_addr(enic);
891 if (err)
892 return err;
893 }
894
895 return err;
896}
897
898static int enic_set_mac_address(struct net_device *netdev, void *p)
899{
294dab25 900 struct sockaddr *saddr = p;
c76fd32d
VK		 901 char *addr = saddr->sa_data;
902 struct enic *enic = netdev_priv(netdev);
903 int err;
904
905 err = enic_dev_del_station_addr(enic);
906 if (err)
907 return err;
908
909 err = enic_set_mac_addr(netdev, addr);
910 if (err)
911 return err;
294dab25 912
c76fd32d 913 return enic_dev_add_station_addr(enic);
f8bd9091
SF		 914}
915
e0afe53f 916static void enic_update_multicast_addr_list(struct enic *enic)
01f2e4ea 917{
319d7e84 918 struct net_device *netdev = enic->netdev;
22bedad3 919 struct netdev_hw_addr *ha;
4cd24eaf 920 unsigned int mc_count = netdev_mc_count(netdev);
01f2e4ea 921 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
01f2e4ea
SF		 922 unsigned int i, j;
923
319d7e84
RP		 924 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
925 netdev_warn(netdev, "Registering only %d out of %d "
926 "multicast addresses\n",
927 ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
01f2e4ea 928 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
9959a185 929 }
01f2e4ea
SF		 930
931 /* Is there an easier way? Trying to minimize to
932 * calls to add/del multicast addrs. We keep the
933 * addrs from the last call in enic->mc_addr and
934 * look for changes to add/del.
935 */
936
48e2f183 937 i = 0;
22bedad3 938 netdev_for_each_mc_addr(ha, netdev) {
48e2f183
JP		 939 if (i == mc_count)
940 break;
22bedad3 941 memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
01f2e4ea
SF		 942 }
943
944 for (i = 0; i < enic->mc_count; i++) {
945 for (j = 0; j < mc_count; j++)
2e42e474 946 if (ether_addr_equal(enic->mc_addr[i], mc_addr[j]))
01f2e4ea
SF		 947 break;
948 if (j == mc_count)
319d7e84 949 enic_dev_del_addr(enic, enic->mc_addr[i]);
01f2e4ea
SF		 950 }
951
952 for (i = 0; i < mc_count; i++) {
953 for (j = 0; j < enic->mc_count; j++)
2e42e474 954 if (ether_addr_equal(mc_addr[i], enic->mc_addr[j]))
01f2e4ea
SF		 955 break;
956 if (j == enic->mc_count)
319d7e84 957 enic_dev_add_addr(enic, mc_addr[i]);
01f2e4ea
SF		 958 }
959
960 /* Save the list to compare against next time
961 */
962
963 for (i = 0; i < mc_count; i++)
964 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
965
966 enic->mc_count = mc_count;
01f2e4ea
SF		 967}
968
e0afe53f 969static void enic_update_unicast_addr_list(struct enic *enic)
319d7e84
RP		 970{
971 struct net_device *netdev = enic->netdev;
972 struct netdev_hw_addr *ha;
973 unsigned int uc_count = netdev_uc_count(netdev);
974 u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
975 unsigned int i, j;
976
977 if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
978 netdev_warn(netdev, "Registering only %d out of %d "
979 "unicast addresses\n",
980 ENIC_UNICAST_PERFECT_FILTERS, uc_count);
981 uc_count = ENIC_UNICAST_PERFECT_FILTERS;
982 }
983
984 /* Is there an easier way? Trying to minimize to
985 * calls to add/del unicast addrs. We keep the
986 * addrs from the last call in enic->uc_addr and
987 * look for changes to add/del.
988 */
989
990 i = 0;
991 netdev_for_each_uc_addr(ha, netdev) {
992 if (i == uc_count)
993 break;
994 memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
995 }
996
997 for (i = 0; i < enic->uc_count; i++) {
998 for (j = 0; j < uc_count; j++)
2e42e474 999 if (ether_addr_equal(enic->uc_addr[i], uc_addr[j]))
319d7e84
RP		 1000 break;
1001 if (j == uc_count)
1002 enic_dev_del_addr(enic, enic->uc_addr[i]);
1003 }
1004
1005 for (i = 0; i < uc_count; i++) {
1006 for (j = 0; j < enic->uc_count; j++)
2e42e474 1007 if (ether_addr_equal(uc_addr[i], enic->uc_addr[j]))
319d7e84
RP		 1008 break;
1009 if (j == enic->uc_count)
1010 enic_dev_add_addr(enic, uc_addr[i]);
1011 }
1012
1013 /* Save the list to compare against next time
1014 */
1015
1016 for (i = 0; i < uc_count; i++)
1017 memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
1018
1019 enic->uc_count = uc_count;
1020}
1021
1022/* netif_tx_lock held, BHs disabled */
1023static void enic_set_rx_mode(struct net_device *netdev)
1024{
1025 struct enic *enic = netdev_priv(netdev);
1026 int directed = 1;
1027 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1028 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1029 int promisc = (netdev->flags & IFF_PROMISC) ||
1030 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
1031 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
1032 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
1033 unsigned int flags = netdev->flags |
1034 (allmulti ? IFF_ALLMULTI : 0) |
1035 (promisc ? IFF_PROMISC : 0);
1036
1037 if (enic->flags != flags) {
1038 enic->flags = flags;
1039 enic_dev_packet_filter(enic, directed,
1040 multicast, broadcast, promisc, allmulti);
1041 }
1042
1043 if (!promisc) {
e0afe53f 1044 enic_update_unicast_addr_list(enic);
319d7e84 1045 if (!allmulti)
e0afe53f 1046 enic_update_multicast_addr_list(enic);
319d7e84
RP		 1047 }
1048}
1049
01f2e4ea
SF		 1050/* netif_tx_lock held, BHs disabled */
1051static void enic_tx_timeout(struct net_device *netdev)
1052{
1053 struct enic *enic = netdev_priv(netdev);
1054 schedule_work(&enic->reset);
1055}
1056
0b1c00fc
RP		 1057static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1058{
1059 struct enic *enic = netdev_priv(netdev);
3f192795
RP		 1060 struct enic_port_profile *pp;
1061 int err;
0b1c00fc 1062
3f192795
RP		 1063 ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1064 if (err)
1065 return err;
0b1c00fc 1066
b8622cbd 1067 if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) {
b4765833
RP		 1068 if (vf == PORT_SELF_VF) {
1069 memcpy(pp->vf_mac, mac, ETH_ALEN);
1070 return 0;
1071 } else {
1072 /*
1073 * For sriov vf's set the mac in hw
1074 */
1075 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
1076 vnic_dev_set_mac_addr, mac);
1077 return enic_dev_status_to_errno(err);
1078 }
0b1c00fc
RP		 1079 } else
1080 return -EINVAL;
1081}
1082
f8bd9091
SF		 1083static int enic_set_vf_port(struct net_device *netdev, int vf,
1084 struct nlattr *port[])
1085{
1086 struct enic *enic = netdev_priv(netdev);
b3abfbd2 1087 struct enic_port_profile prev_pp;
3f192795 1088 struct enic_port_profile *pp;
b3abfbd2 1089 int err = 0, restore_pp = 1;
08f382eb 1090
3f192795
RP		 1091 ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1092 if (err)
1093 return err;
08f382eb 1094
b3abfbd2
RP		 1095 if (!port[IFLA_PORT_REQUEST])
1096 return -EOPNOTSUPP;
1097
3f192795
RP		 1098 memcpy(&prev_pp, pp, sizeof(*enic->pp));
1099 memset(pp, 0, sizeof(*enic->pp));
b3abfbd2 1100
3f192795
RP		 1101 pp->set |= ENIC_SET_REQUEST;
1102 pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]);
08f382eb
SF		 1103
1104 if (port[IFLA_PORT_PROFILE]) {
3f192795
RP		 1105 pp->set |= ENIC_SET_NAME;
1106 memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]),
08f382eb
SF		 1107 PORT_PROFILE_MAX);
1108 }
1109
1110 if (port[IFLA_PORT_INSTANCE_UUID]) {
3f192795
RP		 1111 pp->set |= ENIC_SET_INSTANCE;
1112 memcpy(pp->instance_uuid,
08f382eb
SF		 1113 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1114 }
1115
1116 if (port[IFLA_PORT_HOST_UUID]) {
3f192795
RP		 1117 pp->set |= ENIC_SET_HOST;
1118 memcpy(pp->host_uuid,
08f382eb
SF		 1119 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1120 }
f8bd9091 1121
b4765833
RP		 1122 if (vf == PORT_SELF_VF) {
1123 /* Special case handling: mac came from IFLA_VF_MAC */
1124 if (!is_zero_ether_addr(prev_pp.vf_mac))
1125 memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN);
418c437d 1126
b4765833
RP		 1127 if (is_zero_ether_addr(netdev->dev_addr))
1128 eth_hw_addr_random(netdev);
1129 } else {
1130 /* SR-IOV VF: get mac from adapter */
1131 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
1132 vnic_dev_get_mac_addr, pp->mac_addr);
1133 if (err) {
1134 netdev_err(netdev, "Error getting mac for vf %d\n", vf);
1135 memcpy(pp, &prev_pp, sizeof(*pp));
1136 return enic_dev_status_to_errno(err);
1137 }
1138 }
f8bd9091 1139
3f192795 1140 err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp);
b3abfbd2
RP		 1141 if (err) {
1142 if (restore_pp) {
1143 /* Things are still the way they were: Implicit
1144 * DISASSOCIATE failed
1145 */
3f192795 1146 memcpy(pp, &prev_pp, sizeof(*pp));
b3abfbd2 1147 } else {
3f192795
RP		 1148 memset(pp, 0, sizeof(*pp));
1149 if (vf == PORT_SELF_VF)
1150 memset(netdev->dev_addr, 0, ETH_ALEN);
b3abfbd2
RP		 1151 }
1152 } else {
1153 /* Set flag to indicate that the port assoc/disassoc
1154 * request has been sent out to fw
1155 */
3f192795 1156 pp->set |= ENIC_PORT_REQUEST_APPLIED;
b3abfbd2
RP		 1157
1158 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
3f192795
RP		 1159 if (pp->request == PORT_REQUEST_DISASSOCIATE) {
1160 memset(pp->mac_addr, 0, ETH_ALEN);
1161 if (vf == PORT_SELF_VF)
1162 memset(netdev->dev_addr, 0, ETH_ALEN);
b3abfbd2
RP		 1163 }
1164 }
29639059 1165
b4765833
RP		 1166 if (vf == PORT_SELF_VF)
1167 memset(pp->vf_mac, 0, ETH_ALEN);
29639059 1168
29639059 1169 return err;
f8bd9091
SF		 1170}
1171
1172static int enic_get_vf_port(struct net_device *netdev, int vf,
1173 struct sk_buff *skb)
1174{
1175 struct enic *enic = netdev_priv(netdev);
f8bd9091 1176 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
3f192795 1177 struct enic_port_profile *pp;
b3abfbd2 1178 int err;
f8bd9091 1179
3f192795
RP		 1180 ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1181 if (err)
1182 return err;
1183
1184 if (!(pp->set & ENIC_PORT_REQUEST_APPLIED))
08f382eb 1185 return -ENODATA;
f8bd9091 1186
3f192795 1187 err = enic_process_get_pp_request(enic, vf, pp->request, &response);
f8bd9091 1188 if (err)
b3abfbd2 1189 return err;
f8bd9091 1190
1a106de6
DM		 1191 if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) ||
1192 nla_put_u16(skb, IFLA_PORT_RESPONSE, response) ||
1193 ((pp->set & ENIC_SET_NAME) &&
1194 nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) ||
1195 ((pp->set & ENIC_SET_INSTANCE) &&
1196 nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1197 pp->instance_uuid)) ||
1198 ((pp->set & ENIC_SET_HOST) &&
1199 nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid)))
1200 goto nla_put_failure;
f8bd9091
SF		 1201 return 0;
1202
1203nla_put_failure:
1204 return -EMSGSIZE;
1205}
1206
01f2e4ea
SF		 1207static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1208{
1209 struct enic *enic = vnic_dev_priv(rq->vdev);
1210
1211 if (!buf->os_buf)
1212 return;
1213
1214 pci_unmap_single(enic->pdev, buf->dma_addr,
1215 buf->len, PCI_DMA_FROMDEVICE);
1216 dev_kfree_skb_any(buf->os_buf);
1217}
1218
01f2e4ea
SF		 1219static int enic_rq_alloc_buf(struct vnic_rq *rq)
1220{
1221 struct enic *enic = vnic_dev_priv(rq->vdev);
d19e22dc 1222 struct net_device *netdev = enic->netdev;
01f2e4ea 1223 struct sk_buff *skb;
1825aca6 1224 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
01f2e4ea
SF		 1225 unsigned int os_buf_index = 0;
1226 dma_addr_t dma_addr;
1227
89d71a66 1228 skb = netdev_alloc_skb_ip_align(netdev, len);
01f2e4ea
SF		 1229 if (!skb)
1230 return -ENOMEM;
1231
1232 dma_addr = pci_map_single(enic->pdev, skb->data,
1233 len, PCI_DMA_FROMDEVICE);
1234
1235 enic_queue_rq_desc(rq, skb, os_buf_index,
1236 dma_addr, len);
1237
1238 return 0;
1239}
1240
01f2e4ea
SF		 1241static void enic_rq_indicate_buf(struct vnic_rq *rq,
1242 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1243 int skipped, void *opaque)
1244{
1245 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 1246 struct net_device *netdev = enic->netdev;
01f2e4ea
SF		 1247 struct sk_buff *skb;
1248
1249 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1250 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1251 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1252 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1253 u8 packet_error;
f8cac14a 1254 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
01f2e4ea
SF		 1255 u32 rss_hash;
1256
1257 if (skipped)
1258 return;
1259
1260 skb = buf->os_buf;
1261 prefetch(skb->data - NET_IP_ALIGN);
1262 pci_unmap_single(enic->pdev, buf->dma_addr,
1263 buf->len, PCI_DMA_FROMDEVICE);
1264
1265 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1266 &type, &color, &q_number, &completed_index,
1267 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1268 &csum_not_calc, &rss_hash, &bytes_written,
f8cac14a 1269 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
01f2e4ea
SF		 1270 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1271 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1272 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1273 &fcs_ok);
1274
1275 if (packet_error) {
1276
350991e1
SF		 1277 if (!fcs_ok) {
1278 if (bytes_written > 0)
1279 enic->rq_bad_fcs++;
1280 else if (bytes_written == 0)
1281 enic->rq_truncated_pkts++;
1282 }
01f2e4ea
SF		 1283
1284 dev_kfree_skb_any(skb);
1285
1286 return;
1287 }
1288
1289 if (eop && bytes_written > 0) {
1290
1291 /* Good receive
1292 */
1293
1294 skb_put(skb, bytes_written);
86ca9db7 1295 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea 1296
5ec8f9b8 1297 if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) {
01f2e4ea
SF		 1298 skb->csum = htons(checksum);
1299 skb->ip_summed = CHECKSUM_COMPLETE;
1300 }
1301
6ede746b
JP		 1302 if (vlan_stripped)
1303 __vlan_hwaccel_put_tag(skb, vlan_tci);
01f2e4ea 1304
6ede746b
JP		 1305 if (netdev->features & NETIF_F_GRO)
1306 napi_gro_receive(&enic->napi[q_number], skb);
1307 else
1308 netif_receive_skb(skb);
01f2e4ea
SF		 1309 } else {
1310
1311 /* Buffer overflow
1312 */
1313
1314 dev_kfree_skb_any(skb);
1315 }
1316}
1317
1318static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1319 u8 type, u16 q_number, u16 completed_index, void *opaque)
1320{
1321 struct enic *enic = vnic_dev_priv(vdev);
1322
1323 vnic_rq_service(&enic->rq[q_number], cq_desc,
1324 completed_index, VNIC_RQ_RETURN_DESC,
1325 enic_rq_indicate_buf, opaque);
1326
1327 return 0;
1328}
1329
01f2e4ea
SF		 1330static int enic_poll(struct napi_struct *napi, int budget)
1331{
717258ba
VK		 1332 struct net_device *netdev = napi->dev;
1333 struct enic *enic = netdev_priv(netdev);
1334 unsigned int cq_rq = enic_cq_rq(enic, 0);
1335 unsigned int cq_wq = enic_cq_wq(enic, 0);
1336 unsigned int intr = enic_legacy_io_intr();
01f2e4ea
SF		 1337 unsigned int rq_work_to_do = budget;
1338 unsigned int wq_work_to_do = -1; /* no limit */
1339 unsigned int work_done, rq_work_done, wq_work_done;
2d6ddced 1340 int err;
01f2e4ea
SF		 1341
1342 /* Service RQ (first) and WQ
1343 */
1344
717258ba 1345 rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
01f2e4ea
SF		 1346 rq_work_to_do, enic_rq_service, NULL);
1347
717258ba 1348 wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
01f2e4ea
SF		 1349 wq_work_to_do, enic_wq_service, NULL);
1350
1351 /* Accumulate intr event credits for this polling
1352 * cycle. An intr event is the completion of a
1353 * a WQ or RQ packet.
1354 */
1355
1356 work_done = rq_work_done + wq_work_done;
1357
1358 if (work_done > 0)
717258ba 1359 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1360 work_done,
1361 0 /* don't unmask intr */,
1362 0 /* don't reset intr timer */);
1363
0eb26022 1364 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
01f2e4ea 1365
2d6ddced
SF		 1366 /* Buffer allocation failed. Stay in polling
1367 * mode so we can try to fill the ring again.
1368 */
01f2e4ea 1369
2d6ddced
SF		 1370 if (err)
1371 rq_work_done = rq_work_to_do;
01f2e4ea 1372
2d6ddced 1373 if (rq_work_done < rq_work_to_do) {
01f2e4ea 1374
2d6ddced 1375 /* Some work done, but not enough to stay in polling,
88132f55 1376 * exit polling
01f2e4ea
SF		 1377 */
1378
288379f0 1379 napi_complete(napi);
717258ba 1380 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1381 }
1382
1383 return rq_work_done;
1384}
1385
1386static int enic_poll_msix(struct napi_struct *napi, int budget)
1387{
717258ba
VK		 1388 struct net_device *netdev = napi->dev;
1389 struct enic *enic = netdev_priv(netdev);
1390 unsigned int rq = (napi - &enic->napi[0]);
1391 unsigned int cq = enic_cq_rq(enic, rq);
1392 unsigned int intr = enic_msix_rq_intr(enic, rq);
01f2e4ea
SF		 1393 unsigned int work_to_do = budget;
1394 unsigned int work_done;
2d6ddced 1395 int err;
01f2e4ea
SF		 1396
1397 /* Service RQ
1398 */
1399
717258ba 1400 work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 1401 work_to_do, enic_rq_service, NULL);
1402
2d6ddced
SF		 1403 /* Return intr event credits for this polling
1404 * cycle. An intr event is the completion of a
1405 * RQ packet.
1406 */
01f2e4ea 1407
2d6ddced 1408 if (work_done > 0)
717258ba 1409 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1410 work_done,
1411 0 /* don't unmask intr */,
1412 0 /* don't reset intr timer */);
01f2e4ea 1413
0eb26022 1414 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
2d6ddced
SF		 1415
1416 /* Buffer allocation failed. Stay in polling mode
1417 * so we can try to fill the ring again.
1418 */
1419
1420 if (err)
1421 work_done = work_to_do;
1422
1423 if (work_done < work_to_do) {
1424
1425 /* Some work done, but not enough to stay in polling,
88132f55 1426 * exit polling
01f2e4ea
SF		 1427 */
1428
288379f0 1429 napi_complete(napi);
717258ba 1430 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1431 }
1432
1433 return work_done;
1434}
1435
1436static void enic_notify_timer(unsigned long data)
1437{
1438 struct enic *enic = (struct enic *)data;
1439
1440 enic_notify_check(enic);
1441
25f0a061
SF		 1442 mod_timer(&enic->notify_timer,
1443 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF		 1444}
1445
1446static void enic_free_intr(struct enic *enic)
1447{
1448 struct net_device *netdev = enic->netdev;
1449 unsigned int i;
1450
1451 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1452 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF		 1453 free_irq(enic->pdev->irq, netdev);
1454 break;
8f4d248c
SF		 1455 case VNIC_DEV_INTR_MODE_MSI:
1456 free_irq(enic->pdev->irq, enic);
1457 break;
01f2e4ea
SF		 1458 case VNIC_DEV_INTR_MODE_MSIX:
1459 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1460 if (enic->msix[i].requested)
1461 free_irq(enic->msix_entry[i].vector,
1462 enic->msix[i].devid);
1463 break;
1464 default:
1465 break;
1466 }
1467}
1468
1469static int enic_request_intr(struct enic *enic)
1470{
1471 struct net_device *netdev = enic->netdev;
717258ba 1472 unsigned int i, intr;
01f2e4ea
SF		 1473 int err = 0;
1474
1475 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1476
1477 case VNIC_DEV_INTR_MODE_INTX:
1478
1479 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1480 IRQF_SHARED, netdev->name, netdev);
1481 break;
1482
1483 case VNIC_DEV_INTR_MODE_MSI:
1484
1485 err = request_irq(enic->pdev->irq, enic_isr_msi,
1486 0, netdev->name, enic);
1487 break;
1488
1489 case VNIC_DEV_INTR_MODE_MSIX:
1490
717258ba
VK		 1491 for (i = 0; i < enic->rq_count; i++) {
1492 intr = enic_msix_rq_intr(enic, i);
1493 sprintf(enic->msix[intr].devname,
1494 "%.11s-rx-%d", netdev->name, i);
1495 enic->msix[intr].isr = enic_isr_msix_rq;
1496 enic->msix[intr].devid = &enic->napi[i];
1497 }
01f2e4ea 1498
717258ba
VK		 1499 for (i = 0; i < enic->wq_count; i++) {
1500 intr = enic_msix_wq_intr(enic, i);
1501 sprintf(enic->msix[intr].devname,
1502 "%.11s-tx-%d", netdev->name, i);
1503 enic->msix[intr].isr = enic_isr_msix_wq;
1504 enic->msix[intr].devid = enic;
1505 }
01f2e4ea 1506
717258ba
VK		 1507 intr = enic_msix_err_intr(enic);
1508 sprintf(enic->msix[intr].devname,
01f2e4ea 1509 "%.11s-err", netdev->name);
717258ba
VK		 1510 enic->msix[intr].isr = enic_isr_msix_err;
1511 enic->msix[intr].devid = enic;
01f2e4ea 1512
717258ba
VK		 1513 intr = enic_msix_notify_intr(enic);
1514 sprintf(enic->msix[intr].devname,
01f2e4ea 1515 "%.11s-notify", netdev->name);
717258ba
VK		 1516 enic->msix[intr].isr = enic_isr_msix_notify;
1517 enic->msix[intr].devid = enic;
1518
1519 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1520 enic->msix[i].requested = 0;
01f2e4ea 1521
717258ba 1522 for (i = 0; i < enic->intr_count; i++) {
01f2e4ea
SF		 1523 err = request_irq(enic->msix_entry[i].vector,
1524 enic->msix[i].isr, 0,
1525 enic->msix[i].devname,
1526 enic->msix[i].devid);
1527 if (err) {
1528 enic_free_intr(enic);
1529 break;
1530 }
1531 enic->msix[i].requested = 1;
1532 }
1533
1534 break;
1535
1536 default:
1537 break;
1538 }
1539
1540 return err;
1541}
1542
b3d18d19
SF		 1543static void enic_synchronize_irqs(struct enic *enic)
1544{
1545 unsigned int i;
1546
1547 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1548 case VNIC_DEV_INTR_MODE_INTX:
1549 case VNIC_DEV_INTR_MODE_MSI:
1550 synchronize_irq(enic->pdev->irq);
1551 break;
1552 case VNIC_DEV_INTR_MODE_MSIX:
1553 for (i = 0; i < enic->intr_count; i++)
1554 synchronize_irq(enic->msix_entry[i].vector);
1555 break;
1556 default:
1557 break;
1558 }
1559}
1560
383ab92f 1561static int enic_dev_notify_set(struct enic *enic)
01f2e4ea
SF		 1562{
1563 int err;
1564
56ac88b3 1565 spin_lock(&enic->devcmd_lock);
01f2e4ea
SF		 1566 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1567 case VNIC_DEV_INTR_MODE_INTX:
717258ba
VK		 1568 err = vnic_dev_notify_set(enic->vdev,
1569 enic_legacy_notify_intr());
01f2e4ea
SF		 1570 break;
1571 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1572 err = vnic_dev_notify_set(enic->vdev,
1573 enic_msix_notify_intr(enic));
01f2e4ea
SF		 1574 break;
1575 default:
1576 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1577 break;
1578 }
56ac88b3 1579 spin_unlock(&enic->devcmd_lock);
01f2e4ea
SF		 1580
1581 return err;
1582}
1583
1584static void enic_notify_timer_start(struct enic *enic)
1585{
1586 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1587 case VNIC_DEV_INTR_MODE_MSI:
1588 mod_timer(&enic->notify_timer, jiffies);
1589 break;
1590 default:
1591 /* Using intr for notification for INTx/MSI-X */
1592 break;
6403eab1 1593 }
01f2e4ea
SF		 1594}
1595
1596/* rtnl lock is held, process context */
1597static int enic_open(struct net_device *netdev)
1598{
1599 struct enic *enic = netdev_priv(netdev);
1600 unsigned int i;
1601 int err;
1602
4b75a442
SF		 1603 err = enic_request_intr(enic);
1604 if (err) {
a7a79deb 1605 netdev_err(netdev, "Unable to request irq.\n");
4b75a442
SF		 1606 return err;
1607 }
1608
383ab92f 1609 err = enic_dev_notify_set(enic);
4b75a442 1610 if (err) {
a7a79deb
VK		 1611 netdev_err(netdev,
1612 "Failed to alloc notify buffer, aborting.\n");
4b75a442
SF		 1613 goto err_out_free_intr;
1614 }
1615
01f2e4ea 1616 for (i = 0; i < enic->rq_count; i++) {
0eb26022 1617 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
2d6ddced
SF		 1618 /* Need at least one buffer on ring to get going */
1619 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
a7a79deb 1620 netdev_err(netdev, "Unable to alloc receive buffers\n");
2d6ddced 1621 err = -ENOMEM;
4b75a442 1622 goto err_out_notify_unset;
01f2e4ea
SF		 1623 }
1624 }
1625
1626 for (i = 0; i < enic->wq_count; i++)
1627 vnic_wq_enable(&enic->wq[i]);
1628 for (i = 0; i < enic->rq_count; i++)
1629 vnic_rq_enable(&enic->rq[i]);
1630
7335903c 1631 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
29639059 1632 enic_dev_add_station_addr(enic);
3f192795 1633
319d7e84 1634 enic_set_rx_mode(netdev);
01f2e4ea
SF		 1635
1636 netif_wake_queue(netdev);
717258ba
VK		 1637
1638 for (i = 0; i < enic->rq_count; i++)
1639 napi_enable(&enic->napi[i]);
1640
383ab92f 1641 enic_dev_enable(enic);
01f2e4ea
SF		 1642
1643 for (i = 0; i < enic->intr_count; i++)
1644 vnic_intr_unmask(&enic->intr[i]);
1645
1646 enic_notify_timer_start(enic);
1647
1648 return 0;
4b75a442
SF		 1649
1650err_out_notify_unset:
383ab92f 1651 enic_dev_notify_unset(enic);
4b75a442
SF		 1652err_out_free_intr:
1653 enic_free_intr(enic);
1654
1655 return err;
01f2e4ea
SF		 1656}
1657
1658/* rtnl lock is held, process context */
1659static int enic_stop(struct net_device *netdev)
1660{
1661 struct enic *enic = netdev_priv(netdev);
1662 unsigned int i;
1663 int err;
1664
29046f9b 1665 for (i = 0; i < enic->intr_count; i++) {
b3d18d19 1666 vnic_intr_mask(&enic->intr[i]);
29046f9b
VK		 1667 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1668 }
b3d18d19
SF		 1669
1670 enic_synchronize_irqs(enic);
1671
01f2e4ea
SF		 1672 del_timer_sync(&enic->notify_timer);
1673
383ab92f 1674 enic_dev_disable(enic);
717258ba
VK		 1675
1676 for (i = 0; i < enic->rq_count; i++)
1677 napi_disable(&enic->napi[i]);
1678
b3d18d19
SF		 1679 netif_carrier_off(netdev);
1680 netif_tx_disable(netdev);
3f192795 1681
7335903c 1682 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
29639059 1683 enic_dev_del_station_addr(enic);
f8bd9091 1684
01f2e4ea
SF		 1685 for (i = 0; i < enic->wq_count; i++) {
1686 err = vnic_wq_disable(&enic->wq[i]);
1687 if (err)
1688 return err;
1689 }
1690 for (i = 0; i < enic->rq_count; i++) {
1691 err = vnic_rq_disable(&enic->rq[i]);
1692 if (err)
1693 return err;
1694 }
1695
383ab92f 1696 enic_dev_notify_unset(enic);
4b75a442
SF		 1697 enic_free_intr(enic);
1698
01f2e4ea
SF		 1699 for (i = 0; i < enic->wq_count; i++)
1700 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1701 for (i = 0; i < enic->rq_count; i++)
1702 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1703 for (i = 0; i < enic->cq_count; i++)
1704 vnic_cq_clean(&enic->cq[i]);
1705 for (i = 0; i < enic->intr_count; i++)
1706 vnic_intr_clean(&enic->intr[i]);
1707
1708 return 0;
1709}
1710
1711static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1712{
1713 struct enic *enic = netdev_priv(netdev);
1714 int running = netif_running(netdev);
1715
25f0a061
SF		 1716 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1717 return -EINVAL;
1718
7335903c 1719 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
c97c894d
RP		 1720 return -EOPNOTSUPP;
1721
01f2e4ea
SF		 1722 if (running)
1723 enic_stop(netdev);
1724
01f2e4ea
SF		 1725 netdev->mtu = new_mtu;
1726
1727 if (netdev->mtu > enic->port_mtu)
a7a79deb
VK		 1728 netdev_warn(netdev,
1729 "interface MTU (%d) set higher than port MTU (%d)\n",
1730 netdev->mtu, enic->port_mtu);
01f2e4ea
SF		 1731
1732 if (running)
1733 enic_open(netdev);
1734
1735 return 0;
1736}
1737
c97c894d
RP		 1738static void enic_change_mtu_work(struct work_struct *work)
1739{
1740 struct enic *enic = container_of(work, struct enic, change_mtu_work);
1741 struct net_device *netdev = enic->netdev;
1742 int new_mtu = vnic_dev_mtu(enic->vdev);
1743 int err;
1744 unsigned int i;
1745
1746 new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
1747
1748 rtnl_lock();
1749
1750 /* Stop RQ */
1751 del_timer_sync(&enic->notify_timer);
1752
1753 for (i = 0; i < enic->rq_count; i++)
1754 napi_disable(&enic->napi[i]);
1755
1756 vnic_intr_mask(&enic->intr[0]);
1757 enic_synchronize_irqs(enic);
1758 err = vnic_rq_disable(&enic->rq[0]);
1759 if (err) {
1760 netdev_err(netdev, "Unable to disable RQ.\n");
1761 return;
1762 }
1763 vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
1764 vnic_cq_clean(&enic->cq[0]);
1765 vnic_intr_clean(&enic->intr[0]);
1766
1767 /* Fill RQ with new_mtu-sized buffers */
1768 netdev->mtu = new_mtu;
1769 vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
1770 /* Need at least one buffer on ring to get going */
1771 if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
1772 netdev_err(netdev, "Unable to alloc receive buffers.\n");
1773 return;
1774 }
1775
1776 /* Start RQ */
1777 vnic_rq_enable(&enic->rq[0]);
1778 napi_enable(&enic->napi[0]);
1779 vnic_intr_unmask(&enic->intr[0]);
1780 enic_notify_timer_start(enic);
1781
1782 rtnl_unlock();
1783
1784 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
1785}
1786
01f2e4ea
SF		 1787#ifdef CONFIG_NET_POLL_CONTROLLER
1788static void enic_poll_controller(struct net_device *netdev)
1789{
1790 struct enic *enic = netdev_priv(netdev);
1791 struct vnic_dev *vdev = enic->vdev;
717258ba 1792 unsigned int i, intr;
01f2e4ea
SF		 1793
1794 switch (vnic_dev_get_intr_mode(vdev)) {
1795 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1796 for (i = 0; i < enic->rq_count; i++) {
1797 intr = enic_msix_rq_intr(enic, i);
79aeec58
VK		 1798 enic_isr_msix_rq(enic->msix_entry[intr].vector,
1799 &enic->napi[i]);
717258ba 1800 }
b880a954
VK		 1801
1802 for (i = 0; i < enic->wq_count; i++) {
1803 intr = enic_msix_wq_intr(enic, i);
1804 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
1805 }
1806
01f2e4ea
SF		 1807 break;
1808 case VNIC_DEV_INTR_MODE_MSI:
1809 enic_isr_msi(enic->pdev->irq, enic);
1810 break;
1811 case VNIC_DEV_INTR_MODE_INTX:
1812 enic_isr_legacy(enic->pdev->irq, netdev);
1813 break;
1814 default:
1815 break;
1816 }
1817}
1818#endif
1819
1820static int enic_dev_wait(struct vnic_dev *vdev,
1821 int (*start)(struct vnic_dev *, int),
1822 int (*finished)(struct vnic_dev *, int *),
1823 int arg)
1824{
1825 unsigned long time;
1826 int done;
1827 int err;
1828
1829 BUG_ON(in_interrupt());
1830
1831 err = start(vdev, arg);
1832 if (err)
1833 return err;
1834
1835 /* Wait for func to complete...2 seconds max
1836 */
1837
1838 time = jiffies + (HZ * 2);
1839 do {
1840
1841 err = finished(vdev, &done);
1842 if (err)
1843 return err;
1844
1845 if (done)
1846 return 0;
1847
1848 schedule_timeout_uninterruptible(HZ / 10);
1849
1850 } while (time_after(time, jiffies));
1851
1852 return -ETIMEDOUT;
1853}
1854
1855static int enic_dev_open(struct enic *enic)
1856{
1857 int err;
1858
1859 err = enic_dev_wait(enic->vdev, vnic_dev_open,
1860 vnic_dev_open_done, 0);
1861 if (err)
a7a79deb
VK		 1862 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
1863 err);
01f2e4ea
SF		 1864
1865 return err;
1866}
1867
99ef5639 1868static int enic_dev_hang_reset(struct enic *enic)
01f2e4ea
SF		 1869{
1870 int err;
1871
99ef5639
VK		 1872 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
1873 vnic_dev_hang_reset_done, 0);
01f2e4ea 1874 if (err)
a7a79deb
VK		 1875 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
1876 err);
01f2e4ea
SF		 1877
1878 return err;
1879}
1880
717258ba
VK		 1881static int enic_set_rsskey(struct enic *enic)
1882{
1f4f067f 1883 dma_addr_t rss_key_buf_pa;
717258ba
VK		 1884 union vnic_rss_key *rss_key_buf_va = NULL;
1885 union vnic_rss_key rss_key = {
1886 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
1887 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
1888 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
1889 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
1890 };
1891 int err;
1892
1893 rss_key_buf_va = pci_alloc_consistent(enic->pdev,
1894 sizeof(union vnic_rss_key), &rss_key_buf_pa);
1895 if (!rss_key_buf_va)
1896 return -ENOMEM;
1897
1898 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
1899
1900 spin_lock(&enic->devcmd_lock);
1901 err = enic_set_rss_key(enic,
1902 rss_key_buf_pa,
1903 sizeof(union vnic_rss_key));
1904 spin_unlock(&enic->devcmd_lock);
1905
1906 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
1907 rss_key_buf_va, rss_key_buf_pa);
1908
1909 return err;
1910}
1911
1912static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
1913{
1f4f067f 1914 dma_addr_t rss_cpu_buf_pa;
717258ba
VK		 1915 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
1916 unsigned int i;
1917 int err;
1918
1919 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
1920 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
1921 if (!rss_cpu_buf_va)
1922 return -ENOMEM;
1923
1924 for (i = 0; i < (1 << rss_hash_bits); i++)
1925 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
1926
1927 spin_lock(&enic->devcmd_lock);
1928 err = enic_set_rss_cpu(enic,
1929 rss_cpu_buf_pa,
1930 sizeof(union vnic_rss_cpu));
1931 spin_unlock(&enic->devcmd_lock);
1932
1933 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
1934 rss_cpu_buf_va, rss_cpu_buf_pa);
1935
1936 return err;
1937}
1938
1939static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
1940 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
68f71708 1941{
68f71708
SF		 1942 const u8 tso_ipid_split_en = 0;
1943 const u8 ig_vlan_strip_en = 1;
383ab92f 1944 int err;
68f71708 1945
717258ba
VK		 1946 /* Enable VLAN tag stripping.
1947 */
68f71708 1948
383ab92f
VK		 1949 spin_lock(&enic->devcmd_lock);
1950 err = enic_set_nic_cfg(enic,
68f71708
SF		 1951 rss_default_cpu, rss_hash_type,
1952 rss_hash_bits, rss_base_cpu,
1953 rss_enable, tso_ipid_split_en,
1954 ig_vlan_strip_en);
383ab92f
VK		 1955 spin_unlock(&enic->devcmd_lock);
1956
1957 return err;
1958}
1959
717258ba
VK		 1960static int enic_set_rss_nic_cfg(struct enic *enic)
1961{
1962 struct device *dev = enic_get_dev(enic);
1963 const u8 rss_default_cpu = 0;
1964 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1965 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1966 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1967 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1968 const u8 rss_hash_bits = 7;
1969 const u8 rss_base_cpu = 0;
1970 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1971
1972 if (rss_enable) {
1973 if (!enic_set_rsskey(enic)) {
1974 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1975 rss_enable = 0;
1976 dev_warn(dev, "RSS disabled, "
1977 "Failed to set RSS cpu indirection table.");
1978 }
1979 } else {
1980 rss_enable = 0;
1981 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
1982 }
1983 }
1984
1985 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1986 rss_hash_bits, rss_base_cpu, rss_enable);
f8cac14a
VK		 1987}
1988
01f2e4ea
SF		 1989static void enic_reset(struct work_struct *work)
1990{
1991 struct enic *enic = container_of(work, struct enic, reset);
1992
1993 if (!netif_running(enic->netdev))
1994 return;
1995
1996 rtnl_lock();
1997
383ab92f 1998 enic_dev_hang_notify(enic);
01f2e4ea 1999 enic_stop(enic->netdev);
99ef5639 2000 enic_dev_hang_reset(enic);
e0afe53f 2001 enic_reset_addr_lists(enic);
01f2e4ea 2002 enic_init_vnic_resources(enic);
717258ba 2003 enic_set_rss_nic_cfg(enic);
f8cac14a 2004 enic_dev_set_ig_vlan_rewrite_mode(enic);
01f2e4ea
SF		 2005 enic_open(enic->netdev);
2006
2007 rtnl_unlock();
2008}
2009
2010static int enic_set_intr_mode(struct enic *enic)
2011{
717258ba 2012 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
1cbb1a61 2013 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
01f2e4ea
SF		 2014 unsigned int i;
2015
2016 /* Set interrupt mode (INTx, MSI, MSI-X) depending
717258ba 2017 * on system capabilities.
01f2e4ea
SF		 2018 *
2019 * Try MSI-X first
2020 *
2021 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
2022 * (the second to last INTR is used for WQ/RQ errors)
2023 * (the last INTR is used for notifications)
2024 */
2025
2026 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
2027 for (i = 0; i < n + m + 2; i++)
2028 enic->msix_entry[i].entry = i;
2029
717258ba
VK		 2030 /* Use multiple RQs if RSS is enabled
2031 */
2032
2033 if (ENIC_SETTING(enic, RSS) &&
2034 enic->config.intr_mode < 1 &&
01f2e4ea
SF		 2035 enic->rq_count >= n &&
2036 enic->wq_count >= m &&
2037 enic->cq_count >= n + m &&
717258ba 2038 enic->intr_count >= n + m + 2) {
01f2e4ea 2039
717258ba 2040 if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
01f2e4ea 2041
717258ba
VK		 2042 enic->rq_count = n;
2043 enic->wq_count = m;
2044 enic->cq_count = n + m;
2045 enic->intr_count = n + m + 2;
01f2e4ea 2046
717258ba
VK		 2047 vnic_dev_set_intr_mode(enic->vdev,
2048 VNIC_DEV_INTR_MODE_MSIX);
2049
2050 return 0;
2051 }
2052 }
2053
2054 if (enic->config.intr_mode < 1 &&
2055 enic->rq_count >= 1 &&
2056 enic->wq_count >= m &&
2057 enic->cq_count >= 1 + m &&
2058 enic->intr_count >= 1 + m + 2) {
2059 if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
2060
2061 enic->rq_count = 1;
2062 enic->wq_count = m;
2063 enic->cq_count = 1 + m;
2064 enic->intr_count = 1 + m + 2;
2065
2066 vnic_dev_set_intr_mode(enic->vdev,
2067 VNIC_DEV_INTR_MODE_MSIX);
2068
2069 return 0;
2070 }
01f2e4ea
SF		 2071 }
2072
2073 /* Next try MSI
2074 *
2075 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2076 */
2077
2078 if (enic->config.intr_mode < 2 &&
2079 enic->rq_count >= 1 &&
2080 enic->wq_count >= 1 &&
2081 enic->cq_count >= 2 &&
2082 enic->intr_count >= 1 &&
2083 !pci_enable_msi(enic->pdev)) {
2084
2085 enic->rq_count = 1;
2086 enic->wq_count = 1;
2087 enic->cq_count = 2;
2088 enic->intr_count = 1;
2089
2090 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2091
2092 return 0;
2093 }
2094
2095 /* Next try INTx
2096 *
2097 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2098 * (the first INTR is used for WQ/RQ)
2099 * (the second INTR is used for WQ/RQ errors)
2100 * (the last INTR is used for notifications)
2101 */
2102
2103 if (enic->config.intr_mode < 3 &&
2104 enic->rq_count >= 1 &&
2105 enic->wq_count >= 1 &&
2106 enic->cq_count >= 2 &&
2107 enic->intr_count >= 3) {
2108
2109 enic->rq_count = 1;
2110 enic->wq_count = 1;
2111 enic->cq_count = 2;
2112 enic->intr_count = 3;
2113
2114 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2115
2116 return 0;
2117 }
2118
2119 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2120
2121 return -EINVAL;
2122}
2123
2124static void enic_clear_intr_mode(struct enic *enic)
2125{
2126 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2127 case VNIC_DEV_INTR_MODE_MSIX:
2128 pci_disable_msix(enic->pdev);
2129 break;
2130 case VNIC_DEV_INTR_MODE_MSI:
2131 pci_disable_msi(enic->pdev);
2132 break;
2133 default:
2134 break;
2135 }
2136
2137 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2138}
2139
f8bd9091
SF		 2140static const struct net_device_ops enic_netdev_dynamic_ops = {
2141 .ndo_open = enic_open,
2142 .ndo_stop = enic_stop,
2143 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2144 .ndo_get_stats64 = enic_get_stats,
f8bd9091 2145 .ndo_validate_addr = eth_validate_addr,
319d7e84 2146 .ndo_set_rx_mode = enic_set_rx_mode,
f8bd9091
SF		 2147 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2148 .ndo_change_mtu = enic_change_mtu,
f8bd9091
SF		 2149 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2150 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2151 .ndo_tx_timeout = enic_tx_timeout,
2152 .ndo_set_vf_port = enic_set_vf_port,
2153 .ndo_get_vf_port = enic_get_vf_port,
0b1c00fc 2154 .ndo_set_vf_mac = enic_set_vf_mac,
f8bd9091
SF		 2155#ifdef CONFIG_NET_POLL_CONTROLLER
2156 .ndo_poll_controller = enic_poll_controller,
2157#endif
2158};
2159
afe29f7a
SH		 2160static const struct net_device_ops enic_netdev_ops = {
2161 .ndo_open = enic_open,
2162 .ndo_stop = enic_stop,
00829823 2163 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2164 .ndo_get_stats64 = enic_get_stats,
afe29f7a 2165 .ndo_validate_addr = eth_validate_addr,
f8bd9091 2166 .ndo_set_mac_address = enic_set_mac_address,
319d7e84 2167 .ndo_set_rx_mode = enic_set_rx_mode,
afe29f7a 2168 .ndo_change_mtu = enic_change_mtu,
afe29f7a
SH		 2169 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2170 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2171 .ndo_tx_timeout = enic_tx_timeout,
3f192795
RP		 2172 .ndo_set_vf_port = enic_set_vf_port,
2173 .ndo_get_vf_port = enic_get_vf_port,
2174 .ndo_set_vf_mac = enic_set_vf_mac,
afe29f7a
SH		 2175#ifdef CONFIG_NET_POLL_CONTROLLER
2176 .ndo_poll_controller = enic_poll_controller,
2177#endif
2178};
2179
2fdba388 2180static void enic_dev_deinit(struct enic *enic)
6fdfa970 2181{
717258ba
VK		 2182 unsigned int i;
2183
2184 for (i = 0; i < enic->rq_count; i++)
2185 netif_napi_del(&enic->napi[i]);
2186
6fdfa970
SF		 2187 enic_free_vnic_resources(enic);
2188 enic_clear_intr_mode(enic);
2189}
2190
2fdba388 2191static int enic_dev_init(struct enic *enic)
6fdfa970 2192{
a7a79deb 2193 struct device *dev = enic_get_dev(enic);
6fdfa970 2194 struct net_device *netdev = enic->netdev;
717258ba 2195 unsigned int i;
6fdfa970
SF		 2196 int err;
2197
ea7ea65a
VK		 2198 /* Get interrupt coalesce timer info */
2199 err = enic_dev_intr_coal_timer_info(enic);
2200 if (err) {
2201 dev_warn(dev, "Using default conversion factor for "
2202 "interrupt coalesce timer\n");
2203 vnic_dev_intr_coal_timer_info_default(enic->vdev);
2204 }
2205
6fdfa970
SF		 2206 /* Get vNIC configuration
2207 */
2208
2209 err = enic_get_vnic_config(enic);
2210 if (err) {
a7a79deb 2211 dev_err(dev, "Get vNIC configuration failed, aborting\n");
6fdfa970
SF		 2212 return err;
2213 }
2214
2215 /* Get available resource counts
2216 */
2217
2218 enic_get_res_counts(enic);
2219
2220 /* Set interrupt mode based on resource counts and system
2221 * capabilities
2222 */
2223
2224 err = enic_set_intr_mode(enic);
2225 if (err) {
a7a79deb
VK		 2226 dev_err(dev, "Failed to set intr mode based on resource "
2227 "counts and system capabilities, aborting\n");
6fdfa970
SF		 2228 return err;
2229 }
2230
2231 /* Allocate and configure vNIC resources
2232 */
2233
2234 err = enic_alloc_vnic_resources(enic);
2235 if (err) {
a7a79deb 2236 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
6fdfa970
SF		 2237 goto err_out_free_vnic_resources;
2238 }
2239
2240 enic_init_vnic_resources(enic);
2241
717258ba 2242 err = enic_set_rss_nic_cfg(enic);
6fdfa970 2243 if (err) {
a7a79deb 2244 dev_err(dev, "Failed to config nic, aborting\n");
6fdfa970
SF		 2245 goto err_out_free_vnic_resources;
2246 }
2247
2248 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2249 default:
717258ba 2250 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
6fdfa970
SF		 2251 break;
2252 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 2253 for (i = 0; i < enic->rq_count; i++)
2254 netif_napi_add(netdev, &enic->napi[i],
2255 enic_poll_msix, 64);
6fdfa970
SF		 2256 break;
2257 }
2258
2259 return 0;
2260
2261err_out_free_vnic_resources:
2262 enic_clear_intr_mode(enic);
2263 enic_free_vnic_resources(enic);
2264
2265 return err;
2266}
2267
27e6c7d3
SF		 2268static void enic_iounmap(struct enic *enic)
2269{
2270 unsigned int i;
2271
2272 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2273 if (enic->bar[i].vaddr)
2274 iounmap(enic->bar[i].vaddr);
2275}
2276
1dd06ae8 2277static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
01f2e4ea 2278{
a7a79deb 2279 struct device *dev = &pdev->dev;
01f2e4ea
SF		 2280 struct net_device *netdev;
2281 struct enic *enic;
2282 int using_dac = 0;
2283 unsigned int i;
2284 int err;
8749b427
RP		 2285#ifdef CONFIG_PCI_IOV
2286 int pos = 0;
2287#endif
b67f231d 2288 int num_pps = 1;
01f2e4ea 2289
01f2e4ea
SF		 2290 /* Allocate net device structure and initialize. Private
2291 * instance data is initialized to zero.
2292 */
2293
2294 netdev = alloc_etherdev(sizeof(struct enic));
41de8d4c 2295 if (!netdev)
01f2e4ea 2296 return -ENOMEM;
01f2e4ea 2297
01f2e4ea
SF		 2298 pci_set_drvdata(pdev, netdev);
2299
2300 SET_NETDEV_DEV(netdev, &pdev->dev);
2301
2302 enic = netdev_priv(netdev);
2303 enic->netdev = netdev;
2304 enic->pdev = pdev;
2305
2306 /* Setup PCI resources
2307 */
2308
29046f9b 2309 err = pci_enable_device_mem(pdev);
01f2e4ea 2310 if (err) {
a7a79deb 2311 dev_err(dev, "Cannot enable PCI device, aborting\n");
01f2e4ea
SF		 2312 goto err_out_free_netdev;
2313 }
2314
2315 err = pci_request_regions(pdev, DRV_NAME);
2316 if (err) {
a7a79deb 2317 dev_err(dev, "Cannot request PCI regions, aborting\n");
01f2e4ea
SF		 2318 goto err_out_disable_device;
2319 }
2320
2321 pci_set_master(pdev);
2322
2323 /* Query PCI controller on system for DMA addressing
2324 * limitation for the device. Try 40-bit first, and
2325 * fail to 32-bit.
2326 */
2327
50cf156a 2328 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2329 if (err) {
284901a9 2330 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2331 if (err) {
a7a79deb 2332 dev_err(dev, "No usable DMA configuration, aborting\n");
01f2e4ea
SF		 2333 goto err_out_release_regions;
2334 }
284901a9 2335 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2336 if (err) {
a7a79deb
VK		 2337 dev_err(dev, "Unable to obtain %u-bit DMA "
2338 "for consistent allocations, aborting\n", 32);
01f2e4ea
SF		 2339 goto err_out_release_regions;
2340 }
2341 } else {
50cf156a 2342 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2343 if (err) {
a7a79deb
VK		 2344 dev_err(dev, "Unable to obtain %u-bit DMA "
2345 "for consistent allocations, aborting\n", 40);
01f2e4ea
SF		 2346 goto err_out_release_regions;
2347 }
2348 using_dac = 1;
2349 }
2350
27e6c7d3 2351 /* Map vNIC resources from BAR0-5
01f2e4ea
SF		 2352 */
2353
27e6c7d3
SF		 2354 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2355 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2356 continue;
2357 enic->bar[i].len = pci_resource_len(pdev, i);
2358 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2359 if (!enic->bar[i].vaddr) {
a7a79deb 2360 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
27e6c7d3
SF		 2361 err = -ENODEV;
2362 goto err_out_iounmap;
2363 }
2364 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF		 2365 }
2366
2367 /* Register vNIC device
2368 */
2369
27e6c7d3
SF		 2370 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2371 ARRAY_SIZE(enic->bar));
01f2e4ea 2372 if (!enic->vdev) {
a7a79deb 2373 dev_err(dev, "vNIC registration failed, aborting\n");
01f2e4ea
SF		 2374 err = -ENODEV;
2375 goto err_out_iounmap;
2376 }
2377
8749b427
RP		 2378#ifdef CONFIG_PCI_IOV
2379 /* Get number of subvnics */
2380 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
2381 if (pos) {
2382 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
413708bb 2383 &enic->num_vfs);
8749b427
RP		 2384 if (enic->num_vfs) {
2385 err = pci_enable_sriov(pdev, enic->num_vfs);
2386 if (err) {
2387 dev_err(dev, "SRIOV enable failed, aborting."
2388 " pci_enable_sriov() returned %d\n",
2389 err);
2390 goto err_out_vnic_unregister;
2391 }
2392 enic->priv_flags |= ENIC_SRIOV_ENABLED;
b67f231d 2393 num_pps = enic->num_vfs;
8749b427
RP		 2394 }
2395 }
8749b427 2396#endif
ca2b721d 2397
3f192795 2398 /* Allocate structure for port profiles */
a1de2219 2399 enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL);
3f192795 2400 if (!enic->pp) {
3f192795 2401 err = -ENOMEM;
ca2b721d 2402 goto err_out_disable_sriov_pp;
3f192795
RP		 2403 }
2404
01f2e4ea
SF		 2405 /* Issue device open to get device in known state
2406 */
2407
2408 err = enic_dev_open(enic);
2409 if (err) {
a7a79deb 2410 dev_err(dev, "vNIC dev open failed, aborting\n");
ca2b721d 2411 goto err_out_disable_sriov;
01f2e4ea
SF		 2412 }
2413
69161425
VK		 2414 /* Setup devcmd lock
2415 */
2416
2417 spin_lock_init(&enic->devcmd_lock);
2418
2419 /*
2420 * Set ingress vlan rewrite mode before vnic initialization
2421 */
2422
2423 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2424 if (err) {
2425 dev_err(dev,
2426 "Failed to set ingress vlan rewrite mode, aborting.\n");
2427 goto err_out_dev_close;
2428 }
2429
01f2e4ea
SF		 2430 /* Issue device init to initialize the vnic-to-switch link.
2431 * We'll start with carrier off and wait for link UP
2432 * notification later to turn on carrier. We don't need
2433 * to wait here for the vnic-to-switch link initialization
2434 * to complete; link UP notification is the indication that
2435 * the process is complete.
2436 */
2437
2438 netif_carrier_off(netdev);
2439
a7a79deb
VK		 2440 /* Do not call dev_init for a dynamic vnic.
2441 * For a dynamic vnic, init_prov_info will be
2442 * called later by an upper layer.
2443 */
2444
2b68c181 2445 if (!enic_is_dynamic(enic)) {
f8bd9091
SF		 2446 err = vnic_dev_init(enic->vdev, 0);
2447 if (err) {
a7a79deb 2448 dev_err(dev, "vNIC dev init failed, aborting\n");
f8bd9091
SF		 2449 goto err_out_dev_close;
2450 }
01f2e4ea
SF		 2451 }
2452
6fdfa970 2453 err = enic_dev_init(enic);
01f2e4ea 2454 if (err) {
a7a79deb 2455 dev_err(dev, "Device initialization failed, aborting\n");
01f2e4ea
SF		 2456 goto err_out_dev_close;
2457 }
2458
383ab92f 2459 /* Setup notification timer, HW reset task, and wq locks
01f2e4ea
SF		 2460 */
2461
2462 init_timer(&enic->notify_timer);
2463 enic->notify_timer.function = enic_notify_timer;
2464 enic->notify_timer.data = (unsigned long)enic;
2465
2466 INIT_WORK(&enic->reset, enic_reset);
c97c894d 2467 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
01f2e4ea
SF		 2468
2469 for (i = 0; i < enic->wq_count; i++)
2470 spin_lock_init(&enic->wq_lock[i]);
2471
01f2e4ea
SF		 2472 /* Register net device
2473 */
2474
2475 enic->port_mtu = enic->config.mtu;
2476 (void)enic_change_mtu(netdev, enic->port_mtu);
2477
2478 err = enic_set_mac_addr(netdev, enic->mac_addr);
2479 if (err) {
a7a79deb 2480 dev_err(dev, "Invalid MAC address, aborting\n");
6fdfa970 2481 goto err_out_dev_deinit;
01f2e4ea
SF		 2482 }
2483
7c844599
SF		 2484 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2485 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2486
7335903c 2487 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
f8bd9091
SF		 2488 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2489 else
2490 netdev->netdev_ops = &enic_netdev_ops;
2491
01f2e4ea
SF		 2492 netdev->watchdog_timeo = 2 * HZ;
2493 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea 2494
73c1ea9b 2495 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1825aca6
VK		 2496 if (ENIC_SETTING(enic, LOOP)) {
2497 netdev->features &= ~NETIF_F_HW_VLAN_TX;
2498 enic->loop_enable = 1;
2499 enic->loop_tag = enic->config.loop_tag;
2500 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2501 }
01f2e4ea 2502 if (ENIC_SETTING(enic, TXCSUM))
5ec8f9b8 2503 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
01f2e4ea 2504 if (ENIC_SETTING(enic, TSO))
5ec8f9b8 2505 netdev->hw_features |= NETIF_F_TSO |
01f2e4ea 2506 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
5ec8f9b8
MM		 2507 if (ENIC_SETTING(enic, RXCSUM))
2508 netdev->hw_features |= NETIF_F_RXCSUM;
2509
2510 netdev->features |= netdev->hw_features;
2511
01f2e4ea
SF		 2512 if (using_dac)
2513 netdev->features |= NETIF_F_HIGHDMA;
2514
01789349
JP		 2515 netdev->priv_flags |= IFF_UNICAST_FLT;
2516
01f2e4ea
SF		 2517 err = register_netdev(netdev);
2518 if (err) {
a7a79deb 2519 dev_err(dev, "Cannot register net device, aborting\n");
6fdfa970 2520 goto err_out_dev_deinit;
01f2e4ea
SF		 2521 }
2522
2523 return 0;
2524
6fdfa970
SF		 2525err_out_dev_deinit:
2526 enic_dev_deinit(enic);
01f2e4ea
SF		 2527err_out_dev_close:
2528 vnic_dev_close(enic->vdev);
8749b427 2529err_out_disable_sriov:
ca2b721d
RP		 2530 kfree(enic->pp);
2531err_out_disable_sriov_pp:
8749b427
RP		 2532#ifdef CONFIG_PCI_IOV
2533 if (enic_sriov_enabled(enic)) {
2534 pci_disable_sriov(pdev);
2535 enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
2536 }
01f2e4ea 2537err_out_vnic_unregister:
8749b427 2538#endif
35d87e33 2539 vnic_dev_unregister(enic->vdev);
01f2e4ea
SF		 2540err_out_iounmap:
2541 enic_iounmap(enic);
2542err_out_release_regions:
2543 pci_release_regions(pdev);
2544err_out_disable_device:
2545 pci_disable_device(pdev);
2546err_out_free_netdev:
2547 pci_set_drvdata(pdev, NULL);
2548 free_netdev(netdev);
2549
2550 return err;
2551}
2552
854de92f 2553static void enic_remove(struct pci_dev *pdev)
01f2e4ea
SF		 2554{
2555 struct net_device *netdev = pci_get_drvdata(pdev);
2556
2557 if (netdev) {
2558 struct enic *enic = netdev_priv(netdev);
2559
23f333a2 2560 cancel_work_sync(&enic->reset);
c97c894d 2561 cancel_work_sync(&enic->change_mtu_work);
01f2e4ea 2562 unregister_netdev(netdev);
6fdfa970 2563 enic_dev_deinit(enic);
01f2e4ea 2564 vnic_dev_close(enic->vdev);
8749b427
RP		 2565#ifdef CONFIG_PCI_IOV
2566 if (enic_sriov_enabled(enic)) {
2567 pci_disable_sriov(pdev);
2568 enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
2569 }
2570#endif
3f192795 2571 kfree(enic->pp);
01f2e4ea
SF		 2572 vnic_dev_unregister(enic->vdev);
2573 enic_iounmap(enic);
2574 pci_release_regions(pdev);
2575 pci_disable_device(pdev);
2576 pci_set_drvdata(pdev, NULL);
2577 free_netdev(netdev);
2578 }
2579}
2580
2581static struct pci_driver enic_driver = {
2582 .name = DRV_NAME,
2583 .id_table = enic_id_table,
2584 .probe = enic_probe,
854de92f 2585 .remove = enic_remove,
01f2e4ea
SF		 2586};
2587
2588static int __init enic_init_module(void)
2589{
a7a79deb 2590 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
01f2e4ea
SF		 2591
2592 return pci_register_driver(&enic_driver);
2593}
2594
2595static void __exit enic_cleanup_module(void)
2596{
2597 pci_unregister_driver(&enic_driver);
2598}
2599
2600module_init(enic_init_module);
2601module_exit(enic_cleanup_module);
Linux 6.x block layer and io_uring tree(s)