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3bdb376e KS |
1 | /* |
2 | * This file is part of the Chelsio T4/T5/T6 Ethernet driver for Linux. | |
3 | * | |
4 | * Copyright (c) 2017 Chelsio Communications, Inc. All rights reserved. | |
5 | * | |
6 | * This software is available to you under a choice of one of two | |
7 | * licenses. You may choose to be licensed under the terms of the GNU | |
8 | * General Public License (GPL) Version 2, available from the file | |
9 | * COPYING in the main directory of this source tree, or the | |
10 | * OpenIB.org BSD license below: | |
11 | * | |
12 | * Redistribution and use in source and binary forms, with or | |
13 | * without modification, are permitted provided that the following | |
14 | * conditions are met: | |
15 | * | |
16 | * - Redistributions of source code must retain the above | |
17 | * copyright notice, this list of conditions and the following | |
18 | * disclaimer. | |
19 | * | |
20 | * - Redistributions in binary form must reproduce the above | |
21 | * copyright notice, this list of conditions and the following | |
22 | * disclaimer in the documentation and/or other materials | |
23 | * provided with the distribution. | |
24 | * | |
25 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
26 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
27 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
28 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
29 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
32 | * SOFTWARE. | |
33 | */ | |
34 | ||
35 | #ifndef __T4_TCB_H | |
36 | #define __T4_TCB_H | |
37 | ||
8a30923e RM |
38 | #define TCB_L2T_IX_W 0 |
39 | #define TCB_L2T_IX_S 12 | |
40 | #define TCB_L2T_IX_M 0xfffULL | |
41 | #define TCB_L2T_IX_V(x) ((x) << TCB_L2T_IX_S) | |
42 | ||
3bdb376e KS |
43 | #define TCB_SMAC_SEL_W 0 |
44 | #define TCB_SMAC_SEL_S 24 | |
45 | #define TCB_SMAC_SEL_M 0xffULL | |
46 | #define TCB_SMAC_SEL_V(x) ((x) << TCB_SMAC_SEL_S) | |
47 | ||
48 | #define TCB_T_FLAGS_W 1 | |
e381a1cb RR |
49 | #define TCB_T_FLAGS_S 0 |
50 | #define TCB_T_FLAGS_M 0xffffffffffffffffULL | |
51 | #define TCB_T_FLAGS_V(x) ((__u64)(x) << TCB_T_FLAGS_S) | |
52 | ||
12b276fb | 53 | #define TF_CCTRL_ECE_S 60 |
3bdb376e | 54 | #define TF_CCTRL_CWR_S 61 |
12b276fb | 55 | #define TF_CCTRL_RFR_S 62 |
3bdb376e | 56 | |
3b0b3bee KS |
57 | #define TCB_RSS_INFO_W 3 |
58 | #define TCB_RSS_INFO_S 0 | |
59 | #define TCB_RSS_INFO_M 0x3ffULL | |
60 | #define TCB_RSS_INFO_V(x) ((x) << TCB_RSS_INFO_S) | |
61 | ||
34aba2c4 RM |
62 | #define TCB_T_STATE_W 3 |
63 | #define TCB_T_STATE_S 16 | |
64 | #define TCB_T_STATE_M 0xfULL | |
65 | #define TCB_T_STATE_V(x) ((x) << TCB_T_STATE_S) | |
66 | ||
12b276fb KS |
67 | #define TCB_TIMESTAMP_W 5 |
68 | #define TCB_TIMESTAMP_S 0 | |
69 | #define TCB_TIMESTAMP_M 0xffffffffULL | |
70 | #define TCB_TIMESTAMP_V(x) ((x) << TCB_TIMESTAMP_S) | |
71 | ||
72 | #define TCB_RTT_TS_RECENT_AGE_W 6 | |
73 | #define TCB_RTT_TS_RECENT_AGE_S 0 | |
74 | #define TCB_RTT_TS_RECENT_AGE_M 0xffffffffULL | |
75 | #define TCB_RTT_TS_RECENT_AGE_V(x) ((x) << TCB_RTT_TS_RECENT_AGE_S) | |
76 | ||
77 | #define TCB_SND_UNA_RAW_W 10 | |
8a30923e RM |
78 | #define TCB_SND_UNA_RAW_S 0 |
79 | #define TCB_SND_UNA_RAW_M 0xfffffffULL | |
80 | #define TCB_SND_UNA_RAW_V(x) ((x) << TCB_SND_UNA_RAW_S) | |
81 | ||
82 | #define TCB_SND_NXT_RAW_W 10 | |
83 | #define TCB_SND_NXT_RAW_S 28 | |
84 | #define TCB_SND_NXT_RAW_M 0xfffffffULL | |
85 | #define TCB_SND_NXT_RAW_V(x) ((x) << TCB_SND_NXT_RAW_S) | |
86 | ||
87 | #define TCB_SND_MAX_RAW_W 11 | |
88 | #define TCB_SND_MAX_RAW_S 24 | |
89 | #define TCB_SND_MAX_RAW_M 0xfffffffULL | |
90 | #define TCB_SND_MAX_RAW_V(x) ((x) << TCB_SND_MAX_RAW_S) | |
91 | ||
12b276fb KS |
92 | #define TCB_RX_FRAG2_PTR_RAW_W 27 |
93 | #define TCB_RX_FRAG3_LEN_RAW_W 29 | |
94 | #define TCB_RX_FRAG3_START_IDX_OFFSET_RAW_W 30 | |
95 | #define TCB_PDU_HDR_LEN_W 31 | |
e381a1cb | 96 | |
8a30923e RM |
97 | #define TCB_RQ_START_W 30 |
98 | #define TCB_RQ_START_S 0 | |
99 | #define TCB_RQ_START_M 0x3ffffffULL | |
100 | #define TCB_RQ_START_V(x) ((x) << TCB_RQ_START_S) | |
101 | ||
e381a1cb RR |
102 | #define TF_RX_PDU_OUT_S 49 |
103 | #define TF_RX_PDU_OUT_V(x) ((__u64)(x) << TF_RX_PDU_OUT_S) | |
104 | ||
8a30923e RM |
105 | #define TF_CORE_BYPASS_S 63 |
106 | #define TF_CORE_BYPASS_V(x) ((__u64)(x) << TF_CORE_BYPASS_S) | |
107 | #define TF_CORE_BYPASS_F TF_CORE_BYPASS_V(1) | |
108 | ||
109 | #define TF_NON_OFFLOAD_S 1 | |
110 | #define TF_NON_OFFLOAD_V(x) ((x) << TF_NON_OFFLOAD_S) | |
111 | #define TF_NON_OFFLOAD_F TF_NON_OFFLOAD_V(1) | |
112 | ||
3bdb376e | 113 | #endif /* __T4_TCB_H */ |