[linux-block.git] / drivers / net / ethernet / chelsio / cxgb4 / t4_tcb.h

/*
 * This file is part of the Chelsio T4/T5/T6 Ethernet driver for Linux.
 *
 * Copyright (c) 2017 Chelsio Communications, Inc. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#ifndef __T4_TCB_H
#define __T4_TCB_H

#define TCB_L2T_IX_W		0
#define TCB_L2T_IX_S		12
#define TCB_L2T_IX_M		0xfffULL
#define TCB_L2T_IX_V(x)		((x) << TCB_L2T_IX_S)

#define TCB_SMAC_SEL_W		0
#define TCB_SMAC_SEL_S		24
#define TCB_SMAC_SEL_M		0xffULL
#define TCB_SMAC_SEL_V(x)	((x) << TCB_SMAC_SEL_S)

#define TCB_T_FLAGS_W		1
#define TCB_T_FLAGS_S		0
#define TCB_T_FLAGS_M		0xffffffffffffffffULL
#define TCB_T_FLAGS_V(x)	((__u64)(x) << TCB_T_FLAGS_S)

#define TF_DROP_S		22
#define TF_DIRECT_STEER_S	23
#define TF_LPBK_S		59

#define TF_CCTRL_ECE_S		60
#define TF_CCTRL_CWR_S		61
#define TF_CCTRL_RFR_S		62

#define TCB_RSS_INFO_W		3
#define TCB_RSS_INFO_S		0
#define TCB_RSS_INFO_M		0x3ffULL
#define TCB_RSS_INFO_V(x)	((x) << TCB_RSS_INFO_S)

#define TCB_T_STATE_W		3
#define TCB_T_STATE_S		16
#define TCB_T_STATE_M		0xfULL
#define TCB_T_STATE_V(x)	((x) << TCB_T_STATE_S)

#define TCB_TIMESTAMP_W		5
#define TCB_TIMESTAMP_S		0
#define TCB_TIMESTAMP_M		0xffffffffULL
#define TCB_TIMESTAMP_V(x)	((x) << TCB_TIMESTAMP_S)

#define TCB_RTT_TS_RECENT_AGE_W		6
#define TCB_RTT_TS_RECENT_AGE_S		0
#define TCB_RTT_TS_RECENT_AGE_M		0xffffffffULL
#define TCB_RTT_TS_RECENT_AGE_V(x)	((x) << TCB_RTT_TS_RECENT_AGE_S)

#define TCB_T_RTSEQ_RECENT_W    7
#define TCB_T_RTSEQ_RECENT_S    0
#define TCB_T_RTSEQ_RECENT_M    0xffffffffULL
#define TCB_T_RTSEQ_RECENT_V(x) ((x) << TCB_T_RTSEQ_RECENT_S)

#define TCB_TX_MAX_W		9
#define TCB_TX_MAX_S		0
#define TCB_TX_MAX_M		0xffffffffULL
#define TCB_TX_MAX_V(x)		((x) << TCB_TX_MAX_S)

#define TCB_SND_UNA_RAW_W	10
#define TCB_SND_UNA_RAW_S	0
#define TCB_SND_UNA_RAW_M	0xfffffffULL
#define TCB_SND_UNA_RAW_V(x)	((x) << TCB_SND_UNA_RAW_S)

#define TCB_SND_NXT_RAW_W	10
#define TCB_SND_NXT_RAW_S	28
#define TCB_SND_NXT_RAW_M	0xfffffffULL
#define TCB_SND_NXT_RAW_V(x)	((x) << TCB_SND_NXT_RAW_S)

#define TCB_SND_MAX_RAW_W	11
#define TCB_SND_MAX_RAW_S	24
#define TCB_SND_MAX_RAW_M	0xfffffffULL
#define TCB_SND_MAX_RAW_V(x)	((x) << TCB_SND_MAX_RAW_S)

#define TCB_RCV_NXT_W		16
#define TCB_RCV_NXT_S		10
#define TCB_RCV_NXT_M		0xffffffffULL
#define TCB_RCV_NXT_V(x)	((x) << TCB_RCV_NXT_S)

#define TCB_RCV_WND_W		17
#define TCB_RCV_WND_S		10
#define TCB_RCV_WND_M		0xffffffULL
#define TCB_RCV_WND_V(x)	((x) << TCB_RCV_WND_S)

#define TCB_RX_FRAG2_PTR_RAW_W	27
#define TCB_RX_FRAG3_LEN_RAW_W	29
#define TCB_RX_FRAG3_START_IDX_OFFSET_RAW_W	30
#define TCB_PDU_HDR_LEN_W	31

#define TCB_RQ_START_W		30
#define TCB_RQ_START_S		0
#define TCB_RQ_START_M		0x3ffffffULL
#define TCB_RQ_START_V(x)	((x) << TCB_RQ_START_S)

#define TF_RX_PDU_OUT_S		49
#define TF_RX_PDU_OUT_V(x)	((__u64)(x) << TF_RX_PDU_OUT_S)

#define TF_CORE_BYPASS_S	63
#define TF_CORE_BYPASS_V(x)	((__u64)(x) << TF_CORE_BYPASS_S)
#define TF_CORE_BYPASS_F	TF_CORE_BYPASS_V(1)

#define TF_NON_OFFLOAD_S	1
#define TF_NON_OFFLOAD_V(x)	((x) << TF_NON_OFFLOAD_S)
#define TF_NON_OFFLOAD_F	TF_NON_OFFLOAD_V(1)

#endif /* __T4_TCB_H */
Commit	Line	Data
3bdb376e KS	1	/*
	2	* This file is part of the Chelsio T4/T5/T6 Ethernet driver for Linux.
	3	*
	4	* Copyright (c) 2017 Chelsio Communications, Inc. All rights reserved.
	5	*
	6	* This software is available to you under a choice of one of two
	7	* licenses. You may choose to be licensed under the terms of the GNU
	8	* General Public License (GPL) Version 2, available from the file
	9	* COPYING in the main directory of this source tree, or the
	10	* OpenIB.org BSD license below:
	11	*
	12	* Redistribution and use in source and binary forms, with or
	13	* without modification, are permitted provided that the following
	14	* conditions are met:
	15	*
	16	* - Redistributions of source code must retain the above
	17	* copyright notice, this list of conditions and the following
	18	* disclaimer.
	19	*
	20	* - Redistributions in binary form must reproduce the above
	21	* copyright notice, this list of conditions and the following
	22	* disclaimer in the documentation and/or other materials
	23	* provided with the distribution.
	24	*
	25	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	26	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	27	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	28	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	29	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	30	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	31	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	32	* SOFTWARE.
	33	*/
	34
	35	#ifndef __T4_TCB_H
	36	#define __T4_TCB_H
	37
8a30923e RM	38	#define TCB_L2T_IX_W 0
	39	#define TCB_L2T_IX_S 12
	40	#define TCB_L2T_IX_M 0xfffULL
	41	#define TCB_L2T_IX_V(x) ((x) << TCB_L2T_IX_S)
	42
3bdb376e KS	43	#define TCB_SMAC_SEL_W 0
	44	#define TCB_SMAC_SEL_S 24
	45	#define TCB_SMAC_SEL_M 0xffULL
	46	#define TCB_SMAC_SEL_V(x) ((x) << TCB_SMAC_SEL_S)
	47
	48	#define TCB_T_FLAGS_W 1
e381a1cb RR	49	#define TCB_T_FLAGS_S 0
	50	#define TCB_T_FLAGS_M 0xffffffffffffffffULL
	51	#define TCB_T_FLAGS_V(x) ((__u64)(x) << TCB_T_FLAGS_S)
	52
937d8420 RR	53	#define TF_DROP_S 22
	54	#define TF_DIRECT_STEER_S 23
	55	#define TF_LPBK_S 59
	56
12b276fb	57	#define TF_CCTRL_ECE_S 60
3bdb376e	58	#define TF_CCTRL_CWR_S 61
12b276fb	59	#define TF_CCTRL_RFR_S 62
3bdb376e	60
3b0b3bee KS	61	#define TCB_RSS_INFO_W 3
	62	#define TCB_RSS_INFO_S 0
	63	#define TCB_RSS_INFO_M 0x3ffULL
	64	#define TCB_RSS_INFO_V(x) ((x) << TCB_RSS_INFO_S)
	65
34aba2c4 RM	66	#define TCB_T_STATE_W 3
	67	#define TCB_T_STATE_S 16
	68	#define TCB_T_STATE_M 0xfULL
	69	#define TCB_T_STATE_V(x) ((x) << TCB_T_STATE_S)
	70
12b276fb KS	71	#define TCB_TIMESTAMP_W 5
	72	#define TCB_TIMESTAMP_S 0
	73	#define TCB_TIMESTAMP_M 0xffffffffULL
	74	#define TCB_TIMESTAMP_V(x) ((x) << TCB_TIMESTAMP_S)
	75
	76	#define TCB_RTT_TS_RECENT_AGE_W 6
	77	#define TCB_RTT_TS_RECENT_AGE_S 0
	78	#define TCB_RTT_TS_RECENT_AGE_M 0xffffffffULL
	79	#define TCB_RTT_TS_RECENT_AGE_V(x) ((x) << TCB_RTT_TS_RECENT_AGE_S)
	80
5a4b9fe7 RM	81	#define TCB_T_RTSEQ_RECENT_W 7
	82	#define TCB_T_RTSEQ_RECENT_S 0
	83	#define TCB_T_RTSEQ_RECENT_M 0xffffffffULL
	84	#define TCB_T_RTSEQ_RECENT_V(x) ((x) << TCB_T_RTSEQ_RECENT_S)
	85
	86	#define TCB_TX_MAX_W 9
	87	#define TCB_TX_MAX_S 0
	88	#define TCB_TX_MAX_M 0xffffffffULL
	89	#define TCB_TX_MAX_V(x) ((x) << TCB_TX_MAX_S)
	90
12b276fb	91	#define TCB_SND_UNA_RAW_W 10
8a30923e RM	92	#define TCB_SND_UNA_RAW_S 0
	93	#define TCB_SND_UNA_RAW_M 0xfffffffULL
	94	#define TCB_SND_UNA_RAW_V(x) ((x) << TCB_SND_UNA_RAW_S)
	95
	96	#define TCB_SND_NXT_RAW_W 10
	97	#define TCB_SND_NXT_RAW_S 28
	98	#define TCB_SND_NXT_RAW_M 0xfffffffULL
	99	#define TCB_SND_NXT_RAW_V(x) ((x) << TCB_SND_NXT_RAW_S)
	100
	101	#define TCB_SND_MAX_RAW_W 11
	102	#define TCB_SND_MAX_RAW_S 24
	103	#define TCB_SND_MAX_RAW_M 0xfffffffULL
	104	#define TCB_SND_MAX_RAW_V(x) ((x) << TCB_SND_MAX_RAW_S)
	105
5a4b9fe7 RM	106	#define TCB_RCV_NXT_W 16
	107	#define TCB_RCV_NXT_S 10
	108	#define TCB_RCV_NXT_M 0xffffffffULL
	109	#define TCB_RCV_NXT_V(x) ((x) << TCB_RCV_NXT_S)
	110
	111	#define TCB_RCV_WND_W 17
	112	#define TCB_RCV_WND_S 10
	113	#define TCB_RCV_WND_M 0xffffffULL
	114	#define TCB_RCV_WND_V(x) ((x) << TCB_RCV_WND_S)
	115
12b276fb KS	116	#define TCB_RX_FRAG2_PTR_RAW_W 27
	117	#define TCB_RX_FRAG3_LEN_RAW_W 29
	118	#define TCB_RX_FRAG3_START_IDX_OFFSET_RAW_W 30
	119	#define TCB_PDU_HDR_LEN_W 31
e381a1cb	120
8a30923e RM	121	#define TCB_RQ_START_W 30
	122	#define TCB_RQ_START_S 0
	123	#define TCB_RQ_START_M 0x3ffffffULL
	124	#define TCB_RQ_START_V(x) ((x) << TCB_RQ_START_S)
	125
e381a1cb RR	126	#define TF_RX_PDU_OUT_S 49
	127	#define TF_RX_PDU_OUT_V(x) ((__u64)(x) << TF_RX_PDU_OUT_S)
	128
8a30923e RM	129	#define TF_CORE_BYPASS_S 63
	130	#define TF_CORE_BYPASS_V(x) ((__u64)(x) << TF_CORE_BYPASS_S)
	131	#define TF_CORE_BYPASS_F TF_CORE_BYPASS_V(1)
	132
	133	#define TF_NON_OFFLOAD_S 1
	134	#define TF_NON_OFFLOAD_V(x) ((x) << TF_NON_OFFLOAD_S)
	135	#define TF_NON_OFFLOAD_F TF_NON_OFFLOAD_V(1)
	136
3bdb376e	137	#endif /* __T4_TCB_H */