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c0c050c5 MC |
1 | /* Broadcom NetXtreme-C/E network driver. |
2 | * | |
11f15ed3 | 3 | * Copyright (c) 2014-2016 Broadcom Corporation |
746df139 | 4 | * Copyright (c) 2016-2018 Broadcom Limited |
c0c050c5 MC |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/module.h> | |
12 | #include <linux/pci.h> | |
13 | #include <linux/netdevice.h> | |
14 | #include <linux/if_vlan.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/etherdevice.h> | |
17 | #include "bnxt_hsi.h" | |
18 | #include "bnxt.h" | |
2f593846 | 19 | #include "bnxt_ulp.h" |
c0c050c5 | 20 | #include "bnxt_sriov.h" |
4ab0c6a8 | 21 | #include "bnxt_vfr.h" |
c0c050c5 MC |
22 | #include "bnxt_ethtool.h" |
23 | ||
24 | #ifdef CONFIG_BNXT_SRIOV | |
350a7149 EW |
25 | static int bnxt_hwrm_fwd_async_event_cmpl(struct bnxt *bp, |
26 | struct bnxt_vf_info *vf, u16 event_id) | |
27 | { | |
28 | struct hwrm_fwd_async_event_cmpl_output *resp = bp->hwrm_cmd_resp_addr; | |
29 | struct hwrm_fwd_async_event_cmpl_input req = {0}; | |
30 | struct hwrm_async_event_cmpl *async_cmpl; | |
31 | int rc = 0; | |
32 | ||
33 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FWD_ASYNC_EVENT_CMPL, -1, -1); | |
34 | if (vf) | |
35 | req.encap_async_event_target_id = cpu_to_le16(vf->fw_fid); | |
36 | else | |
37 | /* broadcast this async event to all VFs */ | |
38 | req.encap_async_event_target_id = cpu_to_le16(0xffff); | |
39 | async_cmpl = (struct hwrm_async_event_cmpl *)req.encap_async_event_cmpl; | |
87c374de | 40 | async_cmpl->type = cpu_to_le16(ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT); |
350a7149 EW |
41 | async_cmpl->event_id = cpu_to_le16(event_id); |
42 | ||
43 | mutex_lock(&bp->hwrm_cmd_lock); | |
44 | rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
45 | ||
46 | if (rc) { | |
47 | netdev_err(bp->dev, "hwrm_fwd_async_event_cmpl failed. rc:%d\n", | |
48 | rc); | |
49 | goto fwd_async_event_cmpl_exit; | |
50 | } | |
51 | ||
52 | if (resp->error_code) { | |
53 | netdev_err(bp->dev, "hwrm_fwd_async_event_cmpl error %d\n", | |
54 | resp->error_code); | |
55 | rc = -1; | |
56 | } | |
57 | ||
58 | fwd_async_event_cmpl_exit: | |
59 | mutex_unlock(&bp->hwrm_cmd_lock); | |
60 | return rc; | |
61 | } | |
62 | ||
c0c050c5 MC |
63 | static int bnxt_vf_ndo_prep(struct bnxt *bp, int vf_id) |
64 | { | |
caefe526 | 65 | if (!test_bit(BNXT_STATE_OPEN, &bp->state)) { |
c0c050c5 MC |
66 | netdev_err(bp->dev, "vf ndo called though PF is down\n"); |
67 | return -EINVAL; | |
68 | } | |
69 | if (!bp->pf.active_vfs) { | |
70 | netdev_err(bp->dev, "vf ndo called though sriov is disabled\n"); | |
71 | return -EINVAL; | |
72 | } | |
78f30004 | 73 | if (vf_id >= bp->pf.active_vfs) { |
c0c050c5 MC |
74 | netdev_err(bp->dev, "Invalid VF id %d\n", vf_id); |
75 | return -EINVAL; | |
76 | } | |
77 | return 0; | |
78 | } | |
79 | ||
80 | int bnxt_set_vf_spoofchk(struct net_device *dev, int vf_id, bool setting) | |
81 | { | |
82 | struct hwrm_func_cfg_input req = {0}; | |
83 | struct bnxt *bp = netdev_priv(dev); | |
84 | struct bnxt_vf_info *vf; | |
85 | bool old_setting = false; | |
86 | u32 func_flags; | |
87 | int rc; | |
88 | ||
8eb992e8 MC |
89 | if (bp->hwrm_spec_code < 0x10701) |
90 | return -ENOTSUPP; | |
91 | ||
c0c050c5 MC |
92 | rc = bnxt_vf_ndo_prep(bp, vf_id); |
93 | if (rc) | |
94 | return rc; | |
95 | ||
96 | vf = &bp->pf.vf[vf_id]; | |
97 | if (vf->flags & BNXT_VF_SPOOFCHK) | |
98 | old_setting = true; | |
99 | if (old_setting == setting) | |
100 | return 0; | |
101 | ||
102 | func_flags = vf->func_flags; | |
103 | if (setting) | |
8eb992e8 | 104 | func_flags |= FUNC_CFG_REQ_FLAGS_SRC_MAC_ADDR_CHECK_ENABLE; |
c0c050c5 | 105 | else |
8eb992e8 | 106 | func_flags |= FUNC_CFG_REQ_FLAGS_SRC_MAC_ADDR_CHECK_DISABLE; |
c0c050c5 MC |
107 | /*TODO: if the driver supports VLAN filter on guest VLAN, |
108 | * the spoof check should also include vlan anti-spoofing | |
109 | */ | |
110 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1); | |
c193554e | 111 | req.fid = cpu_to_le16(vf->fw_fid); |
c0c050c5 MC |
112 | req.flags = cpu_to_le32(func_flags); |
113 | rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
114 | if (!rc) { | |
115 | vf->func_flags = func_flags; | |
116 | if (setting) | |
117 | vf->flags |= BNXT_VF_SPOOFCHK; | |
118 | else | |
119 | vf->flags &= ~BNXT_VF_SPOOFCHK; | |
120 | } | |
121 | return rc; | |
122 | } | |
123 | ||
746df139 VV |
124 | int bnxt_set_vf_trust(struct net_device *dev, int vf_id, bool trusted) |
125 | { | |
126 | struct bnxt *bp = netdev_priv(dev); | |
127 | struct bnxt_vf_info *vf; | |
128 | ||
129 | if (bnxt_vf_ndo_prep(bp, vf_id)) | |
130 | return -EINVAL; | |
131 | ||
132 | vf = &bp->pf.vf[vf_id]; | |
133 | if (trusted) | |
134 | vf->flags |= BNXT_VF_TRUST; | |
135 | else | |
136 | vf->flags &= ~BNXT_VF_TRUST; | |
137 | ||
138 | return 0; | |
139 | } | |
140 | ||
c0c050c5 MC |
141 | int bnxt_get_vf_config(struct net_device *dev, int vf_id, |
142 | struct ifla_vf_info *ivi) | |
143 | { | |
144 | struct bnxt *bp = netdev_priv(dev); | |
145 | struct bnxt_vf_info *vf; | |
146 | int rc; | |
147 | ||
148 | rc = bnxt_vf_ndo_prep(bp, vf_id); | |
149 | if (rc) | |
150 | return rc; | |
151 | ||
152 | ivi->vf = vf_id; | |
153 | vf = &bp->pf.vf[vf_id]; | |
154 | ||
91cdda40 VV |
155 | if (is_valid_ether_addr(vf->mac_addr)) |
156 | memcpy(&ivi->mac, vf->mac_addr, ETH_ALEN); | |
157 | else | |
158 | memcpy(&ivi->mac, vf->vf_mac_addr, ETH_ALEN); | |
c0c050c5 MC |
159 | ivi->max_tx_rate = vf->max_tx_rate; |
160 | ivi->min_tx_rate = vf->min_tx_rate; | |
161 | ivi->vlan = vf->vlan; | |
f0249056 MC |
162 | if (vf->flags & BNXT_VF_QOS) |
163 | ivi->qos = vf->vlan >> VLAN_PRIO_SHIFT; | |
164 | else | |
165 | ivi->qos = 0; | |
166 | ivi->spoofchk = !!(vf->flags & BNXT_VF_SPOOFCHK); | |
746df139 | 167 | ivi->trusted = !!(vf->flags & BNXT_VF_TRUST); |
c0c050c5 MC |
168 | if (!(vf->flags & BNXT_VF_LINK_FORCED)) |
169 | ivi->linkstate = IFLA_VF_LINK_STATE_AUTO; | |
170 | else if (vf->flags & BNXT_VF_LINK_UP) | |
171 | ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE; | |
172 | else | |
173 | ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE; | |
174 | ||
175 | return 0; | |
176 | } | |
177 | ||
178 | int bnxt_set_vf_mac(struct net_device *dev, int vf_id, u8 *mac) | |
179 | { | |
180 | struct hwrm_func_cfg_input req = {0}; | |
181 | struct bnxt *bp = netdev_priv(dev); | |
182 | struct bnxt_vf_info *vf; | |
183 | int rc; | |
184 | ||
185 | rc = bnxt_vf_ndo_prep(bp, vf_id); | |
186 | if (rc) | |
187 | return rc; | |
188 | /* reject bc or mc mac addr, zero mac addr means allow | |
189 | * VF to use its own mac addr | |
190 | */ | |
191 | if (is_multicast_ether_addr(mac)) { | |
192 | netdev_err(dev, "Invalid VF ethernet address\n"); | |
193 | return -EINVAL; | |
194 | } | |
195 | vf = &bp->pf.vf[vf_id]; | |
196 | ||
197 | memcpy(vf->mac_addr, mac, ETH_ALEN); | |
198 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1); | |
c193554e | 199 | req.fid = cpu_to_le16(vf->fw_fid); |
c0c050c5 MC |
200 | req.flags = cpu_to_le32(vf->func_flags); |
201 | req.enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_MAC_ADDR); | |
202 | memcpy(req.dflt_mac_addr, mac, ETH_ALEN); | |
203 | return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
204 | } | |
205 | ||
79aab093 MS |
206 | int bnxt_set_vf_vlan(struct net_device *dev, int vf_id, u16 vlan_id, u8 qos, |
207 | __be16 vlan_proto) | |
c0c050c5 MC |
208 | { |
209 | struct hwrm_func_cfg_input req = {0}; | |
210 | struct bnxt *bp = netdev_priv(dev); | |
211 | struct bnxt_vf_info *vf; | |
212 | u16 vlan_tag; | |
213 | int rc; | |
214 | ||
cf6645f8 MC |
215 | if (bp->hwrm_spec_code < 0x10201) |
216 | return -ENOTSUPP; | |
217 | ||
79aab093 MS |
218 | if (vlan_proto != htons(ETH_P_8021Q)) |
219 | return -EPROTONOSUPPORT; | |
220 | ||
c0c050c5 MC |
221 | rc = bnxt_vf_ndo_prep(bp, vf_id); |
222 | if (rc) | |
223 | return rc; | |
224 | ||
225 | /* TODO: needed to implement proper handling of user priority, | |
226 | * currently fail the command if there is valid priority | |
227 | */ | |
228 | if (vlan_id > 4095 || qos) | |
229 | return -EINVAL; | |
230 | ||
231 | vf = &bp->pf.vf[vf_id]; | |
232 | vlan_tag = vlan_id; | |
233 | if (vlan_tag == vf->vlan) | |
234 | return 0; | |
235 | ||
236 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1); | |
c193554e | 237 | req.fid = cpu_to_le16(vf->fw_fid); |
c0c050c5 MC |
238 | req.flags = cpu_to_le32(vf->func_flags); |
239 | req.dflt_vlan = cpu_to_le16(vlan_tag); | |
240 | req.enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_VLAN); | |
241 | rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
242 | if (!rc) | |
243 | vf->vlan = vlan_tag; | |
244 | return rc; | |
245 | } | |
246 | ||
247 | int bnxt_set_vf_bw(struct net_device *dev, int vf_id, int min_tx_rate, | |
248 | int max_tx_rate) | |
249 | { | |
250 | struct hwrm_func_cfg_input req = {0}; | |
251 | struct bnxt *bp = netdev_priv(dev); | |
252 | struct bnxt_vf_info *vf; | |
253 | u32 pf_link_speed; | |
254 | int rc; | |
255 | ||
256 | rc = bnxt_vf_ndo_prep(bp, vf_id); | |
257 | if (rc) | |
258 | return rc; | |
259 | ||
260 | vf = &bp->pf.vf[vf_id]; | |
261 | pf_link_speed = bnxt_fw_to_ethtool_speed(bp->link_info.link_speed); | |
262 | if (max_tx_rate > pf_link_speed) { | |
263 | netdev_info(bp->dev, "max tx rate %d exceed PF link speed for VF %d\n", | |
264 | max_tx_rate, vf_id); | |
265 | return -EINVAL; | |
266 | } | |
267 | ||
268 | if (min_tx_rate > pf_link_speed || min_tx_rate > max_tx_rate) { | |
269 | netdev_info(bp->dev, "min tx rate %d is invalid for VF %d\n", | |
270 | min_tx_rate, vf_id); | |
271 | return -EINVAL; | |
272 | } | |
273 | if (min_tx_rate == vf->min_tx_rate && max_tx_rate == vf->max_tx_rate) | |
274 | return 0; | |
275 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1); | |
c193554e | 276 | req.fid = cpu_to_le16(vf->fw_fid); |
c0c050c5 MC |
277 | req.flags = cpu_to_le32(vf->func_flags); |
278 | req.enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_MAX_BW); | |
279 | req.max_bw = cpu_to_le32(max_tx_rate); | |
280 | req.enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_MIN_BW); | |
281 | req.min_bw = cpu_to_le32(min_tx_rate); | |
282 | rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
283 | if (!rc) { | |
284 | vf->min_tx_rate = min_tx_rate; | |
285 | vf->max_tx_rate = max_tx_rate; | |
286 | } | |
287 | return rc; | |
288 | } | |
289 | ||
290 | int bnxt_set_vf_link_state(struct net_device *dev, int vf_id, int link) | |
291 | { | |
292 | struct bnxt *bp = netdev_priv(dev); | |
293 | struct bnxt_vf_info *vf; | |
294 | int rc; | |
295 | ||
296 | rc = bnxt_vf_ndo_prep(bp, vf_id); | |
297 | if (rc) | |
298 | return rc; | |
299 | ||
300 | vf = &bp->pf.vf[vf_id]; | |
301 | ||
302 | vf->flags &= ~(BNXT_VF_LINK_UP | BNXT_VF_LINK_FORCED); | |
303 | switch (link) { | |
304 | case IFLA_VF_LINK_STATE_AUTO: | |
305 | vf->flags |= BNXT_VF_LINK_UP; | |
306 | break; | |
307 | case IFLA_VF_LINK_STATE_DISABLE: | |
308 | vf->flags |= BNXT_VF_LINK_FORCED; | |
309 | break; | |
310 | case IFLA_VF_LINK_STATE_ENABLE: | |
311 | vf->flags |= BNXT_VF_LINK_UP | BNXT_VF_LINK_FORCED; | |
312 | break; | |
313 | default: | |
314 | netdev_err(bp->dev, "Invalid link option\n"); | |
315 | rc = -EINVAL; | |
316 | break; | |
317 | } | |
350a7149 EW |
318 | if (vf->flags & (BNXT_VF_LINK_UP | BNXT_VF_LINK_FORCED)) |
319 | rc = bnxt_hwrm_fwd_async_event_cmpl(bp, vf, | |
87c374de | 320 | ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE); |
c0c050c5 MC |
321 | return rc; |
322 | } | |
323 | ||
324 | static int bnxt_set_vf_attr(struct bnxt *bp, int num_vfs) | |
325 | { | |
326 | int i; | |
327 | struct bnxt_vf_info *vf; | |
328 | ||
329 | for (i = 0; i < num_vfs; i++) { | |
330 | vf = &bp->pf.vf[i]; | |
331 | memset(vf, 0, sizeof(*vf)); | |
c0c050c5 MC |
332 | } |
333 | return 0; | |
334 | } | |
335 | ||
4bb6cdce | 336 | static int bnxt_hwrm_func_vf_resource_free(struct bnxt *bp, int num_vfs) |
c0c050c5 MC |
337 | { |
338 | int i, rc = 0; | |
339 | struct bnxt_pf_info *pf = &bp->pf; | |
340 | struct hwrm_func_vf_resc_free_input req = {0}; | |
341 | ||
342 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_VF_RESC_FREE, -1, -1); | |
343 | ||
344 | mutex_lock(&bp->hwrm_cmd_lock); | |
4bb6cdce | 345 | for (i = pf->first_vf_id; i < pf->first_vf_id + num_vfs; i++) { |
c0c050c5 MC |
346 | req.vf_id = cpu_to_le16(i); |
347 | rc = _hwrm_send_message(bp, &req, sizeof(req), | |
348 | HWRM_CMD_TIMEOUT); | |
349 | if (rc) | |
350 | break; | |
351 | } | |
352 | mutex_unlock(&bp->hwrm_cmd_lock); | |
353 | return rc; | |
354 | } | |
355 | ||
356 | static void bnxt_free_vf_resources(struct bnxt *bp) | |
357 | { | |
358 | struct pci_dev *pdev = bp->pdev; | |
359 | int i; | |
360 | ||
361 | kfree(bp->pf.vf_event_bmap); | |
362 | bp->pf.vf_event_bmap = NULL; | |
363 | ||
364 | for (i = 0; i < 4; i++) { | |
365 | if (bp->pf.hwrm_cmd_req_addr[i]) { | |
366 | dma_free_coherent(&pdev->dev, BNXT_PAGE_SIZE, | |
367 | bp->pf.hwrm_cmd_req_addr[i], | |
368 | bp->pf.hwrm_cmd_req_dma_addr[i]); | |
369 | bp->pf.hwrm_cmd_req_addr[i] = NULL; | |
370 | } | |
371 | } | |
372 | ||
373 | kfree(bp->pf.vf); | |
374 | bp->pf.vf = NULL; | |
375 | } | |
376 | ||
377 | static int bnxt_alloc_vf_resources(struct bnxt *bp, int num_vfs) | |
378 | { | |
379 | struct pci_dev *pdev = bp->pdev; | |
380 | u32 nr_pages, size, i, j, k = 0; | |
381 | ||
382 | bp->pf.vf = kcalloc(num_vfs, sizeof(struct bnxt_vf_info), GFP_KERNEL); | |
383 | if (!bp->pf.vf) | |
384 | return -ENOMEM; | |
385 | ||
386 | bnxt_set_vf_attr(bp, num_vfs); | |
387 | ||
388 | size = num_vfs * BNXT_HWRM_REQ_MAX_SIZE; | |
389 | nr_pages = size / BNXT_PAGE_SIZE; | |
390 | if (size & (BNXT_PAGE_SIZE - 1)) | |
391 | nr_pages++; | |
392 | ||
393 | for (i = 0; i < nr_pages; i++) { | |
394 | bp->pf.hwrm_cmd_req_addr[i] = | |
395 | dma_alloc_coherent(&pdev->dev, BNXT_PAGE_SIZE, | |
396 | &bp->pf.hwrm_cmd_req_dma_addr[i], | |
397 | GFP_KERNEL); | |
398 | ||
399 | if (!bp->pf.hwrm_cmd_req_addr[i]) | |
400 | return -ENOMEM; | |
401 | ||
402 | for (j = 0; j < BNXT_HWRM_REQS_PER_PAGE && k < num_vfs; j++) { | |
403 | struct bnxt_vf_info *vf = &bp->pf.vf[k]; | |
404 | ||
405 | vf->hwrm_cmd_req_addr = bp->pf.hwrm_cmd_req_addr[i] + | |
406 | j * BNXT_HWRM_REQ_MAX_SIZE; | |
407 | vf->hwrm_cmd_req_dma_addr = | |
408 | bp->pf.hwrm_cmd_req_dma_addr[i] + j * | |
409 | BNXT_HWRM_REQ_MAX_SIZE; | |
410 | k++; | |
411 | } | |
412 | } | |
413 | ||
414 | /* Max 128 VF's */ | |
415 | bp->pf.vf_event_bmap = kzalloc(16, GFP_KERNEL); | |
416 | if (!bp->pf.vf_event_bmap) | |
417 | return -ENOMEM; | |
418 | ||
419 | bp->pf.hwrm_cmd_req_pages = nr_pages; | |
420 | return 0; | |
421 | } | |
422 | ||
423 | static int bnxt_hwrm_func_buf_rgtr(struct bnxt *bp) | |
424 | { | |
425 | struct hwrm_func_buf_rgtr_input req = {0}; | |
426 | ||
427 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_BUF_RGTR, -1, -1); | |
428 | ||
429 | req.req_buf_num_pages = cpu_to_le16(bp->pf.hwrm_cmd_req_pages); | |
430 | req.req_buf_page_size = cpu_to_le16(BNXT_PAGE_SHIFT); | |
431 | req.req_buf_len = cpu_to_le16(BNXT_HWRM_REQ_MAX_SIZE); | |
432 | req.req_buf_page_addr0 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[0]); | |
433 | req.req_buf_page_addr1 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[1]); | |
434 | req.req_buf_page_addr2 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[2]); | |
435 | req.req_buf_page_addr3 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[3]); | |
436 | ||
437 | return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
438 | } | |
439 | ||
4673d664 MC |
440 | /* Only called by PF to reserve resources for VFs, returns actual number of |
441 | * VFs configured, or < 0 on error. | |
442 | */ | |
443 | static int bnxt_hwrm_func_vf_resc_cfg(struct bnxt *bp, int num_vfs) | |
444 | { | |
445 | struct hwrm_func_vf_resource_cfg_input req = {0}; | |
446 | struct bnxt_hw_resc *hw_resc = &bp->hw_resc; | |
447 | u16 vf_tx_rings, vf_rx_rings, vf_cp_rings; | |
448 | u16 vf_stat_ctx, vf_vnics, vf_ring_grps; | |
449 | struct bnxt_pf_info *pf = &bp->pf; | |
bf82736d | 450 | int i, rc = 0, min = 1; |
4673d664 MC |
451 | |
452 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_VF_RESOURCE_CFG, -1, -1); | |
453 | ||
00fe9c32 | 454 | vf_cp_rings = bnxt_get_max_func_cp_rings_for_en(bp) - bp->cp_nr_rings; |
4673d664 MC |
455 | vf_stat_ctx = hw_resc->max_stat_ctxs - bp->num_stat_ctxs; |
456 | if (bp->flags & BNXT_FLAG_AGG_RINGS) | |
457 | vf_rx_rings = hw_resc->max_rx_rings - bp->rx_nr_rings * 2; | |
458 | else | |
459 | vf_rx_rings = hw_resc->max_rx_rings - bp->rx_nr_rings; | |
460 | vf_ring_grps = hw_resc->max_hw_ring_grps - bp->rx_nr_rings; | |
461 | vf_tx_rings = hw_resc->max_tx_rings - bp->tx_nr_rings; | |
462 | vf_vnics = hw_resc->max_vnics - bp->nr_vnics; | |
463 | vf_vnics = min_t(u16, vf_vnics, vf_rx_rings); | |
464 | ||
86c3380d MC |
465 | req.min_rsscos_ctx = cpu_to_le16(BNXT_VF_MIN_RSS_CTX); |
466 | req.max_rsscos_ctx = cpu_to_le16(BNXT_VF_MAX_RSS_CTX); | |
bf82736d MC |
467 | if (pf->vf_resv_strategy == BNXT_VF_RESV_STRATEGY_MINIMAL_STATIC) { |
468 | min = 0; | |
469 | req.min_rsscos_ctx = cpu_to_le16(min); | |
470 | } | |
471 | if (pf->vf_resv_strategy == BNXT_VF_RESV_STRATEGY_MINIMAL || | |
472 | pf->vf_resv_strategy == BNXT_VF_RESV_STRATEGY_MINIMAL_STATIC) { | |
473 | req.min_cmpl_rings = cpu_to_le16(min); | |
474 | req.min_tx_rings = cpu_to_le16(min); | |
475 | req.min_rx_rings = cpu_to_le16(min); | |
476 | req.min_l2_ctxs = cpu_to_le16(min); | |
477 | req.min_vnics = cpu_to_le16(min); | |
478 | req.min_stat_ctx = cpu_to_le16(min); | |
479 | req.min_hw_ring_grps = cpu_to_le16(min); | |
4673d664 MC |
480 | } else { |
481 | vf_cp_rings /= num_vfs; | |
482 | vf_tx_rings /= num_vfs; | |
483 | vf_rx_rings /= num_vfs; | |
484 | vf_vnics /= num_vfs; | |
485 | vf_stat_ctx /= num_vfs; | |
486 | vf_ring_grps /= num_vfs; | |
487 | ||
488 | req.min_cmpl_rings = cpu_to_le16(vf_cp_rings); | |
489 | req.min_tx_rings = cpu_to_le16(vf_tx_rings); | |
490 | req.min_rx_rings = cpu_to_le16(vf_rx_rings); | |
86c3380d | 491 | req.min_l2_ctxs = cpu_to_le16(BNXT_VF_MAX_L2_CTX); |
4673d664 MC |
492 | req.min_vnics = cpu_to_le16(vf_vnics); |
493 | req.min_stat_ctx = cpu_to_le16(vf_stat_ctx); | |
494 | req.min_hw_ring_grps = cpu_to_le16(vf_ring_grps); | |
495 | } | |
496 | req.max_cmpl_rings = cpu_to_le16(vf_cp_rings); | |
497 | req.max_tx_rings = cpu_to_le16(vf_tx_rings); | |
498 | req.max_rx_rings = cpu_to_le16(vf_rx_rings); | |
86c3380d | 499 | req.max_l2_ctxs = cpu_to_le16(BNXT_VF_MAX_L2_CTX); |
4673d664 MC |
500 | req.max_vnics = cpu_to_le16(vf_vnics); |
501 | req.max_stat_ctx = cpu_to_le16(vf_stat_ctx); | |
502 | req.max_hw_ring_grps = cpu_to_le16(vf_ring_grps); | |
503 | ||
504 | mutex_lock(&bp->hwrm_cmd_lock); | |
505 | for (i = 0; i < num_vfs; i++) { | |
506 | req.vf_id = cpu_to_le16(pf->first_vf_id + i); | |
507 | rc = _hwrm_send_message(bp, &req, sizeof(req), | |
508 | HWRM_CMD_TIMEOUT); | |
509 | if (rc) { | |
510 | rc = -ENOMEM; | |
511 | break; | |
512 | } | |
513 | pf->active_vfs = i + 1; | |
514 | pf->vf[i].fw_fid = pf->first_vf_id + i; | |
515 | } | |
516 | mutex_unlock(&bp->hwrm_cmd_lock); | |
517 | if (pf->active_vfs) { | |
596f9d55 | 518 | u16 n = pf->active_vfs; |
4673d664 | 519 | |
596f9d55 MC |
520 | hw_resc->max_tx_rings -= le16_to_cpu(req.min_tx_rings) * n; |
521 | hw_resc->max_rx_rings -= le16_to_cpu(req.min_rx_rings) * n; | |
522 | hw_resc->max_hw_ring_grps -= le16_to_cpu(req.min_hw_ring_grps) * | |
523 | n; | |
524 | hw_resc->max_cp_rings -= le16_to_cpu(req.min_cmpl_rings) * n; | |
4673d664 | 525 | hw_resc->max_rsscos_ctxs -= pf->active_vfs; |
596f9d55 MC |
526 | hw_resc->max_stat_ctxs -= le16_to_cpu(req.min_stat_ctx) * n; |
527 | hw_resc->max_vnics -= le16_to_cpu(req.min_vnics) * n; | |
4673d664 MC |
528 | |
529 | rc = pf->active_vfs; | |
530 | } | |
531 | return rc; | |
532 | } | |
533 | ||
534 | /* Only called by PF to reserve resources for VFs, returns actual number of | |
535 | * VFs configured, or < 0 on error. | |
536 | */ | |
92268c32 | 537 | static int bnxt_hwrm_func_cfg(struct bnxt *bp, int num_vfs) |
c0c050c5 MC |
538 | { |
539 | u32 rc = 0, mtu, i; | |
540 | u16 vf_tx_rings, vf_rx_rings, vf_cp_rings, vf_stat_ctx, vf_vnics; | |
6a4f2947 MC |
541 | struct bnxt_hw_resc *hw_resc = &bp->hw_resc; |
542 | u16 vf_ring_grps, max_stat_ctxs; | |
c0c050c5 MC |
543 | struct hwrm_func_cfg_input req = {0}; |
544 | struct bnxt_pf_info *pf = &bp->pf; | |
391be5c2 | 545 | int total_vf_tx_rings = 0; |
c0c050c5 MC |
546 | |
547 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1); | |
548 | ||
6a4f2947 MC |
549 | max_stat_ctxs = hw_resc->max_stat_ctxs; |
550 | ||
c0c050c5 | 551 | /* Remaining rings are distributed equally amongs VF's for now */ |
00fe9c32 MC |
552 | vf_cp_rings = (bnxt_get_max_func_cp_rings_for_en(bp) - |
553 | bp->cp_nr_rings) / num_vfs; | |
6a4f2947 | 554 | vf_stat_ctx = (max_stat_ctxs - bp->num_stat_ctxs) / num_vfs; |
c0c050c5 | 555 | if (bp->flags & BNXT_FLAG_AGG_RINGS) |
6a4f2947 | 556 | vf_rx_rings = (hw_resc->max_rx_rings - bp->rx_nr_rings * 2) / |
92268c32 | 557 | num_vfs; |
c0c050c5 | 558 | else |
6a4f2947 MC |
559 | vf_rx_rings = (hw_resc->max_rx_rings - bp->rx_nr_rings) / |
560 | num_vfs; | |
561 | vf_ring_grps = (hw_resc->max_hw_ring_grps - bp->rx_nr_rings) / num_vfs; | |
562 | vf_tx_rings = (hw_resc->max_tx_rings - bp->tx_nr_rings) / num_vfs; | |
563 | vf_vnics = (hw_resc->max_vnics - bp->nr_vnics) / num_vfs; | |
8427af81 | 564 | vf_vnics = min_t(u16, vf_vnics, vf_rx_rings); |
c0c050c5 MC |
565 | |
566 | req.enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_MTU | | |
567 | FUNC_CFG_REQ_ENABLES_MRU | | |
568 | FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS | | |
569 | FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS | | |
570 | FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS | | |
571 | FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS | | |
572 | FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS | | |
573 | FUNC_CFG_REQ_ENABLES_NUM_L2_CTXS | | |
b72d4a68 MC |
574 | FUNC_CFG_REQ_ENABLES_NUM_VNICS | |
575 | FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS); | |
c0c050c5 MC |
576 | |
577 | mtu = bp->dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; | |
578 | req.mru = cpu_to_le16(mtu); | |
579 | req.mtu = cpu_to_le16(mtu); | |
580 | ||
581 | req.num_rsscos_ctxs = cpu_to_le16(1); | |
582 | req.num_cmpl_rings = cpu_to_le16(vf_cp_rings); | |
583 | req.num_tx_rings = cpu_to_le16(vf_tx_rings); | |
584 | req.num_rx_rings = cpu_to_le16(vf_rx_rings); | |
b72d4a68 | 585 | req.num_hw_ring_grps = cpu_to_le16(vf_ring_grps); |
c0c050c5 | 586 | req.num_l2_ctxs = cpu_to_le16(4); |
c0c050c5 MC |
587 | |
588 | req.num_vnics = cpu_to_le16(vf_vnics); | |
589 | /* FIXME spec currently uses 1 bit for stats ctx */ | |
590 | req.num_stat_ctxs = cpu_to_le16(vf_stat_ctx); | |
591 | ||
592 | mutex_lock(&bp->hwrm_cmd_lock); | |
92268c32 | 593 | for (i = 0; i < num_vfs; i++) { |
391be5c2 MC |
594 | int vf_tx_rsvd = vf_tx_rings; |
595 | ||
c193554e | 596 | req.fid = cpu_to_le16(pf->first_vf_id + i); |
c0c050c5 MC |
597 | rc = _hwrm_send_message(bp, &req, sizeof(req), |
598 | HWRM_CMD_TIMEOUT); | |
599 | if (rc) | |
600 | break; | |
92268c32 | 601 | pf->active_vfs = i + 1; |
c193554e | 602 | pf->vf[i].fw_fid = le16_to_cpu(req.fid); |
391be5c2 MC |
603 | rc = __bnxt_hwrm_get_tx_rings(bp, pf->vf[i].fw_fid, |
604 | &vf_tx_rsvd); | |
605 | if (rc) | |
606 | break; | |
607 | total_vf_tx_rings += vf_tx_rsvd; | |
c0c050c5 MC |
608 | } |
609 | mutex_unlock(&bp->hwrm_cmd_lock); | |
4673d664 MC |
610 | if (rc) |
611 | rc = -ENOMEM; | |
612 | if (pf->active_vfs) { | |
6a4f2947 MC |
613 | hw_resc->max_tx_rings -= total_vf_tx_rings; |
614 | hw_resc->max_rx_rings -= vf_rx_rings * num_vfs; | |
615 | hw_resc->max_hw_ring_grps -= vf_ring_grps * num_vfs; | |
616 | hw_resc->max_cp_rings -= vf_cp_rings * num_vfs; | |
617 | hw_resc->max_rsscos_ctxs -= num_vfs; | |
618 | hw_resc->max_stat_ctxs -= vf_stat_ctx * num_vfs; | |
619 | hw_resc->max_vnics -= vf_vnics * num_vfs; | |
4673d664 | 620 | rc = pf->active_vfs; |
c0c050c5 MC |
621 | } |
622 | return rc; | |
623 | } | |
624 | ||
4673d664 MC |
625 | static int bnxt_func_cfg(struct bnxt *bp, int num_vfs) |
626 | { | |
f1ca94de | 627 | if (BNXT_NEW_RM(bp)) |
4673d664 MC |
628 | return bnxt_hwrm_func_vf_resc_cfg(bp, num_vfs); |
629 | else | |
630 | return bnxt_hwrm_func_cfg(bp, num_vfs); | |
631 | } | |
632 | ||
c0c050c5 MC |
633 | static int bnxt_sriov_enable(struct bnxt *bp, int *num_vfs) |
634 | { | |
635 | int rc = 0, vfs_supported; | |
636 | int min_rx_rings, min_tx_rings, min_rss_ctxs; | |
6a4f2947 | 637 | struct bnxt_hw_resc *hw_resc = &bp->hw_resc; |
c0c050c5 | 638 | int tx_ok = 0, rx_ok = 0, rss_ok = 0; |
02157079 | 639 | int avail_cp, avail_stat; |
c0c050c5 MC |
640 | |
641 | /* Check if we can enable requested num of vf's. At a mininum | |
642 | * we require 1 RX 1 TX rings for each VF. In this minimum conf | |
643 | * features like TPA will not be available. | |
644 | */ | |
645 | vfs_supported = *num_vfs; | |
646 | ||
00fe9c32 | 647 | avail_cp = bnxt_get_max_func_cp_rings_for_en(bp) - bp->cp_nr_rings; |
6a4f2947 | 648 | avail_stat = hw_resc->max_stat_ctxs - bp->num_stat_ctxs; |
02157079 MC |
649 | avail_cp = min_t(int, avail_cp, avail_stat); |
650 | ||
c0c050c5 MC |
651 | while (vfs_supported) { |
652 | min_rx_rings = vfs_supported; | |
653 | min_tx_rings = vfs_supported; | |
654 | min_rss_ctxs = vfs_supported; | |
655 | ||
656 | if (bp->flags & BNXT_FLAG_AGG_RINGS) { | |
6a4f2947 | 657 | if (hw_resc->max_rx_rings - bp->rx_nr_rings * 2 >= |
c0c050c5 MC |
658 | min_rx_rings) |
659 | rx_ok = 1; | |
660 | } else { | |
6a4f2947 | 661 | if (hw_resc->max_rx_rings - bp->rx_nr_rings >= |
c0c050c5 MC |
662 | min_rx_rings) |
663 | rx_ok = 1; | |
664 | } | |
6a4f2947 | 665 | if (hw_resc->max_vnics - bp->nr_vnics < min_rx_rings || |
02157079 | 666 | avail_cp < min_rx_rings) |
8427af81 | 667 | rx_ok = 0; |
c0c050c5 | 668 | |
6a4f2947 | 669 | if (hw_resc->max_tx_rings - bp->tx_nr_rings >= min_tx_rings && |
02157079 | 670 | avail_cp >= min_tx_rings) |
c0c050c5 MC |
671 | tx_ok = 1; |
672 | ||
6a4f2947 MC |
673 | if (hw_resc->max_rsscos_ctxs - bp->rsscos_nr_ctxs >= |
674 | min_rss_ctxs) | |
c0c050c5 MC |
675 | rss_ok = 1; |
676 | ||
677 | if (tx_ok && rx_ok && rss_ok) | |
678 | break; | |
679 | ||
680 | vfs_supported--; | |
681 | } | |
682 | ||
683 | if (!vfs_supported) { | |
684 | netdev_err(bp->dev, "Cannot enable VF's as all resources are used by PF\n"); | |
685 | return -EINVAL; | |
686 | } | |
687 | ||
688 | if (vfs_supported != *num_vfs) { | |
689 | netdev_info(bp->dev, "Requested VFs %d, can enable %d\n", | |
690 | *num_vfs, vfs_supported); | |
691 | *num_vfs = vfs_supported; | |
692 | } | |
693 | ||
694 | rc = bnxt_alloc_vf_resources(bp, *num_vfs); | |
695 | if (rc) | |
696 | goto err_out1; | |
697 | ||
698 | /* Reserve resources for VFs */ | |
4673d664 MC |
699 | rc = bnxt_func_cfg(bp, *num_vfs); |
700 | if (rc != *num_vfs) { | |
701 | if (rc <= 0) { | |
702 | netdev_warn(bp->dev, "Unable to reserve resources for SRIOV.\n"); | |
703 | *num_vfs = 0; | |
704 | goto err_out2; | |
705 | } | |
706 | netdev_warn(bp->dev, "Only able to reserve resources for %d VFs.\n", rc); | |
707 | *num_vfs = rc; | |
708 | } | |
c0c050c5 MC |
709 | |
710 | /* Register buffers for VFs */ | |
711 | rc = bnxt_hwrm_func_buf_rgtr(bp); | |
712 | if (rc) | |
713 | goto err_out2; | |
714 | ||
2f593846 MC |
715 | bnxt_ulp_sriov_cfg(bp, *num_vfs); |
716 | ||
c0c050c5 MC |
717 | rc = pci_enable_sriov(bp->pdev, *num_vfs); |
718 | if (rc) | |
719 | goto err_out2; | |
720 | ||
721 | return 0; | |
722 | ||
723 | err_out2: | |
724 | /* Free the resources reserved for various VF's */ | |
4bb6cdce | 725 | bnxt_hwrm_func_vf_resource_free(bp, *num_vfs); |
c0c050c5 MC |
726 | |
727 | err_out1: | |
728 | bnxt_free_vf_resources(bp); | |
729 | ||
730 | return rc; | |
731 | } | |
732 | ||
733 | void bnxt_sriov_disable(struct bnxt *bp) | |
734 | { | |
4bb6cdce | 735 | u16 num_vfs = pci_num_vf(bp->pdev); |
c0c050c5 | 736 | |
4bb6cdce JH |
737 | if (!num_vfs) |
738 | return; | |
c0c050c5 | 739 | |
4ab0c6a8 SP |
740 | /* synchronize VF and VF-rep create and destroy */ |
741 | mutex_lock(&bp->sriov_lock); | |
742 | bnxt_vf_reps_destroy(bp); | |
743 | ||
4bb6cdce | 744 | if (pci_vfs_assigned(bp->pdev)) { |
19241368 | 745 | bnxt_hwrm_fwd_async_event_cmpl( |
87c374de | 746 | bp, NULL, ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD); |
4bb6cdce JH |
747 | netdev_warn(bp->dev, "Unable to free %d VFs because some are assigned to VMs.\n", |
748 | num_vfs); | |
749 | } else { | |
750 | pci_disable_sriov(bp->pdev); | |
751 | /* Free the HW resources reserved for various VF's */ | |
752 | bnxt_hwrm_func_vf_resource_free(bp, num_vfs); | |
753 | } | |
4ab0c6a8 | 754 | mutex_unlock(&bp->sriov_lock); |
c0c050c5 MC |
755 | |
756 | bnxt_free_vf_resources(bp); | |
757 | ||
758 | bp->pf.active_vfs = 0; | |
4a21b49b | 759 | /* Reclaim all resources for the PF. */ |
7b08f661 MC |
760 | rtnl_lock(); |
761 | bnxt_restore_pf_fw_resources(bp); | |
762 | rtnl_unlock(); | |
2f593846 MC |
763 | |
764 | bnxt_ulp_sriov_cfg(bp, 0); | |
c0c050c5 MC |
765 | } |
766 | ||
767 | int bnxt_sriov_configure(struct pci_dev *pdev, int num_vfs) | |
768 | { | |
769 | struct net_device *dev = pci_get_drvdata(pdev); | |
770 | struct bnxt *bp = netdev_priv(dev); | |
771 | ||
772 | if (!(bp->flags & BNXT_FLAG_USING_MSIX)) { | |
773 | netdev_warn(dev, "Not allow SRIOV if the irq mode is not MSIX\n"); | |
774 | return 0; | |
775 | } | |
776 | ||
777 | rtnl_lock(); | |
778 | if (!netif_running(dev)) { | |
779 | netdev_warn(dev, "Reject SRIOV config request since if is down!\n"); | |
780 | rtnl_unlock(); | |
781 | return 0; | |
782 | } | |
783 | bp->sriov_cfg = true; | |
784 | rtnl_unlock(); | |
4bb6cdce JH |
785 | |
786 | if (pci_vfs_assigned(bp->pdev)) { | |
787 | netdev_warn(dev, "Unable to configure SRIOV since some VFs are assigned to VMs.\n"); | |
788 | num_vfs = 0; | |
789 | goto sriov_cfg_exit; | |
c0c050c5 MC |
790 | } |
791 | ||
792 | /* Check if enabled VFs is same as requested */ | |
4bb6cdce JH |
793 | if (num_vfs && num_vfs == bp->pf.active_vfs) |
794 | goto sriov_cfg_exit; | |
795 | ||
796 | /* if there are previous existing VFs, clean them up */ | |
797 | bnxt_sriov_disable(bp); | |
798 | if (!num_vfs) | |
799 | goto sriov_cfg_exit; | |
c0c050c5 MC |
800 | |
801 | bnxt_sriov_enable(bp, &num_vfs); | |
802 | ||
4bb6cdce | 803 | sriov_cfg_exit: |
c0c050c5 MC |
804 | bp->sriov_cfg = false; |
805 | wake_up(&bp->sriov_cfg_wait); | |
806 | ||
807 | return num_vfs; | |
808 | } | |
809 | ||
810 | static int bnxt_hwrm_fwd_resp(struct bnxt *bp, struct bnxt_vf_info *vf, | |
811 | void *encap_resp, __le64 encap_resp_addr, | |
812 | __le16 encap_resp_cpr, u32 msg_size) | |
813 | { | |
814 | int rc = 0; | |
815 | struct hwrm_fwd_resp_input req = {0}; | |
816 | struct hwrm_fwd_resp_output *resp = bp->hwrm_cmd_resp_addr; | |
817 | ||
59895f59 MC |
818 | if (BNXT_FWD_RESP_SIZE_ERR(msg_size)) |
819 | return -EINVAL; | |
820 | ||
c0c050c5 MC |
821 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FWD_RESP, -1, -1); |
822 | ||
823 | /* Set the new target id */ | |
824 | req.target_id = cpu_to_le16(vf->fw_fid); | |
c193554e | 825 | req.encap_resp_target_id = cpu_to_le16(vf->fw_fid); |
c0c050c5 MC |
826 | req.encap_resp_len = cpu_to_le16(msg_size); |
827 | req.encap_resp_addr = encap_resp_addr; | |
828 | req.encap_resp_cmpl_ring = encap_resp_cpr; | |
829 | memcpy(req.encap_resp, encap_resp, msg_size); | |
830 | ||
831 | mutex_lock(&bp->hwrm_cmd_lock); | |
832 | rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
833 | ||
834 | if (rc) { | |
835 | netdev_err(bp->dev, "hwrm_fwd_resp failed. rc:%d\n", rc); | |
836 | goto fwd_resp_exit; | |
837 | } | |
838 | ||
839 | if (resp->error_code) { | |
840 | netdev_err(bp->dev, "hwrm_fwd_resp error %d\n", | |
841 | resp->error_code); | |
842 | rc = -1; | |
843 | } | |
844 | ||
845 | fwd_resp_exit: | |
846 | mutex_unlock(&bp->hwrm_cmd_lock); | |
847 | return rc; | |
848 | } | |
849 | ||
850 | static int bnxt_hwrm_fwd_err_resp(struct bnxt *bp, struct bnxt_vf_info *vf, | |
851 | u32 msg_size) | |
852 | { | |
853 | int rc = 0; | |
854 | struct hwrm_reject_fwd_resp_input req = {0}; | |
855 | struct hwrm_reject_fwd_resp_output *resp = bp->hwrm_cmd_resp_addr; | |
856 | ||
59895f59 MC |
857 | if (BNXT_REJ_FWD_RESP_SIZE_ERR(msg_size)) |
858 | return -EINVAL; | |
859 | ||
c0c050c5 MC |
860 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_REJECT_FWD_RESP, -1, -1); |
861 | /* Set the new target id */ | |
862 | req.target_id = cpu_to_le16(vf->fw_fid); | |
c193554e | 863 | req.encap_resp_target_id = cpu_to_le16(vf->fw_fid); |
c0c050c5 MC |
864 | memcpy(req.encap_request, vf->hwrm_cmd_req_addr, msg_size); |
865 | ||
866 | mutex_lock(&bp->hwrm_cmd_lock); | |
867 | rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
868 | ||
869 | if (rc) { | |
870 | netdev_err(bp->dev, "hwrm_fwd_err_resp failed. rc:%d\n", rc); | |
871 | goto fwd_err_resp_exit; | |
872 | } | |
873 | ||
874 | if (resp->error_code) { | |
875 | netdev_err(bp->dev, "hwrm_fwd_err_resp error %d\n", | |
876 | resp->error_code); | |
877 | rc = -1; | |
878 | } | |
879 | ||
880 | fwd_err_resp_exit: | |
881 | mutex_unlock(&bp->hwrm_cmd_lock); | |
882 | return rc; | |
883 | } | |
884 | ||
885 | static int bnxt_hwrm_exec_fwd_resp(struct bnxt *bp, struct bnxt_vf_info *vf, | |
886 | u32 msg_size) | |
887 | { | |
888 | int rc = 0; | |
889 | struct hwrm_exec_fwd_resp_input req = {0}; | |
890 | struct hwrm_exec_fwd_resp_output *resp = bp->hwrm_cmd_resp_addr; | |
891 | ||
59895f59 MC |
892 | if (BNXT_EXEC_FWD_RESP_SIZE_ERR(msg_size)) |
893 | return -EINVAL; | |
894 | ||
c0c050c5 MC |
895 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_EXEC_FWD_RESP, -1, -1); |
896 | /* Set the new target id */ | |
897 | req.target_id = cpu_to_le16(vf->fw_fid); | |
c193554e | 898 | req.encap_resp_target_id = cpu_to_le16(vf->fw_fid); |
c0c050c5 MC |
899 | memcpy(req.encap_request, vf->hwrm_cmd_req_addr, msg_size); |
900 | ||
901 | mutex_lock(&bp->hwrm_cmd_lock); | |
902 | rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
903 | ||
904 | if (rc) { | |
905 | netdev_err(bp->dev, "hwrm_exec_fw_resp failed. rc:%d\n", rc); | |
906 | goto exec_fwd_resp_exit; | |
907 | } | |
908 | ||
909 | if (resp->error_code) { | |
910 | netdev_err(bp->dev, "hwrm_exec_fw_resp error %d\n", | |
911 | resp->error_code); | |
912 | rc = -1; | |
913 | } | |
914 | ||
915 | exec_fwd_resp_exit: | |
916 | mutex_unlock(&bp->hwrm_cmd_lock); | |
917 | return rc; | |
918 | } | |
919 | ||
746df139 | 920 | static int bnxt_vf_configure_mac(struct bnxt *bp, struct bnxt_vf_info *vf) |
91cdda40 VV |
921 | { |
922 | u32 msg_size = sizeof(struct hwrm_func_vf_cfg_input); | |
923 | struct hwrm_func_vf_cfg_input *req = | |
924 | (struct hwrm_func_vf_cfg_input *)vf->hwrm_cmd_req_addr; | |
925 | ||
746df139 VV |
926 | /* Allow VF to set a valid MAC address, if trust is set to on or |
927 | * if the PF assigned MAC address is zero | |
91cdda40 VV |
928 | */ |
929 | if (req->enables & cpu_to_le32(FUNC_VF_CFG_REQ_ENABLES_DFLT_MAC_ADDR)) { | |
930 | if (is_valid_ether_addr(req->dflt_mac_addr) && | |
746df139 | 931 | ((vf->flags & BNXT_VF_TRUST) || |
707e7e96 MC |
932 | !is_valid_ether_addr(vf->mac_addr) || |
933 | ether_addr_equal(req->dflt_mac_addr, vf->mac_addr))) { | |
91cdda40 VV |
934 | ether_addr_copy(vf->vf_mac_addr, req->dflt_mac_addr); |
935 | return bnxt_hwrm_exec_fwd_resp(bp, vf, msg_size); | |
936 | } | |
937 | return bnxt_hwrm_fwd_err_resp(bp, vf, msg_size); | |
938 | } | |
939 | return bnxt_hwrm_exec_fwd_resp(bp, vf, msg_size); | |
940 | } | |
941 | ||
c0c050c5 MC |
942 | static int bnxt_vf_validate_set_mac(struct bnxt *bp, struct bnxt_vf_info *vf) |
943 | { | |
944 | u32 msg_size = sizeof(struct hwrm_cfa_l2_filter_alloc_input); | |
945 | struct hwrm_cfa_l2_filter_alloc_input *req = | |
946 | (struct hwrm_cfa_l2_filter_alloc_input *)vf->hwrm_cmd_req_addr; | |
91cdda40 | 947 | bool mac_ok = false; |
c0c050c5 | 948 | |
746df139 VV |
949 | if (!is_valid_ether_addr((const u8 *)req->l2_addr)) |
950 | return bnxt_hwrm_fwd_err_resp(bp, vf, msg_size); | |
951 | ||
952 | /* Allow VF to set a valid MAC address, if trust is set to on. | |
953 | * Or VF MAC address must first match MAC address in PF's context. | |
91cdda40 VV |
954 | * Otherwise, it must match the VF MAC address if firmware spec >= |
955 | * 1.2.2 | |
956 | */ | |
746df139 VV |
957 | if (vf->flags & BNXT_VF_TRUST) { |
958 | mac_ok = true; | |
959 | } else if (is_valid_ether_addr(vf->mac_addr)) { | |
91cdda40 VV |
960 | if (ether_addr_equal((const u8 *)req->l2_addr, vf->mac_addr)) |
961 | mac_ok = true; | |
962 | } else if (is_valid_ether_addr(vf->vf_mac_addr)) { | |
963 | if (ether_addr_equal((const u8 *)req->l2_addr, vf->vf_mac_addr)) | |
964 | mac_ok = true; | |
91cdda40 | 965 | } else { |
6fd544c8 Y |
966 | /* There are two cases: |
967 | * 1.If firmware spec < 0x10202,VF MAC address is not forwarded | |
968 | * to the PF and so it doesn't have to match | |
969 | * 2.Allow VF to modify it's own MAC when PF has not assigned a | |
970 | * valid MAC address and firmware spec >= 0x10202 | |
971 | */ | |
91cdda40 VV |
972 | mac_ok = true; |
973 | } | |
974 | if (mac_ok) | |
c0c050c5 | 975 | return bnxt_hwrm_exec_fwd_resp(bp, vf, msg_size); |
91cdda40 | 976 | return bnxt_hwrm_fwd_err_resp(bp, vf, msg_size); |
c0c050c5 MC |
977 | } |
978 | ||
979 | static int bnxt_vf_set_link(struct bnxt *bp, struct bnxt_vf_info *vf) | |
980 | { | |
981 | int rc = 0; | |
982 | ||
983 | if (!(vf->flags & BNXT_VF_LINK_FORCED)) { | |
984 | /* real link */ | |
985 | rc = bnxt_hwrm_exec_fwd_resp( | |
986 | bp, vf, sizeof(struct hwrm_port_phy_qcfg_input)); | |
987 | } else { | |
988 | struct hwrm_port_phy_qcfg_output phy_qcfg_resp; | |
989 | struct hwrm_port_phy_qcfg_input *phy_qcfg_req; | |
990 | ||
991 | phy_qcfg_req = | |
992 | (struct hwrm_port_phy_qcfg_input *)vf->hwrm_cmd_req_addr; | |
993 | mutex_lock(&bp->hwrm_cmd_lock); | |
994 | memcpy(&phy_qcfg_resp, &bp->link_info.phy_qcfg_resp, | |
995 | sizeof(phy_qcfg_resp)); | |
996 | mutex_unlock(&bp->hwrm_cmd_lock); | |
845adfe4 | 997 | phy_qcfg_resp.resp_len = cpu_to_le16(sizeof(phy_qcfg_resp)); |
c0c050c5 | 998 | phy_qcfg_resp.seq_id = phy_qcfg_req->seq_id; |
845adfe4 | 999 | phy_qcfg_resp.valid = 1; |
c0c050c5 MC |
1000 | |
1001 | if (vf->flags & BNXT_VF_LINK_UP) { | |
1002 | /* if physical link is down, force link up on VF */ | |
73b9bad6 MC |
1003 | if (phy_qcfg_resp.link != |
1004 | PORT_PHY_QCFG_RESP_LINK_LINK) { | |
c0c050c5 MC |
1005 | phy_qcfg_resp.link = |
1006 | PORT_PHY_QCFG_RESP_LINK_LINK; | |
11f15ed3 MC |
1007 | phy_qcfg_resp.link_speed = cpu_to_le16( |
1008 | PORT_PHY_QCFG_RESP_LINK_SPEED_10GB); | |
acb20054 MC |
1009 | phy_qcfg_resp.duplex_cfg = |
1010 | PORT_PHY_QCFG_RESP_DUPLEX_CFG_FULL; | |
1011 | phy_qcfg_resp.duplex_state = | |
1012 | PORT_PHY_QCFG_RESP_DUPLEX_STATE_FULL; | |
c0c050c5 MC |
1013 | phy_qcfg_resp.pause = |
1014 | (PORT_PHY_QCFG_RESP_PAUSE_TX | | |
1015 | PORT_PHY_QCFG_RESP_PAUSE_RX); | |
1016 | } | |
1017 | } else { | |
1018 | /* force link down */ | |
1019 | phy_qcfg_resp.link = PORT_PHY_QCFG_RESP_LINK_NO_LINK; | |
1020 | phy_qcfg_resp.link_speed = 0; | |
acb20054 MC |
1021 | phy_qcfg_resp.duplex_state = |
1022 | PORT_PHY_QCFG_RESP_DUPLEX_STATE_HALF; | |
c0c050c5 MC |
1023 | phy_qcfg_resp.pause = 0; |
1024 | } | |
1025 | rc = bnxt_hwrm_fwd_resp(bp, vf, &phy_qcfg_resp, | |
1026 | phy_qcfg_req->resp_addr, | |
1027 | phy_qcfg_req->cmpl_ring, | |
1028 | sizeof(phy_qcfg_resp)); | |
1029 | } | |
1030 | return rc; | |
1031 | } | |
1032 | ||
1033 | static int bnxt_vf_req_validate_snd(struct bnxt *bp, struct bnxt_vf_info *vf) | |
1034 | { | |
1035 | int rc = 0; | |
a8643e16 MC |
1036 | struct input *encap_req = vf->hwrm_cmd_req_addr; |
1037 | u32 req_type = le16_to_cpu(encap_req->req_type); | |
c0c050c5 MC |
1038 | |
1039 | switch (req_type) { | |
91cdda40 | 1040 | case HWRM_FUNC_VF_CFG: |
746df139 | 1041 | rc = bnxt_vf_configure_mac(bp, vf); |
91cdda40 | 1042 | break; |
c0c050c5 MC |
1043 | case HWRM_CFA_L2_FILTER_ALLOC: |
1044 | rc = bnxt_vf_validate_set_mac(bp, vf); | |
1045 | break; | |
1046 | case HWRM_FUNC_CFG: | |
1047 | /* TODO Validate if VF is allowed to change mac address, | |
1048 | * mtu, num of rings etc | |
1049 | */ | |
1050 | rc = bnxt_hwrm_exec_fwd_resp( | |
1051 | bp, vf, sizeof(struct hwrm_func_cfg_input)); | |
1052 | break; | |
1053 | case HWRM_PORT_PHY_QCFG: | |
1054 | rc = bnxt_vf_set_link(bp, vf); | |
1055 | break; | |
1056 | default: | |
1057 | break; | |
1058 | } | |
1059 | return rc; | |
1060 | } | |
1061 | ||
1062 | void bnxt_hwrm_exec_fwd_req(struct bnxt *bp) | |
1063 | { | |
1064 | u32 i = 0, active_vfs = bp->pf.active_vfs, vf_id; | |
1065 | ||
1066 | /* Scan through VF's and process commands */ | |
1067 | while (1) { | |
1068 | vf_id = find_next_bit(bp->pf.vf_event_bmap, active_vfs, i); | |
1069 | if (vf_id >= active_vfs) | |
1070 | break; | |
1071 | ||
1072 | clear_bit(vf_id, bp->pf.vf_event_bmap); | |
1073 | bnxt_vf_req_validate_snd(bp, &bp->pf.vf[vf_id]); | |
1074 | i = vf_id + 1; | |
1075 | } | |
1076 | } | |
379a80a1 MC |
1077 | |
1078 | void bnxt_update_vf_mac(struct bnxt *bp) | |
1079 | { | |
1080 | struct hwrm_func_qcaps_input req = {0}; | |
1081 | struct hwrm_func_qcaps_output *resp = bp->hwrm_cmd_resp_addr; | |
1082 | ||
1083 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_QCAPS, -1, -1); | |
1084 | req.fid = cpu_to_le16(0xffff); | |
1085 | ||
1086 | mutex_lock(&bp->hwrm_cmd_lock); | |
1087 | if (_hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT)) | |
1088 | goto update_vf_mac_exit; | |
1089 | ||
3874d6a8 JH |
1090 | /* Store MAC address from the firmware. There are 2 cases: |
1091 | * 1. MAC address is valid. It is assigned from the PF and we | |
1092 | * need to override the current VF MAC address with it. | |
1093 | * 2. MAC address is zero. The VF will use a random MAC address by | |
1094 | * default but the stored zero MAC will allow the VF user to change | |
1095 | * the random MAC address using ndo_set_mac_address() if he wants. | |
1096 | */ | |
11f15ed3 MC |
1097 | if (!ether_addr_equal(resp->mac_address, bp->vf.mac_addr)) |
1098 | memcpy(bp->vf.mac_addr, resp->mac_address, ETH_ALEN); | |
3874d6a8 JH |
1099 | |
1100 | /* overwrite netdev dev_addr with admin VF MAC */ | |
1101 | if (is_valid_ether_addr(bp->vf.mac_addr)) | |
1102 | memcpy(bp->dev->dev_addr, bp->vf.mac_addr, ETH_ALEN); | |
379a80a1 MC |
1103 | update_vf_mac_exit: |
1104 | mutex_unlock(&bp->hwrm_cmd_lock); | |
1105 | } | |
1106 | ||
84c33dd3 MC |
1107 | int bnxt_approve_mac(struct bnxt *bp, u8 *mac) |
1108 | { | |
1109 | struct hwrm_func_vf_cfg_input req = {0}; | |
1110 | int rc = 0; | |
1111 | ||
1112 | if (!BNXT_VF(bp)) | |
1113 | return 0; | |
1114 | ||
1115 | if (bp->hwrm_spec_code < 0x10202) { | |
1116 | if (is_valid_ether_addr(bp->vf.mac_addr)) | |
1117 | rc = -EADDRNOTAVAIL; | |
1118 | goto mac_done; | |
1119 | } | |
1120 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_VF_CFG, -1, -1); | |
1121 | req.enables = cpu_to_le32(FUNC_VF_CFG_REQ_ENABLES_DFLT_MAC_ADDR); | |
1122 | memcpy(req.dflt_mac_addr, mac, ETH_ALEN); | |
1123 | rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
1124 | mac_done: | |
1125 | if (rc) { | |
1126 | rc = -EADDRNOTAVAIL; | |
1127 | netdev_warn(bp->dev, "VF MAC address %pM not approved by the PF\n", | |
1128 | mac); | |
1129 | } | |
1130 | return rc; | |
1131 | } | |
c0c050c5 MC |
1132 | #else |
1133 | ||
1134 | void bnxt_sriov_disable(struct bnxt *bp) | |
1135 | { | |
1136 | } | |
1137 | ||
1138 | void bnxt_hwrm_exec_fwd_req(struct bnxt *bp) | |
1139 | { | |
379a80a1 MC |
1140 | netdev_err(bp->dev, "Invalid VF message received when SRIOV is not enable\n"); |
1141 | } | |
1142 | ||
1143 | void bnxt_update_vf_mac(struct bnxt *bp) | |
1144 | { | |
c0c050c5 | 1145 | } |
84c33dd3 MC |
1146 | |
1147 | int bnxt_approve_mac(struct bnxt *bp, u8 *mac) | |
1148 | { | |
1149 | return 0; | |
1150 | } | |
c0c050c5 | 1151 | #endif |