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bnxt_en: Added support for Secure Firmware Update
[linux-2.6-block.git] / drivers / net / ethernet / broadcom / bnxt / bnxt_ethtool.c
CommitLineData
c0c050c5
MC		 1/* Broadcom NetXtreme-C/E network driver.
2 *
11f15ed3 3 * Copyright (c) 2014-2016 Broadcom Corporation
c0c050c5
MC		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 */
9
3ebf6f0a 10#include <linux/ctype.h>
8ddc9aaa 11#include <linux/stringify.h>
c0c050c5
MC		 12#include <linux/ethtool.h>
13#include <linux/interrupt.h>
14#include <linux/pci.h>
15#include <linux/etherdevice.h>
16#include <linux/crc32.h>
17#include <linux/firmware.h>
18#include "bnxt_hsi.h"
19#include "bnxt.h"
20#include "bnxt_ethtool.h"
21#include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
22#include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
23#define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100)
5ac67d8b
RS		 24#define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
25#define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
c0c050c5 26
3ebf6f0a
RS		 27static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen);
28
c0c050c5
MC		 29static u32 bnxt_get_msglevel(struct net_device *dev)
30{
31 struct bnxt *bp = netdev_priv(dev);
32
33 return bp->msg_enable;
34}
35
36static void bnxt_set_msglevel(struct net_device *dev, u32 value)
37{
38 struct bnxt *bp = netdev_priv(dev);
39
40 bp->msg_enable = value;
41}
42
43static int bnxt_get_coalesce(struct net_device *dev,
44 struct ethtool_coalesce *coal)
45{
46 struct bnxt *bp = netdev_priv(dev);
47
48 memset(coal, 0, sizeof(*coal));
49
dfb5b894
MC		 50 coal->rx_coalesce_usecs = bp->rx_coal_ticks;
51 /* 2 completion records per rx packet */
52 coal->rx_max_coalesced_frames = bp->rx_coal_bufs / 2;
53 coal->rx_coalesce_usecs_irq = bp->rx_coal_ticks_irq;
54 coal->rx_max_coalesced_frames_irq = bp->rx_coal_bufs_irq / 2;
c0c050c5 55
dfc9c94a
MC		 56 coal->tx_coalesce_usecs = bp->tx_coal_ticks;
57 coal->tx_max_coalesced_frames = bp->tx_coal_bufs;
58 coal->tx_coalesce_usecs_irq = bp->tx_coal_ticks_irq;
59 coal->tx_max_coalesced_frames_irq = bp->tx_coal_bufs_irq;
60
51f30785
MC		 61 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
62
c0c050c5
MC		 63 return 0;
64}
65
66static int bnxt_set_coalesce(struct net_device *dev,
67 struct ethtool_coalesce *coal)
68{
69 struct bnxt *bp = netdev_priv(dev);
51f30785 70 bool update_stats = false;
c0c050c5
MC		 71 int rc = 0;
72
dfb5b894
MC		 73 bp->rx_coal_ticks = coal->rx_coalesce_usecs;
74 /* 2 completion records per rx packet */
75 bp->rx_coal_bufs = coal->rx_max_coalesced_frames * 2;
76 bp->rx_coal_ticks_irq = coal->rx_coalesce_usecs_irq;
77 bp->rx_coal_bufs_irq = coal->rx_max_coalesced_frames_irq * 2;
c0c050c5 78
dfc9c94a
MC		 79 bp->tx_coal_ticks = coal->tx_coalesce_usecs;
80 bp->tx_coal_bufs = coal->tx_max_coalesced_frames;
81 bp->tx_coal_ticks_irq = coal->tx_coalesce_usecs_irq;
82 bp->tx_coal_bufs_irq = coal->tx_max_coalesced_frames_irq;
83
51f30785
MC		 84 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
85 u32 stats_ticks = coal->stats_block_coalesce_usecs;
86
87 stats_ticks = clamp_t(u32, stats_ticks,
88 BNXT_MIN_STATS_COAL_TICKS,
89 BNXT_MAX_STATS_COAL_TICKS);
90 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
91 bp->stats_coal_ticks = stats_ticks;
92 update_stats = true;
93 }
94
95 if (netif_running(dev)) {
96 if (update_stats) {
97 rc = bnxt_close_nic(bp, true, false);
98 if (!rc)
99 rc = bnxt_open_nic(bp, true, false);
100 } else {
101 rc = bnxt_hwrm_set_coal(bp);
102 }
103 }
c0c050c5
MC		 104
105 return rc;
106}
107
108#define BNXT_NUM_STATS 21
109
8ddc9aaa
MC		 110#define BNXT_RX_STATS_OFFSET(counter) \
111 (offsetof(struct rx_port_stats, counter) / 8)
112
113#define BNXT_RX_STATS_ENTRY(counter) \
114 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
115
116#define BNXT_TX_STATS_OFFSET(counter) \
117 ((offsetof(struct tx_port_stats, counter) + \
118 sizeof(struct rx_port_stats) + 512) / 8)
119
120#define BNXT_TX_STATS_ENTRY(counter) \
121 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
122
123static const struct {
124 long offset;
125 char string[ETH_GSTRING_LEN];
126} bnxt_port_stats_arr[] = {
127 BNXT_RX_STATS_ENTRY(rx_64b_frames),
128 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
129 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
130 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
131 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
132 BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames),
133 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
134 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
135 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
136 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
137 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
138 BNXT_RX_STATS_ENTRY(rx_total_frames),
139 BNXT_RX_STATS_ENTRY(rx_ucast_frames),
140 BNXT_RX_STATS_ENTRY(rx_mcast_frames),
141 BNXT_RX_STATS_ENTRY(rx_bcast_frames),
142 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
143 BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
144 BNXT_RX_STATS_ENTRY(rx_pause_frames),
145 BNXT_RX_STATS_ENTRY(rx_pfc_frames),
146 BNXT_RX_STATS_ENTRY(rx_align_err_frames),
147 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
148 BNXT_RX_STATS_ENTRY(rx_jbr_frames),
149 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
150 BNXT_RX_STATS_ENTRY(rx_tagged_frames),
151 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
152 BNXT_RX_STATS_ENTRY(rx_good_frames),
153 BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
154 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
155 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
156 BNXT_RX_STATS_ENTRY(rx_bytes),
157 BNXT_RX_STATS_ENTRY(rx_runt_bytes),
158 BNXT_RX_STATS_ENTRY(rx_runt_frames),
159
160 BNXT_TX_STATS_ENTRY(tx_64b_frames),
161 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
162 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
163 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
164 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
165 BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames),
166 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
167 BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames),
168 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
169 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
170 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
171 BNXT_TX_STATS_ENTRY(tx_good_frames),
172 BNXT_TX_STATS_ENTRY(tx_total_frames),
173 BNXT_TX_STATS_ENTRY(tx_ucast_frames),
174 BNXT_TX_STATS_ENTRY(tx_mcast_frames),
175 BNXT_TX_STATS_ENTRY(tx_bcast_frames),
176 BNXT_TX_STATS_ENTRY(tx_pause_frames),
177 BNXT_TX_STATS_ENTRY(tx_pfc_frames),
178 BNXT_TX_STATS_ENTRY(tx_jabber_frames),
179 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
180 BNXT_TX_STATS_ENTRY(tx_err),
181 BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
182 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
183 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
184 BNXT_TX_STATS_ENTRY(tx_total_collisions),
185 BNXT_TX_STATS_ENTRY(tx_bytes),
186};
187
188#define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
189
c0c050c5
MC		 190static int bnxt_get_sset_count(struct net_device *dev, int sset)
191{
192 struct bnxt *bp = netdev_priv(dev);
193
194 switch (sset) {
8ddc9aaa
MC		 195 case ETH_SS_STATS: {
196 int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
197
198 if (bp->flags & BNXT_FLAG_PORT_STATS)
199 num_stats += BNXT_NUM_PORT_STATS;
200
201 return num_stats;
202 }
c0c050c5
MC		 203 default:
204 return -EOPNOTSUPP;
205 }
206}
207
208static void bnxt_get_ethtool_stats(struct net_device *dev,
209 struct ethtool_stats *stats, u64 *buf)
210{
211 u32 i, j = 0;
212 struct bnxt *bp = netdev_priv(dev);
213 u32 buf_size = sizeof(struct ctx_hw_stats) * bp->cp_nr_rings;
214 u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
215
216 memset(buf, 0, buf_size);
217
218 if (!bp->bnapi)
219 return;
220
221 for (i = 0; i < bp->cp_nr_rings; i++) {
222 struct bnxt_napi *bnapi = bp->bnapi[i];
223 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
224 __le64 *hw_stats = (__le64 *)cpr->hw_stats;
225 int k;
226
227 for (k = 0; k < stat_fields; j++, k++)
228 buf[j] = le64_to_cpu(hw_stats[k]);
229 buf[j++] = cpr->rx_l4_csum_errors;
230 }
8ddc9aaa
MC		 231 if (bp->flags & BNXT_FLAG_PORT_STATS) {
232 __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
233
234 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
235 buf[j] = le64_to_cpu(*(port_stats +
236 bnxt_port_stats_arr[i].offset));
237 }
238 }
c0c050c5
MC		 239}
240
241static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
242{
243 struct bnxt *bp = netdev_priv(dev);
244 u32 i;
245
246 switch (stringset) {
247 /* The number of strings must match BNXT_NUM_STATS defined above. */
248 case ETH_SS_STATS:
249 for (i = 0; i < bp->cp_nr_rings; i++) {
250 sprintf(buf, "[%d]: rx_ucast_packets", i);
251 buf += ETH_GSTRING_LEN;
252 sprintf(buf, "[%d]: rx_mcast_packets", i);
253 buf += ETH_GSTRING_LEN;
254 sprintf(buf, "[%d]: rx_bcast_packets", i);
255 buf += ETH_GSTRING_LEN;
256 sprintf(buf, "[%d]: rx_discards", i);
257 buf += ETH_GSTRING_LEN;
258 sprintf(buf, "[%d]: rx_drops", i);
259 buf += ETH_GSTRING_LEN;
260 sprintf(buf, "[%d]: rx_ucast_bytes", i);
261 buf += ETH_GSTRING_LEN;
262 sprintf(buf, "[%d]: rx_mcast_bytes", i);
263 buf += ETH_GSTRING_LEN;
264 sprintf(buf, "[%d]: rx_bcast_bytes", i);
265 buf += ETH_GSTRING_LEN;
266 sprintf(buf, "[%d]: tx_ucast_packets", i);
267 buf += ETH_GSTRING_LEN;
268 sprintf(buf, "[%d]: tx_mcast_packets", i);
269 buf += ETH_GSTRING_LEN;
270 sprintf(buf, "[%d]: tx_bcast_packets", i);
271 buf += ETH_GSTRING_LEN;
272 sprintf(buf, "[%d]: tx_discards", i);
273 buf += ETH_GSTRING_LEN;
274 sprintf(buf, "[%d]: tx_drops", i);
275 buf += ETH_GSTRING_LEN;
276 sprintf(buf, "[%d]: tx_ucast_bytes", i);
277 buf += ETH_GSTRING_LEN;
278 sprintf(buf, "[%d]: tx_mcast_bytes", i);
279 buf += ETH_GSTRING_LEN;
280 sprintf(buf, "[%d]: tx_bcast_bytes", i);
281 buf += ETH_GSTRING_LEN;
282 sprintf(buf, "[%d]: tpa_packets", i);
283 buf += ETH_GSTRING_LEN;
284 sprintf(buf, "[%d]: tpa_bytes", i);
285 buf += ETH_GSTRING_LEN;
286 sprintf(buf, "[%d]: tpa_events", i);
287 buf += ETH_GSTRING_LEN;
288 sprintf(buf, "[%d]: tpa_aborts", i);
289 buf += ETH_GSTRING_LEN;
290 sprintf(buf, "[%d]: rx_l4_csum_errors", i);
291 buf += ETH_GSTRING_LEN;
292 }
8ddc9aaa
MC		 293 if (bp->flags & BNXT_FLAG_PORT_STATS) {
294 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
295 strcpy(buf, bnxt_port_stats_arr[i].string);
296 buf += ETH_GSTRING_LEN;
297 }
298 }
c0c050c5
MC		 299 break;
300 default:
301 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
302 stringset);
303 break;
304 }
305}
306
307static void bnxt_get_ringparam(struct net_device *dev,
308 struct ethtool_ringparam *ering)
309{
310 struct bnxt *bp = netdev_priv(dev);
311
312 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
313 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
314 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
315
316 ering->rx_pending = bp->rx_ring_size;
317 ering->rx_jumbo_pending = bp->rx_agg_ring_size;
318 ering->tx_pending = bp->tx_ring_size;
319}
320
321static int bnxt_set_ringparam(struct net_device *dev,
322 struct ethtool_ringparam *ering)
323{
324 struct bnxt *bp = netdev_priv(dev);
325
326 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
327 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
328 (ering->tx_pending <= MAX_SKB_FRAGS))
329 return -EINVAL;
330
331 if (netif_running(dev))
332 bnxt_close_nic(bp, false, false);
333
334 bp->rx_ring_size = ering->rx_pending;
335 bp->tx_ring_size = ering->tx_pending;
336 bnxt_set_ring_params(bp);
337
338 if (netif_running(dev))
339 return bnxt_open_nic(bp, false, false);
340
341 return 0;
342}
343
344static void bnxt_get_channels(struct net_device *dev,
345 struct ethtool_channels *channel)
346{
347 struct bnxt *bp = netdev_priv(dev);
348 int max_rx_rings, max_tx_rings, tcs;
349
6e6c5a57 350 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
068c9ec6
MC		 351 channel->max_combined = max_rx_rings;
352
18d6e4e2
SB		 353 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
354 max_rx_rings = 0;
355 max_tx_rings = 0;
356 }
357
c0c050c5
MC		 358 tcs = netdev_get_num_tc(dev);
359 if (tcs > 1)
360 max_tx_rings /= tcs;
361
362 channel->max_rx = max_rx_rings;
363 channel->max_tx = max_tx_rings;
364 channel->max_other = 0;
068c9ec6
MC		 365 if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
366 channel->combined_count = bp->rx_nr_rings;
76595193
PS		 367 if (BNXT_CHIP_TYPE_NITRO_A0(bp))
368 channel->combined_count--;
068c9ec6 369 } else {
76595193
PS		 370 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
371 channel->rx_count = bp->rx_nr_rings;
372 channel->tx_count = bp->tx_nr_rings_per_tc;
373 }
068c9ec6 374 }
c0c050c5
MC		 375}
376
377static int bnxt_set_channels(struct net_device *dev,
378 struct ethtool_channels *channel)
379{
380 struct bnxt *bp = netdev_priv(dev);
381 int max_rx_rings, max_tx_rings, tcs;
382 u32 rc = 0;
068c9ec6 383 bool sh = false;
c0c050c5 384
068c9ec6 385 if (channel->other_count)
c0c050c5
MC		 386 return -EINVAL;
387
068c9ec6
MC		 388 if (!channel->combined_count &&
389 (!channel->rx_count || !channel->tx_count))
390 return -EINVAL;
391
392 if (channel->combined_count &&
393 (channel->rx_count || channel->tx_count))
394 return -EINVAL;
395
76595193
PS		 396 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
397 channel->tx_count))
398 return -EINVAL;
399
068c9ec6
MC		 400 if (channel->combined_count)
401 sh = true;
402
403 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, sh);
404
c0c050c5
MC		 405 tcs = netdev_get_num_tc(dev);
406 if (tcs > 1)
407 max_tx_rings /= tcs;
408
068c9ec6
MC		 409 if (sh && (channel->combined_count > max_rx_rings ||
410 channel->combined_count > max_tx_rings))
411 return -ENOMEM;
412
413 if (!sh && (channel->rx_count > max_rx_rings ||
414 channel->tx_count > max_tx_rings))
415 return -ENOMEM;
c0c050c5
MC		 416
417 if (netif_running(dev)) {
418 if (BNXT_PF(bp)) {
419 /* TODO CHIMP_FW: Send message to all VF's
420 * before PF unload
421 */
422 }
423 rc = bnxt_close_nic(bp, true, false);
424 if (rc) {
425 netdev_err(bp->dev, "Set channel failure rc :%x\n",
426 rc);
427 return rc;
428 }
429 }
430
068c9ec6
MC		 431 if (sh) {
432 bp->flags |= BNXT_FLAG_SHARED_RINGS;
433 bp->rx_nr_rings = channel->combined_count;
434 bp->tx_nr_rings_per_tc = channel->combined_count;
435 } else {
436 bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
437 bp->rx_nr_rings = channel->rx_count;
438 bp->tx_nr_rings_per_tc = channel->tx_count;
439 }
440
c0c050c5
MC		 441 bp->tx_nr_rings = bp->tx_nr_rings_per_tc;
442 if (tcs > 1)
443 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs;
068c9ec6
MC		 444
445 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
446 bp->tx_nr_rings + bp->rx_nr_rings;
447
c0c050c5
MC		 448 bp->num_stat_ctxs = bp->cp_nr_rings;
449
2bcfa6f6
MC		 450 /* After changing number of rx channels, update NTUPLE feature. */
451 netdev_update_features(dev);
c0c050c5
MC		 452 if (netif_running(dev)) {
453 rc = bnxt_open_nic(bp, true, false);
454 if ((!rc) && BNXT_PF(bp)) {
455 /* TODO CHIMP_FW: Send message to all VF's
456 * to renable
457 */
458 }
459 }
460
461 return rc;
462}
463
464#ifdef CONFIG_RFS_ACCEL
465static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
466 u32 *rule_locs)
467{
468 int i, j = 0;
469
470 cmd->data = bp->ntp_fltr_count;
471 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
472 struct hlist_head *head;
473 struct bnxt_ntuple_filter *fltr;
474
475 head = &bp->ntp_fltr_hash_tbl[i];
476 rcu_read_lock();
477 hlist_for_each_entry_rcu(fltr, head, hash) {
478 if (j == cmd->rule_cnt)
479 break;
480 rule_locs[j++] = fltr->sw_id;
481 }
482 rcu_read_unlock();
483 if (j == cmd->rule_cnt)
484 break;
485 }
486 cmd->rule_cnt = j;
487 return 0;
488}
489
490static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
491{
492 struct ethtool_rx_flow_spec *fs =
493 (struct ethtool_rx_flow_spec *)&cmd->fs;
494 struct bnxt_ntuple_filter *fltr;
495 struct flow_keys *fkeys;
496 int i, rc = -EINVAL;
497
498 if (fs->location < 0 || fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
499 return rc;
500
501 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
502 struct hlist_head *head;
503
504 head = &bp->ntp_fltr_hash_tbl[i];
505 rcu_read_lock();
506 hlist_for_each_entry_rcu(fltr, head, hash) {
507 if (fltr->sw_id == fs->location)
508 goto fltr_found;
509 }
510 rcu_read_unlock();
511 }
512 return rc;
513
514fltr_found:
515 fkeys = &fltr->fkeys;
516 if (fkeys->basic.ip_proto == IPPROTO_TCP)
517 fs->flow_type = TCP_V4_FLOW;
518 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
519 fs->flow_type = UDP_V4_FLOW;
520 else
521 goto fltr_err;
522
523 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
524 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
525
526 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
527 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
528
529 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
530 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
531
532 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
533 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
534
535 fs->ring_cookie = fltr->rxq;
536 rc = 0;
537
538fltr_err:
539 rcu_read_unlock();
540
541 return rc;
542}
543
544static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
545 u32 *rule_locs)
546{
547 struct bnxt *bp = netdev_priv(dev);
548 int rc = 0;
549
550 switch (cmd->cmd) {
551 case ETHTOOL_GRXRINGS:
552 cmd->data = bp->rx_nr_rings;
553 break;
554
555 case ETHTOOL_GRXCLSRLCNT:
556 cmd->rule_cnt = bp->ntp_fltr_count;
557 cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
558 break;
559
560 case ETHTOOL_GRXCLSRLALL:
561 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
562 break;
563
564 case ETHTOOL_GRXCLSRULE:
565 rc = bnxt_grxclsrule(bp, cmd);
566 break;
567
568 default:
569 rc = -EOPNOTSUPP;
570 break;
571 }
572
573 return rc;
574}
575#endif
576
577static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
578{
579 return HW_HASH_INDEX_SIZE;
580}
581
582static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
583{
584 return HW_HASH_KEY_SIZE;
585}
586
587static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
588 u8 *hfunc)
589{
590 struct bnxt *bp = netdev_priv(dev);
591 struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
592 int i = 0;
593
594 if (hfunc)
595 *hfunc = ETH_RSS_HASH_TOP;
596
597 if (indir)
598 for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
599 indir[i] = le16_to_cpu(vnic->rss_table[i]);
600
601 if (key)
602 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
603
604 return 0;
605}
606
607static void bnxt_get_drvinfo(struct net_device *dev,
608 struct ethtool_drvinfo *info)
609{
610 struct bnxt *bp = netdev_priv(dev);
3ebf6f0a
RS		 611 char *pkglog;
612 char *pkgver = NULL;
c0c050c5 613
3ebf6f0a
RS		 614 pkglog = kmalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL);
615 if (pkglog)
616 pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH);
c0c050c5
MC		 617 strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
618 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
3ebf6f0a
RS		 619 if (pkgver && *pkgver != 0 && isdigit(*pkgver))
620 snprintf(info->fw_version, sizeof(info->fw_version) - 1,
621 "%s pkg %s", bp->fw_ver_str, pkgver);
622 else
623 strlcpy(info->fw_version, bp->fw_ver_str,
624 sizeof(info->fw_version));
c0c050c5
MC		 625 strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
626 info->n_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
627 info->testinfo_len = BNXT_NUM_TESTS(bp);
628 /* TODO CHIMP_FW: eeprom dump details */
629 info->eedump_len = 0;
630 /* TODO CHIMP FW: reg dump details */
631 info->regdump_len = 0;
3ebf6f0a 632 kfree(pkglog);
c0c050c5
MC		 633}
634
170ce013 635u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
c0c050c5 636{
c0c050c5
MC		 637 u32 speed_mask = 0;
638
639 /* TODO: support 25GB, 40GB, 50GB with different cable type */
640 /* set the advertised speeds */
641 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
642 speed_mask |= ADVERTISED_100baseT_Full;
643 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
644 speed_mask |= ADVERTISED_1000baseT_Full;
645 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
646 speed_mask |= ADVERTISED_2500baseX_Full;
647 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
648 speed_mask |= ADVERTISED_10000baseT_Full;
c0c050c5 649 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
1c49c421 650 speed_mask |= ADVERTISED_40000baseCR4_Full;
27c4d578
MC		 651
652 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
653 speed_mask |= ADVERTISED_Pause;
654 else if (fw_pause & BNXT_LINK_PAUSE_TX)
655 speed_mask |= ADVERTISED_Asym_Pause;
656 else if (fw_pause & BNXT_LINK_PAUSE_RX)
657 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
658
c0c050c5
MC		 659 return speed_mask;
660}
661
00c04a92
MC		 662#define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
663{ \
664 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
665 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
666 100baseT_Full); \
667 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
668 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
669 1000baseT_Full); \
670 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
671 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
672 10000baseT_Full); \
673 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
674 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
675 25000baseCR_Full); \
676 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
677 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
678 40000baseCR4_Full);\
679 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
680 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
681 50000baseCR2_Full);\
682 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
683 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
684 Pause); \
685 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
686 ethtool_link_ksettings_add_link_mode( \
687 lk_ksettings, name, Asym_Pause);\
688 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
689 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
690 Asym_Pause); \
691 } \
692}
693
694#define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
695{ \
696 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
697 100baseT_Full) || \
698 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
699 100baseT_Half)) \
700 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
701 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
702 1000baseT_Full) || \
703 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
704 1000baseT_Half)) \
705 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
706 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
707 10000baseT_Full)) \
708 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
709 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
710 25000baseCR_Full)) \
711 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
712 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
713 40000baseCR4_Full)) \
714 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
715 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
716 50000baseCR2_Full)) \
717 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
718}
719
720static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
721 struct ethtool_link_ksettings *lk_ksettings)
27c4d578
MC		 722{
723 u16 fw_speeds = link_info->auto_link_speeds;
724 u8 fw_pause = 0;
725
726 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
727 fw_pause = link_info->auto_pause_setting;
728
00c04a92 729 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
27c4d578
MC		 730}
731
00c04a92
MC		 732static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
733 struct ethtool_link_ksettings *lk_ksettings)
3277360e
MC		 734{
735 u16 fw_speeds = link_info->lp_auto_link_speeds;
736 u8 fw_pause = 0;
737
738 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
739 fw_pause = link_info->lp_pause;
740
00c04a92
MC		 741 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
742 lp_advertising);
3277360e
MC		 743}
744
00c04a92
MC		 745static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
746 struct ethtool_link_ksettings *lk_ksettings)
4b32cacc
MC		 747{
748 u16 fw_speeds = link_info->support_speeds;
4b32cacc 749
00c04a92 750 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
4b32cacc 751
00c04a92
MC		 752 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
753 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
754 Asym_Pause);
93ed8117 755
00c04a92
MC		 756 if (link_info->support_auto_speeds)
757 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
758 Autoneg);
93ed8117
MC		 759}
760
c0c050c5
MC		 761u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
762{
763 switch (fw_link_speed) {
764 case BNXT_LINK_SPEED_100MB:
765 return SPEED_100;
766 case BNXT_LINK_SPEED_1GB:
767 return SPEED_1000;
768 case BNXT_LINK_SPEED_2_5GB:
769 return SPEED_2500;
770 case BNXT_LINK_SPEED_10GB:
771 return SPEED_10000;
772 case BNXT_LINK_SPEED_20GB:
773 return SPEED_20000;
774 case BNXT_LINK_SPEED_25GB:
775 return SPEED_25000;
776 case BNXT_LINK_SPEED_40GB:
777 return SPEED_40000;
778 case BNXT_LINK_SPEED_50GB:
779 return SPEED_50000;
780 default:
781 return SPEED_UNKNOWN;
782 }
783}
784
00c04a92
MC		 785static int bnxt_get_link_ksettings(struct net_device *dev,
786 struct ethtool_link_ksettings *lk_ksettings)
c0c050c5
MC		 787{
788 struct bnxt *bp = netdev_priv(dev);
789 struct bnxt_link_info *link_info = &bp->link_info;
00c04a92
MC		 790 struct ethtool_link_settings *base = &lk_ksettings->base;
791 u32 ethtool_speed;
c0c050c5 792
00c04a92
MC		 793 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
794 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
c0c050c5 795
00c04a92 796 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
b763499e 797 if (link_info->autoneg) {
00c04a92
MC		 798 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
799 ethtool_link_ksettings_add_link_mode(lk_ksettings,
800 advertising, Autoneg);
801 base->autoneg = AUTONEG_ENABLE;
3277360e 802 if (link_info->phy_link_status == BNXT_LINK_LINK)
00c04a92 803 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
29c262fe
MC		 804 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
805 if (!netif_carrier_ok(dev))
00c04a92 806 base->duplex = DUPLEX_UNKNOWN;
29c262fe 807 else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
00c04a92 808 base->duplex = DUPLEX_FULL;
29c262fe 809 else
00c04a92 810 base->duplex = DUPLEX_HALF;
c0c050c5 811 } else {
00c04a92 812 base->autoneg = AUTONEG_DISABLE;
29c262fe
MC		 813 ethtool_speed =
814 bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
00c04a92 815 base->duplex = DUPLEX_HALF;
29c262fe 816 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
00c04a92 817 base->duplex = DUPLEX_FULL;
c0c050c5 818 }
00c04a92 819 base->speed = ethtool_speed;
c0c050c5 820
00c04a92 821 base->port = PORT_NONE;
c0c050c5 822 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
00c04a92
MC		 823 base->port = PORT_TP;
824 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
825 TP);
826 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
827 TP);
c0c050c5 828 } else {
00c04a92
MC		 829 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
830 FIBRE);
831 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
832 FIBRE);
c0c050c5
MC		 833
834 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
00c04a92 835 base->port = PORT_DA;
c0c050c5
MC		 836 else if (link_info->media_type ==
837 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
00c04a92 838 base->port = PORT_FIBRE;
c0c050c5 839 }
00c04a92 840 base->phy_address = link_info->phy_addr;
c0c050c5
MC		 841
842 return 0;
843}
844
845static u32 bnxt_get_fw_speed(struct net_device *dev, u16 ethtool_speed)
846{
9d9cee08
MC		 847 struct bnxt *bp = netdev_priv(dev);
848 struct bnxt_link_info *link_info = &bp->link_info;
849 u16 support_spds = link_info->support_speeds;
850 u32 fw_speed = 0;
851
c0c050c5
MC		 852 switch (ethtool_speed) {
853 case SPEED_100:
9d9cee08
MC		 854 if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
855 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
856 break;
c0c050c5 857 case SPEED_1000:
9d9cee08
MC		 858 if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
859 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
860 break;
c0c050c5 861 case SPEED_2500:
9d9cee08
MC		 862 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
863 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
864 break;
c0c050c5 865 case SPEED_10000:
9d9cee08
MC		 866 if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
867 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
868 break;
c0c050c5 869 case SPEED_20000:
9d9cee08
MC		 870 if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
871 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
872 break;
c0c050c5 873 case SPEED_25000:
9d9cee08
MC		 874 if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
875 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
876 break;
c0c050c5 877 case SPEED_40000:
9d9cee08
MC		 878 if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
879 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
880 break;
c0c050c5 881 case SPEED_50000:
9d9cee08
MC		 882 if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
883 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
884 break;
c0c050c5
MC		 885 default:
886 netdev_err(dev, "unsupported speed!\n");
887 break;
888 }
9d9cee08 889 return fw_speed;
c0c050c5
MC		 890}
891
939f7f0c 892u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
c0c050c5
MC		 893{
894 u16 fw_speed_mask = 0;
895
896 /* only support autoneg at speed 100, 1000, and 10000 */
897 if (advertising & (ADVERTISED_100baseT_Full |
898 ADVERTISED_100baseT_Half)) {
899 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
900 }
901 if (advertising & (ADVERTISED_1000baseT_Full |
902 ADVERTISED_1000baseT_Half)) {
903 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
904 }
905 if (advertising & ADVERTISED_10000baseT_Full)
906 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
907
1c49c421
MC		 908 if (advertising & ADVERTISED_40000baseCR4_Full)
909 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
910
c0c050c5
MC		 911 return fw_speed_mask;
912}
913
00c04a92
MC		 914static int bnxt_set_link_ksettings(struct net_device *dev,
915 const struct ethtool_link_ksettings *lk_ksettings)
c0c050c5 916{
c0c050c5
MC		 917 struct bnxt *bp = netdev_priv(dev);
918 struct bnxt_link_info *link_info = &bp->link_info;
00c04a92 919 const struct ethtool_link_settings *base = &lk_ksettings->base;
c0c050c5
MC		 920 u32 speed, fw_advertising = 0;
921 bool set_pause = false;
00c04a92 922 int rc = 0;
c0c050c5 923
567b2abe 924 if (!BNXT_SINGLE_PF(bp))
00c04a92 925 return -EOPNOTSUPP;
f1a082a6 926
00c04a92
MC		 927 if (base->autoneg == AUTONEG_ENABLE) {
928 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
929 advertising);
c0c050c5
MC		 930 link_info->autoneg |= BNXT_AUTONEG_SPEED;
931 if (!fw_advertising)
93ed8117 932 link_info->advertising = link_info->support_auto_speeds;
c0c050c5
MC		 933 else
934 link_info->advertising = fw_advertising;
935 /* any change to autoneg will cause link change, therefore the
936 * driver should put back the original pause setting in autoneg
937 */
938 set_pause = true;
939 } else {
9d9cee08 940 u16 fw_speed;
03efbec0 941 u8 phy_type = link_info->phy_type;
9d9cee08 942
03efbec0
MC		 943 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
944 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
945 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
946 netdev_err(dev, "10GBase-T devices must autoneg\n");
947 rc = -EINVAL;
948 goto set_setting_exit;
949 }
00c04a92 950 if (base->duplex == DUPLEX_HALF) {
c0c050c5
MC		 951 netdev_err(dev, "HALF DUPLEX is not supported!\n");
952 rc = -EINVAL;
953 goto set_setting_exit;
954 }
00c04a92 955 speed = base->speed;
9d9cee08
MC		 956 fw_speed = bnxt_get_fw_speed(dev, speed);
957 if (!fw_speed) {
958 rc = -EINVAL;
959 goto set_setting_exit;
960 }
961 link_info->req_link_speed = fw_speed;
c0c050c5 962 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
b763499e 963 link_info->autoneg = 0;
c0c050c5
MC		 964 link_info->advertising = 0;
965 }
966
967 if (netif_running(dev))
939f7f0c 968 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
c0c050c5
MC		 969
970set_setting_exit:
971 return rc;
972}
973
974static void bnxt_get_pauseparam(struct net_device *dev,
975 struct ethtool_pauseparam *epause)
976{
977 struct bnxt *bp = netdev_priv(dev);
978 struct bnxt_link_info *link_info = &bp->link_info;
979
980 if (BNXT_VF(bp))
981 return;
b763499e 982 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
3c02d1bb
MC		 983 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
984 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
c0c050c5
MC		 985}
986
987static int bnxt_set_pauseparam(struct net_device *dev,
988 struct ethtool_pauseparam *epause)
989{
990 int rc = 0;
991 struct bnxt *bp = netdev_priv(dev);
992 struct bnxt_link_info *link_info = &bp->link_info;
993
567b2abe 994 if (!BNXT_SINGLE_PF(bp))
75362a3f 995 return -EOPNOTSUPP;
c0c050c5
MC		 996
997 if (epause->autoneg) {
b763499e
MC		 998 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
999 return -EINVAL;
1000
c0c050c5 1001 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
c9ee9516
MC		 1002 if (bp->hwrm_spec_code >= 0x10201)
1003 link_info->req_flow_ctrl =
1004 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
c0c050c5
MC		 1005 } else {
1006 /* when transition from auto pause to force pause,
1007 * force a link change
1008 */
1009 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1010 link_info->force_link_chng = true;
1011 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
c9ee9516 1012 link_info->req_flow_ctrl = 0;
c0c050c5
MC		 1013 }
1014 if (epause->rx_pause)
1015 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
c0c050c5
MC		 1016
1017 if (epause->tx_pause)
1018 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
c0c050c5
MC		 1019
1020 if (netif_running(dev))
1021 rc = bnxt_hwrm_set_pause(bp);
1022 return rc;
1023}
1024
1025static u32 bnxt_get_link(struct net_device *dev)
1026{
1027 struct bnxt *bp = netdev_priv(dev);
1028
1029 /* TODO: handle MF, VF, driver close case */
1030 return bp->link_info.link_up;
1031}
1032
5ac67d8b
RS		 1033static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1034 u16 ext, u16 *index, u32 *item_length,
1035 u32 *data_length);
1036
c0c050c5
MC		 1037static int bnxt_flash_nvram(struct net_device *dev,
1038 u16 dir_type,
1039 u16 dir_ordinal,
1040 u16 dir_ext,
1041 u16 dir_attr,
1042 const u8 *data,
1043 size_t data_len)
1044{
1045 struct bnxt *bp = netdev_priv(dev);
1046 int rc;
1047 struct hwrm_nvm_write_input req = {0};
1048 dma_addr_t dma_handle;
1049 u8 *kmem;
1050
1051 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
1052
1053 req.dir_type = cpu_to_le16(dir_type);
1054 req.dir_ordinal = cpu_to_le16(dir_ordinal);
1055 req.dir_ext = cpu_to_le16(dir_ext);
1056 req.dir_attr = cpu_to_le16(dir_attr);
1057 req.dir_data_length = cpu_to_le32(data_len);
1058
1059 kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
1060 GFP_KERNEL);
1061 if (!kmem) {
1062 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1063 (unsigned)data_len);
1064 return -ENOMEM;
1065 }
1066 memcpy(kmem, data, data_len);
1067 req.host_src_addr = cpu_to_le64(dma_handle);
1068
1069 rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
1070 dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
1071
1072 return rc;
1073}
1074
d2d6318c
RS		 1075static int bnxt_firmware_reset(struct net_device *dev,
1076 u16 dir_type)
1077{
1078 struct bnxt *bp = netdev_priv(dev);
1079 struct hwrm_fw_reset_input req = {0};
1080
1081 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
1082
1083 /* TODO: Support ASAP ChiMP self-reset (e.g. upon PF driver unload) */
1084 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
1085 /* (e.g. when firmware isn't already running) */
1086 switch (dir_type) {
1087 case BNX_DIR_TYPE_CHIMP_PATCH:
1088 case BNX_DIR_TYPE_BOOTCODE:
1089 case BNX_DIR_TYPE_BOOTCODE_2:
1090 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
1091 /* Self-reset ChiMP upon next PCIe reset: */
1092 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1093 break;
1094 case BNX_DIR_TYPE_APE_FW:
1095 case BNX_DIR_TYPE_APE_PATCH:
1096 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
08141e0b
RS		 1097 /* Self-reset APE upon next PCIe reset: */
1098 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
d2d6318c
RS		 1099 break;
1100 case BNX_DIR_TYPE_KONG_FW:
1101 case BNX_DIR_TYPE_KONG_PATCH:
1102 req.embedded_proc_type =
1103 FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
1104 break;
1105 case BNX_DIR_TYPE_BONO_FW:
1106 case BNX_DIR_TYPE_BONO_PATCH:
1107 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
1108 break;
1109 default:
1110 return -EINVAL;
1111 }
1112
1113 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1114}
1115
c0c050c5
MC		 1116static int bnxt_flash_firmware(struct net_device *dev,
1117 u16 dir_type,
1118 const u8 *fw_data,
1119 size_t fw_size)
1120{
1121 int rc = 0;
1122 u16 code_type;
1123 u32 stored_crc;
1124 u32 calculated_crc;
1125 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
1126
1127 switch (dir_type) {
1128 case BNX_DIR_TYPE_BOOTCODE:
1129 case BNX_DIR_TYPE_BOOTCODE_2:
1130 code_type = CODE_BOOT;
1131 break;
93e0b4fe
RS		 1132 case BNX_DIR_TYPE_CHIMP_PATCH:
1133 code_type = CODE_CHIMP_PATCH;
1134 break;
2731d70f
RS		 1135 case BNX_DIR_TYPE_APE_FW:
1136 code_type = CODE_MCTP_PASSTHRU;
1137 break;
93e0b4fe
RS		 1138 case BNX_DIR_TYPE_APE_PATCH:
1139 code_type = CODE_APE_PATCH;
1140 break;
1141 case BNX_DIR_TYPE_KONG_FW:
1142 code_type = CODE_KONG_FW;
1143 break;
1144 case BNX_DIR_TYPE_KONG_PATCH:
1145 code_type = CODE_KONG_PATCH;
1146 break;
1147 case BNX_DIR_TYPE_BONO_FW:
1148 code_type = CODE_BONO_FW;
1149 break;
1150 case BNX_DIR_TYPE_BONO_PATCH:
1151 code_type = CODE_BONO_PATCH;
1152 break;
c0c050c5
MC		 1153 default:
1154 netdev_err(dev, "Unsupported directory entry type: %u\n",
1155 dir_type);
1156 return -EINVAL;
1157 }
1158 if (fw_size < sizeof(struct bnxt_fw_header)) {
1159 netdev_err(dev, "Invalid firmware file size: %u\n",
1160 (unsigned int)fw_size);
1161 return -EINVAL;
1162 }
1163 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
1164 netdev_err(dev, "Invalid firmware signature: %08X\n",
1165 le32_to_cpu(header->signature));
1166 return -EINVAL;
1167 }
1168 if (header->code_type != code_type) {
1169 netdev_err(dev, "Expected firmware type: %d, read: %d\n",
1170 code_type, header->code_type);
1171 return -EINVAL;
1172 }
1173 if (header->device != DEVICE_CUMULUS_FAMILY) {
1174 netdev_err(dev, "Expected firmware device family %d, read: %d\n",
1175 DEVICE_CUMULUS_FAMILY, header->device);
1176 return -EINVAL;
1177 }
1178 /* Confirm the CRC32 checksum of the file: */
1179 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1180 sizeof(stored_crc)));
1181 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1182 if (calculated_crc != stored_crc) {
1183 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
1184 (unsigned long)stored_crc,
1185 (unsigned long)calculated_crc);
1186 return -EINVAL;
1187 }
c0c050c5
MC		 1188 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1189 0, 0, fw_data, fw_size);
d2d6318c
RS		 1190 if (rc == 0) /* Firmware update successful */
1191 rc = bnxt_firmware_reset(dev, dir_type);
1192
c0c050c5
MC		 1193 return rc;
1194}
1195
5ac67d8b
RS		 1196static int bnxt_flash_microcode(struct net_device *dev,
1197 u16 dir_type,
1198 const u8 *fw_data,
1199 size_t fw_size)
1200{
1201 struct bnxt_ucode_trailer *trailer;
1202 u32 calculated_crc;
1203 u32 stored_crc;
1204 int rc = 0;
1205
1206 if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
1207 netdev_err(dev, "Invalid microcode file size: %u\n",
1208 (unsigned int)fw_size);
1209 return -EINVAL;
1210 }
1211 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
1212 sizeof(*trailer)));
1213 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
1214 netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
1215 le32_to_cpu(trailer->sig));
1216 return -EINVAL;
1217 }
1218 if (le16_to_cpu(trailer->dir_type) != dir_type) {
1219 netdev_err(dev, "Expected microcode type: %d, read: %d\n",
1220 dir_type, le16_to_cpu(trailer->dir_type));
1221 return -EINVAL;
1222 }
1223 if (le16_to_cpu(trailer->trailer_length) <
1224 sizeof(struct bnxt_ucode_trailer)) {
1225 netdev_err(dev, "Invalid microcode trailer length: %d\n",
1226 le16_to_cpu(trailer->trailer_length));
1227 return -EINVAL;
1228 }
1229
1230 /* Confirm the CRC32 checksum of the file: */
1231 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1232 sizeof(stored_crc)));
1233 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1234 if (calculated_crc != stored_crc) {
1235 netdev_err(dev,
1236 "CRC32 (%08lX) does not match calculated: %08lX\n",
1237 (unsigned long)stored_crc,
1238 (unsigned long)calculated_crc);
1239 return -EINVAL;
1240 }
1241 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1242 0, 0, fw_data, fw_size);
1243
1244 return rc;
1245}
1246
c0c050c5
MC		 1247static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
1248{
1249 switch (dir_type) {
1250 case BNX_DIR_TYPE_CHIMP_PATCH:
1251 case BNX_DIR_TYPE_BOOTCODE:
1252 case BNX_DIR_TYPE_BOOTCODE_2:
1253 case BNX_DIR_TYPE_APE_FW:
1254 case BNX_DIR_TYPE_APE_PATCH:
1255 case BNX_DIR_TYPE_KONG_FW:
1256 case BNX_DIR_TYPE_KONG_PATCH:
93e0b4fe
RS		 1257 case BNX_DIR_TYPE_BONO_FW:
1258 case BNX_DIR_TYPE_BONO_PATCH:
c0c050c5
MC		 1259 return true;
1260 }
1261
1262 return false;
1263}
1264
5ac67d8b 1265static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
c0c050c5
MC		 1266{
1267 switch (dir_type) {
1268 case BNX_DIR_TYPE_AVS:
1269 case BNX_DIR_TYPE_EXP_ROM_MBA:
1270 case BNX_DIR_TYPE_PCIE:
1271 case BNX_DIR_TYPE_TSCF_UCODE:
1272 case BNX_DIR_TYPE_EXT_PHY:
1273 case BNX_DIR_TYPE_CCM:
1274 case BNX_DIR_TYPE_ISCSI_BOOT:
1275 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
1276 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
1277 return true;
1278 }
1279
1280 return false;
1281}
1282
1283static bool bnxt_dir_type_is_executable(u16 dir_type)
1284{
1285 return bnxt_dir_type_is_ape_bin_format(dir_type) ||
5ac67d8b 1286 bnxt_dir_type_is_other_exec_format(dir_type);
c0c050c5
MC		 1287}
1288
1289static int bnxt_flash_firmware_from_file(struct net_device *dev,
1290 u16 dir_type,
1291 const char *filename)
1292{
1293 const struct firmware *fw;
1294 int rc;
1295
c0c050c5
MC		 1296 rc = request_firmware(&fw, filename, &dev->dev);
1297 if (rc != 0) {
1298 netdev_err(dev, "Error %d requesting firmware file: %s\n",
1299 rc, filename);
1300 return rc;
1301 }
1302 if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
1303 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
5ac67d8b
RS		 1304 else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
1305 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
c0c050c5
MC		 1306 else
1307 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1308 0, 0, fw->data, fw->size);
1309 release_firmware(fw);
1310 return rc;
1311}
1312
1313static int bnxt_flash_package_from_file(struct net_device *dev,
5ac67d8b 1314 char *filename, u32 install_type)
c0c050c5 1315{
5ac67d8b
RS		 1316 struct bnxt *bp = netdev_priv(dev);
1317 struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
1318 struct hwrm_nvm_install_update_input install = {0};
1319 const struct firmware *fw;
1320 u32 item_len;
1321 u16 index;
1322 int rc;
1323
1324 bnxt_hwrm_fw_set_time(bp);
1325
1326 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
1327 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1328 &index, &item_len, NULL) != 0) {
1329 netdev_err(dev, "PKG update area not created in nvram\n");
1330 return -ENOBUFS;
1331 }
1332
1333 rc = request_firmware(&fw, filename, &dev->dev);
1334 if (rc != 0) {
1335 netdev_err(dev, "PKG error %d requesting file: %s\n",
1336 rc, filename);
1337 return rc;
1338 }
1339
1340 if (fw->size > item_len) {
1341 netdev_err(dev, "PKG insufficient update area in nvram: %lu",
1342 (unsigned long)fw->size);
1343 rc = -EFBIG;
1344 } else {
1345 dma_addr_t dma_handle;
1346 u8 *kmem;
1347 struct hwrm_nvm_modify_input modify = {0};
1348
1349 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
1350
1351 modify.dir_idx = cpu_to_le16(index);
1352 modify.len = cpu_to_le32(fw->size);
1353
1354 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
1355 &dma_handle, GFP_KERNEL);
1356 if (!kmem) {
1357 netdev_err(dev,
1358 "dma_alloc_coherent failure, length = %u\n",
1359 (unsigned int)fw->size);
1360 rc = -ENOMEM;
1361 } else {
1362 memcpy(kmem, fw->data, fw->size);
1363 modify.host_src_addr = cpu_to_le64(dma_handle);
1364
1365 rc = hwrm_send_message(bp, &modify, sizeof(modify),
1366 FLASH_PACKAGE_TIMEOUT);
1367 dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
1368 dma_handle);
1369 }
1370 }
1371 release_firmware(fw);
1372 if (rc)
1373 return rc;
1374
1375 if ((install_type & 0xffff) == 0)
1376 install_type >>= 16;
1377 bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
1378 install.install_type = cpu_to_le32(install_type);
1379
1380 rc = hwrm_send_message(bp, &install, sizeof(install),
1381 INSTALL_PACKAGE_TIMEOUT);
1382 if (rc)
1383 return -EOPNOTSUPP;
1384
1385 if (resp->result) {
1386 netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
1387 (s8)resp->result, (int)resp->problem_item);
1388 return -ENOPKG;
1389 }
1390 return 0;
c0c050c5
MC		 1391}
1392
1393static int bnxt_flash_device(struct net_device *dev,
1394 struct ethtool_flash *flash)
1395{
1396 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
1397 netdev_err(dev, "flashdev not supported from a virtual function\n");
1398 return -EINVAL;
1399 }
1400
5ac67d8b
RS		 1401 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
1402 flash->region > 0xffff)
1403 return bnxt_flash_package_from_file(dev, flash->data,
1404 flash->region);
c0c050c5
MC		 1405
1406 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
1407}
1408
1409static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
1410{
1411 struct bnxt *bp = netdev_priv(dev);
1412 int rc;
1413 struct hwrm_nvm_get_dir_info_input req = {0};
1414 struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
1415
1416 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
1417
1418 mutex_lock(&bp->hwrm_cmd_lock);
1419 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1420 if (!rc) {
1421 *entries = le32_to_cpu(output->entries);
1422 *length = le32_to_cpu(output->entry_length);
1423 }
1424 mutex_unlock(&bp->hwrm_cmd_lock);
1425 return rc;
1426}
1427
1428static int bnxt_get_eeprom_len(struct net_device *dev)
1429{
1430 /* The -1 return value allows the entire 32-bit range of offsets to be
1431 * passed via the ethtool command-line utility.
1432 */
1433 return -1;
1434}
1435
1436static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
1437{
1438 struct bnxt *bp = netdev_priv(dev);
1439 int rc;
1440 u32 dir_entries;
1441 u32 entry_length;
1442 u8 *buf;
1443 size_t buflen;
1444 dma_addr_t dma_handle;
1445 struct hwrm_nvm_get_dir_entries_input req = {0};
1446
1447 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
1448 if (rc != 0)
1449 return rc;
1450
1451 /* Insert 2 bytes of directory info (count and size of entries) */
1452 if (len < 2)
1453 return -EINVAL;
1454
1455 *data++ = dir_entries;
1456 *data++ = entry_length;
1457 len -= 2;
1458 memset(data, 0xff, len);
1459
1460 buflen = dir_entries * entry_length;
1461 buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
1462 GFP_KERNEL);
1463 if (!buf) {
1464 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1465 (unsigned)buflen);
1466 return -ENOMEM;
1467 }
1468 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
1469 req.host_dest_addr = cpu_to_le64(dma_handle);
1470 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1471 if (rc == 0)
1472 memcpy(data, buf, len > buflen ? buflen : len);
1473 dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
1474 return rc;
1475}
1476
1477static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
1478 u32 length, u8 *data)
1479{
1480 struct bnxt *bp = netdev_priv(dev);
1481 int rc;
1482 u8 *buf;
1483 dma_addr_t dma_handle;
1484 struct hwrm_nvm_read_input req = {0};
1485
1486 buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
1487 GFP_KERNEL);
1488 if (!buf) {
1489 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1490 (unsigned)length);
1491 return -ENOMEM;
1492 }
1493 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
1494 req.host_dest_addr = cpu_to_le64(dma_handle);
1495 req.dir_idx = cpu_to_le16(index);
1496 req.offset = cpu_to_le32(offset);
1497 req.len = cpu_to_le32(length);
1498
1499 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1500 if (rc == 0)
1501 memcpy(data, buf, length);
1502 dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
1503 return rc;
1504}
1505
3ebf6f0a
RS		 1506static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1507 u16 ext, u16 *index, u32 *item_length,
1508 u32 *data_length)
1509{
1510 struct bnxt *bp = netdev_priv(dev);
1511 int rc;
1512 struct hwrm_nvm_find_dir_entry_input req = {0};
1513 struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
1514
1515 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
1516 req.enables = 0;
1517 req.dir_idx = 0;
1518 req.dir_type = cpu_to_le16(type);
1519 req.dir_ordinal = cpu_to_le16(ordinal);
1520 req.dir_ext = cpu_to_le16(ext);
1521 req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
90e20921 1522 rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3ebf6f0a
RS		 1523 if (rc == 0) {
1524 if (index)
1525 *index = le16_to_cpu(output->dir_idx);
1526 if (item_length)
1527 *item_length = le32_to_cpu(output->dir_item_length);
1528 if (data_length)
1529 *data_length = le32_to_cpu(output->dir_data_length);
1530 }
1531 return rc;
1532}
1533
1534static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
1535{
1536 char *retval = NULL;
1537 char *p;
1538 char *value;
1539 int field = 0;
1540
1541 if (datalen < 1)
1542 return NULL;
1543 /* null-terminate the log data (removing last '\n'): */
1544 data[datalen - 1] = 0;
1545 for (p = data; *p != 0; p++) {
1546 field = 0;
1547 retval = NULL;
1548 while (*p != 0 && *p != '\n') {
1549 value = p;
1550 while (*p != 0 && *p != '\t' && *p != '\n')
1551 p++;
1552 if (field == desired_field)
1553 retval = value;
1554 if (*p != '\t')
1555 break;
1556 *p = 0;
1557 field++;
1558 p++;
1559 }
1560 if (*p == 0)
1561 break;
1562 *p = 0;
1563 }
1564 return retval;
1565}
1566
1567static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen)
1568{
1569 u16 index = 0;
1570 u32 datalen;
1571
1572 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
1573 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1574 &index, NULL, &datalen) != 0)
1575 return NULL;
1576
1577 memset(buf, 0, buflen);
1578 if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0)
1579 return NULL;
1580
1581 return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf,
1582 datalen);
1583}
1584
c0c050c5
MC		 1585static int bnxt_get_eeprom(struct net_device *dev,
1586 struct ethtool_eeprom *eeprom,
1587 u8 *data)
1588{
1589 u32 index;
1590 u32 offset;
1591
1592 if (eeprom->offset == 0) /* special offset value to get directory */
1593 return bnxt_get_nvram_directory(dev, eeprom->len, data);
1594
1595 index = eeprom->offset >> 24;
1596 offset = eeprom->offset & 0xffffff;
1597
1598 if (index == 0) {
1599 netdev_err(dev, "unsupported index value: %d\n", index);
1600 return -EINVAL;
1601 }
1602
1603 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
1604}
1605
1606static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
1607{
1608 struct bnxt *bp = netdev_priv(dev);
1609 struct hwrm_nvm_erase_dir_entry_input req = {0};
1610
1611 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
1612 req.dir_idx = cpu_to_le16(index);
1613 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1614}
1615
1616static int bnxt_set_eeprom(struct net_device *dev,
1617 struct ethtool_eeprom *eeprom,
1618 u8 *data)
1619{
1620 struct bnxt *bp = netdev_priv(dev);
1621 u8 index, dir_op;
1622 u16 type, ext, ordinal, attr;
1623
1624 if (!BNXT_PF(bp)) {
1625 netdev_err(dev, "NVM write not supported from a virtual function\n");
1626 return -EINVAL;
1627 }
1628
1629 type = eeprom->magic >> 16;
1630
1631 if (type == 0xffff) { /* special value for directory operations */
1632 index = eeprom->magic & 0xff;
1633 dir_op = eeprom->magic >> 8;
1634 if (index == 0)
1635 return -EINVAL;
1636 switch (dir_op) {
1637 case 0x0e: /* erase */
1638 if (eeprom->offset != ~eeprom->magic)
1639 return -EINVAL;
1640 return bnxt_erase_nvram_directory(dev, index - 1);
1641 default:
1642 return -EINVAL;
1643 }
1644 }
1645
1646 /* Create or re-write an NVM item: */
1647 if (bnxt_dir_type_is_executable(type) == true)
5ac67d8b 1648 return -EOPNOTSUPP;
c0c050c5
MC		 1649 ext = eeprom->magic & 0xffff;
1650 ordinal = eeprom->offset >> 16;
1651 attr = eeprom->offset & 0xffff;
1652
1653 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
1654 eeprom->len);
1655}
1656
72b34f04
MC		 1657static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
1658{
1659 struct bnxt *bp = netdev_priv(dev);
1660 struct ethtool_eee *eee = &bp->eee;
1661 struct bnxt_link_info *link_info = &bp->link_info;
1662 u32 advertising =
1663 _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
1664 int rc = 0;
1665
567b2abe 1666 if (!BNXT_SINGLE_PF(bp))
75362a3f 1667 return -EOPNOTSUPP;
72b34f04
MC		 1668
1669 if (!(bp->flags & BNXT_FLAG_EEE_CAP))
1670 return -EOPNOTSUPP;
1671
1672 if (!edata->eee_enabled)
1673 goto eee_ok;
1674
1675 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
1676 netdev_warn(dev, "EEE requires autoneg\n");
1677 return -EINVAL;
1678 }
1679 if (edata->tx_lpi_enabled) {
1680 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
1681 edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
1682 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
1683 bp->lpi_tmr_lo, bp->lpi_tmr_hi);
1684 return -EINVAL;
1685 } else if (!bp->lpi_tmr_hi) {
1686 edata->tx_lpi_timer = eee->tx_lpi_timer;
1687 }
1688 }
1689 if (!edata->advertised) {
1690 edata->advertised = advertising & eee->supported;
1691 } else if (edata->advertised & ~advertising) {
1692 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
1693 edata->advertised, advertising);
1694 return -EINVAL;
1695 }
1696
1697 eee->advertised = edata->advertised;
1698 eee->tx_lpi_enabled = edata->tx_lpi_enabled;
1699 eee->tx_lpi_timer = edata->tx_lpi_timer;
1700eee_ok:
1701 eee->eee_enabled = edata->eee_enabled;
1702
1703 if (netif_running(dev))
1704 rc = bnxt_hwrm_set_link_setting(bp, false, true);
1705
1706 return rc;
1707}
1708
1709static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
1710{
1711 struct bnxt *bp = netdev_priv(dev);
1712
1713 if (!(bp->flags & BNXT_FLAG_EEE_CAP))
1714 return -EOPNOTSUPP;
1715
1716 *edata = bp->eee;
1717 if (!bp->eee.eee_enabled) {
1718 /* Preserve tx_lpi_timer so that the last value will be used
1719 * by default when it is re-enabled.
1720 */
1721 edata->advertised = 0;
1722 edata->tx_lpi_enabled = 0;
1723 }
1724
1725 if (!bp->eee.eee_active)
1726 edata->lp_advertised = 0;
1727
1728 return 0;
1729}
1730
42ee18fe
AK		 1731static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
1732 u16 page_number, u16 start_addr,
1733 u16 data_length, u8 *buf)
1734{
1735 struct hwrm_port_phy_i2c_read_input req = {0};
1736 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
1737 int rc, byte_offset = 0;
1738
1739 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
1740 req.i2c_slave_addr = i2c_addr;
1741 req.page_number = cpu_to_le16(page_number);
1742 req.port_id = cpu_to_le16(bp->pf.port_id);
1743 do {
1744 u16 xfer_size;
1745
1746 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
1747 data_length -= xfer_size;
1748 req.page_offset = cpu_to_le16(start_addr + byte_offset);
1749 req.data_length = xfer_size;
1750 req.enables = cpu_to_le32(start_addr + byte_offset ?
1751 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
1752 mutex_lock(&bp->hwrm_cmd_lock);
1753 rc = _hwrm_send_message(bp, &req, sizeof(req),
1754 HWRM_CMD_TIMEOUT);
1755 if (!rc)
1756 memcpy(buf + byte_offset, output->data, xfer_size);
1757 mutex_unlock(&bp->hwrm_cmd_lock);
1758 byte_offset += xfer_size;
1759 } while (!rc && data_length > 0);
1760
1761 return rc;
1762}
1763
1764static int bnxt_get_module_info(struct net_device *dev,
1765 struct ethtool_modinfo *modinfo)
1766{
1767 struct bnxt *bp = netdev_priv(dev);
1768 struct hwrm_port_phy_i2c_read_input req = {0};
1769 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
1770 int rc;
1771
1772 /* No point in going further if phy status indicates
1773 * module is not inserted or if it is powered down or
1774 * if it is of type 10GBase-T
1775 */
1776 if (bp->link_info.module_status >
1777 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
1778 return -EOPNOTSUPP;
1779
1780 /* This feature is not supported in older firmware versions */
1781 if (bp->hwrm_spec_code < 0x10202)
1782 return -EOPNOTSUPP;
1783
1784 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
1785 req.i2c_slave_addr = I2C_DEV_ADDR_A0;
1786 req.page_number = 0;
1787 req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR);
1788 req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE;
1789 req.port_id = cpu_to_le16(bp->pf.port_id);
1790 mutex_lock(&bp->hwrm_cmd_lock);
1791 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1792 if (!rc) {
1793 u32 module_id = le32_to_cpu(output->data[0]);
1794
1795 switch (module_id) {
1796 case SFF_MODULE_ID_SFP:
1797 modinfo->type = ETH_MODULE_SFF_8472;
1798 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1799 break;
1800 case SFF_MODULE_ID_QSFP:
1801 case SFF_MODULE_ID_QSFP_PLUS:
1802 modinfo->type = ETH_MODULE_SFF_8436;
1803 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1804 break;
1805 case SFF_MODULE_ID_QSFP28:
1806 modinfo->type = ETH_MODULE_SFF_8636;
1807 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1808 break;
1809 default:
1810 rc = -EOPNOTSUPP;
1811 break;
1812 }
1813 }
1814 mutex_unlock(&bp->hwrm_cmd_lock);
1815 return rc;
1816}
1817
1818static int bnxt_get_module_eeprom(struct net_device *dev,
1819 struct ethtool_eeprom *eeprom,
1820 u8 *data)
1821{
1822 struct bnxt *bp = netdev_priv(dev);
1823 u16 start = eeprom->offset, length = eeprom->len;
f3ea3119 1824 int rc = 0;
42ee18fe
AK		 1825
1826 memset(data, 0, eeprom->len);
1827
1828 /* Read A0 portion of the EEPROM */
1829 if (start < ETH_MODULE_SFF_8436_LEN) {
1830 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
1831 length = ETH_MODULE_SFF_8436_LEN - start;
1832 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
1833 start, length, data);
1834 if (rc)
1835 return rc;
1836 start += length;
1837 data += length;
1838 length = eeprom->len - length;
1839 }
1840
1841 /* Read A2 portion of the EEPROM */
1842 if (length) {
1843 start -= ETH_MODULE_SFF_8436_LEN;
1844 bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, start,
1845 length, data);
1846 }
1847 return rc;
1848}
1849
c0c050c5 1850const struct ethtool_ops bnxt_ethtool_ops = {
00c04a92
MC		 1851 .get_link_ksettings = bnxt_get_link_ksettings,
1852 .set_link_ksettings = bnxt_set_link_ksettings,
c0c050c5
MC		 1853 .get_pauseparam = bnxt_get_pauseparam,
1854 .set_pauseparam = bnxt_set_pauseparam,
1855 .get_drvinfo = bnxt_get_drvinfo,
1856 .get_coalesce = bnxt_get_coalesce,
1857 .set_coalesce = bnxt_set_coalesce,
1858 .get_msglevel = bnxt_get_msglevel,
1859 .set_msglevel = bnxt_set_msglevel,
1860 .get_sset_count = bnxt_get_sset_count,
1861 .get_strings = bnxt_get_strings,
1862 .get_ethtool_stats = bnxt_get_ethtool_stats,
1863 .set_ringparam = bnxt_set_ringparam,
1864 .get_ringparam = bnxt_get_ringparam,
1865 .get_channels = bnxt_get_channels,
1866 .set_channels = bnxt_set_channels,
1867#ifdef CONFIG_RFS_ACCEL
1868 .get_rxnfc = bnxt_get_rxnfc,
1869#endif
1870 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
1871 .get_rxfh_key_size = bnxt_get_rxfh_key_size,
1872 .get_rxfh = bnxt_get_rxfh,
1873 .flash_device = bnxt_flash_device,
1874 .get_eeprom_len = bnxt_get_eeprom_len,
1875 .get_eeprom = bnxt_get_eeprom,
1876 .set_eeprom = bnxt_set_eeprom,
1877 .get_link = bnxt_get_link,
72b34f04
MC		 1878 .get_eee = bnxt_get_eee,
1879 .set_eee = bnxt_set_eee,
42ee18fe
AK		 1880 .get_module_info = bnxt_get_module_info,
1881 .get_module_eeprom = bnxt_get_module_eeprom,
c0c050c5 1882};
Linux 6.x block layer and io_uring tree(s)