[linux-2.6-block.git] / drivers / net / ethernet / broadcom / bgmac-platform.c

/*
 * Copyright (C) 2016 Broadcom
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#define pr_fmt(fmt)		KBUILD_MODNAME ": " fmt

#include <linux/bcma/bcma.h>
#include <linux/brcmphy.h>
#include <linux/etherdevice.h>
#include <linux/of_address.h>
#include <linux/of_mdio.h>
#include <linux/of_net.h>
#include "bgmac.h"

#define NICPM_PADRING_CFG		0x00000004
#define NICPM_IOMUX_CTRL		0x00000008

#define NICPM_PADRING_CFG_INIT_VAL	0x74000000
#define NICPM_IOMUX_CTRL_INIT_VAL_AX	0x21880000

#define NICPM_IOMUX_CTRL_INIT_VAL	0x3196e000
#define NICPM_IOMUX_CTRL_SPD_SHIFT	10
#define NICPM_IOMUX_CTRL_SPD_10M	0
#define NICPM_IOMUX_CTRL_SPD_100M	1
#define NICPM_IOMUX_CTRL_SPD_1000M	2

static u32 platform_bgmac_read(struct bgmac *bgmac, u16 offset)
{
	return readl(bgmac->plat.base + offset);
}

static void platform_bgmac_write(struct bgmac *bgmac, u16 offset, u32 value)
{
	writel(value, bgmac->plat.base + offset);
}

static u32 platform_bgmac_idm_read(struct bgmac *bgmac, u16 offset)
{
	return readl(bgmac->plat.idm_base + offset);
}

static void platform_bgmac_idm_write(struct bgmac *bgmac, u16 offset, u32 value)
{
	return writel(value, bgmac->plat.idm_base + offset);
}

static bool platform_bgmac_clk_enabled(struct bgmac *bgmac)
{
	if ((bgmac_idm_read(bgmac, BCMA_IOCTL) & BGMAC_CLK_EN) != BGMAC_CLK_EN)
		return false;
	if (bgmac_idm_read(bgmac, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
		return false;
	return true;
}

static void platform_bgmac_clk_enable(struct bgmac *bgmac, u32 flags)
{
	u32 val;

	/* The Reset Control register only contains a single bit to show if the
	 * controller is currently in reset.  Do a sanity check here, just in
	 * case the bootloader happened to leave the device in reset.
	 */
	val = bgmac_idm_read(bgmac, BCMA_RESET_CTL);
	if (val) {
		bgmac_idm_write(bgmac, BCMA_RESET_CTL, 0);
		bgmac_idm_read(bgmac, BCMA_RESET_CTL);
		udelay(1);
	}

	val = bgmac_idm_read(bgmac, BCMA_IOCTL);
	/* Some bits of BCMA_IOCTL set by HW/ATF and should not change */
	val |= flags & ~(BGMAC_AWCACHE | BGMAC_ARCACHE | BGMAC_AWUSER |
			 BGMAC_ARUSER);
	val |= BGMAC_CLK_EN;
	bgmac_idm_write(bgmac, BCMA_IOCTL, val);
	bgmac_idm_read(bgmac, BCMA_IOCTL);
	udelay(1);
}

static void platform_bgmac_cco_ctl_maskset(struct bgmac *bgmac, u32 offset,
					   u32 mask, u32 set)
{
	/* This shouldn't be encountered */
	WARN_ON(1);
}

static u32 platform_bgmac_get_bus_clock(struct bgmac *bgmac)
{
	/* This shouldn't be encountered */
	WARN_ON(1);

	return 0;
}

static void platform_bgmac_cmn_maskset32(struct bgmac *bgmac, u16 offset,
					 u32 mask, u32 set)
{
	/* This shouldn't be encountered */
	WARN_ON(1);
}

static void bgmac_nicpm_speed_set(struct net_device *net_dev)
{
	struct bgmac *bgmac = netdev_priv(net_dev);
	u32 val;

	if (!bgmac->plat.nicpm_base)
		return;

	/* SET RGMII IO CONFIG */
	writel(NICPM_PADRING_CFG_INIT_VAL,
	       bgmac->plat.nicpm_base + NICPM_PADRING_CFG);

	val = NICPM_IOMUX_CTRL_INIT_VAL;
	switch (bgmac->net_dev->phydev->speed) {
	default:
		netdev_err(net_dev, "Unsupported speed. Defaulting to 1000Mb\n");
	case SPEED_1000:
		val |= NICPM_IOMUX_CTRL_SPD_1000M << NICPM_IOMUX_CTRL_SPD_SHIFT;
		break;
	case SPEED_100:
		val |= NICPM_IOMUX_CTRL_SPD_100M << NICPM_IOMUX_CTRL_SPD_SHIFT;
		break;
	case SPEED_10:
		val |= NICPM_IOMUX_CTRL_SPD_10M << NICPM_IOMUX_CTRL_SPD_SHIFT;
		break;
	}

	writel(val, bgmac->plat.nicpm_base + NICPM_IOMUX_CTRL);

	bgmac_adjust_link(bgmac->net_dev);
}

static int platform_phy_connect(struct bgmac *bgmac)
{
	struct phy_device *phy_dev;

	if (bgmac->plat.nicpm_base)
		phy_dev = of_phy_get_and_connect(bgmac->net_dev,
						 bgmac->dev->of_node,
						 bgmac_nicpm_speed_set);
	else
		phy_dev = of_phy_get_and_connect(bgmac->net_dev,
						 bgmac->dev->of_node,
						 bgmac_adjust_link);
	if (!phy_dev) {
		dev_err(bgmac->dev, "PHY connection failed\n");
		return -ENODEV;
	}

	return 0;
}

static int bgmac_probe(struct platform_device *pdev)
{
	struct device_node *np = pdev->dev.of_node;
	struct bgmac *bgmac;
	struct resource *regs;
	const u8 *mac_addr;

	bgmac = bgmac_alloc(&pdev->dev);
	if (!bgmac)
		return -ENOMEM;

	platform_set_drvdata(pdev, bgmac);

	/* Set the features of the 4707 family */
	bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
	bgmac->feature_flags |= BGMAC_FEAT_NO_RESET;
	bgmac->feature_flags |= BGMAC_FEAT_CMDCFG_SR_REV4;
	bgmac->feature_flags |= BGMAC_FEAT_TX_MASK_SETUP;
	bgmac->feature_flags |= BGMAC_FEAT_RX_MASK_SETUP;

	bgmac->dev = &pdev->dev;
	bgmac->dma_dev = &pdev->dev;

	mac_addr = of_get_mac_address(np);
	if (mac_addr)
		ether_addr_copy(bgmac->net_dev->dev_addr, mac_addr);
	else
		dev_warn(&pdev->dev, "MAC address not present in device tree\n");

	bgmac->irq = platform_get_irq(pdev, 0);
	if (bgmac->irq < 0) {
		dev_err(&pdev->dev, "Unable to obtain IRQ\n");
		return bgmac->irq;
	}

	regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "amac_base");
	if (!regs) {
		dev_err(&pdev->dev, "Unable to obtain base resource\n");
		return -EINVAL;
	}

	bgmac->plat.base = devm_ioremap_resource(&pdev->dev, regs);
	if (IS_ERR(bgmac->plat.base))
		return PTR_ERR(bgmac->plat.base);

	regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "idm_base");
	if (!regs) {
		dev_err(&pdev->dev, "Unable to obtain idm resource\n");
		return -EINVAL;
	}

	bgmac->plat.idm_base = devm_ioremap_resource(&pdev->dev, regs);
	if (IS_ERR(bgmac->plat.idm_base))
		return PTR_ERR(bgmac->plat.idm_base);

	regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nicpm_base");
	if (regs) {
		bgmac->plat.nicpm_base = devm_ioremap_resource(&pdev->dev,
							       regs);
		if (IS_ERR(bgmac->plat.nicpm_base))
			return PTR_ERR(bgmac->plat.nicpm_base);
	}

	bgmac->read = platform_bgmac_read;
	bgmac->write = platform_bgmac_write;
	bgmac->idm_read = platform_bgmac_idm_read;
	bgmac->idm_write = platform_bgmac_idm_write;
	bgmac->clk_enabled = platform_bgmac_clk_enabled;
	bgmac->clk_enable = platform_bgmac_clk_enable;
	bgmac->cco_ctl_maskset = platform_bgmac_cco_ctl_maskset;
	bgmac->get_bus_clock = platform_bgmac_get_bus_clock;
	bgmac->cmn_maskset32 = platform_bgmac_cmn_maskset32;
	if (of_parse_phandle(np, "phy-handle", 0)) {
		bgmac->phy_connect = platform_phy_connect;
	} else {
		bgmac->phy_connect = bgmac_phy_connect_direct;
		bgmac->feature_flags |= BGMAC_FEAT_FORCE_SPEED_2500;
	}

	return bgmac_enet_probe(bgmac);
}

static int bgmac_remove(struct platform_device *pdev)
{
	struct bgmac *bgmac = platform_get_drvdata(pdev);

	bgmac_enet_remove(bgmac);

	return 0;
}

#ifdef CONFIG_PM
static int bgmac_suspend(struct device *dev)
{
	struct bgmac *bgmac = dev_get_drvdata(dev);

	return bgmac_enet_suspend(bgmac);
}

static int bgmac_resume(struct device *dev)
{
	struct bgmac *bgmac = dev_get_drvdata(dev);

	return bgmac_enet_resume(bgmac);
}

static const struct dev_pm_ops bgmac_pm_ops = {
	.suspend = bgmac_suspend,
	.resume = bgmac_resume
};

#define BGMAC_PM_OPS (&bgmac_pm_ops)
#else
#define BGMAC_PM_OPS NULL
#endif /* CONFIG_PM */

static const struct of_device_id bgmac_of_enet_match[] = {
	{.compatible = "brcm,amac",},
	{.compatible = "brcm,nsp-amac",},
	{.compatible = "brcm,ns2-amac",},
	{},
};

MODULE_DEVICE_TABLE(of, bgmac_of_enet_match);

static struct platform_driver bgmac_enet_driver = {
	.driver = {
		.name  = "bgmac-enet",
		.of_match_table = bgmac_of_enet_match,
		.pm = BGMAC_PM_OPS
	},
	.probe = bgmac_probe,
	.remove = bgmac_remove,
};

module_platform_driver(bgmac_enet_driver);
MODULE_LICENSE("GPL");
Commit	Line	Data
f6a95a24 JM	1	/*
	2	* Copyright (C) 2016 Broadcom
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License as
	6	* published by the Free Software Foundation version 2.
	7	*
	8	* This program is distributed "as is" WITHOUT ANY WARRANTY of any
	9	* kind, whether express or implied; without even the implied warranty
	10	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*/
	13
	14	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
	15
	16	#include <linux/bcma/bcma.h>
dd5c5d03	17	#include <linux/brcmphy.h>
f6a95a24 JM	18	#include <linux/etherdevice.h>
f6a95a24 JM	19	#include <linux/of_address.h>
1676aba5	20	#include <linux/of_mdio.h>
f6a95a24 JM	21	#include <linux/of_net.h>
	22	#include "bgmac.h"
	23
f3537b34	24	#define NICPM_PADRING_CFG 0x00000004
dd5c5d03 JM	25	#define NICPM_IOMUX_CTRL 0x00000008
dd5c5d03 JM	26
f3537b34 JZ	27	#define NICPM_PADRING_CFG_INIT_VAL 0x74000000
	28	#define NICPM_IOMUX_CTRL_INIT_VAL_AX 0x21880000
	29
dd5c5d03 JM	30	#define NICPM_IOMUX_CTRL_INIT_VAL 0x3196e000
	31	#define NICPM_IOMUX_CTRL_SPD_SHIFT 10
	32	#define NICPM_IOMUX_CTRL_SPD_10M 0
	33	#define NICPM_IOMUX_CTRL_SPD_100M 1
	34	#define NICPM_IOMUX_CTRL_SPD_1000M 2
	35
f6a95a24 JM	36	static u32 platform_bgmac_read(struct bgmac *bgmac, u16 offset)
	37	{
	38	return readl(bgmac->plat.base + offset);
	39	}
	40
	41	static void platform_bgmac_write(struct bgmac *bgmac, u16 offset, u32 value)
	42	{
	43	writel(value, bgmac->plat.base + offset);
	44	}
	45
	46	static u32 platform_bgmac_idm_read(struct bgmac *bgmac, u16 offset)
	47	{
	48	return readl(bgmac->plat.idm_base + offset);
	49	}
	50
	51	static void platform_bgmac_idm_write(struct bgmac *bgmac, u16 offset, u32 value)
	52	{
	53	return writel(value, bgmac->plat.idm_base + offset);
	54	}
	55
	56	static bool platform_bgmac_clk_enabled(struct bgmac *bgmac)
	57	{
16206524	58	if ((bgmac_idm_read(bgmac, BCMA_IOCTL) & BGMAC_CLK_EN) != BGMAC_CLK_EN)
f6a95a24 JM	59	return false;
	60	if (bgmac_idm_read(bgmac, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
	61	return false;
	62	return true;
	63	}
	64
	65	static void platform_bgmac_clk_enable(struct bgmac *bgmac, u32 flags)
	66	{
16206524	67	u32 val;
f6a95a24	68
16206524 JM	69	/* The Reset Control register only contains a single bit to show if the
	70	* controller is currently in reset. Do a sanity check here, just in
	71	* case the bootloader happened to leave the device in reset.
	72	*/
	73	val = bgmac_idm_read(bgmac, BCMA_RESET_CTL);
	74	if (val) {
	75	bgmac_idm_write(bgmac, BCMA_RESET_CTL, 0);
	76	bgmac_idm_read(bgmac, BCMA_RESET_CTL);
	77	udelay(1);
	78	}
	79
	80	val = bgmac_idm_read(bgmac, BCMA_IOCTL);
	81	/* Some bits of BCMA_IOCTL set by HW/ATF and should not change */
	82	val \|= flags & ~(BGMAC_AWCACHE \| BGMAC_ARCACHE \| BGMAC_AWUSER \|
	83	BGMAC_ARUSER);
	84	val \|= BGMAC_CLK_EN;
	85	bgmac_idm_write(bgmac, BCMA_IOCTL, val);
f6a95a24 JM	86	bgmac_idm_read(bgmac, BCMA_IOCTL);
	87	udelay(1);
	88	}
	89
	90	static void platform_bgmac_cco_ctl_maskset(struct bgmac *bgmac, u32 offset,
	91	u32 mask, u32 set)
	92	{
	93	/* This shouldn't be encountered */
	94	WARN_ON(1);
	95	}
	96
	97	static u32 platform_bgmac_get_bus_clock(struct bgmac *bgmac)
	98	{
	99	/* This shouldn't be encountered */
	100	WARN_ON(1);
	101
	102	return 0;
	103	}
	104
	105	static void platform_bgmac_cmn_maskset32(struct bgmac *bgmac, u16 offset,
	106	u32 mask, u32 set)
	107	{
	108	/* This shouldn't be encountered */
	109	WARN_ON(1);
	110	}
	111
dd5c5d03 JM	112	static void bgmac_nicpm_speed_set(struct net_device *net_dev)
	113	{
	114	struct bgmac *bgmac = netdev_priv(net_dev);
	115	u32 val;
	116
	117	if (!bgmac->plat.nicpm_base)
	118	return;
	119
f3537b34 JZ	120	/* SET RGMII IO CONFIG */
	121	writel(NICPM_PADRING_CFG_INIT_VAL,
	122	bgmac->plat.nicpm_base + NICPM_PADRING_CFG);
	123
dd5c5d03 JM	124	val = NICPM_IOMUX_CTRL_INIT_VAL;
	125	switch (bgmac->net_dev->phydev->speed) {
	126	default:
	127	netdev_err(net_dev, "Unsupported speed. Defaulting to 1000Mb\n");
	128	case SPEED_1000:
	129	val \|= NICPM_IOMUX_CTRL_SPD_1000M << NICPM_IOMUX_CTRL_SPD_SHIFT;
	130	break;
	131	case SPEED_100:
	132	val \|= NICPM_IOMUX_CTRL_SPD_100M << NICPM_IOMUX_CTRL_SPD_SHIFT;
	133	break;
	134	case SPEED_10:
	135	val \|= NICPM_IOMUX_CTRL_SPD_10M << NICPM_IOMUX_CTRL_SPD_SHIFT;
	136	break;
	137	}
	138
	139	writel(val, bgmac->plat.nicpm_base + NICPM_IOMUX_CTRL);
	140
	141	bgmac_adjust_link(bgmac->net_dev);
	142	}
	143
1676aba5 JM	144	static int platform_phy_connect(struct bgmac *bgmac)
	145	{
	146	struct phy_device *phy_dev;
	147
dd5c5d03 JM	148	if (bgmac->plat.nicpm_base)
	149	phy_dev = of_phy_get_and_connect(bgmac->net_dev,
	150	bgmac->dev->of_node,
	151	bgmac_nicpm_speed_set);
	152	else
	153	phy_dev = of_phy_get_and_connect(bgmac->net_dev,
	154	bgmac->dev->of_node,
	155	bgmac_adjust_link);
1676aba5 JM	156	if (!phy_dev) {
	157	dev_err(bgmac->dev, "PHY connection failed\n");
	158	return -ENODEV;
	159	}
	160
	161	return 0;
	162	}
	163
f6a95a24 JM	164	static int bgmac_probe(struct platform_device *pdev)
	165	{
	166	struct device_node *np = pdev->dev.of_node;
	167	struct bgmac *bgmac;
	168	struct resource *regs;
	169	const u8 *mac_addr;
	170
34a5102c	171	bgmac = bgmac_alloc(&pdev->dev);
f6a95a24 JM	172	if (!bgmac)
	173	return -ENOMEM;
	174
	175	platform_set_drvdata(pdev, bgmac);
	176
	177	/* Set the features of the 4707 family */
	178	bgmac->feature_flags \|= BGMAC_FEAT_CLKCTLST;
	179	bgmac->feature_flags \|= BGMAC_FEAT_NO_RESET;
f6a95a24 JM	180	bgmac->feature_flags \|= BGMAC_FEAT_CMDCFG_SR_REV4;
	181	bgmac->feature_flags \|= BGMAC_FEAT_TX_MASK_SETUP;
	182	bgmac->feature_flags \|= BGMAC_FEAT_RX_MASK_SETUP;
	183
	184	bgmac->dev = &pdev->dev;
	185	bgmac->dma_dev = &pdev->dev;
	186
	187	mac_addr = of_get_mac_address(np);
	188	if (mac_addr)
6850f8b5	189	ether_addr_copy(bgmac->net_dev->dev_addr, mac_addr);
f6a95a24 JM	190	else
	191	dev_warn(&pdev->dev, "MAC address not present in device tree\n");
	192
	193	bgmac->irq = platform_get_irq(pdev, 0);
	194	if (bgmac->irq < 0) {
	195	dev_err(&pdev->dev, "Unable to obtain IRQ\n");
	196	return bgmac->irq;
	197	}
	198
	199	regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "amac_base");
	200	if (!regs) {
	201	dev_err(&pdev->dev, "Unable to obtain base resource\n");
	202	return -EINVAL;
	203	}
	204
	205	bgmac->plat.base = devm_ioremap_resource(&pdev->dev, regs);
ce3a380d	206	if (IS_ERR(bgmac->plat.base))
f6a95a24	207	return PTR_ERR(bgmac->plat.base);
f6a95a24 JM	208
	209	regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "idm_base");
	210	if (!regs) {
	211	dev_err(&pdev->dev, "Unable to obtain idm resource\n");
	212	return -EINVAL;
	213	}
	214
	215	bgmac->plat.idm_base = devm_ioremap_resource(&pdev->dev, regs);
ce3a380d	216	if (IS_ERR(bgmac->plat.idm_base))
f6a95a24	217	return PTR_ERR(bgmac->plat.idm_base);
f6a95a24	218
dd5c5d03 JM	219	regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nicpm_base");
	220	if (regs) {
	221	bgmac->plat.nicpm_base = devm_ioremap_resource(&pdev->dev,
	222	regs);
	223	if (IS_ERR(bgmac->plat.nicpm_base))
	224	return PTR_ERR(bgmac->plat.nicpm_base);
	225	}
	226
f6a95a24 JM	227	bgmac->read = platform_bgmac_read;
	228	bgmac->write = platform_bgmac_write;
	229	bgmac->idm_read = platform_bgmac_idm_read;
	230	bgmac->idm_write = platform_bgmac_idm_write;
	231	bgmac->clk_enabled = platform_bgmac_clk_enabled;
	232	bgmac->clk_enable = platform_bgmac_clk_enable;
	233	bgmac->cco_ctl_maskset = platform_bgmac_cco_ctl_maskset;
	234	bgmac->get_bus_clock = platform_bgmac_get_bus_clock;
	235	bgmac->cmn_maskset32 = platform_bgmac_cmn_maskset32;
1676aba5 JM	236	if (of_parse_phandle(np, "phy-handle", 0)) {
	237	bgmac->phy_connect = platform_phy_connect;
	238	} else {
	239	bgmac->phy_connect = bgmac_phy_connect_direct;
	240	bgmac->feature_flags \|= BGMAC_FEAT_FORCE_SPEED_2500;
	241	}
f6a95a24 JM	242
	243	return bgmac_enet_probe(bgmac);
	244	}
	245
	246	static int bgmac_remove(struct platform_device *pdev)
	247	{
	248	struct bgmac *bgmac = platform_get_drvdata(pdev);
	249
	250	bgmac_enet_remove(bgmac);
	251
	252	return 0;
	253	}
	254
f3537b34 JZ	255	#ifdef CONFIG_PM
	256	static int bgmac_suspend(struct device *dev)
	257	{
	258	struct bgmac *bgmac = dev_get_drvdata(dev);
	259
	260	return bgmac_enet_suspend(bgmac);
	261	}
	262
	263	static int bgmac_resume(struct device *dev)
	264	{
	265	struct bgmac *bgmac = dev_get_drvdata(dev);
	266
	267	return bgmac_enet_resume(bgmac);
	268	}
	269
	270	static const struct dev_pm_ops bgmac_pm_ops = {
	271	.suspend = bgmac_suspend,
	272	.resume = bgmac_resume
	273	};
	274
	275	#define BGMAC_PM_OPS (&bgmac_pm_ops)
	276	#else
	277	#define BGMAC_PM_OPS NULL
	278	#endif /* CONFIG_PM */
	279
f6a95a24 JM	280	static const struct of_device_id bgmac_of_enet_match[] = {
	281	{.compatible = "brcm,amac",},
	282	{.compatible = "brcm,nsp-amac",},
dd5c5d03	283	{.compatible = "brcm,ns2-amac",},
f6a95a24 JM	284	{},
	285	};
	286
	287	MODULE_DEVICE_TABLE(of, bgmac_of_enet_match);
	288
	289	static struct platform_driver bgmac_enet_driver = {
	290	.driver = {
	291	.name = "bgmac-enet",
	292	.of_match_table = bgmac_of_enet_match,
f3537b34	293	.pm = BGMAC_PM_OPS
f6a95a24 JM	294	},
	295	.probe = bgmac_probe,
	296	.remove = bgmac_remove,
	297	};
	298
	299	module_platform_driver(bgmac_enet_driver);
	300	MODULE_LICENSE("GPL");