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net: systemport: Fix wake-up interrupt race during resume
[linux-2.6-block.git] / drivers / net / ethernet / broadcom / bcmsysport.c
CommitLineData
80105bef
FF		 1/*
2 * Broadcom BCM7xxx System Port Ethernet MAC driver
3 *
4 * Copyright (C) 2014 Broadcom Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/netdevice.h>
18#include <linux/etherdevice.h>
19#include <linux/platform_device.h>
20#include <linux/of.h>
21#include <linux/of_net.h>
22#include <linux/of_mdio.h>
23#include <linux/phy.h>
24#include <linux/phy_fixed.h>
c6e970a0 25#include <net/dsa.h>
80105bef
FF		 26#include <net/ip.h>
27#include <net/ipv6.h>
28
29#include "bcmsysport.h"
30
31/* I/O accessors register helpers */
32#define BCM_SYSPORT_IO_MACRO(name, offset) \
33static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \
34{ \
f1dd1993 35 u32 reg = readl_relaxed(priv->base + offset + off); \
80105bef
FF		 36 return reg; \
37} \
38static inline void name##_writel(struct bcm_sysport_priv *priv, \
39 u32 val, u32 off) \
40{ \
f1dd1993 41 writel_relaxed(val, priv->base + offset + off); \
80105bef
FF		 42} \
43
44BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
45BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
46BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
44a4524c 47BCM_SYSPORT_IO_MACRO(gib, SYS_PORT_GIB_OFFSET);
80105bef 48BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
80105bef
FF		 49BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
50BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
51BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
52BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
53BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
54
44a4524c
FF		 55/* On SYSTEMPORT Lite, any register after RDMA_STATUS has the exact
56 * same layout, except it has been moved by 4 bytes up, *sigh*
57 */
58static inline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off)
59{
60 if (priv->is_lite && off >= RDMA_STATUS)
61 off += 4;
f1dd1993 62 return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off);
44a4524c
FF		 63}
64
65static inline void rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off)
66{
67 if (priv->is_lite && off >= RDMA_STATUS)
68 off += 4;
f1dd1993 69 writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off);
44a4524c
FF		 70}
71
72static inline u32 tdma_control_bit(struct bcm_sysport_priv *priv, u32 bit)
73{
74 if (!priv->is_lite) {
75 return BIT(bit);
76 } else {
77 if (bit >= ACB_ALGO)
78 return BIT(bit + 1);
79 else
80 return BIT(bit);
81 }
82}
83
80105bef
FF		 84/* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
85 * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
86 */
87#define BCM_SYSPORT_INTR_L2(which) \
88static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
89 u32 mask) \
90{ \
80105bef 91 priv->irq##which##_mask &= ~(mask); \
9a0a5c4c 92 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
80105bef
FF		 93} \
94static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
95 u32 mask) \
96{ \
97 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
98 priv->irq##which##_mask |= (mask); \
99} \
100
101BCM_SYSPORT_INTR_L2(0)
102BCM_SYSPORT_INTR_L2(1)
103
104/* Register accesses to GISB/RBUS registers are expensive (few hundred
105 * nanoseconds), so keep the check for 64-bits explicit here to save
106 * one register write per-packet on 32-bits platforms.
107 */
108static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
109 void __iomem *d,
110 dma_addr_t addr)
111{
112#ifdef CONFIG_PHYS_ADDR_T_64BIT
f1dd1993 113 writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
23acb2fc 114 d + DESC_ADDR_HI_STATUS_LEN);
80105bef 115#endif
f1dd1993 116 writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO);
80105bef
FF		 117}
118
119static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
23acb2fc
FF		 120 struct dma_desc *desc,
121 unsigned int port)
80105bef
FF		 122{
123 /* Ports are latched, so write upper address first */
124 tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
125 tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
126}
127
128/* Ethtool operations */
80105bef 129static int bcm_sysport_set_rx_csum(struct net_device *dev,
23acb2fc 130 netdev_features_t wanted)
80105bef
FF		 131{
132 struct bcm_sysport_priv *priv = netdev_priv(dev);
133 u32 reg;
134
9d34c1cb 135 priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
80105bef 136 reg = rxchk_readl(priv, RXCHK_CONTROL);
9d34c1cb 137 if (priv->rx_chk_en)
80105bef
FF		 138 reg |= RXCHK_EN;
139 else
140 reg &= ~RXCHK_EN;
141
142 /* If UniMAC forwards CRC, we need to skip over it to get
143 * a valid CHK bit to be set in the per-packet status word
144 */
9d34c1cb 145 if (priv->rx_chk_en && priv->crc_fwd)
80105bef
FF		 146 reg |= RXCHK_SKIP_FCS;
147 else
148 reg &= ~RXCHK_SKIP_FCS;
149
d09d3038
FF		 150 /* If Broadcom tags are enabled (e.g: using a switch), make
151 * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
152 * tag after the Ethernet MAC Source Address.
153 */
154 if (netdev_uses_dsa(dev))
155 reg |= RXCHK_BRCM_TAG_EN;
156 else
157 reg &= ~RXCHK_BRCM_TAG_EN;
158
80105bef
FF		 159 rxchk_writel(priv, reg, RXCHK_CONTROL);
160
161 return 0;
162}
163
164static int bcm_sysport_set_tx_csum(struct net_device *dev,
23acb2fc 165 netdev_features_t wanted)
80105bef
FF		 166{
167 struct bcm_sysport_priv *priv = netdev_priv(dev);
168 u32 reg;
169
170 /* Hardware transmit checksum requires us to enable the Transmit status
171 * block prepended to the packet contents
172 */
173 priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
174 reg = tdma_readl(priv, TDMA_CONTROL);
175 if (priv->tsb_en)
44a4524c 176 reg |= tdma_control_bit(priv, TSB_EN);
80105bef 177 else
44a4524c 178 reg &= ~tdma_control_bit(priv, TSB_EN);
80105bef
FF		 179 tdma_writel(priv, reg, TDMA_CONTROL);
180
181 return 0;
182}
183
184static int bcm_sysport_set_features(struct net_device *dev,
23acb2fc 185 netdev_features_t features)
80105bef
FF		 186{
187 netdev_features_t changed = features ^ dev->features;
188 netdev_features_t wanted = dev->wanted_features;
189 int ret = 0;
190
191 if (changed & NETIF_F_RXCSUM)
192 ret = bcm_sysport_set_rx_csum(dev, wanted);
193 if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
194 ret = bcm_sysport_set_tx_csum(dev, wanted);
195
196 return ret;
197}
198
199/* Hardware counters must be kept in sync because the order/offset
200 * is important here (order in structure declaration = order in hardware)
201 */
202static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
203 /* general stats */
10377ba7 204 STAT_NETDEV64(rx_packets),
205 STAT_NETDEV64(tx_packets),
206 STAT_NETDEV64(rx_bytes),
207 STAT_NETDEV64(tx_bytes),
80105bef
FF		 208 STAT_NETDEV(rx_errors),
209 STAT_NETDEV(tx_errors),
210 STAT_NETDEV(rx_dropped),
211 STAT_NETDEV(tx_dropped),
212 STAT_NETDEV(multicast),
213 /* UniMAC RSV counters */
214 STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
215 STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
216 STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
217 STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
218 STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
219 STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
220 STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
221 STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
222 STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
223 STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
224 STAT_MIB_RX("rx_pkts", mib.rx.pkt),
225 STAT_MIB_RX("rx_bytes", mib.rx.bytes),
226 STAT_MIB_RX("rx_multicast", mib.rx.mca),
227 STAT_MIB_RX("rx_broadcast", mib.rx.bca),
228 STAT_MIB_RX("rx_fcs", mib.rx.fcs),
229 STAT_MIB_RX("rx_control", mib.rx.cf),
230 STAT_MIB_RX("rx_pause", mib.rx.pf),
231 STAT_MIB_RX("rx_unknown", mib.rx.uo),
232 STAT_MIB_RX("rx_align", mib.rx.aln),
233 STAT_MIB_RX("rx_outrange", mib.rx.flr),
234 STAT_MIB_RX("rx_code", mib.rx.cde),
235 STAT_MIB_RX("rx_carrier", mib.rx.fcr),
236 STAT_MIB_RX("rx_oversize", mib.rx.ovr),
237 STAT_MIB_RX("rx_jabber", mib.rx.jbr),
238 STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
239 STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
240 STAT_MIB_RX("rx_unicast", mib.rx.uc),
241 STAT_MIB_RX("rx_ppp", mib.rx.ppp),
242 STAT_MIB_RX("rx_crc", mib.rx.rcrc),
243 /* UniMAC TSV counters */
244 STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
245 STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
246 STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
247 STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
248 STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
249 STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
250 STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
251 STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
252 STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
253 STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
254 STAT_MIB_TX("tx_pkts", mib.tx.pkts),
255 STAT_MIB_TX("tx_multicast", mib.tx.mca),
256 STAT_MIB_TX("tx_broadcast", mib.tx.bca),
257 STAT_MIB_TX("tx_pause", mib.tx.pf),
258 STAT_MIB_TX("tx_control", mib.tx.cf),
259 STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
260 STAT_MIB_TX("tx_oversize", mib.tx.ovr),
261 STAT_MIB_TX("tx_defer", mib.tx.drf),
262 STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
263 STAT_MIB_TX("tx_single_col", mib.tx.scl),
264 STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
265 STAT_MIB_TX("tx_late_col", mib.tx.lcl),
266 STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
267 STAT_MIB_TX("tx_frags", mib.tx.frg),
268 STAT_MIB_TX("tx_total_col", mib.tx.ncl),
269 STAT_MIB_TX("tx_jabber", mib.tx.jbr),
270 STAT_MIB_TX("tx_bytes", mib.tx.bytes),
271 STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
272 STAT_MIB_TX("tx_unicast", mib.tx.uc),
273 /* UniMAC RUNT counters */
274 STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
275 STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
276 STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
277 STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
278 /* RXCHK misc statistics */
279 STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
280 STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
23acb2fc 281 RXCHK_OTHER_DISC_CNTR),
80105bef
FF		 282 /* RBUF misc statistics */
283 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
284 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
55ff4ea9
FF		 285 STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
286 STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
287 STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
30defeb2 288 /* Per TX-queue statistics are dynamically appended */
80105bef
FF		 289};
290
291#define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats)
292
293static void bcm_sysport_get_drvinfo(struct net_device *dev,
23acb2fc 294 struct ethtool_drvinfo *info)
80105bef
FF		 295{
296 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
297 strlcpy(info->version, "0.1", sizeof(info->version));
298 strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
80105bef
FF		 299}
300
301static u32 bcm_sysport_get_msglvl(struct net_device *dev)
302{
303 struct bcm_sysport_priv *priv = netdev_priv(dev);
304
305 return priv->msg_enable;
306}
307
308static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
309{
310 struct bcm_sysport_priv *priv = netdev_priv(dev);
311
312 priv->msg_enable = enable;
313}
314
44a4524c
FF		 315static inline bool bcm_sysport_lite_stat_valid(enum bcm_sysport_stat_type type)
316{
317 switch (type) {
318 case BCM_SYSPORT_STAT_NETDEV:
10377ba7 319 case BCM_SYSPORT_STAT_NETDEV64:
44a4524c
FF		 320 case BCM_SYSPORT_STAT_RXCHK:
321 case BCM_SYSPORT_STAT_RBUF:
322 case BCM_SYSPORT_STAT_SOFT:
323 return true;
324 default:
325 return false;
326 }
327}
328
80105bef
FF		 329static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
330{
44a4524c
FF		 331 struct bcm_sysport_priv *priv = netdev_priv(dev);
332 const struct bcm_sysport_stats *s;
333 unsigned int i, j;
334
80105bef
FF		 335 switch (string_set) {
336 case ETH_SS_STATS:
44a4524c
FF		 337 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
338 s = &bcm_sysport_gstrings_stats[i];
339 if (priv->is_lite &&
340 !bcm_sysport_lite_stat_valid(s->type))
341 continue;
342 j++;
343 }
30defeb2
FF		 344 /* Include per-queue statistics */
345 return j + dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
80105bef
FF		 346 default:
347 return -EOPNOTSUPP;
348 }
349}
350
351static void bcm_sysport_get_strings(struct net_device *dev,
23acb2fc 352 u32 stringset, u8 *data)
80105bef 353{
44a4524c
FF		 354 struct bcm_sysport_priv *priv = netdev_priv(dev);
355 const struct bcm_sysport_stats *s;
30defeb2 356 char buf[128];
44a4524c 357 int i, j;
80105bef
FF		 358
359 switch (stringset) {
360 case ETH_SS_STATS:
44a4524c
FF		 361 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
362 s = &bcm_sysport_gstrings_stats[i];
363 if (priv->is_lite &&
364 !bcm_sysport_lite_stat_valid(s->type))
365 continue;
366
367 memcpy(data + j * ETH_GSTRING_LEN, s->stat_string,
23acb2fc 368 ETH_GSTRING_LEN);
44a4524c 369 j++;
80105bef 370 }
30defeb2
FF		 371
372 for (i = 0; i < dev->num_tx_queues; i++) {
373 snprintf(buf, sizeof(buf), "txq%d_packets", i);
374 memcpy(data + j * ETH_GSTRING_LEN, buf,
375 ETH_GSTRING_LEN);
376 j++;
377
378 snprintf(buf, sizeof(buf), "txq%d_bytes", i);
379 memcpy(data + j * ETH_GSTRING_LEN, buf,
380 ETH_GSTRING_LEN);
381 j++;
382 }
80105bef
FF		 383 break;
384 default:
385 break;
386 }
387}
388
389static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
390{
391 int i, j = 0;
392
393 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
394 const struct bcm_sysport_stats *s;
395 u8 offset = 0;
396 u32 val = 0;
397 char *p;
398
399 s = &bcm_sysport_gstrings_stats[i];
400 switch (s->type) {
401 case BCM_SYSPORT_STAT_NETDEV:
10377ba7 402 case BCM_SYSPORT_STAT_NETDEV64:
55ff4ea9 403 case BCM_SYSPORT_STAT_SOFT:
80105bef
FF		 404 continue;
405 case BCM_SYSPORT_STAT_MIB_RX:
406 case BCM_SYSPORT_STAT_MIB_TX:
407 case BCM_SYSPORT_STAT_RUNT:
44a4524c
FF		 408 if (priv->is_lite)
409 continue;
410
80105bef
FF		 411 if (s->type != BCM_SYSPORT_STAT_MIB_RX)
412 offset = UMAC_MIB_STAT_OFFSET;
413 val = umac_readl(priv, UMAC_MIB_START + j + offset);
414 break;
415 case BCM_SYSPORT_STAT_RXCHK:
416 val = rxchk_readl(priv, s->reg_offset);
417 if (val == ~0)
418 rxchk_writel(priv, 0, s->reg_offset);
419 break;
420 case BCM_SYSPORT_STAT_RBUF:
421 val = rbuf_readl(priv, s->reg_offset);
422 if (val == ~0)
423 rbuf_writel(priv, 0, s->reg_offset);
424 break;
425 }
426
427 j += s->stat_sizeof;
428 p = (char *)priv + s->stat_offset;
429 *(u32 *)p = val;
430 }
431
432 netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
433}
434
8ecb1a29
FF		 435static void bcm_sysport_update_tx_stats(struct bcm_sysport_priv *priv,
436 u64 *tx_bytes, u64 *tx_packets)
437{
438 struct bcm_sysport_tx_ring *ring;
439 u64 bytes = 0, packets = 0;
440 unsigned int start;
441 unsigned int q;
442
443 for (q = 0; q < priv->netdev->num_tx_queues; q++) {
444 ring = &priv->tx_rings[q];
445 do {
446 start = u64_stats_fetch_begin_irq(&priv->syncp);
447 bytes = ring->bytes;
448 packets = ring->packets;
449 } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
450
451 *tx_bytes += bytes;
452 *tx_packets += packets;
453 }
454}
455
80105bef 456static void bcm_sysport_get_stats(struct net_device *dev,
23acb2fc 457 struct ethtool_stats *stats, u64 *data)
80105bef
FF		 458{
459 struct bcm_sysport_priv *priv = netdev_priv(dev);
10377ba7 460 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
461 struct u64_stats_sync *syncp = &priv->syncp;
30defeb2 462 struct bcm_sysport_tx_ring *ring;
8ecb1a29 463 u64 tx_bytes = 0, tx_packets = 0;
10377ba7 464 unsigned int start;
44a4524c 465 int i, j;
80105bef 466
8ecb1a29 467 if (netif_running(dev)) {
80105bef 468 bcm_sysport_update_mib_counters(priv);
8ecb1a29
FF		 469 bcm_sysport_update_tx_stats(priv, &tx_bytes, &tx_packets);
470 stats64->tx_bytes = tx_bytes;
471 stats64->tx_packets = tx_packets;
472 }
80105bef 473
44a4524c 474 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
80105bef
FF		 475 const struct bcm_sysport_stats *s;
476 char *p;
477
478 s = &bcm_sysport_gstrings_stats[i];
479 if (s->type == BCM_SYSPORT_STAT_NETDEV)
480 p = (char *)&dev->stats;
10377ba7 481 else if (s->type == BCM_SYSPORT_STAT_NETDEV64)
482 p = (char *)stats64;
80105bef
FF		 483 else
484 p = (char *)priv;
10377ba7 485
50ddfbaf
FF		 486 if (priv->is_lite && !bcm_sysport_lite_stat_valid(s->type))
487 continue;
80105bef 488 p += s->stat_offset;
10377ba7 489
8ecb1a29
FF		 490 if (s->stat_sizeof == sizeof(u64) &&
491 s->type == BCM_SYSPORT_STAT_NETDEV64) {
10377ba7 492 do {
493 start = u64_stats_fetch_begin_irq(syncp);
494 data[i] = *(u64 *)p;
495 } while (u64_stats_fetch_retry_irq(syncp, start));
8ecb1a29 496 } else
10377ba7 497 data[i] = *(u32 *)p;
44a4524c 498 j++;
80105bef 499 }
30defeb2
FF		 500
501 /* For SYSTEMPORT Lite since we have holes in our statistics, j would
502 * be equal to BCM_SYSPORT_STATS_LEN at the end of the loop, but it
503 * needs to point to how many total statistics we have minus the
504 * number of per TX queue statistics
505 */
506 j = bcm_sysport_get_sset_count(dev, ETH_SS_STATS) -
507 dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
508
509 for (i = 0; i < dev->num_tx_queues; i++) {
510 ring = &priv->tx_rings[i];
511 data[j] = ring->packets;
512 j++;
513 data[j] = ring->bytes;
514 j++;
515 }
80105bef
FF		 516}
517
83e82f4c
FF		 518static void bcm_sysport_get_wol(struct net_device *dev,
519 struct ethtool_wolinfo *wol)
520{
521 struct bcm_sysport_priv *priv = netdev_priv(dev);
522 u32 reg;
523
bb9051a2 524 wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER;
83e82f4c
FF		 525 wol->wolopts = priv->wolopts;
526
527 if (!(priv->wolopts & WAKE_MAGICSECURE))
528 return;
529
530 /* Return the programmed SecureOn password */
531 reg = umac_readl(priv, UMAC_PSW_MS);
532 put_unaligned_be16(reg, &wol->sopass[0]);
533 reg = umac_readl(priv, UMAC_PSW_LS);
534 put_unaligned_be32(reg, &wol->sopass[2]);
535}
536
537static int bcm_sysport_set_wol(struct net_device *dev,
23acb2fc 538 struct ethtool_wolinfo *wol)
83e82f4c
FF		 539{
540 struct bcm_sysport_priv *priv = netdev_priv(dev);
541 struct device *kdev = &priv->pdev->dev;
bb9051a2 542 u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER;
83e82f4c
FF		 543
544 if (!device_can_wakeup(kdev))
545 return -ENOTSUPP;
546
547 if (wol->wolopts & ~supported)
548 return -EINVAL;
549
550 /* Program the SecureOn password */
551 if (wol->wolopts & WAKE_MAGICSECURE) {
552 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
23acb2fc 553 UMAC_PSW_MS);
83e82f4c 554 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
23acb2fc 555 UMAC_PSW_LS);
83e82f4c
FF		 556 }
557
558 /* Flag the device and relevant IRQ as wakeup capable */
559 if (wol->wolopts) {
560 device_set_wakeup_enable(kdev, 1);
61b423a8
FF		 561 if (priv->wol_irq_disabled)
562 enable_irq_wake(priv->wol_irq);
83e82f4c
FF		 563 priv->wol_irq_disabled = 0;
564 } else {
565 device_set_wakeup_enable(kdev, 0);
566 /* Avoid unbalanced disable_irq_wake calls */
567 if (!priv->wol_irq_disabled)
568 disable_irq_wake(priv->wol_irq);
569 priv->wol_irq_disabled = 1;
570 }
571
572 priv->wolopts = wol->wolopts;
573
574 return 0;
575}
576
a8cdfbdf
FF		 577static void bcm_sysport_set_rx_coalesce(struct bcm_sysport_priv *priv,
578 u32 usecs, u32 pkts)
b6e0e875
FF		 579{
580 u32 reg;
581
582 reg = rdma_readl(priv, RDMA_MBDONE_INTR);
583 reg &= ~(RDMA_INTR_THRESH_MASK |
584 RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT);
a8cdfbdf
FF		 585 reg |= pkts;
586 reg |= DIV_ROUND_UP(usecs * 1000, 8192) << RDMA_TIMEOUT_SHIFT;
b6e0e875
FF		 587 rdma_writel(priv, reg, RDMA_MBDONE_INTR);
588}
589
fd41f2bf
FF		 590static void bcm_sysport_set_tx_coalesce(struct bcm_sysport_tx_ring *ring,
591 struct ethtool_coalesce *ec)
b6e0e875
FF		 592{
593 struct bcm_sysport_priv *priv = ring->priv;
594 u32 reg;
595
596 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(ring->index));
597 reg &= ~(RING_INTR_THRESH_MASK |
598 RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT);
fd41f2bf
FF		 599 reg |= ec->tx_max_coalesced_frames;
600 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) <<
b6e0e875
FF		 601 RING_TIMEOUT_SHIFT;
602 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(ring->index));
603}
604
b1a15e86
FF		 605static int bcm_sysport_get_coalesce(struct net_device *dev,
606 struct ethtool_coalesce *ec)
607{
608 struct bcm_sysport_priv *priv = netdev_priv(dev);
609 u32 reg;
610
611 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0));
612
613 ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000;
614 ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK;
615
d0634868
FF		 616 reg = rdma_readl(priv, RDMA_MBDONE_INTR);
617
618 ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000;
619 ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK;
b6e0e875 620 ec->use_adaptive_rx_coalesce = priv->dim.use_dim;
d0634868 621
b1a15e86
FF		 622 return 0;
623}
624
625static int bcm_sysport_set_coalesce(struct net_device *dev,
626 struct ethtool_coalesce *ec)
627{
628 struct bcm_sysport_priv *priv = netdev_priv(dev);
a8cdfbdf
FF		 629 struct net_dim_cq_moder moder;
630 u32 usecs, pkts;
b1a15e86 631 unsigned int i;
b1a15e86 632
d0634868
FF		 633 /* Base system clock is 125Mhz, DMA timeout is this reference clock
634 * divided by 1024, which yield roughly 8.192 us, our maximum value has
635 * to fit in the RING_TIMEOUT_MASK (16 bits).
b1a15e86
FF		 636 */
637 if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
d0634868
FF		 638 ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
639 ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
640 ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1)
b1a15e86
FF		 641 return -EINVAL;
642
d0634868 643 if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) ||
fd41f2bf
FF		 644 (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0) ||
645 ec->use_adaptive_tx_coalesce)
b1a15e86
FF		 646 return -EINVAL;
647
fd41f2bf
FF		 648 for (i = 0; i < dev->num_tx_queues; i++)
649 bcm_sysport_set_tx_coalesce(&priv->tx_rings[i], ec);
b1a15e86 650
a8cdfbdf
FF		 651 priv->rx_coalesce_usecs = ec->rx_coalesce_usecs;
652 priv->rx_max_coalesced_frames = ec->rx_max_coalesced_frames;
653 usecs = priv->rx_coalesce_usecs;
654 pkts = priv->rx_max_coalesced_frames;
b6e0e875 655
a8cdfbdf 656 if (ec->use_adaptive_rx_coalesce && !priv->dim.use_dim) {
026a807c 657 moder = net_dim_get_def_rx_moderation(priv->dim.dim.mode);
a8cdfbdf
FF		 658 usecs = moder.usec;
659 pkts = moder.pkts;
b6e0e875 660 }
a8cdfbdf 661
b6e0e875 662 priv->dim.use_dim = ec->use_adaptive_rx_coalesce;
a8cdfbdf
FF		 663
664 /* Apply desired coalescing parameters */
665 bcm_sysport_set_rx_coalesce(priv, usecs, pkts);
d0634868 666
b1a15e86
FF		 667 return 0;
668}
669
80105bef
FF		 670static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
671{
c45182eb 672 dev_consume_skb_any(cb->skb);
80105bef
FF		 673 cb->skb = NULL;
674 dma_unmap_addr_set(cb, dma_addr, 0);
675}
676
c73b0183
FF		 677static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
678 struct bcm_sysport_cb *cb)
80105bef
FF		 679{
680 struct device *kdev = &priv->pdev->dev;
681 struct net_device *ndev = priv->netdev;
c73b0183 682 struct sk_buff *skb, *rx_skb;
80105bef 683 dma_addr_t mapping;
80105bef 684
c73b0183
FF		 685 /* Allocate a new SKB for a new packet */
686 skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
687 if (!skb) {
688 priv->mib.alloc_rx_buff_failed++;
80105bef 689 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
c73b0183 690 return NULL;
80105bef
FF		 691 }
692
c73b0183 693 mapping = dma_map_single(kdev, skb->data,
23acb2fc 694 RX_BUF_LENGTH, DMA_FROM_DEVICE);
c73b0183 695 if (dma_mapping_error(kdev, mapping)) {
60b4ea17 696 priv->mib.rx_dma_failed++;
c73b0183 697 dev_kfree_skb_any(skb);
80105bef 698 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
c73b0183 699 return NULL;
80105bef
FF		 700 }
701
c73b0183
FF		 702 /* Grab the current SKB on the ring */
703 rx_skb = cb->skb;
704 if (likely(rx_skb))
705 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
706 RX_BUF_LENGTH, DMA_FROM_DEVICE);
707
708 /* Put the new SKB on the ring */
709 cb->skb = skb;
80105bef 710 dma_unmap_addr_set(cb, dma_addr, mapping);
baf387a8 711 dma_desc_set_addr(priv, cb->bd_addr, mapping);
80105bef
FF		 712
713 netif_dbg(priv, rx_status, ndev, "RX refill\n");
714
c73b0183
FF		 715 /* Return the current SKB to the caller */
716 return rx_skb;
80105bef
FF		 717}
718
719static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
720{
721 struct bcm_sysport_cb *cb;
c73b0183 722 struct sk_buff *skb;
80105bef
FF		 723 unsigned int i;
724
725 for (i = 0; i < priv->num_rx_bds; i++) {
baf387a8 726 cb = &priv->rx_cbs[i];
c73b0183
FF		 727 skb = bcm_sysport_rx_refill(priv, cb);
728 if (skb)
729 dev_kfree_skb(skb);
730 if (!cb->skb)
731 return -ENOMEM;
80105bef
FF		 732 }
733
c73b0183 734 return 0;
80105bef
FF		 735}
736
737/* Poll the hardware for up to budget packets to process */
738static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
739 unsigned int budget)
740{
10377ba7 741 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
80105bef
FF		 742 struct net_device *ndev = priv->netdev;
743 unsigned int processed = 0, to_process;
b6e0e875 744 unsigned int processed_bytes = 0;
80105bef
FF		 745 struct bcm_sysport_cb *cb;
746 struct sk_buff *skb;
747 unsigned int p_index;
748 u16 len, status;
3afc557d 749 struct bcm_rsb *rsb;
80105bef 750
6baa785a
FF		 751 /* Clear status before servicing to reduce spurious interrupts */
752 intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR);
753
44a4524c
FF		 754 /* Determine how much we should process since last call, SYSTEMPORT Lite
755 * groups the producer and consumer indexes into the same 32-bit
756 * which we access using RDMA_CONS_INDEX
757 */
758 if (!priv->is_lite)
759 p_index = rdma_readl(priv, RDMA_PROD_INDEX);
760 else
761 p_index = rdma_readl(priv, RDMA_CONS_INDEX);
80105bef
FF		 762 p_index &= RDMA_PROD_INDEX_MASK;
763
e9d7af78 764 to_process = (p_index - priv->rx_c_index) & RDMA_CONS_INDEX_MASK;
80105bef
FF		 765
766 netif_dbg(priv, rx_status, ndev,
23acb2fc
FF		 767 "p_index=%d rx_c_index=%d to_process=%d\n",
768 p_index, priv->rx_c_index, to_process);
80105bef 769
23acb2fc 770 while ((processed < to_process) && (processed < budget)) {
80105bef 771 cb = &priv->rx_cbs[priv->rx_read_ptr];
c73b0183 772 skb = bcm_sysport_rx_refill(priv, cb);
fe24ba08 773
fe24ba08
FF		 774
775 /* We do not have a backing SKB, so we do not a corresponding
776 * DMA mapping for this incoming packet since
777 * bcm_sysport_rx_refill always either has both skb and mapping
778 * or none.
779 */
780 if (unlikely(!skb)) {
781 netif_err(priv, rx_err, ndev, "out of memory!\n");
782 ndev->stats.rx_dropped++;
783 ndev->stats.rx_errors++;
c73b0183 784 goto next;
fe24ba08
FF		 785 }
786
80105bef 787 /* Extract the Receive Status Block prepended */
3afc557d 788 rsb = (struct bcm_rsb *)skb->data;
80105bef
FF		 789 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
790 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
23acb2fc 791 DESC_STATUS_MASK;
80105bef 792
80105bef 793 netif_dbg(priv, rx_status, ndev,
23acb2fc
FF		 794 "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
795 p_index, priv->rx_c_index, priv->rx_read_ptr,
796 len, status);
80105bef 797
25977ac7
FF		 798 if (unlikely(len > RX_BUF_LENGTH)) {
799 netif_err(priv, rx_status, ndev, "oversized packet\n");
800 ndev->stats.rx_length_errors++;
801 ndev->stats.rx_errors++;
802 dev_kfree_skb_any(skb);
803 goto next;
804 }
805
80105bef
FF		 806 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
807 netif_err(priv, rx_status, ndev, "fragmented packet!\n");
808 ndev->stats.rx_dropped++;
809 ndev->stats.rx_errors++;
c73b0183
FF		 810 dev_kfree_skb_any(skb);
811 goto next;
80105bef
FF		 812 }
813
814 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
815 netif_err(priv, rx_err, ndev, "error packet\n");
ad51c610 816 if (status & RX_STATUS_OVFLOW)
80105bef
FF		 817 ndev->stats.rx_over_errors++;
818 ndev->stats.rx_dropped++;
819 ndev->stats.rx_errors++;
c73b0183
FF		 820 dev_kfree_skb_any(skb);
821 goto next;
80105bef
FF		 822 }
823
824 skb_put(skb, len);
825
826 /* Hardware validated our checksum */
827 if (likely(status & DESC_L4_CSUM))
828 skb->ip_summed = CHECKSUM_UNNECESSARY;
829
e0ea05d0
FF		 830 /* Hardware pre-pends packets with 2bytes before Ethernet
831 * header plus we have the Receive Status Block, strip off all
832 * of this from the SKB.
80105bef
FF		 833 */
834 skb_pull(skb, sizeof(*rsb) + 2);
835 len -= (sizeof(*rsb) + 2);
b6e0e875 836 processed_bytes += len;
80105bef
FF		 837
838 /* UniMAC may forward CRC */
839 if (priv->crc_fwd) {
840 skb_trim(skb, len - ETH_FCS_LEN);
841 len -= ETH_FCS_LEN;
842 }
843
844 skb->protocol = eth_type_trans(skb, ndev);
845 ndev->stats.rx_packets++;
846 ndev->stats.rx_bytes += len;
10377ba7 847 u64_stats_update_begin(&priv->syncp);
848 stats64->rx_packets++;
849 stats64->rx_bytes += len;
850 u64_stats_update_end(&priv->syncp);
80105bef
FF		 851
852 napi_gro_receive(&priv->napi, skb);
c73b0183
FF		 853next:
854 processed++;
855 priv->rx_read_ptr++;
856
857 if (priv->rx_read_ptr == priv->num_rx_bds)
858 priv->rx_read_ptr = 0;
80105bef
FF		 859 }
860
b6e0e875
FF		 861 priv->dim.packets = processed;
862 priv->dim.bytes = processed_bytes;
863
80105bef
FF		 864 return processed;
865}
866
30defeb2 867static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_tx_ring *ring,
23acb2fc
FF		 868 struct bcm_sysport_cb *cb,
869 unsigned int *bytes_compl,
870 unsigned int *pkts_compl)
80105bef 871{
30defeb2 872 struct bcm_sysport_priv *priv = ring->priv;
80105bef 873 struct device *kdev = &priv->pdev->dev;
80105bef
FF		 874
875 if (cb->skb) {
80105bef
FF		 876 *bytes_compl += cb->skb->len;
877 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
23acb2fc
FF		 878 dma_unmap_len(cb, dma_len),
879 DMA_TO_DEVICE);
80105bef
FF		 880 (*pkts_compl)++;
881 bcm_sysport_free_cb(cb);
882 /* SKB fragment */
883 } else if (dma_unmap_addr(cb, dma_addr)) {
10377ba7 884 *bytes_compl += dma_unmap_len(cb, dma_len);
80105bef 885 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
23acb2fc 886 dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
80105bef
FF		 887 dma_unmap_addr_set(cb, dma_addr, 0);
888 }
889}
890
891/* Reclaim queued SKBs for transmission completion, lockless version */
892static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
893 struct bcm_sysport_tx_ring *ring)
894{
80105bef 895 unsigned int pkts_compl = 0, bytes_compl = 0;
10377ba7 896 struct net_device *ndev = priv->netdev;
484d802d 897 unsigned int txbds_processed = 0;
80105bef 898 struct bcm_sysport_cb *cb;
484d802d
FF		 899 unsigned int txbds_ready;
900 unsigned int c_index;
80105bef
FF		 901 u32 hw_ind;
902
6baa785a
FF		 903 /* Clear status before servicing to reduce spurious interrupts */
904 if (!ring->priv->is_lite)
905 intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR);
906 else
907 intrl2_0_writel(ring->priv, BIT(ring->index +
908 INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR);
909
80105bef
FF		 910 /* Compute how many descriptors have been processed since last call */
911 hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
912 c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
484d802d 913 txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK;
80105bef
FF		 914
915 netif_dbg(priv, tx_done, ndev,
484d802d
FF		 916 "ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n",
917 ring->index, ring->c_index, c_index, txbds_ready);
80105bef 918
484d802d
FF		 919 while (txbds_processed < txbds_ready) {
920 cb = &ring->cbs[ring->clean_index];
30defeb2 921 bcm_sysport_tx_reclaim_one(ring, cb, &bytes_compl, &pkts_compl);
80105bef
FF		 922
923 ring->desc_count++;
484d802d
FF		 924 txbds_processed++;
925
926 if (likely(ring->clean_index < ring->size - 1))
927 ring->clean_index++;
928 else
929 ring->clean_index = 0;
80105bef
FF		 930 }
931
10377ba7 932 u64_stats_update_begin(&priv->syncp);
933 ring->packets += pkts_compl;
934 ring->bytes += bytes_compl;
935 u64_stats_update_end(&priv->syncp);
936
80105bef
FF		 937 ring->c_index = c_index;
938
80105bef 939 netif_dbg(priv, tx_done, ndev,
23acb2fc
FF		 940 "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
941 ring->index, ring->c_index, pkts_compl, bytes_compl);
80105bef
FF		 942
943 return pkts_compl;
944}
945
946/* Locked version of the per-ring TX reclaim routine */
947static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
948 struct bcm_sysport_tx_ring *ring)
949{
148d3d02 950 struct netdev_queue *txq;
80105bef 951 unsigned int released;
d8498088 952 unsigned long flags;
80105bef 953
148d3d02
FF		 954 txq = netdev_get_tx_queue(priv->netdev, ring->index);
955
d8498088 956 spin_lock_irqsave(&ring->lock, flags);
80105bef 957 released = __bcm_sysport_tx_reclaim(priv, ring);
148d3d02
FF		 958 if (released)
959 netif_tx_wake_queue(txq);
960
d8498088 961 spin_unlock_irqrestore(&ring->lock, flags);
80105bef
FF		 962
963 return released;
964}
965
148d3d02
FF		 966/* Locked version of the per-ring TX reclaim, but does not wake the queue */
967static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv,
968 struct bcm_sysport_tx_ring *ring)
969{
970 unsigned long flags;
971
972 spin_lock_irqsave(&ring->lock, flags);
973 __bcm_sysport_tx_reclaim(priv, ring);
974 spin_unlock_irqrestore(&ring->lock, flags);
975}
976
80105bef
FF		 977static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
978{
979 struct bcm_sysport_tx_ring *ring =
980 container_of(napi, struct bcm_sysport_tx_ring, napi);
981 unsigned int work_done = 0;
982
983 work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
984
16f62d9b 985 if (work_done == 0) {
80105bef
FF		 986 napi_complete(napi);
987 /* re-enable TX interrupt */
44a4524c
FF		 988 if (!ring->priv->is_lite)
989 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
990 else
991 intrl2_0_mask_clear(ring->priv, BIT(ring->index +
992 INTRL2_0_TDMA_MBDONE_SHIFT));
9dfa9a27
FF		 993
994 return 0;
80105bef
FF		 995 }
996
9dfa9a27 997 return budget;
80105bef
FF		 998}
999
1000static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
1001{
1002 unsigned int q;
1003
1004 for (q = 0; q < priv->netdev->num_tx_queues; q++)
1005 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
1006}
1007
1008static int bcm_sysport_poll(struct napi_struct *napi, int budget)
1009{
1010 struct bcm_sysport_priv *priv =
1011 container_of(napi, struct bcm_sysport_priv, napi);
b6e0e875 1012 struct net_dim_sample dim_sample;
80105bef
FF		 1013 unsigned int work_done = 0;
1014
1015 work_done = bcm_sysport_desc_rx(priv, budget);
1016
1017 priv->rx_c_index += work_done;
1018 priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
44a4524c
FF		 1019
1020 /* SYSTEMPORT Lite groups the producer/consumer index, producer is
1021 * maintained by HW, but writes to it will be ignore while RDMA
1022 * is active
1023 */
1024 if (!priv->is_lite)
1025 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
1026 else
1027 rdma_writel(priv, priv->rx_c_index << 16, RDMA_CONS_INDEX);
80105bef
FF		 1028
1029 if (work_done < budget) {
c82f47ef 1030 napi_complete_done(napi, work_done);
80105bef
FF		 1031 /* re-enable RX interrupts */
1032 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
1033 }
1034
b6e0e875
FF		 1035 if (priv->dim.use_dim) {
1036 net_dim_sample(priv->dim.event_ctr, priv->dim.packets,
1037 priv->dim.bytes, &dim_sample);
1038 net_dim(&priv->dim.dim, dim_sample);
1039 }
1040
80105bef
FF		 1041 return work_done;
1042}
1043
54226116 1044static void mpd_enable_set(struct bcm_sysport_priv *priv, bool enable)
83e82f4c 1045{
bb9051a2 1046 u32 reg, bit;
83e82f4c 1047
54226116
FF		 1048 reg = umac_readl(priv, UMAC_MPD_CTRL);
1049 if (enable)
1050 reg |= MPD_EN;
1051 else
1052 reg &= ~MPD_EN;
1053 umac_writel(priv, reg, UMAC_MPD_CTRL);
bb9051a2
FF		 1054
1055 if (priv->is_lite)
1056 bit = RBUF_ACPI_EN_LITE;
1057 else
1058 bit = RBUF_ACPI_EN;
1059
1060 reg = rbuf_readl(priv, RBUF_CONTROL);
1061 if (enable)
1062 reg |= bit;
1063 else
1064 reg &= ~bit;
1065 rbuf_writel(priv, reg, RBUF_CONTROL);
54226116
FF		 1066}
1067
1068static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
1069{
bb9051a2
FF		 1070 u32 reg;
1071
bb9051a2
FF		 1072 /* Disable RXCHK, active filters and Broadcom tag matching */
1073 reg = rxchk_readl(priv, RXCHK_CONTROL);
1074 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK <<
1075 RXCHK_BRCM_TAG_MATCH_SHIFT | RXCHK_EN | RXCHK_BRCM_TAG_EN);
1076 rxchk_writel(priv, reg, RXCHK_CONTROL);
83e82f4c
FF		 1077
1078 /* Clear the MagicPacket detection logic */
54226116 1079 mpd_enable_set(priv, false);
83e82f4c 1080
45ec3185
FF		 1081 reg = intrl2_0_readl(priv, INTRL2_CPU_STATUS);
1082 if (reg & INTRL2_0_MPD)
1083 netdev_info(priv->netdev, "Wake-on-LAN (MPD) interrupt!\n");
1084
1085 if (reg & INTRL2_0_BRCM_MATCH_TAG) {
1086 reg = rxchk_readl(priv, RXCHK_BRCM_TAG_MATCH_STATUS) &
1087 RXCHK_BRCM_TAG_MATCH_MASK;
1088 netdev_info(priv->netdev,
1089 "Wake-on-LAN (filters 0x%02x) interrupt!\n", reg);
1090 }
1091
83e82f4c
FF		 1092 netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
1093}
80105bef 1094
b6e0e875
FF		 1095static void bcm_sysport_dim_work(struct work_struct *work)
1096{
1097 struct net_dim *dim = container_of(work, struct net_dim, work);
1098 struct bcm_sysport_net_dim *ndim =
1099 container_of(dim, struct bcm_sysport_net_dim, dim);
1100 struct bcm_sysport_priv *priv =
1101 container_of(ndim, struct bcm_sysport_priv, dim);
1102 struct net_dim_cq_moder cur_profile =
026a807c 1103 net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
b6e0e875 1104
a8cdfbdf 1105 bcm_sysport_set_rx_coalesce(priv, cur_profile.usec, cur_profile.pkts);
b6e0e875
FF		 1106 dim->state = NET_DIM_START_MEASURE;
1107}
1108
80105bef
FF		 1109/* RX and misc interrupt routine */
1110static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
1111{
1112 struct net_device *dev = dev_id;
1113 struct bcm_sysport_priv *priv = netdev_priv(dev);
44a4524c
FF		 1114 struct bcm_sysport_tx_ring *txr;
1115 unsigned int ring, ring_bit;
80105bef
FF		 1116
1117 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
1118 ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
1119 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
1120
1121 if (unlikely(priv->irq0_stat == 0)) {
1122 netdev_warn(priv->netdev, "spurious RX interrupt\n");
1123 return IRQ_NONE;
1124 }
1125
1126 if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
b6e0e875 1127 priv->dim.event_ctr++;
80105bef
FF		 1128 if (likely(napi_schedule_prep(&priv->napi))) {
1129 /* disable RX interrupts */
1130 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
ba90950c 1131 __napi_schedule_irqoff(&priv->napi);
80105bef
FF		 1132 }
1133 }
1134
1135 /* TX ring is full, perform a full reclaim since we do not know
1136 * which one would trigger this interrupt
1137 */
1138 if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
1139 bcm_sysport_tx_reclaim_all(priv);
1140
44a4524c
FF		 1141 if (!priv->is_lite)
1142 goto out;
1143
1144 for (ring = 0; ring < dev->num_tx_queues; ring++) {
1145 ring_bit = BIT(ring + INTRL2_0_TDMA_MBDONE_SHIFT);
1146 if (!(priv->irq0_stat & ring_bit))
1147 continue;
1148
1149 txr = &priv->tx_rings[ring];
1150
1151 if (likely(napi_schedule_prep(&txr->napi))) {
1152 intrl2_0_mask_set(priv, ring_bit);
1153 __napi_schedule(&txr->napi);
1154 }
1155 }
1156out:
80105bef
FF		 1157 return IRQ_HANDLED;
1158}
1159
1160/* TX interrupt service routine */
1161static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
1162{
1163 struct net_device *dev = dev_id;
1164 struct bcm_sysport_priv *priv = netdev_priv(dev);
1165 struct bcm_sysport_tx_ring *txr;
1166 unsigned int ring;
1167
1168 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
1169 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
1170 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1171
1172 if (unlikely(priv->irq1_stat == 0)) {
1173 netdev_warn(priv->netdev, "spurious TX interrupt\n");
1174 return IRQ_NONE;
1175 }
1176
1177 for (ring = 0; ring < dev->num_tx_queues; ring++) {
1178 if (!(priv->irq1_stat & BIT(ring)))
1179 continue;
1180
1181 txr = &priv->tx_rings[ring];
1182
1183 if (likely(napi_schedule_prep(&txr->napi))) {
1184 intrl2_1_mask_set(priv, BIT(ring));
ba90950c 1185 __napi_schedule_irqoff(&txr->napi);
80105bef
FF		 1186 }
1187 }
1188
1189 return IRQ_HANDLED;
1190}
1191
83e82f4c
FF		 1192static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
1193{
1194 struct bcm_sysport_priv *priv = dev_id;
1195
1196 pm_wakeup_event(&priv->pdev->dev, 0);
1197
1198 return IRQ_HANDLED;
1199}
1200
6cec4f5e
FF		 1201#ifdef CONFIG_NET_POLL_CONTROLLER
1202static void bcm_sysport_poll_controller(struct net_device *dev)
1203{
1204 struct bcm_sysport_priv *priv = netdev_priv(dev);
1205
1206 disable_irq(priv->irq0);
1207 bcm_sysport_rx_isr(priv->irq0, priv);
1208 enable_irq(priv->irq0);
1209
44a4524c
FF		 1210 if (!priv->is_lite) {
1211 disable_irq(priv->irq1);
1212 bcm_sysport_tx_isr(priv->irq1, priv);
1213 enable_irq(priv->irq1);
1214 }
6cec4f5e
FF		 1215}
1216#endif
1217
e87474a6
FF		 1218static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
1219 struct net_device *dev)
80105bef
FF		 1220{
1221 struct sk_buff *nskb;
3afc557d 1222 struct bcm_tsb *tsb;
80105bef
FF		 1223 u32 csum_info;
1224 u8 ip_proto;
1225 u16 csum_start;
c0eb0558 1226 __be16 ip_ver;
80105bef
FF		 1227
1228 /* Re-allocate SKB if needed */
1229 if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
1230 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
1231 dev_kfree_skb(skb);
1232 if (!nskb) {
1233 dev->stats.tx_errors++;
1234 dev->stats.tx_dropped++;
e87474a6 1235 return NULL;
80105bef
FF		 1236 }
1237 skb = nskb;
1238 }
1239
d58ff351 1240 tsb = skb_push(skb, sizeof(*tsb));
80105bef
FF		 1241 /* Zero-out TSB by default */
1242 memset(tsb, 0, sizeof(*tsb));
1243
1244 if (skb->ip_summed == CHECKSUM_PARTIAL) {
c0eb0558 1245 ip_ver = skb->protocol;
80105bef 1246 switch (ip_ver) {
c0eb0558 1247 case htons(ETH_P_IP):
80105bef
FF		 1248 ip_proto = ip_hdr(skb)->protocol;
1249 break;
c0eb0558 1250 case htons(ETH_P_IPV6):
80105bef
FF		 1251 ip_proto = ipv6_hdr(skb)->nexthdr;
1252 break;
1253 default:
e87474a6 1254 return skb;
80105bef
FF		 1255 }
1256
1257 /* Get the checksum offset and the L4 (transport) offset */
1258 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
1259 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
1260 csum_info |= (csum_start << L4_PTR_SHIFT);
1261
1262 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
1263 csum_info |= L4_LENGTH_VALID;
c0eb0558
FF		 1264 if (ip_proto == IPPROTO_UDP &&
1265 ip_ver == htons(ETH_P_IP))
80105bef 1266 csum_info |= L4_UDP;
23acb2fc 1267 } else {
80105bef 1268 csum_info = 0;
23acb2fc 1269 }
80105bef
FF		 1270
1271 tsb->l4_ptr_dest_map = csum_info;
1272 }
1273
e87474a6 1274 return skb;
80105bef
FF		 1275}
1276
1277static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
1278 struct net_device *dev)
1279{
1280 struct bcm_sysport_priv *priv = netdev_priv(dev);
1281 struct device *kdev = &priv->pdev->dev;
1282 struct bcm_sysport_tx_ring *ring;
1283 struct bcm_sysport_cb *cb;
1284 struct netdev_queue *txq;
1285 struct dma_desc *desc;
dab531b4 1286 unsigned int skb_len;
d8498088 1287 unsigned long flags;
80105bef
FF		 1288 dma_addr_t mapping;
1289 u32 len_status;
1290 u16 queue;
1291 int ret;
1292
1293 queue = skb_get_queue_mapping(skb);
1294 txq = netdev_get_tx_queue(dev, queue);
1295 ring = &priv->tx_rings[queue];
1296
d8498088
FF		 1297 /* lock against tx reclaim in BH context and TX ring full interrupt */
1298 spin_lock_irqsave(&ring->lock, flags);
80105bef
FF		 1299 if (unlikely(ring->desc_count == 0)) {
1300 netif_tx_stop_queue(txq);
1301 netdev_err(dev, "queue %d awake and ring full!\n", queue);
1302 ret = NETDEV_TX_BUSY;
1303 goto out;
1304 }
1305
38e5a855
FF		 1306 /* Insert TSB and checksum infos */
1307 if (priv->tsb_en) {
1308 skb = bcm_sysport_insert_tsb(skb, dev);
1309 if (!skb) {
1310 ret = NETDEV_TX_OK;
1311 goto out;
1312 }
1313 }
1314
bb7da333 1315 skb_len = skb->len;
dab531b4
FF		 1316
1317 mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
80105bef 1318 if (dma_mapping_error(kdev, mapping)) {
60b4ea17 1319 priv->mib.tx_dma_failed++;
80105bef 1320 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
23acb2fc 1321 skb->data, skb_len);
80105bef
FF		 1322 ret = NETDEV_TX_OK;
1323 goto out;
1324 }
1325
1326 /* Remember the SKB for future freeing */
1327 cb = &ring->cbs[ring->curr_desc];
1328 cb->skb = skb;
1329 dma_unmap_addr_set(cb, dma_addr, mapping);
dab531b4 1330 dma_unmap_len_set(cb, dma_len, skb_len);
80105bef
FF		 1331
1332 /* Fetch a descriptor entry from our pool */
1333 desc = ring->desc_cpu;
1334
1335 desc->addr_lo = lower_32_bits(mapping);
1336 len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
dab531b4 1337 len_status |= (skb_len << DESC_LEN_SHIFT);
80105bef 1338 len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
23acb2fc 1339 DESC_STATUS_SHIFT;
80105bef
FF		 1340 if (skb->ip_summed == CHECKSUM_PARTIAL)
1341 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
1342
1343 ring->curr_desc++;
1344 if (ring->curr_desc == ring->size)
1345 ring->curr_desc = 0;
1346 ring->desc_count--;
1347
1348 /* Ensure write completion of the descriptor status/length
1349 * in DRAM before the System Port WRITE_PORT register latches
1350 * the value
1351 */
1352 wmb();
1353 desc->addr_status_len = len_status;
1354 wmb();
1355
1356 /* Write this descriptor address to the RING write port */
1357 tdma_port_write_desc_addr(priv, desc, ring->index);
1358
1359 /* Check ring space and update SW control flow */
1360 if (ring->desc_count == 0)
1361 netif_tx_stop_queue(txq);
1362
1363 netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
23acb2fc 1364 ring->index, ring->desc_count, ring->curr_desc);
80105bef
FF		 1365
1366 ret = NETDEV_TX_OK;
1367out:
d8498088 1368 spin_unlock_irqrestore(&ring->lock, flags);
80105bef
FF		 1369 return ret;
1370}
1371
1372static void bcm_sysport_tx_timeout(struct net_device *dev)
1373{
1374 netdev_warn(dev, "transmit timeout!\n");
1375
860e9538 1376 netif_trans_update(dev);
80105bef
FF		 1377 dev->stats.tx_errors++;
1378
1379 netif_tx_wake_all_queues(dev);
1380}
1381
1382/* phylib adjust link callback */
1383static void bcm_sysport_adj_link(struct net_device *dev)
1384{
1385 struct bcm_sysport_priv *priv = netdev_priv(dev);
715a0227 1386 struct phy_device *phydev = dev->phydev;
80105bef
FF		 1387 unsigned int changed = 0;
1388 u32 cmd_bits = 0, reg;
1389
1390 if (priv->old_link != phydev->link) {
1391 changed = 1;
1392 priv->old_link = phydev->link;
1393 }
1394
1395 if (priv->old_duplex != phydev->duplex) {
1396 changed = 1;
1397 priv->old_duplex = phydev->duplex;
1398 }
1399
44a4524c
FF		 1400 if (priv->is_lite)
1401 goto out;
1402
80105bef
FF		 1403 switch (phydev->speed) {
1404 case SPEED_2500:
1405 cmd_bits = CMD_SPEED_2500;
1406 break;
1407 case SPEED_1000:
1408 cmd_bits = CMD_SPEED_1000;
1409 break;
1410 case SPEED_100:
1411 cmd_bits = CMD_SPEED_100;
1412 break;
1413 case SPEED_10:
1414 cmd_bits = CMD_SPEED_10;
1415 break;
1416 default:
1417 break;
1418 }
1419 cmd_bits <<= CMD_SPEED_SHIFT;
1420
1421 if (phydev->duplex == DUPLEX_HALF)
1422 cmd_bits |= CMD_HD_EN;
1423
1424 if (priv->old_pause != phydev->pause) {
1425 changed = 1;
1426 priv->old_pause = phydev->pause;
1427 }
1428
1429 if (!phydev->pause)
1430 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1431
4a804c01
FF		 1432 if (!changed)
1433 return;
1434
1435 if (phydev->link) {
d5e32cc7
FF		 1436 reg = umac_readl(priv, UMAC_CMD);
1437 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
80105bef
FF		 1438 CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1439 CMD_TX_PAUSE_IGNORE);
d5e32cc7
FF		 1440 reg |= cmd_bits;
1441 umac_writel(priv, reg, UMAC_CMD);
d5e32cc7 1442 }
44a4524c
FF		 1443out:
1444 if (changed)
1445 phy_print_status(phydev);
80105bef
FF		 1446}
1447
a8cdfbdf 1448static void bcm_sysport_init_dim(struct bcm_sysport_priv *priv,
b6e0e875
FF		 1449 void (*cb)(struct work_struct *work))
1450{
a8cdfbdf
FF		 1451 struct bcm_sysport_net_dim *dim = &priv->dim;
1452
b6e0e875
FF		 1453 INIT_WORK(&dim->dim.work, cb);
1454 dim->dim.mode = NET_DIM_CQ_PERIOD_MODE_START_FROM_EQE;
1455 dim->event_ctr = 0;
1456 dim->packets = 0;
1457 dim->bytes = 0;
1458}
1459
a8cdfbdf
FF		 1460static void bcm_sysport_init_rx_coalesce(struct bcm_sysport_priv *priv)
1461{
1462 struct bcm_sysport_net_dim *dim = &priv->dim;
1463 struct net_dim_cq_moder moder;
1464 u32 usecs, pkts;
1465
1466 usecs = priv->rx_coalesce_usecs;
1467 pkts = priv->rx_max_coalesced_frames;
1468
1469 /* If DIM was enabled, re-apply default parameters */
1470 if (dim->use_dim) {
026a807c 1471 moder = net_dim_get_def_rx_moderation(dim->dim.mode);
a8cdfbdf
FF		 1472 usecs = moder.usec;
1473 pkts = moder.pkts;
1474 }
1475
1476 bcm_sysport_set_rx_coalesce(priv, usecs, pkts);
1477}
1478
80105bef
FF		 1479static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1480 unsigned int index)
1481{
1482 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1483 struct device *kdev = &priv->pdev->dev;
1484 size_t size;
1485 void *p;
1486 u32 reg;
1487
1488 /* Simple descriptors partitioning for now */
1489 size = 256;
1490
1491 /* We just need one DMA descriptor which is DMA-able, since writing to
1492 * the port will allocate a new descriptor in its internal linked-list
1493 */
3e8fc38c
FF		 1494 p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma,
1495 GFP_KERNEL);
80105bef
FF		 1496 if (!p) {
1497 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1498 return -ENOMEM;
1499 }
1500
40a8a317 1501 ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
80105bef 1502 if (!ring->cbs) {
c2062ee3
FF		 1503 dma_free_coherent(kdev, sizeof(struct dma_desc),
1504 ring->desc_cpu, ring->desc_dma);
80105bef
FF		 1505 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1506 return -ENOMEM;
1507 }
1508
1509 /* Initialize SW view of the ring */
1510 spin_lock_init(&ring->lock);
1511 ring->priv = priv;
d64b5e85 1512 netif_tx_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
80105bef
FF		 1513 ring->index = index;
1514 ring->size = size;
484d802d 1515 ring->clean_index = 0;
80105bef
FF		 1516 ring->alloc_size = ring->size;
1517 ring->desc_cpu = p;
1518 ring->desc_count = ring->size;
1519 ring->curr_desc = 0;
1520
1521 /* Initialize HW ring */
1522 tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1523 tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1524 tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1525 tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
d1565763
FF		 1526
1527 /* Configure QID and port mapping */
1528 reg = tdma_readl(priv, TDMA_DESC_RING_MAPPING(index));
1529 reg &= ~(RING_QID_MASK | RING_PORT_ID_MASK << RING_PORT_ID_SHIFT);
3ded76a8
FF		 1530 if (ring->inspect) {
1531 reg |= ring->switch_queue & RING_QID_MASK;
1532 reg |= ring->switch_port << RING_PORT_ID_SHIFT;
1533 } else {
1534 reg |= RING_IGNORE_STATUS;
1535 }
d1565763 1536 tdma_writel(priv, reg, TDMA_DESC_RING_MAPPING(index));
80105bef
FF		 1537 tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1538
723934fb
FF		 1539 /* Enable ACB algorithm 2 */
1540 reg = tdma_readl(priv, TDMA_CONTROL);
1541 reg |= tdma_control_bit(priv, ACB_ALGO);
1542 tdma_writel(priv, reg, TDMA_CONTROL);
1543
487234cc
FF		 1544 /* Do not use tdma_control_bit() here because TSB_SWAP1 collides
1545 * with the original definition of ACB_ALGO
1546 */
1547 reg = tdma_readl(priv, TDMA_CONTROL);
1548 if (priv->is_lite)
1549 reg &= ~BIT(TSB_SWAP1);
1550 /* Set a correct TSB format based on host endian */
1551 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1552 reg |= tdma_control_bit(priv, TSB_SWAP0);
1553 else
1554 reg &= ~tdma_control_bit(priv, TSB_SWAP0);
1555 tdma_writel(priv, reg, TDMA_CONTROL);
1556
80105bef
FF		 1557 /* Program the number of descriptors as MAX_THRESHOLD and half of
1558 * its size for the hysteresis trigger
1559 */
1560 tdma_writel(priv, ring->size |
1561 1 << RING_HYST_THRESH_SHIFT,
1562 TDMA_DESC_RING_MAX_HYST(index));
1563
1564 /* Enable the ring queue in the arbiter */
1565 reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1566 reg |= (1 << index);
1567 tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1568
1569 napi_enable(&ring->napi);
1570
1571 netif_dbg(priv, hw, priv->netdev,
d1565763
FF		 1572 "TDMA cfg, size=%d, desc_cpu=%p switch q=%d,port=%d\n",
1573 ring->size, ring->desc_cpu, ring->switch_queue,
1574 ring->switch_port);
80105bef
FF		 1575
1576 return 0;
1577}
1578
1579static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
23acb2fc 1580 unsigned int index)
80105bef
FF		 1581{
1582 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1583 struct device *kdev = &priv->pdev->dev;
1584 u32 reg;
1585
1586 /* Caller should stop the TDMA engine */
1587 reg = tdma_readl(priv, TDMA_STATUS);
1588 if (!(reg & TDMA_DISABLED))
1589 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1590
914adb55
FF		 1591 /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
1592 * fail, so by checking this pointer we know whether the TX ring was
1593 * fully initialized or not.
1594 */
1595 if (!ring->cbs)
1596 return;
1597
80105bef
FF		 1598 napi_disable(&ring->napi);
1599 netif_napi_del(&ring->napi);
1600
148d3d02 1601 bcm_sysport_tx_clean(priv, ring);
80105bef
FF		 1602
1603 kfree(ring->cbs);
1604 ring->cbs = NULL;
1605
1606 if (ring->desc_dma) {
3e8fc38c
FF		 1607 dma_free_coherent(kdev, sizeof(struct dma_desc),
1608 ring->desc_cpu, ring->desc_dma);
80105bef
FF		 1609 ring->desc_dma = 0;
1610 }
1611 ring->size = 0;
1612 ring->alloc_size = 0;
1613
1614 netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1615}
1616
1617/* RDMA helper */
1618static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
23acb2fc 1619 unsigned int enable)
80105bef
FF		 1620{
1621 unsigned int timeout = 1000;
1622 u32 reg;
1623
1624 reg = rdma_readl(priv, RDMA_CONTROL);
1625 if (enable)
1626 reg |= RDMA_EN;
1627 else
1628 reg &= ~RDMA_EN;
1629 rdma_writel(priv, reg, RDMA_CONTROL);
1630
1631 /* Poll for RMDA disabling completion */
1632 do {
1633 reg = rdma_readl(priv, RDMA_STATUS);
1634 if (!!(reg & RDMA_DISABLED) == !enable)
1635 return 0;
1636 usleep_range(1000, 2000);
1637 } while (timeout-- > 0);
1638
1639 netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1640
1641 return -ETIMEDOUT;
1642}
1643
1644/* TDMA helper */
1645static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
23acb2fc 1646 unsigned int enable)
80105bef
FF		 1647{
1648 unsigned int timeout = 1000;
1649 u32 reg;
1650
1651 reg = tdma_readl(priv, TDMA_CONTROL);
1652 if (enable)
44a4524c 1653 reg |= tdma_control_bit(priv, TDMA_EN);
80105bef 1654 else
44a4524c 1655 reg &= ~tdma_control_bit(priv, TDMA_EN);
80105bef
FF		 1656 tdma_writel(priv, reg, TDMA_CONTROL);
1657
1658 /* Poll for TMDA disabling completion */
1659 do {
1660 reg = tdma_readl(priv, TDMA_STATUS);
1661 if (!!(reg & TDMA_DISABLED) == !enable)
1662 return 0;
1663
1664 usleep_range(1000, 2000);
1665 } while (timeout-- > 0);
1666
1667 netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1668
1669 return -ETIMEDOUT;
1670}
1671
1672static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1673{
baf387a8 1674 struct bcm_sysport_cb *cb;
80105bef
FF		 1675 u32 reg;
1676 int ret;
baf387a8 1677 int i;
80105bef
FF		 1678
1679 /* Initialize SW view of the RX ring */
44a4524c 1680 priv->num_rx_bds = priv->num_rx_desc_words / WORDS_PER_DESC;
80105bef 1681 priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
80105bef
FF		 1682 priv->rx_c_index = 0;
1683 priv->rx_read_ptr = 0;
40a8a317
FF		 1684 priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1685 GFP_KERNEL);
80105bef
FF		 1686 if (!priv->rx_cbs) {
1687 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1688 return -ENOMEM;
1689 }
1690
baf387a8
FF		 1691 for (i = 0; i < priv->num_rx_bds; i++) {
1692 cb = priv->rx_cbs + i;
1693 cb->bd_addr = priv->rx_bds + i * DESC_SIZE;
1694 }
1695
80105bef
FF		 1696 ret = bcm_sysport_alloc_rx_bufs(priv);
1697 if (ret) {
1698 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1699 return ret;
1700 }
1701
1702 /* Initialize HW, ensure RDMA is disabled */
1703 reg = rdma_readl(priv, RDMA_STATUS);
1704 if (!(reg & RDMA_DISABLED))
1705 rdma_enable_set(priv, 0);
1706
1707 rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1708 rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1709 rdma_writel(priv, 0, RDMA_PROD_INDEX);
1710 rdma_writel(priv, 0, RDMA_CONS_INDEX);
1711 rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1712 RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1713 /* Operate the queue in ring mode */
1714 rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1715 rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1716 rdma_writel(priv, 0, RDMA_END_ADDR_HI);
44a4524c 1717 rdma_writel(priv, priv->num_rx_desc_words - 1, RDMA_END_ADDR_LO);
80105bef 1718
80105bef 1719 netif_dbg(priv, hw, priv->netdev,
23acb2fc
FF		 1720 "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1721 priv->num_rx_bds, priv->rx_bds);
80105bef
FF		 1722
1723 return 0;
1724}
1725
1726static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1727{
1728 struct bcm_sysport_cb *cb;
1729 unsigned int i;
1730 u32 reg;
1731
1732 /* Caller should ensure RDMA is disabled */
1733 reg = rdma_readl(priv, RDMA_STATUS);
1734 if (!(reg & RDMA_DISABLED))
1735 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1736
1737 for (i = 0; i < priv->num_rx_bds; i++) {
1738 cb = &priv->rx_cbs[i];
1739 if (dma_unmap_addr(cb, dma_addr))
1740 dma_unmap_single(&priv->pdev->dev,
23acb2fc
FF		 1741 dma_unmap_addr(cb, dma_addr),
1742 RX_BUF_LENGTH, DMA_FROM_DEVICE);
80105bef
FF		 1743 bcm_sysport_free_cb(cb);
1744 }
1745
1746 kfree(priv->rx_cbs);
1747 priv->rx_cbs = NULL;
1748
1749 netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1750}
1751
1752static void bcm_sysport_set_rx_mode(struct net_device *dev)
1753{
1754 struct bcm_sysport_priv *priv = netdev_priv(dev);
1755 u32 reg;
1756
44a4524c
FF		 1757 if (priv->is_lite)
1758 return;
1759
80105bef
FF		 1760 reg = umac_readl(priv, UMAC_CMD);
1761 if (dev->flags & IFF_PROMISC)
1762 reg |= CMD_PROMISC;
1763 else
1764 reg &= ~CMD_PROMISC;
1765 umac_writel(priv, reg, UMAC_CMD);
1766
1767 /* No support for ALLMULTI */
1768 if (dev->flags & IFF_ALLMULTI)
1769 return;
1770}
1771
1772static inline void umac_enable_set(struct bcm_sysport_priv *priv,
23acb2fc 1773 u32 mask, unsigned int enable)
80105bef
FF		 1774{
1775 u32 reg;
1776
44a4524c
FF		 1777 if (!priv->is_lite) {
1778 reg = umac_readl(priv, UMAC_CMD);
1779 if (enable)
1780 reg |= mask;
1781 else
1782 reg &= ~mask;
1783 umac_writel(priv, reg, UMAC_CMD);
1784 } else {
1785 reg = gib_readl(priv, GIB_CONTROL);
1786 if (enable)
1787 reg |= mask;
1788 else
1789 reg &= ~mask;
1790 gib_writel(priv, reg, GIB_CONTROL);
1791 }
00b91c69
FF		 1792
1793 /* UniMAC stops on a packet boundary, wait for a full-sized packet
1794 * to be processed (1 msec).
1795 */
1796 if (enable == 0)
1797 usleep_range(1000, 2000);
80105bef
FF		 1798}
1799
412bce83 1800static inline void umac_reset(struct bcm_sysport_priv *priv)
80105bef 1801{
80105bef 1802 u32 reg;
80105bef 1803
44a4524c
FF		 1804 if (priv->is_lite)
1805 return;
1806
412bce83
FF		 1807 reg = umac_readl(priv, UMAC_CMD);
1808 reg |= CMD_SW_RESET;
1809 umac_writel(priv, reg, UMAC_CMD);
1810 udelay(10);
1811 reg = umac_readl(priv, UMAC_CMD);
1812 reg &= ~CMD_SW_RESET;
1813 umac_writel(priv, reg, UMAC_CMD);
80105bef
FF		 1814}
1815
1816static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
23acb2fc 1817 unsigned char *addr)
80105bef 1818{
44a4524c
FF		 1819 u32 mac0 = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) |
1820 addr[3];
1821 u32 mac1 = (addr[4] << 8) | addr[5];
1822
1823 if (!priv->is_lite) {
1824 umac_writel(priv, mac0, UMAC_MAC0);
1825 umac_writel(priv, mac1, UMAC_MAC1);
1826 } else {
1827 gib_writel(priv, mac0, GIB_MAC0);
1828 gib_writel(priv, mac1, GIB_MAC1);
1829 }
80105bef
FF		 1830}
1831
1832static void topctrl_flush(struct bcm_sysport_priv *priv)
1833{
1834 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1835 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1836 mdelay(1);
1837 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1838 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1839}
1840
fb3b596d
FF		 1841static int bcm_sysport_change_mac(struct net_device *dev, void *p)
1842{
1843 struct bcm_sysport_priv *priv = netdev_priv(dev);
1844 struct sockaddr *addr = p;
1845
1846 if (!is_valid_ether_addr(addr->sa_data))
1847 return -EINVAL;
1848
1849 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1850
1851 /* interface is disabled, changes to MAC will be reflected on next
1852 * open call
1853 */
1854 if (!netif_running(dev))
1855 return 0;
1856
1857 umac_set_hw_addr(priv, dev->dev_addr);
1858
1859 return 0;
1860}
1861
10377ba7 1862static void bcm_sysport_get_stats64(struct net_device *dev,
1863 struct rtnl_link_stats64 *stats)
30defeb2
FF		 1864{
1865 struct bcm_sysport_priv *priv = netdev_priv(dev);
10377ba7 1866 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
10377ba7 1867 unsigned int start;
30defeb2 1868
10377ba7 1869 netdev_stats_to_stats64(stats, &dev->stats);
1870
8ecb1a29
FF		 1871 bcm_sysport_update_tx_stats(priv, &stats->tx_bytes,
1872 &stats->tx_packets);
10377ba7 1873
1874 do {
1875 start = u64_stats_fetch_begin_irq(&priv->syncp);
1876 stats->rx_packets = stats64->rx_packets;
1877 stats->rx_bytes = stats64->rx_bytes;
1878 } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
30defeb2
FF		 1879}
1880
b02e6d9b
FF		 1881static void bcm_sysport_netif_start(struct net_device *dev)
1882{
1883 struct bcm_sysport_priv *priv = netdev_priv(dev);
1884
1885 /* Enable NAPI */
a8cdfbdf
FF		 1886 bcm_sysport_init_dim(priv, bcm_sysport_dim_work);
1887 bcm_sysport_init_rx_coalesce(priv);
b02e6d9b
FF		 1888 napi_enable(&priv->napi);
1889
8edf0047
FF		 1890 /* Enable RX interrupt and TX ring full interrupt */
1891 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1892
715a0227 1893 phy_start(dev->phydev);
b02e6d9b 1894
44a4524c
FF		 1895 /* Enable TX interrupts for the TXQs */
1896 if (!priv->is_lite)
1897 intrl2_1_mask_clear(priv, 0xffffffff);
1898 else
1899 intrl2_0_mask_clear(priv, INTRL2_0_TDMA_MBDONE_MASK);
b02e6d9b
FF		 1900
1901 /* Last call before we start the real business */
1902 netif_tx_start_all_queues(dev);
1903}
1904
40755a0f
FF		 1905static void rbuf_init(struct bcm_sysport_priv *priv)
1906{
1907 u32 reg;
1908
1909 reg = rbuf_readl(priv, RBUF_CONTROL);
1910 reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
44a4524c 1911 /* Set a correct RSB format on SYSTEMPORT Lite */
389a06bc 1912 if (priv->is_lite)
44a4524c 1913 reg &= ~RBUF_RSB_SWAP1;
389a06bc
FF		 1914
1915 /* Set a correct RSB format based on host endian */
1916 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
44a4524c 1917 reg |= RBUF_RSB_SWAP0;
389a06bc
FF		 1918 else
1919 reg &= ~RBUF_RSB_SWAP0;
40755a0f
FF		 1920 rbuf_writel(priv, reg, RBUF_CONTROL);
1921}
1922
44a4524c
FF		 1923static inline void bcm_sysport_mask_all_intrs(struct bcm_sysport_priv *priv)
1924{
1925 intrl2_0_mask_set(priv, 0xffffffff);
1926 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1927 if (!priv->is_lite) {
1928 intrl2_1_mask_set(priv, 0xffffffff);
1929 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1930 }
1931}
1932
1933static inline void gib_set_pad_extension(struct bcm_sysport_priv *priv)
1934{
93824c80 1935 u32 reg;
44a4524c 1936
93824c80
FF		 1937 reg = gib_readl(priv, GIB_CONTROL);
1938 /* Include Broadcom tag in pad extension and fix up IPG_LENGTH */
44a4524c 1939 if (netdev_uses_dsa(priv->netdev)) {
44a4524c
FF		 1940 reg &= ~(GIB_PAD_EXTENSION_MASK << GIB_PAD_EXTENSION_SHIFT);
1941 reg |= ENET_BRCM_TAG_LEN << GIB_PAD_EXTENSION_SHIFT;
44a4524c 1942 }
93824c80
FF		 1943 reg &= ~(GIB_IPG_LEN_MASK << GIB_IPG_LEN_SHIFT);
1944 reg |= 12 << GIB_IPG_LEN_SHIFT;
1945 gib_writel(priv, reg, GIB_CONTROL);
44a4524c
FF		 1946}
1947
80105bef
FF		 1948static int bcm_sysport_open(struct net_device *dev)
1949{
1950 struct bcm_sysport_priv *priv = netdev_priv(dev);
715a0227 1951 struct phy_device *phydev;
80105bef 1952 unsigned int i;
80105bef
FF		 1953 int ret;
1954
1955 /* Reset UniMAC */
412bce83 1956 umac_reset(priv);
80105bef
FF		 1957
1958 /* Flush TX and RX FIFOs at TOPCTRL level */
1959 topctrl_flush(priv);
1960
1961 /* Disable the UniMAC RX/TX */
18e21b01 1962 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
80105bef
FF		 1963
1964 /* Enable RBUF 2bytes alignment and Receive Status Block */
40755a0f 1965 rbuf_init(priv);
80105bef
FF		 1966
1967 /* Set maximum frame length */
44a4524c
FF		 1968 if (!priv->is_lite)
1969 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1970 else
1971 gib_set_pad_extension(priv);
80105bef
FF		 1972
1973 /* Set MAC address */
1974 umac_set_hw_addr(priv, dev->dev_addr);
1975
1976 /* Read CRC forward */
44a4524c
FF		 1977 if (!priv->is_lite)
1978 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1979 else
9e3bff92
FF		 1980 priv->crc_fwd = !((gib_readl(priv, GIB_CONTROL) &
1981 GIB_FCS_STRIP) >> GIB_FCS_STRIP_SHIFT);
80105bef 1982
715a0227
PR		 1983 phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1984 0, priv->phy_interface);
1985 if (!phydev) {
80105bef
FF		 1986 netdev_err(dev, "could not attach to PHY\n");
1987 return -ENODEV;
1988 }
1989
1990 /* Reset house keeping link status */
1991 priv->old_duplex = -1;
1992 priv->old_link = -1;
1993 priv->old_pause = -1;
1994
1995 /* mask all interrupts and request them */
44a4524c 1996 bcm_sysport_mask_all_intrs(priv);
80105bef
FF		 1997
1998 ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1999 if (ret) {
2000 netdev_err(dev, "failed to request RX interrupt\n");
2001 goto out_phy_disconnect;
2002 }
2003
44a4524c
FF		 2004 if (!priv->is_lite) {
2005 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0,
2006 dev->name, dev);
2007 if (ret) {
2008 netdev_err(dev, "failed to request TX interrupt\n");
2009 goto out_free_irq0;
2010 }
80105bef
FF		 2011 }
2012
2013 /* Initialize both hardware and software ring */
2014 for (i = 0; i < dev->num_tx_queues; i++) {
2015 ret = bcm_sysport_init_tx_ring(priv, i);
2016 if (ret) {
2017 netdev_err(dev, "failed to initialize TX ring %d\n",
23acb2fc 2018 i);
80105bef
FF		 2019 goto out_free_tx_ring;
2020 }
2021 }
2022
2023 /* Initialize linked-list */
2024 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2025
2026 /* Initialize RX ring */
2027 ret = bcm_sysport_init_rx_ring(priv);
2028 if (ret) {
2029 netdev_err(dev, "failed to initialize RX ring\n");
2030 goto out_free_rx_ring;
2031 }
2032
2033 /* Turn on RDMA */
2034 ret = rdma_enable_set(priv, 1);
2035 if (ret)
2036 goto out_free_rx_ring;
2037
80105bef
FF		 2038 /* Turn on TDMA */
2039 ret = tdma_enable_set(priv, 1);
2040 if (ret)
2041 goto out_clear_rx_int;
2042
80105bef 2043 /* Turn on UniMAC TX/RX */
18e21b01 2044 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
80105bef 2045
b02e6d9b 2046 bcm_sysport_netif_start(dev);
80105bef
FF		 2047
2048 return 0;
2049
2050out_clear_rx_int:
2051 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
2052out_free_rx_ring:
2053 bcm_sysport_fini_rx_ring(priv);
2054out_free_tx_ring:
2055 for (i = 0; i < dev->num_tx_queues; i++)
2056 bcm_sysport_fini_tx_ring(priv, i);
44a4524c
FF		 2057 if (!priv->is_lite)
2058 free_irq(priv->irq1, dev);
80105bef
FF		 2059out_free_irq0:
2060 free_irq(priv->irq0, dev);
2061out_phy_disconnect:
715a0227 2062 phy_disconnect(phydev);
80105bef
FF		 2063 return ret;
2064}
2065
b02e6d9b 2066static void bcm_sysport_netif_stop(struct net_device *dev)
80105bef
FF		 2067{
2068 struct bcm_sysport_priv *priv = netdev_priv(dev);
80105bef
FF		 2069
2070 /* stop all software from updating hardware */
2071 netif_tx_stop_all_queues(dev);
2072 napi_disable(&priv->napi);
b6e0e875 2073 cancel_work_sync(&priv->dim.dim.work);
715a0227 2074 phy_stop(dev->phydev);
80105bef
FF		 2075
2076 /* mask all interrupts */
44a4524c 2077 bcm_sysport_mask_all_intrs(priv);
b02e6d9b
FF		 2078}
2079
2080static int bcm_sysport_stop(struct net_device *dev)
2081{
2082 struct bcm_sysport_priv *priv = netdev_priv(dev);
2083 unsigned int i;
2084 int ret;
2085
2086 bcm_sysport_netif_stop(dev);
80105bef
FF		 2087
2088 /* Disable UniMAC RX */
18e21b01 2089 umac_enable_set(priv, CMD_RX_EN, 0);
80105bef
FF		 2090
2091 ret = tdma_enable_set(priv, 0);
2092 if (ret) {
2093 netdev_err(dev, "timeout disabling RDMA\n");
2094 return ret;
2095 }
2096
2097 /* Wait for a maximum packet size to be drained */
2098 usleep_range(2000, 3000);
2099
2100 ret = rdma_enable_set(priv, 0);
2101 if (ret) {
2102 netdev_err(dev, "timeout disabling TDMA\n");
2103 return ret;
2104 }
2105
2106 /* Disable UniMAC TX */
18e21b01 2107 umac_enable_set(priv, CMD_TX_EN, 0);
80105bef
FF		 2108
2109 /* Free RX/TX rings SW structures */
2110 for (i = 0; i < dev->num_tx_queues; i++)
2111 bcm_sysport_fini_tx_ring(priv, i);
2112 bcm_sysport_fini_rx_ring(priv);
2113
2114 free_irq(priv->irq0, dev);
44a4524c
FF		 2115 if (!priv->is_lite)
2116 free_irq(priv->irq1, dev);
80105bef
FF		 2117
2118 /* Disconnect from PHY */
715a0227 2119 phy_disconnect(dev->phydev);
80105bef
FF		 2120
2121 return 0;
2122}
2123
bb9051a2
FF		 2124static int bcm_sysport_rule_find(struct bcm_sysport_priv *priv,
2125 u64 location)
2126{
2127 unsigned int index;
2128 u32 reg;
2129
2130 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) {
2131 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index));
2132 reg >>= RXCHK_BRCM_TAG_CID_SHIFT;
2133 reg &= RXCHK_BRCM_TAG_CID_MASK;
2134 if (reg == location)
2135 return index;
2136 }
2137
2138 return -EINVAL;
2139}
2140
2141static int bcm_sysport_rule_get(struct bcm_sysport_priv *priv,
2142 struct ethtool_rxnfc *nfc)
2143{
2144 int index;
2145
2146 /* This is not a rule that we know about */
2147 index = bcm_sysport_rule_find(priv, nfc->fs.location);
2148 if (index < 0)
2149 return -EOPNOTSUPP;
2150
2151 nfc->fs.ring_cookie = RX_CLS_FLOW_WAKE;
2152
2153 return 0;
2154}
2155
2156static int bcm_sysport_rule_set(struct bcm_sysport_priv *priv,
2157 struct ethtool_rxnfc *nfc)
2158{
2159 unsigned int index;
2160 u32 reg;
2161
2162 /* We cannot match locations greater than what the classification ID
2163 * permits (256 entries)
2164 */
2165 if (nfc->fs.location > RXCHK_BRCM_TAG_CID_MASK)
2166 return -E2BIG;
2167
2168 /* We cannot support flows that are not destined for a wake-up */
2169 if (nfc->fs.ring_cookie != RX_CLS_FLOW_WAKE)
2170 return -EOPNOTSUPP;
2171
2172 /* All filters are already in use, we cannot match more rules */
2173 if (bitmap_weight(priv->filters, RXCHK_BRCM_TAG_MAX) ==
2174 RXCHK_BRCM_TAG_MAX)
2175 return -ENOSPC;
2176
2177 index = find_first_zero_bit(priv->filters, RXCHK_BRCM_TAG_MAX);
2178 if (index > RXCHK_BRCM_TAG_MAX)
2179 return -ENOSPC;
2180
2181 /* Location is the classification ID, and index is the position
2182 * within one of our 8 possible filters to be programmed
2183 */
2184 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index));
2185 reg &= ~(RXCHK_BRCM_TAG_CID_MASK << RXCHK_BRCM_TAG_CID_SHIFT);
2186 reg |= nfc->fs.location << RXCHK_BRCM_TAG_CID_SHIFT;
2187 rxchk_writel(priv, reg, RXCHK_BRCM_TAG(index));
2188 rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index));
2189
2190 set_bit(index, priv->filters);
2191
2192 return 0;
2193}
2194
2195static int bcm_sysport_rule_del(struct bcm_sysport_priv *priv,
2196 u64 location)
2197{
2198 int index;
2199
2200 /* This is not a rule that we know about */
2201 index = bcm_sysport_rule_find(priv, location);
2202 if (index < 0)
2203 return -EOPNOTSUPP;
2204
2205 /* No need to disable this filter if it was enabled, this will
2206 * be taken care of during suspend time by bcm_sysport_suspend_to_wol
2207 */
2208 clear_bit(index, priv->filters);
2209
2210 return 0;
2211}
2212
2213static int bcm_sysport_get_rxnfc(struct net_device *dev,
2214 struct ethtool_rxnfc *nfc, u32 *rule_locs)
2215{
2216 struct bcm_sysport_priv *priv = netdev_priv(dev);
2217 int ret = -EOPNOTSUPP;
2218
2219 switch (nfc->cmd) {
2220 case ETHTOOL_GRXCLSRULE:
2221 ret = bcm_sysport_rule_get(priv, nfc);
2222 break;
2223 default:
2224 break;
2225 }
2226
2227 return ret;
2228}
2229
2230static int bcm_sysport_set_rxnfc(struct net_device *dev,
2231 struct ethtool_rxnfc *nfc)
2232{
2233 struct bcm_sysport_priv *priv = netdev_priv(dev);
2234 int ret = -EOPNOTSUPP;
2235
2236 switch (nfc->cmd) {
2237 case ETHTOOL_SRXCLSRLINS:
2238 ret = bcm_sysport_rule_set(priv, nfc);
2239 break;
2240 case ETHTOOL_SRXCLSRLDEL:
2241 ret = bcm_sysport_rule_del(priv, nfc->fs.location);
2242 break;
2243 default:
2244 break;
2245 }
2246
2247 return ret;
2248}
2249
c1ab0e9c 2250static const struct ethtool_ops bcm_sysport_ethtool_ops = {
80105bef
FF		 2251 .get_drvinfo = bcm_sysport_get_drvinfo,
2252 .get_msglevel = bcm_sysport_get_msglvl,
2253 .set_msglevel = bcm_sysport_set_msglvl,
2254 .get_link = ethtool_op_get_link,
2255 .get_strings = bcm_sysport_get_strings,
2256 .get_ethtool_stats = bcm_sysport_get_stats,
2257 .get_sset_count = bcm_sysport_get_sset_count,
83e82f4c
FF		 2258 .get_wol = bcm_sysport_get_wol,
2259 .set_wol = bcm_sysport_set_wol,
b1a15e86
FF		 2260 .get_coalesce = bcm_sysport_get_coalesce,
2261 .set_coalesce = bcm_sysport_set_coalesce,
697666ea
PR		 2262 .get_link_ksettings = phy_ethtool_get_link_ksettings,
2263 .set_link_ksettings = phy_ethtool_set_link_ksettings,
bb9051a2
FF		 2264 .get_rxnfc = bcm_sysport_get_rxnfc,
2265 .set_rxnfc = bcm_sysport_set_rxnfc,
80105bef
FF		 2266};
2267
d1565763 2268static u16 bcm_sysport_select_queue(struct net_device *dev, struct sk_buff *skb,
4f49dec9 2269 struct net_device *sb_dev,
d1565763
FF		 2270 select_queue_fallback_t fallback)
2271{
2272 struct bcm_sysport_priv *priv = netdev_priv(dev);
2273 u16 queue = skb_get_queue_mapping(skb);
2274 struct bcm_sysport_tx_ring *tx_ring;
2275 unsigned int q, port;
2276
2277 if (!netdev_uses_dsa(dev))
8ec56fc3 2278 return fallback(dev, skb, NULL);
d1565763
FF		 2279
2280 /* DSA tagging layer will have configured the correct queue */
2281 q = BRCM_TAG_GET_QUEUE(queue);
2282 port = BRCM_TAG_GET_PORT(queue);
2283 tx_ring = priv->ring_map[q + port * priv->per_port_num_tx_queues];
2284
e83b1715 2285 if (unlikely(!tx_ring))
8ec56fc3 2286 return fallback(dev, skb, NULL);
e83b1715 2287
d1565763
FF		 2288 return tx_ring->index;
2289}
2290
c0c21458
FF		 2291static const struct net_device_ops bcm_sysport_netdev_ops = {
2292 .ndo_start_xmit = bcm_sysport_xmit,
2293 .ndo_tx_timeout = bcm_sysport_tx_timeout,
2294 .ndo_open = bcm_sysport_open,
2295 .ndo_stop = bcm_sysport_stop,
2296 .ndo_set_features = bcm_sysport_set_features,
2297 .ndo_set_rx_mode = bcm_sysport_set_rx_mode,
2298 .ndo_set_mac_address = bcm_sysport_change_mac,
2299#ifdef CONFIG_NET_POLL_CONTROLLER
2300 .ndo_poll_controller = bcm_sysport_poll_controller,
2301#endif
2302 .ndo_get_stats64 = bcm_sysport_get_stats64,
2303 .ndo_select_queue = bcm_sysport_select_queue,
2304};
2305
1f3ccc3c 2306static int bcm_sysport_map_queues(struct notifier_block *nb,
d1565763
FF		 2307 struct dsa_notifier_register_info *info)
2308{
d1565763 2309 struct bcm_sysport_tx_ring *ring;
1f3ccc3c 2310 struct bcm_sysport_priv *priv;
d1565763
FF		 2311 struct net_device *slave_dev;
2312 unsigned int num_tx_queues;
2313 unsigned int q, start, port;
1f3ccc3c
FF		 2314 struct net_device *dev;
2315
2316 priv = container_of(nb, struct bcm_sysport_priv, dsa_notifier);
2317 if (priv->netdev != info->master)
2318 return 0;
2319
2320 dev = info->master;
d1565763
FF		 2321
2322 /* We can't be setting up queue inspection for non directly attached
2323 * switches
2324 */
2325 if (info->switch_number)
2326 return 0;
2327
c0c21458
FF		 2328 if (dev->netdev_ops != &bcm_sysport_netdev_ops)
2329 return 0;
2330
d1565763
FF		 2331 port = info->port_number;
2332 slave_dev = info->info.dev;
2333
2334 /* On SYSTEMPORT Lite we have twice as less queues, so we cannot do a
2335 * 1:1 mapping, we can only do a 2:1 mapping. By reducing the number of
2336 * per-port (slave_dev) network devices queue, we achieve just that.
2337 * This need to happen now before any slave network device is used such
2338 * it accurately reflects the number of real TX queues.
2339 */
2340 if (priv->is_lite)
2341 netif_set_real_num_tx_queues(slave_dev,
2342 slave_dev->num_tx_queues / 2);
1f3ccc3c 2343
d1565763
FF		 2344 num_tx_queues = slave_dev->real_num_tx_queues;
2345
2346 if (priv->per_port_num_tx_queues &&
2347 priv->per_port_num_tx_queues != num_tx_queues)
14b7dc18 2348 netdev_warn(slave_dev, "asymmetric number of per-port queues\n");
d1565763
FF		 2349
2350 priv->per_port_num_tx_queues = num_tx_queues;
2351
2352 start = find_first_zero_bit(&priv->queue_bitmap, dev->num_tx_queues);
2353 for (q = 0; q < num_tx_queues; q++) {
2354 ring = &priv->tx_rings[q + start];
2355
2356 /* Just remember the mapping actual programming done
2357 * during bcm_sysport_init_tx_ring
2358 */
2359 ring->switch_queue = q;
2360 ring->switch_port = port;
3ded76a8 2361 ring->inspect = true;
d1565763
FF		 2362 priv->ring_map[q + port * num_tx_queues] = ring;
2363
2364 /* Set all queues as being used now */
2365 set_bit(q + start, &priv->queue_bitmap);
2366 }
2367
2368 return 0;
2369}
2370
1f3ccc3c 2371static int bcm_sysport_dsa_notifier(struct notifier_block *nb,
d1565763
FF		 2372 unsigned long event, void *ptr)
2373{
2374 struct dsa_notifier_register_info *info;
2375
2376 if (event != DSA_PORT_REGISTER)
2377 return NOTIFY_DONE;
2378
2379 info = ptr;
2380
1f3ccc3c 2381 return notifier_from_errno(bcm_sysport_map_queues(nb, info));
d1565763
FF		 2382}
2383
80105bef
FF		 2384#define REV_FMT "v%2x.%02x"
2385
44a4524c
FF		 2386static const struct bcm_sysport_hw_params bcm_sysport_params[] = {
2387 [SYSTEMPORT] = {
2388 .is_lite = false,
2389 .num_rx_desc_words = SP_NUM_HW_RX_DESC_WORDS,
2390 },
2391 [SYSTEMPORT_LITE] = {
2392 .is_lite = true,
2393 .num_rx_desc_words = SP_LT_NUM_HW_RX_DESC_WORDS,
2394 },
2395};
2396
2397static const struct of_device_id bcm_sysport_of_match[] = {
2398 { .compatible = "brcm,systemportlite-v1.00",
2399 .data = &bcm_sysport_params[SYSTEMPORT_LITE] },
2400 { .compatible = "brcm,systemport-v1.00",
2401 .data = &bcm_sysport_params[SYSTEMPORT] },
2402 { .compatible = "brcm,systemport",
2403 .data = &bcm_sysport_params[SYSTEMPORT] },
2404 { /* sentinel */ }
2405};
2406MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
2407
80105bef
FF		 2408static int bcm_sysport_probe(struct platform_device *pdev)
2409{
44a4524c
FF		 2410 const struct bcm_sysport_hw_params *params;
2411 const struct of_device_id *of_id = NULL;
80105bef
FF		 2412 struct bcm_sysport_priv *priv;
2413 struct device_node *dn;
2414 struct net_device *dev;
2415 const void *macaddr;
2416 struct resource *r;
2417 u32 txq, rxq;
2418 int ret;
2419
2420 dn = pdev->dev.of_node;
2421 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
44a4524c
FF		 2422 of_id = of_match_node(bcm_sysport_of_match, dn);
2423 if (!of_id || !of_id->data)
2424 return -EINVAL;
2425
2426 /* Fairly quickly we need to know the type of adapter we have */
2427 params = of_id->data;
80105bef
FF		 2428
2429 /* Read the Transmit/Receive Queue properties */
2430 if (of_property_read_u32(dn, "systemport,num-txq", &txq))
2431 txq = TDMA_NUM_RINGS;
2432 if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
2433 rxq = 1;
2434
7b78be48
FF		 2435 /* Sanity check the number of transmit queues */
2436 if (!txq || txq > TDMA_NUM_RINGS)
2437 return -EINVAL;
2438
80105bef
FF		 2439 dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
2440 if (!dev)
2441 return -ENOMEM;
2442
2443 /* Initialize private members */
2444 priv = netdev_priv(dev);
2445
7b78be48
FF		 2446 /* Allocate number of TX rings */
2447 priv->tx_rings = devm_kcalloc(&pdev->dev, txq,
2448 sizeof(struct bcm_sysport_tx_ring),
2449 GFP_KERNEL);
2450 if (!priv->tx_rings)
2451 return -ENOMEM;
2452
44a4524c
FF		 2453 priv->is_lite = params->is_lite;
2454 priv->num_rx_desc_words = params->num_rx_desc_words;
2455
80105bef 2456 priv->irq0 = platform_get_irq(pdev, 0);
d31353cd 2457 if (!priv->is_lite) {
44a4524c 2458 priv->irq1 = platform_get_irq(pdev, 1);
d31353cd
FF		 2459 priv->wol_irq = platform_get_irq(pdev, 2);
2460 } else {
2461 priv->wol_irq = platform_get_irq(pdev, 1);
2462 }
44a4524c 2463 if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) {
80105bef
FF		 2464 dev_err(&pdev->dev, "invalid interrupts\n");
2465 ret = -EINVAL;
39f8b0d4 2466 goto err_free_netdev;
80105bef
FF		 2467 }
2468
126e6122
JH		 2469 priv->base = devm_ioremap_resource(&pdev->dev, r);
2470 if (IS_ERR(priv->base)) {
2471 ret = PTR_ERR(priv->base);
39f8b0d4 2472 goto err_free_netdev;
80105bef
FF		 2473 }
2474
2475 priv->netdev = dev;
2476 priv->pdev = pdev;
2477
2478 priv->phy_interface = of_get_phy_mode(dn);
2479 /* Default to GMII interface mode */
2480 if (priv->phy_interface < 0)
2481 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
2482
186534a3
FF		 2483 /* In the case of a fixed PHY, the DT node associated
2484 * to the PHY is the Ethernet MAC DT node.
2485 */
2486 if (of_phy_is_fixed_link(dn)) {
2487 ret = of_phy_register_fixed_link(dn);
2488 if (ret) {
2489 dev_err(&pdev->dev, "failed to register fixed PHY\n");
39f8b0d4 2490 goto err_free_netdev;
186534a3
FF		 2491 }
2492
2493 priv->phy_dn = dn;
2494 }
2495
80105bef
FF		 2496 /* Initialize netdevice members */
2497 macaddr = of_get_mac_address(dn);
2498 if (!macaddr || !is_valid_ether_addr(macaddr)) {
2499 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
adb35050 2500 eth_hw_addr_random(dev);
80105bef
FF		 2501 } else {
2502 ether_addr_copy(dev->dev_addr, macaddr);
2503 }
2504
2505 SET_NETDEV_DEV(dev, &pdev->dev);
2506 dev_set_drvdata(&pdev->dev, dev);
7ad24ea4 2507 dev->ethtool_ops = &bcm_sysport_ethtool_ops;
80105bef
FF		 2508 dev->netdev_ops = &bcm_sysport_netdev_ops;
2509 netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
2510
2511 /* HW supported features, none enabled by default */
2512 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
2513 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2514
83e82f4c
FF		 2515 /* Request the WOL interrupt and advertise suspend if available */
2516 priv->wol_irq_disabled = 1;
2517 ret = devm_request_irq(&pdev->dev, priv->wol_irq,
23acb2fc 2518 bcm_sysport_wol_isr, 0, dev->name, priv);
83e82f4c
FF		 2519 if (!ret)
2520 device_set_wakeup_capable(&pdev->dev, 1);
2521
80105bef 2522 /* Set the needed headroom once and for all */
3afc557d
PG		 2523 BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
2524 dev->needed_headroom += sizeof(struct bcm_tsb);
80105bef 2525
f532e744
FF		 2526 /* libphy will adjust the link state accordingly */
2527 netif_carrier_off(dev);
2528
a8cdfbdf 2529 priv->rx_max_coalesced_frames = 1;
10377ba7 2530 u64_stats_init(&priv->syncp);
2531
d1565763
FF		 2532 priv->dsa_notifier.notifier_call = bcm_sysport_dsa_notifier;
2533
2534 ret = register_dsa_notifier(&priv->dsa_notifier);
2535 if (ret) {
2536 dev_err(&pdev->dev, "failed to register DSA notifier\n");
2537 goto err_deregister_fixed_link;
2538 }
2539
80105bef
FF		 2540 ret = register_netdev(dev);
2541 if (ret) {
2542 dev_err(&pdev->dev, "failed to register net_device\n");
d1565763 2543 goto err_deregister_notifier;
80105bef
FF		 2544 }
2545
2546 priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
2547 dev_info(&pdev->dev,
44a4524c 2548 "Broadcom SYSTEMPORT%s" REV_FMT
23acb2fc 2549 " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
44a4524c 2550 priv->is_lite ? " Lite" : "",
23acb2fc
FF		 2551 (priv->rev >> 8) & 0xff, priv->rev & 0xff,
2552 priv->base, priv->irq0, priv->irq1, txq, rxq);
80105bef
FF		 2553
2554 return 0;
39f8b0d4 2555
d1565763
FF		 2556err_deregister_notifier:
2557 unregister_dsa_notifier(&priv->dsa_notifier);
39f8b0d4
JH		 2558err_deregister_fixed_link:
2559 if (of_phy_is_fixed_link(dn))
2560 of_phy_deregister_fixed_link(dn);
2561err_free_netdev:
80105bef
FF		 2562 free_netdev(dev);
2563 return ret;
2564}
2565
2566static int bcm_sysport_remove(struct platform_device *pdev)
2567{
2568 struct net_device *dev = dev_get_drvdata(&pdev->dev);
d1565763 2569 struct bcm_sysport_priv *priv = netdev_priv(dev);
39f8b0d4 2570 struct device_node *dn = pdev->dev.of_node;
80105bef
FF		 2571
2572 /* Not much to do, ndo_close has been called
2573 * and we use managed allocations
2574 */
d1565763 2575 unregister_dsa_notifier(&priv->dsa_notifier);
80105bef 2576 unregister_netdev(dev);
39f8b0d4
JH		 2577 if (of_phy_is_fixed_link(dn))
2578 of_phy_deregister_fixed_link(dn);
80105bef
FF		 2579 free_netdev(dev);
2580 dev_set_drvdata(&pdev->dev, NULL);
2581
2582 return 0;
2583}
2584
83e82f4c
FF		 2585static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
2586{
2587 struct net_device *ndev = priv->netdev;
2588 unsigned int timeout = 1000;
bb9051a2 2589 unsigned int index, i = 0;
83e82f4c
FF		 2590 u32 reg;
2591
2592 /* Password has already been programmed */
2593 reg = umac_readl(priv, UMAC_MPD_CTRL);
bb9051a2
FF		 2594 if (priv->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE))
2595 reg |= MPD_EN;
83e82f4c
FF		 2596 reg &= ~PSW_EN;
2597 if (priv->wolopts & WAKE_MAGICSECURE)
2598 reg |= PSW_EN;
2599 umac_writel(priv, reg, UMAC_MPD_CTRL);
2600
bb9051a2
FF		 2601 if (priv->wolopts & WAKE_FILTER) {
2602 /* Turn on ACPI matching to steal packets from RBUF */
2603 reg = rbuf_readl(priv, RBUF_CONTROL);
2604 if (priv->is_lite)
2605 reg |= RBUF_ACPI_EN_LITE;
2606 else
2607 reg |= RBUF_ACPI_EN;
2608 rbuf_writel(priv, reg, RBUF_CONTROL);
2609
2610 /* Enable RXCHK, active filters and Broadcom tag matching */
2611 reg = rxchk_readl(priv, RXCHK_CONTROL);
2612 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK <<
2613 RXCHK_BRCM_TAG_MATCH_SHIFT);
2614 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) {
2615 reg |= BIT(RXCHK_BRCM_TAG_MATCH_SHIFT + i);
2616 i++;
2617 }
2618 reg |= RXCHK_EN | RXCHK_BRCM_TAG_EN;
2619 rxchk_writel(priv, reg, RXCHK_CONTROL);
2620 }
2621
83e82f4c
FF		 2622 /* Make sure RBUF entered WoL mode as result */
2623 do {
2624 reg = rbuf_readl(priv, RBUF_STATUS);
2625 if (reg & RBUF_WOL_MODE)
2626 break;
2627
2628 udelay(10);
2629 } while (timeout-- > 0);
2630
2631 /* Do not leave the UniMAC RBUF matching only MPD packets */
2632 if (!timeout) {
54226116 2633 mpd_enable_set(priv, false);
83e82f4c
FF		 2634 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
2635 return -ETIMEDOUT;
2636 }
2637
2638 /* UniMAC receive needs to be turned on */
2639 umac_enable_set(priv, CMD_RX_EN, 1);
2640
83e82f4c
FF		 2641 netif_dbg(priv, wol, ndev, "entered WOL mode\n");
2642
2643 return 0;
2644}
2645
cf87615d 2646static int __maybe_unused bcm_sysport_suspend(struct device *d)
40755a0f
FF		 2647{
2648 struct net_device *dev = dev_get_drvdata(d);
2649 struct bcm_sysport_priv *priv = netdev_priv(dev);
2650 unsigned int i;
83e82f4c 2651 int ret = 0;
40755a0f
FF		 2652 u32 reg;
2653
2654 if (!netif_running(dev))
2655 return 0;
2656
2657 bcm_sysport_netif_stop(dev);
2658
715a0227 2659 phy_suspend(dev->phydev);
40755a0f
FF		 2660
2661 netif_device_detach(dev);
2662
2663 /* Disable UniMAC RX */
2664 umac_enable_set(priv, CMD_RX_EN, 0);
2665
2666 ret = rdma_enable_set(priv, 0);
2667 if (ret) {
2668 netdev_err(dev, "RDMA timeout!\n");
2669 return ret;
2670 }
2671
2672 /* Disable RXCHK if enabled */
9d34c1cb 2673 if (priv->rx_chk_en) {
40755a0f
FF		 2674 reg = rxchk_readl(priv, RXCHK_CONTROL);
2675 reg &= ~RXCHK_EN;
2676 rxchk_writel(priv, reg, RXCHK_CONTROL);
2677 }
2678
2679 /* Flush RX pipe */
83e82f4c
FF		 2680 if (!priv->wolopts)
2681 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
40755a0f
FF		 2682
2683 ret = tdma_enable_set(priv, 0);
2684 if (ret) {
2685 netdev_err(dev, "TDMA timeout!\n");
2686 return ret;
2687 }
2688
2689 /* Wait for a packet boundary */
2690 usleep_range(2000, 3000);
2691
2692 umac_enable_set(priv, CMD_TX_EN, 0);
2693
2694 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
2695
2696 /* Free RX/TX rings SW structures */
2697 for (i = 0; i < dev->num_tx_queues; i++)
2698 bcm_sysport_fini_tx_ring(priv, i);
2699 bcm_sysport_fini_rx_ring(priv);
2700
83e82f4c
FF		 2701 /* Get prepared for Wake-on-LAN */
2702 if (device_may_wakeup(d) && priv->wolopts)
2703 ret = bcm_sysport_suspend_to_wol(priv);
2704
2705 return ret;
40755a0f
FF		 2706}
2707
cf87615d 2708static int __maybe_unused bcm_sysport_resume(struct device *d)
40755a0f
FF		 2709{
2710 struct net_device *dev = dev_get_drvdata(d);
2711 struct bcm_sysport_priv *priv = netdev_priv(dev);
2712 unsigned int i;
2713 u32 reg;
2714 int ret;
2715
2716 if (!netif_running(dev))
2717 return 0;
2718
704d33e7
FF		 2719 umac_reset(priv);
2720
83e82f4c
FF		 2721 /* We may have been suspended and never received a WOL event that
2722 * would turn off MPD detection, take care of that now
2723 */
2724 bcm_sysport_resume_from_wol(priv);
2725
40755a0f
FF		 2726 /* Initialize both hardware and software ring */
2727 for (i = 0; i < dev->num_tx_queues; i++) {
2728 ret = bcm_sysport_init_tx_ring(priv, i);
2729 if (ret) {
2730 netdev_err(dev, "failed to initialize TX ring %d\n",
23acb2fc 2731 i);
40755a0f
FF		 2732 goto out_free_tx_rings;
2733 }
2734 }
2735
2736 /* Initialize linked-list */
2737 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2738
2739 /* Initialize RX ring */
2740 ret = bcm_sysport_init_rx_ring(priv);
2741 if (ret) {
2742 netdev_err(dev, "failed to initialize RX ring\n");
2743 goto out_free_rx_ring;
2744 }
2745
2746 netif_device_attach(dev);
2747
40755a0f
FF		 2748 /* RX pipe enable */
2749 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
2750
2751 ret = rdma_enable_set(priv, 1);
2752 if (ret) {
2753 netdev_err(dev, "failed to enable RDMA\n");
2754 goto out_free_rx_ring;
2755 }
2756
2757 /* Enable rxhck */
9d34c1cb 2758 if (priv->rx_chk_en) {
40755a0f
FF		 2759 reg = rxchk_readl(priv, RXCHK_CONTROL);
2760 reg |= RXCHK_EN;
2761 rxchk_writel(priv, reg, RXCHK_CONTROL);
2762 }
2763
2764 rbuf_init(priv);
2765
2766 /* Set maximum frame length */
44a4524c
FF		 2767 if (!priv->is_lite)
2768 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
2769 else
2770 gib_set_pad_extension(priv);
40755a0f
FF		 2771
2772 /* Set MAC address */
2773 umac_set_hw_addr(priv, dev->dev_addr);
2774
2775 umac_enable_set(priv, CMD_RX_EN, 1);
2776
2777 /* TX pipe enable */
2778 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
2779
2780 umac_enable_set(priv, CMD_TX_EN, 1);
2781
2782 ret = tdma_enable_set(priv, 1);
2783 if (ret) {
2784 netdev_err(dev, "TDMA timeout!\n");
2785 goto out_free_rx_ring;
2786 }
2787
715a0227 2788 phy_resume(dev->phydev);
40755a0f
FF		 2789
2790 bcm_sysport_netif_start(dev);
2791
2792 return 0;
2793
2794out_free_rx_ring:
2795 bcm_sysport_fini_rx_ring(priv);
2796out_free_tx_rings:
2797 for (i = 0; i < dev->num_tx_queues; i++)
2798 bcm_sysport_fini_tx_ring(priv, i);
2799 return ret;
2800}
40755a0f
FF		 2801
2802static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
2803 bcm_sysport_suspend, bcm_sysport_resume);
2804
80105bef
FF		 2805static struct platform_driver bcm_sysport_driver = {
2806 .probe = bcm_sysport_probe,
2807 .remove = bcm_sysport_remove,
2808 .driver = {
2809 .name = "brcm-systemport",
80105bef 2810 .of_match_table = bcm_sysport_of_match,
40755a0f 2811 .pm = &bcm_sysport_pm_ops,
80105bef
FF		 2812 },
2813};
2814module_platform_driver(bcm_sysport_driver);
2815
2816MODULE_AUTHOR("Broadcom Corporation");
2817MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
2818MODULE_ALIAS("platform:brcm-systemport");
2819MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)