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ethernet: use eth_hw_addr_set() for dev->addr_len cases
[linux-2.6-block.git] / drivers / net / ethernet / atheros / atl1c / atl1c_main.c
CommitLineData
1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
43250ddd
JY		 2/*
3 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
4 *
5 * Derived from Intel e1000 driver
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
43250ddd
JY		 7 */
8
9#include "atl1c.h"
10
43250ddd 11char atl1c_driver_name[] = "atl1c";
496c185c 12
43250ddd
JY		 13/*
14 * atl1c_pci_tbl - PCI Device ID Table
15 *
16 * Wildcard entries (PCI_ANY_ID) should come last
17 * Last entry must be all 0s
18 *
19 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
20 * Class, Class Mask, private data (not used) }
21 */
9baa3c34 22static const struct pci_device_id atl1c_pci_tbl[] = {
43250ddd
JY		 23 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
24 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
496c185c
LR		 25 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
26 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
27 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
94dde7e4 28 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
43250ddd
JY		 29 /* required last entry */
30 { 0 }
31};
32MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
33
70c9fbd3 34MODULE_AUTHOR("Jie Yang");
a57d3d48 35MODULE_AUTHOR("Qualcomm Atheros Inc.");
fe4e4372 36MODULE_DESCRIPTION("Qualcomm Atheros 100/1000M Ethernet Network Driver");
43250ddd 37MODULE_LICENSE("GPL");
43250ddd 38
057f4af2
GP		 39struct atl1c_qregs {
40 u16 tpd_addr_lo;
41 u16 tpd_prod;
42 u16 tpd_cons;
43 u16 rfd_addr_lo;
44 u16 rrd_addr_lo;
45 u16 rfd_prod;
46 u32 tx_isr;
47 u32 rx_isr;
48};
49
50static struct atl1c_qregs atl1c_qregs[AT_MAX_TRANSMIT_QUEUE] = {
51 {
52 REG_TPD_PRI0_ADDR_LO, REG_TPD_PRI0_PIDX, REG_TPD_PRI0_CIDX,
53 REG_RFD0_HEAD_ADDR_LO, REG_RRD0_HEAD_ADDR_LO,
54 REG_MB_RFD0_PROD_IDX, ISR_TX_PKT_0, ISR_RX_PKT_0
55 },
56 {
57 REG_TPD_PRI1_ADDR_LO, REG_TPD_PRI1_PIDX, REG_TPD_PRI1_CIDX,
58 REG_RFD1_HEAD_ADDR_LO, REG_RRD1_HEAD_ADDR_LO,
59 REG_MB_RFD1_PROD_IDX, ISR_TX_PKT_1, ISR_RX_PKT_1
60 },
61 {
62 REG_TPD_PRI2_ADDR_LO, REG_TPD_PRI2_PIDX, REG_TPD_PRI2_CIDX,
63 REG_RFD2_HEAD_ADDR_LO, REG_RRD2_HEAD_ADDR_LO,
64 REG_MB_RFD2_PROD_IDX, ISR_TX_PKT_2, ISR_RX_PKT_2
65 },
66 {
67 REG_TPD_PRI3_ADDR_LO, REG_TPD_PRI3_PIDX, REG_TPD_PRI3_CIDX,
68 REG_RFD3_HEAD_ADDR_LO, REG_RRD3_HEAD_ADDR_LO,
69 REG_MB_RFD3_PROD_IDX, ISR_TX_PKT_3, ISR_RX_PKT_3
70 },
71};
72
43250ddd 73static int atl1c_stop_mac(struct atl1c_hw *hw);
43250ddd 74static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
024e1e4d 75static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed);
25456e5c 76static void atl1c_start_mac(struct atl1c_adapter *adapter);
0fb1e54e 77static int atl1c_up(struct atl1c_adapter *adapter);
78static void atl1c_down(struct atl1c_adapter *adapter);
5e5c0964
HX		 79static int atl1c_reset_mac(struct atl1c_hw *hw);
80static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter);
81static int atl1c_configure(struct atl1c_adapter *adapter);
057f4af2
GP		 82static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, u32 queue,
83 bool napi_mode);
43250ddd 84
43250ddd
JY		 85
86static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
87 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
8f574b35
JY		 88static void atl1c_pcie_patch(struct atl1c_hw *hw)
89{
5cbdcc2f
HX		 90 u32 mst_data, data;
91
92 /* pclk sel could switch to 25M */
93 AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data);
94 mst_data &= ~MASTER_CTRL_CLK_SEL_DIS;
95 AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);
43250ddd 96
ebe22ed9
HX		 97 /* WoL/PCIE related settings */
98 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) {
99 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
100 data |= PCIE_PHYMISC_FORCE_RCV_DET;
101 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
102 } else { /* new dev set bit5 of MASTER */
103 if (!(mst_data & MASTER_CTRL_WAKEN_25M))
104 AT_WRITE_REG(hw, REG_MASTER_CTRL,
105 mst_data | MASTER_CTRL_WAKEN_25M);
106 }
107 /* aspm/PCIE setting only for l2cb 1.0 */
8f574b35
JY		 108 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
109 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
ebe22ed9
HX		 110 data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW,
111 L2CB1_PCIE_PHYMISC2_CDR_BW);
112 data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH,
113 L2CB1_PCIE_PHYMISC2_L0S_TH);
8f574b35 114 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
ebe22ed9
HX		 115 /* extend L1 sync timer */
116 AT_READ_REG(hw, REG_LINK_CTRL, &data);
117 data |= LINK_CTRL_EXT_SYNC;
118 AT_WRITE_REG(hw, REG_LINK_CTRL, data);
119 }
120 /* l2cb 1.x & l1d 1.x */
121 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) {
122 AT_READ_REG(hw, REG_PM_CTRL, &data);
123 data |= PM_CTRL_L0S_BUFSRX_EN;
124 AT_WRITE_REG(hw, REG_PM_CTRL, data);
125 /* clear vendor msg */
126 AT_READ_REG(hw, REG_DMA_DBG, &data);
127 AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG);
8f574b35
JY		 128 }
129}
130
131/* FIXME: no need any more ? */
43250ddd
JY		 132/*
133 * atl1c_init_pcie - init PCIE module
134 */
135static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
136{
137 u32 data;
138 u32 pci_cmd;
139 struct pci_dev *pdev = hw->adapter->pdev;
95f9aea7 140 int pos;
43250ddd
JY		 141
142 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
143 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
144 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
145 PCI_COMMAND_IO);
146 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
147
148 /*
149 * Clear any PowerSaveing Settings
150 */
151 pci_enable_wake(pdev, PCI_D3hot, 0);
152 pci_enable_wake(pdev, PCI_D3cold, 0);
87eabe6b
HX		 153 /* wol sts read-clear */
154 AT_READ_REG(hw, REG_WOL_CTRL, &data);
155 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
43250ddd
JY		 156
157 /*
158 * Mask some pcie error bits
159 */
95f9aea7 160 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
a4f63634
BD		 161 if (pos) {
162 pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data);
163 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP);
164 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data);
165 }
95f9aea7 166 /* clear error status */
eb0ff563 167 pcie_capability_write_word(pdev, PCI_EXP_DEVSTA,
95f9aea7
HX		 168 PCI_EXP_DEVSTA_NFED |
169 PCI_EXP_DEVSTA_FED |
170 PCI_EXP_DEVSTA_CED |
171 PCI_EXP_DEVSTA_URD);
43250ddd 172
8f574b35
JY		 173 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
174 data &= ~LTSSM_ID_EN_WRO;
175 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
176
177 atl1c_pcie_patch(hw);
43250ddd
JY		 178 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
179 atl1c_disable_l0s_l1(hw);
43250ddd 180
8f574b35 181 msleep(5);
43250ddd
JY		 182}
183
49ce9c2c 184/**
43250ddd
JY		 185 * atl1c_irq_enable - Enable default interrupt generation settings
186 * @adapter: board private structure
187 */
188static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
189{
190 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
191 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
192 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
193 AT_WRITE_FLUSH(&adapter->hw);
194 }
195}
196
49ce9c2c 197/**
43250ddd
JY		 198 * atl1c_irq_disable - Mask off interrupt generation on the NIC
199 * @adapter: board private structure
200 */
201static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
202{
203 atomic_inc(&adapter->irq_sem);
204 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
8f574b35 205 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
43250ddd
JY		 206 AT_WRITE_FLUSH(&adapter->hw);
207 synchronize_irq(adapter->pdev->irq);
208}
209
49ce9c2c 210/**
43250ddd
JY		 211 * atl1c_irq_reset - reset interrupt confiure on the NIC
212 * @adapter: board private structure
213 */
214static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
215{
216 atomic_set(&adapter->irq_sem, 1);
217 atl1c_irq_enable(adapter);
218}
219
c930a662
JP		 220/*
221 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
222 * of the idle status register until the device is actually idle
223 */
969a7ee2 224static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl)
c930a662
JP		 225{
226 int timeout;
227 u32 data;
228
229 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
230 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
969a7ee2 231 if ((data & modu_ctrl) == 0)
c930a662
JP		 232 return 0;
233 msleep(1);
234 }
235 return data;
236}
237
49ce9c2c 238/**
43250ddd 239 * atl1c_phy_config - Timer Call-back
d0ea5cbd 240 * @t: timer list containing pointer to netdev cast into an unsigned long
43250ddd 241 */
e99e88a9 242static void atl1c_phy_config(struct timer_list *t)
43250ddd 243{
e99e88a9
KC		 244 struct atl1c_adapter *adapter = from_timer(adapter, t,
245 phy_config_timer);
43250ddd
JY		 246 struct atl1c_hw *hw = &adapter->hw;
247 unsigned long flags;
248
249 spin_lock_irqsave(&adapter->mdio_lock, flags);
250 atl1c_restart_autoneg(hw);
251 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
252}
253
254void atl1c_reinit_locked(struct atl1c_adapter *adapter)
255{
43250ddd
JY		 256 atl1c_down(adapter);
257 atl1c_up(adapter);
258 clear_bit(__AT_RESETTING, &adapter->flags);
259}
260
43250ddd
JY		 261static void atl1c_check_link_status(struct atl1c_adapter *adapter)
262{
263 struct atl1c_hw *hw = &adapter->hw;
264 struct net_device *netdev = adapter->netdev;
265 struct pci_dev *pdev = adapter->pdev;
266 int err;
267 unsigned long flags;
ea0fbd05
GP		 268 u16 speed, duplex;
269 bool link;
43250ddd
JY		 270
271 spin_lock_irqsave(&adapter->mdio_lock, flags);
ea0fbd05 272 link = atl1c_get_link_status(hw);
43250ddd
JY		 273 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
274
ea0fbd05 275 if (!link) {
43250ddd 276 /* link down */
5e5c0964 277 netif_carrier_off(netdev);
8f574b35 278 hw->hibernate = true;
5e5c0964 279 if (atl1c_reset_mac(hw) != 0)
8f574b35 280 if (netif_msg_hw(adapter))
5e5c0964 281 dev_warn(&pdev->dev, "reset mac failed\n");
024e1e4d 282 atl1c_set_aspm(hw, SPEED_0);
903d7ce0 283 atl1c_post_phy_linkchg(hw, SPEED_0);
5e5c0964
HX		 284 atl1c_reset_dma_ring(adapter);
285 atl1c_configure(adapter);
43250ddd
JY		 286 } else {
287 /* Link Up */
288 hw->hibernate = false;
289 spin_lock_irqsave(&adapter->mdio_lock, flags);
290 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
291 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
292 if (unlikely(err))
293 return;
294 /* link result is our setting */
295 if (adapter->link_speed != speed ||
296 adapter->link_duplex != duplex) {
297 adapter->link_speed = speed;
298 adapter->link_duplex = duplex;
024e1e4d 299 atl1c_set_aspm(hw, speed);
903d7ce0 300 atl1c_post_phy_linkchg(hw, speed);
25456e5c 301 atl1c_start_mac(adapter);
43250ddd
JY		 302 if (netif_msg_link(adapter))
303 dev_info(&pdev->dev,
304 "%s: %s NIC Link is Up<%d Mbps %s>\n",
305 atl1c_driver_name, netdev->name,
306 adapter->link_speed,
307 adapter->link_duplex == FULL_DUPLEX ?
308 "Full Duplex" : "Half Duplex");
309 }
310 if (!netif_carrier_ok(netdev))
311 netif_carrier_on(netdev);
312 }
313}
314
43250ddd
JY		 315static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
316{
317 struct net_device *netdev = adapter->netdev;
318 struct pci_dev *pdev = adapter->pdev;
ea0fbd05 319 bool link;
43250ddd
JY		 320
321 spin_lock(&adapter->mdio_lock);
ea0fbd05 322 link = atl1c_get_link_status(&adapter->hw);
43250ddd 323 spin_unlock(&adapter->mdio_lock);
43250ddd 324 /* notify upper layer link down ASAP */
ea0fbd05 325 if (!link) {
43250ddd
JY		 326 if (netif_carrier_ok(netdev)) {
327 /* old link state: Up */
328 netif_carrier_off(netdev);
329 if (netif_msg_link(adapter))
330 dev_info(&pdev->dev,
331 "%s: %s NIC Link is Down\n",
332 atl1c_driver_name, netdev->name);
333 adapter->link_speed = SPEED_0;
334 }
335 }
cb190546 336
cb771838 337 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
cb190546 338 schedule_work(&adapter->common_task);
43250ddd
JY		 339}
340
cb190546 341static void atl1c_common_task(struct work_struct *work)
43250ddd 342{
cb190546
JY		 343 struct atl1c_adapter *adapter;
344 struct net_device *netdev;
345
346 adapter = container_of(work, struct atl1c_adapter, common_task);
347 netdev = adapter->netdev;
348
0aa76ce3
HX		 349 if (test_bit(__AT_DOWN, &adapter->flags))
350 return;
351
cb771838 352 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
cb190546
JY		 353 netif_device_detach(netdev);
354 atl1c_down(adapter);
355 atl1c_up(adapter);
356 netif_device_attach(netdev);
cb190546
JY		 357 }
358
cb771838 359 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
5e5c0964
HX		 360 &adapter->work_event)) {
361 atl1c_irq_disable(adapter);
cb190546 362 atl1c_check_link_status(adapter);
5e5c0964
HX		 363 atl1c_irq_enable(adapter);
364 }
43250ddd
JY		 365}
366
cb190546
JY		 367
368static void atl1c_del_timer(struct atl1c_adapter *adapter)
43250ddd 369{
cb190546 370 del_timer_sync(&adapter->phy_config_timer);
43250ddd
JY		 371}
372
cb190546 373
49ce9c2c 374/**
43250ddd
JY		 375 * atl1c_tx_timeout - Respond to a Tx Hang
376 * @netdev: network interface device structure
d0ea5cbd 377 * @txqueue: index of hanging tx queue
43250ddd 378 */
0290bd29 379static void atl1c_tx_timeout(struct net_device *netdev, unsigned int txqueue)
43250ddd
JY		 380{
381 struct atl1c_adapter *adapter = netdev_priv(netdev);
382
383 /* Do the reset outside of interrupt context */
cb771838 384 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
cb190546 385 schedule_work(&adapter->common_task);
43250ddd
JY		 386}
387
49ce9c2c 388/**
43250ddd
JY		 389 * atl1c_set_multi - Multicast and Promiscuous mode set
390 * @netdev: network interface device structure
391 *
392 * The set_multi entry point is called whenever the multicast address
393 * list or the network interface flags are updated. This routine is
394 * responsible for configuring the hardware for proper multicast,
395 * promiscuous mode, and all-multi behavior.
396 */
397static void atl1c_set_multi(struct net_device *netdev)
398{
399 struct atl1c_adapter *adapter = netdev_priv(netdev);
400 struct atl1c_hw *hw = &adapter->hw;
22bedad3 401 struct netdev_hw_addr *ha;
43250ddd
JY		 402 u32 mac_ctrl_data;
403 u32 hash_value;
404
405 /* Check for Promiscuous and All Multicast modes */
406 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
407
408 if (netdev->flags & IFF_PROMISC) {
409 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
410 } else if (netdev->flags & IFF_ALLMULTI) {
411 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
412 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
413 } else {
414 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
415 }
416
417 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
418
419 /* clear the old settings from the multicast hash table */
420 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
421 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
422
423 /* comoute mc addresses' hash value ,and put it into hash table */
22bedad3
JP		 424 netdev_for_each_mc_addr(ha, netdev) {
425 hash_value = atl1c_hash_mc_addr(hw, ha->addr);
43250ddd
JY		 426 atl1c_hash_set(hw, hash_value);
427 }
428}
429
c8f44aff 430static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
46facce9 431{
f646968f 432 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
46facce9
JP		 433 /* enable VLAN tag insert/strip */
434 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
435 } else {
436 /* disable VLAN tag insert/strip */
437 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
438 }
439}
440
c8f44aff
MM		 441static void atl1c_vlan_mode(struct net_device *netdev,
442 netdev_features_t features)
43250ddd
JY		 443{
444 struct atl1c_adapter *adapter = netdev_priv(netdev);
445 struct pci_dev *pdev = adapter->pdev;
446 u32 mac_ctrl_data = 0;
447
448 if (netif_msg_pktdata(adapter))
46facce9 449 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
43250ddd
JY		 450
451 atl1c_irq_disable(adapter);
43250ddd 452 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
46facce9 453 __atl1c_vlan_mode(features, &mac_ctrl_data);
43250ddd
JY		 454 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
455 atl1c_irq_enable(adapter);
456}
457
458static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
459{
460 struct pci_dev *pdev = adapter->pdev;
461
462 if (netif_msg_pktdata(adapter))
46facce9
JP		 463 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
464 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
43250ddd 465}
46facce9 466
49ce9c2c 467/**
8965c1c5 468 * atl1c_set_mac_addr - Change the Ethernet Address of the NIC
43250ddd
JY		 469 * @netdev: network interface device structure
470 * @p: pointer to an address structure
471 *
472 * Returns 0 on success, negative on failure
473 */
474static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
475{
476 struct atl1c_adapter *adapter = netdev_priv(netdev);
477 struct sockaddr *addr = p;
478
479 if (!is_valid_ether_addr(addr->sa_data))
480 return -EADDRNOTAVAIL;
481
482 if (netif_running(netdev))
483 return -EBUSY;
484
a05e4c0a 485 eth_hw_addr_set(netdev, addr->sa_data);
43250ddd
JY		 486 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
487
229e6b6e 488 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
43250ddd
JY		 489
490 return 0;
491}
492
493static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
494 struct net_device *dev)
495{
7b701764 496 unsigned int head_size;
43250ddd
JY		 497 int mtu = dev->mtu;
498
499 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
500 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
7b701764 501
a9d6df64 502 head_size = SKB_DATA_ALIGN(adapter->rx_buffer_len + NET_SKB_PAD + NET_IP_ALIGN) +
7b701764
ED		 503 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
504 adapter->rx_frag_size = roundup_pow_of_two(head_size);
43250ddd 505}
782d640a 506
c8f44aff
MM		 507static netdev_features_t atl1c_fix_features(struct net_device *netdev,
508 netdev_features_t features)
782d640a 509{
545fa3fb
GP		 510 struct atl1c_adapter *adapter = netdev_priv(netdev);
511 struct atl1c_hw *hw = &adapter->hw;
512
46facce9
JP		 513 /*
514 * Since there is no support for separate rx/tx vlan accel
515 * enable/disable make sure tx flag is always in same state as rx.
516 */
f646968f
PM		 517 if (features & NETIF_F_HW_VLAN_CTAG_RX)
518 features |= NETIF_F_HW_VLAN_CTAG_TX;
46facce9 519 else
f646968f 520 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
46facce9 521
545fa3fb
GP		 522 if (hw->nic_type != athr_mt) {
523 if (netdev->mtu > MAX_TSO_FRAME_SIZE)
524 features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
525 }
782d640a
MM		 526
527 return features;
528}
529
c8f44aff
MM		 530static int atl1c_set_features(struct net_device *netdev,
531 netdev_features_t features)
46facce9 532{
c8f44aff 533 netdev_features_t changed = netdev->features ^ features;
46facce9 534
f646968f 535 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
46facce9
JP		 536 atl1c_vlan_mode(netdev, features);
537
538 return 0;
539}
540
67bef942
JW		 541static void atl1c_set_max_mtu(struct net_device *netdev)
542{
543 struct atl1c_adapter *adapter = netdev_priv(netdev);
544 struct atl1c_hw *hw = &adapter->hw;
545
546 switch (hw->nic_type) {
547 /* These (GbE) devices support jumbo packets, max_mtu 6122 */
548 case athr_l1c:
549 case athr_l1d:
550 case athr_l1d_2:
551 netdev->max_mtu = MAX_JUMBO_FRAME_SIZE -
545fa3fb
GP		 552 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
553 break;
554 case athr_mt:
555 netdev->max_mtu = 9500;
67bef942 556 break;
545fa3fb 557 /* The 10/100 devices don't support jumbo packets, max_mtu 1500 */
67bef942
JW		 558 default:
559 netdev->max_mtu = ETH_DATA_LEN;
560 break;
561 }
562}
563
49ce9c2c 564/**
43250ddd
JY		 565 * atl1c_change_mtu - Change the Maximum Transfer Unit
566 * @netdev: network interface device structure
567 * @new_mtu: new value for maximum frame size
568 *
569 * Returns 0 on success, negative on failure
570 */
571static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
572{
573 struct atl1c_adapter *adapter = netdev_priv(netdev);
67bef942 574
43250ddd 575 /* set MTU */
67bef942 576 if (netif_running(netdev)) {
43250ddd
JY		 577 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
578 msleep(1);
579 netdev->mtu = new_mtu;
580 adapter->hw.max_frame_size = new_mtu;
581 atl1c_set_rxbufsize(adapter, netdev);
582 atl1c_down(adapter);
782d640a 583 netdev_update_features(netdev);
43250ddd
JY		 584 atl1c_up(adapter);
585 clear_bit(__AT_RESETTING, &adapter->flags);
43250ddd
JY		 586 }
587 return 0;
588}
589
590/*
591 * caller should hold mdio_lock
592 */
593static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
594{
595 struct atl1c_adapter *adapter = netdev_priv(netdev);
596 u16 result;
597
2528a5dc 598 atl1c_read_phy_reg(&adapter->hw, reg_num, &result);
43250ddd
JY		 599 return result;
600}
601
602static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
603 int reg_num, int val)
604{
605 struct atl1c_adapter *adapter = netdev_priv(netdev);
606
2528a5dc 607 atl1c_write_phy_reg(&adapter->hw, reg_num, val);
43250ddd
JY		 608}
609
43250ddd
JY		 610static int atl1c_mii_ioctl(struct net_device *netdev,
611 struct ifreq *ifr, int cmd)
612{
613 struct atl1c_adapter *adapter = netdev_priv(netdev);
614 struct pci_dev *pdev = adapter->pdev;
615 struct mii_ioctl_data *data = if_mii(ifr);
616 unsigned long flags;
617 int retval = 0;
618
619 if (!netif_running(netdev))
620 return -EINVAL;
621
622 spin_lock_irqsave(&adapter->mdio_lock, flags);
623 switch (cmd) {
624 case SIOCGMIIPHY:
625 data->phy_id = 0;
626 break;
627
628 case SIOCGMIIREG:
43250ddd
JY		 629 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
630 &data->val_out)) {
631 retval = -EIO;
632 goto out;
633 }
634 break;
635
636 case SIOCSMIIREG:
43250ddd
JY		 637 if (data->reg_num & ~(0x1F)) {
638 retval = -EFAULT;
639 goto out;
640 }
641
642 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
643 data->reg_num, data->val_in);
644 if (atl1c_write_phy_reg(&adapter->hw,
645 data->reg_num, data->val_in)) {
646 retval = -EIO;
647 goto out;
648 }
649 break;
650
651 default:
652 retval = -EOPNOTSUPP;
653 break;
654 }
655out:
656 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
657 return retval;
658}
659
43250ddd
JY		 660static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
661{
662 switch (cmd) {
663 case SIOCGMIIPHY:
664 case SIOCGMIIREG:
665 case SIOCSMIIREG:
666 return atl1c_mii_ioctl(netdev, ifr, cmd);
667 default:
668 return -EOPNOTSUPP;
669 }
670}
671
49ce9c2c 672/**
43250ddd
JY		 673 * atl1c_alloc_queues - Allocate memory for all rings
674 * @adapter: board private structure to initialize
675 *
676 */
093d369d 677static int atl1c_alloc_queues(struct atl1c_adapter *adapter)
43250ddd
JY		 678{
679 return 0;
680}
681
bf3be85d
GP		 682static enum atl1c_nic_type atl1c_get_mac_type(struct pci_dev *pdev,
683 u8 __iomem *hw_addr)
43250ddd 684{
bf3be85d 685 switch (pdev->device) {
43250ddd 686 case PCI_DEVICE_ID_ATTANSIC_L2C:
bf3be85d 687 return athr_l2c;
43250ddd 688 case PCI_DEVICE_ID_ATTANSIC_L1C:
bf3be85d 689 return athr_l1c;
496c185c 690 case PCI_DEVICE_ID_ATHEROS_L2C_B:
bf3be85d 691 return athr_l2c_b;
496c185c 692 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
bf3be85d 693 return athr_l2c_b2;
496c185c 694 case PCI_DEVICE_ID_ATHEROS_L1D:
bf3be85d 695 return athr_l1d;
8f574b35 696 case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
bf3be85d
GP		 697 if (readl(hw_addr + REG_MT_MAGIC) == MT_MAGIC)
698 return athr_mt;
699 return athr_l1d_2;
43250ddd 700 default:
bf3be85d 701 return athr_l1c;
43250ddd
JY		 702 }
703}
704
705static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
706{
43250ddd
JY		 707 u32 link_ctrl_data;
708
43250ddd
JY		 709 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
710
8f574b35 711 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
43250ddd 712 ATL1C_TXQ_MODE_ENHANCE;
024e1e4d
HX		 713 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT |
714 ATL1C_ASPM_L1_SUPPORT;
8f574b35 715 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
43250ddd 716
496c185c 717 if (hw->nic_type == athr_l1c ||
8f574b35
JY		 718 hw->nic_type == athr_l1d ||
719 hw->nic_type == athr_l1d_2)
496c185c 720 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
43250ddd
JY		 721 return 0;
722}
903d7ce0
HX		 723
724struct atl1c_platform_patch {
725 u16 pci_did;
726 u8 pci_revid;
727 u16 subsystem_vid;
728 u16 subsystem_did;
729 u32 patch_flag;
730#define ATL1C_LINK_PATCH 0x1
731};
093d369d 732static const struct atl1c_platform_patch plats[] = {
903d7ce0
HX		 733{0x2060, 0xC1, 0x1019, 0x8152, 0x1},
734{0x2060, 0xC1, 0x1019, 0x2060, 0x1},
735{0x2060, 0xC1, 0x1019, 0xE000, 0x1},
736{0x2062, 0xC0, 0x1019, 0x8152, 0x1},
737{0x2062, 0xC0, 0x1019, 0x2062, 0x1},
738{0x2062, 0xC0, 0x1458, 0xE000, 0x1},
739{0x2062, 0xC1, 0x1019, 0x8152, 0x1},
740{0x2062, 0xC1, 0x1019, 0x2062, 0x1},
741{0x2062, 0xC1, 0x1458, 0xE000, 0x1},
742{0x2062, 0xC1, 0x1565, 0x2802, 0x1},
743{0x2062, 0xC1, 0x1565, 0x2801, 0x1},
744{0x1073, 0xC0, 0x1019, 0x8151, 0x1},
745{0x1073, 0xC0, 0x1019, 0x1073, 0x1},
746{0x1073, 0xC0, 0x1458, 0xE000, 0x1},
747{0x1083, 0xC0, 0x1458, 0xE000, 0x1},
748{0x1083, 0xC0, 0x1019, 0x8151, 0x1},
749{0x1083, 0xC0, 0x1019, 0x1083, 0x1},
750{0x1083, 0xC0, 0x1462, 0x7680, 0x1},
751{0x1083, 0xC0, 0x1565, 0x2803, 0x1},
752{0},
753};
754
093d369d 755static void atl1c_patch_assign(struct atl1c_hw *hw)
903d7ce0 756{
fa0afcd1
CR		 757 struct pci_dev *pdev = hw->adapter->pdev;
758 u32 misc_ctrl;
903d7ce0
HX		 759 int i = 0;
760
761 hw->msi_lnkpatch = false;
762
763 while (plats[i].pci_did != 0) {
764 if (plats[i].pci_did == hw->device_id &&
765 plats[i].pci_revid == hw->revision_id &&
766 plats[i].subsystem_vid == hw->subsystem_vendor_id &&
767 plats[i].subsystem_did == hw->subsystem_id) {
768 if (plats[i].patch_flag & ATL1C_LINK_PATCH)
769 hw->msi_lnkpatch = true;
770 }
771 i++;
772 }
fa0afcd1
CR		 773
774 if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 &&
775 hw->revision_id == L2CB_V21) {
dbedd44e 776 /* config access mode */
fa0afcd1
CR		 777 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
778 REG_PCIE_DEV_MISC_CTRL);
779 pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl);
780 misc_ctrl &= ~0x100;
781 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
782 REG_PCIE_DEV_MISC_CTRL);
783 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl);
784 }
903d7ce0 785}
49ce9c2c 786/**
43250ddd
JY		 787 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
788 * @adapter: board private structure to initialize
789 *
790 * atl1c_sw_init initializes the Adapter private data structure.
791 * Fields are initialized based on PCI device information and
792 * OS network device settings (MTU size).
793 */
093d369d 794static int atl1c_sw_init(struct atl1c_adapter *adapter)
43250ddd
JY		 795{
796 struct atl1c_hw *hw = &adapter->hw;
797 struct pci_dev *pdev = adapter->pdev;
8f574b35 798 u32 revision;
057f4af2 799 int i;
43250ddd
JY		 800
801 adapter->wol = 0;
762e3023 802 device_set_wakeup_enable(&pdev->dev, false);
43250ddd
JY		 803 adapter->link_speed = SPEED_0;
804 adapter->link_duplex = FULL_DUPLEX;
43250ddd 805 adapter->tpd_ring[0].count = 1024;
8042824a 806 adapter->rfd_ring[0].count = 512;
43250ddd
JY		 807
808 hw->vendor_id = pdev->vendor;
809 hw->device_id = pdev->device;
810 hw->subsystem_vendor_id = pdev->subsystem_vendor;
811 hw->subsystem_id = pdev->subsystem_device;
fa0afcd1 812 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision);
8f574b35 813 hw->revision_id = revision & 0xFF;
43250ddd
JY		 814 /* before link up, we assume hibernate is true */
815 hw->hibernate = true;
816 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
817 if (atl1c_setup_mac_funcs(hw) != 0) {
818 dev_err(&pdev->dev, "set mac function pointers failed\n");
819 return -1;
820 }
903d7ce0
HX		 821 atl1c_patch_assign(hw);
822
43250ddd 823 hw->intr_mask = IMR_NORMAL_MASK;
057f4af2
GP		 824 for (i = 0; i < adapter->tx_queue_count; ++i)
825 hw->intr_mask |= atl1c_qregs[i].tx_isr;
826 for (i = 0; i < adapter->rx_queue_count; ++i)
827 hw->intr_mask |= atl1c_qregs[i].rx_isr;
43250ddd
JY		 828 hw->phy_configured = false;
829 hw->preamble_len = 7;
830 hw->max_frame_size = adapter->netdev->mtu;
43250ddd
JY		 831 hw->autoneg_advertised = ADVERTISED_Autoneg;
832 hw->indirect_tab = 0xE4E4E4E4;
833 hw->base_cpu = 0;
834
835 hw->ict = 50000; /* 100ms */
836 hw->smb_timer = 200000; /* 400ms */
43250ddd
JY		 837 hw->rx_imt = 200;
838 hw->tx_imt = 1000;
839
840 hw->tpd_burst = 5;
841 hw->rfd_burst = 8;
842 hw->dma_order = atl1c_dma_ord_out;
843 hw->dmar_block = atl1c_dma_req_1024;
43250ddd
JY		 844
845 if (atl1c_alloc_queues(adapter)) {
846 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
847 return -ENOMEM;
848 }
849 /* TODO */
850 atl1c_set_rxbufsize(adapter, adapter->netdev);
851 atomic_set(&adapter->irq_sem, 1);
852 spin_lock_init(&adapter->mdio_lock);
a1150a04 853 spin_lock_init(&adapter->hw.intr_mask_lock);
43250ddd
JY		 854 set_bit(__AT_DOWN, &adapter->flags);
855
856 return 0;
857}
858
c6060be4 859static inline void atl1c_clean_buffer(struct pci_dev *pdev,
07641c8f 860 struct atl1c_buffer *buffer_info)
c6060be4 861{
4b45e342 862 u16 pci_driection;
c6060be4
JY		 863 if (buffer_info->flags & ATL1C_BUFFER_FREE)
864 return;
865 if (buffer_info->dma) {
4b45e342 866 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
85eb5bc3 867 pci_driection = DMA_FROM_DEVICE;
4b45e342 868 else
85eb5bc3 869 pci_driection = DMA_TO_DEVICE;
4b45e342 870
c6060be4 871 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
85eb5bc3
CJ		 872 dma_unmap_single(&pdev->dev, buffer_info->dma,
873 buffer_info->length, pci_driection);
c6060be4 874 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
85eb5bc3
CJ		 875 dma_unmap_page(&pdev->dev, buffer_info->dma,
876 buffer_info->length, pci_driection);
c6060be4 877 }
07641c8f
EB		 878 if (buffer_info->skb)
879 dev_consume_skb_any(buffer_info->skb);
c6060be4
JY		 880 buffer_info->dma = 0;
881 buffer_info->skb = NULL;
882 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
883}
49ce9c2c 884/**
43250ddd
JY		 885 * atl1c_clean_tx_ring - Free Tx-skb
886 * @adapter: board private structure
057f4af2 887 * @queue: idx of transmit queue
43250ddd
JY		 888 */
889static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
057f4af2 890 u32 queue)
43250ddd 891{
057f4af2 892 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue];
43250ddd
JY		 893 struct atl1c_buffer *buffer_info;
894 struct pci_dev *pdev = adapter->pdev;
895 u16 index, ring_count;
896
897 ring_count = tpd_ring->count;
898 for (index = 0; index < ring_count; index++) {
899 buffer_info = &tpd_ring->buffer_info[index];
07641c8f 900 atl1c_clean_buffer(pdev, buffer_info);
43250ddd
JY		 901 }
902
47b344b2
RA		 903 netdev_reset_queue(adapter->netdev);
904
43250ddd
JY		 905 /* Zero out Tx-buffers */
906 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
c6060be4 907 ring_count);
43250ddd
JY		 908 atomic_set(&tpd_ring->next_to_clean, 0);
909 tpd_ring->next_to_use = 0;
910}
911
49ce9c2c 912/**
43250ddd
JY		 913 * atl1c_clean_rx_ring - Free rx-reservation skbs
914 * @adapter: board private structure
057f4af2 915 * @queue: idx of transmit queue
43250ddd 916 */
057f4af2 917static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter, u32 queue)
43250ddd 918{
057f4af2
GP		 919 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[queue];
920 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[queue];
43250ddd
JY		 921 struct atl1c_buffer *buffer_info;
922 struct pci_dev *pdev = adapter->pdev;
9f1fd0ef 923 int j;
43250ddd 924
9f1fd0ef
HX		 925 for (j = 0; j < rfd_ring->count; j++) {
926 buffer_info = &rfd_ring->buffer_info[j];
07641c8f 927 atl1c_clean_buffer(pdev, buffer_info);
43250ddd 928 }
9f1fd0ef
HX		 929 /* zero out the descriptor ring */
930 memset(rfd_ring->desc, 0, rfd_ring->size);
931 rfd_ring->next_to_clean = 0;
932 rfd_ring->next_to_use = 0;
933 rrd_ring->next_to_use = 0;
934 rrd_ring->next_to_clean = 0;
43250ddd
JY		 935}
936
937/*
938 * Read / Write Ptr Initialize:
939 */
940static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
941{
942 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
8042824a
GP		 943 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
944 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
43250ddd
JY		 945 struct atl1c_buffer *buffer_info;
946 int i, j;
947
057f4af2 948 for (i = 0; i < adapter->tx_queue_count; i++) {
43250ddd
JY		 949 tpd_ring[i].next_to_use = 0;
950 atomic_set(&tpd_ring[i].next_to_clean, 0);
951 buffer_info = tpd_ring[i].buffer_info;
952 for (j = 0; j < tpd_ring->count; j++)
c6060be4 953 ATL1C_SET_BUFFER_STATE(&buffer_info[i],
057f4af2
GP		 954 ATL1C_BUFFER_FREE);
955 }
956 for (i = 0; i < adapter->rx_queue_count; i++) {
957 rfd_ring[i].next_to_use = 0;
958 rfd_ring[i].next_to_clean = 0;
959 rrd_ring[i].next_to_use = 0;
960 rrd_ring[i].next_to_clean = 0;
961 for (j = 0; j < rfd_ring[i].count; j++) {
962 buffer_info = &rfd_ring[i].buffer_info[j];
963 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
964 }
43250ddd
JY		 965 }
966}
967
49ce9c2c 968/**
43250ddd
JY		 969 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
970 * @adapter: board private structure
971 *
972 * Free all transmit software resources
973 */
974static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
975{
976 struct pci_dev *pdev = adapter->pdev;
057f4af2 977 int i;
43250ddd 978
85eb5bc3
CJ		 979 dma_free_coherent(&pdev->dev, adapter->ring_header.size,
980 adapter->ring_header.desc, adapter->ring_header.dma);
43250ddd
JY		 981 adapter->ring_header.desc = NULL;
982
983 /* Note: just free tdp_ring.buffer_info,
057f4af2
GP		 984 * it contain rfd_ring.buffer_info, do not double free
985 */
43250ddd
JY		 986 if (adapter->tpd_ring[0].buffer_info) {
987 kfree(adapter->tpd_ring[0].buffer_info);
988 adapter->tpd_ring[0].buffer_info = NULL;
989 }
057f4af2
GP		 990 for (i = 0; i < adapter->rx_queue_count; ++i) {
991 if (adapter->rrd_ring[i].rx_page) {
992 put_page(adapter->rrd_ring[i].rx_page);
993 adapter->rrd_ring[i].rx_page = NULL;
994 }
7b701764 995 }
43250ddd
JY		 996}
997
49ce9c2c 998/**
8965c1c5 999 * atl1c_setup_ring_resources - allocate Tx / RX descriptor resources
43250ddd
JY		 1000 * @adapter: board private structure
1001 *
1002 * Return 0 on success, negative on failure
1003 */
1004static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
1005{
1006 struct pci_dev *pdev = adapter->pdev;
1007 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
8042824a
GP		 1008 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
1009 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
43250ddd 1010 struct atl1c_ring_header *ring_header = &adapter->ring_header;
057f4af2
GP		 1011 int tqc = adapter->tx_queue_count;
1012 int rqc = adapter->rx_queue_count;
43250ddd
JY		 1013 int size;
1014 int i;
1015 int count = 0;
43250ddd
JY		 1016 u32 offset = 0;
1017
057f4af2
GP		 1018 /* Even though only one tpd queue is actually used, the "high"
1019 * priority tpd queue also gets initialized
1020 */
1021 if (tqc == 1)
1022 tqc = 2;
1023
1024 for (i = 1; i < tqc; i++)
43250ddd
JY		 1025 tpd_ring[i].count = tpd_ring[0].count;
1026
057f4af2
GP		 1027 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * tqc +
1028 rfd_ring->count * rqc);
43250ddd 1029 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
b2adaca9 1030 if (unlikely(!tpd_ring->buffer_info))
43250ddd 1031 goto err_nomem;
b2adaca9 1032
057f4af2 1033 for (i = 0; i < tqc; i++) {
20a1b6bd
GP		 1034 tpd_ring[i].adapter = adapter;
1035 tpd_ring[i].num = i;
057f4af2 1036 tpd_ring[i].buffer_info = (tpd_ring->buffer_info + count);
43250ddd
JY		 1037 count += tpd_ring[i].count;
1038 }
1039
057f4af2
GP		 1040 for (i = 0; i < rqc; i++) {
1041 rrd_ring[i].adapter = adapter;
1042 rrd_ring[i].num = i;
1043 rrd_ring[i].count = rfd_ring[0].count;
1044 rfd_ring[i].count = rfd_ring[0].count;
1045 rfd_ring[i].buffer_info = (tpd_ring->buffer_info + count);
1046 count += rfd_ring->count;
1047 }
9f1fd0ef 1048
43250ddd
JY		 1049 /*
1050 * real ring DMA buffer
1051 * each ring/block may need up to 8 bytes for alignment, hence the
1052 * additional bytes tacked onto the end.
1053 */
1054 ring_header->size = size =
057f4af2
GP		 1055 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * tqc +
1056 sizeof(struct atl1c_rx_free_desc) * rfd_ring->count * rqc +
1057 sizeof(struct atl1c_recv_ret_status) * rfd_ring->count * rqc +
8d5c6836 1058 8 * 4;
43250ddd 1059
750afb08
LC		 1060 ring_header->desc = dma_alloc_coherent(&pdev->dev, ring_header->size,
1061 &ring_header->dma, GFP_KERNEL);
43250ddd 1062 if (unlikely(!ring_header->desc)) {
f2a3771a 1063 dev_err(&pdev->dev, "could not get memory for DMA buffer\n");
43250ddd
JY		 1064 goto err_nomem;
1065 }
43250ddd
JY		 1066 /* init TPD ring */
1067
1068 tpd_ring[0].dma = roundup(ring_header->dma, 8);
1069 offset = tpd_ring[0].dma - ring_header->dma;
057f4af2 1070 for (i = 0; i < tqc; i++) {
43250ddd 1071 tpd_ring[i].dma = ring_header->dma + offset;
057f4af2 1072 tpd_ring[i].desc = (u8 *)ring_header->desc + offset;
43250ddd
JY		 1073 tpd_ring[i].size =
1074 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
1075 offset += roundup(tpd_ring[i].size, 8);
1076 }
057f4af2
GP		 1077 for (i = 0; i < rqc; i++) {
1078 /* init RFD ring */
1079 rfd_ring[i].dma = ring_header->dma + offset;
1080 rfd_ring[i].desc = (u8 *)ring_header->desc + offset;
1081 rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
1082 rfd_ring[i].count;
1083 offset += roundup(rfd_ring[i].size, 8);
1084
1085 /* init RRD ring */
1086 rrd_ring[i].dma = ring_header->dma + offset;
1087 rrd_ring[i].desc = (u8 *)ring_header->desc + offset;
1088 rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
1089 rrd_ring[i].count;
1090 offset += roundup(rrd_ring[i].size, 8);
1091 }
43250ddd 1092
43250ddd
JY		 1093 return 0;
1094
1095err_nomem:
1096 kfree(tpd_ring->buffer_info);
1097 return -ENOMEM;
1098}
1099
1100static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
1101{
1102 struct atl1c_hw *hw = &adapter->hw;
8042824a
GP		 1103 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
1104 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
1105 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
057f4af2
GP		 1106 int i;
1107 int tx_queue_count = adapter->tx_queue_count;
1108
1109 if (tx_queue_count == 1)
1110 tx_queue_count = 2;
43250ddd
JY		 1111
1112 /* TPD */
1113 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
057f4af2 1114 (u32)((tpd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
43250ddd 1115 /* just enable normal priority TX queue */
057f4af2
GP		 1116 for (i = 0; i < tx_queue_count; i++) {
1117 AT_WRITE_REG(hw, atl1c_qregs[i].tpd_addr_lo,
1118 (u32)(tpd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1119 }
43250ddd
JY		 1120 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
1121 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
1122
1123
1124 /* RFD */
1125 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
057f4af2
GP		 1126 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1127 for (i = 0; i < adapter->rx_queue_count; i++) {
1128 AT_WRITE_REG(hw, atl1c_qregs[i].rfd_addr_lo,
1129 (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1130 }
43250ddd
JY		 1131
1132 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
9f1fd0ef 1133 rfd_ring->count & RFD_RING_SIZE_MASK);
43250ddd
JY		 1134 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1135 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1136
1137 /* RRD */
057f4af2
GP		 1138 for (i = 0; i < adapter->rx_queue_count; i++) {
1139 AT_WRITE_REG(hw, atl1c_qregs[i].rrd_addr_lo,
1140 (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1141 }
43250ddd 1142 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
9f1fd0ef 1143 (rrd_ring->count & RRD_RING_SIZE_MASK));
43250ddd 1144
8f574b35
JY		 1145 if (hw->nic_type == athr_l2c_b) {
1146 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
1147 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
1148 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
1149 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
1150 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
1151 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
1152 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
1153 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
1154 }
43250ddd
JY		 1155 /* Load all of base address above */
1156 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1157}
1158
1159static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1160{
1161 struct atl1c_hw *hw = &adapter->hw;
59e26eff 1162 int max_pay_load;
43250ddd
JY		 1163 u16 tx_offload_thresh;
1164 u32 txq_ctrl_data;
43250ddd 1165
c08b9b2a 1166 tx_offload_thresh = MAX_TSO_FRAME_SIZE;
43250ddd
JY		 1167 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1168 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
59e26eff 1169 max_pay_load = pcie_get_readrq(adapter->pdev) >> 8;
81b504b8 1170 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
59e26eff
HX		 1171 /*
1172 * if BIOS had changed the dam-read-max-length to an invalid value,
1173 * restore it to default value
1174 */
1175 if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) {
1176 pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN);
1177 hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN;
1178 }
c24588af
HX		 1179 txq_ctrl_data =
1180 hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ?
1181 L2CB_TXQ_CFGV : L1C_TXQ_CFGV;
43250ddd
JY		 1182
1183 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1184}
1185
1186static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1187{
1188 struct atl1c_hw *hw = &adapter->hw;
1189 u32 rxq_ctrl_data;
1190
1191 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1192 RXQ_RFD_BURST_NUM_SHIFT;
1193
1194 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1195 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
9f1fd0ef 1196
9c528218
HX		 1197 /* aspm for gigabit */
1198 if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0)
1199 rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT,
1200 ASPM_THRUPUT_LIMIT_100M);
43250ddd
JY		 1201
1202 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1203}
1204
43250ddd
JY		 1205static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1206{
1207 struct atl1c_hw *hw = &adapter->hw;
1208 u32 dma_ctrl_data;
1209
37bfccb5
HX		 1210 dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) |
1211 DMA_CTRL_RREQ_PRI_DATA |
1212 FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) |
1213 FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) |
1214 FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF);
43250ddd
JY		 1215
1216 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1217}
1218
1219/*
1220 * Stop the mac, transmit and receive units
1221 * hw - Struct containing variables accessed by shared code
1222 * return : 0 or idle status (if error)
1223 */
1224static int atl1c_stop_mac(struct atl1c_hw *hw)
1225{
1226 u32 data;
43250ddd
JY		 1227
1228 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
027392c2 1229 data &= ~RXQ_CTRL_EN;
43250ddd
JY		 1230 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1231
1232 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1233 data &= ~TXQ_CTRL_EN;
0cbec61c 1234 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
43250ddd 1235
969a7ee2 1236 atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY);
43250ddd
JY		 1237
1238 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1239 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1240 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1241
969a7ee2
HX		 1242 return (int)atl1c_wait_until_idle(hw,
1243 IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY);
43250ddd
JY		 1244}
1245
25456e5c 1246static void atl1c_start_mac(struct atl1c_adapter *adapter)
43250ddd 1247{
25456e5c
HX		 1248 struct atl1c_hw *hw = &adapter->hw;
1249 u32 mac, txq, rxq;
1250
e8cc063d 1251 hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX;
25456e5c
HX		 1252 hw->mac_speed = adapter->link_speed == SPEED_1000 ?
1253 atl1c_mac_speed_1000 : atl1c_mac_speed_10_100;
1254
1255 AT_READ_REG(hw, REG_TXQ_CTRL, &txq);
1256 AT_READ_REG(hw, REG_RXQ_CTRL, &rxq);
1257 AT_READ_REG(hw, REG_MAC_CTRL, &mac);
1258
1259 txq |= TXQ_CTRL_EN;
1260 rxq |= RXQ_CTRL_EN;
1261 mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW |
1262 MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW |
1263 MAC_CTRL_ADD_CRC | MAC_CTRL_PAD |
1264 MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN |
1265 MAC_CTRL_HASH_ALG_CRC32;
1266 if (hw->mac_duplex)
1267 mac |= MAC_CTRL_DUPLX;
1268 else
1269 mac &= ~MAC_CTRL_DUPLX;
1270 mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed);
1271 mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len);
43250ddd 1272
25456e5c
HX		 1273 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq);
1274 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq);
1275 AT_WRITE_REG(hw, REG_MAC_CTRL, mac);
43250ddd
JY		 1276}
1277
1278/*
1279 * Reset the transmit and receive units; mask and clear all interrupts.
1280 * hw - Struct containing variables accessed by shared code
1281 * return : 0 or idle status (if error)
1282 */
1283static int atl1c_reset_mac(struct atl1c_hw *hw)
1284{
64699336 1285 struct atl1c_adapter *adapter = hw->adapter;
43250ddd 1286 struct pci_dev *pdev = adapter->pdev;
7737fd96 1287 u32 ctrl_data = 0;
43250ddd 1288
8f574b35 1289 atl1c_stop_mac(hw);
43250ddd
JY		 1290 /*
1291 * Issue Soft Reset to the MAC. This will reset the chip's
1292 * transmit, receive, DMA. It will not effect
1293 * the current PCI configuration. The global reset bit is self-
1294 * clearing, and should clear within a microsecond.
1295 */
7737fd96
HX		 1296 AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data);
1297 ctrl_data |= MASTER_CTRL_OOB_DIS;
1298 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST);
8f574b35 1299
43250ddd
JY		 1300 AT_WRITE_FLUSH(hw);
1301 msleep(10);
1302 /* Wait at least 10ms for All module to be Idle */
c930a662 1303
969a7ee2 1304 if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) {
43250ddd 1305 dev_err(&pdev->dev,
c930a662 1306 "MAC state machine can't be idle since"
43250ddd
JY		 1307 " disabled for 10ms second\n");
1308 return -1;
1309 }
7737fd96
HX		 1310 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data);
1311
1312 /* driver control speed/duplex */
1313 AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data);
1314 AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW);
1315
1316 /* clk switch setting */
1317 AT_READ_REG(hw, REG_SERDES, &ctrl_data);
1318 switch (hw->nic_type) {
1319 case athr_l2c_b:
1320 ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN |
1321 SERDES_MAC_CLK_SLOWDOWN);
1322 AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
1323 break;
1324 case athr_l2c_b2:
1325 case athr_l1d_2:
1326 ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN;
1327 AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
1328 break;
1329 default:
1330 break;
1331 }
ebe22ed9 1332
43250ddd
JY		 1333 return 0;
1334}
1335
1336static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1337{
024e1e4d 1338 u16 ctrl_flags = hw->ctrl_flags;
43250ddd 1339
024e1e4d
HX		 1340 hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT);
1341 atl1c_set_aspm(hw, SPEED_0);
1342 hw->ctrl_flags = ctrl_flags;
43250ddd
JY		 1343}
1344
1345/*
1346 * Set ASPM state.
1347 * Enable/disable L0s/L1 depend on link state.
1348 */
024e1e4d 1349static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed)
43250ddd
JY		 1350{
1351 u32 pm_ctrl_data;
024e1e4d 1352 u32 link_l1_timer;
43250ddd
JY		 1353
1354 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
024e1e4d
HX		 1355 pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN |
1356 PM_CTRL_ASPM_L0S_EN |
1357 PM_CTRL_MAC_ASPM_CHK);
1358 /* L1 timer */
1359 if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1360 pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S;
1361 link_l1_timer =
1362 link_speed == SPEED_1000 || link_speed == SPEED_100 ?
1363 L1D_PMCTRL_L1_ENTRY_TM_16US : 1;
1364 pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1365 L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer);
1366 } else {
1367 link_l1_timer = hw->nic_type == athr_l2c_b ?
1368 L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM;
1369 if (link_speed != SPEED_1000 && link_speed != SPEED_100)
1370 link_l1_timer = 1;
1371 pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1372 PM_CTRL_L1_ENTRY_TIMER, link_l1_timer);
1373 }
496c185c 1374
024e1e4d 1375 /* L0S/L1 enable */
4fc36352 1376 if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0)
024e1e4d
HX		 1377 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK;
1378 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1379 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK;
496c185c 1380
024e1e4d 1381 /* l2cb & l1d & l2cb2 & l1d2 */
8f574b35 1382 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
024e1e4d
HX		 1383 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1384 pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1385 PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF);
1386 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER |
1387 PM_CTRL_SERDES_PD_EX_L1 |
1388 PM_CTRL_CLK_SWH_L1;
1389 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
1390 PM_CTRL_SERDES_PLL_L1_EN |
1391 PM_CTRL_SERDES_BUFS_RX_L1_EN |
1392 PM_CTRL_SA_DLY_EN |
1393 PM_CTRL_HOTRST);
1394 /* disable l0s if link down or l2cb */
1395 if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b)
496c185c 1396 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
024e1e4d
HX		 1397 } else { /* l1c */
1398 pm_ctrl_data =
1399 FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0);
1400 if (link_speed != SPEED_0) {
1401 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN |
1402 PM_CTRL_SERDES_PLL_L1_EN |
1403 PM_CTRL_SERDES_BUFS_RX_L1_EN;
1404 pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 |
1405 PM_CTRL_CLK_SWH_L1 |
1406 PM_CTRL_ASPM_L0S_EN |
1407 PM_CTRL_ASPM_L1_EN);
1408 } else { /* link down */
1409 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1410 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
1411 PM_CTRL_SERDES_PLL_L1_EN |
1412 PM_CTRL_SERDES_BUFS_RX_L1_EN |
1413 PM_CTRL_ASPM_L0S_EN);
8f574b35 1414 }
43250ddd 1415 }
43250ddd 1416 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
8f574b35
JY		 1417
1418 return;
43250ddd
JY		 1419}
1420
49ce9c2c 1421/**
8965c1c5 1422 * atl1c_configure_mac - Configure Transmit&Receive Unit after Reset
43250ddd
JY		 1423 * @adapter: board private structure
1424 *
1425 * Configure the Tx /Rx unit of the MAC after a reset.
1426 */
5e5c0964 1427static int atl1c_configure_mac(struct atl1c_adapter *adapter)
43250ddd
JY		 1428{
1429 struct atl1c_hw *hw = &adapter->hw;
1430 u32 master_ctrl_data = 0;
1431 u32 intr_modrt_data;
8f574b35 1432 u32 data;
43250ddd 1433
ebe22ed9
HX		 1434 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
1435 master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN |
1436 MASTER_CTRL_RX_ITIMER_EN |
1437 MASTER_CTRL_INT_RDCLR);
43250ddd
JY		 1438 /* clear interrupt status */
1439 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1440 /* Clear any WOL status */
1441 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1442 /* set Interrupt Clear Timer
1443 * HW will enable self to assert interrupt event to system after
1444 * waiting x-time for software to notify it accept interrupt.
1445 */
8f574b35
JY		 1446
1447 data = CLK_GATING_EN_ALL;
1448 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
1449 if (hw->nic_type == athr_l2c_b)
1450 data &= ~CLK_GATING_RXMAC_EN;
1451 } else
1452 data = 0;
1453 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
1454
43250ddd
JY		 1455 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1456 hw->ict & INT_RETRIG_TIMER_MASK);
1457
1458 atl1c_configure_des_ring(adapter);
1459
1460 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1461 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1462 IRQ_MODRT_TX_TIMER_SHIFT;
1463 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1464 IRQ_MODRT_RX_TIMER_SHIFT;
1465 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1466 master_ctrl_data |=
1467 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1468 }
1469
1470 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1471 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1472
8f574b35 1473 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
43250ddd
JY		 1474 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1475
8d5c6836
HX		 1476 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1477 hw->smb_timer & SMB_STAT_TIMER_MASK);
43250ddd 1478
43250ddd
JY		 1479 /* set MTU */
1480 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1481 VLAN_HLEN + ETH_FCS_LEN);
43250ddd
JY		 1482
1483 atl1c_configure_tx(adapter);
1484 atl1c_configure_rx(adapter);
43250ddd
JY		 1485 atl1c_configure_dma(adapter);
1486
1487 return 0;
1488}
1489
5e5c0964
HX		 1490static int atl1c_configure(struct atl1c_adapter *adapter)
1491{
1492 struct net_device *netdev = adapter->netdev;
1493 int num;
057f4af2
GP		 1494 int i;
1495
1496 if (adapter->hw.nic_type == athr_mt) {
1497 u32 mode;
1498
1499 AT_READ_REG(&adapter->hw, REG_MT_MODE, &mode);
1500 if (adapter->rx_queue_count == 4)
1501 mode |= MT_MODE_4Q;
1502 else
1503 mode &= ~MT_MODE_4Q;
1504 AT_WRITE_REG(&adapter->hw, REG_MT_MODE, mode);
1505 }
5e5c0964
HX		 1506
1507 atl1c_init_ring_ptrs(adapter);
1508 atl1c_set_multi(netdev);
1509 atl1c_restore_vlan(adapter);
1510
057f4af2
GP		 1511 for (i = 0; i < adapter->rx_queue_count; ++i) {
1512 num = atl1c_alloc_rx_buffer(adapter, i, false);
1513 if (unlikely(num == 0))
1514 return -ENOMEM;
1515 }
5e5c0964
HX		 1516
1517 if (atl1c_configure_mac(adapter))
1518 return -EIO;
1519
1520 return 0;
1521}
1522
43250ddd
JY		 1523static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1524{
1525 u16 hw_reg_addr = 0;
1526 unsigned long *stats_item = NULL;
1527 u32 data;
1528
1529 /* update rx status */
1530 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1531 stats_item = &adapter->hw_stats.rx_ok;
1532 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1533 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1534 *stats_item += data;
1535 stats_item++;
1536 hw_reg_addr += 4;
1537 }
1538/* update tx status */
1539 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1540 stats_item = &adapter->hw_stats.tx_ok;
1541 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1542 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1543 *stats_item += data;
1544 stats_item++;
1545 hw_reg_addr += 4;
1546 }
1547}
1548
49ce9c2c 1549/**
43250ddd
JY		 1550 * atl1c_get_stats - Get System Network Statistics
1551 * @netdev: network interface device structure
1552 *
1553 * Returns the address of the device statistics structure.
1554 * The statistics are actually updated from the timer callback.
1555 */
1556static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1557{
1558 struct atl1c_adapter *adapter = netdev_priv(netdev);
1559 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
a2c483a1 1560 struct net_device_stats *net_stats = &netdev->stats;
43250ddd
JY		 1561
1562 atl1c_update_hw_stats(adapter);
43250ddd
JY		 1563 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1564 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1565 net_stats->multicast = hw_stats->rx_mcast;
1566 net_stats->collisions = hw_stats->tx_1_col +
8560258f
SD		 1567 hw_stats->tx_2_col +
1568 hw_stats->tx_late_col +
1569 hw_stats->tx_abort_col;
1570
1571 net_stats->rx_errors = hw_stats->rx_frag +
1572 hw_stats->rx_fcs_err +
1573 hw_stats->rx_len_err +
1574 hw_stats->rx_sz_ov +
1575 hw_stats->rx_rrd_ov +
1576 hw_stats->rx_align_err +
1577 hw_stats->rx_rxf_ov;
1578
43250ddd
JY		 1579 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1580 net_stats->rx_length_errors = hw_stats->rx_len_err;
1581 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1582 net_stats->rx_frame_errors = hw_stats->rx_align_err;
8560258f 1583 net_stats->rx_dropped = hw_stats->rx_rrd_ov;
43250ddd 1584
8560258f
SD		 1585 net_stats->tx_errors = hw_stats->tx_late_col +
1586 hw_stats->tx_abort_col +
1587 hw_stats->tx_underrun +
1588 hw_stats->tx_trunc;
43250ddd 1589
43250ddd
JY		 1590 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1591 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1592 net_stats->tx_window_errors = hw_stats->tx_late_col;
1593
8560258f
SD		 1594 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors;
1595 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors;
1596
a2c483a1 1597 return net_stats;
43250ddd
JY		 1598}
1599
1600static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1601{
1602 u16 phy_data;
1603
1604 spin_lock(&adapter->mdio_lock);
1605 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1606 spin_unlock(&adapter->mdio_lock);
1607}
1608
a1150a04 1609static int atl1c_clean_tx(struct napi_struct *napi, int budget)
43250ddd 1610{
20a1b6bd
GP		 1611 struct atl1c_tpd_ring *tpd_ring =
1612 container_of(napi, struct atl1c_tpd_ring, napi);
1613 struct atl1c_adapter *adapter = tpd_ring->adapter;
057f4af2
GP		 1614 struct netdev_queue *txq =
1615 netdev_get_tx_queue(napi->dev, tpd_ring->num);
43250ddd 1616 struct atl1c_buffer *buffer_info;
c6060be4 1617 struct pci_dev *pdev = adapter->pdev;
43250ddd
JY		 1618 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1619 u16 hw_next_to_clean;
47b344b2 1620 unsigned int total_bytes = 0, total_packets = 0;
a1150a04 1621 unsigned long flags;
43250ddd 1622
057f4af2
GP		 1623 AT_READ_REGW(&adapter->hw, atl1c_qregs[tpd_ring->num].tpd_cons,
1624 &hw_next_to_clean);
43250ddd
JY		 1625
1626 while (next_to_clean != hw_next_to_clean) {
1627 buffer_info = &tpd_ring->buffer_info[next_to_clean];
47b344b2
RA		 1628 if (buffer_info->skb) {
1629 total_bytes += buffer_info->skb->len;
1630 total_packets++;
1631 }
07641c8f 1632 atl1c_clean_buffer(pdev, buffer_info);
43250ddd
JY		 1633 if (++next_to_clean == tpd_ring->count)
1634 next_to_clean = 0;
1635 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1636 }
1637
057f4af2 1638 netdev_tx_completed_queue(txq, total_packets, total_bytes);
47b344b2 1639
057f4af2
GP		 1640 if (netif_tx_queue_stopped(txq) && netif_carrier_ok(adapter->netdev))
1641 netif_tx_wake_queue(txq);
43250ddd 1642
a1150a04
GP		 1643 if (total_packets < budget) {
1644 napi_complete_done(napi, total_packets);
1645 spin_lock_irqsave(&adapter->hw.intr_mask_lock, flags);
057f4af2 1646 adapter->hw.intr_mask |= atl1c_qregs[tpd_ring->num].tx_isr;
a1150a04
GP		 1647 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1648 spin_unlock_irqrestore(&adapter->hw.intr_mask_lock, flags);
1649 return total_packets;
1650 }
1651 return budget;
43250ddd
JY		 1652}
1653
057f4af2
GP		 1654static void atl1c_intr_rx_tx(struct atl1c_adapter *adapter, u32 status)
1655{
1656 struct atl1c_hw *hw = &adapter->hw;
1657 u32 intr_mask;
1658 int i;
1659
1660 spin_lock(&hw->intr_mask_lock);
1661 intr_mask = hw->intr_mask;
1662 for (i = 0; i < adapter->rx_queue_count; ++i) {
1663 if (!(status & atl1c_qregs[i].rx_isr))
1664 continue;
1665 if (napi_schedule_prep(&adapter->rrd_ring[i].napi)) {
1666 intr_mask &= ~atl1c_qregs[i].rx_isr;
1667 __napi_schedule(&adapter->rrd_ring[i].napi);
1668 }
1669 }
1670 for (i = 0; i < adapter->tx_queue_count; ++i) {
1671 if (!(status & atl1c_qregs[i].tx_isr))
1672 continue;
1673 if (napi_schedule_prep(&adapter->tpd_ring[i].napi)) {
1674 intr_mask &= ~atl1c_qregs[i].tx_isr;
1675 __napi_schedule(&adapter->tpd_ring[i].napi);
1676 }
1677 }
1678
1679 if (hw->intr_mask != intr_mask) {
1680 hw->intr_mask = intr_mask;
1681 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1682 }
1683 spin_unlock(&hw->intr_mask_lock);
1684}
1685
49ce9c2c 1686/**
43250ddd
JY		 1687 * atl1c_intr - Interrupt Handler
1688 * @irq: interrupt number
1689 * @data: pointer to a network interface device structure
43250ddd
JY		 1690 */
1691static irqreturn_t atl1c_intr(int irq, void *data)
1692{
1693 struct net_device *netdev = data;
1694 struct atl1c_adapter *adapter = netdev_priv(netdev);
1695 struct pci_dev *pdev = adapter->pdev;
1696 struct atl1c_hw *hw = &adapter->hw;
1697 int max_ints = AT_MAX_INT_WORK;
1698 int handled = IRQ_NONE;
1699 u32 status;
1700 u32 reg_data;
1701
1702 do {
1703 AT_READ_REG(hw, REG_ISR, &reg_data);
1704 status = reg_data & hw->intr_mask;
1705
1706 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1707 if (max_ints != AT_MAX_INT_WORK)
1708 handled = IRQ_HANDLED;
1709 break;
1710 }
1711 /* link event */
1712 if (status & ISR_GPHY)
1713 atl1c_clear_phy_int(adapter);
1714 /* Ack ISR */
1715 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
057f4af2
GP		 1716 if (status & (ISR_RX_PKT | ISR_TX_PKT))
1717 atl1c_intr_rx_tx(adapter, status);
43250ddd
JY		 1718
1719 handled = IRQ_HANDLED;
1720 /* check if PCIE PHY Link down */
1721 if (status & ISR_ERROR) {
1722 if (netif_msg_hw(adapter))
1723 dev_err(&pdev->dev,
1724 "atl1c hardware error (status = 0x%x)\n",
1725 status & ISR_ERROR);
1726 /* reset MAC */
78315457 1727 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
cb190546 1728 schedule_work(&adapter->common_task);
8f574b35 1729 return IRQ_HANDLED;
43250ddd
JY		 1730 }
1731
1732 if (status & ISR_OVER)
1733 if (netif_msg_intr(adapter))
1734 dev_warn(&pdev->dev,
af901ca1 1735 "TX/RX overflow (status = 0x%x)\n",
43250ddd
JY		 1736 status & ISR_OVER);
1737
1738 /* link event */
1739 if (status & (ISR_GPHY | ISR_MANUAL)) {
a2c483a1 1740 netdev->stats.tx_carrier_errors++;
43250ddd
JY		 1741 atl1c_link_chg_event(adapter);
1742 break;
1743 }
1744
1745 } while (--max_ints > 0);
1746 /* re-enable Interrupt*/
1747 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1748 return handled;
1749}
1750
1751static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1752 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1753{
b0390009
GP		 1754 if (adapter->hw.nic_type == athr_mt) {
1755 if (prrs->word3 & RRS_MT_PROT_ID_TCPUDP)
1756 skb->ip_summed = CHECKSUM_UNNECESSARY;
1757 return;
1758 }
43250ddd
JY		 1759 /*
1760 * The pid field in RRS in not correct sometimes, so we
1761 * cannot figure out if the packet is fragmented or not,
1762 * so we tell the KERNEL CHECKSUM_NONE
1763 */
bc8acf2c 1764 skb_checksum_none_assert(skb);
43250ddd
JY		 1765}
1766
a9d6df64 1767static struct sk_buff *atl1c_alloc_skb(struct atl1c_adapter *adapter,
057f4af2 1768 u32 queue, bool napi_mode)
7b701764 1769{
057f4af2 1770 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[queue];
7b701764
ED		 1771 struct sk_buff *skb;
1772 struct page *page;
1773
a9d6df64
SPL		 1774 if (adapter->rx_frag_size > PAGE_SIZE) {
1775 if (likely(napi_mode))
8042824a 1776 return napi_alloc_skb(&rrd_ring->napi,
a9d6df64
SPL		 1777 adapter->rx_buffer_len);
1778 else
1779 return netdev_alloc_skb_ip_align(adapter->netdev,
1780 adapter->rx_buffer_len);
1781 }
7b701764 1782
8042824a 1783 page = rrd_ring->rx_page;
7b701764 1784 if (!page) {
8042824a 1785 page = alloc_page(GFP_ATOMIC);
7b701764
ED		 1786 if (unlikely(!page))
1787 return NULL;
8042824a
GP		 1788 rrd_ring->rx_page = page;
1789 rrd_ring->rx_page_offset = 0;
7b701764
ED		 1790 }
1791
8042824a 1792 skb = build_skb(page_address(page) + rrd_ring->rx_page_offset,
7b701764
ED		 1793 adapter->rx_frag_size);
1794 if (likely(skb)) {
a9d6df64 1795 skb_reserve(skb, NET_SKB_PAD + NET_IP_ALIGN);
8042824a
GP		 1796 rrd_ring->rx_page_offset += adapter->rx_frag_size;
1797 if (rrd_ring->rx_page_offset >= PAGE_SIZE)
1798 rrd_ring->rx_page = NULL;
7b701764
ED		 1799 else
1800 get_page(page);
1801 }
1802 return skb;
1803}
1804
057f4af2
GP		 1805static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, u32 queue,
1806 bool napi_mode)
43250ddd 1807{
057f4af2 1808 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[queue];
43250ddd
JY		 1809 struct pci_dev *pdev = adapter->pdev;
1810 struct atl1c_buffer *buffer_info, *next_info;
1811 struct sk_buff *skb;
1812 void *vir_addr = NULL;
1813 u16 num_alloc = 0;
1814 u16 rfd_next_to_use, next_next;
1815 struct atl1c_rx_free_desc *rfd_desc;
ac574804 1816 dma_addr_t mapping;
43250ddd
JY		 1817
1818 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1819 if (++next_next == rfd_ring->count)
1820 next_next = 0;
1821 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1822 next_info = &rfd_ring->buffer_info[next_next];
1823
c6060be4 1824 while (next_info->flags & ATL1C_BUFFER_FREE) {
43250ddd
JY		 1825 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1826
057f4af2 1827 skb = atl1c_alloc_skb(adapter, queue, napi_mode);
43250ddd
JY		 1828 if (unlikely(!skb)) {
1829 if (netif_msg_rx_err(adapter))
1830 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1831 break;
1832 }
1833
1834 /*
1835 * Make buffer alignment 2 beyond a 16 byte boundary
1836 * this will result in a 16 byte aligned IP header after
1837 * the 14 byte MAC header is removed
1838 */
1839 vir_addr = skb->data;
c6060be4 1840 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
43250ddd
JY		 1841 buffer_info->skb = skb;
1842 buffer_info->length = adapter->rx_buffer_len;
85eb5bc3
CJ		 1843 mapping = dma_map_single(&pdev->dev, vir_addr,
1844 buffer_info->length, DMA_FROM_DEVICE);
1845 if (unlikely(dma_mapping_error(&pdev->dev, mapping))) {
ac574804
HX		 1846 dev_kfree_skb(skb);
1847 buffer_info->skb = NULL;
1848 buffer_info->length = 0;
1849 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
8d04c7b9 1850 netif_warn(adapter, rx_err, adapter->netdev, "RX dma_map_single failed");
ac574804
HX		 1851 break;
1852 }
1853 buffer_info->dma = mapping;
4b45e342
JY		 1854 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1855 ATL1C_PCIMAP_FROMDEVICE);
43250ddd
JY		 1856 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1857 rfd_next_to_use = next_next;
1858 if (++next_next == rfd_ring->count)
1859 next_next = 0;
1860 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1861 next_info = &rfd_ring->buffer_info[next_next];
1862 num_alloc++;
1863 }
1864
1865 if (num_alloc) {
1866 /* TODO: update mailbox here */
1867 wmb();
1868 rfd_ring->next_to_use = rfd_next_to_use;
057f4af2
GP		 1869 AT_WRITE_REG(&adapter->hw, atl1c_qregs[queue].rfd_prod,
1870 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
43250ddd
JY		 1871 }
1872
1873 return num_alloc;
1874}
1875
1876static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1877 struct atl1c_recv_ret_status *rrs, u16 num)
1878{
1879 u16 i;
1880 /* the relationship between rrd and rfd is one map one */
1881 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1882 rrd_ring->next_to_clean)) {
1883 rrs->word3 &= ~RRS_RXD_UPDATED;
1884 if (++rrd_ring->next_to_clean == rrd_ring->count)
1885 rrd_ring->next_to_clean = 0;
1886 }
1887}
1888
1889static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1890 struct atl1c_recv_ret_status *rrs, u16 num)
1891{
1892 u16 i;
1893 u16 rfd_index;
1894 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1895
1896 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1897 RRS_RX_RFD_INDEX_MASK;
1898 for (i = 0; i < num; i++) {
1899 buffer_info[rfd_index].skb = NULL;
c6060be4
JY		 1900 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1901 ATL1C_BUFFER_FREE);
43250ddd
JY		 1902 if (++rfd_index == rfd_ring->count)
1903 rfd_index = 0;
1904 }
1905 rfd_ring->next_to_clean = rfd_index;
1906}
1907
8042824a
GP		 1908/**
1909 * atl1c_clean_rx - NAPI Rx polling callback
1910 * @napi: napi info
1911 * @budget: limit of packets to clean
1912 */
1913static int atl1c_clean_rx(struct napi_struct *napi, int budget)
43250ddd 1914{
8042824a
GP		 1915 struct atl1c_rrd_ring *rrd_ring =
1916 container_of(napi, struct atl1c_rrd_ring, napi);
1917 struct atl1c_adapter *adapter = rrd_ring->adapter;
43250ddd 1918 u16 rfd_num, rfd_index;
43250ddd
JY		 1919 u16 length;
1920 struct pci_dev *pdev = adapter->pdev;
1921 struct net_device *netdev = adapter->netdev;
8042824a 1922 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[rrd_ring->num];
43250ddd
JY		 1923 struct sk_buff *skb;
1924 struct atl1c_recv_ret_status *rrs;
1925 struct atl1c_buffer *buffer_info;
8042824a
GP		 1926 int work_done = 0;
1927 unsigned long flags;
1928
1929 /* Keep link state information with original netdev */
1930 if (!netif_carrier_ok(adapter->netdev))
1931 goto quit_polling;
43250ddd
JY		 1932
1933 while (1) {
8042824a 1934 if (work_done >= budget)
43250ddd
JY		 1935 break;
1936 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1937 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1938 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1939 RRS_RX_RFD_CNT_MASK;
37b76c69 1940 if (unlikely(rfd_num != 1))
43250ddd
JY		 1941 /* TODO support mul rfd*/
1942 if (netif_msg_rx_err(adapter))
1943 dev_warn(&pdev->dev,
1944 "Multi rfd not support yet!\n");
1945 goto rrs_checked;
1946 } else {
1947 break;
1948 }
1949rrs_checked:
1950 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1951 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1952 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
7509ef2a
CIK		 1953 if (netif_msg_rx_err(adapter))
1954 dev_warn(&pdev->dev,
1955 "wrong packet! rrs word3 is %x\n",
1956 rrs->word3);
43250ddd
JY		 1957 continue;
1958 }
1959
1960 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1961 RRS_PKT_SIZE_MASK);
1962 /* Good Receive */
1963 if (likely(rfd_num == 1)) {
1964 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1965 RRS_RX_RFD_INDEX_MASK;
1966 buffer_info = &rfd_ring->buffer_info[rfd_index];
85eb5bc3
CJ		 1967 dma_unmap_single(&pdev->dev, buffer_info->dma,
1968 buffer_info->length, DMA_FROM_DEVICE);
43250ddd
JY		 1969 skb = buffer_info->skb;
1970 } else {
1971 /* TODO */
1972 if (netif_msg_rx_err(adapter))
1973 dev_warn(&pdev->dev,
1974 "Multi rfd not support yet!\n");
1975 break;
1976 }
1977 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1978 skb_put(skb, length - ETH_FCS_LEN);
1979 skb->protocol = eth_type_trans(skb, netdev);
43250ddd 1980 atl1c_rx_checksum(adapter, skb, rrs);
46facce9 1981 if (rrs->word3 & RRS_VLAN_INS) {
43250ddd
JY		 1982 u16 vlan;
1983
1984 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1985 vlan = le16_to_cpu(vlan);
86a9bad3 1986 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
46facce9 1987 }
8042824a 1988 napi_gro_receive(napi, skb);
43250ddd 1989
8042824a 1990 work_done++;
43250ddd 1991 }
057f4af2
GP		 1992 if (work_done)
1993 atl1c_alloc_rx_buffer(adapter, rrd_ring->num, true);
43250ddd
JY		 1994
1995 if (work_done < budget) {
1996quit_polling:
6ad20165 1997 napi_complete_done(napi, work_done);
a1150a04 1998 spin_lock_irqsave(&adapter->hw.intr_mask_lock, flags);
057f4af2 1999 adapter->hw.intr_mask |= atl1c_qregs[rrd_ring->num].rx_isr;
43250ddd 2000 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
a1150a04 2001 spin_unlock_irqrestore(&adapter->hw.intr_mask_lock, flags);
43250ddd
JY		 2002 }
2003 return work_done;
2004}
2005
2006#ifdef CONFIG_NET_POLL_CONTROLLER
2007
2008/*
2009 * Polling 'interrupt' - used by things like netconsole to send skbs
2010 * without having to re-enable interrupts. It's not called while
2011 * the interrupt routine is executing.
2012 */
2013static void atl1c_netpoll(struct net_device *netdev)
2014{
2015 struct atl1c_adapter *adapter = netdev_priv(netdev);
2016
2017 disable_irq(adapter->pdev->irq);
2018 atl1c_intr(adapter->pdev->irq, netdev);
2019 enable_irq(adapter->pdev->irq);
2020}
2021#endif
2022
057f4af2 2023static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, u32 queue)
43250ddd 2024{
057f4af2 2025 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue];
43250ddd
JY		 2026 u16 next_to_use = 0;
2027 u16 next_to_clean = 0;
2028
2029 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
2030 next_to_use = tpd_ring->next_to_use;
2031
2032 return (u16)(next_to_clean > next_to_use) ?
2033 (next_to_clean - next_to_use - 1) :
2034 (tpd_ring->count + next_to_clean - next_to_use - 1);
2035}
2036
2037/*
2038 * get next usable tpd
2039 * Note: should call atl1c_tdp_avail to make sure
2040 * there is enough tpd to use
2041 */
2042static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
057f4af2 2043 u32 queue)
43250ddd 2044{
057f4af2 2045 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue];
43250ddd
JY		 2046 struct atl1c_tpd_desc *tpd_desc;
2047 u16 next_to_use = 0;
2048
2049 next_to_use = tpd_ring->next_to_use;
2050 if (++tpd_ring->next_to_use == tpd_ring->count)
2051 tpd_ring->next_to_use = 0;
2052 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
2053 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
2054 return tpd_desc;
2055}
2056
2057static struct atl1c_buffer *
2058atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
2059{
2060 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
2061
2062 return &tpd_ring->buffer_info[tpd -
2063 (struct atl1c_tpd_desc *)tpd_ring->desc];
2064}
2065
2066/* Calculate the transmit packet descript needed*/
2067static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
2068{
2069 u16 tpd_req;
2070 u16 proto_hdr_len = 0;
2071
2072 tpd_req = skb_shinfo(skb)->nr_frags + 1;
2073
2074 if (skb_is_gso(skb)) {
2075 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2076 if (proto_hdr_len < skb_headlen(skb))
2077 tpd_req++;
2078 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
2079 tpd_req++;
2080 }
2081 return tpd_req;
2082}
2083
2084static int atl1c_tso_csum(struct atl1c_adapter *adapter,
2085 struct sk_buff *skb,
2086 struct atl1c_tpd_desc **tpd,
057f4af2 2087 u32 queue)
43250ddd
JY		 2088{
2089 struct pci_dev *pdev = adapter->pdev;
0f5c113c 2090 unsigned short offload_type;
43250ddd
JY		 2091 u8 hdr_len;
2092 u32 real_len;
43250ddd
JY		 2093
2094 if (skb_is_gso(skb)) {
0f5c113c 2095 int err;
2096
2097 err = skb_cow_head(skb, 0);
2098 if (err < 0)
2099 return err;
2100
43250ddd
JY		 2101 offload_type = skb_shinfo(skb)->gso_type;
2102
2103 if (offload_type & SKB_GSO_TCPV4) {
2104 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
2105 + ntohs(ip_hdr(skb)->tot_len));
2106
2107 if (real_len < skb->len)
2108 pskb_trim(skb, real_len);
2109
2110 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2111 if (unlikely(skb->len == hdr_len)) {
2112 /* only xsum need */
2113 if (netif_msg_tx_queued(adapter))
2114 dev_warn(&pdev->dev,
2115 "IPV4 tso with zero data??\n");
2116 goto check_sum;
2117 } else {
2118 ip_hdr(skb)->check = 0;
2119 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
2120 ip_hdr(skb)->saddr,
2121 ip_hdr(skb)->daddr,
2122 0, IPPROTO_TCP, 0);
2123 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
2124 }
2125 }
2126
2127 if (offload_type & SKB_GSO_TCPV6) {
2128 struct atl1c_tpd_ext_desc *etpd =
2129 *(struct atl1c_tpd_ext_desc **)(tpd);
2130
2131 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
057f4af2 2132 *tpd = atl1c_get_tpd(adapter, queue);
43250ddd
JY		 2133 ipv6_hdr(skb)->payload_len = 0;
2134 /* check payload == 0 byte ? */
2135 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2136 if (unlikely(skb->len == hdr_len)) {
2137 /* only xsum need */
2138 if (netif_msg_tx_queued(adapter))
2139 dev_warn(&pdev->dev,
2140 "IPV6 tso with zero data??\n");
2141 goto check_sum;
2142 } else
4d4c3783
HK		 2143 tcp_v6_gso_csum_prep(skb);
2144
43250ddd
JY		 2145 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
2146 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
2147 etpd->pkt_len = cpu_to_le32(skb->len);
2148 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
2149 }
2150
2151 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
2152 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
2153 TPD_TCPHDR_OFFSET_SHIFT;
2154 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
2155 TPD_MSS_SHIFT;
2156 return 0;
2157 }
2158
2159check_sum:
2160 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2161 u8 css, cso;
0d0b1672 2162 cso = skb_checksum_start_offset(skb);
43250ddd
JY		 2163
2164 if (unlikely(cso & 0x1)) {
2165 if (netif_msg_tx_err(adapter))
2166 dev_err(&adapter->pdev->dev,
2167 "payload offset should not an event number\n");
2168 return -1;
2169 } else {
2170 css = cso + skb->csum_offset;
2171
2172 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
2173 TPD_PLOADOFFSET_SHIFT;
2174 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
2175 TPD_CCSUM_OFFSET_SHIFT;
2176 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
2177 }
2178 }
2179 return 0;
2180}
2181
ac574804
HX		 2182static void atl1c_tx_rollback(struct atl1c_adapter *adpt,
2183 struct atl1c_tpd_desc *first_tpd,
057f4af2 2184 u32 queue)
ac574804 2185{
057f4af2 2186 struct atl1c_tpd_ring *tpd_ring = &adpt->tpd_ring[queue];
ac574804
HX		 2187 struct atl1c_buffer *buffer_info;
2188 struct atl1c_tpd_desc *tpd;
2189 u16 first_index, index;
2190
2191 first_index = first_tpd - (struct atl1c_tpd_desc *)tpd_ring->desc;
2192 index = first_index;
2193 while (index != tpd_ring->next_to_use) {
2194 tpd = ATL1C_TPD_DESC(tpd_ring, index);
2195 buffer_info = &tpd_ring->buffer_info[index];
07641c8f 2196 atl1c_clean_buffer(adpt->pdev, buffer_info);
ac574804
HX		 2197 memset(tpd, 0, sizeof(struct atl1c_tpd_desc));
2198 if (++index == tpd_ring->count)
2199 index = 0;
2200 }
2201 tpd_ring->next_to_use = first_index;
2202}
2203
2204static int atl1c_tx_map(struct atl1c_adapter *adapter,
057f4af2
GP		 2205 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2206 u32 queue)
43250ddd
JY		 2207{
2208 struct atl1c_tpd_desc *use_tpd = NULL;
2209 struct atl1c_buffer *buffer_info = NULL;
2210 u16 buf_len = skb_headlen(skb);
2211 u16 map_len = 0;
2212 u16 mapped_len = 0;
2213 u16 hdr_len = 0;
2214 u16 nr_frags;
2215 u16 f;
2216 int tso;
2217
2218 nr_frags = skb_shinfo(skb)->nr_frags;
2219 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2220 if (tso) {
2221 /* TSO */
2222 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2223 use_tpd = tpd;
2224
2225 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2226 buffer_info->length = map_len;
85eb5bc3
CJ		 2227 buffer_info->dma = dma_map_single(&adapter->pdev->dev,
2228 skb->data, hdr_len,
2229 DMA_TO_DEVICE);
2230 if (unlikely(dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)))
ac574804 2231 goto err_dma;
7cb08d7f 2232 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
4b45e342
JY		 2233 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2234 ATL1C_PCIMAP_TODEVICE);
43250ddd
JY		 2235 mapped_len += map_len;
2236 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2237 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2238 }
2239
2240 if (mapped_len < buf_len) {
2241 /* mapped_len == 0, means we should use the first tpd,
2242 which is given by caller */
2243 if (mapped_len == 0)
2244 use_tpd = tpd;
2245 else {
057f4af2 2246 use_tpd = atl1c_get_tpd(adapter, queue);
43250ddd
JY		 2247 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2248 }
2249 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2250 buffer_info->length = buf_len - mapped_len;
2251 buffer_info->dma =
85eb5bc3
CJ		 2252 dma_map_single(&adapter->pdev->dev,
2253 skb->data + mapped_len,
2254 buffer_info->length, DMA_TO_DEVICE);
2255 if (unlikely(dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)))
ac574804
HX		 2256 goto err_dma;
2257
c6060be4 2258 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
4b45e342
JY		 2259 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2260 ATL1C_PCIMAP_TODEVICE);
43250ddd
JY		 2261 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2262 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2263 }
2264
2265 for (f = 0; f < nr_frags; f++) {
d7840976 2266 skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
43250ddd 2267
057f4af2 2268 use_tpd = atl1c_get_tpd(adapter, queue);
43250ddd
JY		 2269 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2270
2271 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
9e903e08 2272 buffer_info->length = skb_frag_size(frag);
8d1bb865
IC		 2273 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
2274 frag, 0,
2275 buffer_info->length,
5d6bcdfe 2276 DMA_TO_DEVICE);
ac574804
HX		 2277 if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma))
2278 goto err_dma;
2279
c6060be4 2280 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
4b45e342
JY		 2281 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2282 ATL1C_PCIMAP_TODEVICE);
43250ddd
JY		 2283 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2284 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2285 }
2286
2287 /* The last tpd */
2288 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2289 /* The last buffer info contain the skb address,
2290 so it will be free after unmap */
2291 buffer_info->skb = skb;
ac574804
HX		 2292
2293 return 0;
2294
2295err_dma:
2296 buffer_info->dma = 0;
2297 buffer_info->length = 0;
2298 return -1;
43250ddd
JY		 2299}
2300
057f4af2 2301static void atl1c_tx_queue(struct atl1c_adapter *adapter, u32 queue)
43250ddd 2302{
057f4af2 2303 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue];
43250ddd 2304
057f4af2
GP		 2305 AT_WRITE_REGW(&adapter->hw, atl1c_qregs[queue].tpd_prod,
2306 tpd_ring->next_to_use);
43250ddd
JY		 2307}
2308
61357325
SH		 2309static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2310 struct net_device *netdev)
43250ddd
JY		 2311{
2312 struct atl1c_adapter *adapter = netdev_priv(netdev);
057f4af2
GP		 2313 u32 queue = skb_get_queue_mapping(skb);
2314 struct netdev_queue *txq = netdev_get_tx_queue(netdev, queue);
43250ddd 2315 struct atl1c_tpd_desc *tpd;
057f4af2 2316 u16 tpd_req;
43250ddd
JY		 2317
2318 if (test_bit(__AT_DOWN, &adapter->flags)) {
2319 dev_kfree_skb_any(skb);
2320 return NETDEV_TX_OK;
2321 }
2322
2323 tpd_req = atl1c_cal_tpd_req(skb);
43250ddd 2324
057f4af2 2325 if (atl1c_tpd_avail(adapter, queue) < tpd_req) {
43250ddd 2326 /* no enough descriptor, just stop queue */
057f4af2
GP		 2327 atl1c_tx_queue(adapter, queue);
2328 netif_tx_stop_queue(txq);
43250ddd
JY		 2329 return NETDEV_TX_BUSY;
2330 }
2331
057f4af2 2332 tpd = atl1c_get_tpd(adapter, queue);
43250ddd
JY		 2333
2334 /* do TSO and check sum */
057f4af2
GP		 2335 if (atl1c_tso_csum(adapter, skb, &tpd, queue) != 0) {
2336 atl1c_tx_queue(adapter, queue);
43250ddd
JY		 2337 dev_kfree_skb_any(skb);
2338 return NETDEV_TX_OK;
2339 }
2340
df8a39de
JP		 2341 if (unlikely(skb_vlan_tag_present(skb))) {
2342 u16 vlan = skb_vlan_tag_get(skb);
43250ddd
JY		 2343 __le16 tag;
2344
2345 vlan = cpu_to_le16(vlan);
2346 AT_VLAN_TO_TAG(vlan, tag);
2347 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2348 tpd->vlan_tag = tag;
2349 }
2350
2351 if (skb_network_offset(skb) != ETH_HLEN)
2352 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2353
057f4af2 2354 if (atl1c_tx_map(adapter, skb, tpd, queue) < 0) {
ac574804 2355 netif_info(adapter, tx_done, adapter->netdev,
62d4fd47 2356 "tx-skb dropped due to dma error\n");
ac574804 2357 /* roll back tpd/buffer */
057f4af2 2358 atl1c_tx_rollback(adapter, tpd, queue);
07641c8f 2359 dev_kfree_skb_any(skb);
ac574804 2360 } else {
d7ab6419
GP		 2361 bool more = netdev_xmit_more();
2362
057f4af2
GP		 2363 if (__netdev_tx_sent_queue(txq, skb->len, more))
2364 atl1c_tx_queue(adapter, queue);
ac574804 2365 }
43250ddd 2366
43250ddd
JY		 2367 return NETDEV_TX_OK;
2368}
2369
2370static void atl1c_free_irq(struct atl1c_adapter *adapter)
2371{
2372 struct net_device *netdev = adapter->netdev;
2373
2374 free_irq(adapter->pdev->irq, netdev);
2375
2376 if (adapter->have_msi)
2377 pci_disable_msi(adapter->pdev);
2378}
2379
2380static int atl1c_request_irq(struct atl1c_adapter *adapter)
2381{
2382 struct pci_dev *pdev = adapter->pdev;
2383 struct net_device *netdev = adapter->netdev;
2384 int flags = 0;
2385 int err = 0;
2386
2387 adapter->have_msi = true;
2388 err = pci_enable_msi(adapter->pdev);
2389 if (err) {
2390 if (netif_msg_ifup(adapter))
2391 dev_err(&pdev->dev,
2392 "Unable to allocate MSI interrupt Error: %d\n",
2393 err);
2394 adapter->have_msi = false;
93f7fab4 2395 }
43250ddd
JY		 2396
2397 if (!adapter->have_msi)
2398 flags |= IRQF_SHARED;
9aff7e92 2399 err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
43250ddd
JY		 2400 netdev->name, netdev);
2401 if (err) {
2402 if (netif_msg_ifup(adapter))
2403 dev_err(&pdev->dev,
2404 "Unable to allocate interrupt Error: %d\n",
2405 err);
2406 if (adapter->have_msi)
2407 pci_disable_msi(adapter->pdev);
2408 return err;
2409 }
2410 if (netif_msg_ifup(adapter))
2411 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2412 return err;
2413}
2414
5e5c0964
HX		 2415
2416static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter)
2417{
057f4af2 2418 int i;
5e5c0964 2419 /* release tx-pending skbs and reset tx/rx ring index */
057f4af2
GP		 2420 for (i = 0; i < adapter->tx_queue_count; ++i)
2421 atl1c_clean_tx_ring(adapter, i);
2422 for (i = 0; i < adapter->rx_queue_count; ++i)
2423 atl1c_clean_rx_ring(adapter, i);
5e5c0964
HX		 2424}
2425
0fb1e54e 2426static int atl1c_up(struct atl1c_adapter *adapter)
43250ddd
JY		 2427{
2428 struct net_device *netdev = adapter->netdev;
43250ddd 2429 int err;
057f4af2 2430 int i;
43250ddd
JY		 2431
2432 netif_carrier_off(netdev);
43250ddd 2433
5e5c0964
HX		 2434 err = atl1c_configure(adapter);
2435 if (unlikely(err))
43250ddd 2436 goto err_up;
43250ddd
JY		 2437
2438 err = atl1c_request_irq(adapter);
2439 if (unlikely(err))
2440 goto err_up;
2441
5e5c0964 2442 atl1c_check_link_status(adapter);
43250ddd 2443 clear_bit(__AT_DOWN, &adapter->flags);
057f4af2
GP		 2444 for (i = 0; i < adapter->tx_queue_count; ++i)
2445 napi_enable(&adapter->tpd_ring[i].napi);
2446 for (i = 0; i < adapter->rx_queue_count; ++i)
2447 napi_enable(&adapter->rrd_ring[i].napi);
43250ddd 2448 atl1c_irq_enable(adapter);
43250ddd
JY		 2449 netif_start_queue(netdev);
2450 return err;
2451
2452err_up:
057f4af2
GP		 2453 for (i = 0; i < adapter->rx_queue_count; ++i)
2454 atl1c_clean_rx_ring(adapter, i);
43250ddd
JY		 2455 return err;
2456}
2457
0fb1e54e 2458static void atl1c_down(struct atl1c_adapter *adapter)
43250ddd
JY		 2459{
2460 struct net_device *netdev = adapter->netdev;
057f4af2 2461 int i;
43250ddd
JY		 2462
2463 atl1c_del_timer(adapter);
cb190546 2464 adapter->work_event = 0; /* clear all event */
43250ddd
JY		 2465 /* signal that we're down so the interrupt handler does not
2466 * reschedule our watchdog timer */
2467 set_bit(__AT_DOWN, &adapter->flags);
2468 netif_carrier_off(netdev);
057f4af2
GP		 2469 for (i = 0; i < adapter->tx_queue_count; ++i)
2470 napi_disable(&adapter->tpd_ring[i].napi);
2471 for (i = 0; i < adapter->rx_queue_count; ++i)
2472 napi_disable(&adapter->rrd_ring[i].napi);
43250ddd
JY		 2473 atl1c_irq_disable(adapter);
2474 atl1c_free_irq(adapter);
024e1e4d
HX		 2475 /* disable ASPM if device inactive */
2476 atl1c_disable_l0s_l1(&adapter->hw);
43250ddd
JY		 2477 /* reset MAC to disable all RX/TX */
2478 atl1c_reset_mac(&adapter->hw);
2479 msleep(1);
2480
2481 adapter->link_speed = SPEED_0;
2482 adapter->link_duplex = -1;
5e5c0964 2483 atl1c_reset_dma_ring(adapter);
43250ddd
JY		 2484}
2485
49ce9c2c 2486/**
43250ddd
JY		 2487 * atl1c_open - Called when a network interface is made active
2488 * @netdev: network interface device structure
2489 *
2490 * Returns 0 on success, negative value on failure
2491 *
2492 * The open entry point is called when a network interface is made
2493 * active by the system (IFF_UP). At this point all resources needed
2494 * for transmit and receive operations are allocated, the interrupt
2495 * handler is registered with the OS, the watchdog timer is started,
2496 * and the stack is notified that the interface is ready.
2497 */
2498static int atl1c_open(struct net_device *netdev)
2499{
2500 struct atl1c_adapter *adapter = netdev_priv(netdev);
2501 int err;
2502
2503 /* disallow open during test */
2504 if (test_bit(__AT_TESTING, &adapter->flags))
2505 return -EBUSY;
2506
2507 /* allocate rx/tx dma buffer & descriptors */
2508 err = atl1c_setup_ring_resources(adapter);
2509 if (unlikely(err))
2510 return err;
2511
2512 err = atl1c_up(adapter);
2513 if (unlikely(err))
2514 goto err_up;
2515
43250ddd
JY		 2516 return 0;
2517
2518err_up:
2519 atl1c_free_irq(adapter);
2520 atl1c_free_ring_resources(adapter);
2521 atl1c_reset_mac(&adapter->hw);
2522 return err;
2523}
2524
49ce9c2c 2525/**
43250ddd
JY		 2526 * atl1c_close - Disables a network interface
2527 * @netdev: network interface device structure
2528 *
2529 * Returns 0, this is not allowed to fail
2530 *
2531 * The close entry point is called when an interface is de-activated
2532 * by the OS. The hardware is still under the drivers control, but
2533 * needs to be disabled. A global MAC reset is issued to stop the
2534 * hardware, and all transmit and receive resources are freed.
2535 */
2536static int atl1c_close(struct net_device *netdev)
2537{
2538 struct atl1c_adapter *adapter = netdev_priv(netdev);
2539
2540 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
0aa76ce3
HX		 2541 set_bit(__AT_DOWN, &adapter->flags);
2542 cancel_work_sync(&adapter->common_task);
43250ddd
JY		 2543 atl1c_down(adapter);
2544 atl1c_free_ring_resources(adapter);
2545 return 0;
2546}
2547
762e3023 2548static int atl1c_suspend(struct device *dev)
43250ddd 2549{
f54b0fc8 2550 struct net_device *netdev = dev_get_drvdata(dev);
43250ddd
JY		 2551 struct atl1c_adapter *adapter = netdev_priv(netdev);
2552 struct atl1c_hw *hw = &adapter->hw;
43250ddd 2553 u32 wufc = adapter->wol;
43250ddd 2554
8f574b35 2555 atl1c_disable_l0s_l1(hw);
43250ddd
JY		 2556 if (netif_running(netdev)) {
2557 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2558 atl1c_down(adapter);
2559 }
2560 netif_device_detach(netdev);
8f574b35
JY		 2561
2562 if (wufc)
319d013a 2563 if (atl1c_phy_to_ps_link(hw) != 0)
f54b0fc8 2564 dev_dbg(dev, "phy power saving failed");
8f574b35 2565
319d013a 2566 atl1c_power_saving(hw, wufc);
ce5b972b 2567
43250ddd
JY		 2568 return 0;
2569}
2570
d187c1aa 2571#ifdef CONFIG_PM_SLEEP
762e3023 2572static int atl1c_resume(struct device *dev)
43250ddd 2573{
f54b0fc8 2574 struct net_device *netdev = dev_get_drvdata(dev);
43250ddd
JY		 2575 struct atl1c_adapter *adapter = netdev_priv(netdev);
2576
43250ddd 2577 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
ce3ba0c9 2578 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
43250ddd
JY		 2579
2580 atl1c_phy_reset(&adapter->hw);
2581 atl1c_reset_mac(&adapter->hw);
8f574b35
JY		 2582 atl1c_phy_init(&adapter->hw);
2583
43250ddd
JY		 2584 netif_device_attach(netdev);
2585 if (netif_running(netdev))
2586 atl1c_up(adapter);
2587
2588 return 0;
2589}
d187c1aa 2590#endif
43250ddd
JY		 2591
2592static void atl1c_shutdown(struct pci_dev *pdev)
2593{
762e3023
RW		 2594 struct net_device *netdev = pci_get_drvdata(pdev);
2595 struct atl1c_adapter *adapter = netdev_priv(netdev);
2596
2597 atl1c_suspend(&pdev->dev);
2598 pci_wake_from_d3(pdev, adapter->wol);
2599 pci_set_power_state(pdev, PCI_D3hot);
43250ddd
JY		 2600}
2601
2602static const struct net_device_ops atl1c_netdev_ops = {
2603 .ndo_open = atl1c_open,
2604 .ndo_stop = atl1c_close,
2605 .ndo_validate_addr = eth_validate_addr,
2606 .ndo_start_xmit = atl1c_xmit_frame,
46facce9 2607 .ndo_set_mac_address = atl1c_set_mac_addr,
afc4b13d 2608 .ndo_set_rx_mode = atl1c_set_multi,
43250ddd 2609 .ndo_change_mtu = atl1c_change_mtu,
782d640a 2610 .ndo_fix_features = atl1c_fix_features,
46facce9 2611 .ndo_set_features = atl1c_set_features,
a7605370 2612 .ndo_eth_ioctl = atl1c_ioctl,
43250ddd
JY		 2613 .ndo_tx_timeout = atl1c_tx_timeout,
2614 .ndo_get_stats = atl1c_get_stats,
43250ddd
JY		 2615#ifdef CONFIG_NET_POLL_CONTROLLER
2616 .ndo_poll_controller = atl1c_netpoll,
2617#endif
2618};
2619
2620static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2621{
2622 SET_NETDEV_DEV(netdev, &pdev->dev);
2623 pci_set_drvdata(pdev, netdev);
2624
43250ddd
JY		 2625 netdev->netdev_ops = &atl1c_netdev_ops;
2626 netdev->watchdog_timeo = AT_TX_WATCHDOG;
67bef942 2627 netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN);
43250ddd
JY		 2628 atl1c_set_ethtool_ops(netdev);
2629
2630 /* TODO: add when ready */
f646968f
PM		 2631 netdev->hw_features = NETIF_F_SG |
2632 NETIF_F_HW_CSUM |
2633 NETIF_F_HW_VLAN_CTAG_RX |
2634 NETIF_F_TSO |
43250ddd 2635 NETIF_F_TSO6;
f646968f
PM		 2636 netdev->features = netdev->hw_features |
2637 NETIF_F_HW_VLAN_CTAG_TX;
43250ddd
JY		 2638 return 0;
2639}
2640
49ce9c2c 2641/**
43250ddd
JY		 2642 * atl1c_probe - Device Initialization Routine
2643 * @pdev: PCI device information struct
2644 * @ent: entry in atl1c_pci_tbl
2645 *
2646 * Returns 0 on success, negative on failure
2647 *
2648 * atl1c_probe initializes an adapter identified by a pci_dev structure.
2649 * The OS initialization, configuring of the adapter private structure,
2650 * and a hardware reset occur.
2651 */
1dd06ae8 2652static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
43250ddd
JY		 2653{
2654 struct net_device *netdev;
2655 struct atl1c_adapter *adapter;
2656 static int cards_found;
bf3be85d
GP		 2657 u8 __iomem *hw_addr;
2658 enum atl1c_nic_type nic_type;
057f4af2 2659 u32 queue_count = 1;
43250ddd 2660 int err = 0;
057f4af2 2661 int i;
43250ddd
JY		 2662
2663 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2664 err = pci_enable_device_mem(pdev);
d502933c
CH		 2665 if (err)
2666 return dev_err_probe(&pdev->dev, err, "cannot enable PCI device\n");
43250ddd
JY		 2667
2668 /*
2669 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2670 * shared register for the high 32 bits, so only a single, aligned,
2671 * 4 GB physical address range can be used at a time.
2672 *
2673 * Supporting 64-bit DMA on this hardware is more trouble than it's
2674 * worth. It is far easier to limit to 32-bit DMA than update
2675 * various kernel subsystems to support the mechanics required by a
2676 * fixed-high-32-bit system.
2677 */
537a1472
ZC		 2678 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2679 if (err) {
43250ddd
JY		 2680 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2681 goto err_dma;
2682 }
2683
2684 err = pci_request_regions(pdev, atl1c_driver_name);
2685 if (err) {
2686 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2687 goto err_pci_reg;
2688 }
2689
2690 pci_set_master(pdev);
2691
bf3be85d
GP		 2692 hw_addr = pci_ioremap_bar(pdev, 0);
2693 if (!hw_addr) {
2694 err = -EIO;
2695 dev_err(&pdev->dev, "cannot map device registers\n");
2696 goto err_ioremap;
2697 }
2698
2699 nic_type = atl1c_get_mac_type(pdev, hw_addr);
057f4af2
GP		 2700 if (nic_type == athr_mt)
2701 queue_count = 4;
bf3be85d 2702
057f4af2 2703 netdev = alloc_etherdev_mq(sizeof(struct atl1c_adapter), queue_count);
43250ddd
JY		 2704 if (netdev == NULL) {
2705 err = -ENOMEM;
43250ddd
JY		 2706 goto err_alloc_etherdev;
2707 }
2708
2709 err = atl1c_init_netdev(netdev, pdev);
2710 if (err) {
2711 dev_err(&pdev->dev, "init netdevice failed\n");
2712 goto err_init_netdev;
2713 }
2714 adapter = netdev_priv(netdev);
2715 adapter->bd_number = cards_found;
2716 adapter->netdev = netdev;
2717 adapter->pdev = pdev;
2718 adapter->hw.adapter = adapter;
bf3be85d 2719 adapter->hw.nic_type = nic_type;
43250ddd 2720 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
bf3be85d 2721 adapter->hw.hw_addr = hw_addr;
057f4af2
GP		 2722 adapter->tx_queue_count = queue_count;
2723 adapter->rx_queue_count = queue_count;
43250ddd
JY		 2724
2725 /* init mii data */
2726 adapter->mii.dev = netdev;
2727 adapter->mii.mdio_read = atl1c_mdio_read;
2728 adapter->mii.mdio_write = atl1c_mdio_write;
2729 adapter->mii.phy_id_mask = 0x1f;
929a5e93 2730 adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK;
a1150a04 2731 dev_set_threaded(netdev, true);
057f4af2
GP		 2732 for (i = 0; i < adapter->rx_queue_count; ++i)
2733 netif_napi_add(netdev, &adapter->rrd_ring[i].napi,
2734 atl1c_clean_rx, 64);
2735 for (i = 0; i < adapter->tx_queue_count; ++i)
2736 netif_napi_add(netdev, &adapter->tpd_ring[i].napi,
2737 atl1c_clean_tx, 64);
e99e88a9 2738 timer_setup(&adapter->phy_config_timer, atl1c_phy_config, 0);
43250ddd
JY		 2739 /* setup the private structure */
2740 err = atl1c_sw_init(adapter);
2741 if (err) {
2742 dev_err(&pdev->dev, "net device private data init failed\n");
2743 goto err_sw_init;
2744 }
67bef942
JW		 2745 /* set max MTU */
2746 atl1c_set_max_mtu(netdev);
2747
ce3ba0c9 2748 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
43250ddd
JY		 2749
2750 /* Init GPHY as early as possible due to power saving issue */
2751 atl1c_phy_reset(&adapter->hw);
2752
2753 err = atl1c_reset_mac(&adapter->hw);
2754 if (err) {
2755 err = -EIO;
2756 goto err_reset;
2757 }
2758
43250ddd
JY		 2759 /* reset the controller to
2760 * put the device in a known good starting state */
2761 err = atl1c_phy_init(&adapter->hw);
2762 if (err) {
2763 err = -EIO;
2764 goto err_reset;
2765 }
6a214fd4
DK		 2766 if (atl1c_read_mac_addr(&adapter->hw)) {
2767 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */
e41b2d7f 2768 netdev->addr_assign_type = NET_ADDR_RANDOM;
43250ddd 2769 }
a05e4c0a 2770 eth_hw_addr_set(netdev, adapter->hw.mac_addr);
43250ddd 2771 if (netif_msg_probe(adapter))
82991172 2772 dev_dbg(&pdev->dev, "mac address : %pM\n",
2773 adapter->hw.mac_addr);
43250ddd 2774
229e6b6e 2775 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
cb190546
JY		 2776 INIT_WORK(&adapter->common_task, atl1c_common_task);
2777 adapter->work_event = 0;
43250ddd
JY		 2778 err = register_netdev(netdev);
2779 if (err) {
2780 dev_err(&pdev->dev, "register netdevice failed\n");
2781 goto err_register;
2782 }
2783
43250ddd
JY		 2784 cards_found++;
2785 return 0;
2786
2787err_reset:
2788err_register:
2789err_sw_init:
43250ddd 2790err_init_netdev:
43250ddd
JY		 2791 free_netdev(netdev);
2792err_alloc_etherdev:
bf3be85d
GP		 2793 iounmap(hw_addr);
2794err_ioremap:
43250ddd
JY		 2795 pci_release_regions(pdev);
2796err_pci_reg:
2797err_dma:
2798 pci_disable_device(pdev);
2799 return err;
2800}
2801
49ce9c2c 2802/**
43250ddd
JY		 2803 * atl1c_remove - Device Removal Routine
2804 * @pdev: PCI device information struct
2805 *
2806 * atl1c_remove is called by the PCI subsystem to alert the driver
2807 * that it should release a PCI device. The could be caused by a
2808 * Hot-Plug event, or because the driver is going to be removed from
2809 * memory.
2810 */
093d369d 2811static void atl1c_remove(struct pci_dev *pdev)
43250ddd
JY		 2812{
2813 struct net_device *netdev = pci_get_drvdata(pdev);
2814 struct atl1c_adapter *adapter = netdev_priv(netdev);
2815
2816 unregister_netdev(netdev);
229e6b6e
HX		 2817 /* restore permanent address */
2818 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr);
43250ddd
JY		 2819 atl1c_phy_disable(&adapter->hw);
2820
2821 iounmap(adapter->hw.hw_addr);
2822
2823 pci_release_regions(pdev);
2824 pci_disable_device(pdev);
2825 free_netdev(netdev);
2826}
2827
49ce9c2c 2828/**
43250ddd
JY		 2829 * atl1c_io_error_detected - called when PCI error is detected
2830 * @pdev: Pointer to PCI device
2831 * @state: The current pci connection state
2832 *
2833 * This function is called after a PCI bus error affecting
2834 * this device has been detected.
2835 */
2836static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2837 pci_channel_state_t state)
2838{
2839 struct net_device *netdev = pci_get_drvdata(pdev);
2840 struct atl1c_adapter *adapter = netdev_priv(netdev);
2841
2842 netif_device_detach(netdev);
2843
005fb4f0
DN		 2844 if (state == pci_channel_io_perm_failure)
2845 return PCI_ERS_RESULT_DISCONNECT;
2846
43250ddd
JY		 2847 if (netif_running(netdev))
2848 atl1c_down(adapter);
2849
2850 pci_disable_device(pdev);
2851
2852 /* Request a slot slot reset. */
2853 return PCI_ERS_RESULT_NEED_RESET;
2854}
2855
49ce9c2c 2856/**
43250ddd
JY		 2857 * atl1c_io_slot_reset - called after the pci bus has been reset.
2858 * @pdev: Pointer to PCI device
2859 *
2860 * Restart the card from scratch, as if from a cold-boot. Implementation
2861 * resembles the first-half of the e1000_resume routine.
2862 */
2863static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2864{
2865 struct net_device *netdev = pci_get_drvdata(pdev);
2866 struct atl1c_adapter *adapter = netdev_priv(netdev);
2867
2868 if (pci_enable_device(pdev)) {
2869 if (netif_msg_hw(adapter))
2870 dev_err(&pdev->dev,
2871 "Cannot re-enable PCI device after reset\n");
2872 return PCI_ERS_RESULT_DISCONNECT;
2873 }
2874 pci_set_master(pdev);
2875
2876 pci_enable_wake(pdev, PCI_D3hot, 0);
2877 pci_enable_wake(pdev, PCI_D3cold, 0);
2878
2879 atl1c_reset_mac(&adapter->hw);
2880
2881 return PCI_ERS_RESULT_RECOVERED;
2882}
2883
49ce9c2c 2884/**
43250ddd
JY		 2885 * atl1c_io_resume - called when traffic can start flowing again.
2886 * @pdev: Pointer to PCI device
2887 *
2888 * This callback is called when the error recovery driver tells us that
2889 * its OK to resume normal operation. Implementation resembles the
2890 * second-half of the atl1c_resume routine.
2891 */
2892static void atl1c_io_resume(struct pci_dev *pdev)
2893{
2894 struct net_device *netdev = pci_get_drvdata(pdev);
2895 struct atl1c_adapter *adapter = netdev_priv(netdev);
2896
2897 if (netif_running(netdev)) {
2898 if (atl1c_up(adapter)) {
2899 if (netif_msg_hw(adapter))
2900 dev_err(&pdev->dev,
2901 "Cannot bring device back up after reset\n");
2902 return;
2903 }
2904 }
2905
2906 netif_device_attach(netdev);
2907}
2908
3646f0e5 2909static const struct pci_error_handlers atl1c_err_handler = {
43250ddd
JY		 2910 .error_detected = atl1c_io_error_detected,
2911 .slot_reset = atl1c_io_slot_reset,
2912 .resume = atl1c_io_resume,
2913};
2914
762e3023
RW		 2915static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
2916
43250ddd
JY		 2917static struct pci_driver atl1c_driver = {
2918 .name = atl1c_driver_name,
2919 .id_table = atl1c_pci_tbl,
2920 .probe = atl1c_probe,
093d369d 2921 .remove = atl1c_remove,
43250ddd 2922 .shutdown = atl1c_shutdown,
762e3023
RW		 2923 .err_handler = &atl1c_err_handler,
2924 .driver.pm = &atl1c_pm_ops,
43250ddd
JY		 2925};
2926
2c21d6c9 2927module_pci_driver(atl1c_driver);
Linux 6.x block layer and io_uring tree(s)