atl1c: move tx napi into tpd_ring
[linux-2.6-block.git] / drivers / net / ethernet / atheros / atl1c / atl1c_main.c
CommitLineData
1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
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2/*
3 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
4 *
5 * Derived from Intel e1000 driver
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
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7 */
8
9#include "atl1c.h"
10
43250ddd 11char atl1c_driver_name[] = "atl1c";
496c185c 12
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13/*
14 * atl1c_pci_tbl - PCI Device ID Table
15 *
16 * Wildcard entries (PCI_ANY_ID) should come last
17 * Last entry must be all 0s
18 *
19 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
20 * Class, Class Mask, private data (not used) }
21 */
9baa3c34 22static const struct pci_device_id atl1c_pci_tbl[] = {
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23 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
24 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
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25 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
26 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
27 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
94dde7e4 28 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
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29 /* required last entry */
30 { 0 }
31};
32MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
33
70c9fbd3 34MODULE_AUTHOR("Jie Yang");
a57d3d48 35MODULE_AUTHOR("Qualcomm Atheros Inc.");
fe4e4372 36MODULE_DESCRIPTION("Qualcomm Atheros 100/1000M Ethernet Network Driver");
43250ddd 37MODULE_LICENSE("GPL");
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38
39static int atl1c_stop_mac(struct atl1c_hw *hw);
43250ddd 40static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
024e1e4d 41static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed);
25456e5c 42static void atl1c_start_mac(struct atl1c_adapter *adapter);
9f1fd0ef 43static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
43250ddd 44 int *work_done, int work_to_do);
0fb1e54e 45static int atl1c_up(struct atl1c_adapter *adapter);
46static void atl1c_down(struct atl1c_adapter *adapter);
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47static int atl1c_reset_mac(struct atl1c_hw *hw);
48static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter);
49static int atl1c_configure(struct atl1c_adapter *adapter);
a9d6df64 50static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, bool napi_mode);
43250ddd 51
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52
53static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
54 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
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55static void atl1c_pcie_patch(struct atl1c_hw *hw)
56{
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57 u32 mst_data, data;
58
59 /* pclk sel could switch to 25M */
60 AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data);
61 mst_data &= ~MASTER_CTRL_CLK_SEL_DIS;
62 AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);
43250ddd 63
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64 /* WoL/PCIE related settings */
65 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) {
66 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
67 data |= PCIE_PHYMISC_FORCE_RCV_DET;
68 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
69 } else { /* new dev set bit5 of MASTER */
70 if (!(mst_data & MASTER_CTRL_WAKEN_25M))
71 AT_WRITE_REG(hw, REG_MASTER_CTRL,
72 mst_data | MASTER_CTRL_WAKEN_25M);
73 }
74 /* aspm/PCIE setting only for l2cb 1.0 */
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75 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
76 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
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77 data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW,
78 L2CB1_PCIE_PHYMISC2_CDR_BW);
79 data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH,
80 L2CB1_PCIE_PHYMISC2_L0S_TH);
8f574b35 81 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
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82 /* extend L1 sync timer */
83 AT_READ_REG(hw, REG_LINK_CTRL, &data);
84 data |= LINK_CTRL_EXT_SYNC;
85 AT_WRITE_REG(hw, REG_LINK_CTRL, data);
86 }
87 /* l2cb 1.x & l1d 1.x */
88 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) {
89 AT_READ_REG(hw, REG_PM_CTRL, &data);
90 data |= PM_CTRL_L0S_BUFSRX_EN;
91 AT_WRITE_REG(hw, REG_PM_CTRL, data);
92 /* clear vendor msg */
93 AT_READ_REG(hw, REG_DMA_DBG, &data);
94 AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG);
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95 }
96}
97
98/* FIXME: no need any more ? */
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99/*
100 * atl1c_init_pcie - init PCIE module
101 */
102static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
103{
104 u32 data;
105 u32 pci_cmd;
106 struct pci_dev *pdev = hw->adapter->pdev;
95f9aea7 107 int pos;
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108
109 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
110 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
111 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
112 PCI_COMMAND_IO);
113 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
114
115 /*
116 * Clear any PowerSaveing Settings
117 */
118 pci_enable_wake(pdev, PCI_D3hot, 0);
119 pci_enable_wake(pdev, PCI_D3cold, 0);
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120 /* wol sts read-clear */
121 AT_READ_REG(hw, REG_WOL_CTRL, &data);
122 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
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123
124 /*
125 * Mask some pcie error bits
126 */
95f9aea7 127 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
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BD
128 if (pos) {
129 pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data);
130 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP);
131 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data);
132 }
95f9aea7 133 /* clear error status */
eb0ff563 134 pcie_capability_write_word(pdev, PCI_EXP_DEVSTA,
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135 PCI_EXP_DEVSTA_NFED |
136 PCI_EXP_DEVSTA_FED |
137 PCI_EXP_DEVSTA_CED |
138 PCI_EXP_DEVSTA_URD);
43250ddd 139
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140 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
141 data &= ~LTSSM_ID_EN_WRO;
142 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
143
144 atl1c_pcie_patch(hw);
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145 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
146 atl1c_disable_l0s_l1(hw);
43250ddd 147
8f574b35 148 msleep(5);
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149}
150
49ce9c2c 151/**
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152 * atl1c_irq_enable - Enable default interrupt generation settings
153 * @adapter: board private structure
154 */
155static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
156{
157 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
158 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
159 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
160 AT_WRITE_FLUSH(&adapter->hw);
161 }
162}
163
49ce9c2c 164/**
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165 * atl1c_irq_disable - Mask off interrupt generation on the NIC
166 * @adapter: board private structure
167 */
168static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
169{
170 atomic_inc(&adapter->irq_sem);
171 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
8f574b35 172 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
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173 AT_WRITE_FLUSH(&adapter->hw);
174 synchronize_irq(adapter->pdev->irq);
175}
176
49ce9c2c 177/**
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178 * atl1c_irq_reset - reset interrupt confiure on the NIC
179 * @adapter: board private structure
180 */
181static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
182{
183 atomic_set(&adapter->irq_sem, 1);
184 atl1c_irq_enable(adapter);
185}
186
c930a662
JP
187/*
188 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
189 * of the idle status register until the device is actually idle
190 */
969a7ee2 191static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl)
c930a662
JP
192{
193 int timeout;
194 u32 data;
195
196 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
197 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
969a7ee2 198 if ((data & modu_ctrl) == 0)
c930a662
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199 return 0;
200 msleep(1);
201 }
202 return data;
203}
204
49ce9c2c 205/**
43250ddd 206 * atl1c_phy_config - Timer Call-back
d0ea5cbd 207 * @t: timer list containing pointer to netdev cast into an unsigned long
43250ddd 208 */
e99e88a9 209static void atl1c_phy_config(struct timer_list *t)
43250ddd 210{
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211 struct atl1c_adapter *adapter = from_timer(adapter, t,
212 phy_config_timer);
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213 struct atl1c_hw *hw = &adapter->hw;
214 unsigned long flags;
215
216 spin_lock_irqsave(&adapter->mdio_lock, flags);
217 atl1c_restart_autoneg(hw);
218 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
219}
220
221void atl1c_reinit_locked(struct atl1c_adapter *adapter)
222{
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223 atl1c_down(adapter);
224 atl1c_up(adapter);
225 clear_bit(__AT_RESETTING, &adapter->flags);
226}
227
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228static void atl1c_check_link_status(struct atl1c_adapter *adapter)
229{
230 struct atl1c_hw *hw = &adapter->hw;
231 struct net_device *netdev = adapter->netdev;
232 struct pci_dev *pdev = adapter->pdev;
233 int err;
234 unsigned long flags;
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235 u16 speed, duplex;
236 bool link;
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237
238 spin_lock_irqsave(&adapter->mdio_lock, flags);
ea0fbd05 239 link = atl1c_get_link_status(hw);
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240 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
241
ea0fbd05 242 if (!link) {
43250ddd 243 /* link down */
5e5c0964 244 netif_carrier_off(netdev);
8f574b35 245 hw->hibernate = true;
5e5c0964 246 if (atl1c_reset_mac(hw) != 0)
8f574b35 247 if (netif_msg_hw(adapter))
5e5c0964 248 dev_warn(&pdev->dev, "reset mac failed\n");
024e1e4d 249 atl1c_set_aspm(hw, SPEED_0);
903d7ce0 250 atl1c_post_phy_linkchg(hw, SPEED_0);
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251 atl1c_reset_dma_ring(adapter);
252 atl1c_configure(adapter);
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253 } else {
254 /* Link Up */
255 hw->hibernate = false;
256 spin_lock_irqsave(&adapter->mdio_lock, flags);
257 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
258 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
259 if (unlikely(err))
260 return;
261 /* link result is our setting */
262 if (adapter->link_speed != speed ||
263 adapter->link_duplex != duplex) {
264 adapter->link_speed = speed;
265 adapter->link_duplex = duplex;
024e1e4d 266 atl1c_set_aspm(hw, speed);
903d7ce0 267 atl1c_post_phy_linkchg(hw, speed);
25456e5c 268 atl1c_start_mac(adapter);
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269 if (netif_msg_link(adapter))
270 dev_info(&pdev->dev,
271 "%s: %s NIC Link is Up<%d Mbps %s>\n",
272 atl1c_driver_name, netdev->name,
273 adapter->link_speed,
274 adapter->link_duplex == FULL_DUPLEX ?
275 "Full Duplex" : "Half Duplex");
276 }
277 if (!netif_carrier_ok(netdev))
278 netif_carrier_on(netdev);
279 }
280}
281
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282static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
283{
284 struct net_device *netdev = adapter->netdev;
285 struct pci_dev *pdev = adapter->pdev;
ea0fbd05 286 bool link;
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287
288 spin_lock(&adapter->mdio_lock);
ea0fbd05 289 link = atl1c_get_link_status(&adapter->hw);
43250ddd 290 spin_unlock(&adapter->mdio_lock);
43250ddd 291 /* notify upper layer link down ASAP */
ea0fbd05 292 if (!link) {
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293 if (netif_carrier_ok(netdev)) {
294 /* old link state: Up */
295 netif_carrier_off(netdev);
296 if (netif_msg_link(adapter))
297 dev_info(&pdev->dev,
298 "%s: %s NIC Link is Down\n",
299 atl1c_driver_name, netdev->name);
300 adapter->link_speed = SPEED_0;
301 }
302 }
cb190546 303
cb771838 304 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
cb190546 305 schedule_work(&adapter->common_task);
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306}
307
cb190546 308static void atl1c_common_task(struct work_struct *work)
43250ddd 309{
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310 struct atl1c_adapter *adapter;
311 struct net_device *netdev;
312
313 adapter = container_of(work, struct atl1c_adapter, common_task);
314 netdev = adapter->netdev;
315
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316 if (test_bit(__AT_DOWN, &adapter->flags))
317 return;
318
cb771838 319 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
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320 netif_device_detach(netdev);
321 atl1c_down(adapter);
322 atl1c_up(adapter);
323 netif_device_attach(netdev);
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324 }
325
cb771838 326 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
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327 &adapter->work_event)) {
328 atl1c_irq_disable(adapter);
cb190546 329 atl1c_check_link_status(adapter);
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330 atl1c_irq_enable(adapter);
331 }
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332}
333
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334
335static void atl1c_del_timer(struct atl1c_adapter *adapter)
43250ddd 336{
cb190546 337 del_timer_sync(&adapter->phy_config_timer);
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338}
339
cb190546 340
49ce9c2c 341/**
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342 * atl1c_tx_timeout - Respond to a Tx Hang
343 * @netdev: network interface device structure
d0ea5cbd 344 * @txqueue: index of hanging tx queue
43250ddd 345 */
0290bd29 346static void atl1c_tx_timeout(struct net_device *netdev, unsigned int txqueue)
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347{
348 struct atl1c_adapter *adapter = netdev_priv(netdev);
349
350 /* Do the reset outside of interrupt context */
cb771838 351 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
cb190546 352 schedule_work(&adapter->common_task);
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353}
354
49ce9c2c 355/**
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356 * atl1c_set_multi - Multicast and Promiscuous mode set
357 * @netdev: network interface device structure
358 *
359 * The set_multi entry point is called whenever the multicast address
360 * list or the network interface flags are updated. This routine is
361 * responsible for configuring the hardware for proper multicast,
362 * promiscuous mode, and all-multi behavior.
363 */
364static void atl1c_set_multi(struct net_device *netdev)
365{
366 struct atl1c_adapter *adapter = netdev_priv(netdev);
367 struct atl1c_hw *hw = &adapter->hw;
22bedad3 368 struct netdev_hw_addr *ha;
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369 u32 mac_ctrl_data;
370 u32 hash_value;
371
372 /* Check for Promiscuous and All Multicast modes */
373 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
374
375 if (netdev->flags & IFF_PROMISC) {
376 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
377 } else if (netdev->flags & IFF_ALLMULTI) {
378 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
379 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
380 } else {
381 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
382 }
383
384 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
385
386 /* clear the old settings from the multicast hash table */
387 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
388 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
389
390 /* comoute mc addresses' hash value ,and put it into hash table */
22bedad3
JP
391 netdev_for_each_mc_addr(ha, netdev) {
392 hash_value = atl1c_hash_mc_addr(hw, ha->addr);
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393 atl1c_hash_set(hw, hash_value);
394 }
395}
396
c8f44aff 397static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
46facce9 398{
f646968f 399 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
46facce9
JP
400 /* enable VLAN tag insert/strip */
401 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
402 } else {
403 /* disable VLAN tag insert/strip */
404 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
405 }
406}
407
c8f44aff
MM
408static void atl1c_vlan_mode(struct net_device *netdev,
409 netdev_features_t features)
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410{
411 struct atl1c_adapter *adapter = netdev_priv(netdev);
412 struct pci_dev *pdev = adapter->pdev;
413 u32 mac_ctrl_data = 0;
414
415 if (netif_msg_pktdata(adapter))
46facce9 416 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
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417
418 atl1c_irq_disable(adapter);
43250ddd 419 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
46facce9 420 __atl1c_vlan_mode(features, &mac_ctrl_data);
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421 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
422 atl1c_irq_enable(adapter);
423}
424
425static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
426{
427 struct pci_dev *pdev = adapter->pdev;
428
429 if (netif_msg_pktdata(adapter))
46facce9
JP
430 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
431 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
43250ddd 432}
46facce9 433
49ce9c2c 434/**
8965c1c5 435 * atl1c_set_mac_addr - Change the Ethernet Address of the NIC
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436 * @netdev: network interface device structure
437 * @p: pointer to an address structure
438 *
439 * Returns 0 on success, negative on failure
440 */
441static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
442{
443 struct atl1c_adapter *adapter = netdev_priv(netdev);
444 struct sockaddr *addr = p;
445
446 if (!is_valid_ether_addr(addr->sa_data))
447 return -EADDRNOTAVAIL;
448
449 if (netif_running(netdev))
450 return -EBUSY;
451
452 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
453 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
454
229e6b6e 455 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
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456
457 return 0;
458}
459
460static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
461 struct net_device *dev)
462{
7b701764 463 unsigned int head_size;
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464 int mtu = dev->mtu;
465
466 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
467 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
7b701764 468
a9d6df64 469 head_size = SKB_DATA_ALIGN(adapter->rx_buffer_len + NET_SKB_PAD + NET_IP_ALIGN) +
7b701764
ED
470 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
471 adapter->rx_frag_size = roundup_pow_of_two(head_size);
43250ddd 472}
782d640a 473
c8f44aff
MM
474static netdev_features_t atl1c_fix_features(struct net_device *netdev,
475 netdev_features_t features)
782d640a 476{
545fa3fb
GP
477 struct atl1c_adapter *adapter = netdev_priv(netdev);
478 struct atl1c_hw *hw = &adapter->hw;
479
46facce9
JP
480 /*
481 * Since there is no support for separate rx/tx vlan accel
482 * enable/disable make sure tx flag is always in same state as rx.
483 */
f646968f
PM
484 if (features & NETIF_F_HW_VLAN_CTAG_RX)
485 features |= NETIF_F_HW_VLAN_CTAG_TX;
46facce9 486 else
f646968f 487 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
46facce9 488
545fa3fb
GP
489 if (hw->nic_type != athr_mt) {
490 if (netdev->mtu > MAX_TSO_FRAME_SIZE)
491 features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
492 }
782d640a
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493
494 return features;
495}
496
c8f44aff
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497static int atl1c_set_features(struct net_device *netdev,
498 netdev_features_t features)
46facce9 499{
c8f44aff 500 netdev_features_t changed = netdev->features ^ features;
46facce9 501
f646968f 502 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
46facce9
JP
503 atl1c_vlan_mode(netdev, features);
504
505 return 0;
506}
507
67bef942
JW
508static void atl1c_set_max_mtu(struct net_device *netdev)
509{
510 struct atl1c_adapter *adapter = netdev_priv(netdev);
511 struct atl1c_hw *hw = &adapter->hw;
512
513 switch (hw->nic_type) {
514 /* These (GbE) devices support jumbo packets, max_mtu 6122 */
515 case athr_l1c:
516 case athr_l1d:
517 case athr_l1d_2:
518 netdev->max_mtu = MAX_JUMBO_FRAME_SIZE -
545fa3fb
GP
519 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
520 break;
521 case athr_mt:
522 netdev->max_mtu = 9500;
67bef942 523 break;
545fa3fb 524 /* The 10/100 devices don't support jumbo packets, max_mtu 1500 */
67bef942
JW
525 default:
526 netdev->max_mtu = ETH_DATA_LEN;
527 break;
528 }
529}
530
49ce9c2c 531/**
43250ddd
JY
532 * atl1c_change_mtu - Change the Maximum Transfer Unit
533 * @netdev: network interface device structure
534 * @new_mtu: new value for maximum frame size
535 *
536 * Returns 0 on success, negative on failure
537 */
538static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
539{
540 struct atl1c_adapter *adapter = netdev_priv(netdev);
67bef942 541
43250ddd 542 /* set MTU */
67bef942 543 if (netif_running(netdev)) {
43250ddd
JY
544 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
545 msleep(1);
546 netdev->mtu = new_mtu;
547 adapter->hw.max_frame_size = new_mtu;
548 atl1c_set_rxbufsize(adapter, netdev);
549 atl1c_down(adapter);
782d640a 550 netdev_update_features(netdev);
43250ddd
JY
551 atl1c_up(adapter);
552 clear_bit(__AT_RESETTING, &adapter->flags);
43250ddd
JY
553 }
554 return 0;
555}
556
557/*
558 * caller should hold mdio_lock
559 */
560static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
561{
562 struct atl1c_adapter *adapter = netdev_priv(netdev);
563 u16 result;
564
2528a5dc 565 atl1c_read_phy_reg(&adapter->hw, reg_num, &result);
43250ddd
JY
566 return result;
567}
568
569static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
570 int reg_num, int val)
571{
572 struct atl1c_adapter *adapter = netdev_priv(netdev);
573
2528a5dc 574 atl1c_write_phy_reg(&adapter->hw, reg_num, val);
43250ddd
JY
575}
576
43250ddd
JY
577static int atl1c_mii_ioctl(struct net_device *netdev,
578 struct ifreq *ifr, int cmd)
579{
580 struct atl1c_adapter *adapter = netdev_priv(netdev);
581 struct pci_dev *pdev = adapter->pdev;
582 struct mii_ioctl_data *data = if_mii(ifr);
583 unsigned long flags;
584 int retval = 0;
585
586 if (!netif_running(netdev))
587 return -EINVAL;
588
589 spin_lock_irqsave(&adapter->mdio_lock, flags);
590 switch (cmd) {
591 case SIOCGMIIPHY:
592 data->phy_id = 0;
593 break;
594
595 case SIOCGMIIREG:
43250ddd
JY
596 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
597 &data->val_out)) {
598 retval = -EIO;
599 goto out;
600 }
601 break;
602
603 case SIOCSMIIREG:
43250ddd
JY
604 if (data->reg_num & ~(0x1F)) {
605 retval = -EFAULT;
606 goto out;
607 }
608
609 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
610 data->reg_num, data->val_in);
611 if (atl1c_write_phy_reg(&adapter->hw,
612 data->reg_num, data->val_in)) {
613 retval = -EIO;
614 goto out;
615 }
616 break;
617
618 default:
619 retval = -EOPNOTSUPP;
620 break;
621 }
622out:
623 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
624 return retval;
625}
626
43250ddd
JY
627static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
628{
629 switch (cmd) {
630 case SIOCGMIIPHY:
631 case SIOCGMIIREG:
632 case SIOCSMIIREG:
633 return atl1c_mii_ioctl(netdev, ifr, cmd);
634 default:
635 return -EOPNOTSUPP;
636 }
637}
638
49ce9c2c 639/**
43250ddd
JY
640 * atl1c_alloc_queues - Allocate memory for all rings
641 * @adapter: board private structure to initialize
642 *
643 */
093d369d 644static int atl1c_alloc_queues(struct atl1c_adapter *adapter)
43250ddd
JY
645{
646 return 0;
647}
648
bf3be85d
GP
649static enum atl1c_nic_type atl1c_get_mac_type(struct pci_dev *pdev,
650 u8 __iomem *hw_addr)
43250ddd 651{
bf3be85d 652 switch (pdev->device) {
43250ddd 653 case PCI_DEVICE_ID_ATTANSIC_L2C:
bf3be85d 654 return athr_l2c;
43250ddd 655 case PCI_DEVICE_ID_ATTANSIC_L1C:
bf3be85d 656 return athr_l1c;
496c185c 657 case PCI_DEVICE_ID_ATHEROS_L2C_B:
bf3be85d 658 return athr_l2c_b;
496c185c 659 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
bf3be85d 660 return athr_l2c_b2;
496c185c 661 case PCI_DEVICE_ID_ATHEROS_L1D:
bf3be85d 662 return athr_l1d;
8f574b35 663 case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
bf3be85d
GP
664 if (readl(hw_addr + REG_MT_MAGIC) == MT_MAGIC)
665 return athr_mt;
666 return athr_l1d_2;
43250ddd 667 default:
bf3be85d 668 return athr_l1c;
43250ddd
JY
669 }
670}
671
672static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
673{
43250ddd
JY
674 u32 link_ctrl_data;
675
43250ddd
JY
676 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
677
8f574b35 678 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
43250ddd 679 ATL1C_TXQ_MODE_ENHANCE;
024e1e4d
HX
680 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT |
681 ATL1C_ASPM_L1_SUPPORT;
8f574b35 682 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
43250ddd 683
496c185c 684 if (hw->nic_type == athr_l1c ||
8f574b35
JY
685 hw->nic_type == athr_l1d ||
686 hw->nic_type == athr_l1d_2)
496c185c 687 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
43250ddd
JY
688 return 0;
689}
903d7ce0
HX
690
691struct atl1c_platform_patch {
692 u16 pci_did;
693 u8 pci_revid;
694 u16 subsystem_vid;
695 u16 subsystem_did;
696 u32 patch_flag;
697#define ATL1C_LINK_PATCH 0x1
698};
093d369d 699static const struct atl1c_platform_patch plats[] = {
903d7ce0
HX
700{0x2060, 0xC1, 0x1019, 0x8152, 0x1},
701{0x2060, 0xC1, 0x1019, 0x2060, 0x1},
702{0x2060, 0xC1, 0x1019, 0xE000, 0x1},
703{0x2062, 0xC0, 0x1019, 0x8152, 0x1},
704{0x2062, 0xC0, 0x1019, 0x2062, 0x1},
705{0x2062, 0xC0, 0x1458, 0xE000, 0x1},
706{0x2062, 0xC1, 0x1019, 0x8152, 0x1},
707{0x2062, 0xC1, 0x1019, 0x2062, 0x1},
708{0x2062, 0xC1, 0x1458, 0xE000, 0x1},
709{0x2062, 0xC1, 0x1565, 0x2802, 0x1},
710{0x2062, 0xC1, 0x1565, 0x2801, 0x1},
711{0x1073, 0xC0, 0x1019, 0x8151, 0x1},
712{0x1073, 0xC0, 0x1019, 0x1073, 0x1},
713{0x1073, 0xC0, 0x1458, 0xE000, 0x1},
714{0x1083, 0xC0, 0x1458, 0xE000, 0x1},
715{0x1083, 0xC0, 0x1019, 0x8151, 0x1},
716{0x1083, 0xC0, 0x1019, 0x1083, 0x1},
717{0x1083, 0xC0, 0x1462, 0x7680, 0x1},
718{0x1083, 0xC0, 0x1565, 0x2803, 0x1},
719{0},
720};
721
093d369d 722static void atl1c_patch_assign(struct atl1c_hw *hw)
903d7ce0 723{
fa0afcd1
CR
724 struct pci_dev *pdev = hw->adapter->pdev;
725 u32 misc_ctrl;
903d7ce0
HX
726 int i = 0;
727
728 hw->msi_lnkpatch = false;
729
730 while (plats[i].pci_did != 0) {
731 if (plats[i].pci_did == hw->device_id &&
732 plats[i].pci_revid == hw->revision_id &&
733 plats[i].subsystem_vid == hw->subsystem_vendor_id &&
734 plats[i].subsystem_did == hw->subsystem_id) {
735 if (plats[i].patch_flag & ATL1C_LINK_PATCH)
736 hw->msi_lnkpatch = true;
737 }
738 i++;
739 }
fa0afcd1
CR
740
741 if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 &&
742 hw->revision_id == L2CB_V21) {
dbedd44e 743 /* config access mode */
fa0afcd1
CR
744 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
745 REG_PCIE_DEV_MISC_CTRL);
746 pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl);
747 misc_ctrl &= ~0x100;
748 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
749 REG_PCIE_DEV_MISC_CTRL);
750 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl);
751 }
903d7ce0 752}
49ce9c2c 753/**
43250ddd
JY
754 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
755 * @adapter: board private structure to initialize
756 *
757 * atl1c_sw_init initializes the Adapter private data structure.
758 * Fields are initialized based on PCI device information and
759 * OS network device settings (MTU size).
760 */
093d369d 761static int atl1c_sw_init(struct atl1c_adapter *adapter)
43250ddd
JY
762{
763 struct atl1c_hw *hw = &adapter->hw;
764 struct pci_dev *pdev = adapter->pdev;
8f574b35
JY
765 u32 revision;
766
43250ddd
JY
767
768 adapter->wol = 0;
762e3023 769 device_set_wakeup_enable(&pdev->dev, false);
43250ddd
JY
770 adapter->link_speed = SPEED_0;
771 adapter->link_duplex = FULL_DUPLEX;
43250ddd 772 adapter->tpd_ring[0].count = 1024;
9f1fd0ef 773 adapter->rfd_ring.count = 512;
43250ddd
JY
774
775 hw->vendor_id = pdev->vendor;
776 hw->device_id = pdev->device;
777 hw->subsystem_vendor_id = pdev->subsystem_vendor;
778 hw->subsystem_id = pdev->subsystem_device;
fa0afcd1 779 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision);
8f574b35 780 hw->revision_id = revision & 0xFF;
43250ddd
JY
781 /* before link up, we assume hibernate is true */
782 hw->hibernate = true;
783 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
784 if (atl1c_setup_mac_funcs(hw) != 0) {
785 dev_err(&pdev->dev, "set mac function pointers failed\n");
786 return -1;
787 }
903d7ce0
HX
788 atl1c_patch_assign(hw);
789
43250ddd
JY
790 hw->intr_mask = IMR_NORMAL_MASK;
791 hw->phy_configured = false;
792 hw->preamble_len = 7;
793 hw->max_frame_size = adapter->netdev->mtu;
43250ddd
JY
794 hw->autoneg_advertised = ADVERTISED_Autoneg;
795 hw->indirect_tab = 0xE4E4E4E4;
796 hw->base_cpu = 0;
797
798 hw->ict = 50000; /* 100ms */
799 hw->smb_timer = 200000; /* 400ms */
43250ddd
JY
800 hw->rx_imt = 200;
801 hw->tx_imt = 1000;
802
803 hw->tpd_burst = 5;
804 hw->rfd_burst = 8;
805 hw->dma_order = atl1c_dma_ord_out;
806 hw->dmar_block = atl1c_dma_req_1024;
43250ddd
JY
807
808 if (atl1c_alloc_queues(adapter)) {
809 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
810 return -ENOMEM;
811 }
812 /* TODO */
813 atl1c_set_rxbufsize(adapter, adapter->netdev);
814 atomic_set(&adapter->irq_sem, 1);
815 spin_lock_init(&adapter->mdio_lock);
a1150a04 816 spin_lock_init(&adapter->hw.intr_mask_lock);
43250ddd
JY
817 set_bit(__AT_DOWN, &adapter->flags);
818
819 return 0;
820}
821
c6060be4 822static inline void atl1c_clean_buffer(struct pci_dev *pdev,
07641c8f 823 struct atl1c_buffer *buffer_info)
c6060be4 824{
4b45e342 825 u16 pci_driection;
c6060be4
JY
826 if (buffer_info->flags & ATL1C_BUFFER_FREE)
827 return;
828 if (buffer_info->dma) {
4b45e342 829 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
85eb5bc3 830 pci_driection = DMA_FROM_DEVICE;
4b45e342 831 else
85eb5bc3 832 pci_driection = DMA_TO_DEVICE;
4b45e342 833
c6060be4 834 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
85eb5bc3
CJ
835 dma_unmap_single(&pdev->dev, buffer_info->dma,
836 buffer_info->length, pci_driection);
c6060be4 837 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
85eb5bc3
CJ
838 dma_unmap_page(&pdev->dev, buffer_info->dma,
839 buffer_info->length, pci_driection);
c6060be4 840 }
07641c8f
EB
841 if (buffer_info->skb)
842 dev_consume_skb_any(buffer_info->skb);
c6060be4
JY
843 buffer_info->dma = 0;
844 buffer_info->skb = NULL;
845 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
846}
49ce9c2c 847/**
43250ddd
JY
848 * atl1c_clean_tx_ring - Free Tx-skb
849 * @adapter: board private structure
d0ea5cbd 850 * @type: type of transmit queue
43250ddd
JY
851 */
852static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
853 enum atl1c_trans_queue type)
854{
855 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
856 struct atl1c_buffer *buffer_info;
857 struct pci_dev *pdev = adapter->pdev;
858 u16 index, ring_count;
859
860 ring_count = tpd_ring->count;
861 for (index = 0; index < ring_count; index++) {
862 buffer_info = &tpd_ring->buffer_info[index];
07641c8f 863 atl1c_clean_buffer(pdev, buffer_info);
43250ddd
JY
864 }
865
47b344b2
RA
866 netdev_reset_queue(adapter->netdev);
867
43250ddd
JY
868 /* Zero out Tx-buffers */
869 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
c6060be4 870 ring_count);
43250ddd
JY
871 atomic_set(&tpd_ring->next_to_clean, 0);
872 tpd_ring->next_to_use = 0;
873}
874
49ce9c2c 875/**
43250ddd
JY
876 * atl1c_clean_rx_ring - Free rx-reservation skbs
877 * @adapter: board private structure
878 */
879static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
880{
9f1fd0ef
HX
881 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
882 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY
883 struct atl1c_buffer *buffer_info;
884 struct pci_dev *pdev = adapter->pdev;
9f1fd0ef 885 int j;
43250ddd 886
9f1fd0ef
HX
887 for (j = 0; j < rfd_ring->count; j++) {
888 buffer_info = &rfd_ring->buffer_info[j];
07641c8f 889 atl1c_clean_buffer(pdev, buffer_info);
43250ddd 890 }
9f1fd0ef
HX
891 /* zero out the descriptor ring */
892 memset(rfd_ring->desc, 0, rfd_ring->size);
893 rfd_ring->next_to_clean = 0;
894 rfd_ring->next_to_use = 0;
895 rrd_ring->next_to_use = 0;
896 rrd_ring->next_to_clean = 0;
43250ddd
JY
897}
898
899/*
900 * Read / Write Ptr Initialize:
901 */
902static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
903{
904 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
9f1fd0ef
HX
905 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
906 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY
907 struct atl1c_buffer *buffer_info;
908 int i, j;
909
910 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
911 tpd_ring[i].next_to_use = 0;
912 atomic_set(&tpd_ring[i].next_to_clean, 0);
913 buffer_info = tpd_ring[i].buffer_info;
914 for (j = 0; j < tpd_ring->count; j++)
c6060be4
JY
915 ATL1C_SET_BUFFER_STATE(&buffer_info[i],
916 ATL1C_BUFFER_FREE);
43250ddd 917 }
9f1fd0ef
HX
918 rfd_ring->next_to_use = 0;
919 rfd_ring->next_to_clean = 0;
920 rrd_ring->next_to_use = 0;
921 rrd_ring->next_to_clean = 0;
922 for (j = 0; j < rfd_ring->count; j++) {
923 buffer_info = &rfd_ring->buffer_info[j];
924 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
43250ddd
JY
925 }
926}
927
49ce9c2c 928/**
43250ddd
JY
929 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
930 * @adapter: board private structure
931 *
932 * Free all transmit software resources
933 */
934static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
935{
936 struct pci_dev *pdev = adapter->pdev;
937
85eb5bc3
CJ
938 dma_free_coherent(&pdev->dev, adapter->ring_header.size,
939 adapter->ring_header.desc, adapter->ring_header.dma);
43250ddd
JY
940 adapter->ring_header.desc = NULL;
941
942 /* Note: just free tdp_ring.buffer_info,
943 * it contain rfd_ring.buffer_info, do not double free */
944 if (adapter->tpd_ring[0].buffer_info) {
945 kfree(adapter->tpd_ring[0].buffer_info);
946 adapter->tpd_ring[0].buffer_info = NULL;
947 }
7b701764
ED
948 if (adapter->rx_page) {
949 put_page(adapter->rx_page);
950 adapter->rx_page = NULL;
951 }
43250ddd
JY
952}
953
49ce9c2c 954/**
8965c1c5 955 * atl1c_setup_ring_resources - allocate Tx / RX descriptor resources
43250ddd
JY
956 * @adapter: board private structure
957 *
958 * Return 0 on success, negative on failure
959 */
960static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
961{
962 struct pci_dev *pdev = adapter->pdev;
963 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
9f1fd0ef
HX
964 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
965 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd 966 struct atl1c_ring_header *ring_header = &adapter->ring_header;
43250ddd
JY
967 int size;
968 int i;
969 int count = 0;
970 int rx_desc_count = 0;
971 u32 offset = 0;
972
9f1fd0ef 973 rrd_ring->count = rfd_ring->count;
43250ddd
JY
974 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
975 tpd_ring[i].count = tpd_ring[0].count;
976
43250ddd
JY
977 /* 2 tpd queue, one high priority queue,
978 * another normal priority queue */
979 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
9f1fd0ef 980 rfd_ring->count);
43250ddd 981 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
b2adaca9 982 if (unlikely(!tpd_ring->buffer_info))
43250ddd 983 goto err_nomem;
b2adaca9 984
43250ddd 985 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
20a1b6bd
GP
986 tpd_ring[i].adapter = adapter;
987 tpd_ring[i].num = i;
43250ddd 988 tpd_ring[i].buffer_info =
64699336 989 (tpd_ring->buffer_info + count);
43250ddd
JY
990 count += tpd_ring[i].count;
991 }
992
9f1fd0ef 993 rfd_ring->buffer_info =
64699336 994 (tpd_ring->buffer_info + count);
9f1fd0ef
HX
995 count += rfd_ring->count;
996 rx_desc_count += rfd_ring->count;
997
43250ddd
JY
998 /*
999 * real ring DMA buffer
1000 * each ring/block may need up to 8 bytes for alignment, hence the
1001 * additional bytes tacked onto the end.
1002 */
1003 ring_header->size = size =
1004 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
1005 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
1006 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
8d5c6836 1007 8 * 4;
43250ddd 1008
750afb08
LC
1009 ring_header->desc = dma_alloc_coherent(&pdev->dev, ring_header->size,
1010 &ring_header->dma, GFP_KERNEL);
43250ddd 1011 if (unlikely(!ring_header->desc)) {
f2a3771a 1012 dev_err(&pdev->dev, "could not get memory for DMA buffer\n");
43250ddd
JY
1013 goto err_nomem;
1014 }
43250ddd
JY
1015 /* init TPD ring */
1016
1017 tpd_ring[0].dma = roundup(ring_header->dma, 8);
1018 offset = tpd_ring[0].dma - ring_header->dma;
1019 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
1020 tpd_ring[i].dma = ring_header->dma + offset;
1021 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
1022 tpd_ring[i].size =
1023 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
1024 offset += roundup(tpd_ring[i].size, 8);
1025 }
1026 /* init RFD ring */
9f1fd0ef
HX
1027 rfd_ring->dma = ring_header->dma + offset;
1028 rfd_ring->desc = (u8 *) ring_header->desc + offset;
1029 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count;
1030 offset += roundup(rfd_ring->size, 8);
43250ddd
JY
1031
1032 /* init RRD ring */
9f1fd0ef
HX
1033 rrd_ring->dma = ring_header->dma + offset;
1034 rrd_ring->desc = (u8 *) ring_header->desc + offset;
1035 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) *
1036 rrd_ring->count;
1037 offset += roundup(rrd_ring->size, 8);
43250ddd 1038
43250ddd
JY
1039 return 0;
1040
1041err_nomem:
1042 kfree(tpd_ring->buffer_info);
1043 return -ENOMEM;
1044}
1045
1046static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
1047{
1048 struct atl1c_hw *hw = &adapter->hw;
9f1fd0ef
HX
1049 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1050 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY
1051 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1052 adapter->tpd_ring;
43250ddd
JY
1053
1054 /* TPD */
1055 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
1056 (u32)((tpd_ring[atl1c_trans_normal].dma &
1057 AT_DMA_HI_ADDR_MASK) >> 32));
1058 /* just enable normal priority TX queue */
0af48336 1059 AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO,
43250ddd
JY
1060 (u32)(tpd_ring[atl1c_trans_normal].dma &
1061 AT_DMA_LO_ADDR_MASK));
0af48336 1062 AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO,
43250ddd
JY
1063 (u32)(tpd_ring[atl1c_trans_high].dma &
1064 AT_DMA_LO_ADDR_MASK));
1065 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
1066 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
1067
1068
1069 /* RFD */
1070 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
9f1fd0ef
HX
1071 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1072 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO,
1073 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK));
43250ddd
JY
1074
1075 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
9f1fd0ef 1076 rfd_ring->count & RFD_RING_SIZE_MASK);
43250ddd
JY
1077 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1078 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1079
1080 /* RRD */
9f1fd0ef
HX
1081 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO,
1082 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK));
43250ddd 1083 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
9f1fd0ef 1084 (rrd_ring->count & RRD_RING_SIZE_MASK));
43250ddd 1085
8f574b35
JY
1086 if (hw->nic_type == athr_l2c_b) {
1087 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
1088 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
1089 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
1090 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
1091 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
1092 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
1093 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
1094 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
1095 }
43250ddd
JY
1096 /* Load all of base address above */
1097 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1098}
1099
1100static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1101{
1102 struct atl1c_hw *hw = &adapter->hw;
59e26eff 1103 int max_pay_load;
43250ddd
JY
1104 u16 tx_offload_thresh;
1105 u32 txq_ctrl_data;
43250ddd 1106
c08b9b2a 1107 tx_offload_thresh = MAX_TSO_FRAME_SIZE;
43250ddd
JY
1108 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1109 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
59e26eff 1110 max_pay_load = pcie_get_readrq(adapter->pdev) >> 8;
81b504b8 1111 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
59e26eff
HX
1112 /*
1113 * if BIOS had changed the dam-read-max-length to an invalid value,
1114 * restore it to default value
1115 */
1116 if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) {
1117 pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN);
1118 hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN;
1119 }
c24588af
HX
1120 txq_ctrl_data =
1121 hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ?
1122 L2CB_TXQ_CFGV : L1C_TXQ_CFGV;
43250ddd
JY
1123
1124 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1125}
1126
1127static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1128{
1129 struct atl1c_hw *hw = &adapter->hw;
1130 u32 rxq_ctrl_data;
1131
1132 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1133 RXQ_RFD_BURST_NUM_SHIFT;
1134
1135 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1136 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
9f1fd0ef 1137
9c528218
HX
1138 /* aspm for gigabit */
1139 if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0)
1140 rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT,
1141 ASPM_THRUPUT_LIMIT_100M);
43250ddd
JY
1142
1143 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1144}
1145
43250ddd
JY
1146static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1147{
1148 struct atl1c_hw *hw = &adapter->hw;
1149 u32 dma_ctrl_data;
1150
37bfccb5
HX
1151 dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) |
1152 DMA_CTRL_RREQ_PRI_DATA |
1153 FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) |
1154 FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) |
1155 FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF);
43250ddd
JY
1156
1157 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1158}
1159
1160/*
1161 * Stop the mac, transmit and receive units
1162 * hw - Struct containing variables accessed by shared code
1163 * return : 0 or idle status (if error)
1164 */
1165static int atl1c_stop_mac(struct atl1c_hw *hw)
1166{
1167 u32 data;
43250ddd
JY
1168
1169 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
027392c2 1170 data &= ~RXQ_CTRL_EN;
43250ddd
JY
1171 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1172
1173 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1174 data &= ~TXQ_CTRL_EN;
0cbec61c 1175 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
43250ddd 1176
969a7ee2 1177 atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY);
43250ddd
JY
1178
1179 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1180 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1181 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1182
969a7ee2
HX
1183 return (int)atl1c_wait_until_idle(hw,
1184 IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY);
43250ddd
JY
1185}
1186
25456e5c 1187static void atl1c_start_mac(struct atl1c_adapter *adapter)
43250ddd 1188{
25456e5c
HX
1189 struct atl1c_hw *hw = &adapter->hw;
1190 u32 mac, txq, rxq;
1191
e8cc063d 1192 hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX;
25456e5c
HX
1193 hw->mac_speed = adapter->link_speed == SPEED_1000 ?
1194 atl1c_mac_speed_1000 : atl1c_mac_speed_10_100;
1195
1196 AT_READ_REG(hw, REG_TXQ_CTRL, &txq);
1197 AT_READ_REG(hw, REG_RXQ_CTRL, &rxq);
1198 AT_READ_REG(hw, REG_MAC_CTRL, &mac);
1199
1200 txq |= TXQ_CTRL_EN;
1201 rxq |= RXQ_CTRL_EN;
1202 mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW |
1203 MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW |
1204 MAC_CTRL_ADD_CRC | MAC_CTRL_PAD |
1205 MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN |
1206 MAC_CTRL_HASH_ALG_CRC32;
1207 if (hw->mac_duplex)
1208 mac |= MAC_CTRL_DUPLX;
1209 else
1210 mac &= ~MAC_CTRL_DUPLX;
1211 mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed);
1212 mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len);
43250ddd 1213
25456e5c
HX
1214 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq);
1215 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq);
1216 AT_WRITE_REG(hw, REG_MAC_CTRL, mac);
43250ddd
JY
1217}
1218
1219/*
1220 * Reset the transmit and receive units; mask and clear all interrupts.
1221 * hw - Struct containing variables accessed by shared code
1222 * return : 0 or idle status (if error)
1223 */
1224static int atl1c_reset_mac(struct atl1c_hw *hw)
1225{
64699336 1226 struct atl1c_adapter *adapter = hw->adapter;
43250ddd 1227 struct pci_dev *pdev = adapter->pdev;
7737fd96 1228 u32 ctrl_data = 0;
43250ddd 1229
8f574b35 1230 atl1c_stop_mac(hw);
43250ddd
JY
1231 /*
1232 * Issue Soft Reset to the MAC. This will reset the chip's
1233 * transmit, receive, DMA. It will not effect
1234 * the current PCI configuration. The global reset bit is self-
1235 * clearing, and should clear within a microsecond.
1236 */
7737fd96
HX
1237 AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data);
1238 ctrl_data |= MASTER_CTRL_OOB_DIS;
1239 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST);
8f574b35 1240
43250ddd
JY
1241 AT_WRITE_FLUSH(hw);
1242 msleep(10);
1243 /* Wait at least 10ms for All module to be Idle */
c930a662 1244
969a7ee2 1245 if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) {
43250ddd 1246 dev_err(&pdev->dev,
c930a662 1247 "MAC state machine can't be idle since"
43250ddd
JY
1248 " disabled for 10ms second\n");
1249 return -1;
1250 }
7737fd96
HX
1251 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data);
1252
1253 /* driver control speed/duplex */
1254 AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data);
1255 AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW);
1256
1257 /* clk switch setting */
1258 AT_READ_REG(hw, REG_SERDES, &ctrl_data);
1259 switch (hw->nic_type) {
1260 case athr_l2c_b:
1261 ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN |
1262 SERDES_MAC_CLK_SLOWDOWN);
1263 AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
1264 break;
1265 case athr_l2c_b2:
1266 case athr_l1d_2:
1267 ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN;
1268 AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
1269 break;
1270 default:
1271 break;
1272 }
ebe22ed9 1273
43250ddd
JY
1274 return 0;
1275}
1276
1277static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1278{
024e1e4d 1279 u16 ctrl_flags = hw->ctrl_flags;
43250ddd 1280
024e1e4d
HX
1281 hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT);
1282 atl1c_set_aspm(hw, SPEED_0);
1283 hw->ctrl_flags = ctrl_flags;
43250ddd
JY
1284}
1285
1286/*
1287 * Set ASPM state.
1288 * Enable/disable L0s/L1 depend on link state.
1289 */
024e1e4d 1290static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed)
43250ddd
JY
1291{
1292 u32 pm_ctrl_data;
024e1e4d 1293 u32 link_l1_timer;
43250ddd
JY
1294
1295 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
024e1e4d
HX
1296 pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN |
1297 PM_CTRL_ASPM_L0S_EN |
1298 PM_CTRL_MAC_ASPM_CHK);
1299 /* L1 timer */
1300 if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1301 pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S;
1302 link_l1_timer =
1303 link_speed == SPEED_1000 || link_speed == SPEED_100 ?
1304 L1D_PMCTRL_L1_ENTRY_TM_16US : 1;
1305 pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1306 L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer);
1307 } else {
1308 link_l1_timer = hw->nic_type == athr_l2c_b ?
1309 L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM;
1310 if (link_speed != SPEED_1000 && link_speed != SPEED_100)
1311 link_l1_timer = 1;
1312 pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1313 PM_CTRL_L1_ENTRY_TIMER, link_l1_timer);
1314 }
496c185c 1315
024e1e4d 1316 /* L0S/L1 enable */
4fc36352 1317 if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0)
024e1e4d
HX
1318 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK;
1319 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1320 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK;
496c185c 1321
024e1e4d 1322 /* l2cb & l1d & l2cb2 & l1d2 */
8f574b35 1323 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
024e1e4d
HX
1324 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1325 pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1326 PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF);
1327 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER |
1328 PM_CTRL_SERDES_PD_EX_L1 |
1329 PM_CTRL_CLK_SWH_L1;
1330 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
1331 PM_CTRL_SERDES_PLL_L1_EN |
1332 PM_CTRL_SERDES_BUFS_RX_L1_EN |
1333 PM_CTRL_SA_DLY_EN |
1334 PM_CTRL_HOTRST);
1335 /* disable l0s if link down or l2cb */
1336 if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b)
496c185c 1337 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
024e1e4d
HX
1338 } else { /* l1c */
1339 pm_ctrl_data =
1340 FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0);
1341 if (link_speed != SPEED_0) {
1342 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN |
1343 PM_CTRL_SERDES_PLL_L1_EN |
1344 PM_CTRL_SERDES_BUFS_RX_L1_EN;
1345 pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 |
1346 PM_CTRL_CLK_SWH_L1 |
1347 PM_CTRL_ASPM_L0S_EN |
1348 PM_CTRL_ASPM_L1_EN);
1349 } else { /* link down */
1350 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1351 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
1352 PM_CTRL_SERDES_PLL_L1_EN |
1353 PM_CTRL_SERDES_BUFS_RX_L1_EN |
1354 PM_CTRL_ASPM_L0S_EN);
8f574b35 1355 }
43250ddd 1356 }
43250ddd 1357 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
8f574b35
JY
1358
1359 return;
43250ddd
JY
1360}
1361
49ce9c2c 1362/**
8965c1c5 1363 * atl1c_configure_mac - Configure Transmit&Receive Unit after Reset
43250ddd
JY
1364 * @adapter: board private structure
1365 *
1366 * Configure the Tx /Rx unit of the MAC after a reset.
1367 */
5e5c0964 1368static int atl1c_configure_mac(struct atl1c_adapter *adapter)
43250ddd
JY
1369{
1370 struct atl1c_hw *hw = &adapter->hw;
1371 u32 master_ctrl_data = 0;
1372 u32 intr_modrt_data;
8f574b35 1373 u32 data;
43250ddd 1374
ebe22ed9
HX
1375 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
1376 master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN |
1377 MASTER_CTRL_RX_ITIMER_EN |
1378 MASTER_CTRL_INT_RDCLR);
43250ddd
JY
1379 /* clear interrupt status */
1380 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1381 /* Clear any WOL status */
1382 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1383 /* set Interrupt Clear Timer
1384 * HW will enable self to assert interrupt event to system after
1385 * waiting x-time for software to notify it accept interrupt.
1386 */
8f574b35
JY
1387
1388 data = CLK_GATING_EN_ALL;
1389 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
1390 if (hw->nic_type == athr_l2c_b)
1391 data &= ~CLK_GATING_RXMAC_EN;
1392 } else
1393 data = 0;
1394 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
1395
43250ddd
JY
1396 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1397 hw->ict & INT_RETRIG_TIMER_MASK);
1398
1399 atl1c_configure_des_ring(adapter);
1400
1401 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1402 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1403 IRQ_MODRT_TX_TIMER_SHIFT;
1404 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1405 IRQ_MODRT_RX_TIMER_SHIFT;
1406 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1407 master_ctrl_data |=
1408 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1409 }
1410
1411 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1412 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1413
8f574b35 1414 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
43250ddd
JY
1415 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1416
8d5c6836
HX
1417 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1418 hw->smb_timer & SMB_STAT_TIMER_MASK);
43250ddd 1419
43250ddd
JY
1420 /* set MTU */
1421 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1422 VLAN_HLEN + ETH_FCS_LEN);
43250ddd
JY
1423
1424 atl1c_configure_tx(adapter);
1425 atl1c_configure_rx(adapter);
43250ddd
JY
1426 atl1c_configure_dma(adapter);
1427
1428 return 0;
1429}
1430
5e5c0964
HX
1431static int atl1c_configure(struct atl1c_adapter *adapter)
1432{
1433 struct net_device *netdev = adapter->netdev;
1434 int num;
1435
1436 atl1c_init_ring_ptrs(adapter);
1437 atl1c_set_multi(netdev);
1438 atl1c_restore_vlan(adapter);
1439
a9d6df64 1440 num = atl1c_alloc_rx_buffer(adapter, false);
5e5c0964
HX
1441 if (unlikely(num == 0))
1442 return -ENOMEM;
1443
1444 if (atl1c_configure_mac(adapter))
1445 return -EIO;
1446
1447 return 0;
1448}
1449
43250ddd
JY
1450static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1451{
1452 u16 hw_reg_addr = 0;
1453 unsigned long *stats_item = NULL;
1454 u32 data;
1455
1456 /* update rx status */
1457 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1458 stats_item = &adapter->hw_stats.rx_ok;
1459 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1460 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1461 *stats_item += data;
1462 stats_item++;
1463 hw_reg_addr += 4;
1464 }
1465/* update tx status */
1466 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1467 stats_item = &adapter->hw_stats.tx_ok;
1468 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1469 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1470 *stats_item += data;
1471 stats_item++;
1472 hw_reg_addr += 4;
1473 }
1474}
1475
49ce9c2c 1476/**
43250ddd
JY
1477 * atl1c_get_stats - Get System Network Statistics
1478 * @netdev: network interface device structure
1479 *
1480 * Returns the address of the device statistics structure.
1481 * The statistics are actually updated from the timer callback.
1482 */
1483static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1484{
1485 struct atl1c_adapter *adapter = netdev_priv(netdev);
1486 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
a2c483a1 1487 struct net_device_stats *net_stats = &netdev->stats;
43250ddd
JY
1488
1489 atl1c_update_hw_stats(adapter);
43250ddd
JY
1490 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1491 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1492 net_stats->multicast = hw_stats->rx_mcast;
1493 net_stats->collisions = hw_stats->tx_1_col +
8560258f
SD
1494 hw_stats->tx_2_col +
1495 hw_stats->tx_late_col +
1496 hw_stats->tx_abort_col;
1497
1498 net_stats->rx_errors = hw_stats->rx_frag +
1499 hw_stats->rx_fcs_err +
1500 hw_stats->rx_len_err +
1501 hw_stats->rx_sz_ov +
1502 hw_stats->rx_rrd_ov +
1503 hw_stats->rx_align_err +
1504 hw_stats->rx_rxf_ov;
1505
43250ddd
JY
1506 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1507 net_stats->rx_length_errors = hw_stats->rx_len_err;
1508 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1509 net_stats->rx_frame_errors = hw_stats->rx_align_err;
8560258f 1510 net_stats->rx_dropped = hw_stats->rx_rrd_ov;
43250ddd 1511
8560258f
SD
1512 net_stats->tx_errors = hw_stats->tx_late_col +
1513 hw_stats->tx_abort_col +
1514 hw_stats->tx_underrun +
1515 hw_stats->tx_trunc;
43250ddd 1516
43250ddd
JY
1517 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1518 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1519 net_stats->tx_window_errors = hw_stats->tx_late_col;
1520
8560258f
SD
1521 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors;
1522 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors;
1523
a2c483a1 1524 return net_stats;
43250ddd
JY
1525}
1526
1527static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1528{
1529 u16 phy_data;
1530
1531 spin_lock(&adapter->mdio_lock);
1532 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1533 spin_unlock(&adapter->mdio_lock);
1534}
1535
a1150a04 1536static int atl1c_clean_tx(struct napi_struct *napi, int budget)
43250ddd 1537{
20a1b6bd
GP
1538 struct atl1c_tpd_ring *tpd_ring =
1539 container_of(napi, struct atl1c_tpd_ring, napi);
1540 struct atl1c_adapter *adapter = tpd_ring->adapter;
43250ddd 1541 struct atl1c_buffer *buffer_info;
c6060be4 1542 struct pci_dev *pdev = adapter->pdev;
43250ddd
JY
1543 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1544 u16 hw_next_to_clean;
47b344b2 1545 unsigned int total_bytes = 0, total_packets = 0;
a1150a04 1546 unsigned long flags;
43250ddd 1547
a1150a04 1548 AT_READ_REGW(&adapter->hw, REG_TPD_PRI0_CIDX, &hw_next_to_clean);
43250ddd
JY
1549
1550 while (next_to_clean != hw_next_to_clean) {
1551 buffer_info = &tpd_ring->buffer_info[next_to_clean];
47b344b2
RA
1552 if (buffer_info->skb) {
1553 total_bytes += buffer_info->skb->len;
1554 total_packets++;
1555 }
07641c8f 1556 atl1c_clean_buffer(pdev, buffer_info);
43250ddd
JY
1557 if (++next_to_clean == tpd_ring->count)
1558 next_to_clean = 0;
1559 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1560 }
1561
47b344b2
RA
1562 netdev_completed_queue(adapter->netdev, total_packets, total_bytes);
1563
43250ddd
JY
1564 if (netif_queue_stopped(adapter->netdev) &&
1565 netif_carrier_ok(adapter->netdev)) {
1566 netif_wake_queue(adapter->netdev);
1567 }
1568
a1150a04
GP
1569 if (total_packets < budget) {
1570 napi_complete_done(napi, total_packets);
1571 spin_lock_irqsave(&adapter->hw.intr_mask_lock, flags);
1572 adapter->hw.intr_mask |= ISR_TX_PKT;
1573 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1574 spin_unlock_irqrestore(&adapter->hw.intr_mask_lock, flags);
1575 return total_packets;
1576 }
1577 return budget;
43250ddd
JY
1578}
1579
49ce9c2c 1580/**
43250ddd
JY
1581 * atl1c_intr - Interrupt Handler
1582 * @irq: interrupt number
1583 * @data: pointer to a network interface device structure
43250ddd
JY
1584 */
1585static irqreturn_t atl1c_intr(int irq, void *data)
1586{
1587 struct net_device *netdev = data;
1588 struct atl1c_adapter *adapter = netdev_priv(netdev);
1589 struct pci_dev *pdev = adapter->pdev;
1590 struct atl1c_hw *hw = &adapter->hw;
1591 int max_ints = AT_MAX_INT_WORK;
1592 int handled = IRQ_NONE;
1593 u32 status;
1594 u32 reg_data;
1595
1596 do {
1597 AT_READ_REG(hw, REG_ISR, &reg_data);
1598 status = reg_data & hw->intr_mask;
1599
1600 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1601 if (max_ints != AT_MAX_INT_WORK)
1602 handled = IRQ_HANDLED;
1603 break;
1604 }
1605 /* link event */
1606 if (status & ISR_GPHY)
1607 atl1c_clear_phy_int(adapter);
1608 /* Ack ISR */
1609 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1610 if (status & ISR_RX_PKT) {
1611 if (likely(napi_schedule_prep(&adapter->napi))) {
a1150a04 1612 spin_lock(&hw->intr_mask_lock);
43250ddd
JY
1613 hw->intr_mask &= ~ISR_RX_PKT;
1614 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
a1150a04 1615 spin_unlock(&hw->intr_mask_lock);
43250ddd
JY
1616 __napi_schedule(&adapter->napi);
1617 }
1618 }
a1150a04 1619 if (status & ISR_TX_PKT) {
20a1b6bd 1620 if (napi_schedule_prep(&adapter->tpd_ring[0].napi)) {
a1150a04
GP
1621 spin_lock(&hw->intr_mask_lock);
1622 hw->intr_mask &= ~ISR_TX_PKT;
1623 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1624 spin_unlock(&hw->intr_mask_lock);
20a1b6bd 1625 __napi_schedule(&adapter->tpd_ring[0].napi);
a1150a04
GP
1626 }
1627 }
43250ddd
JY
1628
1629 handled = IRQ_HANDLED;
1630 /* check if PCIE PHY Link down */
1631 if (status & ISR_ERROR) {
1632 if (netif_msg_hw(adapter))
1633 dev_err(&pdev->dev,
1634 "atl1c hardware error (status = 0x%x)\n",
1635 status & ISR_ERROR);
1636 /* reset MAC */
78315457 1637 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
cb190546 1638 schedule_work(&adapter->common_task);
8f574b35 1639 return IRQ_HANDLED;
43250ddd
JY
1640 }
1641
1642 if (status & ISR_OVER)
1643 if (netif_msg_intr(adapter))
1644 dev_warn(&pdev->dev,
af901ca1 1645 "TX/RX overflow (status = 0x%x)\n",
43250ddd
JY
1646 status & ISR_OVER);
1647
1648 /* link event */
1649 if (status & (ISR_GPHY | ISR_MANUAL)) {
a2c483a1 1650 netdev->stats.tx_carrier_errors++;
43250ddd
JY
1651 atl1c_link_chg_event(adapter);
1652 break;
1653 }
1654
1655 } while (--max_ints > 0);
1656 /* re-enable Interrupt*/
1657 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1658 return handled;
1659}
1660
1661static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1662 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1663{
b0390009
GP
1664 if (adapter->hw.nic_type == athr_mt) {
1665 if (prrs->word3 & RRS_MT_PROT_ID_TCPUDP)
1666 skb->ip_summed = CHECKSUM_UNNECESSARY;
1667 return;
1668 }
43250ddd
JY
1669 /*
1670 * The pid field in RRS in not correct sometimes, so we
1671 * cannot figure out if the packet is fragmented or not,
1672 * so we tell the KERNEL CHECKSUM_NONE
1673 */
bc8acf2c 1674 skb_checksum_none_assert(skb);
43250ddd
JY
1675}
1676
a9d6df64
SPL
1677static struct sk_buff *atl1c_alloc_skb(struct atl1c_adapter *adapter,
1678 bool napi_mode)
7b701764
ED
1679{
1680 struct sk_buff *skb;
1681 struct page *page;
1682
a9d6df64
SPL
1683 if (adapter->rx_frag_size > PAGE_SIZE) {
1684 if (likely(napi_mode))
1685 return napi_alloc_skb(&adapter->napi,
1686 adapter->rx_buffer_len);
1687 else
1688 return netdev_alloc_skb_ip_align(adapter->netdev,
1689 adapter->rx_buffer_len);
1690 }
7b701764
ED
1691
1692 page = adapter->rx_page;
1693 if (!page) {
1694 adapter->rx_page = page = alloc_page(GFP_ATOMIC);
1695 if (unlikely(!page))
1696 return NULL;
1697 adapter->rx_page_offset = 0;
1698 }
1699
1700 skb = build_skb(page_address(page) + adapter->rx_page_offset,
1701 adapter->rx_frag_size);
1702 if (likely(skb)) {
a9d6df64 1703 skb_reserve(skb, NET_SKB_PAD + NET_IP_ALIGN);
7b701764
ED
1704 adapter->rx_page_offset += adapter->rx_frag_size;
1705 if (adapter->rx_page_offset >= PAGE_SIZE)
1706 adapter->rx_page = NULL;
1707 else
1708 get_page(page);
1709 }
1710 return skb;
1711}
1712
a9d6df64 1713static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, bool napi_mode)
43250ddd 1714{
9f1fd0ef 1715 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
43250ddd
JY
1716 struct pci_dev *pdev = adapter->pdev;
1717 struct atl1c_buffer *buffer_info, *next_info;
1718 struct sk_buff *skb;
1719 void *vir_addr = NULL;
1720 u16 num_alloc = 0;
1721 u16 rfd_next_to_use, next_next;
1722 struct atl1c_rx_free_desc *rfd_desc;
ac574804 1723 dma_addr_t mapping;
43250ddd
JY
1724
1725 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1726 if (++next_next == rfd_ring->count)
1727 next_next = 0;
1728 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1729 next_info = &rfd_ring->buffer_info[next_next];
1730
c6060be4 1731 while (next_info->flags & ATL1C_BUFFER_FREE) {
43250ddd
JY
1732 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1733
a9d6df64 1734 skb = atl1c_alloc_skb(adapter, napi_mode);
43250ddd
JY
1735 if (unlikely(!skb)) {
1736 if (netif_msg_rx_err(adapter))
1737 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1738 break;
1739 }
1740
1741 /*
1742 * Make buffer alignment 2 beyond a 16 byte boundary
1743 * this will result in a 16 byte aligned IP header after
1744 * the 14 byte MAC header is removed
1745 */
1746 vir_addr = skb->data;
c6060be4 1747 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
43250ddd
JY
1748 buffer_info->skb = skb;
1749 buffer_info->length = adapter->rx_buffer_len;
85eb5bc3
CJ
1750 mapping = dma_map_single(&pdev->dev, vir_addr,
1751 buffer_info->length, DMA_FROM_DEVICE);
1752 if (unlikely(dma_mapping_error(&pdev->dev, mapping))) {
ac574804
HX
1753 dev_kfree_skb(skb);
1754 buffer_info->skb = NULL;
1755 buffer_info->length = 0;
1756 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
1757 netif_warn(adapter, rx_err, adapter->netdev, "RX pci_map_single failed");
1758 break;
1759 }
1760 buffer_info->dma = mapping;
4b45e342
JY
1761 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1762 ATL1C_PCIMAP_FROMDEVICE);
43250ddd
JY
1763 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1764 rfd_next_to_use = next_next;
1765 if (++next_next == rfd_ring->count)
1766 next_next = 0;
1767 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1768 next_info = &rfd_ring->buffer_info[next_next];
1769 num_alloc++;
1770 }
1771
1772 if (num_alloc) {
1773 /* TODO: update mailbox here */
1774 wmb();
1775 rfd_ring->next_to_use = rfd_next_to_use;
9f1fd0ef 1776 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX,
43250ddd
JY
1777 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1778 }
1779
1780 return num_alloc;
1781}
1782
1783static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1784 struct atl1c_recv_ret_status *rrs, u16 num)
1785{
1786 u16 i;
1787 /* the relationship between rrd and rfd is one map one */
1788 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1789 rrd_ring->next_to_clean)) {
1790 rrs->word3 &= ~RRS_RXD_UPDATED;
1791 if (++rrd_ring->next_to_clean == rrd_ring->count)
1792 rrd_ring->next_to_clean = 0;
1793 }
1794}
1795
1796static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1797 struct atl1c_recv_ret_status *rrs, u16 num)
1798{
1799 u16 i;
1800 u16 rfd_index;
1801 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1802
1803 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1804 RRS_RX_RFD_INDEX_MASK;
1805 for (i = 0; i < num; i++) {
1806 buffer_info[rfd_index].skb = NULL;
c6060be4
JY
1807 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1808 ATL1C_BUFFER_FREE);
43250ddd
JY
1809 if (++rfd_index == rfd_ring->count)
1810 rfd_index = 0;
1811 }
1812 rfd_ring->next_to_clean = rfd_index;
1813}
1814
9f1fd0ef 1815static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
43250ddd
JY
1816 int *work_done, int work_to_do)
1817{
1818 u16 rfd_num, rfd_index;
1819 u16 count = 0;
1820 u16 length;
1821 struct pci_dev *pdev = adapter->pdev;
1822 struct net_device *netdev = adapter->netdev;
9f1fd0ef
HX
1823 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1824 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY
1825 struct sk_buff *skb;
1826 struct atl1c_recv_ret_status *rrs;
1827 struct atl1c_buffer *buffer_info;
1828
1829 while (1) {
1830 if (*work_done >= work_to_do)
1831 break;
1832 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1833 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1834 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1835 RRS_RX_RFD_CNT_MASK;
37b76c69 1836 if (unlikely(rfd_num != 1))
43250ddd
JY
1837 /* TODO support mul rfd*/
1838 if (netif_msg_rx_err(adapter))
1839 dev_warn(&pdev->dev,
1840 "Multi rfd not support yet!\n");
1841 goto rrs_checked;
1842 } else {
1843 break;
1844 }
1845rrs_checked:
1846 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1847 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1848 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
7509ef2a
CIK
1849 if (netif_msg_rx_err(adapter))
1850 dev_warn(&pdev->dev,
1851 "wrong packet! rrs word3 is %x\n",
1852 rrs->word3);
43250ddd
JY
1853 continue;
1854 }
1855
1856 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1857 RRS_PKT_SIZE_MASK);
1858 /* Good Receive */
1859 if (likely(rfd_num == 1)) {
1860 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1861 RRS_RX_RFD_INDEX_MASK;
1862 buffer_info = &rfd_ring->buffer_info[rfd_index];
85eb5bc3
CJ
1863 dma_unmap_single(&pdev->dev, buffer_info->dma,
1864 buffer_info->length, DMA_FROM_DEVICE);
43250ddd
JY
1865 skb = buffer_info->skb;
1866 } else {
1867 /* TODO */
1868 if (netif_msg_rx_err(adapter))
1869 dev_warn(&pdev->dev,
1870 "Multi rfd not support yet!\n");
1871 break;
1872 }
1873 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1874 skb_put(skb, length - ETH_FCS_LEN);
1875 skb->protocol = eth_type_trans(skb, netdev);
43250ddd 1876 atl1c_rx_checksum(adapter, skb, rrs);
46facce9 1877 if (rrs->word3 & RRS_VLAN_INS) {
43250ddd
JY
1878 u16 vlan;
1879
1880 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1881 vlan = le16_to_cpu(vlan);
86a9bad3 1882 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
46facce9 1883 }
e75a2e02 1884 napi_gro_receive(&adapter->napi, skb);
43250ddd 1885
43250ddd
JY
1886 (*work_done)++;
1887 count++;
1888 }
1889 if (count)
a9d6df64 1890 atl1c_alloc_rx_buffer(adapter, true);
43250ddd
JY
1891}
1892
49ce9c2c 1893/**
43250ddd 1894 * atl1c_clean - NAPI Rx polling callback
d0ea5cbd
JB
1895 * @napi: napi info
1896 * @budget: limit of packets to clean
43250ddd
JY
1897 */
1898static int atl1c_clean(struct napi_struct *napi, int budget)
1899{
1900 struct atl1c_adapter *adapter =
1901 container_of(napi, struct atl1c_adapter, napi);
1902 int work_done = 0;
a1150a04 1903 unsigned long flags;
43250ddd
JY
1904
1905 /* Keep link state information with original netdev */
1906 if (!netif_carrier_ok(adapter->netdev))
1907 goto quit_polling;
1908 /* just enable one RXQ */
9f1fd0ef 1909 atl1c_clean_rx_irq(adapter, &work_done, budget);
43250ddd
JY
1910
1911 if (work_done < budget) {
1912quit_polling:
6ad20165 1913 napi_complete_done(napi, work_done);
a1150a04 1914 spin_lock_irqsave(&adapter->hw.intr_mask_lock, flags);
43250ddd
JY
1915 adapter->hw.intr_mask |= ISR_RX_PKT;
1916 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
a1150a04 1917 spin_unlock_irqrestore(&adapter->hw.intr_mask_lock, flags);
43250ddd
JY
1918 }
1919 return work_done;
1920}
1921
1922#ifdef CONFIG_NET_POLL_CONTROLLER
1923
1924/*
1925 * Polling 'interrupt' - used by things like netconsole to send skbs
1926 * without having to re-enable interrupts. It's not called while
1927 * the interrupt routine is executing.
1928 */
1929static void atl1c_netpoll(struct net_device *netdev)
1930{
1931 struct atl1c_adapter *adapter = netdev_priv(netdev);
1932
1933 disable_irq(adapter->pdev->irq);
1934 atl1c_intr(adapter->pdev->irq, netdev);
1935 enable_irq(adapter->pdev->irq);
1936}
1937#endif
1938
1939static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1940{
1941 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1942 u16 next_to_use = 0;
1943 u16 next_to_clean = 0;
1944
1945 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1946 next_to_use = tpd_ring->next_to_use;
1947
1948 return (u16)(next_to_clean > next_to_use) ?
1949 (next_to_clean - next_to_use - 1) :
1950 (tpd_ring->count + next_to_clean - next_to_use - 1);
1951}
1952
1953/*
1954 * get next usable tpd
1955 * Note: should call atl1c_tdp_avail to make sure
1956 * there is enough tpd to use
1957 */
1958static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1959 enum atl1c_trans_queue type)
1960{
1961 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1962 struct atl1c_tpd_desc *tpd_desc;
1963 u16 next_to_use = 0;
1964
1965 next_to_use = tpd_ring->next_to_use;
1966 if (++tpd_ring->next_to_use == tpd_ring->count)
1967 tpd_ring->next_to_use = 0;
1968 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1969 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1970 return tpd_desc;
1971}
1972
1973static struct atl1c_buffer *
1974atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1975{
1976 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1977
1978 return &tpd_ring->buffer_info[tpd -
1979 (struct atl1c_tpd_desc *)tpd_ring->desc];
1980}
1981
1982/* Calculate the transmit packet descript needed*/
1983static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
1984{
1985 u16 tpd_req;
1986 u16 proto_hdr_len = 0;
1987
1988 tpd_req = skb_shinfo(skb)->nr_frags + 1;
1989
1990 if (skb_is_gso(skb)) {
1991 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1992 if (proto_hdr_len < skb_headlen(skb))
1993 tpd_req++;
1994 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
1995 tpd_req++;
1996 }
1997 return tpd_req;
1998}
1999
2000static int atl1c_tso_csum(struct atl1c_adapter *adapter,
2001 struct sk_buff *skb,
2002 struct atl1c_tpd_desc **tpd,
2003 enum atl1c_trans_queue type)
2004{
2005 struct pci_dev *pdev = adapter->pdev;
0f5c113c 2006 unsigned short offload_type;
43250ddd
JY
2007 u8 hdr_len;
2008 u32 real_len;
43250ddd
JY
2009
2010 if (skb_is_gso(skb)) {
0f5c113c 2011 int err;
2012
2013 err = skb_cow_head(skb, 0);
2014 if (err < 0)
2015 return err;
2016
43250ddd
JY
2017 offload_type = skb_shinfo(skb)->gso_type;
2018
2019 if (offload_type & SKB_GSO_TCPV4) {
2020 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
2021 + ntohs(ip_hdr(skb)->tot_len));
2022
2023 if (real_len < skb->len)
2024 pskb_trim(skb, real_len);
2025
2026 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2027 if (unlikely(skb->len == hdr_len)) {
2028 /* only xsum need */
2029 if (netif_msg_tx_queued(adapter))
2030 dev_warn(&pdev->dev,
2031 "IPV4 tso with zero data??\n");
2032 goto check_sum;
2033 } else {
2034 ip_hdr(skb)->check = 0;
2035 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
2036 ip_hdr(skb)->saddr,
2037 ip_hdr(skb)->daddr,
2038 0, IPPROTO_TCP, 0);
2039 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
2040 }
2041 }
2042
2043 if (offload_type & SKB_GSO_TCPV6) {
2044 struct atl1c_tpd_ext_desc *etpd =
2045 *(struct atl1c_tpd_ext_desc **)(tpd);
2046
2047 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
2048 *tpd = atl1c_get_tpd(adapter, type);
2049 ipv6_hdr(skb)->payload_len = 0;
2050 /* check payload == 0 byte ? */
2051 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2052 if (unlikely(skb->len == hdr_len)) {
2053 /* only xsum need */
2054 if (netif_msg_tx_queued(adapter))
2055 dev_warn(&pdev->dev,
2056 "IPV6 tso with zero data??\n");
2057 goto check_sum;
2058 } else
4d4c3783
HK
2059 tcp_v6_gso_csum_prep(skb);
2060
43250ddd
JY
2061 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
2062 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
2063 etpd->pkt_len = cpu_to_le32(skb->len);
2064 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
2065 }
2066
2067 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
2068 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
2069 TPD_TCPHDR_OFFSET_SHIFT;
2070 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
2071 TPD_MSS_SHIFT;
2072 return 0;
2073 }
2074
2075check_sum:
2076 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2077 u8 css, cso;
0d0b1672 2078 cso = skb_checksum_start_offset(skb);
43250ddd
JY
2079
2080 if (unlikely(cso & 0x1)) {
2081 if (netif_msg_tx_err(adapter))
2082 dev_err(&adapter->pdev->dev,
2083 "payload offset should not an event number\n");
2084 return -1;
2085 } else {
2086 css = cso + skb->csum_offset;
2087
2088 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
2089 TPD_PLOADOFFSET_SHIFT;
2090 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
2091 TPD_CCSUM_OFFSET_SHIFT;
2092 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
2093 }
2094 }
2095 return 0;
2096}
2097
ac574804
HX
2098static void atl1c_tx_rollback(struct atl1c_adapter *adpt,
2099 struct atl1c_tpd_desc *first_tpd,
2100 enum atl1c_trans_queue type)
2101{
2102 struct atl1c_tpd_ring *tpd_ring = &adpt->tpd_ring[type];
2103 struct atl1c_buffer *buffer_info;
2104 struct atl1c_tpd_desc *tpd;
2105 u16 first_index, index;
2106
2107 first_index = first_tpd - (struct atl1c_tpd_desc *)tpd_ring->desc;
2108 index = first_index;
2109 while (index != tpd_ring->next_to_use) {
2110 tpd = ATL1C_TPD_DESC(tpd_ring, index);
2111 buffer_info = &tpd_ring->buffer_info[index];
07641c8f 2112 atl1c_clean_buffer(adpt->pdev, buffer_info);
ac574804
HX
2113 memset(tpd, 0, sizeof(struct atl1c_tpd_desc));
2114 if (++index == tpd_ring->count)
2115 index = 0;
2116 }
2117 tpd_ring->next_to_use = first_index;
2118}
2119
2120static int atl1c_tx_map(struct atl1c_adapter *adapter,
43250ddd
JY
2121 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2122 enum atl1c_trans_queue type)
2123{
2124 struct atl1c_tpd_desc *use_tpd = NULL;
2125 struct atl1c_buffer *buffer_info = NULL;
2126 u16 buf_len = skb_headlen(skb);
2127 u16 map_len = 0;
2128 u16 mapped_len = 0;
2129 u16 hdr_len = 0;
2130 u16 nr_frags;
2131 u16 f;
2132 int tso;
2133
2134 nr_frags = skb_shinfo(skb)->nr_frags;
2135 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2136 if (tso) {
2137 /* TSO */
2138 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2139 use_tpd = tpd;
2140
2141 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2142 buffer_info->length = map_len;
85eb5bc3
CJ
2143 buffer_info->dma = dma_map_single(&adapter->pdev->dev,
2144 skb->data, hdr_len,
2145 DMA_TO_DEVICE);
2146 if (unlikely(dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)))
ac574804 2147 goto err_dma;
7cb08d7f 2148 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
4b45e342
JY
2149 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2150 ATL1C_PCIMAP_TODEVICE);
43250ddd
JY
2151 mapped_len += map_len;
2152 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2153 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2154 }
2155
2156 if (mapped_len < buf_len) {
2157 /* mapped_len == 0, means we should use the first tpd,
2158 which is given by caller */
2159 if (mapped_len == 0)
2160 use_tpd = tpd;
2161 else {
2162 use_tpd = atl1c_get_tpd(adapter, type);
43250ddd
JY
2163 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2164 }
2165 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2166 buffer_info->length = buf_len - mapped_len;
2167 buffer_info->dma =
85eb5bc3
CJ
2168 dma_map_single(&adapter->pdev->dev,
2169 skb->data + mapped_len,
2170 buffer_info->length, DMA_TO_DEVICE);
2171 if (unlikely(dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)))
ac574804
HX
2172 goto err_dma;
2173
c6060be4 2174 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
4b45e342
JY
2175 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2176 ATL1C_PCIMAP_TODEVICE);
43250ddd
JY
2177 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2178 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2179 }
2180
2181 for (f = 0; f < nr_frags; f++) {
d7840976 2182 skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
43250ddd
JY
2183
2184 use_tpd = atl1c_get_tpd(adapter, type);
2185 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2186
2187 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
9e903e08 2188 buffer_info->length = skb_frag_size(frag);
8d1bb865
IC
2189 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
2190 frag, 0,
2191 buffer_info->length,
5d6bcdfe 2192 DMA_TO_DEVICE);
ac574804
HX
2193 if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma))
2194 goto err_dma;
2195
c6060be4 2196 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
4b45e342
JY
2197 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2198 ATL1C_PCIMAP_TODEVICE);
43250ddd
JY
2199 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2200 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2201 }
2202
2203 /* The last tpd */
2204 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2205 /* The last buffer info contain the skb address,
2206 so it will be free after unmap */
2207 buffer_info->skb = skb;
ac574804
HX
2208
2209 return 0;
2210
2211err_dma:
2212 buffer_info->dma = 0;
2213 buffer_info->length = 0;
2214 return -1;
43250ddd
JY
2215}
2216
d7ab6419
GP
2217static void atl1c_tx_queue(struct atl1c_adapter *adapter,
2218 enum atl1c_trans_queue type)
43250ddd
JY
2219{
2220 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
0af48336 2221 u16 reg;
43250ddd 2222
0af48336
HX
2223 reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX;
2224 AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use);
43250ddd
JY
2225}
2226
61357325
SH
2227static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2228 struct net_device *netdev)
43250ddd
JY
2229{
2230 struct atl1c_adapter *adapter = netdev_priv(netdev);
b70d846c 2231 u16 tpd_req;
43250ddd
JY
2232 struct atl1c_tpd_desc *tpd;
2233 enum atl1c_trans_queue type = atl1c_trans_normal;
2234
2235 if (test_bit(__AT_DOWN, &adapter->flags)) {
2236 dev_kfree_skb_any(skb);
2237 return NETDEV_TX_OK;
2238 }
2239
2240 tpd_req = atl1c_cal_tpd_req(skb);
43250ddd
JY
2241
2242 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2243 /* no enough descriptor, just stop queue */
d7ab6419 2244 atl1c_tx_queue(adapter, type);
43250ddd 2245 netif_stop_queue(netdev);
43250ddd
JY
2246 return NETDEV_TX_BUSY;
2247 }
2248
2249 tpd = atl1c_get_tpd(adapter, type);
2250
2251 /* do TSO and check sum */
2252 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
d7ab6419 2253 atl1c_tx_queue(adapter, type);
43250ddd
JY
2254 dev_kfree_skb_any(skb);
2255 return NETDEV_TX_OK;
2256 }
2257
df8a39de
JP
2258 if (unlikely(skb_vlan_tag_present(skb))) {
2259 u16 vlan = skb_vlan_tag_get(skb);
43250ddd
JY
2260 __le16 tag;
2261
2262 vlan = cpu_to_le16(vlan);
2263 AT_VLAN_TO_TAG(vlan, tag);
2264 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2265 tpd->vlan_tag = tag;
2266 }
2267
2268 if (skb_network_offset(skb) != ETH_HLEN)
2269 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2270
ac574804
HX
2271 if (atl1c_tx_map(adapter, skb, tpd, type) < 0) {
2272 netif_info(adapter, tx_done, adapter->netdev,
62d4fd47 2273 "tx-skb dropped due to dma error\n");
ac574804
HX
2274 /* roll back tpd/buffer */
2275 atl1c_tx_rollback(adapter, tpd, type);
07641c8f 2276 dev_kfree_skb_any(skb);
ac574804 2277 } else {
d7ab6419
GP
2278 bool more = netdev_xmit_more();
2279
2280 if (__netdev_sent_queue(adapter->netdev, skb->len, more))
2281 atl1c_tx_queue(adapter, type);
ac574804 2282 }
43250ddd 2283
43250ddd
JY
2284 return NETDEV_TX_OK;
2285}
2286
2287static void atl1c_free_irq(struct atl1c_adapter *adapter)
2288{
2289 struct net_device *netdev = adapter->netdev;
2290
2291 free_irq(adapter->pdev->irq, netdev);
2292
2293 if (adapter->have_msi)
2294 pci_disable_msi(adapter->pdev);
2295}
2296
2297static int atl1c_request_irq(struct atl1c_adapter *adapter)
2298{
2299 struct pci_dev *pdev = adapter->pdev;
2300 struct net_device *netdev = adapter->netdev;
2301 int flags = 0;
2302 int err = 0;
2303
2304 adapter->have_msi = true;
2305 err = pci_enable_msi(adapter->pdev);
2306 if (err) {
2307 if (netif_msg_ifup(adapter))
2308 dev_err(&pdev->dev,
2309 "Unable to allocate MSI interrupt Error: %d\n",
2310 err);
2311 adapter->have_msi = false;
93f7fab4 2312 }
43250ddd
JY
2313
2314 if (!adapter->have_msi)
2315 flags |= IRQF_SHARED;
9aff7e92 2316 err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
43250ddd
JY
2317 netdev->name, netdev);
2318 if (err) {
2319 if (netif_msg_ifup(adapter))
2320 dev_err(&pdev->dev,
2321 "Unable to allocate interrupt Error: %d\n",
2322 err);
2323 if (adapter->have_msi)
2324 pci_disable_msi(adapter->pdev);
2325 return err;
2326 }
2327 if (netif_msg_ifup(adapter))
2328 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2329 return err;
2330}
2331
5e5c0964
HX
2332
2333static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter)
2334{
2335 /* release tx-pending skbs and reset tx/rx ring index */
2336 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2337 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2338 atl1c_clean_rx_ring(adapter);
2339}
2340
0fb1e54e 2341static int atl1c_up(struct atl1c_adapter *adapter)
43250ddd
JY
2342{
2343 struct net_device *netdev = adapter->netdev;
43250ddd 2344 int err;
43250ddd
JY
2345
2346 netif_carrier_off(netdev);
43250ddd 2347
5e5c0964
HX
2348 err = atl1c_configure(adapter);
2349 if (unlikely(err))
43250ddd 2350 goto err_up;
43250ddd
JY
2351
2352 err = atl1c_request_irq(adapter);
2353 if (unlikely(err))
2354 goto err_up;
2355
5e5c0964 2356 atl1c_check_link_status(adapter);
43250ddd
JY
2357 clear_bit(__AT_DOWN, &adapter->flags);
2358 napi_enable(&adapter->napi);
20a1b6bd 2359 napi_enable(&adapter->tpd_ring[0].napi);
43250ddd 2360 atl1c_irq_enable(adapter);
43250ddd
JY
2361 netif_start_queue(netdev);
2362 return err;
2363
2364err_up:
43250ddd
JY
2365 atl1c_clean_rx_ring(adapter);
2366 return err;
2367}
2368
0fb1e54e 2369static void atl1c_down(struct atl1c_adapter *adapter)
43250ddd
JY
2370{
2371 struct net_device *netdev = adapter->netdev;
2372
2373 atl1c_del_timer(adapter);
cb190546 2374 adapter->work_event = 0; /* clear all event */
43250ddd
JY
2375 /* signal that we're down so the interrupt handler does not
2376 * reschedule our watchdog timer */
2377 set_bit(__AT_DOWN, &adapter->flags);
2378 netif_carrier_off(netdev);
2379 napi_disable(&adapter->napi);
20a1b6bd 2380 napi_disable(&adapter->tpd_ring[0].napi);
43250ddd
JY
2381 atl1c_irq_disable(adapter);
2382 atl1c_free_irq(adapter);
024e1e4d
HX
2383 /* disable ASPM if device inactive */
2384 atl1c_disable_l0s_l1(&adapter->hw);
43250ddd
JY
2385 /* reset MAC to disable all RX/TX */
2386 atl1c_reset_mac(&adapter->hw);
2387 msleep(1);
2388
2389 adapter->link_speed = SPEED_0;
2390 adapter->link_duplex = -1;
5e5c0964 2391 atl1c_reset_dma_ring(adapter);
43250ddd
JY
2392}
2393
49ce9c2c 2394/**
43250ddd
JY
2395 * atl1c_open - Called when a network interface is made active
2396 * @netdev: network interface device structure
2397 *
2398 * Returns 0 on success, negative value on failure
2399 *
2400 * The open entry point is called when a network interface is made
2401 * active by the system (IFF_UP). At this point all resources needed
2402 * for transmit and receive operations are allocated, the interrupt
2403 * handler is registered with the OS, the watchdog timer is started,
2404 * and the stack is notified that the interface is ready.
2405 */
2406static int atl1c_open(struct net_device *netdev)
2407{
2408 struct atl1c_adapter *adapter = netdev_priv(netdev);
2409 int err;
2410
2411 /* disallow open during test */
2412 if (test_bit(__AT_TESTING, &adapter->flags))
2413 return -EBUSY;
2414
2415 /* allocate rx/tx dma buffer & descriptors */
2416 err = atl1c_setup_ring_resources(adapter);
2417 if (unlikely(err))
2418 return err;
2419
2420 err = atl1c_up(adapter);
2421 if (unlikely(err))
2422 goto err_up;
2423
43250ddd
JY
2424 return 0;
2425
2426err_up:
2427 atl1c_free_irq(adapter);
2428 atl1c_free_ring_resources(adapter);
2429 atl1c_reset_mac(&adapter->hw);
2430 return err;
2431}
2432
49ce9c2c 2433/**
43250ddd
JY
2434 * atl1c_close - Disables a network interface
2435 * @netdev: network interface device structure
2436 *
2437 * Returns 0, this is not allowed to fail
2438 *
2439 * The close entry point is called when an interface is de-activated
2440 * by the OS. The hardware is still under the drivers control, but
2441 * needs to be disabled. A global MAC reset is issued to stop the
2442 * hardware, and all transmit and receive resources are freed.
2443 */
2444static int atl1c_close(struct net_device *netdev)
2445{
2446 struct atl1c_adapter *adapter = netdev_priv(netdev);
2447
2448 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
0aa76ce3
HX
2449 set_bit(__AT_DOWN, &adapter->flags);
2450 cancel_work_sync(&adapter->common_task);
43250ddd
JY
2451 atl1c_down(adapter);
2452 atl1c_free_ring_resources(adapter);
2453 return 0;
2454}
2455
762e3023 2456static int atl1c_suspend(struct device *dev)
43250ddd 2457{
f54b0fc8 2458 struct net_device *netdev = dev_get_drvdata(dev);
43250ddd
JY
2459 struct atl1c_adapter *adapter = netdev_priv(netdev);
2460 struct atl1c_hw *hw = &adapter->hw;
43250ddd 2461 u32 wufc = adapter->wol;
43250ddd 2462
8f574b35 2463 atl1c_disable_l0s_l1(hw);
43250ddd
JY
2464 if (netif_running(netdev)) {
2465 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2466 atl1c_down(adapter);
2467 }
2468 netif_device_detach(netdev);
8f574b35
JY
2469
2470 if (wufc)
319d013a 2471 if (atl1c_phy_to_ps_link(hw) != 0)
f54b0fc8 2472 dev_dbg(dev, "phy power saving failed");
8f574b35 2473
319d013a 2474 atl1c_power_saving(hw, wufc);
ce5b972b 2475
43250ddd
JY
2476 return 0;
2477}
2478
d187c1aa 2479#ifdef CONFIG_PM_SLEEP
762e3023 2480static int atl1c_resume(struct device *dev)
43250ddd 2481{
f54b0fc8 2482 struct net_device *netdev = dev_get_drvdata(dev);
43250ddd
JY
2483 struct atl1c_adapter *adapter = netdev_priv(netdev);
2484
43250ddd 2485 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
ce3ba0c9 2486 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
43250ddd
JY
2487
2488 atl1c_phy_reset(&adapter->hw);
2489 atl1c_reset_mac(&adapter->hw);
8f574b35
JY
2490 atl1c_phy_init(&adapter->hw);
2491
43250ddd
JY
2492 netif_device_attach(netdev);
2493 if (netif_running(netdev))
2494 atl1c_up(adapter);
2495
2496 return 0;
2497}
d187c1aa 2498#endif
43250ddd
JY
2499
2500static void atl1c_shutdown(struct pci_dev *pdev)
2501{
762e3023
RW
2502 struct net_device *netdev = pci_get_drvdata(pdev);
2503 struct atl1c_adapter *adapter = netdev_priv(netdev);
2504
2505 atl1c_suspend(&pdev->dev);
2506 pci_wake_from_d3(pdev, adapter->wol);
2507 pci_set_power_state(pdev, PCI_D3hot);
43250ddd
JY
2508}
2509
2510static const struct net_device_ops atl1c_netdev_ops = {
2511 .ndo_open = atl1c_open,
2512 .ndo_stop = atl1c_close,
2513 .ndo_validate_addr = eth_validate_addr,
2514 .ndo_start_xmit = atl1c_xmit_frame,
46facce9 2515 .ndo_set_mac_address = atl1c_set_mac_addr,
afc4b13d 2516 .ndo_set_rx_mode = atl1c_set_multi,
43250ddd 2517 .ndo_change_mtu = atl1c_change_mtu,
782d640a 2518 .ndo_fix_features = atl1c_fix_features,
46facce9 2519 .ndo_set_features = atl1c_set_features,
43250ddd
JY
2520 .ndo_do_ioctl = atl1c_ioctl,
2521 .ndo_tx_timeout = atl1c_tx_timeout,
2522 .ndo_get_stats = atl1c_get_stats,
43250ddd
JY
2523#ifdef CONFIG_NET_POLL_CONTROLLER
2524 .ndo_poll_controller = atl1c_netpoll,
2525#endif
2526};
2527
2528static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2529{
2530 SET_NETDEV_DEV(netdev, &pdev->dev);
2531 pci_set_drvdata(pdev, netdev);
2532
43250ddd
JY
2533 netdev->netdev_ops = &atl1c_netdev_ops;
2534 netdev->watchdog_timeo = AT_TX_WATCHDOG;
67bef942 2535 netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN);
43250ddd
JY
2536 atl1c_set_ethtool_ops(netdev);
2537
2538 /* TODO: add when ready */
f646968f
PM
2539 netdev->hw_features = NETIF_F_SG |
2540 NETIF_F_HW_CSUM |
2541 NETIF_F_HW_VLAN_CTAG_RX |
2542 NETIF_F_TSO |
43250ddd 2543 NETIF_F_TSO6;
f646968f
PM
2544 netdev->features = netdev->hw_features |
2545 NETIF_F_HW_VLAN_CTAG_TX;
43250ddd
JY
2546 return 0;
2547}
2548
49ce9c2c 2549/**
43250ddd
JY
2550 * atl1c_probe - Device Initialization Routine
2551 * @pdev: PCI device information struct
2552 * @ent: entry in atl1c_pci_tbl
2553 *
2554 * Returns 0 on success, negative on failure
2555 *
2556 * atl1c_probe initializes an adapter identified by a pci_dev structure.
2557 * The OS initialization, configuring of the adapter private structure,
2558 * and a hardware reset occur.
2559 */
1dd06ae8 2560static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
43250ddd
JY
2561{
2562 struct net_device *netdev;
2563 struct atl1c_adapter *adapter;
2564 static int cards_found;
bf3be85d
GP
2565 u8 __iomem *hw_addr;
2566 enum atl1c_nic_type nic_type;
43250ddd
JY
2567 int err = 0;
2568
2569 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2570 err = pci_enable_device_mem(pdev);
2571 if (err) {
2572 dev_err(&pdev->dev, "cannot enable PCI device\n");
2573 return err;
2574 }
2575
2576 /*
2577 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2578 * shared register for the high 32 bits, so only a single, aligned,
2579 * 4 GB physical address range can be used at a time.
2580 *
2581 * Supporting 64-bit DMA on this hardware is more trouble than it's
2582 * worth. It is far easier to limit to 32-bit DMA than update
2583 * various kernel subsystems to support the mechanics required by a
2584 * fixed-high-32-bit system.
2585 */
537a1472
ZC
2586 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2587 if (err) {
43250ddd
JY
2588 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2589 goto err_dma;
2590 }
2591
2592 err = pci_request_regions(pdev, atl1c_driver_name);
2593 if (err) {
2594 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2595 goto err_pci_reg;
2596 }
2597
2598 pci_set_master(pdev);
2599
bf3be85d
GP
2600 hw_addr = pci_ioremap_bar(pdev, 0);
2601 if (!hw_addr) {
2602 err = -EIO;
2603 dev_err(&pdev->dev, "cannot map device registers\n");
2604 goto err_ioremap;
2605 }
2606
2607 nic_type = atl1c_get_mac_type(pdev, hw_addr);
2608
43250ddd
JY
2609 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2610 if (netdev == NULL) {
2611 err = -ENOMEM;
43250ddd
JY
2612 goto err_alloc_etherdev;
2613 }
2614
2615 err = atl1c_init_netdev(netdev, pdev);
2616 if (err) {
2617 dev_err(&pdev->dev, "init netdevice failed\n");
2618 goto err_init_netdev;
2619 }
2620 adapter = netdev_priv(netdev);
2621 adapter->bd_number = cards_found;
2622 adapter->netdev = netdev;
2623 adapter->pdev = pdev;
2624 adapter->hw.adapter = adapter;
bf3be85d 2625 adapter->hw.nic_type = nic_type;
43250ddd 2626 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
bf3be85d 2627 adapter->hw.hw_addr = hw_addr;
43250ddd
JY
2628
2629 /* init mii data */
2630 adapter->mii.dev = netdev;
2631 adapter->mii.mdio_read = atl1c_mdio_read;
2632 adapter->mii.mdio_write = atl1c_mdio_write;
2633 adapter->mii.phy_id_mask = 0x1f;
929a5e93 2634 adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK;
a1150a04 2635 dev_set_threaded(netdev, true);
43250ddd 2636 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
20a1b6bd 2637 netif_napi_add(netdev, &adapter->tpd_ring[0].napi, atl1c_clean_tx, 64);
e99e88a9 2638 timer_setup(&adapter->phy_config_timer, atl1c_phy_config, 0);
43250ddd
JY
2639 /* setup the private structure */
2640 err = atl1c_sw_init(adapter);
2641 if (err) {
2642 dev_err(&pdev->dev, "net device private data init failed\n");
2643 goto err_sw_init;
2644 }
67bef942
JW
2645 /* set max MTU */
2646 atl1c_set_max_mtu(netdev);
2647
ce3ba0c9 2648 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
43250ddd
JY
2649
2650 /* Init GPHY as early as possible due to power saving issue */
2651 atl1c_phy_reset(&adapter->hw);
2652
2653 err = atl1c_reset_mac(&adapter->hw);
2654 if (err) {
2655 err = -EIO;
2656 goto err_reset;
2657 }
2658
43250ddd
JY
2659 /* reset the controller to
2660 * put the device in a known good starting state */
2661 err = atl1c_phy_init(&adapter->hw);
2662 if (err) {
2663 err = -EIO;
2664 goto err_reset;
2665 }
6a214fd4
DK
2666 if (atl1c_read_mac_addr(&adapter->hw)) {
2667 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */
e41b2d7f 2668 netdev->addr_assign_type = NET_ADDR_RANDOM;
43250ddd
JY
2669 }
2670 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
43250ddd 2671 if (netif_msg_probe(adapter))
82991172 2672 dev_dbg(&pdev->dev, "mac address : %pM\n",
2673 adapter->hw.mac_addr);
43250ddd 2674
229e6b6e 2675 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
cb190546
JY
2676 INIT_WORK(&adapter->common_task, atl1c_common_task);
2677 adapter->work_event = 0;
43250ddd
JY
2678 err = register_netdev(netdev);
2679 if (err) {
2680 dev_err(&pdev->dev, "register netdevice failed\n");
2681 goto err_register;
2682 }
2683
43250ddd
JY
2684 cards_found++;
2685 return 0;
2686
2687err_reset:
2688err_register:
2689err_sw_init:
43250ddd 2690err_init_netdev:
43250ddd
JY
2691 free_netdev(netdev);
2692err_alloc_etherdev:
bf3be85d
GP
2693 iounmap(hw_addr);
2694err_ioremap:
43250ddd
JY
2695 pci_release_regions(pdev);
2696err_pci_reg:
2697err_dma:
2698 pci_disable_device(pdev);
2699 return err;
2700}
2701
49ce9c2c 2702/**
43250ddd
JY
2703 * atl1c_remove - Device Removal Routine
2704 * @pdev: PCI device information struct
2705 *
2706 * atl1c_remove is called by the PCI subsystem to alert the driver
2707 * that it should release a PCI device. The could be caused by a
2708 * Hot-Plug event, or because the driver is going to be removed from
2709 * memory.
2710 */
093d369d 2711static void atl1c_remove(struct pci_dev *pdev)
43250ddd
JY
2712{
2713 struct net_device *netdev = pci_get_drvdata(pdev);
2714 struct atl1c_adapter *adapter = netdev_priv(netdev);
2715
2716 unregister_netdev(netdev);
229e6b6e
HX
2717 /* restore permanent address */
2718 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr);
43250ddd
JY
2719 atl1c_phy_disable(&adapter->hw);
2720
2721 iounmap(adapter->hw.hw_addr);
2722
2723 pci_release_regions(pdev);
2724 pci_disable_device(pdev);
2725 free_netdev(netdev);
2726}
2727
49ce9c2c 2728/**
43250ddd
JY
2729 * atl1c_io_error_detected - called when PCI error is detected
2730 * @pdev: Pointer to PCI device
2731 * @state: The current pci connection state
2732 *
2733 * This function is called after a PCI bus error affecting
2734 * this device has been detected.
2735 */
2736static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2737 pci_channel_state_t state)
2738{
2739 struct net_device *netdev = pci_get_drvdata(pdev);
2740 struct atl1c_adapter *adapter = netdev_priv(netdev);
2741
2742 netif_device_detach(netdev);
2743
005fb4f0
DN
2744 if (state == pci_channel_io_perm_failure)
2745 return PCI_ERS_RESULT_DISCONNECT;
2746
43250ddd
JY
2747 if (netif_running(netdev))
2748 atl1c_down(adapter);
2749
2750 pci_disable_device(pdev);
2751
2752 /* Request a slot slot reset. */
2753 return PCI_ERS_RESULT_NEED_RESET;
2754}
2755
49ce9c2c 2756/**
43250ddd
JY
2757 * atl1c_io_slot_reset - called after the pci bus has been reset.
2758 * @pdev: Pointer to PCI device
2759 *
2760 * Restart the card from scratch, as if from a cold-boot. Implementation
2761 * resembles the first-half of the e1000_resume routine.
2762 */
2763static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2764{
2765 struct net_device *netdev = pci_get_drvdata(pdev);
2766 struct atl1c_adapter *adapter = netdev_priv(netdev);
2767
2768 if (pci_enable_device(pdev)) {
2769 if (netif_msg_hw(adapter))
2770 dev_err(&pdev->dev,
2771 "Cannot re-enable PCI device after reset\n");
2772 return PCI_ERS_RESULT_DISCONNECT;
2773 }
2774 pci_set_master(pdev);
2775
2776 pci_enable_wake(pdev, PCI_D3hot, 0);
2777 pci_enable_wake(pdev, PCI_D3cold, 0);
2778
2779 atl1c_reset_mac(&adapter->hw);
2780
2781 return PCI_ERS_RESULT_RECOVERED;
2782}
2783
49ce9c2c 2784/**
43250ddd
JY
2785 * atl1c_io_resume - called when traffic can start flowing again.
2786 * @pdev: Pointer to PCI device
2787 *
2788 * This callback is called when the error recovery driver tells us that
2789 * its OK to resume normal operation. Implementation resembles the
2790 * second-half of the atl1c_resume routine.
2791 */
2792static void atl1c_io_resume(struct pci_dev *pdev)
2793{
2794 struct net_device *netdev = pci_get_drvdata(pdev);
2795 struct atl1c_adapter *adapter = netdev_priv(netdev);
2796
2797 if (netif_running(netdev)) {
2798 if (atl1c_up(adapter)) {
2799 if (netif_msg_hw(adapter))
2800 dev_err(&pdev->dev,
2801 "Cannot bring device back up after reset\n");
2802 return;
2803 }
2804 }
2805
2806 netif_device_attach(netdev);
2807}
2808
3646f0e5 2809static const struct pci_error_handlers atl1c_err_handler = {
43250ddd
JY
2810 .error_detected = atl1c_io_error_detected,
2811 .slot_reset = atl1c_io_slot_reset,
2812 .resume = atl1c_io_resume,
2813};
2814
762e3023
RW
2815static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
2816
43250ddd
JY
2817static struct pci_driver atl1c_driver = {
2818 .name = atl1c_driver_name,
2819 .id_table = atl1c_pci_tbl,
2820 .probe = atl1c_probe,
093d369d 2821 .remove = atl1c_remove,
43250ddd 2822 .shutdown = atl1c_shutdown,
762e3023
RW
2823 .err_handler = &atl1c_err_handler,
2824 .driver.pm = &atl1c_pm_ops,
43250ddd
JY
2825};
2826
2c21d6c9 2827module_pci_driver(atl1c_driver);