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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
e4f2379d AB |
2 | /* |
3 | * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com) | |
4 | * | |
e4f2379d AB |
5 | * Driver for the ARC EMAC 10100 (hardware revision 5) |
6 | * | |
7 | * Contributors: | |
8 | * Amit Bhor | |
9 | * Sameer Dhavale | |
10 | * Vineet Gupta | |
11 | */ | |
12 | ||
775dd682 | 13 | #include <linux/crc32.h> |
e4f2379d AB |
14 | #include <linux/etherdevice.h> |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/io.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/of_address.h> | |
19 | #include <linux/of_irq.h> | |
20 | #include <linux/of_mdio.h> | |
21 | #include <linux/of_net.h> | |
22 | #include <linux/of_platform.h> | |
23 | ||
24 | #include "emac.h" | |
25 | ||
78aa0975 AK |
26 | static void arc_emac_restart(struct net_device *ndev); |
27 | ||
74dd40bc BG |
28 | /** |
29 | * arc_emac_tx_avail - Return the number of available slots in the tx ring. | |
30 | * @priv: Pointer to ARC EMAC private data structure. | |
31 | * | |
32 | * returns: the number of slots available for transmission in tx the ring. | |
33 | */ | |
34 | static inline int arc_emac_tx_avail(struct arc_emac_priv *priv) | |
35 | { | |
36 | return (priv->txbd_dirty + TX_BD_NUM - priv->txbd_curr - 1) % TX_BD_NUM; | |
37 | } | |
38 | ||
e4f2379d AB |
39 | /** |
40 | * arc_emac_adjust_link - Adjust the PHY link duplex. | |
41 | * @ndev: Pointer to the net_device structure. | |
42 | * | |
43 | * This function is called to change the duplex setting after auto negotiation | |
44 | * is done by the PHY. | |
45 | */ | |
46 | static void arc_emac_adjust_link(struct net_device *ndev) | |
47 | { | |
48 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
01dea536 | 49 | struct phy_device *phy_dev = ndev->phydev; |
e4f2379d AB |
50 | unsigned int reg, state_changed = 0; |
51 | ||
52 | if (priv->link != phy_dev->link) { | |
53 | priv->link = phy_dev->link; | |
54 | state_changed = 1; | |
55 | } | |
56 | ||
57 | if (priv->speed != phy_dev->speed) { | |
58 | priv->speed = phy_dev->speed; | |
59 | state_changed = 1; | |
6eacf311 RP |
60 | if (priv->set_mac_speed) |
61 | priv->set_mac_speed(priv, priv->speed); | |
e4f2379d AB |
62 | } |
63 | ||
64 | if (priv->duplex != phy_dev->duplex) { | |
65 | reg = arc_reg_get(priv, R_CTRL); | |
66 | ||
663713eb | 67 | if (phy_dev->duplex == DUPLEX_FULL) |
e4f2379d AB |
68 | reg |= ENFL_MASK; |
69 | else | |
70 | reg &= ~ENFL_MASK; | |
71 | ||
72 | arc_reg_set(priv, R_CTRL, reg); | |
73 | priv->duplex = phy_dev->duplex; | |
74 | state_changed = 1; | |
75 | } | |
76 | ||
77 | if (state_changed) | |
78 | phy_print_status(phy_dev); | |
79 | } | |
80 | ||
e4f2379d AB |
81 | /** |
82 | * arc_emac_get_drvinfo - Get EMAC driver information. | |
83 | * @ndev: Pointer to net_device structure. | |
84 | * @info: Pointer to ethtool_drvinfo structure. | |
85 | * | |
86 | * This implements ethtool command for getting the driver information. | |
87 | * Issue "ethtool -i ethX" under linux prompt to execute this function. | |
88 | */ | |
89 | static void arc_emac_get_drvinfo(struct net_device *ndev, | |
90 | struct ethtool_drvinfo *info) | |
91 | { | |
23d2d9a6 RP |
92 | struct arc_emac_priv *priv = netdev_priv(ndev); |
93 | ||
94 | strlcpy(info->driver, priv->drv_name, sizeof(info->driver)); | |
95 | strlcpy(info->version, priv->drv_version, sizeof(info->version)); | |
e4f2379d AB |
96 | } |
97 | ||
98 | static const struct ethtool_ops arc_emac_ethtool_ops = { | |
e4f2379d AB |
99 | .get_drvinfo = arc_emac_get_drvinfo, |
100 | .get_link = ethtool_op_get_link, | |
4694e6e3 PR |
101 | .get_link_ksettings = phy_ethtool_get_link_ksettings, |
102 | .set_link_ksettings = phy_ethtool_set_link_ksettings, | |
e4f2379d AB |
103 | }; |
104 | ||
105 | #define FIRST_OR_LAST_MASK (FIRST_MASK | LAST_MASK) | |
106 | ||
107 | /** | |
108 | * arc_emac_tx_clean - clears processed by EMAC Tx BDs. | |
109 | * @ndev: Pointer to the network device. | |
110 | */ | |
111 | static void arc_emac_tx_clean(struct net_device *ndev) | |
112 | { | |
113 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
ff458f6f | 114 | struct net_device_stats *stats = &ndev->stats; |
e4f2379d AB |
115 | unsigned int i; |
116 | ||
117 | for (i = 0; i < TX_BD_NUM; i++) { | |
118 | unsigned int *txbd_dirty = &priv->txbd_dirty; | |
119 | struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty]; | |
120 | struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty]; | |
121 | struct sk_buff *skb = tx_buff->skb; | |
122 | unsigned int info = le32_to_cpu(txbd->info); | |
123 | ||
c278c253 | 124 | if ((info & FOR_EMAC) || !txbd->data || !skb) |
e4f2379d AB |
125 | break; |
126 | ||
127 | if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) { | |
128 | stats->tx_errors++; | |
129 | stats->tx_dropped++; | |
130 | ||
131 | if (info & DEFR) | |
132 | stats->tx_carrier_errors++; | |
133 | ||
134 | if (info & LTCL) | |
135 | stats->collisions++; | |
136 | ||
137 | if (info & UFLO) | |
138 | stats->tx_fifo_errors++; | |
139 | } else if (likely(info & FIRST_OR_LAST_MASK)) { | |
140 | stats->tx_packets++; | |
141 | stats->tx_bytes += skb->len; | |
142 | } | |
143 | ||
a4a1139b AB |
144 | dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr), |
145 | dma_unmap_len(tx_buff, len), DMA_TO_DEVICE); | |
e4f2379d AB |
146 | |
147 | /* return the sk_buff to system */ | |
67633e78 | 148 | dev_consume_skb_irq(skb); |
e4f2379d AB |
149 | |
150 | txbd->data = 0; | |
151 | txbd->info = 0; | |
c278c253 | 152 | tx_buff->skb = NULL; |
e4f2379d | 153 | |
27082ee1 | 154 | *txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM; |
e4f2379d | 155 | } |
74dd40bc BG |
156 | |
157 | /* Ensure that txbd_dirty is visible to tx() before checking | |
158 | * for queue stopped. | |
159 | */ | |
160 | smp_mb(); | |
161 | ||
162 | if (netif_queue_stopped(ndev) && arc_emac_tx_avail(priv)) | |
163 | netif_wake_queue(ndev); | |
e4f2379d AB |
164 | } |
165 | ||
166 | /** | |
167 | * arc_emac_rx - processing of Rx packets. | |
168 | * @ndev: Pointer to the network device. | |
169 | * @budget: How many BDs to process on 1 call. | |
170 | * | |
171 | * returns: Number of processed BDs | |
172 | * | |
173 | * Iterate through Rx BDs and deliver received packages to upper layer. | |
174 | */ | |
175 | static int arc_emac_rx(struct net_device *ndev, int budget) | |
176 | { | |
177 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
178 | unsigned int work_done; | |
179 | ||
9cff866e | 180 | for (work_done = 0; work_done < budget; work_done++) { |
e4f2379d | 181 | unsigned int *last_rx_bd = &priv->last_rx_bd; |
ff458f6f | 182 | struct net_device_stats *stats = &ndev->stats; |
e4f2379d AB |
183 | struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd]; |
184 | struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd]; | |
e4f2379d AB |
185 | unsigned int pktlen, info = le32_to_cpu(rxbd->info); |
186 | struct sk_buff *skb; | |
187 | dma_addr_t addr; | |
188 | ||
189 | if (unlikely((info & OWN_MASK) == FOR_EMAC)) | |
190 | break; | |
191 | ||
192 | /* Make a note that we saw a packet at this BD. | |
193 | * So next time, driver starts from this + 1 | |
194 | */ | |
195 | *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM; | |
196 | ||
197 | if (unlikely((info & FIRST_OR_LAST_MASK) != | |
198 | FIRST_OR_LAST_MASK)) { | |
199 | /* We pre-allocate buffers of MTU size so incoming | |
200 | * packets won't be split/chained. | |
201 | */ | |
202 | if (net_ratelimit()) | |
203 | netdev_err(ndev, "incomplete packet received\n"); | |
204 | ||
205 | /* Return ownership to EMAC */ | |
a4a1139b | 206 | rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); |
e4f2379d AB |
207 | stats->rx_errors++; |
208 | stats->rx_length_errors++; | |
209 | continue; | |
210 | } | |
211 | ||
e688822d AK |
212 | /* Prepare the BD for next cycle. netif_receive_skb() |
213 | * only if new skb was allocated and mapped to avoid holes | |
214 | * in the RX fifo. | |
215 | */ | |
216 | skb = netdev_alloc_skb_ip_align(ndev, EMAC_BUFFER_SIZE); | |
217 | if (unlikely(!skb)) { | |
218 | if (net_ratelimit()) | |
219 | netdev_err(ndev, "cannot allocate skb\n"); | |
220 | /* Return ownership to EMAC */ | |
221 | rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); | |
e4f2379d | 222 | stats->rx_errors++; |
e4f2379d AB |
223 | stats->rx_dropped++; |
224 | continue; | |
225 | } | |
226 | ||
e688822d | 227 | addr = dma_map_single(&ndev->dev, (void *)skb->data, |
a4a1139b | 228 | EMAC_BUFFER_SIZE, DMA_FROM_DEVICE); |
e4f2379d AB |
229 | if (dma_mapping_error(&ndev->dev, addr)) { |
230 | if (net_ratelimit()) | |
e688822d AK |
231 | netdev_err(ndev, "cannot map dma buffer\n"); |
232 | dev_kfree_skb(skb); | |
233 | /* Return ownership to EMAC */ | |
234 | rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); | |
e4f2379d | 235 | stats->rx_errors++; |
e688822d | 236 | stats->rx_dropped++; |
e4f2379d AB |
237 | continue; |
238 | } | |
e688822d AK |
239 | |
240 | /* unmap previosly mapped skb */ | |
241 | dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr), | |
242 | dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE); | |
243 | ||
244 | pktlen = info & LEN_MASK; | |
245 | stats->rx_packets++; | |
246 | stats->rx_bytes += pktlen; | |
247 | skb_put(rx_buff->skb, pktlen); | |
248 | rx_buff->skb->dev = ndev; | |
249 | rx_buff->skb->protocol = eth_type_trans(rx_buff->skb, ndev); | |
250 | ||
251 | netif_receive_skb(rx_buff->skb); | |
252 | ||
253 | rx_buff->skb = skb; | |
a4a1139b AB |
254 | dma_unmap_addr_set(rx_buff, addr, addr); |
255 | dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE); | |
e4f2379d | 256 | |
a4a1139b | 257 | rxbd->data = cpu_to_le32(addr); |
e4f2379d AB |
258 | |
259 | /* Make sure pointer to data buffer is set */ | |
260 | wmb(); | |
261 | ||
262 | /* Return ownership to EMAC */ | |
a4a1139b | 263 | rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); |
e4f2379d AB |
264 | } |
265 | ||
266 | return work_done; | |
267 | } | |
268 | ||
78aa0975 AK |
269 | /** |
270 | * arc_emac_rx_miss_handle - handle R_MISS register | |
271 | * @ndev: Pointer to the net_device structure. | |
272 | */ | |
273 | static void arc_emac_rx_miss_handle(struct net_device *ndev) | |
274 | { | |
275 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
276 | struct net_device_stats *stats = &ndev->stats; | |
277 | unsigned int miss; | |
278 | ||
279 | miss = arc_reg_get(priv, R_MISS); | |
280 | if (miss) { | |
281 | stats->rx_errors += miss; | |
282 | stats->rx_missed_errors += miss; | |
283 | priv->rx_missed_errors += miss; | |
284 | } | |
285 | } | |
286 | ||
287 | /** | |
288 | * arc_emac_rx_stall_check - check RX stall | |
289 | * @ndev: Pointer to the net_device structure. | |
290 | * @budget: How many BDs requested to process on 1 call. | |
291 | * @work_done: How many BDs processed | |
292 | * | |
293 | * Under certain conditions EMAC stop reception of incoming packets and | |
294 | * continuously increment R_MISS register instead of saving data into | |
295 | * provided buffer. This function detect that condition and restart | |
296 | * EMAC. | |
297 | */ | |
298 | static void arc_emac_rx_stall_check(struct net_device *ndev, | |
299 | int budget, unsigned int work_done) | |
300 | { | |
301 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
302 | struct arc_emac_bd *rxbd; | |
303 | ||
304 | if (work_done) | |
305 | priv->rx_missed_errors = 0; | |
306 | ||
307 | if (priv->rx_missed_errors && budget) { | |
308 | rxbd = &priv->rxbd[priv->last_rx_bd]; | |
309 | if (le32_to_cpu(rxbd->info) & FOR_EMAC) { | |
310 | arc_emac_restart(ndev); | |
311 | priv->rx_missed_errors = 0; | |
312 | } | |
313 | } | |
314 | } | |
315 | ||
e4f2379d AB |
316 | /** |
317 | * arc_emac_poll - NAPI poll handler. | |
318 | * @napi: Pointer to napi_struct structure. | |
319 | * @budget: How many BDs to process on 1 call. | |
320 | * | |
321 | * returns: Number of processed BDs | |
322 | */ | |
323 | static int arc_emac_poll(struct napi_struct *napi, int budget) | |
324 | { | |
325 | struct net_device *ndev = napi->dev; | |
326 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
327 | unsigned int work_done; | |
328 | ||
329 | arc_emac_tx_clean(ndev); | |
78aa0975 | 330 | arc_emac_rx_miss_handle(ndev); |
e4f2379d AB |
331 | |
332 | work_done = arc_emac_rx(ndev, budget); | |
333 | if (work_done < budget) { | |
6ad20165 | 334 | napi_complete_done(napi, work_done); |
7ce7679d | 335 | arc_reg_or(priv, R_ENABLE, RXINT_MASK | TXINT_MASK); |
e4f2379d AB |
336 | } |
337 | ||
78aa0975 AK |
338 | arc_emac_rx_stall_check(ndev, budget, work_done); |
339 | ||
e4f2379d AB |
340 | return work_done; |
341 | } | |
342 | ||
343 | /** | |
344 | * arc_emac_intr - Global interrupt handler for EMAC. | |
345 | * @irq: irq number. | |
346 | * @dev_instance: device instance. | |
347 | * | |
348 | * returns: IRQ_HANDLED for all cases. | |
349 | * | |
350 | * ARC EMAC has only 1 interrupt line, and depending on bits raised in | |
351 | * STATUS register we may tell what is a reason for interrupt to fire. | |
352 | */ | |
353 | static irqreturn_t arc_emac_intr(int irq, void *dev_instance) | |
354 | { | |
355 | struct net_device *ndev = dev_instance; | |
356 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
ff458f6f | 357 | struct net_device_stats *stats = &ndev->stats; |
e4f2379d AB |
358 | unsigned int status; |
359 | ||
360 | status = arc_reg_get(priv, R_STATUS); | |
361 | status &= ~MDIO_MASK; | |
362 | ||
363 | /* Reset all flags except "MDIO complete" */ | |
364 | arc_reg_set(priv, R_STATUS, status); | |
365 | ||
7ce7679d | 366 | if (status & (RXINT_MASK | TXINT_MASK)) { |
e4f2379d | 367 | if (likely(napi_schedule_prep(&priv->napi))) { |
7ce7679d | 368 | arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK); |
e4f2379d AB |
369 | __napi_schedule(&priv->napi); |
370 | } | |
371 | } | |
372 | ||
373 | if (status & ERR_MASK) { | |
374 | /* MSER/RXCR/RXFR/RXFL interrupt fires on corresponding | |
375 | * 8-bit error counter overrun. | |
376 | */ | |
377 | ||
378 | if (status & MSER_MASK) { | |
379 | stats->rx_missed_errors += 0x100; | |
380 | stats->rx_errors += 0x100; | |
78aa0975 AK |
381 | priv->rx_missed_errors += 0x100; |
382 | napi_schedule(&priv->napi); | |
e4f2379d AB |
383 | } |
384 | ||
385 | if (status & RXCR_MASK) { | |
386 | stats->rx_crc_errors += 0x100; | |
387 | stats->rx_errors += 0x100; | |
388 | } | |
389 | ||
390 | if (status & RXFR_MASK) { | |
391 | stats->rx_frame_errors += 0x100; | |
392 | stats->rx_errors += 0x100; | |
393 | } | |
394 | ||
395 | if (status & RXFL_MASK) { | |
396 | stats->rx_over_errors += 0x100; | |
397 | stats->rx_errors += 0x100; | |
398 | } | |
399 | } | |
400 | ||
401 | return IRQ_HANDLED; | |
402 | } | |
403 | ||
5a45e57a BG |
404 | #ifdef CONFIG_NET_POLL_CONTROLLER |
405 | static void arc_emac_poll_controller(struct net_device *dev) | |
406 | { | |
407 | disable_irq(dev->irq); | |
408 | arc_emac_intr(dev->irq, dev); | |
409 | enable_irq(dev->irq); | |
410 | } | |
411 | #endif | |
412 | ||
e4f2379d AB |
413 | /** |
414 | * arc_emac_open - Open the network device. | |
415 | * @ndev: Pointer to the network device. | |
416 | * | |
417 | * returns: 0, on success or non-zero error value on failure. | |
418 | * | |
419 | * This function sets the MAC address, requests and enables an IRQ | |
420 | * for the EMAC device and starts the Tx queue. | |
421 | * It also connects to the phy device. | |
422 | */ | |
423 | static int arc_emac_open(struct net_device *ndev) | |
424 | { | |
425 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
01dea536 | 426 | struct phy_device *phy_dev = ndev->phydev; |
e4f2379d AB |
427 | int i; |
428 | ||
429 | phy_dev->autoneg = AUTONEG_ENABLE; | |
430 | phy_dev->speed = 0; | |
431 | phy_dev->duplex = 0; | |
3c1bcc86 AL |
432 | linkmode_and(phy_dev->advertising, phy_dev->advertising, |
433 | phy_dev->supported); | |
e4f2379d | 434 | |
a4a1139b AB |
435 | priv->last_rx_bd = 0; |
436 | ||
e4f2379d | 437 | /* Allocate and set buffers for Rx BD's */ |
e4f2379d | 438 | for (i = 0; i < RX_BD_NUM; i++) { |
a4a1139b AB |
439 | dma_addr_t addr; |
440 | unsigned int *last_rx_bd = &priv->last_rx_bd; | |
441 | struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd]; | |
442 | struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd]; | |
443 | ||
444 | rx_buff->skb = netdev_alloc_skb_ip_align(ndev, | |
445 | EMAC_BUFFER_SIZE); | |
446 | if (unlikely(!rx_buff->skb)) | |
447 | return -ENOMEM; | |
448 | ||
449 | addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data, | |
450 | EMAC_BUFFER_SIZE, DMA_FROM_DEVICE); | |
451 | if (dma_mapping_error(&ndev->dev, addr)) { | |
452 | netdev_err(ndev, "cannot dma map\n"); | |
453 | dev_kfree_skb(rx_buff->skb); | |
e4f2379d | 454 | return -ENOMEM; |
a4a1139b AB |
455 | } |
456 | dma_unmap_addr_set(rx_buff, addr, addr); | |
457 | dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE); | |
e4f2379d | 458 | |
a4a1139b | 459 | rxbd->data = cpu_to_le32(addr); |
e4f2379d AB |
460 | |
461 | /* Make sure pointer to data buffer is set */ | |
462 | wmb(); | |
463 | ||
a4a1139b AB |
464 | /* Return ownership to EMAC */ |
465 | rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); | |
e4f2379d | 466 | |
a4a1139b AB |
467 | *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM; |
468 | } | |
e4f2379d | 469 | |
99f93a15 AK |
470 | priv->txbd_curr = 0; |
471 | priv->txbd_dirty = 0; | |
472 | ||
e4f2379d AB |
473 | /* Clean Tx BD's */ |
474 | memset(priv->txbd, 0, TX_RING_SZ); | |
475 | ||
476 | /* Initialize logical address filter */ | |
477 | arc_reg_set(priv, R_LAFL, 0); | |
478 | arc_reg_set(priv, R_LAFH, 0); | |
479 | ||
480 | /* Set BD ring pointers for device side */ | |
481 | arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma); | |
482 | arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma); | |
483 | ||
484 | /* Enable interrupts */ | |
7ce7679d | 485 | arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK); |
e4f2379d AB |
486 | |
487 | /* Set CONTROL */ | |
488 | arc_reg_set(priv, R_CTRL, | |
663713eb CW |
489 | (RX_BD_NUM << 24) | /* RX BD table length */ |
490 | (TX_BD_NUM << 16) | /* TX BD table length */ | |
491 | TXRN_MASK | RXRN_MASK); | |
e4f2379d AB |
492 | |
493 | napi_enable(&priv->napi); | |
494 | ||
495 | /* Enable EMAC */ | |
496 | arc_reg_or(priv, R_CTRL, EN_MASK); | |
497 | ||
b18b7453 | 498 | phy_start(ndev->phydev); |
e4f2379d AB |
499 | |
500 | netif_start_queue(ndev); | |
501 | ||
502 | return 0; | |
503 | } | |
504 | ||
775dd682 BG |
505 | /** |
506 | * arc_emac_set_rx_mode - Change the receive filtering mode. | |
507 | * @ndev: Pointer to the network device. | |
508 | * | |
509 | * This function enables/disables promiscuous or all-multicast mode | |
510 | * and updates the multicast filtering list of the network device. | |
511 | */ | |
512 | static void arc_emac_set_rx_mode(struct net_device *ndev) | |
513 | { | |
514 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
515 | ||
516 | if (ndev->flags & IFF_PROMISC) { | |
517 | arc_reg_or(priv, R_CTRL, PROM_MASK); | |
518 | } else { | |
519 | arc_reg_clr(priv, R_CTRL, PROM_MASK); | |
520 | ||
521 | if (ndev->flags & IFF_ALLMULTI) { | |
522 | arc_reg_set(priv, R_LAFL, ~0); | |
523 | arc_reg_set(priv, R_LAFH, ~0); | |
d0e3f65b | 524 | } else if (ndev->flags & IFF_MULTICAST) { |
775dd682 BG |
525 | struct netdev_hw_addr *ha; |
526 | unsigned int filter[2] = { 0, 0 }; | |
527 | int bit; | |
528 | ||
529 | netdev_for_each_mc_addr(ha, ndev) { | |
530 | bit = ether_crc_le(ETH_ALEN, ha->addr) >> 26; | |
531 | filter[bit >> 5] |= 1 << (bit & 31); | |
532 | } | |
533 | ||
534 | arc_reg_set(priv, R_LAFL, filter[0]); | |
535 | arc_reg_set(priv, R_LAFH, filter[1]); | |
d0e3f65b AK |
536 | } else { |
537 | arc_reg_set(priv, R_LAFL, 0); | |
538 | arc_reg_set(priv, R_LAFH, 0); | |
775dd682 BG |
539 | } |
540 | } | |
541 | } | |
542 | ||
b530b164 AK |
543 | /** |
544 | * arc_free_tx_queue - free skb from tx queue | |
545 | * @ndev: Pointer to the network device. | |
546 | * | |
547 | * This function must be called while EMAC disable | |
548 | */ | |
549 | static void arc_free_tx_queue(struct net_device *ndev) | |
550 | { | |
551 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
552 | unsigned int i; | |
553 | ||
554 | for (i = 0; i < TX_BD_NUM; i++) { | |
555 | struct arc_emac_bd *txbd = &priv->txbd[i]; | |
556 | struct buffer_state *tx_buff = &priv->tx_buff[i]; | |
557 | ||
558 | if (tx_buff->skb) { | |
663713eb CW |
559 | dma_unmap_single(&ndev->dev, |
560 | dma_unmap_addr(tx_buff, addr), | |
561 | dma_unmap_len(tx_buff, len), | |
562 | DMA_TO_DEVICE); | |
b530b164 AK |
563 | |
564 | /* return the sk_buff to system */ | |
565 | dev_kfree_skb_irq(tx_buff->skb); | |
566 | } | |
567 | ||
568 | txbd->info = 0; | |
569 | txbd->data = 0; | |
570 | tx_buff->skb = NULL; | |
571 | } | |
572 | } | |
573 | ||
574 | /** | |
575 | * arc_free_rx_queue - free skb from rx queue | |
576 | * @ndev: Pointer to the network device. | |
577 | * | |
578 | * This function must be called while EMAC disable | |
579 | */ | |
580 | static void arc_free_rx_queue(struct net_device *ndev) | |
581 | { | |
582 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
583 | unsigned int i; | |
584 | ||
585 | for (i = 0; i < RX_BD_NUM; i++) { | |
586 | struct arc_emac_bd *rxbd = &priv->rxbd[i]; | |
587 | struct buffer_state *rx_buff = &priv->rx_buff[i]; | |
588 | ||
589 | if (rx_buff->skb) { | |
663713eb CW |
590 | dma_unmap_single(&ndev->dev, |
591 | dma_unmap_addr(rx_buff, addr), | |
592 | dma_unmap_len(rx_buff, len), | |
593 | DMA_FROM_DEVICE); | |
b530b164 AK |
594 | |
595 | /* return the sk_buff to system */ | |
596 | dev_kfree_skb_irq(rx_buff->skb); | |
597 | } | |
598 | ||
599 | rxbd->info = 0; | |
600 | rxbd->data = 0; | |
601 | rx_buff->skb = NULL; | |
602 | } | |
603 | } | |
604 | ||
e4f2379d AB |
605 | /** |
606 | * arc_emac_stop - Close the network device. | |
607 | * @ndev: Pointer to the network device. | |
608 | * | |
609 | * This function stops the Tx queue, disables interrupts and frees the IRQ for | |
610 | * the EMAC device. | |
611 | * It also disconnects the PHY device associated with the EMAC device. | |
612 | */ | |
613 | static int arc_emac_stop(struct net_device *ndev) | |
614 | { | |
615 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
616 | ||
617 | napi_disable(&priv->napi); | |
618 | netif_stop_queue(ndev); | |
619 | ||
b18b7453 AK |
620 | phy_stop(ndev->phydev); |
621 | ||
e4f2379d | 622 | /* Disable interrupts */ |
7ce7679d | 623 | arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK); |
e4f2379d AB |
624 | |
625 | /* Disable EMAC */ | |
626 | arc_reg_clr(priv, R_CTRL, EN_MASK); | |
627 | ||
b530b164 AK |
628 | /* Return the sk_buff to system */ |
629 | arc_free_tx_queue(ndev); | |
630 | arc_free_rx_queue(ndev); | |
631 | ||
e4f2379d AB |
632 | return 0; |
633 | } | |
634 | ||
635 | /** | |
636 | * arc_emac_stats - Get system network statistics. | |
637 | * @ndev: Pointer to net_device structure. | |
638 | * | |
639 | * Returns the address of the device statistics structure. | |
640 | * Statistics are updated in interrupt handler. | |
641 | */ | |
642 | static struct net_device_stats *arc_emac_stats(struct net_device *ndev) | |
643 | { | |
644 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
ff458f6f | 645 | struct net_device_stats *stats = &ndev->stats; |
e4f2379d AB |
646 | unsigned long miss, rxerr; |
647 | u8 rxcrc, rxfram, rxoflow; | |
648 | ||
649 | rxerr = arc_reg_get(priv, R_RXERR); | |
650 | miss = arc_reg_get(priv, R_MISS); | |
651 | ||
652 | rxcrc = rxerr; | |
653 | rxfram = rxerr >> 8; | |
654 | rxoflow = rxerr >> 16; | |
655 | ||
656 | stats->rx_errors += miss; | |
657 | stats->rx_errors += rxcrc + rxfram + rxoflow; | |
658 | ||
659 | stats->rx_over_errors += rxoflow; | |
660 | stats->rx_frame_errors += rxfram; | |
661 | stats->rx_crc_errors += rxcrc; | |
662 | stats->rx_missed_errors += miss; | |
663 | ||
664 | return stats; | |
665 | } | |
666 | ||
667 | /** | |
668 | * arc_emac_tx - Starts the data transmission. | |
669 | * @skb: sk_buff pointer that contains data to be Transmitted. | |
670 | * @ndev: Pointer to net_device structure. | |
671 | * | |
672 | * returns: NETDEV_TX_OK, on success | |
673 | * NETDEV_TX_BUSY, if any of the descriptors are not free. | |
674 | * | |
675 | * This function is invoked from upper layers to initiate transmission. | |
676 | */ | |
677 | static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev) | |
678 | { | |
679 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
680 | unsigned int len, *txbd_curr = &priv->txbd_curr; | |
ff458f6f | 681 | struct net_device_stats *stats = &ndev->stats; |
e4f2379d AB |
682 | __le32 *info = &priv->txbd[*txbd_curr].info; |
683 | dma_addr_t addr; | |
684 | ||
685 | if (skb_padto(skb, ETH_ZLEN)) | |
686 | return NETDEV_TX_OK; | |
687 | ||
688 | len = max_t(unsigned int, ETH_ZLEN, skb->len); | |
689 | ||
74dd40bc | 690 | if (unlikely(!arc_emac_tx_avail(priv))) { |
e4f2379d | 691 | netif_stop_queue(ndev); |
74dd40bc | 692 | netdev_err(ndev, "BUG! Tx Ring full when queue awake!\n"); |
e4f2379d AB |
693 | return NETDEV_TX_BUSY; |
694 | } | |
695 | ||
696 | addr = dma_map_single(&ndev->dev, (void *)skb->data, len, | |
697 | DMA_TO_DEVICE); | |
698 | ||
699 | if (unlikely(dma_mapping_error(&ndev->dev, addr))) { | |
700 | stats->tx_dropped++; | |
701 | stats->tx_errors++; | |
0f6e8761 | 702 | dev_kfree_skb_any(skb); |
e4f2379d AB |
703 | return NETDEV_TX_OK; |
704 | } | |
a4a1139b | 705 | dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr); |
e4f2379d AB |
706 | dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len); |
707 | ||
a4a1139b | 708 | priv->txbd[*txbd_curr].data = cpu_to_le32(addr); |
e4f2379d AB |
709 | |
710 | /* Make sure pointer to data buffer is set */ | |
711 | wmb(); | |
712 | ||
37ec274e ED |
713 | skb_tx_timestamp(skb); |
714 | ||
e4f2379d AB |
715 | *info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len); |
716 | ||
c278c253 AK |
717 | /* Make sure info word is set */ |
718 | wmb(); | |
719 | ||
720 | priv->tx_buff[*txbd_curr].skb = skb; | |
721 | ||
e4f2379d AB |
722 | /* Increment index to point to the next BD */ |
723 | *txbd_curr = (*txbd_curr + 1) % TX_BD_NUM; | |
724 | ||
74dd40bc BG |
725 | /* Ensure that tx_clean() sees the new txbd_curr before |
726 | * checking the queue status. This prevents an unneeded wake | |
727 | * of the queue in tx_clean(). | |
728 | */ | |
729 | smp_mb(); | |
e4f2379d | 730 | |
74dd40bc | 731 | if (!arc_emac_tx_avail(priv)) { |
e4f2379d | 732 | netif_stop_queue(ndev); |
74dd40bc BG |
733 | /* Refresh tx_dirty */ |
734 | smp_mb(); | |
735 | if (arc_emac_tx_avail(priv)) | |
736 | netif_start_queue(ndev); | |
737 | } | |
e4f2379d AB |
738 | |
739 | arc_reg_set(priv, R_STATUS, TXPL_MASK); | |
740 | ||
e4f2379d AB |
741 | return NETDEV_TX_OK; |
742 | } | |
743 | ||
235a251a MS |
744 | static void arc_emac_set_address_internal(struct net_device *ndev) |
745 | { | |
746 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
747 | unsigned int addr_low, addr_hi; | |
748 | ||
663713eb CW |
749 | addr_low = le32_to_cpu(*(__le32 *)&ndev->dev_addr[0]); |
750 | addr_hi = le16_to_cpu(*(__le16 *)&ndev->dev_addr[4]); | |
235a251a MS |
751 | |
752 | arc_reg_set(priv, R_ADDRL, addr_low); | |
753 | arc_reg_set(priv, R_ADDRH, addr_hi); | |
754 | } | |
755 | ||
e4f2379d AB |
756 | /** |
757 | * arc_emac_set_address - Set the MAC address for this device. | |
758 | * @ndev: Pointer to net_device structure. | |
759 | * @p: 6 byte Address to be written as MAC address. | |
760 | * | |
761 | * This function copies the HW address from the sockaddr structure to the | |
762 | * net_device structure and updates the address in HW. | |
763 | * | |
764 | * returns: -EBUSY if the net device is busy or 0 if the address is set | |
765 | * successfully. | |
766 | */ | |
767 | static int arc_emac_set_address(struct net_device *ndev, void *p) | |
768 | { | |
e4f2379d | 769 | struct sockaddr *addr = p; |
e4f2379d AB |
770 | |
771 | if (netif_running(ndev)) | |
772 | return -EBUSY; | |
773 | ||
774 | if (!is_valid_ether_addr(addr->sa_data)) | |
775 | return -EADDRNOTAVAIL; | |
776 | ||
777 | memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len); | |
778 | ||
235a251a | 779 | arc_emac_set_address_internal(ndev); |
e4f2379d AB |
780 | |
781 | return 0; | |
782 | } | |
783 | ||
78aa0975 AK |
784 | /** |
785 | * arc_emac_restart - Restart EMAC | |
786 | * @ndev: Pointer to net_device structure. | |
787 | * | |
788 | * This function do hardware reset of EMAC in order to restore | |
789 | * network packets reception. | |
790 | */ | |
791 | static void arc_emac_restart(struct net_device *ndev) | |
792 | { | |
793 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
794 | struct net_device_stats *stats = &ndev->stats; | |
795 | int i; | |
796 | ||
797 | if (net_ratelimit()) | |
798 | netdev_warn(ndev, "restarting stalled EMAC\n"); | |
799 | ||
800 | netif_stop_queue(ndev); | |
801 | ||
802 | /* Disable interrupts */ | |
803 | arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK); | |
804 | ||
805 | /* Disable EMAC */ | |
806 | arc_reg_clr(priv, R_CTRL, EN_MASK); | |
807 | ||
808 | /* Return the sk_buff to system */ | |
809 | arc_free_tx_queue(ndev); | |
810 | ||
811 | /* Clean Tx BD's */ | |
812 | priv->txbd_curr = 0; | |
813 | priv->txbd_dirty = 0; | |
814 | memset(priv->txbd, 0, TX_RING_SZ); | |
815 | ||
816 | for (i = 0; i < RX_BD_NUM; i++) { | |
817 | struct arc_emac_bd *rxbd = &priv->rxbd[i]; | |
818 | unsigned int info = le32_to_cpu(rxbd->info); | |
819 | ||
820 | if (!(info & FOR_EMAC)) { | |
821 | stats->rx_errors++; | |
822 | stats->rx_dropped++; | |
823 | } | |
824 | /* Return ownership to EMAC */ | |
825 | rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); | |
826 | } | |
827 | priv->last_rx_bd = 0; | |
828 | ||
829 | /* Make sure info is visible to EMAC before enable */ | |
830 | wmb(); | |
831 | ||
832 | /* Enable interrupts */ | |
833 | arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK); | |
834 | ||
835 | /* Enable EMAC */ | |
836 | arc_reg_or(priv, R_CTRL, EN_MASK); | |
837 | ||
838 | netif_start_queue(ndev); | |
839 | } | |
840 | ||
e4f2379d AB |
841 | static const struct net_device_ops arc_emac_netdev_ops = { |
842 | .ndo_open = arc_emac_open, | |
843 | .ndo_stop = arc_emac_stop, | |
844 | .ndo_start_xmit = arc_emac_tx, | |
845 | .ndo_set_mac_address = arc_emac_set_address, | |
846 | .ndo_get_stats = arc_emac_stats, | |
775dd682 | 847 | .ndo_set_rx_mode = arc_emac_set_rx_mode, |
fd786fb1 | 848 | .ndo_do_ioctl = phy_do_ioctl_running, |
5a45e57a BG |
849 | #ifdef CONFIG_NET_POLL_CONTROLLER |
850 | .ndo_poll_controller = arc_emac_poll_controller, | |
851 | #endif | |
e4f2379d AB |
852 | }; |
853 | ||
23d2d9a6 | 854 | int arc_emac_probe(struct net_device *ndev, int interface) |
e4f2379d | 855 | { |
23d2d9a6 | 856 | struct device *dev = ndev->dev.parent; |
f7578496 | 857 | struct resource res_regs; |
e4f2379d | 858 | struct device_node *phy_node; |
01dea536 | 859 | struct phy_device *phydev = NULL; |
e4f2379d | 860 | struct arc_emac_priv *priv; |
e4f2379d | 861 | const char *mac_addr; |
f7578496 | 862 | unsigned int id, clock_frequency, irq; |
e4f2379d AB |
863 | int err; |
864 | ||
e4f2379d | 865 | /* Get PHY from device tree */ |
f15f44e0 | 866 | phy_node = of_parse_phandle(dev->of_node, "phy", 0); |
e4f2379d | 867 | if (!phy_node) { |
f15f44e0 | 868 | dev_err(dev, "failed to retrieve phy description from device tree\n"); |
e4f2379d AB |
869 | return -ENODEV; |
870 | } | |
871 | ||
872 | /* Get EMAC registers base address from device tree */ | |
f15f44e0 | 873 | err = of_address_to_resource(dev->of_node, 0, &res_regs); |
e4f2379d | 874 | if (err) { |
f15f44e0 | 875 | dev_err(dev, "failed to retrieve registers base from device tree\n"); |
a94efbd7 PC |
876 | err = -ENODEV; |
877 | goto out_put_node; | |
e4f2379d AB |
878 | } |
879 | ||
e4f2379d | 880 | /* Get IRQ from device tree */ |
f15f44e0 | 881 | irq = irq_of_parse_and_map(dev->of_node, 0); |
f7578496 | 882 | if (!irq) { |
f15f44e0 | 883 | dev_err(dev, "failed to retrieve <irq> value from device tree\n"); |
a94efbd7 PC |
884 | err = -ENODEV; |
885 | goto out_put_node; | |
e4f2379d AB |
886 | } |
887 | ||
e4f2379d AB |
888 | ndev->netdev_ops = &arc_emac_netdev_ops; |
889 | ndev->ethtool_ops = &arc_emac_ethtool_ops; | |
890 | ndev->watchdog_timeo = TX_TIMEOUT; | |
e4f2379d AB |
891 | |
892 | priv = netdev_priv(ndev); | |
f15f44e0 | 893 | priv->dev = dev; |
e4f2379d | 894 | |
f15f44e0 | 895 | priv->regs = devm_ioremap_resource(dev, &res_regs); |
54447f1a WY |
896 | if (IS_ERR(priv->regs)) { |
897 | err = PTR_ERR(priv->regs); | |
898 | goto out_put_node; | |
899 | } | |
663713eb | 900 | |
f15f44e0 | 901 | dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs); |
e4f2379d | 902 | |
23d2d9a6 | 903 | if (priv->clk) { |
88154c96 HS |
904 | err = clk_prepare_enable(priv->clk); |
905 | if (err) { | |
f15f44e0 | 906 | dev_err(dev, "failed to enable clock\n"); |
a94efbd7 | 907 | goto out_put_node; |
88154c96 HS |
908 | } |
909 | ||
910 | clock_frequency = clk_get_rate(priv->clk); | |
23d2d9a6 RP |
911 | } else { |
912 | /* Get CPU clock frequency from device tree */ | |
913 | if (of_property_read_u32(dev->of_node, "clock-frequency", | |
914 | &clock_frequency)) { | |
915 | dev_err(dev, "failed to retrieve <clock-frequency> from device tree\n"); | |
a94efbd7 PC |
916 | err = -EINVAL; |
917 | goto out_put_node; | |
23d2d9a6 | 918 | } |
88154c96 HS |
919 | } |
920 | ||
e4f2379d AB |
921 | id = arc_reg_get(priv, R_ID); |
922 | ||
923 | /* Check for EMAC revision 5 or 7, magic number */ | |
924 | if (!(id == 0x0005fd02 || id == 0x0007fd02)) { | |
f15f44e0 | 925 | dev_err(dev, "ARC EMAC not detected, id=0x%x\n", id); |
e4f2379d | 926 | err = -ENODEV; |
88154c96 | 927 | goto out_clken; |
e4f2379d | 928 | } |
f15f44e0 | 929 | dev_info(dev, "ARC EMAC detected with id: 0x%x\n", id); |
e4f2379d AB |
930 | |
931 | /* Set poll rate so that it polls every 1 ms */ | |
932 | arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000); | |
933 | ||
f7578496 | 934 | ndev->irq = irq; |
f15f44e0 | 935 | dev_info(dev, "IRQ is %d\n", ndev->irq); |
e4f2379d AB |
936 | |
937 | /* Register interrupt handler for device */ | |
f15f44e0 | 938 | err = devm_request_irq(dev, ndev->irq, arc_emac_intr, 0, |
e4f2379d AB |
939 | ndev->name, ndev); |
940 | if (err) { | |
f15f44e0 | 941 | dev_err(dev, "could not allocate IRQ\n"); |
88154c96 | 942 | goto out_clken; |
e4f2379d AB |
943 | } |
944 | ||
945 | /* Get MAC address from device tree */ | |
f15f44e0 | 946 | mac_addr = of_get_mac_address(dev->of_node); |
e4f2379d | 947 | |
a51645f7 | 948 | if (!IS_ERR(mac_addr)) |
2d2924af | 949 | ether_addr_copy(ndev->dev_addr, mac_addr); |
99470819 LP |
950 | else |
951 | eth_hw_addr_random(ndev); | |
e4f2379d | 952 | |
235a251a | 953 | arc_emac_set_address_internal(ndev); |
f15f44e0 | 954 | dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr); |
e4f2379d AB |
955 | |
956 | /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */ | |
f15f44e0 | 957 | priv->rxbd = dmam_alloc_coherent(dev, RX_RING_SZ + TX_RING_SZ, |
e4f2379d AB |
958 | &priv->rxbd_dma, GFP_KERNEL); |
959 | ||
960 | if (!priv->rxbd) { | |
f15f44e0 | 961 | dev_err(dev, "failed to allocate data buffers\n"); |
e4f2379d | 962 | err = -ENOMEM; |
88154c96 | 963 | goto out_clken; |
e4f2379d AB |
964 | } |
965 | ||
966 | priv->txbd = priv->rxbd + RX_BD_NUM; | |
967 | ||
968 | priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ; | |
f15f44e0 | 969 | dev_dbg(dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n", |
e4f2379d AB |
970 | (unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma); |
971 | ||
93e91b3d | 972 | err = arc_mdio_probe(priv); |
e4f2379d | 973 | if (err) { |
f15f44e0 | 974 | dev_err(dev, "failed to probe MII bus\n"); |
88154c96 | 975 | goto out_clken; |
e4f2379d AB |
976 | } |
977 | ||
01dea536 PR |
978 | phydev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0, |
979 | interface); | |
980 | if (!phydev) { | |
f15f44e0 | 981 | dev_err(dev, "of_phy_connect() failed\n"); |
e4f2379d | 982 | err = -ENODEV; |
796bec1e | 983 | goto out_mdio; |
e4f2379d AB |
984 | } |
985 | ||
f15f44e0 | 986 | dev_info(dev, "connected to %s phy with id 0x%x\n", |
01dea536 | 987 | phydev->drv->name, phydev->phy_id); |
e4f2379d AB |
988 | |
989 | netif_napi_add(ndev, &priv->napi, arc_emac_poll, ARC_EMAC_NAPI_WEIGHT); | |
990 | ||
991 | err = register_netdev(ndev); | |
992 | if (err) { | |
f15f44e0 | 993 | dev_err(dev, "failed to register network device\n"); |
796bec1e | 994 | goto out_netif_api; |
e4f2379d AB |
995 | } |
996 | ||
a94efbd7 | 997 | of_node_put(phy_node); |
e4f2379d AB |
998 | return 0; |
999 | ||
796bec1e HS |
1000 | out_netif_api: |
1001 | netif_napi_del(&priv->napi); | |
01dea536 | 1002 | phy_disconnect(phydev); |
796bec1e HS |
1003 | out_mdio: |
1004 | arc_mdio_remove(priv); | |
88154c96 | 1005 | out_clken: |
23d2d9a6 | 1006 | if (priv->clk) |
88154c96 | 1007 | clk_disable_unprepare(priv->clk); |
a94efbd7 PC |
1008 | out_put_node: |
1009 | of_node_put(phy_node); | |
1010 | ||
e4f2379d AB |
1011 | return err; |
1012 | } | |
23d2d9a6 | 1013 | EXPORT_SYMBOL_GPL(arc_emac_probe); |
e4f2379d | 1014 | |
23d2d9a6 | 1015 | int arc_emac_remove(struct net_device *ndev) |
e4f2379d | 1016 | { |
e4f2379d AB |
1017 | struct arc_emac_priv *priv = netdev_priv(ndev); |
1018 | ||
01dea536 | 1019 | phy_disconnect(ndev->phydev); |
e4f2379d AB |
1020 | arc_mdio_remove(priv); |
1021 | unregister_netdev(ndev); | |
1022 | netif_napi_del(&priv->napi); | |
88154c96 | 1023 | |
663713eb | 1024 | if (!IS_ERR(priv->clk)) |
88154c96 | 1025 | clk_disable_unprepare(priv->clk); |
e4f2379d AB |
1026 | |
1027 | return 0; | |
1028 | } | |
23d2d9a6 | 1029 | EXPORT_SYMBOL_GPL(arc_emac_remove); |
e4f2379d AB |
1030 | |
1031 | MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>"); | |
1032 | MODULE_DESCRIPTION("ARC EMAC driver"); | |
1033 | MODULE_LICENSE("GPL"); |