Commit | Line | Data |
---|---|---|
e4f2379d AB |
1 | /* |
2 | * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com) | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * Driver for the ARC EMAC 10100 (hardware revision 5) | |
9 | * | |
10 | * Contributors: | |
11 | * Amit Bhor | |
12 | * Sameer Dhavale | |
13 | * Vineet Gupta | |
14 | */ | |
15 | ||
775dd682 | 16 | #include <linux/crc32.h> |
e4f2379d AB |
17 | #include <linux/etherdevice.h> |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/io.h> | |
20 | #include <linux/module.h> | |
21 | #include <linux/of_address.h> | |
22 | #include <linux/of_irq.h> | |
23 | #include <linux/of_mdio.h> | |
24 | #include <linux/of_net.h> | |
25 | #include <linux/of_platform.h> | |
26 | ||
27 | #include "emac.h" | |
28 | ||
74dd40bc BG |
29 | /** |
30 | * arc_emac_tx_avail - Return the number of available slots in the tx ring. | |
31 | * @priv: Pointer to ARC EMAC private data structure. | |
32 | * | |
33 | * returns: the number of slots available for transmission in tx the ring. | |
34 | */ | |
35 | static inline int arc_emac_tx_avail(struct arc_emac_priv *priv) | |
36 | { | |
37 | return (priv->txbd_dirty + TX_BD_NUM - priv->txbd_curr - 1) % TX_BD_NUM; | |
38 | } | |
39 | ||
e4f2379d AB |
40 | /** |
41 | * arc_emac_adjust_link - Adjust the PHY link duplex. | |
42 | * @ndev: Pointer to the net_device structure. | |
43 | * | |
44 | * This function is called to change the duplex setting after auto negotiation | |
45 | * is done by the PHY. | |
46 | */ | |
47 | static void arc_emac_adjust_link(struct net_device *ndev) | |
48 | { | |
49 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
01dea536 | 50 | struct phy_device *phy_dev = ndev->phydev; |
e4f2379d AB |
51 | unsigned int reg, state_changed = 0; |
52 | ||
53 | if (priv->link != phy_dev->link) { | |
54 | priv->link = phy_dev->link; | |
55 | state_changed = 1; | |
56 | } | |
57 | ||
58 | if (priv->speed != phy_dev->speed) { | |
59 | priv->speed = phy_dev->speed; | |
60 | state_changed = 1; | |
6eacf311 RP |
61 | if (priv->set_mac_speed) |
62 | priv->set_mac_speed(priv, priv->speed); | |
e4f2379d AB |
63 | } |
64 | ||
65 | if (priv->duplex != phy_dev->duplex) { | |
66 | reg = arc_reg_get(priv, R_CTRL); | |
67 | ||
663713eb | 68 | if (phy_dev->duplex == DUPLEX_FULL) |
e4f2379d AB |
69 | reg |= ENFL_MASK; |
70 | else | |
71 | reg &= ~ENFL_MASK; | |
72 | ||
73 | arc_reg_set(priv, R_CTRL, reg); | |
74 | priv->duplex = phy_dev->duplex; | |
75 | state_changed = 1; | |
76 | } | |
77 | ||
78 | if (state_changed) | |
79 | phy_print_status(phy_dev); | |
80 | } | |
81 | ||
e4f2379d AB |
82 | /** |
83 | * arc_emac_get_drvinfo - Get EMAC driver information. | |
84 | * @ndev: Pointer to net_device structure. | |
85 | * @info: Pointer to ethtool_drvinfo structure. | |
86 | * | |
87 | * This implements ethtool command for getting the driver information. | |
88 | * Issue "ethtool -i ethX" under linux prompt to execute this function. | |
89 | */ | |
90 | static void arc_emac_get_drvinfo(struct net_device *ndev, | |
91 | struct ethtool_drvinfo *info) | |
92 | { | |
23d2d9a6 RP |
93 | struct arc_emac_priv *priv = netdev_priv(ndev); |
94 | ||
95 | strlcpy(info->driver, priv->drv_name, sizeof(info->driver)); | |
96 | strlcpy(info->version, priv->drv_version, sizeof(info->version)); | |
e4f2379d AB |
97 | } |
98 | ||
99 | static const struct ethtool_ops arc_emac_ethtool_ops = { | |
e4f2379d AB |
100 | .get_drvinfo = arc_emac_get_drvinfo, |
101 | .get_link = ethtool_op_get_link, | |
4694e6e3 PR |
102 | .get_link_ksettings = phy_ethtool_get_link_ksettings, |
103 | .set_link_ksettings = phy_ethtool_set_link_ksettings, | |
e4f2379d AB |
104 | }; |
105 | ||
106 | #define FIRST_OR_LAST_MASK (FIRST_MASK | LAST_MASK) | |
107 | ||
108 | /** | |
109 | * arc_emac_tx_clean - clears processed by EMAC Tx BDs. | |
110 | * @ndev: Pointer to the network device. | |
111 | */ | |
112 | static void arc_emac_tx_clean(struct net_device *ndev) | |
113 | { | |
114 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
ff458f6f | 115 | struct net_device_stats *stats = &ndev->stats; |
e4f2379d AB |
116 | unsigned int i; |
117 | ||
118 | for (i = 0; i < TX_BD_NUM; i++) { | |
119 | unsigned int *txbd_dirty = &priv->txbd_dirty; | |
120 | struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty]; | |
121 | struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty]; | |
122 | struct sk_buff *skb = tx_buff->skb; | |
123 | unsigned int info = le32_to_cpu(txbd->info); | |
124 | ||
c278c253 | 125 | if ((info & FOR_EMAC) || !txbd->data || !skb) |
e4f2379d AB |
126 | break; |
127 | ||
128 | if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) { | |
129 | stats->tx_errors++; | |
130 | stats->tx_dropped++; | |
131 | ||
132 | if (info & DEFR) | |
133 | stats->tx_carrier_errors++; | |
134 | ||
135 | if (info & LTCL) | |
136 | stats->collisions++; | |
137 | ||
138 | if (info & UFLO) | |
139 | stats->tx_fifo_errors++; | |
140 | } else if (likely(info & FIRST_OR_LAST_MASK)) { | |
141 | stats->tx_packets++; | |
142 | stats->tx_bytes += skb->len; | |
143 | } | |
144 | ||
a4a1139b AB |
145 | dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr), |
146 | dma_unmap_len(tx_buff, len), DMA_TO_DEVICE); | |
e4f2379d AB |
147 | |
148 | /* return the sk_buff to system */ | |
149 | dev_kfree_skb_irq(skb); | |
150 | ||
151 | txbd->data = 0; | |
152 | txbd->info = 0; | |
c278c253 | 153 | tx_buff->skb = NULL; |
e4f2379d | 154 | |
27082ee1 | 155 | *txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM; |
e4f2379d | 156 | } |
74dd40bc BG |
157 | |
158 | /* Ensure that txbd_dirty is visible to tx() before checking | |
159 | * for queue stopped. | |
160 | */ | |
161 | smp_mb(); | |
162 | ||
163 | if (netif_queue_stopped(ndev) && arc_emac_tx_avail(priv)) | |
164 | netif_wake_queue(ndev); | |
e4f2379d AB |
165 | } |
166 | ||
167 | /** | |
168 | * arc_emac_rx - processing of Rx packets. | |
169 | * @ndev: Pointer to the network device. | |
170 | * @budget: How many BDs to process on 1 call. | |
171 | * | |
172 | * returns: Number of processed BDs | |
173 | * | |
174 | * Iterate through Rx BDs and deliver received packages to upper layer. | |
175 | */ | |
176 | static int arc_emac_rx(struct net_device *ndev, int budget) | |
177 | { | |
178 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
179 | unsigned int work_done; | |
180 | ||
9cff866e | 181 | for (work_done = 0; work_done < budget; work_done++) { |
e4f2379d | 182 | unsigned int *last_rx_bd = &priv->last_rx_bd; |
ff458f6f | 183 | struct net_device_stats *stats = &ndev->stats; |
e4f2379d AB |
184 | struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd]; |
185 | struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd]; | |
e4f2379d AB |
186 | unsigned int pktlen, info = le32_to_cpu(rxbd->info); |
187 | struct sk_buff *skb; | |
188 | dma_addr_t addr; | |
189 | ||
190 | if (unlikely((info & OWN_MASK) == FOR_EMAC)) | |
191 | break; | |
192 | ||
193 | /* Make a note that we saw a packet at this BD. | |
194 | * So next time, driver starts from this + 1 | |
195 | */ | |
196 | *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM; | |
197 | ||
198 | if (unlikely((info & FIRST_OR_LAST_MASK) != | |
199 | FIRST_OR_LAST_MASK)) { | |
200 | /* We pre-allocate buffers of MTU size so incoming | |
201 | * packets won't be split/chained. | |
202 | */ | |
203 | if (net_ratelimit()) | |
204 | netdev_err(ndev, "incomplete packet received\n"); | |
205 | ||
206 | /* Return ownership to EMAC */ | |
a4a1139b | 207 | rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); |
e4f2379d AB |
208 | stats->rx_errors++; |
209 | stats->rx_length_errors++; | |
210 | continue; | |
211 | } | |
212 | ||
e688822d AK |
213 | /* Prepare the BD for next cycle. netif_receive_skb() |
214 | * only if new skb was allocated and mapped to avoid holes | |
215 | * in the RX fifo. | |
216 | */ | |
217 | skb = netdev_alloc_skb_ip_align(ndev, EMAC_BUFFER_SIZE); | |
218 | if (unlikely(!skb)) { | |
219 | if (net_ratelimit()) | |
220 | netdev_err(ndev, "cannot allocate skb\n"); | |
221 | /* Return ownership to EMAC */ | |
222 | rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); | |
e4f2379d | 223 | stats->rx_errors++; |
e4f2379d AB |
224 | stats->rx_dropped++; |
225 | continue; | |
226 | } | |
227 | ||
e688822d | 228 | addr = dma_map_single(&ndev->dev, (void *)skb->data, |
a4a1139b | 229 | EMAC_BUFFER_SIZE, DMA_FROM_DEVICE); |
e4f2379d AB |
230 | if (dma_mapping_error(&ndev->dev, addr)) { |
231 | if (net_ratelimit()) | |
e688822d AK |
232 | netdev_err(ndev, "cannot map dma buffer\n"); |
233 | dev_kfree_skb(skb); | |
234 | /* Return ownership to EMAC */ | |
235 | rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); | |
e4f2379d | 236 | stats->rx_errors++; |
e688822d | 237 | stats->rx_dropped++; |
e4f2379d AB |
238 | continue; |
239 | } | |
e688822d AK |
240 | |
241 | /* unmap previosly mapped skb */ | |
242 | dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr), | |
243 | dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE); | |
244 | ||
245 | pktlen = info & LEN_MASK; | |
246 | stats->rx_packets++; | |
247 | stats->rx_bytes += pktlen; | |
248 | skb_put(rx_buff->skb, pktlen); | |
249 | rx_buff->skb->dev = ndev; | |
250 | rx_buff->skb->protocol = eth_type_trans(rx_buff->skb, ndev); | |
251 | ||
252 | netif_receive_skb(rx_buff->skb); | |
253 | ||
254 | rx_buff->skb = skb; | |
a4a1139b AB |
255 | dma_unmap_addr_set(rx_buff, addr, addr); |
256 | dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE); | |
e4f2379d | 257 | |
a4a1139b | 258 | rxbd->data = cpu_to_le32(addr); |
e4f2379d AB |
259 | |
260 | /* Make sure pointer to data buffer is set */ | |
261 | wmb(); | |
262 | ||
263 | /* Return ownership to EMAC */ | |
a4a1139b | 264 | rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); |
e4f2379d AB |
265 | } |
266 | ||
267 | return work_done; | |
268 | } | |
269 | ||
270 | /** | |
271 | * arc_emac_poll - NAPI poll handler. | |
272 | * @napi: Pointer to napi_struct structure. | |
273 | * @budget: How many BDs to process on 1 call. | |
274 | * | |
275 | * returns: Number of processed BDs | |
276 | */ | |
277 | static int arc_emac_poll(struct napi_struct *napi, int budget) | |
278 | { | |
279 | struct net_device *ndev = napi->dev; | |
280 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
281 | unsigned int work_done; | |
282 | ||
283 | arc_emac_tx_clean(ndev); | |
284 | ||
285 | work_done = arc_emac_rx(ndev, budget); | |
286 | if (work_done < budget) { | |
6ad20165 | 287 | napi_complete_done(napi, work_done); |
7ce7679d | 288 | arc_reg_or(priv, R_ENABLE, RXINT_MASK | TXINT_MASK); |
e4f2379d AB |
289 | } |
290 | ||
291 | return work_done; | |
292 | } | |
293 | ||
294 | /** | |
295 | * arc_emac_intr - Global interrupt handler for EMAC. | |
296 | * @irq: irq number. | |
297 | * @dev_instance: device instance. | |
298 | * | |
299 | * returns: IRQ_HANDLED for all cases. | |
300 | * | |
301 | * ARC EMAC has only 1 interrupt line, and depending on bits raised in | |
302 | * STATUS register we may tell what is a reason for interrupt to fire. | |
303 | */ | |
304 | static irqreturn_t arc_emac_intr(int irq, void *dev_instance) | |
305 | { | |
306 | struct net_device *ndev = dev_instance; | |
307 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
ff458f6f | 308 | struct net_device_stats *stats = &ndev->stats; |
e4f2379d AB |
309 | unsigned int status; |
310 | ||
311 | status = arc_reg_get(priv, R_STATUS); | |
312 | status &= ~MDIO_MASK; | |
313 | ||
314 | /* Reset all flags except "MDIO complete" */ | |
315 | arc_reg_set(priv, R_STATUS, status); | |
316 | ||
7ce7679d | 317 | if (status & (RXINT_MASK | TXINT_MASK)) { |
e4f2379d | 318 | if (likely(napi_schedule_prep(&priv->napi))) { |
7ce7679d | 319 | arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK); |
e4f2379d AB |
320 | __napi_schedule(&priv->napi); |
321 | } | |
322 | } | |
323 | ||
324 | if (status & ERR_MASK) { | |
325 | /* MSER/RXCR/RXFR/RXFL interrupt fires on corresponding | |
326 | * 8-bit error counter overrun. | |
327 | */ | |
328 | ||
329 | if (status & MSER_MASK) { | |
330 | stats->rx_missed_errors += 0x100; | |
331 | stats->rx_errors += 0x100; | |
332 | } | |
333 | ||
334 | if (status & RXCR_MASK) { | |
335 | stats->rx_crc_errors += 0x100; | |
336 | stats->rx_errors += 0x100; | |
337 | } | |
338 | ||
339 | if (status & RXFR_MASK) { | |
340 | stats->rx_frame_errors += 0x100; | |
341 | stats->rx_errors += 0x100; | |
342 | } | |
343 | ||
344 | if (status & RXFL_MASK) { | |
345 | stats->rx_over_errors += 0x100; | |
346 | stats->rx_errors += 0x100; | |
347 | } | |
348 | } | |
349 | ||
350 | return IRQ_HANDLED; | |
351 | } | |
352 | ||
5a45e57a BG |
353 | #ifdef CONFIG_NET_POLL_CONTROLLER |
354 | static void arc_emac_poll_controller(struct net_device *dev) | |
355 | { | |
356 | disable_irq(dev->irq); | |
357 | arc_emac_intr(dev->irq, dev); | |
358 | enable_irq(dev->irq); | |
359 | } | |
360 | #endif | |
361 | ||
e4f2379d AB |
362 | /** |
363 | * arc_emac_open - Open the network device. | |
364 | * @ndev: Pointer to the network device. | |
365 | * | |
366 | * returns: 0, on success or non-zero error value on failure. | |
367 | * | |
368 | * This function sets the MAC address, requests and enables an IRQ | |
369 | * for the EMAC device and starts the Tx queue. | |
370 | * It also connects to the phy device. | |
371 | */ | |
372 | static int arc_emac_open(struct net_device *ndev) | |
373 | { | |
374 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
01dea536 | 375 | struct phy_device *phy_dev = ndev->phydev; |
e4f2379d AB |
376 | int i; |
377 | ||
378 | phy_dev->autoneg = AUTONEG_ENABLE; | |
379 | phy_dev->speed = 0; | |
380 | phy_dev->duplex = 0; | |
b0ac9564 | 381 | phy_dev->advertising &= phy_dev->supported; |
e4f2379d | 382 | |
a4a1139b AB |
383 | priv->last_rx_bd = 0; |
384 | ||
e4f2379d | 385 | /* Allocate and set buffers for Rx BD's */ |
e4f2379d | 386 | for (i = 0; i < RX_BD_NUM; i++) { |
a4a1139b AB |
387 | dma_addr_t addr; |
388 | unsigned int *last_rx_bd = &priv->last_rx_bd; | |
389 | struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd]; | |
390 | struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd]; | |
391 | ||
392 | rx_buff->skb = netdev_alloc_skb_ip_align(ndev, | |
393 | EMAC_BUFFER_SIZE); | |
394 | if (unlikely(!rx_buff->skb)) | |
395 | return -ENOMEM; | |
396 | ||
397 | addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data, | |
398 | EMAC_BUFFER_SIZE, DMA_FROM_DEVICE); | |
399 | if (dma_mapping_error(&ndev->dev, addr)) { | |
400 | netdev_err(ndev, "cannot dma map\n"); | |
401 | dev_kfree_skb(rx_buff->skb); | |
e4f2379d | 402 | return -ENOMEM; |
a4a1139b AB |
403 | } |
404 | dma_unmap_addr_set(rx_buff, addr, addr); | |
405 | dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE); | |
e4f2379d | 406 | |
a4a1139b | 407 | rxbd->data = cpu_to_le32(addr); |
e4f2379d AB |
408 | |
409 | /* Make sure pointer to data buffer is set */ | |
410 | wmb(); | |
411 | ||
a4a1139b AB |
412 | /* Return ownership to EMAC */ |
413 | rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); | |
e4f2379d | 414 | |
a4a1139b AB |
415 | *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM; |
416 | } | |
e4f2379d | 417 | |
99f93a15 AK |
418 | priv->txbd_curr = 0; |
419 | priv->txbd_dirty = 0; | |
420 | ||
e4f2379d AB |
421 | /* Clean Tx BD's */ |
422 | memset(priv->txbd, 0, TX_RING_SZ); | |
423 | ||
424 | /* Initialize logical address filter */ | |
425 | arc_reg_set(priv, R_LAFL, 0); | |
426 | arc_reg_set(priv, R_LAFH, 0); | |
427 | ||
428 | /* Set BD ring pointers for device side */ | |
429 | arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma); | |
430 | arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma); | |
431 | ||
432 | /* Enable interrupts */ | |
7ce7679d | 433 | arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK); |
e4f2379d AB |
434 | |
435 | /* Set CONTROL */ | |
436 | arc_reg_set(priv, R_CTRL, | |
663713eb CW |
437 | (RX_BD_NUM << 24) | /* RX BD table length */ |
438 | (TX_BD_NUM << 16) | /* TX BD table length */ | |
439 | TXRN_MASK | RXRN_MASK); | |
e4f2379d AB |
440 | |
441 | napi_enable(&priv->napi); | |
442 | ||
443 | /* Enable EMAC */ | |
444 | arc_reg_or(priv, R_CTRL, EN_MASK); | |
445 | ||
b18b7453 | 446 | phy_start(ndev->phydev); |
e4f2379d AB |
447 | |
448 | netif_start_queue(ndev); | |
449 | ||
450 | return 0; | |
451 | } | |
452 | ||
775dd682 BG |
453 | /** |
454 | * arc_emac_set_rx_mode - Change the receive filtering mode. | |
455 | * @ndev: Pointer to the network device. | |
456 | * | |
457 | * This function enables/disables promiscuous or all-multicast mode | |
458 | * and updates the multicast filtering list of the network device. | |
459 | */ | |
460 | static void arc_emac_set_rx_mode(struct net_device *ndev) | |
461 | { | |
462 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
463 | ||
464 | if (ndev->flags & IFF_PROMISC) { | |
465 | arc_reg_or(priv, R_CTRL, PROM_MASK); | |
466 | } else { | |
467 | arc_reg_clr(priv, R_CTRL, PROM_MASK); | |
468 | ||
469 | if (ndev->flags & IFF_ALLMULTI) { | |
470 | arc_reg_set(priv, R_LAFL, ~0); | |
471 | arc_reg_set(priv, R_LAFH, ~0); | |
d0e3f65b | 472 | } else if (ndev->flags & IFF_MULTICAST) { |
775dd682 BG |
473 | struct netdev_hw_addr *ha; |
474 | unsigned int filter[2] = { 0, 0 }; | |
475 | int bit; | |
476 | ||
477 | netdev_for_each_mc_addr(ha, ndev) { | |
478 | bit = ether_crc_le(ETH_ALEN, ha->addr) >> 26; | |
479 | filter[bit >> 5] |= 1 << (bit & 31); | |
480 | } | |
481 | ||
482 | arc_reg_set(priv, R_LAFL, filter[0]); | |
483 | arc_reg_set(priv, R_LAFH, filter[1]); | |
d0e3f65b AK |
484 | } else { |
485 | arc_reg_set(priv, R_LAFL, 0); | |
486 | arc_reg_set(priv, R_LAFH, 0); | |
775dd682 BG |
487 | } |
488 | } | |
489 | } | |
490 | ||
b530b164 AK |
491 | /** |
492 | * arc_free_tx_queue - free skb from tx queue | |
493 | * @ndev: Pointer to the network device. | |
494 | * | |
495 | * This function must be called while EMAC disable | |
496 | */ | |
497 | static void arc_free_tx_queue(struct net_device *ndev) | |
498 | { | |
499 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
500 | unsigned int i; | |
501 | ||
502 | for (i = 0; i < TX_BD_NUM; i++) { | |
503 | struct arc_emac_bd *txbd = &priv->txbd[i]; | |
504 | struct buffer_state *tx_buff = &priv->tx_buff[i]; | |
505 | ||
506 | if (tx_buff->skb) { | |
663713eb CW |
507 | dma_unmap_single(&ndev->dev, |
508 | dma_unmap_addr(tx_buff, addr), | |
509 | dma_unmap_len(tx_buff, len), | |
510 | DMA_TO_DEVICE); | |
b530b164 AK |
511 | |
512 | /* return the sk_buff to system */ | |
513 | dev_kfree_skb_irq(tx_buff->skb); | |
514 | } | |
515 | ||
516 | txbd->info = 0; | |
517 | txbd->data = 0; | |
518 | tx_buff->skb = NULL; | |
519 | } | |
520 | } | |
521 | ||
522 | /** | |
523 | * arc_free_rx_queue - free skb from rx queue | |
524 | * @ndev: Pointer to the network device. | |
525 | * | |
526 | * This function must be called while EMAC disable | |
527 | */ | |
528 | static void arc_free_rx_queue(struct net_device *ndev) | |
529 | { | |
530 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
531 | unsigned int i; | |
532 | ||
533 | for (i = 0; i < RX_BD_NUM; i++) { | |
534 | struct arc_emac_bd *rxbd = &priv->rxbd[i]; | |
535 | struct buffer_state *rx_buff = &priv->rx_buff[i]; | |
536 | ||
537 | if (rx_buff->skb) { | |
663713eb CW |
538 | dma_unmap_single(&ndev->dev, |
539 | dma_unmap_addr(rx_buff, addr), | |
540 | dma_unmap_len(rx_buff, len), | |
541 | DMA_FROM_DEVICE); | |
b530b164 AK |
542 | |
543 | /* return the sk_buff to system */ | |
544 | dev_kfree_skb_irq(rx_buff->skb); | |
545 | } | |
546 | ||
547 | rxbd->info = 0; | |
548 | rxbd->data = 0; | |
549 | rx_buff->skb = NULL; | |
550 | } | |
551 | } | |
552 | ||
e4f2379d AB |
553 | /** |
554 | * arc_emac_stop - Close the network device. | |
555 | * @ndev: Pointer to the network device. | |
556 | * | |
557 | * This function stops the Tx queue, disables interrupts and frees the IRQ for | |
558 | * the EMAC device. | |
559 | * It also disconnects the PHY device associated with the EMAC device. | |
560 | */ | |
561 | static int arc_emac_stop(struct net_device *ndev) | |
562 | { | |
563 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
564 | ||
565 | napi_disable(&priv->napi); | |
566 | netif_stop_queue(ndev); | |
567 | ||
b18b7453 AK |
568 | phy_stop(ndev->phydev); |
569 | ||
e4f2379d | 570 | /* Disable interrupts */ |
7ce7679d | 571 | arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK); |
e4f2379d AB |
572 | |
573 | /* Disable EMAC */ | |
574 | arc_reg_clr(priv, R_CTRL, EN_MASK); | |
575 | ||
b530b164 AK |
576 | /* Return the sk_buff to system */ |
577 | arc_free_tx_queue(ndev); | |
578 | arc_free_rx_queue(ndev); | |
579 | ||
e4f2379d AB |
580 | return 0; |
581 | } | |
582 | ||
583 | /** | |
584 | * arc_emac_stats - Get system network statistics. | |
585 | * @ndev: Pointer to net_device structure. | |
586 | * | |
587 | * Returns the address of the device statistics structure. | |
588 | * Statistics are updated in interrupt handler. | |
589 | */ | |
590 | static struct net_device_stats *arc_emac_stats(struct net_device *ndev) | |
591 | { | |
592 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
ff458f6f | 593 | struct net_device_stats *stats = &ndev->stats; |
e4f2379d AB |
594 | unsigned long miss, rxerr; |
595 | u8 rxcrc, rxfram, rxoflow; | |
596 | ||
597 | rxerr = arc_reg_get(priv, R_RXERR); | |
598 | miss = arc_reg_get(priv, R_MISS); | |
599 | ||
600 | rxcrc = rxerr; | |
601 | rxfram = rxerr >> 8; | |
602 | rxoflow = rxerr >> 16; | |
603 | ||
604 | stats->rx_errors += miss; | |
605 | stats->rx_errors += rxcrc + rxfram + rxoflow; | |
606 | ||
607 | stats->rx_over_errors += rxoflow; | |
608 | stats->rx_frame_errors += rxfram; | |
609 | stats->rx_crc_errors += rxcrc; | |
610 | stats->rx_missed_errors += miss; | |
611 | ||
612 | return stats; | |
613 | } | |
614 | ||
615 | /** | |
616 | * arc_emac_tx - Starts the data transmission. | |
617 | * @skb: sk_buff pointer that contains data to be Transmitted. | |
618 | * @ndev: Pointer to net_device structure. | |
619 | * | |
620 | * returns: NETDEV_TX_OK, on success | |
621 | * NETDEV_TX_BUSY, if any of the descriptors are not free. | |
622 | * | |
623 | * This function is invoked from upper layers to initiate transmission. | |
624 | */ | |
625 | static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev) | |
626 | { | |
627 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
628 | unsigned int len, *txbd_curr = &priv->txbd_curr; | |
ff458f6f | 629 | struct net_device_stats *stats = &ndev->stats; |
e4f2379d AB |
630 | __le32 *info = &priv->txbd[*txbd_curr].info; |
631 | dma_addr_t addr; | |
632 | ||
633 | if (skb_padto(skb, ETH_ZLEN)) | |
634 | return NETDEV_TX_OK; | |
635 | ||
636 | len = max_t(unsigned int, ETH_ZLEN, skb->len); | |
637 | ||
74dd40bc | 638 | if (unlikely(!arc_emac_tx_avail(priv))) { |
e4f2379d | 639 | netif_stop_queue(ndev); |
74dd40bc | 640 | netdev_err(ndev, "BUG! Tx Ring full when queue awake!\n"); |
e4f2379d AB |
641 | return NETDEV_TX_BUSY; |
642 | } | |
643 | ||
644 | addr = dma_map_single(&ndev->dev, (void *)skb->data, len, | |
645 | DMA_TO_DEVICE); | |
646 | ||
647 | if (unlikely(dma_mapping_error(&ndev->dev, addr))) { | |
648 | stats->tx_dropped++; | |
649 | stats->tx_errors++; | |
0f6e8761 | 650 | dev_kfree_skb_any(skb); |
e4f2379d AB |
651 | return NETDEV_TX_OK; |
652 | } | |
a4a1139b | 653 | dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr); |
e4f2379d AB |
654 | dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len); |
655 | ||
a4a1139b | 656 | priv->txbd[*txbd_curr].data = cpu_to_le32(addr); |
e4f2379d AB |
657 | |
658 | /* Make sure pointer to data buffer is set */ | |
659 | wmb(); | |
660 | ||
37ec274e ED |
661 | skb_tx_timestamp(skb); |
662 | ||
e4f2379d AB |
663 | *info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len); |
664 | ||
c278c253 AK |
665 | /* Make sure info word is set */ |
666 | wmb(); | |
667 | ||
668 | priv->tx_buff[*txbd_curr].skb = skb; | |
669 | ||
e4f2379d AB |
670 | /* Increment index to point to the next BD */ |
671 | *txbd_curr = (*txbd_curr + 1) % TX_BD_NUM; | |
672 | ||
74dd40bc BG |
673 | /* Ensure that tx_clean() sees the new txbd_curr before |
674 | * checking the queue status. This prevents an unneeded wake | |
675 | * of the queue in tx_clean(). | |
676 | */ | |
677 | smp_mb(); | |
e4f2379d | 678 | |
74dd40bc | 679 | if (!arc_emac_tx_avail(priv)) { |
e4f2379d | 680 | netif_stop_queue(ndev); |
74dd40bc BG |
681 | /* Refresh tx_dirty */ |
682 | smp_mb(); | |
683 | if (arc_emac_tx_avail(priv)) | |
684 | netif_start_queue(ndev); | |
685 | } | |
e4f2379d AB |
686 | |
687 | arc_reg_set(priv, R_STATUS, TXPL_MASK); | |
688 | ||
e4f2379d AB |
689 | return NETDEV_TX_OK; |
690 | } | |
691 | ||
235a251a MS |
692 | static void arc_emac_set_address_internal(struct net_device *ndev) |
693 | { | |
694 | struct arc_emac_priv *priv = netdev_priv(ndev); | |
695 | unsigned int addr_low, addr_hi; | |
696 | ||
663713eb CW |
697 | addr_low = le32_to_cpu(*(__le32 *)&ndev->dev_addr[0]); |
698 | addr_hi = le16_to_cpu(*(__le16 *)&ndev->dev_addr[4]); | |
235a251a MS |
699 | |
700 | arc_reg_set(priv, R_ADDRL, addr_low); | |
701 | arc_reg_set(priv, R_ADDRH, addr_hi); | |
702 | } | |
703 | ||
e4f2379d AB |
704 | /** |
705 | * arc_emac_set_address - Set the MAC address for this device. | |
706 | * @ndev: Pointer to net_device structure. | |
707 | * @p: 6 byte Address to be written as MAC address. | |
708 | * | |
709 | * This function copies the HW address from the sockaddr structure to the | |
710 | * net_device structure and updates the address in HW. | |
711 | * | |
712 | * returns: -EBUSY if the net device is busy or 0 if the address is set | |
713 | * successfully. | |
714 | */ | |
715 | static int arc_emac_set_address(struct net_device *ndev, void *p) | |
716 | { | |
e4f2379d | 717 | struct sockaddr *addr = p; |
e4f2379d AB |
718 | |
719 | if (netif_running(ndev)) | |
720 | return -EBUSY; | |
721 | ||
722 | if (!is_valid_ether_addr(addr->sa_data)) | |
723 | return -EADDRNOTAVAIL; | |
724 | ||
725 | memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len); | |
726 | ||
235a251a | 727 | arc_emac_set_address_internal(ndev); |
e4f2379d AB |
728 | |
729 | return 0; | |
730 | } | |
731 | ||
e11e8729 RP |
732 | static int arc_emac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
733 | { | |
734 | if (!netif_running(dev)) | |
735 | return -EINVAL; | |
736 | ||
737 | if (!dev->phydev) | |
738 | return -ENODEV; | |
739 | ||
740 | return phy_mii_ioctl(dev->phydev, rq, cmd); | |
741 | } | |
742 | ||
743 | ||
e4f2379d AB |
744 | static const struct net_device_ops arc_emac_netdev_ops = { |
745 | .ndo_open = arc_emac_open, | |
746 | .ndo_stop = arc_emac_stop, | |
747 | .ndo_start_xmit = arc_emac_tx, | |
748 | .ndo_set_mac_address = arc_emac_set_address, | |
749 | .ndo_get_stats = arc_emac_stats, | |
775dd682 | 750 | .ndo_set_rx_mode = arc_emac_set_rx_mode, |
e11e8729 | 751 | .ndo_do_ioctl = arc_emac_ioctl, |
5a45e57a BG |
752 | #ifdef CONFIG_NET_POLL_CONTROLLER |
753 | .ndo_poll_controller = arc_emac_poll_controller, | |
754 | #endif | |
e4f2379d AB |
755 | }; |
756 | ||
23d2d9a6 | 757 | int arc_emac_probe(struct net_device *ndev, int interface) |
e4f2379d | 758 | { |
23d2d9a6 | 759 | struct device *dev = ndev->dev.parent; |
f7578496 | 760 | struct resource res_regs; |
e4f2379d | 761 | struct device_node *phy_node; |
01dea536 | 762 | struct phy_device *phydev = NULL; |
e4f2379d | 763 | struct arc_emac_priv *priv; |
e4f2379d | 764 | const char *mac_addr; |
f7578496 | 765 | unsigned int id, clock_frequency, irq; |
e4f2379d AB |
766 | int err; |
767 | ||
e4f2379d | 768 | /* Get PHY from device tree */ |
f15f44e0 | 769 | phy_node = of_parse_phandle(dev->of_node, "phy", 0); |
e4f2379d | 770 | if (!phy_node) { |
f15f44e0 | 771 | dev_err(dev, "failed to retrieve phy description from device tree\n"); |
e4f2379d AB |
772 | return -ENODEV; |
773 | } | |
774 | ||
775 | /* Get EMAC registers base address from device tree */ | |
f15f44e0 | 776 | err = of_address_to_resource(dev->of_node, 0, &res_regs); |
e4f2379d | 777 | if (err) { |
f15f44e0 | 778 | dev_err(dev, "failed to retrieve registers base from device tree\n"); |
a94efbd7 PC |
779 | err = -ENODEV; |
780 | goto out_put_node; | |
e4f2379d AB |
781 | } |
782 | ||
e4f2379d | 783 | /* Get IRQ from device tree */ |
f15f44e0 | 784 | irq = irq_of_parse_and_map(dev->of_node, 0); |
f7578496 | 785 | if (!irq) { |
f15f44e0 | 786 | dev_err(dev, "failed to retrieve <irq> value from device tree\n"); |
a94efbd7 PC |
787 | err = -ENODEV; |
788 | goto out_put_node; | |
e4f2379d AB |
789 | } |
790 | ||
e4f2379d AB |
791 | ndev->netdev_ops = &arc_emac_netdev_ops; |
792 | ndev->ethtool_ops = &arc_emac_ethtool_ops; | |
793 | ndev->watchdog_timeo = TX_TIMEOUT; | |
e4f2379d AB |
794 | |
795 | priv = netdev_priv(ndev); | |
f15f44e0 | 796 | priv->dev = dev; |
e4f2379d | 797 | |
f15f44e0 | 798 | priv->regs = devm_ioremap_resource(dev, &res_regs); |
54447f1a WY |
799 | if (IS_ERR(priv->regs)) { |
800 | err = PTR_ERR(priv->regs); | |
801 | goto out_put_node; | |
802 | } | |
663713eb | 803 | |
f15f44e0 | 804 | dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs); |
e4f2379d | 805 | |
23d2d9a6 | 806 | if (priv->clk) { |
88154c96 HS |
807 | err = clk_prepare_enable(priv->clk); |
808 | if (err) { | |
f15f44e0 | 809 | dev_err(dev, "failed to enable clock\n"); |
a94efbd7 | 810 | goto out_put_node; |
88154c96 HS |
811 | } |
812 | ||
813 | clock_frequency = clk_get_rate(priv->clk); | |
23d2d9a6 RP |
814 | } else { |
815 | /* Get CPU clock frequency from device tree */ | |
816 | if (of_property_read_u32(dev->of_node, "clock-frequency", | |
817 | &clock_frequency)) { | |
818 | dev_err(dev, "failed to retrieve <clock-frequency> from device tree\n"); | |
a94efbd7 PC |
819 | err = -EINVAL; |
820 | goto out_put_node; | |
23d2d9a6 | 821 | } |
88154c96 HS |
822 | } |
823 | ||
e4f2379d AB |
824 | id = arc_reg_get(priv, R_ID); |
825 | ||
826 | /* Check for EMAC revision 5 or 7, magic number */ | |
827 | if (!(id == 0x0005fd02 || id == 0x0007fd02)) { | |
f15f44e0 | 828 | dev_err(dev, "ARC EMAC not detected, id=0x%x\n", id); |
e4f2379d | 829 | err = -ENODEV; |
88154c96 | 830 | goto out_clken; |
e4f2379d | 831 | } |
f15f44e0 | 832 | dev_info(dev, "ARC EMAC detected with id: 0x%x\n", id); |
e4f2379d AB |
833 | |
834 | /* Set poll rate so that it polls every 1 ms */ | |
835 | arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000); | |
836 | ||
f7578496 | 837 | ndev->irq = irq; |
f15f44e0 | 838 | dev_info(dev, "IRQ is %d\n", ndev->irq); |
e4f2379d AB |
839 | |
840 | /* Register interrupt handler for device */ | |
f15f44e0 | 841 | err = devm_request_irq(dev, ndev->irq, arc_emac_intr, 0, |
e4f2379d AB |
842 | ndev->name, ndev); |
843 | if (err) { | |
f15f44e0 | 844 | dev_err(dev, "could not allocate IRQ\n"); |
88154c96 | 845 | goto out_clken; |
e4f2379d AB |
846 | } |
847 | ||
848 | /* Get MAC address from device tree */ | |
f15f44e0 | 849 | mac_addr = of_get_mac_address(dev->of_node); |
e4f2379d | 850 | |
99470819 | 851 | if (mac_addr) |
e4f2379d | 852 | memcpy(ndev->dev_addr, mac_addr, ETH_ALEN); |
99470819 LP |
853 | else |
854 | eth_hw_addr_random(ndev); | |
e4f2379d | 855 | |
235a251a | 856 | arc_emac_set_address_internal(ndev); |
f15f44e0 | 857 | dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr); |
e4f2379d AB |
858 | |
859 | /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */ | |
f15f44e0 | 860 | priv->rxbd = dmam_alloc_coherent(dev, RX_RING_SZ + TX_RING_SZ, |
e4f2379d AB |
861 | &priv->rxbd_dma, GFP_KERNEL); |
862 | ||
863 | if (!priv->rxbd) { | |
f15f44e0 | 864 | dev_err(dev, "failed to allocate data buffers\n"); |
e4f2379d | 865 | err = -ENOMEM; |
88154c96 | 866 | goto out_clken; |
e4f2379d AB |
867 | } |
868 | ||
869 | priv->txbd = priv->rxbd + RX_BD_NUM; | |
870 | ||
871 | priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ; | |
f15f44e0 | 872 | dev_dbg(dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n", |
e4f2379d AB |
873 | (unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma); |
874 | ||
93e91b3d | 875 | err = arc_mdio_probe(priv); |
e4f2379d | 876 | if (err) { |
f15f44e0 | 877 | dev_err(dev, "failed to probe MII bus\n"); |
88154c96 | 878 | goto out_clken; |
e4f2379d AB |
879 | } |
880 | ||
01dea536 PR |
881 | phydev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0, |
882 | interface); | |
883 | if (!phydev) { | |
f15f44e0 | 884 | dev_err(dev, "of_phy_connect() failed\n"); |
e4f2379d | 885 | err = -ENODEV; |
796bec1e | 886 | goto out_mdio; |
e4f2379d AB |
887 | } |
888 | ||
f15f44e0 | 889 | dev_info(dev, "connected to %s phy with id 0x%x\n", |
01dea536 | 890 | phydev->drv->name, phydev->phy_id); |
e4f2379d AB |
891 | |
892 | netif_napi_add(ndev, &priv->napi, arc_emac_poll, ARC_EMAC_NAPI_WEIGHT); | |
893 | ||
894 | err = register_netdev(ndev); | |
895 | if (err) { | |
f15f44e0 | 896 | dev_err(dev, "failed to register network device\n"); |
796bec1e | 897 | goto out_netif_api; |
e4f2379d AB |
898 | } |
899 | ||
a94efbd7 | 900 | of_node_put(phy_node); |
e4f2379d AB |
901 | return 0; |
902 | ||
796bec1e HS |
903 | out_netif_api: |
904 | netif_napi_del(&priv->napi); | |
01dea536 | 905 | phy_disconnect(phydev); |
796bec1e HS |
906 | out_mdio: |
907 | arc_mdio_remove(priv); | |
88154c96 | 908 | out_clken: |
23d2d9a6 | 909 | if (priv->clk) |
88154c96 | 910 | clk_disable_unprepare(priv->clk); |
a94efbd7 PC |
911 | out_put_node: |
912 | of_node_put(phy_node); | |
913 | ||
e4f2379d AB |
914 | return err; |
915 | } | |
23d2d9a6 | 916 | EXPORT_SYMBOL_GPL(arc_emac_probe); |
e4f2379d | 917 | |
23d2d9a6 | 918 | int arc_emac_remove(struct net_device *ndev) |
e4f2379d | 919 | { |
e4f2379d AB |
920 | struct arc_emac_priv *priv = netdev_priv(ndev); |
921 | ||
01dea536 | 922 | phy_disconnect(ndev->phydev); |
e4f2379d AB |
923 | arc_mdio_remove(priv); |
924 | unregister_netdev(ndev); | |
925 | netif_napi_del(&priv->napi); | |
88154c96 | 926 | |
663713eb | 927 | if (!IS_ERR(priv->clk)) |
88154c96 | 928 | clk_disable_unprepare(priv->clk); |
e4f2379d AB |
929 | |
930 | return 0; | |
931 | } | |
23d2d9a6 | 932 | EXPORT_SYMBOL_GPL(arc_emac_remove); |
e4f2379d AB |
933 | |
934 | MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>"); | |
935 | MODULE_DESCRIPTION("ARC EMAC driver"); | |
936 | MODULE_LICENSE("GPL"); |