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Merge tag 'selinux-pr-20220523' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-block.git] / drivers / net / ethernet / aquantia / atlantic / aq_nic.c
CommitLineData
75a6faf6 1// SPDX-License-Identifier: GPL-2.0-only
843e1396
MS		 2/* Atlantic Network Driver
3 *
4 * Copyright (C) 2014-2019 aQuantia Corporation
5 * Copyright (C) 2019-2020 Marvell International Ltd.
97bde5c4
DV		 6 */
7
8/* File aq_nic.c: Definition of common code for NIC. */
9
10#include "aq_nic.h"
11#include "aq_ring.h"
12#include "aq_vec.h"
13#include "aq_hw.h"
14#include "aq_pci_func.h"
62c1c2e6 15#include "aq_macsec.h"
4c83f170 16#include "aq_main.h"
dbcd6806 17#include "aq_phy.h"
1a64f8dc 18#include "aq_ptp.h"
5a1bf9ef 19#include "aq_filters.h"
97bde5c4 20
b82ee71a 21#include <linux/moduleparam.h>
97bde5c4
DV		 22#include <linux/netdevice.h>
23#include <linux/etherdevice.h>
24#include <linux/timer.h>
25#include <linux/cpu.h>
26#include <linux/ip.h>
27#include <linux/tcp.h>
28#include <net/ip.h>
a83fe6b6 29#include <net/pkt_cls.h>
97bde5c4 30
b82ee71a
IR		 31static unsigned int aq_itr = AQ_CFG_INTERRUPT_MODERATION_AUTO;
32module_param_named(aq_itr, aq_itr, uint, 0644);
33MODULE_PARM_DESC(aq_itr, "Interrupt throttling mode");
34
35static unsigned int aq_itr_tx;
36module_param_named(aq_itr_tx, aq_itr_tx, uint, 0644);
37MODULE_PARM_DESC(aq_itr_tx, "TX interrupt throttle rate");
38
39static unsigned int aq_itr_rx;
40module_param_named(aq_itr_rx, aq_itr_rx, uint, 0644);
41MODULE_PARM_DESC(aq_itr_rx, "RX interrupt throttle rate");
42
9f8a2203
IR		 43static void aq_nic_update_ndev_stats(struct aq_nic_s *self);
44
97bde5c4
DV		 45static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues)
46{
474fb115 47 static u8 rss_key[AQ_CFG_RSS_HASHKEY_SIZE] = {
97bde5c4
DV		 48 0x1e, 0xad, 0x71, 0x87, 0x65, 0xfc, 0x26, 0x7d,
49 0x0d, 0x45, 0x67, 0x74, 0xcd, 0x06, 0x1a, 0x18,
50 0xb6, 0xc1, 0xf0, 0xc7, 0xbb, 0x18, 0xbe, 0xf8,
51 0x19, 0x13, 0x4b, 0xa9, 0xd0, 0x3e, 0xfe, 0x70,
52 0x25, 0x03, 0xab, 0x50, 0x6a, 0x8b, 0x82, 0x0c
53 };
7b0c342f
ND		 54 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
55 struct aq_rss_parameters *rss_params;
56 int i = 0;
57
58 rss_params = &cfg->aq_rss;
97bde5c4
DV		 59
60 rss_params->hash_secret_key_size = sizeof(rss_key);
61 memcpy(rss_params->hash_secret_key, rss_key, sizeof(rss_key));
62 rss_params->indirection_table_size = AQ_CFG_RSS_INDIRECTION_TABLE_MAX;
63
64 for (i = rss_params->indirection_table_size; i--;)
65 rss_params->indirection_table[i] = i & (num_rss_queues - 1);
66}
67
14ef766b
MS		 68/* Recalculate the number of vectors */
69static void aq_nic_cfg_update_num_vecs(struct aq_nic_s *self)
70{
71 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
72
73 cfg->vecs = min(cfg->aq_hw_caps->vecs, AQ_CFG_VECS_DEF);
74 cfg->vecs = min(cfg->vecs, num_online_cpus());
75 if (self->irqvecs > AQ_HW_SERVICE_IRQS)
76 cfg->vecs = min(cfg->vecs, self->irqvecs - AQ_HW_SERVICE_IRQS);
77 /* cfg->vecs should be power of 2 for RSS */
78 cfg->vecs = rounddown_pow_of_two(cfg->vecs);
79
80 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ANTIGUA)) {
81 if (cfg->tcs > 2)
82 cfg->vecs = min(cfg->vecs, 4U);
83 }
84
85 if (cfg->vecs <= 4)
86 cfg->tc_mode = AQ_TC_MODE_8TCS;
87 else
88 cfg->tc_mode = AQ_TC_MODE_4TCS;
89
90 /*rss rings */
91 cfg->num_rss_queues = min(cfg->vecs, AQ_CFG_NUM_RSS_QUEUES_DEF);
92 aq_nic_rss_init(self, cfg->num_rss_queues);
93}
94
23ee07ad
IR		 95/* Checks hw_caps and 'corrects' aq_nic_cfg in runtime */
96void aq_nic_cfg_start(struct aq_nic_s *self)
97bde5c4
DV		 97{
98 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
a83fe6b6 99 int i;
97bde5c4 100
97bde5c4
DV		 101 cfg->tcs = AQ_CFG_TCS_DEF;
102
97bde5c4
DV		 103 cfg->is_polling = AQ_CFG_IS_POLLING_DEF;
104
b82ee71a
IR		 105 cfg->itr = aq_itr;
106 cfg->tx_itr = aq_itr_tx;
107 cfg->rx_itr = aq_itr_rx;
97bde5c4 108
46f4c29d 109 cfg->rxpageorder = AQ_CFG_RX_PAGEORDER;
97bde5c4 110 cfg->is_rss = AQ_CFG_IS_RSS_DEF;
97bde5c4 111 cfg->aq_rss.base_cpu_number = AQ_CFG_RSS_BASE_CPU_NUM_DEF;
8009bb19 112 cfg->fc.req = AQ_CFG_FC_MODE;
837c6378 113 cfg->wol = AQ_CFG_WOL_MODES;
97bde5c4
DV		 114
115 cfg->mtu = AQ_CFG_MTU_DEF;
116 cfg->link_speed_msk = AQ_CFG_SPEED_MSK;
117 cfg->is_autoneg = AQ_CFG_IS_AUTONEG_DEF;
118
119 cfg->is_lro = AQ_CFG_IS_LRO_DEF;
0aa7bc3e 120 cfg->is_ptp = true;
97bde5c4 121
97bde5c4 122 /*descriptors */
c1af5427
AM		 123 cfg->rxds = min(cfg->aq_hw_caps->rxds_max, AQ_CFG_RXDS_DEF);
124 cfg->txds = min(cfg->aq_hw_caps->txds_max, AQ_CFG_TXDS_DEF);
97bde5c4 125
14ef766b 126 aq_nic_cfg_update_num_vecs(self);
a8c69ca7 127
23ee07ad 128 cfg->irq_type = aq_pci_func_get_irq_type(self);
97bde5c4
DV		 129
130 if ((cfg->irq_type == AQ_HW_IRQ_LEGACY) ||
8fcb98f4 131 (cfg->aq_hw_caps->vecs == 1U) ||
97bde5c4
DV		 132 (cfg->vecs == 1U)) {
133 cfg->is_rss = 0U;
134 cfg->vecs = 1U;
135 }
136
4c83f170
IR		 137 /* Check if we have enough vectors allocated for
138 * link status IRQ. If no - we'll know link state from
139 * slower service task.
140 */
141 if (AQ_HW_SERVICE_IRQS > 0 && cfg->vecs + 1 <= self->irqvecs)
142 cfg->link_irq_vec = cfg->vecs;
143 else
144 cfg->link_irq_vec = 0;
145
8fcb98f4 146 cfg->link_speed_msk &= cfg->aq_hw_caps->link_speed_msk;
bbb67a44 147 cfg->features = cfg->aq_hw_caps->hw_features;
d3ed7c5c
IR		 148 cfg->is_vlan_rx_strip = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_RX);
149 cfg->is_vlan_tx_insert = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_TX);
48dd73d0 150 cfg->is_vlan_force_promisc = true;
a83fe6b6
DB		 151
152 for (i = 0; i < sizeof(cfg->prio_tc_map); i++)
153 cfg->prio_tc_map[i] = cfg->tcs * i / 8;
97bde5c4
DV		 154}
155
3aec6412
IR		 156static int aq_nic_update_link_status(struct aq_nic_s *self)
157{
0c58c35f 158 int err = self->aq_fw_ops->update_link_status(self->aq_hw);
35e8e8b4 159 u32 fc = 0;
3aec6412
IR		 160
161 if (err)
162 return err;
163
8009bb19
ND		 164 if (self->aq_fw_ops->get_flow_control)
165 self->aq_fw_ops->get_flow_control(self->aq_hw, &fc);
166 self->aq_nic_cfg.fc.cur = fc;
167
b82ee71a 168 if (self->link_status.mbps != self->aq_hw->aq_link_status.mbps) {
58128fa0
ND		 169 netdev_info(self->ndev, "%s: link change old %d new %d\n",
170 AQ_CFG_DRV_NAME, self->link_status.mbps,
171 self->aq_hw->aq_link_status.mbps);
b82ee71a 172 aq_nic_update_interrupt_moderation_settings(self);
35e8e8b4 173
04a18399 174 if (self->aq_ptp) {
910479a9 175 aq_ptp_clock_init(self);
04a18399
EP		 176 aq_ptp_tm_offset_set(self,
177 self->aq_hw->aq_link_status.mbps);
9c477032 178 aq_ptp_link_change(self);
04a18399 179 }
910479a9 180
35e8e8b4
IR		 181 /* Driver has to update flow control settings on RX block
182 * on any link event.
183 * We should query FW whether it negotiated FC.
184 */
35e8e8b4
IR		 185 if (self->aq_hw_ops->hw_set_fc)
186 self->aq_hw_ops->hw_set_fc(self->aq_hw, fc, 0);
b82ee71a 187 }
3aec6412
IR		 188
189 self->link_status = self->aq_hw->aq_link_status;
190 if (!netif_carrier_ok(self->ndev) && self->link_status.mbps) {
78f5193d 191 aq_utils_obj_set(&self->flags,
3aec6412 192 AQ_NIC_FLAG_STARTED);
78f5193d 193 aq_utils_obj_clear(&self->flags,
3aec6412
IR		 194 AQ_NIC_LINK_DOWN);
195 netif_carrier_on(self->ndev);
62c1c2e6
DB		 196#if IS_ENABLED(CONFIG_MACSEC)
197 aq_macsec_enable(self);
198#endif
2deac71a
MS		 199 if (self->aq_hw_ops->hw_tc_rate_limit_set)
200 self->aq_hw_ops->hw_tc_rate_limit_set(self->aq_hw);
201
3aec6412
IR		 202 netif_tx_wake_all_queues(self->ndev);
203 }
204 if (netif_carrier_ok(self->ndev) && !self->link_status.mbps) {
205 netif_carrier_off(self->ndev);
206 netif_tx_disable(self->ndev);
78f5193d 207 aq_utils_obj_set(&self->flags, AQ_NIC_LINK_DOWN);
3aec6412 208 }
7b0c342f 209
3aec6412
IR		 210 return 0;
211}
212
1d2a8a13
IR		 213static irqreturn_t aq_linkstate_threaded_isr(int irq, void *private)
214{
215 struct aq_nic_s *self = private;
216
217 if (!self)
218 return IRQ_NONE;
219
220 aq_nic_update_link_status(self);
221
222 self->aq_hw_ops->hw_irq_enable(self->aq_hw,
223 BIT(self->aq_nic_cfg.link_irq_vec));
7b0c342f 224
1d2a8a13
IR		 225 return IRQ_HANDLED;
226}
227
49544935 228static void aq_nic_service_task(struct work_struct *work)
97bde5c4 229{
49544935
IR		 230 struct aq_nic_s *self = container_of(work, struct aq_nic_s,
231 service_task);
232 int err;
97bde5c4 233
04a18399
EP		 234 aq_ptp_service_task(self);
235
78f5193d 236 if (aq_utils_obj_test(&self->flags, AQ_NIC_FLAGS_IS_NOT_READY))
49544935 237 return;
97bde5c4 238
3aec6412
IR		 239 err = aq_nic_update_link_status(self);
240 if (err)
49544935 241 return;
97bde5c4 242
62c1c2e6
DB		 243#if IS_ENABLED(CONFIG_MACSEC)
244 aq_macsec_work(self);
245#endif
246
49544935 247 mutex_lock(&self->fwreq_mutex);
0c58c35f
IR		 248 if (self->aq_fw_ops->update_stats)
249 self->aq_fw_ops->update_stats(self->aq_hw);
49544935 250 mutex_unlock(&self->fwreq_mutex);
65e665e6 251
9f8a2203 252 aq_nic_update_ndev_stats(self);
49544935
IR		 253}
254
255static void aq_nic_service_timer_cb(struct timer_list *t)
256{
257 struct aq_nic_s *self = from_timer(self, t, service_timer);
97bde5c4 258
7b0c342f
ND		 259 mod_timer(&self->service_timer,
260 jiffies + AQ_CFG_SERVICE_TIMER_INTERVAL);
49544935
IR		 261
262 aq_ndev_schedule_work(&self->service_task);
97bde5c4
DV		 263}
264
e99e88a9 265static void aq_nic_polling_timer_cb(struct timer_list *t)
97bde5c4 266{
e99e88a9 267 struct aq_nic_s *self = from_timer(self, t, polling_timer);
97bde5c4
DV		 268 struct aq_vec_s *aq_vec = NULL;
269 unsigned int i = 0U;
270
271 for (i = 0U, aq_vec = self->aq_vec[0];
272 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i])
273 aq_vec_isr(i, (void *)aq_vec);
274
275 mod_timer(&self->polling_timer, jiffies +
e9157848 276 AQ_CFG_POLLING_TIMER_INTERVAL);
97bde5c4
DV		 277}
278
099d074e
MS		 279static int aq_nic_hw_prepare(struct aq_nic_s *self)
280{
281 int err = 0;
282
283 err = self->aq_hw_ops->hw_soft_reset(self->aq_hw);
284 if (err)
285 goto exit;
286
287 err = self->aq_hw_ops->hw_prepare(self->aq_hw, &self->aq_fw_ops);
288
289exit:
290 return err;
291}
292
b4de6c49
MS		 293static bool aq_nic_is_valid_ether_addr(const u8 *addr)
294{
295 /* Some engineering samples of Aquantia NICs are provisioned with a
296 * partially populated MAC, which is still invalid.
297 */
298 return !(addr[0] == 0 && addr[1] == 0 && addr[2] == 0);
299}
300
97bde5c4
DV		 301int aq_nic_ndev_register(struct aq_nic_s *self)
302{
698c33d8 303 u8 addr[ETH_ALEN];
97bde5c4 304 int err = 0;
97bde5c4
DV		 305
306 if (!self->ndev) {
307 err = -EINVAL;
308 goto err_exit;
309 }
23ee07ad 310
099d074e 311 err = aq_nic_hw_prepare(self);
0c58c35f
IR		 312 if (err)
313 goto err_exit;
314
62c1c2e6
DB		 315#if IS_ENABLED(CONFIG_MACSEC)
316 aq_macsec_init(self);
317#endif
318
553217c2
TC		 319 if (platform_get_ethdev_address(&self->pdev->dev, self->ndev) != 0) {
320 // If DT has none or an invalid one, ask device for MAC address
321 mutex_lock(&self->fwreq_mutex);
322 err = self->aq_fw_ops->get_mac_permanent(self->aq_hw, addr);
323 mutex_unlock(&self->fwreq_mutex);
97bde5c4 324
553217c2
TC		 325 if (err)
326 goto err_exit;
698c33d8 327
553217c2
TC		 328 if (is_valid_ether_addr(addr) &&
329 aq_nic_is_valid_ether_addr(addr)) {
330 eth_hw_addr_set(self->ndev, addr);
331 } else {
332 netdev_warn(self->ndev, "MAC is invalid, will use random.");
333 eth_hw_addr_random(self->ndev);
334 }
b4de6c49
MS		 335 }
336
97bde5c4
DV		 337#if defined(AQ_CFG_MAC_ADDR_PERMANENT)
338 {
339 static u8 mac_addr_permanent[] = AQ_CFG_MAC_ADDR_PERMANENT;
340
f3956ebb 341 eth_hw_addr_set(self->ndev, mac_addr_permanent);
97bde5c4
DV		 342 }
343#endif
97bde5c4 344
23ee07ad
IR		 345 for (self->aq_vecs = 0; self->aq_vecs < aq_nic_get_cfg(self)->vecs;
346 self->aq_vecs++) {
347 self->aq_vec[self->aq_vecs] =
348 aq_vec_alloc(self, self->aq_vecs, aq_nic_get_cfg(self));
349 if (!self->aq_vec[self->aq_vecs]) {
350 err = -ENOMEM;
351 goto err_exit;
352 }
353 }
354
97bde5c4
DV		 355 netif_carrier_off(self->ndev);
356
3aec6412 357 netif_tx_disable(self->ndev);
97bde5c4 358
55629109 359 err = register_netdev(self->ndev);
23ee07ad 360 if (err)
55629109
PB		 361 goto err_exit;
362
97bde5c4 363err_exit:
62c1c2e6
DB		 364#if IS_ENABLED(CONFIG_MACSEC)
365 if (err)
366 aq_macsec_free(self);
367#endif
97bde5c4
DV		 368 return err;
369}
370
23ee07ad 371void aq_nic_ndev_init(struct aq_nic_s *self)
97bde5c4 372{
4cbc9f92 373 const struct aq_hw_caps_s *aq_hw_caps = self->aq_nic_cfg.aq_hw_caps;
97bde5c4
DV		 374 struct aq_nic_cfg_s *aq_nic_cfg = &self->aq_nic_cfg;
375
376 self->ndev->hw_features |= aq_hw_caps->hw_features;
377 self->ndev->features = aq_hw_caps->hw_features;
8c61ab7f 378 self->ndev->vlan_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
d3ed7c5c 379 NETIF_F_RXHASH | NETIF_F_SG |
8bd60710 380 NETIF_F_LRO | NETIF_F_TSO | NETIF_F_TSO6;
822cd114 381 self->ndev->gso_partial_features = NETIF_F_GSO_UDP_L4;
97bde5c4 382 self->ndev->priv_flags = aq_hw_caps->hw_priv_flags;
3e9a5451
IR		 383 self->ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
384
58128fa0 385 self->msg_enable = NETIF_MSG_DRV | NETIF_MSG_LINK;
97bde5c4 386 self->ndev->mtu = aq_nic_cfg->mtu - ETH_HLEN;
8fcb98f4 387 self->ndev->max_mtu = aq_hw_caps->mtu - ETH_FCS_LEN - ETH_HLEN;
97bde5c4 388
97bde5c4
DV		 389}
390
391void aq_nic_set_tx_ring(struct aq_nic_s *self, unsigned int idx,
392 struct aq_ring_s *ring)
393{
394 self->aq_ring_tx[idx] = ring;
395}
396
97bde5c4
DV		 397struct net_device *aq_nic_get_ndev(struct aq_nic_s *self)
398{
399 return self->ndev;
400}
401
402int aq_nic_init(struct aq_nic_s *self)
403{
404 struct aq_vec_s *aq_vec = NULL;
97bde5c4 405 unsigned int i = 0U;
7b0c342f 406 int err = 0;
97bde5c4
DV		 407
408 self->power_state = AQ_HW_POWER_STATE_D0;
f5dce08a 409 mutex_lock(&self->fwreq_mutex);
8fcb98f4 410 err = self->aq_hw_ops->hw_reset(self->aq_hw);
f5dce08a 411 mutex_unlock(&self->fwreq_mutex);
97bde5c4
DV		 412 if (err < 0)
413 goto err_exit;
e193c3ab
IR		 414 /* Restore default settings */
415 aq_nic_set_downshift(self, self->aq_nic_cfg.downshift_counter);
60db5e40
IR		 416 aq_nic_set_media_detect(self, self->aq_nic_cfg.is_media_detect ?
417 AQ_HW_MEDIA_DETECT_CNT : 0);
97bde5c4 418
8fcb98f4 419 err = self->aq_hw_ops->hw_init(self->aq_hw,
23ee07ad 420 aq_nic_get_ndev(self)->dev_addr);
97bde5c4
DV		 421 if (err < 0)
422 goto err_exit;
423
e54dcf4b
IR		 424 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ATLANTIC) &&
425 self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_TP) {
dbcd6806
DB		 426 self->aq_hw->phy_id = HW_ATL_PHY_ID_MAX;
427 err = aq_phy_init(self->aq_hw);
23e500e8
ND		 428
429 /* Disable the PTP on NICs where it's known to cause datapath
430 * problems.
431 * Ideally this should have been done by PHY provisioning, but
432 * many units have been shipped with enabled PTP block already.
433 */
434 if (self->aq_nic_cfg.aq_hw_caps->quirks & AQ_NIC_QUIRK_BAD_PTP)
435 if (self->aq_hw->phy_id != HW_ATL_PHY_ID_MAX)
436 aq_phy_disable_ptp(self->aq_hw);
dbcd6806
DB		 437 }
438
8ce84271
DB		 439 for (i = 0U; i < self->aq_vecs; i++) {
440 aq_vec = self->aq_vec[i];
441 err = aq_vec_ring_alloc(aq_vec, self, i,
442 aq_nic_get_cfg(self));
443 if (err)
444 goto err_exit;
445
8fcb98f4 446 aq_vec_init(aq_vec, self->aq_hw_ops, self->aq_hw);
8ce84271 447 }
97bde5c4 448
0aa7bc3e
DB		 449 if (aq_nic_get_cfg(self)->is_ptp) {
450 err = aq_ptp_init(self, self->irqvecs - 1);
451 if (err < 0)
452 goto err_exit;
1a64f8dc 453
0aa7bc3e
DB		 454 err = aq_ptp_ring_alloc(self);
455 if (err < 0)
456 goto err_exit;
94ad9455 457
0aa7bc3e
DB		 458 err = aq_ptp_ring_init(self);
459 if (err < 0)
460 goto err_exit;
461 }
94ad9455 462
23ee07ad
IR		 463 netif_carrier_off(self->ndev);
464
97bde5c4
DV		 465err_exit:
466 return err;
467}
468
97bde5c4
DV		 469int aq_nic_start(struct aq_nic_s *self)
470{
471 struct aq_vec_s *aq_vec = NULL;
8ce84271 472 struct aq_nic_cfg_s *cfg;
97bde5c4 473 unsigned int i = 0U;
7b0c342f 474 int err = 0;
97bde5c4 475
8ce84271
DB		 476 cfg = aq_nic_get_cfg(self);
477
8fcb98f4 478 err = self->aq_hw_ops->hw_multicast_list_set(self->aq_hw,
e9157848
ND		 479 self->mc_list.ar,
480 self->mc_list.count);
97bde5c4
DV		 481 if (err < 0)
482 goto err_exit;
483
8fcb98f4 484 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw,
e9157848 485 self->packet_filter);
97bde5c4
DV		 486 if (err < 0)
487 goto err_exit;
488
8d3a6c37
KHF		 489 for (i = 0U; self->aq_vecs > i; ++i) {
490 aq_vec = self->aq_vec[i];
97bde5c4
DV		 491 err = aq_vec_start(aq_vec);
492 if (err < 0)
493 goto err_exit;
494 }
495
94ad9455
EP		 496 err = aq_ptp_ring_start(self);
497 if (err < 0)
498 goto err_exit;
499
883daa18
IR		 500 aq_nic_set_loopback(self);
501
8fcb98f4 502 err = self->aq_hw_ops->hw_start(self->aq_hw);
97bde5c4
DV		 503 if (err < 0)
504 goto err_exit;
505
b82ee71a
IR		 506 err = aq_nic_update_interrupt_moderation_settings(self);
507 if (err)
97bde5c4 508 goto err_exit;
49544935
IR		 509
510 INIT_WORK(&self->service_task, aq_nic_service_task);
511
e99e88a9 512 timer_setup(&self->service_timer, aq_nic_service_timer_cb, 0);
67758788 513 aq_nic_service_timer_cb(&self->service_timer);
97bde5c4 514
8ce84271 515 if (cfg->is_polling) {
e99e88a9 516 timer_setup(&self->polling_timer, aq_nic_polling_timer_cb, 0);
97bde5c4
DV		 517 mod_timer(&self->polling_timer, jiffies +
518 AQ_CFG_POLLING_TIMER_INTERVAL);
519 } else {
8d3a6c37
KHF		 520 for (i = 0U; self->aq_vecs > i; ++i) {
521 aq_vec = self->aq_vec[i];
4c83f170
IR		 522 err = aq_pci_func_alloc_irq(self, i, self->ndev->name,
523 aq_vec_isr, aq_vec,
23ee07ad 524 aq_vec_get_affinity_mask(aq_vec));
97bde5c4
DV		 525 if (err < 0)
526 goto err_exit;
527 }
528
04a18399
EP		 529 err = aq_ptp_irq_alloc(self);
530 if (err < 0)
531 goto err_exit;
532
8ce84271 533 if (cfg->link_irq_vec) {
4c83f170 534 int irqvec = pci_irq_vector(self->pdev,
8ce84271 535 cfg->link_irq_vec);
4c83f170
IR		 536 err = request_threaded_irq(irqvec, NULL,
537 aq_linkstate_threaded_isr,
5c47e3ba 538 IRQF_SHARED | IRQF_ONESHOT,
4c83f170
IR		 539 self->ndev->name, self);
540 if (err < 0)
541 goto err_exit;
8ce84271 542 self->msix_entry_mask |= (1 << cfg->link_irq_vec);
4c83f170
IR		 543 }
544
8fcb98f4 545 err = self->aq_hw_ops->hw_irq_enable(self->aq_hw,
e9157848 546 AQ_CFG_IRQ_MASK);
97bde5c4
DV		 547 if (err < 0)
548 goto err_exit;
549 }
550
a83fe6b6
DB		 551 err = netif_set_real_num_tx_queues(self->ndev,
552 self->aq_vecs * cfg->tcs);
97bde5c4
DV		 553 if (err < 0)
554 goto err_exit;
555
a83fe6b6
DB		 556 err = netif_set_real_num_rx_queues(self->ndev,
557 self->aq_vecs * cfg->tcs);
97bde5c4
DV		 558 if (err < 0)
559 goto err_exit;
560
a83fe6b6
DB		 561 for (i = 0; i < cfg->tcs; i++) {
562 u16 offset = self->aq_vecs * i;
563
564 netdev_set_tc_queue(self->ndev, i, self->aq_vecs, offset);
565 }
3aec6412
IR		 566 netif_tx_start_all_queues(self->ndev);
567
97bde5c4
DV		 568err_exit:
569 return err;
570}
571
04a18399
EP		 572unsigned int aq_nic_map_skb(struct aq_nic_s *self, struct sk_buff *skb,
573 struct aq_ring_s *ring)
97bde5c4 574{
97bde5c4 575 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
8ce84271
DB		 576 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);
577 struct device *dev = aq_nic_get_dev(self);
c7545689 578 struct aq_ring_buff_s *first = NULL;
822cd114 579 u8 ipver = ip_hdr(skb)->version;
7b0c342f 580 struct aq_ring_buff_s *dx_buff;
880b3ca5 581 bool need_context_tag = false;
7b0c342f
ND		 582 unsigned int frag_count = 0U;
583 unsigned int ret = 0U;
584 unsigned int dx;
822cd114
IR		 585 u8 l4proto = 0;
586
587 if (ipver == 4)
588 l4proto = ip_hdr(skb)->protocol;
589 else if (ipver == 6)
590 l4proto = ipv6_hdr(skb)->nexthdr;
880b3ca5 591
7b0c342f
ND		 592 dx = ring->sw_tail;
593 dx_buff = &ring->buff_ring[dx];
880b3ca5 594 dx_buff->flags = 0U;
97bde5c4 595
e399553d 596 if (unlikely(skb_is_gso(skb))) {
880b3ca5 597 dx_buff->mss = skb_shinfo(skb)->gso_size;
822cd114
IR		 598 if (l4proto == IPPROTO_TCP) {
599 dx_buff->is_gso_tcp = 1U;
600 dx_buff->len_l4 = tcp_hdrlen(skb);
601 } else if (l4proto == IPPROTO_UDP) {
602 dx_buff->is_gso_udp = 1U;
603 dx_buff->len_l4 = sizeof(struct udphdr);
604 /* UDP GSO Hardware does not replace packet length. */
605 udp_hdr(skb)->len = htons(dx_buff->mss +
606 dx_buff->len_l4);
607 } else {
608 WARN_ONCE(true, "Bad GSO mode");
609 goto exit;
610 }
e399553d
PB		 611 dx_buff->len_pkt = skb->len;
612 dx_buff->len_l2 = ETH_HLEN;
822cd114 613 dx_buff->len_l3 = skb_network_header_len(skb);
c7545689 614 dx_buff->eop_index = 0xffffU;
822cd114 615 dx_buff->is_ipv6 = (ipver == 6);
880b3ca5
IR		 616 need_context_tag = true;
617 }
386aff88 618
8ce84271 619 if (cfg->is_vlan_tx_insert && skb_vlan_tag_present(skb)) {
880b3ca5
IR		 620 dx_buff->vlan_tx_tag = skb_vlan_tag_get(skb);
621 dx_buff->len_pkt = skb->len;
622 dx_buff->is_vlan = 1U;
623 need_context_tag = true;
624 }
625
626 if (need_context_tag) {
e399553d
PB		 627 dx = aq_ring_next_dx(ring, dx);
628 dx_buff = &ring->buff_ring[dx];
880b3ca5 629 dx_buff->flags = 0U;
e399553d
PB		 630 ++ret;
631 }
632
e399553d 633 dx_buff->len = skb_headlen(skb);
8ce84271 634 dx_buff->pa = dma_map_single(dev,
e399553d
PB		 635 skb->data,
636 dx_buff->len,
637 DMA_TO_DEVICE);
97bde5c4 638
8ce84271 639 if (unlikely(dma_mapping_error(dev, dx_buff->pa))) {
380ec5b9 640 ret = 0;
e399553d 641 goto exit;
380ec5b9 642 }
e399553d 643
c7545689 644 first = dx_buff;
e399553d
PB		 645 dx_buff->len_pkt = skb->len;
646 dx_buff->is_sop = 1U;
647 dx_buff->is_mapped = 1U;
97bde5c4
DV		 648 ++ret;
649
650 if (skb->ip_summed == CHECKSUM_PARTIAL) {
822cd114
IR		 651 dx_buff->is_ip_cso = (htons(ETH_P_IP) == skb->protocol);
652 dx_buff->is_tcp_cso = (l4proto == IPPROTO_TCP);
653 dx_buff->is_udp_cso = (l4proto == IPPROTO_UDP);
97bde5c4
DV		 654 }
655
656 for (; nr_frags--; ++frag_count) {
e399553d 657 unsigned int frag_len = 0U;
c7545689
PB		 658 unsigned int buff_offset = 0U;
659 unsigned int buff_size = 0U;
97bde5c4
DV		 660 dma_addr_t frag_pa;
661 skb_frag_t *frag = &skb_shinfo(skb)->frags[frag_count];
662
663 frag_len = skb_frag_size(frag);
97bde5c4 664
c7545689
PB		 665 while (frag_len) {
666 if (frag_len > AQ_CFG_TX_FRAME_MAX)
667 buff_size = AQ_CFG_TX_FRAME_MAX;
668 else
669 buff_size = frag_len;
670
8ce84271 671 frag_pa = skb_frag_dma_map(dev,
c7545689
PB		 672 frag,
673 buff_offset,
674 buff_size,
675 DMA_TO_DEVICE);
676
8ce84271 677 if (unlikely(dma_mapping_error(dev,
c7545689
PB		 678 frag_pa)))
679 goto mapping_error;
e399553d 680
e399553d
PB		 681 dx = aq_ring_next_dx(ring, dx);
682 dx_buff = &ring->buff_ring[dx];
683
684 dx_buff->flags = 0U;
c7545689 685 dx_buff->len = buff_size;
e399553d
PB		 686 dx_buff->pa = frag_pa;
687 dx_buff->is_mapped = 1U;
c7545689
PB		 688 dx_buff->eop_index = 0xffffU;
689
690 frag_len -= buff_size;
691 buff_offset += buff_size;
97bde5c4 692
e399553d 693 ++ret;
97bde5c4 694 }
97bde5c4
DV		 695 }
696
c7545689 697 first->eop_index = dx;
e399553d
PB		 698 dx_buff->is_eop = 1U;
699 dx_buff->skb = skb;
700 goto exit;
701
702mapping_error:
703 for (dx = ring->sw_tail;
704 ret > 0;
705 --ret, dx = aq_ring_next_dx(ring, dx)) {
706 dx_buff = &ring->buff_ring[dx];
707
822cd114
IR		 708 if (!(dx_buff->is_gso_tcp || dx_buff->is_gso_udp) &&
709 !dx_buff->is_vlan && dx_buff->pa) {
e399553d 710 if (unlikely(dx_buff->is_sop)) {
8ce84271 711 dma_unmap_single(dev,
e399553d
PB		 712 dx_buff->pa,
713 dx_buff->len,
714 DMA_TO_DEVICE);
715 } else {
8ce84271 716 dma_unmap_page(dev,
e399553d
PB		 717 dx_buff->pa,
718 dx_buff->len,
719 DMA_TO_DEVICE);
720 }
721 }
97bde5c4
DV		 722 }
723
e399553d 724exit:
97bde5c4
DV		 725 return ret;
726}
727
728int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb)
97bde5c4 729{
b9e98926
MS		 730 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);
731 unsigned int vec = skb->queue_mapping % cfg->vecs;
732 unsigned int tc = skb->queue_mapping / cfg->vecs;
97bde5c4
DV		 733 struct aq_ring_s *ring = NULL;
734 unsigned int frags = 0U;
b350d7b8 735 int err = NETDEV_TX_OK;
97bde5c4
DV		 736
737 frags = skb_shinfo(skb)->nr_frags + 1;
738
b9e98926 739 ring = self->aq_ring_tx[AQ_NIC_CFG_TCVEC2RING(cfg, tc, vec)];
97bde5c4 740
97bde5c4
DV		 741 if (frags > AQ_CFG_SKB_FRAGS_MAX) {
742 dev_kfree_skb_any(skb);
743 goto err_exit;
744 }
745
3aec6412 746 aq_ring_update_queue_state(ring);
97bde5c4 747
b9e98926 748 if (cfg->priv_flags & BIT(AQ_HW_LOOPBACK_DMA_NET)) {
ea4b4d7f
IR		 749 err = NETDEV_TX_BUSY;
750 goto err_exit;
751 }
752
3aec6412 753 /* Above status update may stop the queue. Check this. */
a83fe6b6
DB		 754 if (__netif_subqueue_stopped(self->ndev,
755 AQ_NIC_RING2QMAP(self, ring->idx))) {
97bde5c4
DV		 756 err = NETDEV_TX_BUSY;
757 goto err_exit;
758 }
759
278175ab 760 frags = aq_nic_map_skb(self, skb, ring);
97bde5c4 761
278175ab 762 if (likely(frags)) {
8fcb98f4 763 err = self->aq_hw_ops->hw_ring_tx_xmit(self->aq_hw,
23ee07ad 764 ring, frags);
278175ab 765 } else {
97bde5c4 766 err = NETDEV_TX_BUSY;
97bde5c4
DV		 767 }
768
769err_exit:
97bde5c4
DV		 770 return err;
771}
772
b82ee71a
IR		 773int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self)
774{
8fcb98f4 775 return self->aq_hw_ops->hw_interrupt_moderation_set(self->aq_hw);
b82ee71a
IR		 776}
777
97bde5c4
DV		 778int aq_nic_set_packet_filter(struct aq_nic_s *self, unsigned int flags)
779{
780 int err = 0;
781
8fcb98f4 782 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, flags);
97bde5c4
DV		 783 if (err < 0)
784 goto err_exit;
785
786 self->packet_filter = flags;
787
788err_exit:
789 return err;
790}
791
792int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev)
793{
9f051db5
DB		 794 const struct aq_hw_ops *hw_ops = self->aq_hw_ops;
795 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
796 unsigned int packet_filter = ndev->flags;
97bde5c4
DV		 797 struct netdev_hw_addr *ha = NULL;
798 unsigned int i = 0U;
9f051db5 799 int err = 0;
97bde5c4 800
94b3b542
IR		 801 self->mc_list.count = 0;
802 if (netdev_uc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) {
803 packet_filter |= IFF_PROMISC;
804 } else {
805 netdev_for_each_uc_addr(ha, ndev) {
806 ether_addr_copy(self->mc_list.ar[i++], ha->addr);
94b3b542 807 }
97bde5c4
DV		 808 }
809
9f051db5
DB		 810 cfg->is_mc_list_enabled = !!(packet_filter & IFF_MULTICAST);
811 if (cfg->is_mc_list_enabled) {
812 if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) {
813 packet_filter |= IFF_ALLMULTI;
814 } else {
815 netdev_for_each_mc_addr(ha, ndev) {
816 ether_addr_copy(self->mc_list.ar[i++],
817 ha->addr);
818 }
94b3b542
IR		 819 }
820 }
821
bfaa9f85 822 if (i > 0 && i <= AQ_HW_MULTICAST_ADDRESS_MAX) {
94b3b542 823 self->mc_list.count = i;
9f051db5
DB		 824 err = hw_ops->hw_multicast_list_set(self->aq_hw,
825 self->mc_list.ar,
826 self->mc_list.count);
3d00cf2f
C		 827 if (err < 0)
828 return err;
b21f502f 829 }
7b0c342f 830
94b3b542 831 return aq_nic_set_packet_filter(self, packet_filter);
97bde5c4
DV		 832}
833
834int aq_nic_set_mtu(struct aq_nic_s *self, int new_mtu)
835{
97bde5c4
DV		 836 self->aq_nic_cfg.mtu = new_mtu;
837
d85fc17b 838 return 0;
97bde5c4
DV		 839}
840
841int aq_nic_set_mac(struct aq_nic_s *self, struct net_device *ndev)
842{
8fcb98f4 843 return self->aq_hw_ops->hw_set_mac_address(self->aq_hw, ndev->dev_addr);
97bde5c4
DV		 844}
845
846unsigned int aq_nic_get_link_speed(struct aq_nic_s *self)
847{
848 return self->link_status.mbps;
849}
850
851int aq_nic_get_regs(struct aq_nic_s *self, struct ethtool_regs *regs, void *p)
852{
853 u32 *regs_buff = p;
854 int err = 0;
855
d0f23741
MS		 856 if (unlikely(!self->aq_hw_ops->hw_get_regs))
857 return -EOPNOTSUPP;
858
97bde5c4
DV		 859 regs->version = 1;
860
8fcb98f4
IR		 861 err = self->aq_hw_ops->hw_get_regs(self->aq_hw,
862 self->aq_nic_cfg.aq_hw_caps,
863 regs_buff);
97bde5c4
DV		 864 if (err < 0)
865 goto err_exit;
866
867err_exit:
868 return err;
869}
870
871int aq_nic_get_regs_count(struct aq_nic_s *self)
872{
d0f23741
MS		 873 if (unlikely(!self->aq_hw_ops->hw_get_regs))
874 return 0;
875
8fcb98f4 876 return self->aq_nic_cfg.aq_hw_caps->mac_regs_count;
97bde5c4
DV		 877}
878
aec0f1aa 879u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data)
97bde5c4 880{
be08d839 881 struct aq_vec_s *aq_vec = NULL;
190f3438 882 struct aq_stats_s *stats;
7b0c342f
ND		 883 unsigned int count = 0U;
884 unsigned int i = 0U;
4272ba8b 885 unsigned int tc;
190f3438
DB		 886
887 if (self->aq_fw_ops->update_stats) {
888 mutex_lock(&self->fwreq_mutex);
889 self->aq_fw_ops->update_stats(self->aq_hw);
890 mutex_unlock(&self->fwreq_mutex);
891 }
892 stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw);
97bde5c4 893
be08d839 894 if (!stats)
97bde5c4
DV		 895 goto err_exit;
896
be08d839
IR		 897 data[i] = stats->uprc + stats->mprc + stats->bprc;
898 data[++i] = stats->uprc;
899 data[++i] = stats->mprc;
900 data[++i] = stats->bprc;
901 data[++i] = stats->erpt;
902 data[++i] = stats->uptc + stats->mptc + stats->bptc;
903 data[++i] = stats->uptc;
904 data[++i] = stats->mptc;
905 data[++i] = stats->bptc;
906 data[++i] = stats->ubrc;
907 data[++i] = stats->ubtc;
908 data[++i] = stats->mbrc;
909 data[++i] = stats->mbtc;
910 data[++i] = stats->bbrc;
911 data[++i] = stats->bbtc;
2087ced0
DB		 912 if (stats->brc)
913 data[++i] = stats->brc;
914 else
915 data[++i] = stats->ubrc + stats->mbrc + stats->bbrc;
916 if (stats->btc)
917 data[++i] = stats->btc;
918 else
919 data[++i] = stats->ubtc + stats->mbtc + stats->bbtc;
be08d839
IR		 920 data[++i] = stats->dma_pkt_rc;
921 data[++i] = stats->dma_pkt_tc;
922 data[++i] = stats->dma_oct_rc;
923 data[++i] = stats->dma_oct_tc;
924 data[++i] = stats->dpc;
925
926 i++;
927
928 data += i;
97bde5c4 929
4272ba8b
MS		 930 for (tc = 0U; tc < self->aq_nic_cfg.tcs; tc++) {
931 for (i = 0U, aq_vec = self->aq_vec[0];
932 aq_vec && self->aq_vecs > i;
933 ++i, aq_vec = self->aq_vec[i]) {
934 data += count;
b772112c 935 count = aq_vec_get_sw_stats(aq_vec, tc, data);
4272ba8b 936 }
97bde5c4
DV		 937 }
938
aec0f1aa
DB		 939 data += count;
940
b772112c 941err_exit:
aec0f1aa 942 return data;
97bde5c4
DV		 943}
944
9f8a2203
IR		 945static void aq_nic_update_ndev_stats(struct aq_nic_s *self)
946{
8fcb98f4 947 struct aq_stats_s *stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw);
7b0c342f 948 struct net_device *ndev = self->ndev;
9f8a2203 949
f55d477b
DB		 950 ndev->stats.rx_packets = stats->dma_pkt_rc;
951 ndev->stats.rx_bytes = stats->dma_oct_rc;
9f8a2203 952 ndev->stats.rx_errors = stats->erpr;
f55d477b
DB		 953 ndev->stats.rx_dropped = stats->dpc;
954 ndev->stats.tx_packets = stats->dma_pkt_tc;
955 ndev->stats.tx_bytes = stats->dma_oct_tc;
9f8a2203 956 ndev->stats.tx_errors = stats->erpt;
45cc1c7a 957 ndev->stats.multicast = stats->mprc;
9f8a2203
IR		 958}
959
f8244ab5
PR		 960void aq_nic_get_link_ksettings(struct aq_nic_s *self,
961 struct ethtool_link_ksettings *cmd)
97bde5c4 962{
2b53b04d
DB		 963 u32 lp_link_speed_msk;
964
854ab38c
IR		 965 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
966 cmd->base.port = PORT_FIBRE;
967 else
968 cmd->base.port = PORT_TP;
071a0204
IR		 969
970 cmd->base.duplex = DUPLEX_UNKNOWN;
971 if (self->link_status.mbps)
972 cmd->base.duplex = self->link_status.full_duplex ?
973 DUPLEX_FULL : DUPLEX_HALF;
f8244ab5
PR		 974 cmd->base.autoneg = self->aq_nic_cfg.is_autoneg;
975
8f9000a5
PB		 976 ethtool_link_ksettings_zero_link_mode(cmd, supported);
977
8fcb98f4 978 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10G)
8f9000a5
PB		 979 ethtool_link_ksettings_add_link_mode(cmd, supported,
980 10000baseT_Full);
981
8fcb98f4 982 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_5G)
8f9000a5
PB		 983 ethtool_link_ksettings_add_link_mode(cmd, supported,
984 5000baseT_Full);
985
843e1396 986 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_2G5)
8f9000a5
PB		 987 ethtool_link_ksettings_add_link_mode(cmd, supported,
988 2500baseT_Full);
989
8fcb98f4 990 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G)
8f9000a5
PB		 991 ethtool_link_ksettings_add_link_mode(cmd, supported,
992 1000baseT_Full);
993
071a0204
IR		 994 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G_HALF)
995 ethtool_link_ksettings_add_link_mode(cmd, supported,
996 1000baseT_Half);
997
8fcb98f4 998 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M)
8f9000a5
PB		 999 ethtool_link_ksettings_add_link_mode(cmd, supported,
1000 100baseT_Full);
1001
071a0204
IR		 1002 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M_HALF)
1003 ethtool_link_ksettings_add_link_mode(cmd, supported,
1004 100baseT_Half);
1005
3d464aad
IR		 1006 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M)
1007 ethtool_link_ksettings_add_link_mode(cmd, supported,
1008 10baseT_Full);
1009
071a0204
IR		 1010 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M_HALF)
1011 ethtool_link_ksettings_add_link_mode(cmd, supported,
1012 10baseT_Half);
1013
8009bb19 1014 if (self->aq_nic_cfg.aq_hw_caps->flow_control) {
8f9000a5
PB		 1015 ethtool_link_ksettings_add_link_mode(cmd, supported,
1016 Pause);
8009bb19
ND		 1017 ethtool_link_ksettings_add_link_mode(cmd, supported,
1018 Asym_Pause);
1019 }
8f9000a5
PB		 1020
1021 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
854ab38c
IR		 1022
1023 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
1024 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
1025 else
1026 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
8f9000a5
PB		 1027
1028 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
1029
1030 if (self->aq_nic_cfg.is_autoneg)
1031 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1032
071a0204 1033 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10G)
8f9000a5
PB		 1034 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1035 10000baseT_Full);
1036
071a0204 1037 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_5G)
8f9000a5
PB		 1038 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1039 5000baseT_Full);
1040
071a0204 1041 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_2G5)
8f9000a5
PB		 1042 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1043 2500baseT_Full);
1044
071a0204 1045 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G)
8f9000a5
PB		 1046 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1047 1000baseT_Full);
1048
071a0204
IR		 1049 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G_HALF)
1050 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1051 1000baseT_Half);
1052
1053 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M)
8f9000a5
PB		 1054 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1055 100baseT_Full);
1056
071a0204
IR		 1057 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M_HALF)
1058 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1059 100baseT_Half);
1060
1061 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M)
3d464aad
IR		 1062 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1063 10baseT_Full);
1064
071a0204
IR		 1065 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M_HALF)
1066 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1067 10baseT_Half);
1068
8009bb19 1069 if (self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX)
8f9000a5
PB		 1070 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1071 Pause);
1072
35e8e8b4 1073 /* Asym is when either RX or TX, but not both */
8009bb19
ND		 1074 if (!!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_TX) ^
1075 !!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX))
288551de
IR		 1076 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1077 Asym_Pause);
1078
854ab38c
IR		 1079 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
1080 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
1081 else
1082 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
2b53b04d
DB		 1083
1084 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
1085 lp_link_speed_msk = self->aq_hw->aq_link_status.lp_link_speed_msk;
1086
1087 if (lp_link_speed_msk & AQ_NIC_RATE_10G)
1088 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1089 10000baseT_Full);
1090
1091 if (lp_link_speed_msk & AQ_NIC_RATE_5G)
1092 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1093 5000baseT_Full);
1094
1095 if (lp_link_speed_msk & AQ_NIC_RATE_2G5)
1096 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1097 2500baseT_Full);
1098
1099 if (lp_link_speed_msk & AQ_NIC_RATE_1G)
1100 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1101 1000baseT_Full);
1102
1103 if (lp_link_speed_msk & AQ_NIC_RATE_1G_HALF)
1104 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1105 1000baseT_Half);
1106
1107 if (lp_link_speed_msk & AQ_NIC_RATE_100M)
1108 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1109 100baseT_Full);
1110
1111 if (lp_link_speed_msk & AQ_NIC_RATE_100M_HALF)
1112 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1113 100baseT_Half);
1114
1115 if (lp_link_speed_msk & AQ_NIC_RATE_10M)
1116 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1117 10baseT_Full);
1118
1119 if (lp_link_speed_msk & AQ_NIC_RATE_10M_HALF)
1120 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1121 10baseT_Half);
1122
1123 if (self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX)
1124 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1125 Pause);
1126 if (!!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_TX) ^
1127 !!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX))
1128 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1129 Asym_Pause);
97bde5c4
DV		 1130}
1131
f8244ab5
PR		 1132int aq_nic_set_link_ksettings(struct aq_nic_s *self,
1133 const struct ethtool_link_ksettings *cmd)
97bde5c4 1134{
071a0204
IR		 1135 int fduplex = (cmd->base.duplex == DUPLEX_FULL);
1136 u32 speed = cmd->base.speed;
97bde5c4
DV		 1137 u32 rate = 0U;
1138 int err = 0;
1139
071a0204
IR		 1140 if (!fduplex && speed > SPEED_1000) {
1141 err = -EINVAL;
1142 goto err_exit;
1143 }
1144
f8244ab5 1145 if (cmd->base.autoneg == AUTONEG_ENABLE) {
8fcb98f4 1146 rate = self->aq_nic_cfg.aq_hw_caps->link_speed_msk;
97bde5c4
DV		 1147 self->aq_nic_cfg.is_autoneg = true;
1148 } else {
97bde5c4 1149 switch (speed) {
3d464aad 1150 case SPEED_10:
071a0204 1151 rate = fduplex ? AQ_NIC_RATE_10M : AQ_NIC_RATE_10M_HALF;
3d464aad
IR		 1152 break;
1153
97bde5c4 1154 case SPEED_100:
071a0204
IR		 1155 rate = fduplex ? AQ_NIC_RATE_100M
1156 : AQ_NIC_RATE_100M_HALF;
97bde5c4
DV		 1157 break;
1158
1159 case SPEED_1000:
071a0204 1160 rate = fduplex ? AQ_NIC_RATE_1G : AQ_NIC_RATE_1G_HALF;
97bde5c4
DV		 1161 break;
1162
1163 case SPEED_2500:
843e1396 1164 rate = AQ_NIC_RATE_2G5;
97bde5c4
DV		 1165 break;
1166
1167 case SPEED_5000:
1168 rate = AQ_NIC_RATE_5G;
1169 break;
1170
1171 case SPEED_10000:
1172 rate = AQ_NIC_RATE_10G;
1173 break;
1174
1175 default:
1176 err = -1;
1177 goto err_exit;
97bde5c4 1178 }
8fcb98f4 1179 if (!(self->aq_nic_cfg.aq_hw_caps->link_speed_msk & rate)) {
97bde5c4
DV		 1180 err = -1;
1181 goto err_exit;
1182 }
1183
1184 self->aq_nic_cfg.is_autoneg = false;
1185 }
1186
f5dce08a 1187 mutex_lock(&self->fwreq_mutex);
0c58c35f 1188 err = self->aq_fw_ops->set_link_speed(self->aq_hw, rate);
f5dce08a 1189 mutex_unlock(&self->fwreq_mutex);
97bde5c4
DV		 1190 if (err < 0)
1191 goto err_exit;
1192
1193 self->aq_nic_cfg.link_speed_msk = rate;
1194
1195err_exit:
1196 return err;
1197}
1198
1199struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self)
1200{
1201 return &self->aq_nic_cfg;
1202}
1203
1204u32 aq_nic_get_fw_version(struct aq_nic_s *self)
1205{
36e90a52 1206 return self->aq_hw_ops->hw_get_fw_version(self->aq_hw);
97bde5c4
DV		 1207}
1208
ea4b4d7f
IR		 1209int aq_nic_set_loopback(struct aq_nic_s *self)
1210{
1211 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1212
1213 if (!self->aq_hw_ops->hw_set_loopback ||
1214 !self->aq_fw_ops->set_phyloopback)
e35df218 1215 return -EOPNOTSUPP;
ea4b4d7f
IR		 1216
1217 mutex_lock(&self->fwreq_mutex);
1218 self->aq_hw_ops->hw_set_loopback(self->aq_hw,
1219 AQ_HW_LOOPBACK_DMA_SYS,
1220 !!(cfg->priv_flags &
1221 BIT(AQ_HW_LOOPBACK_DMA_SYS)));
1222
1223 self->aq_hw_ops->hw_set_loopback(self->aq_hw,
1224 AQ_HW_LOOPBACK_PKT_SYS,
1225 !!(cfg->priv_flags &
1226 BIT(AQ_HW_LOOPBACK_PKT_SYS)));
1227
1228 self->aq_hw_ops->hw_set_loopback(self->aq_hw,
1229 AQ_HW_LOOPBACK_DMA_NET,
1230 !!(cfg->priv_flags &
1231 BIT(AQ_HW_LOOPBACK_DMA_NET)));
1232
1233 self->aq_fw_ops->set_phyloopback(self->aq_hw,
1234 AQ_HW_LOOPBACK_PHYINT_SYS,
1235 !!(cfg->priv_flags &
1236 BIT(AQ_HW_LOOPBACK_PHYINT_SYS)));
1237
1238 self->aq_fw_ops->set_phyloopback(self->aq_hw,
1239 AQ_HW_LOOPBACK_PHYEXT_SYS,
1240 !!(cfg->priv_flags &
1241 BIT(AQ_HW_LOOPBACK_PHYEXT_SYS)));
1242 mutex_unlock(&self->fwreq_mutex);
1243
1244 return 0;
1245}
1246
97bde5c4
DV		 1247int aq_nic_stop(struct aq_nic_s *self)
1248{
1249 struct aq_vec_s *aq_vec = NULL;
1250 unsigned int i = 0U;
1251
3aec6412 1252 netif_tx_disable(self->ndev);
93d87b8f 1253 netif_carrier_off(self->ndev);
97bde5c4
DV		 1254
1255 del_timer_sync(&self->service_timer);
49544935 1256 cancel_work_sync(&self->service_task);
97bde5c4 1257
8fcb98f4 1258 self->aq_hw_ops->hw_irq_disable(self->aq_hw, AQ_CFG_IRQ_MASK);
97bde5c4
DV		 1259
1260 if (self->aq_nic_cfg.is_polling)
1261 del_timer_sync(&self->polling_timer);
1262 else
23ee07ad 1263 aq_pci_func_free_irqs(self);
97bde5c4 1264
04a18399
EP		 1265 aq_ptp_irq_free(self);
1266
97bde5c4
DV		 1267 for (i = 0U, aq_vec = self->aq_vec[0];
1268 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i])
1269 aq_vec_stop(aq_vec);
1270
94ad9455
EP		 1271 aq_ptp_ring_stop(self);
1272
8fcb98f4 1273 return self->aq_hw_ops->hw_stop(self->aq_hw);
97bde5c4
DV		 1274}
1275
837c6378
ND		 1276void aq_nic_set_power(struct aq_nic_s *self)
1277{
1278 if (self->power_state != AQ_HW_POWER_STATE_D0 ||
1279 self->aq_hw->aq_nic_cfg->wol)
1280 if (likely(self->aq_fw_ops->set_power)) {
1281 mutex_lock(&self->fwreq_mutex);
1282 self->aq_fw_ops->set_power(self->aq_hw,
1283 self->power_state,
1284 self->ndev->dev_addr);
1285 mutex_unlock(&self->fwreq_mutex);
1286 }
1287}
1288
1289void aq_nic_deinit(struct aq_nic_s *self, bool link_down)
97bde5c4
DV		 1290{
1291 struct aq_vec_s *aq_vec = NULL;
1292 unsigned int i = 0U;
1293
1294 if (!self)
1295 goto err_exit;
1296
8ce84271
DB		 1297 for (i = 0U; i < self->aq_vecs; i++) {
1298 aq_vec = self->aq_vec[i];
97bde5c4 1299 aq_vec_deinit(aq_vec);
8ce84271
DB		 1300 aq_vec_ring_free(aq_vec);
1301 }
97bde5c4 1302
1a64f8dc 1303 aq_ptp_unregister(self);
94ad9455
EP		 1304 aq_ptp_ring_deinit(self);
1305 aq_ptp_ring_free(self);
1a64f8dc
EP		 1306 aq_ptp_free(self);
1307
837c6378 1308 if (likely(self->aq_fw_ops->deinit) && link_down) {
f5dce08a
ND		 1309 mutex_lock(&self->fwreq_mutex);
1310 self->aq_fw_ops->deinit(self->aq_hw);
1311 mutex_unlock(&self->fwreq_mutex);
1312 }
a0da96c0 1313
97bde5c4
DV		 1314err_exit:;
1315}
1316
23ee07ad 1317void aq_nic_free_vectors(struct aq_nic_s *self)
97bde5c4
DV		 1318{
1319 unsigned int i = 0U;
1320
1321 if (!self)
1322 goto err_exit;
1323
08b5cf08 1324 for (i = ARRAY_SIZE(self->aq_vec); i--;) {
3013c498 1325 if (self->aq_vec[i]) {
97bde5c4 1326 aq_vec_free(self->aq_vec[i]);
3013c498
PB		 1327 self->aq_vec[i] = NULL;
1328 }
97bde5c4
DV		 1329 }
1330
1331err_exit:;
1332}
1333
14ef766b
MS		 1334int aq_nic_realloc_vectors(struct aq_nic_s *self)
1335{
1336 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);
1337
1338 aq_nic_free_vectors(self);
1339
1340 for (self->aq_vecs = 0; self->aq_vecs < cfg->vecs; self->aq_vecs++) {
1341 self->aq_vec[self->aq_vecs] = aq_vec_alloc(self, self->aq_vecs,
1342 cfg);
1343 if (unlikely(!self->aq_vec[self->aq_vecs]))
1344 return -ENOMEM;
1345 }
1346
1347 return 0;
1348}
1349
90869ddf
IR		 1350void aq_nic_shutdown(struct aq_nic_s *self)
1351{
1352 int err = 0;
1353
1354 if (!self->ndev)
1355 return;
1356
1357 rtnl_lock();
1358
1359 netif_device_detach(self->ndev);
1360
9a11aff2
IR		 1361 if (netif_running(self->ndev)) {
1362 err = aq_nic_stop(self);
1363 if (err < 0)
1364 goto err_exit;
1365 }
837c6378
ND		 1366 aq_nic_deinit(self, !self->aq_hw->aq_nic_cfg->wol);
1367 aq_nic_set_power(self);
90869ddf
IR		 1368
1369err_exit:
1370 rtnl_unlock();
ea4854dd 1371}
5a1bf9ef
DB		 1372
1373u8 aq_nic_reserve_filter(struct aq_nic_s *self, enum aq_rx_filter_type type)
1374{
1375 u8 location = 0xFF;
1376 u32 fltr_cnt;
1377 u32 n_bit;
1378
1379 switch (type) {
1380 case aq_rx_filter_ethertype:
1381 location = AQ_RX_LAST_LOC_FETHERT - AQ_RX_FIRST_LOC_FETHERT -
1382 self->aq_hw_rx_fltrs.fet_reserved_count;
1383 self->aq_hw_rx_fltrs.fet_reserved_count++;
1384 break;
1385 case aq_rx_filter_l3l4:
1386 fltr_cnt = AQ_RX_LAST_LOC_FL3L4 - AQ_RX_FIRST_LOC_FL3L4;
1387 n_bit = fltr_cnt - self->aq_hw_rx_fltrs.fl3l4.reserved_count;
1388
1389 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 |= BIT(n_bit);
1390 self->aq_hw_rx_fltrs.fl3l4.reserved_count++;
1391 location = n_bit;
1392 break;
1393 default:
1394 break;
1395 }
1396
1397 return location;
1398}
1399
1400void aq_nic_release_filter(struct aq_nic_s *self, enum aq_rx_filter_type type,
1401 u32 location)
1402{
1403 switch (type) {
1404 case aq_rx_filter_ethertype:
1405 self->aq_hw_rx_fltrs.fet_reserved_count--;
1406 break;
1407 case aq_rx_filter_l3l4:
1408 self->aq_hw_rx_fltrs.fl3l4.reserved_count--;
1409 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 &= ~BIT(location);
1410 break;
1411 default:
1412 break;
1413 }
1414}
a83fe6b6 1415
e193c3ab
IR		 1416int aq_nic_set_downshift(struct aq_nic_s *self, int val)
1417{
1418 int err = 0;
1419 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1420
1421 if (!self->aq_fw_ops->set_downshift)
1422 return -EOPNOTSUPP;
1423
1424 if (val > 15) {
1425 netdev_err(self->ndev, "downshift counter should be <= 15\n");
1426 return -EINVAL;
1427 }
1428 cfg->downshift_counter = val;
1429
1430 mutex_lock(&self->fwreq_mutex);
1431 err = self->aq_fw_ops->set_downshift(self->aq_hw, cfg->downshift_counter);
1432 mutex_unlock(&self->fwreq_mutex);
1433
1434 return err;
1435}
1436
60db5e40
IR		 1437int aq_nic_set_media_detect(struct aq_nic_s *self, int val)
1438{
1439 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1440 int err = 0;
1441
1442 if (!self->aq_fw_ops->set_media_detect)
1443 return -EOPNOTSUPP;
1444
1445 if (val > 0 && val != AQ_HW_MEDIA_DETECT_CNT) {
1446 netdev_err(self->ndev, "EDPD on this device could have only fixed value of %d\n",
1447 AQ_HW_MEDIA_DETECT_CNT);
1448 return -EINVAL;
1449 }
1450
1451 mutex_lock(&self->fwreq_mutex);
1452 err = self->aq_fw_ops->set_media_detect(self->aq_hw, !!val);
1453 mutex_unlock(&self->fwreq_mutex);
1454
1455 /* msecs plays no role - configuration is always fixed in PHY */
1456 if (!err)
1457 cfg->is_media_detect = !!val;
1458
1459 return err;
1460}
1461
a83fe6b6
DB		 1462int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map)
1463{
1464 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
14ef766b 1465 const unsigned int prev_vecs = cfg->vecs;
a83fe6b6
DB		 1466 bool ndev_running;
1467 int err = 0;
1468 int i;
1469
1470 /* if already the same configuration or
1471 * disable request (tcs is 0) and we already is disabled
1472 */
1473 if (tcs == cfg->tcs || (tcs == 0 && !cfg->is_qos))
1474 return 0;
1475
1476 ndev_running = netif_running(self->ndev);
1477 if (ndev_running)
1478 dev_close(self->ndev);
1479
1480 cfg->tcs = tcs;
1481 if (cfg->tcs == 0)
1482 cfg->tcs = 1;
1483 if (prio_tc_map)
1484 memcpy(cfg->prio_tc_map, prio_tc_map, sizeof(cfg->prio_tc_map));
1485 else
1486 for (i = 0; i < sizeof(cfg->prio_tc_map); i++)
1487 cfg->prio_tc_map[i] = cfg->tcs * i / 8;
1488
3ec94da9 1489 cfg->is_qos = !!tcs;
a83fe6b6
DB		 1490 cfg->is_ptp = (cfg->tcs <= AQ_HW_PTP_TC);
1491 if (!cfg->is_ptp)
1492 netdev_warn(self->ndev, "%s\n",
1493 "PTP is auto disabled due to requested TC count.");
1494
1495 netdev_set_num_tc(self->ndev, cfg->tcs);
1496
14ef766b
MS		 1497 /* Changing the number of TCs might change the number of vectors */
1498 aq_nic_cfg_update_num_vecs(self);
1499 if (prev_vecs != cfg->vecs) {
1500 err = aq_nic_realloc_vectors(self);
1501 if (err)
1502 goto err_exit;
1503 }
1504
a83fe6b6
DB		 1505 if (ndev_running)
1506 err = dev_open(self->ndev, NULL);
1507
14ef766b 1508err_exit:
a83fe6b6
DB		 1509 return err;
1510}
7327699f
MS		 1511
1512int aq_nic_setup_tc_max_rate(struct aq_nic_s *self, const unsigned int tc,
1513 const u32 max_rate)
1514{
1515 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1516
1517 if (tc >= AQ_CFG_TCS_MAX)
1518 return -EINVAL;
1519
1520 if (max_rate && max_rate < 10) {
1521 netdev_warn(self->ndev,
1522 "Setting %s to the minimum usable value of %dMbps.\n",
1523 "max rate", 10);
1524 cfg->tc_max_rate[tc] = 10;
1525 } else {
1526 cfg->tc_max_rate[tc] = max_rate;
1527 }
1528
1529 return 0;
1530}
2deac71a
MS		 1531
1532int aq_nic_setup_tc_min_rate(struct aq_nic_s *self, const unsigned int tc,
1533 const u32 min_rate)
1534{
1535 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1536
1537 if (tc >= AQ_CFG_TCS_MAX)
1538 return -EINVAL;
1539
1540 if (min_rate)
1541 set_bit(tc, &cfg->tc_min_rate_msk);
1542 else
1543 clear_bit(tc, &cfg->tc_min_rate_msk);
1544
1545 if (min_rate && min_rate < 20) {
1546 netdev_warn(self->ndev,
1547 "Setting %s to the minimum usable value of %dMbps.\n",
1548 "min rate", 20);
1549 cfg->tc_min_rate[tc] = 20;
1550 } else {
1551 cfg->tc_min_rate[tc] = min_rate;
1552 }
1553
1554 return 0;
1555}
Linux 6.x block layer and io_uring tree(s)