net: aquantia: Report correct mediatype via ethtool
[linux-2.6-block.git] / drivers / net / ethernet / aquantia / atlantic / aq_nic.c
CommitLineData
97bde5c4
DV
1/*
2 * aQuantia Corporation Network Driver
3 * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 */
9
10/* File aq_nic.c: Definition of common code for NIC. */
11
12#include "aq_nic.h"
13#include "aq_ring.h"
14#include "aq_vec.h"
15#include "aq_hw.h"
16#include "aq_pci_func.h"
97bde5c4 17
b82ee71a 18#include <linux/moduleparam.h>
97bde5c4
DV
19#include <linux/netdevice.h>
20#include <linux/etherdevice.h>
21#include <linux/timer.h>
22#include <linux/cpu.h>
23#include <linux/ip.h>
24#include <linux/tcp.h>
25#include <net/ip.h>
26
b82ee71a
IR
27static unsigned int aq_itr = AQ_CFG_INTERRUPT_MODERATION_AUTO;
28module_param_named(aq_itr, aq_itr, uint, 0644);
29MODULE_PARM_DESC(aq_itr, "Interrupt throttling mode");
30
31static unsigned int aq_itr_tx;
32module_param_named(aq_itr_tx, aq_itr_tx, uint, 0644);
33MODULE_PARM_DESC(aq_itr_tx, "TX interrupt throttle rate");
34
35static unsigned int aq_itr_rx;
36module_param_named(aq_itr_rx, aq_itr_rx, uint, 0644);
37MODULE_PARM_DESC(aq_itr_rx, "RX interrupt throttle rate");
38
9f8a2203
IR
39static void aq_nic_update_ndev_stats(struct aq_nic_s *self);
40
97bde5c4
DV
41static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues)
42{
43 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
44 struct aq_rss_parameters *rss_params = &cfg->aq_rss;
45 int i = 0;
46
47 static u8 rss_key[40] = {
48 0x1e, 0xad, 0x71, 0x87, 0x65, 0xfc, 0x26, 0x7d,
49 0x0d, 0x45, 0x67, 0x74, 0xcd, 0x06, 0x1a, 0x18,
50 0xb6, 0xc1, 0xf0, 0xc7, 0xbb, 0x18, 0xbe, 0xf8,
51 0x19, 0x13, 0x4b, 0xa9, 0xd0, 0x3e, 0xfe, 0x70,
52 0x25, 0x03, 0xab, 0x50, 0x6a, 0x8b, 0x82, 0x0c
53 };
54
55 rss_params->hash_secret_key_size = sizeof(rss_key);
56 memcpy(rss_params->hash_secret_key, rss_key, sizeof(rss_key));
57 rss_params->indirection_table_size = AQ_CFG_RSS_INDIRECTION_TABLE_MAX;
58
59 for (i = rss_params->indirection_table_size; i--;)
60 rss_params->indirection_table[i] = i & (num_rss_queues - 1);
61}
62
23ee07ad
IR
63/* Checks hw_caps and 'corrects' aq_nic_cfg in runtime */
64void aq_nic_cfg_start(struct aq_nic_s *self)
97bde5c4
DV
65{
66 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
67
97bde5c4
DV
68 cfg->tcs = AQ_CFG_TCS_DEF;
69
97bde5c4
DV
70 cfg->is_polling = AQ_CFG_IS_POLLING_DEF;
71
b82ee71a
IR
72 cfg->itr = aq_itr;
73 cfg->tx_itr = aq_itr_tx;
74 cfg->rx_itr = aq_itr_rx;
97bde5c4
DV
75
76 cfg->is_rss = AQ_CFG_IS_RSS_DEF;
77 cfg->num_rss_queues = AQ_CFG_NUM_RSS_QUEUES_DEF;
78 cfg->aq_rss.base_cpu_number = AQ_CFG_RSS_BASE_CPU_NUM_DEF;
79 cfg->flow_control = AQ_CFG_FC_MODE;
80
81 cfg->mtu = AQ_CFG_MTU_DEF;
82 cfg->link_speed_msk = AQ_CFG_SPEED_MSK;
83 cfg->is_autoneg = AQ_CFG_IS_AUTONEG_DEF;
84
85 cfg->is_lro = AQ_CFG_IS_LRO_DEF;
86
87 cfg->vlan_id = 0U;
88
89 aq_nic_rss_init(self, cfg->num_rss_queues);
97bde5c4
DV
90
91 /*descriptors */
23ee07ad
IR
92 cfg->rxds = min(cfg->aq_hw_caps->rxds, AQ_CFG_RXDS_DEF);
93 cfg->txds = min(cfg->aq_hw_caps->txds, AQ_CFG_TXDS_DEF);
97bde5c4
DV
94
95 /*rss rings */
23ee07ad 96 cfg->vecs = min(cfg->aq_hw_caps->vecs, AQ_CFG_VECS_DEF);
97bde5c4
DV
97 cfg->vecs = min(cfg->vecs, num_online_cpus());
98 /* cfg->vecs should be power of 2 for RSS */
99 if (cfg->vecs >= 8U)
100 cfg->vecs = 8U;
101 else if (cfg->vecs >= 4U)
102 cfg->vecs = 4U;
103 else if (cfg->vecs >= 2U)
104 cfg->vecs = 2U;
105 else
106 cfg->vecs = 1U;
107
64fc7953
PB
108 cfg->num_rss_queues = min(cfg->vecs, AQ_CFG_NUM_RSS_QUEUES_DEF);
109
23ee07ad 110 cfg->irq_type = aq_pci_func_get_irq_type(self);
97bde5c4
DV
111
112 if ((cfg->irq_type == AQ_HW_IRQ_LEGACY) ||
8fcb98f4 113 (cfg->aq_hw_caps->vecs == 1U) ||
97bde5c4
DV
114 (cfg->vecs == 1U)) {
115 cfg->is_rss = 0U;
116 cfg->vecs = 1U;
117 }
118
8fcb98f4
IR
119 cfg->link_speed_msk &= cfg->aq_hw_caps->link_speed_msk;
120 cfg->hw_features = cfg->aq_hw_caps->hw_features;
97bde5c4
DV
121}
122
3aec6412
IR
123static int aq_nic_update_link_status(struct aq_nic_s *self)
124{
0c58c35f 125 int err = self->aq_fw_ops->update_link_status(self->aq_hw);
3aec6412
IR
126
127 if (err)
128 return err;
129
b82ee71a 130 if (self->link_status.mbps != self->aq_hw->aq_link_status.mbps) {
3aec6412
IR
131 pr_info("%s: link change old %d new %d\n",
132 AQ_CFG_DRV_NAME, self->link_status.mbps,
133 self->aq_hw->aq_link_status.mbps);
b82ee71a
IR
134 aq_nic_update_interrupt_moderation_settings(self);
135 }
3aec6412
IR
136
137 self->link_status = self->aq_hw->aq_link_status;
138 if (!netif_carrier_ok(self->ndev) && self->link_status.mbps) {
78f5193d 139 aq_utils_obj_set(&self->flags,
3aec6412 140 AQ_NIC_FLAG_STARTED);
78f5193d 141 aq_utils_obj_clear(&self->flags,
3aec6412
IR
142 AQ_NIC_LINK_DOWN);
143 netif_carrier_on(self->ndev);
144 netif_tx_wake_all_queues(self->ndev);
145 }
146 if (netif_carrier_ok(self->ndev) && !self->link_status.mbps) {
147 netif_carrier_off(self->ndev);
148 netif_tx_disable(self->ndev);
78f5193d 149 aq_utils_obj_set(&self->flags, AQ_NIC_LINK_DOWN);
3aec6412
IR
150 }
151 return 0;
152}
153
e99e88a9 154static void aq_nic_service_timer_cb(struct timer_list *t)
97bde5c4 155{
e99e88a9 156 struct aq_nic_s *self = from_timer(self, t, service_timer);
fdb4a083 157 int ctimer = AQ_CFG_SERVICE_TIMER_INTERVAL;
97bde5c4 158 int err = 0;
97bde5c4 159
78f5193d 160 if (aq_utils_obj_test(&self->flags, AQ_NIC_FLAGS_IS_NOT_READY))
97bde5c4
DV
161 goto err_exit;
162
3aec6412
IR
163 err = aq_nic_update_link_status(self);
164 if (err)
97bde5c4
DV
165 goto err_exit;
166
0c58c35f
IR
167 if (self->aq_fw_ops->update_stats)
168 self->aq_fw_ops->update_stats(self->aq_hw);
65e665e6 169
9f8a2203 170 aq_nic_update_ndev_stats(self);
97bde5c4 171
fdb4a083
IR
172 /* If no link - use faster timer rate to detect link up asap */
173 if (!netif_carrier_ok(self->ndev))
174 ctimer = max(ctimer / 2, 1);
97bde5c4
DV
175
176err_exit:
fdb4a083 177 mod_timer(&self->service_timer, jiffies + ctimer);
97bde5c4
DV
178}
179
e99e88a9 180static void aq_nic_polling_timer_cb(struct timer_list *t)
97bde5c4 181{
e99e88a9 182 struct aq_nic_s *self = from_timer(self, t, polling_timer);
97bde5c4
DV
183 struct aq_vec_s *aq_vec = NULL;
184 unsigned int i = 0U;
185
186 for (i = 0U, aq_vec = self->aq_vec[0];
187 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i])
188 aq_vec_isr(i, (void *)aq_vec);
189
190 mod_timer(&self->polling_timer, jiffies +
191 AQ_CFG_POLLING_TIMER_INTERVAL);
192}
193
97bde5c4
DV
194int aq_nic_ndev_register(struct aq_nic_s *self)
195{
196 int err = 0;
97bde5c4
DV
197
198 if (!self->ndev) {
199 err = -EINVAL;
200 goto err_exit;
201 }
23ee07ad 202
0c58c35f
IR
203 err = hw_atl_utils_initfw(self->aq_hw, &self->aq_fw_ops);
204 if (err)
205 goto err_exit;
206
207 err = self->aq_fw_ops->get_mac_permanent(self->aq_hw,
97bde5c4 208 self->ndev->dev_addr);
23ee07ad 209 if (err)
97bde5c4
DV
210 goto err_exit;
211
212#if defined(AQ_CFG_MAC_ADDR_PERMANENT)
213 {
214 static u8 mac_addr_permanent[] = AQ_CFG_MAC_ADDR_PERMANENT;
215
216 ether_addr_copy(self->ndev->dev_addr, mac_addr_permanent);
217 }
218#endif
97bde5c4 219
23ee07ad
IR
220 for (self->aq_vecs = 0; self->aq_vecs < aq_nic_get_cfg(self)->vecs;
221 self->aq_vecs++) {
222 self->aq_vec[self->aq_vecs] =
223 aq_vec_alloc(self, self->aq_vecs, aq_nic_get_cfg(self));
224 if (!self->aq_vec[self->aq_vecs]) {
225 err = -ENOMEM;
226 goto err_exit;
227 }
228 }
229
97bde5c4
DV
230 netif_carrier_off(self->ndev);
231
3aec6412 232 netif_tx_disable(self->ndev);
97bde5c4 233
55629109 234 err = register_netdev(self->ndev);
23ee07ad 235 if (err)
55629109
PB
236 goto err_exit;
237
97bde5c4
DV
238err_exit:
239 return err;
240}
241
23ee07ad 242void aq_nic_ndev_init(struct aq_nic_s *self)
97bde5c4 243{
4cbc9f92 244 const struct aq_hw_caps_s *aq_hw_caps = self->aq_nic_cfg.aq_hw_caps;
97bde5c4
DV
245 struct aq_nic_cfg_s *aq_nic_cfg = &self->aq_nic_cfg;
246
247 self->ndev->hw_features |= aq_hw_caps->hw_features;
248 self->ndev->features = aq_hw_caps->hw_features;
249 self->ndev->priv_flags = aq_hw_caps->hw_priv_flags;
250 self->ndev->mtu = aq_nic_cfg->mtu - ETH_HLEN;
8fcb98f4 251 self->ndev->max_mtu = aq_hw_caps->mtu - ETH_FCS_LEN - ETH_HLEN;
97bde5c4 252
97bde5c4
DV
253}
254
255void aq_nic_set_tx_ring(struct aq_nic_s *self, unsigned int idx,
256 struct aq_ring_s *ring)
257{
258 self->aq_ring_tx[idx] = ring;
259}
260
97bde5c4
DV
261struct net_device *aq_nic_get_ndev(struct aq_nic_s *self)
262{
263 return self->ndev;
264}
265
266int aq_nic_init(struct aq_nic_s *self)
267{
268 struct aq_vec_s *aq_vec = NULL;
269 int err = 0;
270 unsigned int i = 0U;
271
272 self->power_state = AQ_HW_POWER_STATE_D0;
8fcb98f4 273 err = self->aq_hw_ops->hw_reset(self->aq_hw);
97bde5c4
DV
274 if (err < 0)
275 goto err_exit;
276
8fcb98f4 277 err = self->aq_hw_ops->hw_init(self->aq_hw,
23ee07ad 278 aq_nic_get_ndev(self)->dev_addr);
97bde5c4
DV
279 if (err < 0)
280 goto err_exit;
281
282 for (i = 0U, aq_vec = self->aq_vec[0];
283 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i])
8fcb98f4 284 aq_vec_init(aq_vec, self->aq_hw_ops, self->aq_hw);
97bde5c4 285
23ee07ad
IR
286 netif_carrier_off(self->ndev);
287
97bde5c4
DV
288err_exit:
289 return err;
290}
291
97bde5c4
DV
292int aq_nic_start(struct aq_nic_s *self)
293{
294 struct aq_vec_s *aq_vec = NULL;
295 int err = 0;
296 unsigned int i = 0U;
297
8fcb98f4 298 err = self->aq_hw_ops->hw_multicast_list_set(self->aq_hw,
97bde5c4
DV
299 self->mc_list.ar,
300 self->mc_list.count);
301 if (err < 0)
302 goto err_exit;
303
8fcb98f4 304 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw,
97bde5c4
DV
305 self->packet_filter);
306 if (err < 0)
307 goto err_exit;
308
309 for (i = 0U, aq_vec = self->aq_vec[0];
310 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) {
311 err = aq_vec_start(aq_vec);
312 if (err < 0)
313 goto err_exit;
314 }
315
8fcb98f4 316 err = self->aq_hw_ops->hw_start(self->aq_hw);
97bde5c4
DV
317 if (err < 0)
318 goto err_exit;
319
b82ee71a
IR
320 err = aq_nic_update_interrupt_moderation_settings(self);
321 if (err)
97bde5c4 322 goto err_exit;
e99e88a9 323 timer_setup(&self->service_timer, aq_nic_service_timer_cb, 0);
97bde5c4
DV
324 mod_timer(&self->service_timer, jiffies +
325 AQ_CFG_SERVICE_TIMER_INTERVAL);
326
327 if (self->aq_nic_cfg.is_polling) {
e99e88a9 328 timer_setup(&self->polling_timer, aq_nic_polling_timer_cb, 0);
97bde5c4
DV
329 mod_timer(&self->polling_timer, jiffies +
330 AQ_CFG_POLLING_TIMER_INTERVAL);
331 } else {
332 for (i = 0U, aq_vec = self->aq_vec[0];
333 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) {
23ee07ad 334 err = aq_pci_func_alloc_irq(self, i,
97bde5c4 335 self->ndev->name, aq_vec,
23ee07ad 336 aq_vec_get_affinity_mask(aq_vec));
97bde5c4
DV
337 if (err < 0)
338 goto err_exit;
339 }
340
8fcb98f4 341 err = self->aq_hw_ops->hw_irq_enable(self->aq_hw,
97bde5c4
DV
342 AQ_CFG_IRQ_MASK);
343 if (err < 0)
344 goto err_exit;
345 }
346
97bde5c4
DV
347 err = netif_set_real_num_tx_queues(self->ndev, self->aq_vecs);
348 if (err < 0)
349 goto err_exit;
350
351 err = netif_set_real_num_rx_queues(self->ndev, self->aq_vecs);
352 if (err < 0)
353 goto err_exit;
354
3aec6412
IR
355 netif_tx_start_all_queues(self->ndev);
356
97bde5c4
DV
357err_exit:
358 return err;
359}
360
e399553d
PB
361static unsigned int aq_nic_map_skb(struct aq_nic_s *self,
362 struct sk_buff *skb,
363 struct aq_ring_s *ring)
97bde5c4
DV
364{
365 unsigned int ret = 0U;
366 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
367 unsigned int frag_count = 0U;
e399553d 368 unsigned int dx = ring->sw_tail;
c7545689 369 struct aq_ring_buff_s *first = NULL;
e399553d 370 struct aq_ring_buff_s *dx_buff = &ring->buff_ring[dx];
97bde5c4 371
e399553d
PB
372 if (unlikely(skb_is_gso(skb))) {
373 dx_buff->flags = 0U;
374 dx_buff->len_pkt = skb->len;
375 dx_buff->len_l2 = ETH_HLEN;
376 dx_buff->len_l3 = ip_hdrlen(skb);
377 dx_buff->len_l4 = tcp_hdrlen(skb);
378 dx_buff->mss = skb_shinfo(skb)->gso_size;
379 dx_buff->is_txc = 1U;
c7545689 380 dx_buff->eop_index = 0xffffU;
e399553d 381
386aff88
PB
382 dx_buff->is_ipv6 =
383 (ip_hdr(skb)->version == 6) ? 1U : 0U;
384
e399553d
PB
385 dx = aq_ring_next_dx(ring, dx);
386 dx_buff = &ring->buff_ring[dx];
387 ++ret;
388 }
389
390 dx_buff->flags = 0U;
391 dx_buff->len = skb_headlen(skb);
392 dx_buff->pa = dma_map_single(aq_nic_get_dev(self),
393 skb->data,
394 dx_buff->len,
395 DMA_TO_DEVICE);
97bde5c4 396
e399553d
PB
397 if (unlikely(dma_mapping_error(aq_nic_get_dev(self), dx_buff->pa)))
398 goto exit;
399
c7545689 400 first = dx_buff;
e399553d
PB
401 dx_buff->len_pkt = skb->len;
402 dx_buff->is_sop = 1U;
403 dx_buff->is_mapped = 1U;
97bde5c4
DV
404 ++ret;
405
406 if (skb->ip_summed == CHECKSUM_PARTIAL) {
e399553d
PB
407 dx_buff->is_ip_cso = (htons(ETH_P_IP) == skb->protocol) ?
408 1U : 0U;
ea0504f5
PB
409
410 if (ip_hdr(skb)->version == 4) {
411 dx_buff->is_tcp_cso =
412 (ip_hdr(skb)->protocol == IPPROTO_TCP) ?
413 1U : 0U;
414 dx_buff->is_udp_cso =
415 (ip_hdr(skb)->protocol == IPPROTO_UDP) ?
416 1U : 0U;
417 } else if (ip_hdr(skb)->version == 6) {
418 dx_buff->is_tcp_cso =
419 (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP) ?
420 1U : 0U;
421 dx_buff->is_udp_cso =
422 (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP) ?
423 1U : 0U;
424 }
97bde5c4
DV
425 }
426
427 for (; nr_frags--; ++frag_count) {
e399553d 428 unsigned int frag_len = 0U;
c7545689
PB
429 unsigned int buff_offset = 0U;
430 unsigned int buff_size = 0U;
97bde5c4
DV
431 dma_addr_t frag_pa;
432 skb_frag_t *frag = &skb_shinfo(skb)->frags[frag_count];
433
434 frag_len = skb_frag_size(frag);
97bde5c4 435
c7545689
PB
436 while (frag_len) {
437 if (frag_len > AQ_CFG_TX_FRAME_MAX)
438 buff_size = AQ_CFG_TX_FRAME_MAX;
439 else
440 buff_size = frag_len;
441
442 frag_pa = skb_frag_dma_map(aq_nic_get_dev(self),
443 frag,
444 buff_offset,
445 buff_size,
446 DMA_TO_DEVICE);
447
448 if (unlikely(dma_mapping_error(aq_nic_get_dev(self),
449 frag_pa)))
450 goto mapping_error;
e399553d 451
e399553d
PB
452 dx = aq_ring_next_dx(ring, dx);
453 dx_buff = &ring->buff_ring[dx];
454
455 dx_buff->flags = 0U;
c7545689 456 dx_buff->len = buff_size;
e399553d
PB
457 dx_buff->pa = frag_pa;
458 dx_buff->is_mapped = 1U;
c7545689
PB
459 dx_buff->eop_index = 0xffffU;
460
461 frag_len -= buff_size;
462 buff_offset += buff_size;
97bde5c4 463
e399553d 464 ++ret;
97bde5c4 465 }
97bde5c4
DV
466 }
467
c7545689 468 first->eop_index = dx;
e399553d
PB
469 dx_buff->is_eop = 1U;
470 dx_buff->skb = skb;
471 goto exit;
472
473mapping_error:
474 for (dx = ring->sw_tail;
475 ret > 0;
476 --ret, dx = aq_ring_next_dx(ring, dx)) {
477 dx_buff = &ring->buff_ring[dx];
478
479 if (!dx_buff->is_txc && dx_buff->pa) {
480 if (unlikely(dx_buff->is_sop)) {
481 dma_unmap_single(aq_nic_get_dev(self),
482 dx_buff->pa,
483 dx_buff->len,
484 DMA_TO_DEVICE);
485 } else {
486 dma_unmap_page(aq_nic_get_dev(self),
487 dx_buff->pa,
488 dx_buff->len,
489 DMA_TO_DEVICE);
490 }
491 }
97bde5c4
DV
492 }
493
e399553d 494exit:
97bde5c4
DV
495 return ret;
496}
497
498int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb)
97bde5c4
DV
499{
500 struct aq_ring_s *ring = NULL;
501 unsigned int frags = 0U;
502 unsigned int vec = skb->queue_mapping % self->aq_nic_cfg.vecs;
503 unsigned int tc = 0U;
b350d7b8 504 int err = NETDEV_TX_OK;
97bde5c4
DV
505
506 frags = skb_shinfo(skb)->nr_frags + 1;
507
508 ring = self->aq_ring_tx[AQ_NIC_TCVEC2RING(self, tc, vec)];
509
97bde5c4
DV
510 if (frags > AQ_CFG_SKB_FRAGS_MAX) {
511 dev_kfree_skb_any(skb);
512 goto err_exit;
513 }
514
3aec6412 515 aq_ring_update_queue_state(ring);
97bde5c4 516
3aec6412
IR
517 /* Above status update may stop the queue. Check this. */
518 if (__netif_subqueue_stopped(self->ndev, ring->idx)) {
97bde5c4
DV
519 err = NETDEV_TX_BUSY;
520 goto err_exit;
521 }
522
278175ab 523 frags = aq_nic_map_skb(self, skb, ring);
97bde5c4 524
278175ab 525 if (likely(frags)) {
8fcb98f4 526 err = self->aq_hw_ops->hw_ring_tx_xmit(self->aq_hw,
23ee07ad 527 ring, frags);
278175ab 528 if (err >= 0) {
278175ab
PB
529 ++ring->stats.tx.packets;
530 ring->stats.tx.bytes += skb->len;
531 }
532 } else {
97bde5c4 533 err = NETDEV_TX_BUSY;
97bde5c4
DV
534 }
535
536err_exit:
97bde5c4
DV
537 return err;
538}
539
b82ee71a
IR
540int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self)
541{
8fcb98f4 542 return self->aq_hw_ops->hw_interrupt_moderation_set(self->aq_hw);
b82ee71a
IR
543}
544
97bde5c4
DV
545int aq_nic_set_packet_filter(struct aq_nic_s *self, unsigned int flags)
546{
547 int err = 0;
548
8fcb98f4 549 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, flags);
97bde5c4
DV
550 if (err < 0)
551 goto err_exit;
552
553 self->packet_filter = flags;
554
555err_exit:
556 return err;
557}
558
559int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev)
560{
561 struct netdev_hw_addr *ha = NULL;
562 unsigned int i = 0U;
563
564 self->mc_list.count = 0U;
565
566 netdev_for_each_mc_addr(ha, ndev) {
567 ether_addr_copy(self->mc_list.ar[i++], ha->addr);
568 ++self->mc_list.count;
b21f502f
IR
569
570 if (i >= AQ_CFG_MULTICAST_ADDRESS_MAX)
571 break;
97bde5c4
DV
572 }
573
b21f502f
IR
574 if (i >= AQ_CFG_MULTICAST_ADDRESS_MAX) {
575 /* Number of filters is too big: atlantic does not support this.
576 * Force all multi filter to support this.
577 * With this we disable all UC filters and setup "all pass"
578 * multicast mask
579 */
580 self->packet_filter |= IFF_ALLMULTI;
8fcb98f4
IR
581 self->aq_nic_cfg.mc_list_count = 0;
582 return self->aq_hw_ops->hw_packet_filter_set(self->aq_hw,
23ee07ad 583 self->packet_filter);
b21f502f 584 } else {
8fcb98f4 585 return self->aq_hw_ops->hw_multicast_list_set(self->aq_hw,
97bde5c4
DV
586 self->mc_list.ar,
587 self->mc_list.count);
b21f502f 588 }
97bde5c4
DV
589}
590
591int aq_nic_set_mtu(struct aq_nic_s *self, int new_mtu)
592{
97bde5c4
DV
593 self->aq_nic_cfg.mtu = new_mtu;
594
d85fc17b 595 return 0;
97bde5c4
DV
596}
597
598int aq_nic_set_mac(struct aq_nic_s *self, struct net_device *ndev)
599{
8fcb98f4 600 return self->aq_hw_ops->hw_set_mac_address(self->aq_hw, ndev->dev_addr);
97bde5c4
DV
601}
602
603unsigned int aq_nic_get_link_speed(struct aq_nic_s *self)
604{
605 return self->link_status.mbps;
606}
607
608int aq_nic_get_regs(struct aq_nic_s *self, struct ethtool_regs *regs, void *p)
609{
610 u32 *regs_buff = p;
611 int err = 0;
612
613 regs->version = 1;
614
8fcb98f4
IR
615 err = self->aq_hw_ops->hw_get_regs(self->aq_hw,
616 self->aq_nic_cfg.aq_hw_caps,
617 regs_buff);
97bde5c4
DV
618 if (err < 0)
619 goto err_exit;
620
621err_exit:
622 return err;
623}
624
625int aq_nic_get_regs_count(struct aq_nic_s *self)
626{
8fcb98f4 627 return self->aq_nic_cfg.aq_hw_caps->mac_regs_count;
97bde5c4
DV
628}
629
630void aq_nic_get_stats(struct aq_nic_s *self, u64 *data)
631{
97bde5c4
DV
632 unsigned int i = 0U;
633 unsigned int count = 0U;
be08d839 634 struct aq_vec_s *aq_vec = NULL;
8fcb98f4 635 struct aq_stats_s *stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw);
97bde5c4 636
be08d839 637 if (!stats)
97bde5c4
DV
638 goto err_exit;
639
be08d839
IR
640 data[i] = stats->uprc + stats->mprc + stats->bprc;
641 data[++i] = stats->uprc;
642 data[++i] = stats->mprc;
643 data[++i] = stats->bprc;
644 data[++i] = stats->erpt;
645 data[++i] = stats->uptc + stats->mptc + stats->bptc;
646 data[++i] = stats->uptc;
647 data[++i] = stats->mptc;
648 data[++i] = stats->bptc;
649 data[++i] = stats->ubrc;
650 data[++i] = stats->ubtc;
651 data[++i] = stats->mbrc;
652 data[++i] = stats->mbtc;
653 data[++i] = stats->bbrc;
654 data[++i] = stats->bbtc;
655 data[++i] = stats->ubrc + stats->mbrc + stats->bbrc;
656 data[++i] = stats->ubtc + stats->mbtc + stats->bbtc;
657 data[++i] = stats->dma_pkt_rc;
658 data[++i] = stats->dma_pkt_tc;
659 data[++i] = stats->dma_oct_rc;
660 data[++i] = stats->dma_oct_tc;
661 data[++i] = stats->dpc;
662
663 i++;
664
665 data += i;
97bde5c4
DV
666
667 for (i = 0U, aq_vec = self->aq_vec[0];
3013c498 668 aq_vec && self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) {
97bde5c4
DV
669 data += count;
670 aq_vec_get_sw_stats(aq_vec, data, &count);
671 }
672
673err_exit:;
97bde5c4
DV
674}
675
9f8a2203
IR
676static void aq_nic_update_ndev_stats(struct aq_nic_s *self)
677{
678 struct net_device *ndev = self->ndev;
8fcb98f4 679 struct aq_stats_s *stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw);
9f8a2203
IR
680
681 ndev->stats.rx_packets = stats->uprc + stats->mprc + stats->bprc;
682 ndev->stats.rx_bytes = stats->ubrc + stats->mbrc + stats->bbrc;
683 ndev->stats.rx_errors = stats->erpr;
684 ndev->stats.tx_packets = stats->uptc + stats->mptc + stats->bptc;
685 ndev->stats.tx_bytes = stats->ubtc + stats->mbtc + stats->bbtc;
686 ndev->stats.tx_errors = stats->erpt;
45cc1c7a 687 ndev->stats.multicast = stats->mprc;
9f8a2203
IR
688}
689
f8244ab5
PR
690void aq_nic_get_link_ksettings(struct aq_nic_s *self,
691 struct ethtool_link_ksettings *cmd)
97bde5c4 692{
854ab38c
IR
693 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
694 cmd->base.port = PORT_FIBRE;
695 else
696 cmd->base.port = PORT_TP;
97bde5c4 697 /* This driver supports only 10G capable adapters, so DUPLEX_FULL */
f8244ab5
PR
698 cmd->base.duplex = DUPLEX_FULL;
699 cmd->base.autoneg = self->aq_nic_cfg.is_autoneg;
700
8f9000a5
PB
701 ethtool_link_ksettings_zero_link_mode(cmd, supported);
702
8fcb98f4 703 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10G)
8f9000a5
PB
704 ethtool_link_ksettings_add_link_mode(cmd, supported,
705 10000baseT_Full);
706
8fcb98f4 707 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_5G)
8f9000a5
PB
708 ethtool_link_ksettings_add_link_mode(cmd, supported,
709 5000baseT_Full);
710
8fcb98f4 711 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_2GS)
8f9000a5
PB
712 ethtool_link_ksettings_add_link_mode(cmd, supported,
713 2500baseT_Full);
714
8fcb98f4 715 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G)
8f9000a5
PB
716 ethtool_link_ksettings_add_link_mode(cmd, supported,
717 1000baseT_Full);
718
8fcb98f4 719 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M)
8f9000a5
PB
720 ethtool_link_ksettings_add_link_mode(cmd, supported,
721 100baseT_Full);
722
8fcb98f4 723 if (self->aq_nic_cfg.aq_hw_caps->flow_control)
8f9000a5
PB
724 ethtool_link_ksettings_add_link_mode(cmd, supported,
725 Pause);
726
727 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
854ab38c
IR
728
729 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
730 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
731 else
732 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
8f9000a5
PB
733
734 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
735
736 if (self->aq_nic_cfg.is_autoneg)
737 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
738
739 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10G)
740 ethtool_link_ksettings_add_link_mode(cmd, advertising,
741 10000baseT_Full);
742
743 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_5G)
744 ethtool_link_ksettings_add_link_mode(cmd, advertising,
745 5000baseT_Full);
746
747 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_2GS)
748 ethtool_link_ksettings_add_link_mode(cmd, advertising,
749 2500baseT_Full);
750
751 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G)
752 ethtool_link_ksettings_add_link_mode(cmd, advertising,
753 1000baseT_Full);
754
755 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M)
756 ethtool_link_ksettings_add_link_mode(cmd, advertising,
757 100baseT_Full);
758
759 if (self->aq_nic_cfg.flow_control)
760 ethtool_link_ksettings_add_link_mode(cmd, advertising,
761 Pause);
762
854ab38c
IR
763 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
764 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
765 else
766 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
97bde5c4
DV
767}
768
f8244ab5
PR
769int aq_nic_set_link_ksettings(struct aq_nic_s *self,
770 const struct ethtool_link_ksettings *cmd)
97bde5c4
DV
771{
772 u32 speed = 0U;
773 u32 rate = 0U;
774 int err = 0;
775
f8244ab5 776 if (cmd->base.autoneg == AUTONEG_ENABLE) {
8fcb98f4 777 rate = self->aq_nic_cfg.aq_hw_caps->link_speed_msk;
97bde5c4
DV
778 self->aq_nic_cfg.is_autoneg = true;
779 } else {
f8244ab5 780 speed = cmd->base.speed;
97bde5c4
DV
781
782 switch (speed) {
783 case SPEED_100:
784 rate = AQ_NIC_RATE_100M;
785 break;
786
787 case SPEED_1000:
788 rate = AQ_NIC_RATE_1G;
789 break;
790
791 case SPEED_2500:
792 rate = AQ_NIC_RATE_2GS;
793 break;
794
795 case SPEED_5000:
796 rate = AQ_NIC_RATE_5G;
797 break;
798
799 case SPEED_10000:
800 rate = AQ_NIC_RATE_10G;
801 break;
802
803 default:
804 err = -1;
805 goto err_exit;
806 break;
807 }
8fcb98f4 808 if (!(self->aq_nic_cfg.aq_hw_caps->link_speed_msk & rate)) {
97bde5c4
DV
809 err = -1;
810 goto err_exit;
811 }
812
813 self->aq_nic_cfg.is_autoneg = false;
814 }
815
0c58c35f 816 err = self->aq_fw_ops->set_link_speed(self->aq_hw, rate);
97bde5c4
DV
817 if (err < 0)
818 goto err_exit;
819
820 self->aq_nic_cfg.link_speed_msk = rate;
821
822err_exit:
823 return err;
824}
825
826struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self)
827{
828 return &self->aq_nic_cfg;
829}
830
831u32 aq_nic_get_fw_version(struct aq_nic_s *self)
832{
833 u32 fw_version = 0U;
834
8fcb98f4 835 self->aq_hw_ops->hw_get_fw_version(self->aq_hw, &fw_version);
97bde5c4
DV
836
837 return fw_version;
838}
839
840int aq_nic_stop(struct aq_nic_s *self)
841{
842 struct aq_vec_s *aq_vec = NULL;
843 unsigned int i = 0U;
844
3aec6412 845 netif_tx_disable(self->ndev);
93d87b8f 846 netif_carrier_off(self->ndev);
97bde5c4
DV
847
848 del_timer_sync(&self->service_timer);
849
8fcb98f4 850 self->aq_hw_ops->hw_irq_disable(self->aq_hw, AQ_CFG_IRQ_MASK);
97bde5c4
DV
851
852 if (self->aq_nic_cfg.is_polling)
853 del_timer_sync(&self->polling_timer);
854 else
23ee07ad 855 aq_pci_func_free_irqs(self);
97bde5c4
DV
856
857 for (i = 0U, aq_vec = self->aq_vec[0];
858 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i])
859 aq_vec_stop(aq_vec);
860
8fcb98f4 861 return self->aq_hw_ops->hw_stop(self->aq_hw);
97bde5c4
DV
862}
863
864void aq_nic_deinit(struct aq_nic_s *self)
865{
866 struct aq_vec_s *aq_vec = NULL;
867 unsigned int i = 0U;
868
869 if (!self)
870 goto err_exit;
871
872 for (i = 0U, aq_vec = self->aq_vec[0];
873 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i])
874 aq_vec_deinit(aq_vec);
875
876 if (self->power_state == AQ_HW_POWER_STATE_D0) {
8fcb98f4 877 (void)self->aq_hw_ops->hw_deinit(self->aq_hw);
97bde5c4 878 } else {
8fcb98f4 879 (void)self->aq_hw_ops->hw_set_power(self->aq_hw,
97bde5c4
DV
880 self->power_state);
881 }
882
883err_exit:;
884}
885
23ee07ad 886void aq_nic_free_vectors(struct aq_nic_s *self)
97bde5c4
DV
887{
888 unsigned int i = 0U;
889
890 if (!self)
891 goto err_exit;
892
08b5cf08 893 for (i = ARRAY_SIZE(self->aq_vec); i--;) {
3013c498 894 if (self->aq_vec[i]) {
97bde5c4 895 aq_vec_free(self->aq_vec[i]);
3013c498
PB
896 self->aq_vec[i] = NULL;
897 }
97bde5c4
DV
898 }
899
900err_exit:;
901}
902
903int aq_nic_change_pm_state(struct aq_nic_s *self, pm_message_t *pm_msg)
904{
905 int err = 0;
906
907 if (!netif_running(self->ndev)) {
908 err = 0;
d5919aeb 909 goto out;
97bde5c4
DV
910 }
911 rtnl_lock();
912 if (pm_msg->event & PM_EVENT_SLEEP || pm_msg->event & PM_EVENT_FREEZE) {
913 self->power_state = AQ_HW_POWER_STATE_D3;
914 netif_device_detach(self->ndev);
915 netif_tx_stop_all_queues(self->ndev);
916
917 err = aq_nic_stop(self);
918 if (err < 0)
919 goto err_exit;
920
921 aq_nic_deinit(self);
922 } else {
923 err = aq_nic_init(self);
924 if (err < 0)
925 goto err_exit;
926
927 err = aq_nic_start(self);
928 if (err < 0)
929 goto err_exit;
930
931 netif_device_attach(self->ndev);
932 netif_tx_start_all_queues(self->ndev);
933 }
97bde5c4
DV
934
935err_exit:
d5919aeb
PB
936 rtnl_unlock();
937out:
97bde5c4
DV
938 return err;
939}