Commit | Line | Data |
---|---|---|
6aa20a22 | 1 | /* |
1da177e4 LT |
2 | * Lance ethernet driver for the MIPS processor based |
3 | * DECstation family | |
4 | * | |
5 | * | |
6 | * adopted from sunlance.c by Richard van den Berg | |
7 | * | |
257b346d | 8 | * Copyright (C) 2002, 2003, 2005, 2006 Maciej W. Rozycki |
1da177e4 LT |
9 | * |
10 | * additional sources: | |
11 | * - PMAD-AA TURBOchannel Ethernet Module Functional Specification, | |
12 | * Revision 1.2 | |
13 | * | |
14 | * History: | |
15 | * | |
16 | * v0.001: The kernel accepts the code and it shows the hardware address. | |
17 | * | |
18 | * v0.002: Removed most sparc stuff, left only some module and dma stuff. | |
19 | * | |
20 | * v0.003: Enhanced base address calculation from proposals by | |
21 | * Harald Koerfgen and Thomas Riemer. | |
22 | * | |
23 | * v0.004: lance-regs is pointing at the right addresses, added prom | |
24 | * check. First start of address mapping and DMA. | |
25 | * | |
26 | * v0.005: started to play around with LANCE-DMA. This driver will not | |
27 | * work for non IOASIC lances. HK | |
28 | * | |
29 | * v0.006: added pointer arrays to lance_private and setup routine for | |
30 | * them in dec_lance_init. HK | |
31 | * | |
32 | * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to | |
33 | * access the init block. This looks like one (short) word at a | |
34 | * time, but the smallest amount the IOASIC can transfer is a | |
35 | * (long) word. So we have a 2-2 padding here. Changed | |
36 | * lance_init_block accordingly. The 16-16 padding for the buffers | |
37 | * seems to be correct. HK | |
38 | * | |
39 | * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer | |
40 | * | |
41 | * v0.009: Module support fixes, multiple interfaces support, various | |
42 | * bits. macro | |
3b6e8fe7 MR |
43 | * |
44 | * v0.010: Fixes for the PMAD mapping of the LANCE buffer and for the | |
45 | * PMAX requirement to only use halfword accesses to the | |
46 | * buffer. macro | |
257b346d MR |
47 | * |
48 | * v0.011: Converted the PMAD to the driver model. macro | |
1da177e4 LT |
49 | */ |
50 | ||
1da177e4 LT |
51 | #include <linux/crc32.h> |
52 | #include <linux/delay.h> | |
53 | #include <linux/errno.h> | |
54 | #include <linux/if_ether.h> | |
55 | #include <linux/init.h> | |
56 | #include <linux/kernel.h> | |
57 | #include <linux/module.h> | |
58 | #include <linux/netdevice.h> | |
59 | #include <linux/etherdevice.h> | |
60 | #include <linux/spinlock.h> | |
61 | #include <linux/stddef.h> | |
62 | #include <linux/string.h> | |
257b346d | 63 | #include <linux/tc.h> |
3b6e8fe7 | 64 | #include <linux/types.h> |
1da177e4 LT |
65 | |
66 | #include <asm/addrspace.h> | |
36156cdf | 67 | |
1da177e4 LT |
68 | #include <asm/dec/interrupts.h> |
69 | #include <asm/dec/ioasic.h> | |
70 | #include <asm/dec/ioasic_addrs.h> | |
71 | #include <asm/dec/kn01.h> | |
72 | #include <asm/dec/machtype.h> | |
36156cdf | 73 | #include <asm/dec/system.h> |
1da177e4 | 74 | |
0cb0568d | 75 | static char version[] = |
257b346d | 76 | "declance.c: v0.011 by Linux MIPS DECstation task force\n"; |
1da177e4 LT |
77 | |
78 | MODULE_AUTHOR("Linux MIPS DECstation task force"); | |
79 | MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver"); | |
80 | MODULE_LICENSE("GPL"); | |
81 | ||
257b346d MR |
82 | #define __unused __attribute__ ((unused)) |
83 | ||
1da177e4 LT |
84 | /* |
85 | * card types | |
86 | */ | |
87 | #define ASIC_LANCE 1 | |
88 | #define PMAD_LANCE 2 | |
89 | #define PMAX_LANCE 3 | |
90 | ||
1da177e4 LT |
91 | |
92 | #define LE_CSR0 0 | |
93 | #define LE_CSR1 1 | |
94 | #define LE_CSR2 2 | |
95 | #define LE_CSR3 3 | |
96 | ||
97 | #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ | |
98 | ||
99 | #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ | |
100 | #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */ | |
101 | #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */ | |
102 | #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */ | |
103 | #define LE_C0_MERR 0x0800 /* ME: Memory error */ | |
104 | #define LE_C0_RINT 0x0400 /* Received interrupt */ | |
105 | #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */ | |
106 | #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */ | |
107 | #define LE_C0_INTR 0x0080 /* Interrupt or error */ | |
108 | #define LE_C0_INEA 0x0040 /* Interrupt enable */ | |
109 | #define LE_C0_RXON 0x0020 /* Receiver on */ | |
110 | #define LE_C0_TXON 0x0010 /* Transmitter on */ | |
111 | #define LE_C0_TDMD 0x0008 /* Transmitter demand */ | |
112 | #define LE_C0_STOP 0x0004 /* Stop the card */ | |
113 | #define LE_C0_STRT 0x0002 /* Start the card */ | |
114 | #define LE_C0_INIT 0x0001 /* Init the card */ | |
115 | ||
116 | #define LE_C3_BSWP 0x4 /* SWAP */ | |
117 | #define LE_C3_ACON 0x2 /* ALE Control */ | |
118 | #define LE_C3_BCON 0x1 /* Byte control */ | |
119 | ||
120 | /* Receive message descriptor 1 */ | |
3b6e8fe7 MR |
121 | #define LE_R1_OWN 0x8000 /* Who owns the entry */ |
122 | #define LE_R1_ERR 0x4000 /* Error: if FRA, OFL, CRC or BUF is set */ | |
123 | #define LE_R1_FRA 0x2000 /* FRA: Frame error */ | |
124 | #define LE_R1_OFL 0x1000 /* OFL: Frame overflow */ | |
125 | #define LE_R1_CRC 0x0800 /* CRC error */ | |
126 | #define LE_R1_BUF 0x0400 /* BUF: Buffer error */ | |
127 | #define LE_R1_SOP 0x0200 /* Start of packet */ | |
128 | #define LE_R1_EOP 0x0100 /* End of packet */ | |
129 | #define LE_R1_POK 0x0300 /* Packet is complete: SOP + EOP */ | |
130 | ||
131 | /* Transmit message descriptor 1 */ | |
132 | #define LE_T1_OWN 0x8000 /* Lance owns the packet */ | |
133 | #define LE_T1_ERR 0x4000 /* Error summary */ | |
134 | #define LE_T1_EMORE 0x1000 /* Error: more than one retry needed */ | |
135 | #define LE_T1_EONE 0x0800 /* Error: one retry needed */ | |
136 | #define LE_T1_EDEF 0x0400 /* Error: deferred */ | |
137 | #define LE_T1_SOP 0x0200 /* Start of packet */ | |
138 | #define LE_T1_EOP 0x0100 /* End of packet */ | |
139 | #define LE_T1_POK 0x0300 /* Packet is complete: SOP + EOP */ | |
1da177e4 LT |
140 | |
141 | #define LE_T3_BUF 0x8000 /* Buffer error */ | |
142 | #define LE_T3_UFL 0x4000 /* Error underflow */ | |
143 | #define LE_T3_LCOL 0x1000 /* Error late collision */ | |
144 | #define LE_T3_CLOS 0x0800 /* Error carrier loss */ | |
145 | #define LE_T3_RTY 0x0400 /* Error retry */ | |
146 | #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ | |
147 | ||
148 | /* Define: 2^4 Tx buffers and 2^4 Rx buffers */ | |
149 | ||
150 | #ifndef LANCE_LOG_TX_BUFFERS | |
151 | #define LANCE_LOG_TX_BUFFERS 4 | |
152 | #define LANCE_LOG_RX_BUFFERS 4 | |
153 | #endif | |
154 | ||
155 | #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) | |
156 | #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) | |
157 | ||
158 | #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) | |
159 | #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) | |
160 | ||
161 | #define PKT_BUF_SZ 1536 | |
162 | #define RX_BUFF_SIZE PKT_BUF_SZ | |
163 | #define TX_BUFF_SIZE PKT_BUF_SZ | |
164 | ||
165 | #undef TEST_HITS | |
166 | #define ZERO 0 | |
167 | ||
3b6e8fe7 MR |
168 | /* |
169 | * The DS2100/3100 have a linear 64 kB buffer which supports halfword | |
170 | * accesses only. Each halfword of the buffer is word-aligned in the | |
171 | * CPU address space. | |
172 | * | |
173 | * The PMAD-AA has a 128 kB buffer on-board. | |
1da177e4 | 174 | * |
3b6e8fe7 MR |
175 | * The IOASIC LANCE devices use a shared memory region. This region |
176 | * as seen from the CPU is (max) 128 kB long and has to be on an 128 kB | |
177 | * boundary. The LANCE sees this as a 64 kB long continuous memory | |
178 | * region. | |
1da177e4 | 179 | * |
3b6e8fe7 MR |
180 | * The LANCE's DMA address is used as an index in this buffer and DMA |
181 | * takes place in bursts of eight 16-bit words which are packed into | |
182 | * four 32-bit words by the IOASIC. This leads to a strange padding: | |
183 | * 16 bytes of valid data followed by a 16 byte gap :-(. | |
1da177e4 LT |
184 | */ |
185 | ||
186 | struct lance_rx_desc { | |
187 | unsigned short rmd0; /* low address of packet */ | |
3b6e8fe7 MR |
188 | unsigned short rmd1; /* high address of packet |
189 | and descriptor bits */ | |
1da177e4 LT |
190 | short length; /* 2s complement (negative!) |
191 | of buffer length */ | |
1da177e4 | 192 | unsigned short mblength; /* actual number of bytes received */ |
1da177e4 LT |
193 | }; |
194 | ||
195 | struct lance_tx_desc { | |
196 | unsigned short tmd0; /* low address of packet */ | |
3b6e8fe7 MR |
197 | unsigned short tmd1; /* high address of packet |
198 | and descriptor bits */ | |
1da177e4 LT |
199 | short length; /* 2s complement (negative!) |
200 | of buffer length */ | |
1da177e4 | 201 | unsigned short misc; |
1da177e4 LT |
202 | }; |
203 | ||
204 | ||
205 | /* First part of the LANCE initialization block, described in databook. */ | |
206 | struct lance_init_block { | |
207 | unsigned short mode; /* pre-set mode (reg. 15) */ | |
1da177e4 | 208 | |
3b6e8fe7 MR |
209 | unsigned short phys_addr[3]; /* physical ethernet address */ |
210 | unsigned short filter[4]; /* multicast filter */ | |
1da177e4 LT |
211 | |
212 | /* Receive and transmit ring base, along with extra bits. */ | |
213 | unsigned short rx_ptr; /* receive descriptor addr */ | |
1da177e4 | 214 | unsigned short rx_len; /* receive len and high addr */ |
1da177e4 | 215 | unsigned short tx_ptr; /* transmit descriptor addr */ |
1da177e4 | 216 | unsigned short tx_len; /* transmit len and high addr */ |
3b6e8fe7 MR |
217 | |
218 | short gap[4]; | |
1da177e4 LT |
219 | |
220 | /* The buffer descriptors */ | |
221 | struct lance_rx_desc brx_ring[RX_RING_SIZE]; | |
222 | struct lance_tx_desc btx_ring[TX_RING_SIZE]; | |
223 | }; | |
224 | ||
225 | #define BUF_OFFSET_CPU sizeof(struct lance_init_block) | |
3b6e8fe7 | 226 | #define BUF_OFFSET_LNC sizeof(struct lance_init_block) |
1da177e4 | 227 | |
3b6e8fe7 MR |
228 | #define shift_off(off, type) \ |
229 | (type == ASIC_LANCE || type == PMAX_LANCE ? off << 1 : off) | |
1da177e4 | 230 | |
3b6e8fe7 MR |
231 | #define lib_off(rt, type) \ |
232 | shift_off(offsetof(struct lance_init_block, rt), type) | |
233 | ||
234 | #define lib_ptr(ib, rt, type) \ | |
235 | ((volatile u16 *)((u8 *)(ib) + lib_off(rt, type))) | |
236 | ||
237 | #define rds_off(rt, type) \ | |
238 | shift_off(offsetof(struct lance_rx_desc, rt), type) | |
239 | ||
240 | #define rds_ptr(rd, rt, type) \ | |
241 | ((volatile u16 *)((u8 *)(rd) + rds_off(rt, type))) | |
242 | ||
243 | #define tds_off(rt, type) \ | |
244 | shift_off(offsetof(struct lance_tx_desc, rt), type) | |
245 | ||
246 | #define tds_ptr(td, rt, type) \ | |
247 | ((volatile u16 *)((u8 *)(td) + tds_off(rt, type))) | |
1da177e4 LT |
248 | |
249 | struct lance_private { | |
250 | struct net_device *next; | |
251 | int type; | |
1da177e4 LT |
252 | int dma_irq; |
253 | volatile struct lance_regs *ll; | |
1da177e4 LT |
254 | |
255 | spinlock_t lock; | |
256 | ||
257 | int rx_new, tx_new; | |
258 | int rx_old, tx_old; | |
259 | ||
1da177e4 LT |
260 | unsigned short busmaster_regval; |
261 | ||
262 | struct timer_list multicast_timer; | |
263 | ||
264 | /* Pointers to the ring buffers as seen from the CPU */ | |
265 | char *rx_buf_ptr_cpu[RX_RING_SIZE]; | |
266 | char *tx_buf_ptr_cpu[TX_RING_SIZE]; | |
267 | ||
268 | /* Pointers to the ring buffers as seen from the LANCE */ | |
3b6e8fe7 MR |
269 | uint rx_buf_ptr_lnc[RX_RING_SIZE]; |
270 | uint tx_buf_ptr_lnc[TX_RING_SIZE]; | |
1da177e4 LT |
271 | }; |
272 | ||
273 | #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ | |
274 | lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ | |
275 | lp->tx_old - lp->tx_new-1) | |
276 | ||
277 | /* The lance control ports are at an absolute address, machine and tc-slot | |
278 | * dependent. | |
279 | * DECstations do only 32-bit access and the LANCE uses 16 bit addresses, | |
280 | * so we have to give the structure an extra member making rap pointing | |
281 | * at the right address | |
282 | */ | |
283 | struct lance_regs { | |
284 | volatile unsigned short rdp; /* register data port */ | |
285 | unsigned short pad; | |
286 | volatile unsigned short rap; /* register address port */ | |
287 | }; | |
288 | ||
289 | int dec_lance_debug = 2; | |
290 | ||
257b346d | 291 | static struct tc_driver dec_lance_tc_driver; |
1da177e4 LT |
292 | static struct net_device *root_lance_dev; |
293 | ||
294 | static inline void writereg(volatile unsigned short *regptr, short value) | |
295 | { | |
296 | *regptr = value; | |
297 | iob(); | |
298 | } | |
299 | ||
300 | /* Load the CSR registers */ | |
301 | static void load_csrs(struct lance_private *lp) | |
302 | { | |
303 | volatile struct lance_regs *ll = lp->ll; | |
3b6e8fe7 | 304 | uint leptr; |
1da177e4 LT |
305 | |
306 | /* The address space as seen from the LANCE | |
307 | * begins at address 0. HK | |
308 | */ | |
309 | leptr = 0; | |
310 | ||
311 | writereg(&ll->rap, LE_CSR1); | |
312 | writereg(&ll->rdp, (leptr & 0xFFFF)); | |
313 | writereg(&ll->rap, LE_CSR2); | |
314 | writereg(&ll->rdp, leptr >> 16); | |
315 | writereg(&ll->rap, LE_CSR3); | |
316 | writereg(&ll->rdp, lp->busmaster_regval); | |
317 | ||
318 | /* Point back to csr0 */ | |
319 | writereg(&ll->rap, LE_CSR0); | |
320 | } | |
321 | ||
322 | /* | |
323 | * Our specialized copy routines | |
324 | * | |
325 | */ | |
3b6e8fe7 | 326 | static void cp_to_buf(const int type, void *to, const void *from, int len) |
1da177e4 | 327 | { |
43d620c8 JP |
328 | unsigned short *tp; |
329 | const unsigned short *fp; | |
330 | unsigned short clen; | |
331 | unsigned char *rtp; | |
332 | const unsigned char *rfp; | |
1da177e4 | 333 | |
3b6e8fe7 MR |
334 | if (type == PMAD_LANCE) { |
335 | memcpy(to, from, len); | |
336 | } else if (type == PMAX_LANCE) { | |
1da177e4 | 337 | clen = len >> 1; |
43d620c8 JP |
338 | tp = to; |
339 | fp = from; | |
1da177e4 LT |
340 | |
341 | while (clen--) { | |
342 | *tp++ = *fp++; | |
343 | tp++; | |
344 | } | |
345 | ||
346 | clen = len & 1; | |
43d620c8 JP |
347 | rtp = tp; |
348 | rfp = fp; | |
1da177e4 LT |
349 | while (clen--) { |
350 | *rtp++ = *rfp++; | |
351 | } | |
352 | } else { | |
353 | /* | |
354 | * copy 16 Byte chunks | |
355 | */ | |
356 | clen = len >> 4; | |
43d620c8 JP |
357 | tp = to; |
358 | fp = from; | |
1da177e4 LT |
359 | while (clen--) { |
360 | *tp++ = *fp++; | |
361 | *tp++ = *fp++; | |
362 | *tp++ = *fp++; | |
363 | *tp++ = *fp++; | |
364 | *tp++ = *fp++; | |
365 | *tp++ = *fp++; | |
366 | *tp++ = *fp++; | |
367 | *tp++ = *fp++; | |
368 | tp += 8; | |
369 | } | |
370 | ||
371 | /* | |
372 | * do the rest, if any. | |
373 | */ | |
374 | clen = len & 15; | |
375 | rtp = (unsigned char *) tp; | |
376 | rfp = (unsigned char *) fp; | |
377 | while (clen--) { | |
378 | *rtp++ = *rfp++; | |
379 | } | |
380 | } | |
381 | ||
382 | iob(); | |
383 | } | |
384 | ||
3b6e8fe7 | 385 | static void cp_from_buf(const int type, void *to, const void *from, int len) |
1da177e4 | 386 | { |
43d620c8 JP |
387 | unsigned short *tp; |
388 | const unsigned short *fp; | |
389 | unsigned short clen; | |
390 | unsigned char *rtp; | |
391 | const unsigned char *rfp; | |
1da177e4 | 392 | |
3b6e8fe7 MR |
393 | if (type == PMAD_LANCE) { |
394 | memcpy(to, from, len); | |
395 | } else if (type == PMAX_LANCE) { | |
1da177e4 | 396 | clen = len >> 1; |
43d620c8 JP |
397 | tp = to; |
398 | fp = from; | |
1da177e4 LT |
399 | while (clen--) { |
400 | *tp++ = *fp++; | |
401 | fp++; | |
402 | } | |
403 | ||
404 | clen = len & 1; | |
405 | ||
43d620c8 JP |
406 | rtp = tp; |
407 | rfp = fp; | |
1da177e4 LT |
408 | |
409 | while (clen--) { | |
410 | *rtp++ = *rfp++; | |
411 | } | |
412 | } else { | |
413 | ||
414 | /* | |
415 | * copy 16 Byte chunks | |
416 | */ | |
417 | clen = len >> 4; | |
43d620c8 JP |
418 | tp = to; |
419 | fp = from; | |
1da177e4 LT |
420 | while (clen--) { |
421 | *tp++ = *fp++; | |
422 | *tp++ = *fp++; | |
423 | *tp++ = *fp++; | |
424 | *tp++ = *fp++; | |
425 | *tp++ = *fp++; | |
426 | *tp++ = *fp++; | |
427 | *tp++ = *fp++; | |
428 | *tp++ = *fp++; | |
429 | fp += 8; | |
430 | } | |
431 | ||
432 | /* | |
433 | * do the rest, if any. | |
434 | */ | |
435 | clen = len & 15; | |
436 | rtp = (unsigned char *) tp; | |
437 | rfp = (unsigned char *) fp; | |
438 | while (clen--) { | |
439 | *rtp++ = *rfp++; | |
440 | } | |
441 | ||
442 | ||
443 | } | |
444 | ||
445 | } | |
446 | ||
447 | /* Setup the Lance Rx and Tx rings */ | |
448 | static void lance_init_ring(struct net_device *dev) | |
449 | { | |
450 | struct lance_private *lp = netdev_priv(dev); | |
3b6e8fe7 MR |
451 | volatile u16 *ib = (volatile u16 *)dev->mem_start; |
452 | uint leptr; | |
1da177e4 LT |
453 | int i; |
454 | ||
1da177e4 LT |
455 | /* Lock out other processes while setting up hardware */ |
456 | netif_stop_queue(dev); | |
457 | lp->rx_new = lp->tx_new = 0; | |
458 | lp->rx_old = lp->tx_old = 0; | |
459 | ||
460 | /* Copy the ethernet address to the lance init block. | |
461 | * XXX bit 0 of the physical address registers has to be zero | |
462 | */ | |
3b6e8fe7 MR |
463 | *lib_ptr(ib, phys_addr[0], lp->type) = (dev->dev_addr[1] << 8) | |
464 | dev->dev_addr[0]; | |
465 | *lib_ptr(ib, phys_addr[1], lp->type) = (dev->dev_addr[3] << 8) | | |
466 | dev->dev_addr[2]; | |
467 | *lib_ptr(ib, phys_addr[2], lp->type) = (dev->dev_addr[5] << 8) | | |
468 | dev->dev_addr[4]; | |
1da177e4 LT |
469 | /* Setup the initialization block */ |
470 | ||
471 | /* Setup rx descriptor pointer */ | |
3b6e8fe7 MR |
472 | leptr = offsetof(struct lance_init_block, brx_ring); |
473 | *lib_ptr(ib, rx_len, lp->type) = (LANCE_LOG_RX_BUFFERS << 13) | | |
474 | (leptr >> 16); | |
475 | *lib_ptr(ib, rx_ptr, lp->type) = leptr; | |
1da177e4 | 476 | if (ZERO) |
3b6e8fe7 MR |
477 | printk("RX ptr: %8.8x(%8.8x)\n", |
478 | leptr, lib_off(brx_ring, lp->type)); | |
1da177e4 LT |
479 | |
480 | /* Setup tx descriptor pointer */ | |
3b6e8fe7 MR |
481 | leptr = offsetof(struct lance_init_block, btx_ring); |
482 | *lib_ptr(ib, tx_len, lp->type) = (LANCE_LOG_TX_BUFFERS << 13) | | |
483 | (leptr >> 16); | |
484 | *lib_ptr(ib, tx_ptr, lp->type) = leptr; | |
1da177e4 | 485 | if (ZERO) |
3b6e8fe7 MR |
486 | printk("TX ptr: %8.8x(%8.8x)\n", |
487 | leptr, lib_off(btx_ring, lp->type)); | |
1da177e4 LT |
488 | |
489 | if (ZERO) | |
490 | printk("TX rings:\n"); | |
491 | ||
492 | /* Setup the Tx ring entries */ | |
493 | for (i = 0; i < TX_RING_SIZE; i++) { | |
3b6e8fe7 MR |
494 | leptr = lp->tx_buf_ptr_lnc[i]; |
495 | *lib_ptr(ib, btx_ring[i].tmd0, lp->type) = leptr; | |
496 | *lib_ptr(ib, btx_ring[i].tmd1, lp->type) = (leptr >> 16) & | |
497 | 0xff; | |
498 | *lib_ptr(ib, btx_ring[i].length, lp->type) = 0xf000; | |
499 | /* The ones required by tmd2 */ | |
500 | *lib_ptr(ib, btx_ring[i].misc, lp->type) = 0; | |
1da177e4 | 501 | if (i < 3 && ZERO) |
3b6e8fe7 MR |
502 | printk("%d: 0x%8.8x(0x%8.8x)\n", |
503 | i, leptr, (uint)lp->tx_buf_ptr_cpu[i]); | |
1da177e4 LT |
504 | } |
505 | ||
506 | /* Setup the Rx ring entries */ | |
507 | if (ZERO) | |
508 | printk("RX rings:\n"); | |
509 | for (i = 0; i < RX_RING_SIZE; i++) { | |
3b6e8fe7 MR |
510 | leptr = lp->rx_buf_ptr_lnc[i]; |
511 | *lib_ptr(ib, brx_ring[i].rmd0, lp->type) = leptr; | |
512 | *lib_ptr(ib, brx_ring[i].rmd1, lp->type) = ((leptr >> 16) & | |
513 | 0xff) | | |
514 | LE_R1_OWN; | |
515 | *lib_ptr(ib, brx_ring[i].length, lp->type) = -RX_BUFF_SIZE | | |
516 | 0xf000; | |
517 | *lib_ptr(ib, brx_ring[i].mblength, lp->type) = 0; | |
1da177e4 | 518 | if (i < 3 && ZERO) |
3b6e8fe7 MR |
519 | printk("%d: 0x%8.8x(0x%8.8x)\n", |
520 | i, leptr, (uint)lp->rx_buf_ptr_cpu[i]); | |
1da177e4 LT |
521 | } |
522 | iob(); | |
523 | } | |
524 | ||
525 | static int init_restart_lance(struct lance_private *lp) | |
526 | { | |
527 | volatile struct lance_regs *ll = lp->ll; | |
528 | int i; | |
529 | ||
530 | writereg(&ll->rap, LE_CSR0); | |
531 | writereg(&ll->rdp, LE_C0_INIT); | |
532 | ||
533 | /* Wait for the lance to complete initialization */ | |
534 | for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) { | |
535 | udelay(10); | |
536 | } | |
537 | if ((i == 100) || (ll->rdp & LE_C0_ERR)) { | |
3b6e8fe7 MR |
538 | printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", |
539 | i, ll->rdp); | |
1da177e4 LT |
540 | return -1; |
541 | } | |
542 | if ((ll->rdp & LE_C0_ERR)) { | |
3b6e8fe7 MR |
543 | printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", |
544 | i, ll->rdp); | |
1da177e4 LT |
545 | return -1; |
546 | } | |
547 | writereg(&ll->rdp, LE_C0_IDON); | |
548 | writereg(&ll->rdp, LE_C0_STRT); | |
549 | writereg(&ll->rdp, LE_C0_INEA); | |
550 | ||
551 | return 0; | |
552 | } | |
553 | ||
554 | static int lance_rx(struct net_device *dev) | |
555 | { | |
556 | struct lance_private *lp = netdev_priv(dev); | |
3b6e8fe7 MR |
557 | volatile u16 *ib = (volatile u16 *)dev->mem_start; |
558 | volatile u16 *rd; | |
559 | unsigned short bits; | |
560 | int entry, len; | |
561 | struct sk_buff *skb; | |
1da177e4 LT |
562 | |
563 | #ifdef TEST_HITS | |
564 | { | |
565 | int i; | |
566 | ||
567 | printk("["); | |
568 | for (i = 0; i < RX_RING_SIZE; i++) { | |
569 | if (i == lp->rx_new) | |
3b6e8fe7 MR |
570 | printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, |
571 | lp->type) & | |
1da177e4 LT |
572 | LE_R1_OWN ? "_" : "X"); |
573 | else | |
3b6e8fe7 MR |
574 | printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, |
575 | lp->type) & | |
1da177e4 LT |
576 | LE_R1_OWN ? "." : "1"); |
577 | } | |
578 | printk("]"); | |
579 | } | |
580 | #endif | |
581 | ||
3b6e8fe7 MR |
582 | for (rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type); |
583 | !((bits = *rds_ptr(rd, rmd1, lp->type)) & LE_R1_OWN); | |
584 | rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type)) { | |
585 | entry = lp->rx_new; | |
1da177e4 LT |
586 | |
587 | /* We got an incomplete frame? */ | |
588 | if ((bits & LE_R1_POK) != LE_R1_POK) { | |
09f75cd7 JG |
589 | dev->stats.rx_over_errors++; |
590 | dev->stats.rx_errors++; | |
1da177e4 LT |
591 | } else if (bits & LE_R1_ERR) { |
592 | /* Count only the end frame as a rx error, | |
593 | * not the beginning | |
594 | */ | |
595 | if (bits & LE_R1_BUF) | |
09f75cd7 | 596 | dev->stats.rx_fifo_errors++; |
1da177e4 | 597 | if (bits & LE_R1_CRC) |
09f75cd7 | 598 | dev->stats.rx_crc_errors++; |
1da177e4 | 599 | if (bits & LE_R1_OFL) |
09f75cd7 | 600 | dev->stats.rx_over_errors++; |
1da177e4 | 601 | if (bits & LE_R1_FRA) |
09f75cd7 | 602 | dev->stats.rx_frame_errors++; |
1da177e4 | 603 | if (bits & LE_R1_EOP) |
09f75cd7 | 604 | dev->stats.rx_errors++; |
1da177e4 | 605 | } else { |
3b6e8fe7 | 606 | len = (*rds_ptr(rd, mblength, lp->type) & 0xfff) - 4; |
1d266430 | 607 | skb = netdev_alloc_skb(dev, len + 2); |
1da177e4 LT |
608 | |
609 | if (skb == 0) { | |
09f75cd7 | 610 | dev->stats.rx_dropped++; |
3b6e8fe7 MR |
611 | *rds_ptr(rd, mblength, lp->type) = 0; |
612 | *rds_ptr(rd, rmd1, lp->type) = | |
613 | ((lp->rx_buf_ptr_lnc[entry] >> 16) & | |
614 | 0xff) | LE_R1_OWN; | |
615 | lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; | |
1da177e4 LT |
616 | return 0; |
617 | } | |
09f75cd7 | 618 | dev->stats.rx_bytes += len; |
1da177e4 | 619 | |
1da177e4 LT |
620 | skb_reserve(skb, 2); /* 16 byte align */ |
621 | skb_put(skb, len); /* make room */ | |
622 | ||
623 | cp_from_buf(lp->type, skb->data, | |
64699336 | 624 | lp->rx_buf_ptr_cpu[entry], len); |
1da177e4 LT |
625 | |
626 | skb->protocol = eth_type_trans(skb, dev); | |
627 | netif_rx(skb); | |
09f75cd7 | 628 | dev->stats.rx_packets++; |
1da177e4 LT |
629 | } |
630 | ||
631 | /* Return the packet to the pool */ | |
3b6e8fe7 MR |
632 | *rds_ptr(rd, mblength, lp->type) = 0; |
633 | *rds_ptr(rd, length, lp->type) = -RX_BUFF_SIZE | 0xf000; | |
634 | *rds_ptr(rd, rmd1, lp->type) = | |
635 | ((lp->rx_buf_ptr_lnc[entry] >> 16) & 0xff) | LE_R1_OWN; | |
636 | lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; | |
1da177e4 LT |
637 | } |
638 | return 0; | |
639 | } | |
640 | ||
641 | static void lance_tx(struct net_device *dev) | |
642 | { | |
643 | struct lance_private *lp = netdev_priv(dev); | |
3b6e8fe7 | 644 | volatile u16 *ib = (volatile u16 *)dev->mem_start; |
1da177e4 | 645 | volatile struct lance_regs *ll = lp->ll; |
3b6e8fe7 | 646 | volatile u16 *td; |
1da177e4 LT |
647 | int i, j; |
648 | int status; | |
3b6e8fe7 | 649 | |
1da177e4 LT |
650 | j = lp->tx_old; |
651 | ||
652 | spin_lock(&lp->lock); | |
653 | ||
654 | for (i = j; i != lp->tx_new; i = j) { | |
3b6e8fe7 | 655 | td = lib_ptr(ib, btx_ring[i], lp->type); |
1da177e4 | 656 | /* If we hit a packet not owned by us, stop */ |
3b6e8fe7 | 657 | if (*tds_ptr(td, tmd1, lp->type) & LE_T1_OWN) |
1da177e4 LT |
658 | break; |
659 | ||
3b6e8fe7 MR |
660 | if (*tds_ptr(td, tmd1, lp->type) & LE_T1_ERR) { |
661 | status = *tds_ptr(td, misc, lp->type); | |
1da177e4 | 662 | |
09f75cd7 | 663 | dev->stats.tx_errors++; |
1da177e4 | 664 | if (status & LE_T3_RTY) |
09f75cd7 | 665 | dev->stats.tx_aborted_errors++; |
1da177e4 | 666 | if (status & LE_T3_LCOL) |
09f75cd7 | 667 | dev->stats.tx_window_errors++; |
1da177e4 LT |
668 | |
669 | if (status & LE_T3_CLOS) { | |
09f75cd7 | 670 | dev->stats.tx_carrier_errors++; |
1da177e4 LT |
671 | printk("%s: Carrier Lost\n", dev->name); |
672 | /* Stop the lance */ | |
673 | writereg(&ll->rap, LE_CSR0); | |
674 | writereg(&ll->rdp, LE_C0_STOP); | |
675 | lance_init_ring(dev); | |
676 | load_csrs(lp); | |
677 | init_restart_lance(lp); | |
678 | goto out; | |
679 | } | |
680 | /* Buffer errors and underflows turn off the | |
681 | * transmitter, restart the adapter. | |
682 | */ | |
683 | if (status & (LE_T3_BUF | LE_T3_UFL)) { | |
09f75cd7 | 684 | dev->stats.tx_fifo_errors++; |
1da177e4 LT |
685 | |
686 | printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n", | |
687 | dev->name); | |
688 | /* Stop the lance */ | |
689 | writereg(&ll->rap, LE_CSR0); | |
690 | writereg(&ll->rdp, LE_C0_STOP); | |
691 | lance_init_ring(dev); | |
692 | load_csrs(lp); | |
693 | init_restart_lance(lp); | |
694 | goto out; | |
695 | } | |
3b6e8fe7 MR |
696 | } else if ((*tds_ptr(td, tmd1, lp->type) & LE_T1_POK) == |
697 | LE_T1_POK) { | |
1da177e4 LT |
698 | /* |
699 | * So we don't count the packet more than once. | |
700 | */ | |
3b6e8fe7 | 701 | *tds_ptr(td, tmd1, lp->type) &= ~(LE_T1_POK); |
1da177e4 LT |
702 | |
703 | /* One collision before packet was sent. */ | |
3b6e8fe7 | 704 | if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EONE) |
09f75cd7 | 705 | dev->stats.collisions++; |
1da177e4 LT |
706 | |
707 | /* More than one collision, be optimistic. */ | |
3b6e8fe7 | 708 | if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EMORE) |
09f75cd7 | 709 | dev->stats.collisions += 2; |
1da177e4 | 710 | |
09f75cd7 | 711 | dev->stats.tx_packets++; |
1da177e4 LT |
712 | } |
713 | j = (j + 1) & TX_RING_MOD_MASK; | |
714 | } | |
715 | lp->tx_old = j; | |
716 | out: | |
717 | if (netif_queue_stopped(dev) && | |
718 | TX_BUFFS_AVAIL > 0) | |
719 | netif_wake_queue(dev); | |
720 | ||
721 | spin_unlock(&lp->lock); | |
722 | } | |
723 | ||
28fc1f5a | 724 | static irqreturn_t lance_dma_merr_int(int irq, void *dev_id) |
1da177e4 | 725 | { |
c31f28e7 | 726 | struct net_device *dev = dev_id; |
1da177e4 | 727 | |
5359b938 | 728 | clear_ioasic_dma_irq(irq); |
28fc1f5a | 729 | printk(KERN_ERR "%s: DMA error\n", dev->name); |
da848ec3 | 730 | return IRQ_HANDLED; |
1da177e4 LT |
731 | } |
732 | ||
28fc1f5a | 733 | static irqreturn_t lance_interrupt(int irq, void *dev_id) |
1da177e4 | 734 | { |
c31f28e7 | 735 | struct net_device *dev = dev_id; |
1da177e4 LT |
736 | struct lance_private *lp = netdev_priv(dev); |
737 | volatile struct lance_regs *ll = lp->ll; | |
738 | int csr0; | |
739 | ||
740 | writereg(&ll->rap, LE_CSR0); | |
741 | csr0 = ll->rdp; | |
742 | ||
743 | /* Acknowledge all the interrupt sources ASAP */ | |
744 | writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT)); | |
745 | ||
746 | if ((csr0 & LE_C0_ERR)) { | |
747 | /* Clear the error condition */ | |
748 | writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | | |
749 | LE_C0_CERR | LE_C0_MERR); | |
750 | } | |
751 | if (csr0 & LE_C0_RINT) | |
752 | lance_rx(dev); | |
753 | ||
754 | if (csr0 & LE_C0_TINT) | |
755 | lance_tx(dev); | |
756 | ||
757 | if (csr0 & LE_C0_BABL) | |
09f75cd7 | 758 | dev->stats.tx_errors++; |
1da177e4 LT |
759 | |
760 | if (csr0 & LE_C0_MISS) | |
09f75cd7 | 761 | dev->stats.rx_errors++; |
1da177e4 LT |
762 | |
763 | if (csr0 & LE_C0_MERR) { | |
764 | printk("%s: Memory error, status %04x\n", dev->name, csr0); | |
765 | ||
766 | writereg(&ll->rdp, LE_C0_STOP); | |
767 | ||
768 | lance_init_ring(dev); | |
769 | load_csrs(lp); | |
770 | init_restart_lance(lp); | |
771 | netif_wake_queue(dev); | |
772 | } | |
773 | ||
774 | writereg(&ll->rdp, LE_C0_INEA); | |
775 | writereg(&ll->rdp, LE_C0_INEA); | |
776 | return IRQ_HANDLED; | |
777 | } | |
778 | ||
1da177e4 LT |
779 | static int lance_open(struct net_device *dev) |
780 | { | |
3b6e8fe7 | 781 | volatile u16 *ib = (volatile u16 *)dev->mem_start; |
1da177e4 LT |
782 | struct lance_private *lp = netdev_priv(dev); |
783 | volatile struct lance_regs *ll = lp->ll; | |
784 | int status = 0; | |
785 | ||
1da177e4 LT |
786 | /* Stop the Lance */ |
787 | writereg(&ll->rap, LE_CSR0); | |
788 | writereg(&ll->rdp, LE_C0_STOP); | |
789 | ||
790 | /* Set mode and clear multicast filter only at device open, | |
791 | * so that lance_init_ring() called at any error will not | |
792 | * forget multicast filters. | |
793 | * | |
794 | * BTW it is common bug in all lance drivers! --ANK | |
795 | */ | |
3b6e8fe7 MR |
796 | *lib_ptr(ib, mode, lp->type) = 0; |
797 | *lib_ptr(ib, filter[0], lp->type) = 0; | |
798 | *lib_ptr(ib, filter[1], lp->type) = 0; | |
799 | *lib_ptr(ib, filter[2], lp->type) = 0; | |
800 | *lib_ptr(ib, filter[3], lp->type) = 0; | |
1da177e4 LT |
801 | |
802 | lance_init_ring(dev); | |
803 | load_csrs(lp); | |
804 | ||
805 | netif_start_queue(dev); | |
806 | ||
807 | /* Associate IRQ with lance_interrupt */ | |
a0607fd3 | 808 | if (request_irq(dev->irq, lance_interrupt, 0, "lance", dev)) { |
1da177e4 LT |
809 | printk("%s: Can't get IRQ %d\n", dev->name, dev->irq); |
810 | return -EAGAIN; | |
811 | } | |
812 | if (lp->dma_irq >= 0) { | |
813 | unsigned long flags; | |
814 | ||
a0607fd3 | 815 | if (request_irq(lp->dma_irq, lance_dma_merr_int, 0, |
1da177e4 LT |
816 | "lance error", dev)) { |
817 | free_irq(dev->irq, dev); | |
818 | printk("%s: Can't get DMA IRQ %d\n", dev->name, | |
819 | lp->dma_irq); | |
820 | return -EAGAIN; | |
821 | } | |
822 | ||
823 | spin_lock_irqsave(&ioasic_ssr_lock, flags); | |
824 | ||
825 | fast_mb(); | |
826 | /* Enable I/O ASIC LANCE DMA. */ | |
827 | ioasic_write(IO_REG_SSR, | |
828 | ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN); | |
829 | ||
830 | fast_mb(); | |
831 | spin_unlock_irqrestore(&ioasic_ssr_lock, flags); | |
832 | } | |
833 | ||
834 | status = init_restart_lance(lp); | |
835 | return status; | |
836 | } | |
837 | ||
838 | static int lance_close(struct net_device *dev) | |
839 | { | |
840 | struct lance_private *lp = netdev_priv(dev); | |
841 | volatile struct lance_regs *ll = lp->ll; | |
842 | ||
843 | netif_stop_queue(dev); | |
844 | del_timer_sync(&lp->multicast_timer); | |
845 | ||
846 | /* Stop the card */ | |
847 | writereg(&ll->rap, LE_CSR0); | |
848 | writereg(&ll->rdp, LE_C0_STOP); | |
849 | ||
850 | if (lp->dma_irq >= 0) { | |
851 | unsigned long flags; | |
852 | ||
853 | spin_lock_irqsave(&ioasic_ssr_lock, flags); | |
854 | ||
855 | fast_mb(); | |
856 | /* Disable I/O ASIC LANCE DMA. */ | |
857 | ioasic_write(IO_REG_SSR, | |
858 | ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN); | |
859 | ||
860 | fast_iob(); | |
861 | spin_unlock_irqrestore(&ioasic_ssr_lock, flags); | |
862 | ||
863 | free_irq(lp->dma_irq, dev); | |
864 | } | |
865 | free_irq(dev->irq, dev); | |
866 | return 0; | |
867 | } | |
868 | ||
869 | static inline int lance_reset(struct net_device *dev) | |
870 | { | |
871 | struct lance_private *lp = netdev_priv(dev); | |
872 | volatile struct lance_regs *ll = lp->ll; | |
873 | int status; | |
874 | ||
875 | /* Stop the lance */ | |
876 | writereg(&ll->rap, LE_CSR0); | |
877 | writereg(&ll->rdp, LE_C0_STOP); | |
878 | ||
879 | lance_init_ring(dev); | |
880 | load_csrs(lp); | |
1ae5dc34 | 881 | dev->trans_start = jiffies; /* prevent tx timeout */ |
1da177e4 LT |
882 | status = init_restart_lance(lp); |
883 | return status; | |
884 | } | |
885 | ||
886 | static void lance_tx_timeout(struct net_device *dev) | |
887 | { | |
888 | struct lance_private *lp = netdev_priv(dev); | |
889 | volatile struct lance_regs *ll = lp->ll; | |
890 | ||
891 | printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n", | |
892 | dev->name, ll->rdp); | |
893 | lance_reset(dev); | |
894 | netif_wake_queue(dev); | |
895 | } | |
896 | ||
897 | static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
898 | { | |
899 | struct lance_private *lp = netdev_priv(dev); | |
900 | volatile struct lance_regs *ll = lp->ll; | |
3b6e8fe7 | 901 | volatile u16 *ib = (volatile u16 *)dev->mem_start; |
963267bc | 902 | unsigned long flags; |
3b6e8fe7 | 903 | int entry, len; |
1da177e4 | 904 | |
3b6e8fe7 | 905 | len = skb->len; |
6aa20a22 | 906 | |
1da177e4 | 907 | if (len < ETH_ZLEN) { |
5b057c6b | 908 | if (skb_padto(skb, ETH_ZLEN)) |
6ed10654 | 909 | return NETDEV_TX_OK; |
1da177e4 LT |
910 | len = ETH_ZLEN; |
911 | } | |
912 | ||
09f75cd7 | 913 | dev->stats.tx_bytes += len; |
1da177e4 | 914 | |
963267bc MR |
915 | spin_lock_irqsave(&lp->lock, flags); |
916 | ||
3b6e8fe7 MR |
917 | entry = lp->tx_new; |
918 | *lib_ptr(ib, btx_ring[entry].length, lp->type) = (-len); | |
919 | *lib_ptr(ib, btx_ring[entry].misc, lp->type) = 0; | |
1da177e4 | 920 | |
64699336 | 921 | cp_to_buf(lp->type, lp->tx_buf_ptr_cpu[entry], skb->data, len); |
1da177e4 LT |
922 | |
923 | /* Now, give the packet to the lance */ | |
3b6e8fe7 MR |
924 | *lib_ptr(ib, btx_ring[entry].tmd1, lp->type) = |
925 | ((lp->tx_buf_ptr_lnc[entry] >> 16) & 0xff) | | |
926 | (LE_T1_POK | LE_T1_OWN); | |
927 | lp->tx_new = (entry + 1) & TX_RING_MOD_MASK; | |
1da177e4 LT |
928 | |
929 | if (TX_BUFFS_AVAIL <= 0) | |
930 | netif_stop_queue(dev); | |
931 | ||
932 | /* Kick the lance: transmit now */ | |
933 | writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD); | |
934 | ||
963267bc MR |
935 | spin_unlock_irqrestore(&lp->lock, flags); |
936 | ||
1da177e4 LT |
937 | dev_kfree_skb(skb); |
938 | ||
6ed10654 | 939 | return NETDEV_TX_OK; |
1da177e4 LT |
940 | } |
941 | ||
1da177e4 LT |
942 | static void lance_load_multicast(struct net_device *dev) |
943 | { | |
3b6e8fe7 MR |
944 | struct lance_private *lp = netdev_priv(dev); |
945 | volatile u16 *ib = (volatile u16 *)dev->mem_start; | |
22bedad3 | 946 | struct netdev_hw_addr *ha; |
1da177e4 LT |
947 | u32 crc; |
948 | ||
949 | /* set all multicast bits */ | |
950 | if (dev->flags & IFF_ALLMULTI) { | |
3b6e8fe7 MR |
951 | *lib_ptr(ib, filter[0], lp->type) = 0xffff; |
952 | *lib_ptr(ib, filter[1], lp->type) = 0xffff; | |
953 | *lib_ptr(ib, filter[2], lp->type) = 0xffff; | |
954 | *lib_ptr(ib, filter[3], lp->type) = 0xffff; | |
1da177e4 LT |
955 | return; |
956 | } | |
957 | /* clear the multicast filter */ | |
3b6e8fe7 MR |
958 | *lib_ptr(ib, filter[0], lp->type) = 0; |
959 | *lib_ptr(ib, filter[1], lp->type) = 0; | |
960 | *lib_ptr(ib, filter[2], lp->type) = 0; | |
961 | *lib_ptr(ib, filter[3], lp->type) = 0; | |
1da177e4 LT |
962 | |
963 | /* Add addresses */ | |
22bedad3 | 964 | netdev_for_each_mc_addr(ha, dev) { |
498d8e23 | 965 | crc = ether_crc_le(ETH_ALEN, ha->addr); |
1da177e4 | 966 | crc = crc >> 26; |
3b6e8fe7 | 967 | *lib_ptr(ib, filter[crc >> 4], lp->type) |= 1 << (crc & 0xf); |
1da177e4 | 968 | } |
1da177e4 LT |
969 | } |
970 | ||
971 | static void lance_set_multicast(struct net_device *dev) | |
972 | { | |
973 | struct lance_private *lp = netdev_priv(dev); | |
3b6e8fe7 | 974 | volatile u16 *ib = (volatile u16 *)dev->mem_start; |
1da177e4 LT |
975 | volatile struct lance_regs *ll = lp->ll; |
976 | ||
1da177e4 LT |
977 | if (!netif_running(dev)) |
978 | return; | |
979 | ||
980 | if (lp->tx_old != lp->tx_new) { | |
981 | mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100); | |
982 | netif_wake_queue(dev); | |
983 | return; | |
984 | } | |
985 | ||
986 | netif_stop_queue(dev); | |
987 | ||
988 | writereg(&ll->rap, LE_CSR0); | |
989 | writereg(&ll->rdp, LE_C0_STOP); | |
990 | ||
991 | lance_init_ring(dev); | |
992 | ||
993 | if (dev->flags & IFF_PROMISC) { | |
3b6e8fe7 | 994 | *lib_ptr(ib, mode, lp->type) |= LE_MO_PROM; |
1da177e4 | 995 | } else { |
3b6e8fe7 | 996 | *lib_ptr(ib, mode, lp->type) &= ~LE_MO_PROM; |
1da177e4 LT |
997 | lance_load_multicast(dev); |
998 | } | |
999 | load_csrs(lp); | |
1000 | init_restart_lance(lp); | |
1001 | netif_wake_queue(dev); | |
1002 | } | |
1003 | ||
1004 | static void lance_set_multicast_retry(unsigned long _opaque) | |
1005 | { | |
1006 | struct net_device *dev = (struct net_device *) _opaque; | |
1007 | ||
1008 | lance_set_multicast(dev); | |
1009 | } | |
1010 | ||
ad5a24e0 AB |
1011 | static const struct net_device_ops lance_netdev_ops = { |
1012 | .ndo_open = lance_open, | |
1013 | .ndo_stop = lance_close, | |
1014 | .ndo_start_xmit = lance_start_xmit, | |
1015 | .ndo_tx_timeout = lance_tx_timeout, | |
afc4b13d | 1016 | .ndo_set_rx_mode = lance_set_multicast, |
ad5a24e0 AB |
1017 | .ndo_change_mtu = eth_change_mtu, |
1018 | .ndo_validate_addr = eth_validate_addr, | |
1019 | .ndo_set_mac_address = eth_mac_addr, | |
1020 | }; | |
1021 | ||
0cb0568d | 1022 | static int dec_lance_probe(struct device *bdev, const int type) |
1da177e4 LT |
1023 | { |
1024 | static unsigned version_printed; | |
1025 | static const char fmt[] = "declance%d"; | |
1026 | char name[10]; | |
1027 | struct net_device *dev; | |
1028 | struct lance_private *lp; | |
1029 | volatile struct lance_regs *ll; | |
257b346d | 1030 | resource_size_t start = 0, len = 0; |
1da177e4 LT |
1031 | int i, ret; |
1032 | unsigned long esar_base; | |
1033 | unsigned char *esar; | |
1034 | ||
1da177e4 LT |
1035 | if (dec_lance_debug && version_printed++ == 0) |
1036 | printk(version); | |
1037 | ||
257b346d | 1038 | if (bdev) |
c2313557 | 1039 | snprintf(name, sizeof(name), "%s", dev_name(bdev)); |
257b346d MR |
1040 | else { |
1041 | i = 0; | |
1042 | dev = root_lance_dev; | |
1043 | while (dev) { | |
1044 | i++; | |
4cf1653a | 1045 | lp = netdev_priv(dev); |
257b346d MR |
1046 | dev = lp->next; |
1047 | } | |
1048 | snprintf(name, sizeof(name), fmt, i); | |
1da177e4 | 1049 | } |
1da177e4 LT |
1050 | |
1051 | dev = alloc_etherdev(sizeof(struct lance_private)); | |
1052 | if (!dev) { | |
1da177e4 LT |
1053 | ret = -ENOMEM; |
1054 | goto err_out; | |
1055 | } | |
1056 | ||
1057 | /* | |
1058 | * alloc_etherdev ensures the data structures used by the LANCE | |
1059 | * are aligned. | |
1060 | */ | |
1061 | lp = netdev_priv(dev); | |
1062 | spin_lock_init(&lp->lock); | |
1063 | ||
1064 | lp->type = type; | |
1da177e4 | 1065 | switch (type) { |
1da177e4 | 1066 | case ASIC_LANCE: |
36156cdf | 1067 | dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE); |
1da177e4 LT |
1068 | |
1069 | /* buffer space for the on-board LANCE shared memory */ | |
1070 | /* | |
1071 | * FIXME: ugly hack! | |
1072 | */ | |
4569504a | 1073 | dev->mem_start = CKSEG1ADDR(0x00020000); |
1da177e4 LT |
1074 | dev->mem_end = dev->mem_start + 0x00020000; |
1075 | dev->irq = dec_interrupt[DEC_IRQ_LANCE]; | |
36156cdf | 1076 | esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR); |
1da177e4 LT |
1077 | |
1078 | /* Workaround crash with booting KN04 2.1k from Disk */ | |
1079 | memset((void *)dev->mem_start, 0, | |
1080 | dev->mem_end - dev->mem_start); | |
1081 | ||
1082 | /* | |
1083 | * setup the pointer arrays, this sucks [tm] :-( | |
1084 | */ | |
1085 | for (i = 0; i < RX_RING_SIZE; i++) { | |
1086 | lp->rx_buf_ptr_cpu[i] = | |
3b6e8fe7 | 1087 | (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + |
1da177e4 LT |
1088 | 2 * i * RX_BUFF_SIZE); |
1089 | lp->rx_buf_ptr_lnc[i] = | |
3b6e8fe7 | 1090 | (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); |
1da177e4 LT |
1091 | } |
1092 | for (i = 0; i < TX_RING_SIZE; i++) { | |
1093 | lp->tx_buf_ptr_cpu[i] = | |
3b6e8fe7 | 1094 | (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + |
1da177e4 LT |
1095 | 2 * RX_RING_SIZE * RX_BUFF_SIZE + |
1096 | 2 * i * TX_BUFF_SIZE); | |
1097 | lp->tx_buf_ptr_lnc[i] = | |
3b6e8fe7 MR |
1098 | (BUF_OFFSET_LNC + |
1099 | RX_RING_SIZE * RX_BUFF_SIZE + | |
1100 | i * TX_BUFF_SIZE); | |
1da177e4 LT |
1101 | } |
1102 | ||
1103 | /* Setup I/O ASIC LANCE DMA. */ | |
1104 | lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR]; | |
1105 | ioasic_write(IO_REG_LANCE_DMA_P, | |
6684b4e2 | 1106 | CPHYSADDR(dev->mem_start) << 3); |
1da177e4 LT |
1107 | |
1108 | break; | |
e8f7f7f1 | 1109 | #ifdef CONFIG_TC |
1da177e4 | 1110 | case PMAD_LANCE: |
257b346d MR |
1111 | dev_set_drvdata(bdev, dev); |
1112 | ||
1113 | start = to_tc_dev(bdev)->resource.start; | |
1114 | len = to_tc_dev(bdev)->resource.end - start + 1; | |
c2313557 | 1115 | if (!request_mem_region(start, len, dev_name(bdev))) { |
257b346d MR |
1116 | printk(KERN_ERR |
1117 | "%s: Unable to reserve MMIO resource\n", | |
c2313557 | 1118 | dev_name(bdev)); |
257b346d MR |
1119 | ret = -EBUSY; |
1120 | goto err_out_dev; | |
1121 | } | |
1da177e4 | 1122 | |
257b346d | 1123 | dev->mem_start = CKSEG1ADDR(start); |
3b6e8fe7 | 1124 | dev->mem_end = dev->mem_start + 0x100000; |
1da177e4 | 1125 | dev->base_addr = dev->mem_start + 0x100000; |
257b346d | 1126 | dev->irq = to_tc_dev(bdev)->interrupt; |
1da177e4 LT |
1127 | esar_base = dev->mem_start + 0x1c0002; |
1128 | lp->dma_irq = -1; | |
1129 | ||
1130 | for (i = 0; i < RX_RING_SIZE; i++) { | |
1131 | lp->rx_buf_ptr_cpu[i] = | |
1132 | (char *)(dev->mem_start + BUF_OFFSET_CPU + | |
1133 | i * RX_BUFF_SIZE); | |
1134 | lp->rx_buf_ptr_lnc[i] = | |
3b6e8fe7 | 1135 | (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); |
1da177e4 LT |
1136 | } |
1137 | for (i = 0; i < TX_RING_SIZE; i++) { | |
1138 | lp->tx_buf_ptr_cpu[i] = | |
1139 | (char *)(dev->mem_start + BUF_OFFSET_CPU + | |
1140 | RX_RING_SIZE * RX_BUFF_SIZE + | |
1141 | i * TX_BUFF_SIZE); | |
1142 | lp->tx_buf_ptr_lnc[i] = | |
3b6e8fe7 MR |
1143 | (BUF_OFFSET_LNC + |
1144 | RX_RING_SIZE * RX_BUFF_SIZE + | |
1145 | i * TX_BUFF_SIZE); | |
1da177e4 LT |
1146 | } |
1147 | ||
1148 | break; | |
1149 | #endif | |
1da177e4 LT |
1150 | case PMAX_LANCE: |
1151 | dev->irq = dec_interrupt[DEC_IRQ_LANCE]; | |
36156cdf RB |
1152 | dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE); |
1153 | dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM); | |
3b6e8fe7 | 1154 | dev->mem_end = dev->mem_start + KN01_SLOT_SIZE; |
36156cdf | 1155 | esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1); |
1da177e4 LT |
1156 | lp->dma_irq = -1; |
1157 | ||
1158 | /* | |
1159 | * setup the pointer arrays, this sucks [tm] :-( | |
1160 | */ | |
1161 | for (i = 0; i < RX_RING_SIZE; i++) { | |
1162 | lp->rx_buf_ptr_cpu[i] = | |
3b6e8fe7 | 1163 | (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + |
1da177e4 LT |
1164 | 2 * i * RX_BUFF_SIZE); |
1165 | lp->rx_buf_ptr_lnc[i] = | |
3b6e8fe7 | 1166 | (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); |
1da177e4 LT |
1167 | } |
1168 | for (i = 0; i < TX_RING_SIZE; i++) { | |
1169 | lp->tx_buf_ptr_cpu[i] = | |
3b6e8fe7 | 1170 | (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + |
1da177e4 LT |
1171 | 2 * RX_RING_SIZE * RX_BUFF_SIZE + |
1172 | 2 * i * TX_BUFF_SIZE); | |
1173 | lp->tx_buf_ptr_lnc[i] = | |
3b6e8fe7 MR |
1174 | (BUF_OFFSET_LNC + |
1175 | RX_RING_SIZE * RX_BUFF_SIZE + | |
1176 | i * TX_BUFF_SIZE); | |
1da177e4 LT |
1177 | } |
1178 | ||
1179 | break; | |
1180 | ||
1181 | default: | |
1182 | printk(KERN_ERR "%s: declance_init called with unknown type\n", | |
1183 | name); | |
1184 | ret = -ENODEV; | |
257b346d | 1185 | goto err_out_dev; |
1da177e4 LT |
1186 | } |
1187 | ||
1188 | ll = (struct lance_regs *) dev->base_addr; | |
1189 | esar = (unsigned char *) esar_base; | |
1190 | ||
1191 | /* prom checks */ | |
1192 | /* First, check for test pattern */ | |
1193 | if (esar[0x60] != 0xff && esar[0x64] != 0x00 && | |
1194 | esar[0x68] != 0x55 && esar[0x6c] != 0xaa) { | |
1195 | printk(KERN_ERR | |
1196 | "%s: Ethernet station address prom not found!\n", | |
1197 | name); | |
1198 | ret = -ENODEV; | |
257b346d | 1199 | goto err_out_resource; |
1da177e4 LT |
1200 | } |
1201 | /* Check the prom contents */ | |
1202 | for (i = 0; i < 8; i++) { | |
1203 | if (esar[i * 4] != esar[0x3c - i * 4] && | |
1204 | esar[i * 4] != esar[0x40 + i * 4] && | |
1205 | esar[0x3c - i * 4] != esar[0x40 + i * 4]) { | |
1206 | printk(KERN_ERR "%s: Something is wrong with the " | |
1207 | "ethernet station address prom!\n", name); | |
1208 | ret = -ENODEV; | |
257b346d | 1209 | goto err_out_resource; |
1da177e4 LT |
1210 | } |
1211 | } | |
1212 | ||
1213 | /* Copy the ethernet address to the device structure, later to the | |
1214 | * lance initialization block so the lance gets it every time it's | |
1215 | * (re)initialized. | |
1216 | */ | |
1217 | switch (type) { | |
1218 | case ASIC_LANCE: | |
0795af57 | 1219 | printk("%s: IOASIC onboard LANCE", name); |
1da177e4 LT |
1220 | break; |
1221 | case PMAD_LANCE: | |
0795af57 | 1222 | printk("%s: PMAD-AA", name); |
1da177e4 LT |
1223 | break; |
1224 | case PMAX_LANCE: | |
0795af57 | 1225 | printk("%s: PMAX onboard LANCE", name); |
1da177e4 LT |
1226 | break; |
1227 | } | |
0795af57 | 1228 | for (i = 0; i < 6; i++) |
1da177e4 | 1229 | dev->dev_addr[i] = esar[i * 4]; |
1da177e4 | 1230 | |
e174961c | 1231 | printk(", addr = %pM, irq = %d\n", dev->dev_addr, dev->irq); |
1da177e4 | 1232 | |
ad5a24e0 | 1233 | dev->netdev_ops = &lance_netdev_ops; |
1da177e4 | 1234 | dev->watchdog_timeo = 5*HZ; |
1da177e4 LT |
1235 | |
1236 | /* lp->ll is the location of the registers for lance card */ | |
1237 | lp->ll = ll; | |
1238 | ||
1239 | /* busmaster_regval (CSR3) should be zero according to the PMAD-AA | |
1240 | * specification. | |
1241 | */ | |
1242 | lp->busmaster_regval = 0; | |
1243 | ||
1244 | dev->dma = 0; | |
1245 | ||
1246 | /* We cannot sleep if the chip is busy during a | |
1247 | * multicast list update event, because such events | |
1248 | * can occur from interrupts (ex. IPv6). So we | |
1249 | * use a timer to try again later when necessary. -DaveM | |
1250 | */ | |
1251 | init_timer(&lp->multicast_timer); | |
1252 | lp->multicast_timer.data = (unsigned long) dev; | |
c061b18d | 1253 | lp->multicast_timer.function = lance_set_multicast_retry; |
1da177e4 LT |
1254 | |
1255 | ret = register_netdev(dev); | |
1256 | if (ret) { | |
1257 | printk(KERN_ERR | |
1258 | "%s: Unable to register netdev, aborting.\n", name); | |
257b346d | 1259 | goto err_out_resource; |
1da177e4 LT |
1260 | } |
1261 | ||
257b346d MR |
1262 | if (!bdev) { |
1263 | lp->next = root_lance_dev; | |
1264 | root_lance_dev = dev; | |
1265 | } | |
1da177e4 LT |
1266 | |
1267 | printk("%s: registered as %s.\n", name, dev->name); | |
1268 | return 0; | |
1269 | ||
257b346d MR |
1270 | err_out_resource: |
1271 | if (bdev) | |
1272 | release_mem_region(start, len); | |
1273 | ||
1274 | err_out_dev: | |
b07db75a | 1275 | free_netdev(dev); |
1da177e4 LT |
1276 | |
1277 | err_out: | |
1278 | return ret; | |
1279 | } | |
1280 | ||
257b346d MR |
1281 | static void __exit dec_lance_remove(struct device *bdev) |
1282 | { | |
1283 | struct net_device *dev = dev_get_drvdata(bdev); | |
1284 | resource_size_t start, len; | |
1285 | ||
1286 | unregister_netdev(dev); | |
1287 | start = to_tc_dev(bdev)->resource.start; | |
1288 | len = to_tc_dev(bdev)->resource.end - start + 1; | |
1289 | release_mem_region(start, len); | |
1290 | free_netdev(dev); | |
1291 | } | |
1da177e4 LT |
1292 | |
1293 | /* Find all the lance cards on the system and initialize them */ | |
257b346d | 1294 | static int __init dec_lance_platform_probe(void) |
1da177e4 LT |
1295 | { |
1296 | int count = 0; | |
1297 | ||
1da177e4 LT |
1298 | if (dec_interrupt[DEC_IRQ_LANCE] >= 0) { |
1299 | if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) { | |
257b346d | 1300 | if (dec_lance_probe(NULL, ASIC_LANCE) >= 0) |
1da177e4 | 1301 | count++; |
1da177e4 | 1302 | } else if (!TURBOCHANNEL) { |
257b346d | 1303 | if (dec_lance_probe(NULL, PMAX_LANCE) >= 0) |
1da177e4 LT |
1304 | count++; |
1305 | } | |
1306 | } | |
1307 | ||
1308 | return (count > 0) ? 0 : -ENODEV; | |
1309 | } | |
1310 | ||
257b346d | 1311 | static void __exit dec_lance_platform_remove(void) |
1da177e4 LT |
1312 | { |
1313 | while (root_lance_dev) { | |
1314 | struct net_device *dev = root_lance_dev; | |
1315 | struct lance_private *lp = netdev_priv(dev); | |
b07db75a | 1316 | |
1da177e4 | 1317 | unregister_netdev(dev); |
1da177e4 LT |
1318 | root_lance_dev = lp->next; |
1319 | free_netdev(dev); | |
1320 | } | |
1321 | } | |
1322 | ||
257b346d | 1323 | #ifdef CONFIG_TC |
0cb0568d | 1324 | static int dec_lance_tc_probe(struct device *dev); |
257b346d MR |
1325 | static int __exit dec_lance_tc_remove(struct device *dev); |
1326 | ||
1327 | static const struct tc_device_id dec_lance_tc_table[] = { | |
1328 | { "DEC ", "PMAD-AA " }, | |
1329 | { } | |
1330 | }; | |
1331 | MODULE_DEVICE_TABLE(tc, dec_lance_tc_table); | |
1332 | ||
1333 | static struct tc_driver dec_lance_tc_driver = { | |
1334 | .id_table = dec_lance_tc_table, | |
1335 | .driver = { | |
1336 | .name = "declance", | |
1337 | .bus = &tc_bus_type, | |
1338 | .probe = dec_lance_tc_probe, | |
1339 | .remove = __exit_p(dec_lance_tc_remove), | |
1340 | }, | |
1341 | }; | |
1342 | ||
0cb0568d | 1343 | static int dec_lance_tc_probe(struct device *dev) |
257b346d MR |
1344 | { |
1345 | int status = dec_lance_probe(dev, PMAD_LANCE); | |
1346 | if (!status) | |
1347 | get_device(dev); | |
1348 | return status; | |
1349 | } | |
1350 | ||
1351 | static int __exit dec_lance_tc_remove(struct device *dev) | |
1352 | { | |
1353 | put_device(dev); | |
1354 | dec_lance_remove(dev); | |
1355 | return 0; | |
1356 | } | |
1357 | #endif | |
1358 | ||
1359 | static int __init dec_lance_init(void) | |
1360 | { | |
1361 | int status; | |
1362 | ||
1363 | status = tc_register_driver(&dec_lance_tc_driver); | |
1364 | if (!status) | |
1365 | dec_lance_platform_probe(); | |
1366 | return status; | |
1367 | } | |
1368 | ||
1369 | static void __exit dec_lance_exit(void) | |
1370 | { | |
1371 | dec_lance_platform_remove(); | |
1372 | tc_unregister_driver(&dec_lance_tc_driver); | |
1373 | } | |
1374 | ||
1375 | ||
1376 | module_init(dec_lance_init); | |
1377 | module_exit(dec_lance_exit); |