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enic: Add ndo_set_vf_mac support for enic dynamic devices
[linux-block.git] / drivers / net / enic / enic_main.c
CommitLineData
01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
SF		 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
26#include <linux/workqueue.h>
27#include <linux/pci.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/if_ether.h>
31#include <linux/if_vlan.h>
32#include <linux/ethtool.h>
33#include <linux/in.h>
34#include <linux/ip.h>
35#include <linux/ipv6.h>
36#include <linux/tcp.h>
29046f9b 37#include <linux/rtnetlink.h>
b7c6bfb7 38#include <net/ip6_checksum.h>
01f2e4ea
SF		 39
40#include "cq_enet_desc.h"
41#include "vnic_dev.h"
42#include "vnic_intr.h"
43#include "vnic_stats.h"
f8bd9091 44#include "vnic_vic.h"
01f2e4ea
SF		 45#include "enic_res.h"
46#include "enic.h"
47
48#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
ea0d7d91
SF		 49#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
50#define MAX_TSO (1 << 16)
51#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
52
53#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
f8bd9091 54#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
01f2e4ea
SF		 55
56/* Supported devices */
a3aa1884 57static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
ea0d7d91 58 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
f8bd9091 59 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
01f2e4ea
SF		 60 { 0, } /* end of table */
61};
62
63MODULE_DESCRIPTION(DRV_DESCRIPTION);
64MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
65MODULE_LICENSE("GPL");
66MODULE_VERSION(DRV_VERSION);
67MODULE_DEVICE_TABLE(pci, enic_id_table);
68
69struct enic_stat {
70 char name[ETH_GSTRING_LEN];
71 unsigned int offset;
72};
73
74#define ENIC_TX_STAT(stat) \
75 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
76#define ENIC_RX_STAT(stat) \
77 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
78
79static const struct enic_stat enic_tx_stats[] = {
80 ENIC_TX_STAT(tx_frames_ok),
81 ENIC_TX_STAT(tx_unicast_frames_ok),
82 ENIC_TX_STAT(tx_multicast_frames_ok),
83 ENIC_TX_STAT(tx_broadcast_frames_ok),
84 ENIC_TX_STAT(tx_bytes_ok),
85 ENIC_TX_STAT(tx_unicast_bytes_ok),
86 ENIC_TX_STAT(tx_multicast_bytes_ok),
87 ENIC_TX_STAT(tx_broadcast_bytes_ok),
88 ENIC_TX_STAT(tx_drops),
89 ENIC_TX_STAT(tx_errors),
90 ENIC_TX_STAT(tx_tso),
91};
92
93static const struct enic_stat enic_rx_stats[] = {
94 ENIC_RX_STAT(rx_frames_ok),
95 ENIC_RX_STAT(rx_frames_total),
96 ENIC_RX_STAT(rx_unicast_frames_ok),
97 ENIC_RX_STAT(rx_multicast_frames_ok),
98 ENIC_RX_STAT(rx_broadcast_frames_ok),
99 ENIC_RX_STAT(rx_bytes_ok),
100 ENIC_RX_STAT(rx_unicast_bytes_ok),
101 ENIC_RX_STAT(rx_multicast_bytes_ok),
102 ENIC_RX_STAT(rx_broadcast_bytes_ok),
103 ENIC_RX_STAT(rx_drop),
104 ENIC_RX_STAT(rx_no_bufs),
105 ENIC_RX_STAT(rx_errors),
106 ENIC_RX_STAT(rx_rss),
107 ENIC_RX_STAT(rx_crc_errors),
108 ENIC_RX_STAT(rx_frames_64),
109 ENIC_RX_STAT(rx_frames_127),
110 ENIC_RX_STAT(rx_frames_255),
111 ENIC_RX_STAT(rx_frames_511),
112 ENIC_RX_STAT(rx_frames_1023),
113 ENIC_RX_STAT(rx_frames_1518),
114 ENIC_RX_STAT(rx_frames_to_max),
115};
116
117static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
118static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
119
f8bd9091
SF		 120static int enic_is_dynamic(struct enic *enic)
121{
122 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
123}
124
717258ba
VK		 125static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
126{
127 return rq;
128}
129
130static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
131{
132 return enic->rq_count + wq;
133}
134
135static inline unsigned int enic_legacy_io_intr(void)
136{
137 return 0;
138}
139
140static inline unsigned int enic_legacy_err_intr(void)
141{
142 return 1;
143}
144
145static inline unsigned int enic_legacy_notify_intr(void)
146{
147 return 2;
148}
149
150static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
151{
152 return rq;
153}
154
155static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
156{
157 return enic->rq_count + wq;
158}
159
160static inline unsigned int enic_msix_err_intr(struct enic *enic)
161{
162 return enic->rq_count + enic->wq_count;
163}
164
165static inline unsigned int enic_msix_notify_intr(struct enic *enic)
166{
167 return enic->rq_count + enic->wq_count + 1;
168}
169
01f2e4ea
SF		 170static int enic_get_settings(struct net_device *netdev,
171 struct ethtool_cmd *ecmd)
172{
173 struct enic *enic = netdev_priv(netdev);
174
175 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
176 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
177 ecmd->port = PORT_FIBRE;
178 ecmd->transceiver = XCVR_EXTERNAL;
179
180 if (netif_carrier_ok(netdev)) {
181 ecmd->speed = vnic_dev_port_speed(enic->vdev);
182 ecmd->duplex = DUPLEX_FULL;
183 } else {
184 ecmd->speed = -1;
185 ecmd->duplex = -1;
186 }
187
188 ecmd->autoneg = AUTONEG_DISABLE;
189
190 return 0;
191}
192
383ab92f
VK		 193static int enic_dev_fw_info(struct enic *enic,
194 struct vnic_devcmd_fw_info **fw_info)
195{
196 int err;
197
198 spin_lock(&enic->devcmd_lock);
199 err = vnic_dev_fw_info(enic->vdev, fw_info);
200 spin_unlock(&enic->devcmd_lock);
201
202 return err;
203}
204
01f2e4ea
SF		 205static void enic_get_drvinfo(struct net_device *netdev,
206 struct ethtool_drvinfo *drvinfo)
207{
208 struct enic *enic = netdev_priv(netdev);
209 struct vnic_devcmd_fw_info *fw_info;
210
383ab92f 211 enic_dev_fw_info(enic, &fw_info);
01f2e4ea
SF		 212
213 strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
214 strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
215 strncpy(drvinfo->fw_version, fw_info->fw_version,
216 sizeof(drvinfo->fw_version));
217 strncpy(drvinfo->bus_info, pci_name(enic->pdev),
218 sizeof(drvinfo->bus_info));
219}
220
221static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
222{
223 unsigned int i;
224
225 switch (stringset) {
226 case ETH_SS_STATS:
227 for (i = 0; i < enic_n_tx_stats; i++) {
228 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
229 data += ETH_GSTRING_LEN;
230 }
231 for (i = 0; i < enic_n_rx_stats; i++) {
232 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
233 data += ETH_GSTRING_LEN;
234 }
235 break;
236 }
237}
238
25f0a061 239static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 240{
25f0a061
SF		 241 switch (sset) {
242 case ETH_SS_STATS:
243 return enic_n_tx_stats + enic_n_rx_stats;
244 default:
245 return -EOPNOTSUPP;
246 }
01f2e4ea
SF		 247}
248
383ab92f
VK		 249static int enic_dev_stats_dump(struct enic *enic, struct vnic_stats **vstats)
250{
251 int err;
252
253 spin_lock(&enic->devcmd_lock);
254 err = vnic_dev_stats_dump(enic->vdev, vstats);
255 spin_unlock(&enic->devcmd_lock);
256
257 return err;
258}
259
01f2e4ea
SF		 260static void enic_get_ethtool_stats(struct net_device *netdev,
261 struct ethtool_stats *stats, u64 *data)
262{
263 struct enic *enic = netdev_priv(netdev);
264 struct vnic_stats *vstats;
265 unsigned int i;
266
383ab92f 267 enic_dev_stats_dump(enic, &vstats);
01f2e4ea
SF		 268
269 for (i = 0; i < enic_n_tx_stats; i++)
270 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
271 for (i = 0; i < enic_n_rx_stats; i++)
272 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
273}
274
275static u32 enic_get_rx_csum(struct net_device *netdev)
276{
277 struct enic *enic = netdev_priv(netdev);
278 return enic->csum_rx_enabled;
279}
280
281static int enic_set_rx_csum(struct net_device *netdev, u32 data)
282{
283 struct enic *enic = netdev_priv(netdev);
284
25f0a061
SF		 285 if (data && !ENIC_SETTING(enic, RXCSUM))
286 return -EINVAL;
287
288 enic->csum_rx_enabled = !!data;
01f2e4ea
SF		 289
290 return 0;
291}
292
293static int enic_set_tx_csum(struct net_device *netdev, u32 data)
294{
295 struct enic *enic = netdev_priv(netdev);
296
25f0a061
SF		 297 if (data && !ENIC_SETTING(enic, TXCSUM))
298 return -EINVAL;
299
300 if (data)
01f2e4ea
SF		 301 netdev->features |= NETIF_F_HW_CSUM;
302 else
303 netdev->features &= ~NETIF_F_HW_CSUM;
304
305 return 0;
306}
307
308static int enic_set_tso(struct net_device *netdev, u32 data)
309{
310 struct enic *enic = netdev_priv(netdev);
311
25f0a061
SF		 312 if (data && !ENIC_SETTING(enic, TSO))
313 return -EINVAL;
314
315 if (data)
01f2e4ea
SF		 316 netdev->features |=
317 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN;
318 else
319 netdev->features &=
320 ~(NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN);
321
322 return 0;
323}
324
325static u32 enic_get_msglevel(struct net_device *netdev)
326{
327 struct enic *enic = netdev_priv(netdev);
328 return enic->msg_enable;
329}
330
331static void enic_set_msglevel(struct net_device *netdev, u32 value)
332{
333 struct enic *enic = netdev_priv(netdev);
334 enic->msg_enable = value;
335}
336
7c844599
SF		 337static int enic_get_coalesce(struct net_device *netdev,
338 struct ethtool_coalesce *ecmd)
339{
340 struct enic *enic = netdev_priv(netdev);
341
342 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
343 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
344
345 return 0;
346}
347
348static int enic_set_coalesce(struct net_device *netdev,
349 struct ethtool_coalesce *ecmd)
350{
351 struct enic *enic = netdev_priv(netdev);
352 u32 tx_coalesce_usecs;
353 u32 rx_coalesce_usecs;
717258ba 354 unsigned int i, intr;
7c844599
SF		 355
356 tx_coalesce_usecs = min_t(u32,
357 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
358 ecmd->tx_coalesce_usecs);
359 rx_coalesce_usecs = min_t(u32,
360 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
361 ecmd->rx_coalesce_usecs);
362
363 switch (vnic_dev_get_intr_mode(enic->vdev)) {
364 case VNIC_DEV_INTR_MODE_INTX:
365 if (tx_coalesce_usecs != rx_coalesce_usecs)
366 return -EINVAL;
367
717258ba
VK		 368 intr = enic_legacy_io_intr();
369 vnic_intr_coalescing_timer_set(&enic->intr[intr],
7c844599
SF		 370 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
371 break;
372 case VNIC_DEV_INTR_MODE_MSI:
373 if (tx_coalesce_usecs != rx_coalesce_usecs)
374 return -EINVAL;
375
376 vnic_intr_coalescing_timer_set(&enic->intr[0],
377 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
378 break;
379 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 380 for (i = 0; i < enic->wq_count; i++) {
381 intr = enic_msix_wq_intr(enic, i);
382 vnic_intr_coalescing_timer_set(&enic->intr[intr],
383 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
384 }
385
386 for (i = 0; i < enic->rq_count; i++) {
387 intr = enic_msix_rq_intr(enic, i);
388 vnic_intr_coalescing_timer_set(&enic->intr[intr],
389 INTR_COALESCE_USEC_TO_HW(rx_coalesce_usecs));
390 }
391
7c844599
SF		 392 break;
393 default:
394 break;
395 }
396
397 enic->tx_coalesce_usecs = tx_coalesce_usecs;
398 enic->rx_coalesce_usecs = rx_coalesce_usecs;
399
400 return 0;
401}
402
0fc0b732 403static const struct ethtool_ops enic_ethtool_ops = {
01f2e4ea
SF		 404 .get_settings = enic_get_settings,
405 .get_drvinfo = enic_get_drvinfo,
406 .get_msglevel = enic_get_msglevel,
407 .set_msglevel = enic_set_msglevel,
408 .get_link = ethtool_op_get_link,
409 .get_strings = enic_get_strings,
25f0a061 410 .get_sset_count = enic_get_sset_count,
01f2e4ea
SF		 411 .get_ethtool_stats = enic_get_ethtool_stats,
412 .get_rx_csum = enic_get_rx_csum,
413 .set_rx_csum = enic_set_rx_csum,
414 .get_tx_csum = ethtool_op_get_tx_csum,
415 .set_tx_csum = enic_set_tx_csum,
416 .get_sg = ethtool_op_get_sg,
417 .set_sg = ethtool_op_set_sg,
418 .get_tso = ethtool_op_get_tso,
419 .set_tso = enic_set_tso,
7c844599
SF		 420 .get_coalesce = enic_get_coalesce,
421 .set_coalesce = enic_set_coalesce,
86ca9db7 422 .get_flags = ethtool_op_get_flags,
01f2e4ea
SF		 423};
424
425static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
426{
427 struct enic *enic = vnic_dev_priv(wq->vdev);
428
429 if (buf->sop)
430 pci_unmap_single(enic->pdev, buf->dma_addr,
431 buf->len, PCI_DMA_TODEVICE);
432 else
433 pci_unmap_page(enic->pdev, buf->dma_addr,
434 buf->len, PCI_DMA_TODEVICE);
435
436 if (buf->os_buf)
437 dev_kfree_skb_any(buf->os_buf);
438}
439
440static void enic_wq_free_buf(struct vnic_wq *wq,
441 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
442{
443 enic_free_wq_buf(wq, buf);
444}
445
446static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
447 u8 type, u16 q_number, u16 completed_index, void *opaque)
448{
449 struct enic *enic = vnic_dev_priv(vdev);
450
451 spin_lock(&enic->wq_lock[q_number]);
452
453 vnic_wq_service(&enic->wq[q_number], cq_desc,
454 completed_index, enic_wq_free_buf,
455 opaque);
456
457 if (netif_queue_stopped(enic->netdev) &&
ea0d7d91
SF		 458 vnic_wq_desc_avail(&enic->wq[q_number]) >=
459 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
01f2e4ea
SF		 460 netif_wake_queue(enic->netdev);
461
462 spin_unlock(&enic->wq_lock[q_number]);
463
464 return 0;
465}
466
467static void enic_log_q_error(struct enic *enic)
468{
469 unsigned int i;
470 u32 error_status;
471
472 for (i = 0; i < enic->wq_count; i++) {
473 error_status = vnic_wq_error_status(&enic->wq[i]);
474 if (error_status)
a7a79deb
VK		 475 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
476 i, error_status);
01f2e4ea
SF		 477 }
478
479 for (i = 0; i < enic->rq_count; i++) {
480 error_status = vnic_rq_error_status(&enic->rq[i]);
481 if (error_status)
a7a79deb
VK		 482 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
483 i, error_status);
01f2e4ea
SF		 484 }
485}
486
383ab92f 487static void enic_msglvl_check(struct enic *enic)
01f2e4ea 488{
383ab92f 489 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
01f2e4ea 490
383ab92f 491 if (msg_enable != enic->msg_enable) {
a7a79deb
VK		 492 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
493 enic->msg_enable, msg_enable);
383ab92f 494 enic->msg_enable = msg_enable;
01f2e4ea
SF		 495 }
496}
497
498static void enic_mtu_check(struct enic *enic)
499{
500 u32 mtu = vnic_dev_mtu(enic->vdev);
a7a79deb 501 struct net_device *netdev = enic->netdev;
01f2e4ea 502
491598a4 503 if (mtu && mtu != enic->port_mtu) {
7c844599 504 enic->port_mtu = mtu;
a7a79deb
VK		 505 if (mtu < netdev->mtu)
506 netdev_warn(netdev,
507 "interface MTU (%d) set higher "
01f2e4ea 508 "than switch port MTU (%d)\n",
a7a79deb 509 netdev->mtu, mtu);
01f2e4ea
SF		 510 }
511}
512
383ab92f 513static void enic_link_check(struct enic *enic)
01f2e4ea 514{
383ab92f
VK		 515 int link_status = vnic_dev_link_status(enic->vdev);
516 int carrier_ok = netif_carrier_ok(enic->netdev);
01f2e4ea 517
383ab92f 518 if (link_status && !carrier_ok) {
a7a79deb 519 netdev_info(enic->netdev, "Link UP\n");
383ab92f
VK		 520 netif_carrier_on(enic->netdev);
521 } else if (!link_status && carrier_ok) {
a7a79deb 522 netdev_info(enic->netdev, "Link DOWN\n");
383ab92f 523 netif_carrier_off(enic->netdev);
01f2e4ea
SF		 524 }
525}
526
527static void enic_notify_check(struct enic *enic)
528{
529 enic_msglvl_check(enic);
530 enic_mtu_check(enic);
531 enic_link_check(enic);
532}
533
534#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
535
536static irqreturn_t enic_isr_legacy(int irq, void *data)
537{
538 struct net_device *netdev = data;
539 struct enic *enic = netdev_priv(netdev);
717258ba
VK		 540 unsigned int io_intr = enic_legacy_io_intr();
541 unsigned int err_intr = enic_legacy_err_intr();
542 unsigned int notify_intr = enic_legacy_notify_intr();
01f2e4ea
SF		 543 u32 pba;
544
717258ba 545 vnic_intr_mask(&enic->intr[io_intr]);
01f2e4ea
SF		 546
547 pba = vnic_intr_legacy_pba(enic->legacy_pba);
548 if (!pba) {
717258ba 549 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 550 return IRQ_NONE; /* not our interrupt */
551 }
552
717258ba
VK		 553 if (ENIC_TEST_INTR(pba, notify_intr)) {
554 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
01f2e4ea 555 enic_notify_check(enic);
ed8af6b2 556 }
01f2e4ea 557
717258ba
VK		 558 if (ENIC_TEST_INTR(pba, err_intr)) {
559 vnic_intr_return_all_credits(&enic->intr[err_intr]);
01f2e4ea
SF		 560 enic_log_q_error(enic);
561 /* schedule recovery from WQ/RQ error */
562 schedule_work(&enic->reset);
563 return IRQ_HANDLED;
564 }
565
717258ba
VK		 566 if (ENIC_TEST_INTR(pba, io_intr)) {
567 if (napi_schedule_prep(&enic->napi[0]))
568 __napi_schedule(&enic->napi[0]);
01f2e4ea 569 } else {
717258ba 570 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 571 }
572
573 return IRQ_HANDLED;
574}
575
576static irqreturn_t enic_isr_msi(int irq, void *data)
577{
578 struct enic *enic = data;
579
580 /* With MSI, there is no sharing of interrupts, so this is
581 * our interrupt and there is no need to ack it. The device
582 * is not providing per-vector masking, so the OS will not
583 * write to PCI config space to mask/unmask the interrupt.
584 * We're using mask_on_assertion for MSI, so the device
585 * automatically masks the interrupt when the interrupt is
586 * generated. Later, when exiting polling, the interrupt
587 * will be unmasked (see enic_poll).
588 *
589 * Also, the device uses the same PCIe Traffic Class (TC)
590 * for Memory Write data and MSI, so there are no ordering
591 * issues; the MSI will always arrive at the Root Complex
592 * _after_ corresponding Memory Writes (i.e. descriptor
593 * writes).
594 */
595
717258ba 596 napi_schedule(&enic->napi[0]);
01f2e4ea
SF		 597
598 return IRQ_HANDLED;
599}
600
601static irqreturn_t enic_isr_msix_rq(int irq, void *data)
602{
717258ba 603 struct napi_struct *napi = data;
01f2e4ea
SF		 604
605 /* schedule NAPI polling for RQ cleanup */
717258ba 606 napi_schedule(napi);
01f2e4ea
SF		 607
608 return IRQ_HANDLED;
609}
610
611static irqreturn_t enic_isr_msix_wq(int irq, void *data)
612{
613 struct enic *enic = data;
717258ba
VK		 614 unsigned int cq = enic_cq_wq(enic, 0);
615 unsigned int intr = enic_msix_wq_intr(enic, 0);
01f2e4ea
SF		 616 unsigned int wq_work_to_do = -1; /* no limit */
617 unsigned int wq_work_done;
618
717258ba 619 wq_work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 620 wq_work_to_do, enic_wq_service, NULL);
621
717258ba 622 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 623 wq_work_done,
624 1 /* unmask intr */,
625 1 /* reset intr timer */);
626
627 return IRQ_HANDLED;
628}
629
630static irqreturn_t enic_isr_msix_err(int irq, void *data)
631{
632 struct enic *enic = data;
717258ba 633 unsigned int intr = enic_msix_err_intr(enic);
01f2e4ea 634
717258ba 635 vnic_intr_return_all_credits(&enic->intr[intr]);
ed8af6b2 636
01f2e4ea
SF		 637 enic_log_q_error(enic);
638
639 /* schedule recovery from WQ/RQ error */
640 schedule_work(&enic->reset);
641
642 return IRQ_HANDLED;
643}
644
645static irqreturn_t enic_isr_msix_notify(int irq, void *data)
646{
647 struct enic *enic = data;
717258ba 648 unsigned int intr = enic_msix_notify_intr(enic);
01f2e4ea 649
717258ba 650 vnic_intr_return_all_credits(&enic->intr[intr]);
01f2e4ea 651 enic_notify_check(enic);
01f2e4ea
SF		 652
653 return IRQ_HANDLED;
654}
655
656static inline void enic_queue_wq_skb_cont(struct enic *enic,
657 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 658 unsigned int len_left, int loopback)
01f2e4ea
SF		 659{
660 skb_frag_t *frag;
661
662 /* Queue additional data fragments */
663 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
664 len_left -= frag->size;
665 enic_queue_wq_desc_cont(wq, skb,
666 pci_map_page(enic->pdev, frag->page,
667 frag->page_offset, frag->size,
668 PCI_DMA_TODEVICE),
669 frag->size,
1825aca6
VK		 670 (len_left == 0), /* EOP? */
671 loopback);
01f2e4ea
SF		 672 }
673}
674
675static inline void enic_queue_wq_skb_vlan(struct enic *enic,
676 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 677 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 678{
679 unsigned int head_len = skb_headlen(skb);
680 unsigned int len_left = skb->len - head_len;
681 int eop = (len_left == 0);
682
ea0d7d91
SF		 683 /* Queue the main skb fragment. The fragments are no larger
684 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
685 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
686 * per fragment is queued.
687 */
01f2e4ea
SF		 688 enic_queue_wq_desc(wq, skb,
689 pci_map_single(enic->pdev, skb->data,
690 head_len, PCI_DMA_TODEVICE),
691 head_len,
692 vlan_tag_insert, vlan_tag,
1825aca6 693 eop, loopback);
01f2e4ea
SF		 694
695 if (!eop)
1825aca6 696 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 697}
698
699static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
700 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 701 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 702{
703 unsigned int head_len = skb_headlen(skb);
704 unsigned int len_left = skb->len - head_len;
705 unsigned int hdr_len = skb_transport_offset(skb);
706 unsigned int csum_offset = hdr_len + skb->csum_offset;
707 int eop = (len_left == 0);
708
ea0d7d91
SF		 709 /* Queue the main skb fragment. The fragments are no larger
710 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
711 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
712 * per fragment is queued.
713 */
01f2e4ea
SF		 714 enic_queue_wq_desc_csum_l4(wq, skb,
715 pci_map_single(enic->pdev, skb->data,
716 head_len, PCI_DMA_TODEVICE),
717 head_len,
718 csum_offset,
719 hdr_len,
720 vlan_tag_insert, vlan_tag,
1825aca6 721 eop, loopback);
01f2e4ea
SF		 722
723 if (!eop)
1825aca6 724 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 725}
726
727static inline void enic_queue_wq_skb_tso(struct enic *enic,
728 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
1825aca6 729 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea 730{
ea0d7d91
SF		 731 unsigned int frag_len_left = skb_headlen(skb);
732 unsigned int len_left = skb->len - frag_len_left;
01f2e4ea
SF		 733 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
734 int eop = (len_left == 0);
ea0d7d91
SF		 735 unsigned int len;
736 dma_addr_t dma_addr;
737 unsigned int offset = 0;
738 skb_frag_t *frag;
01f2e4ea
SF		 739
740 /* Preload TCP csum field with IP pseudo hdr calculated
741 * with IP length set to zero. HW will later add in length
742 * to each TCP segment resulting from the TSO.
743 */
744
09640e63 745 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
01f2e4ea
SF		 746 ip_hdr(skb)->check = 0;
747 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
748 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 749 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
SF		 750 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
751 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
752 }
753
ea0d7d91
SF		 754 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
755 * for the main skb fragment
756 */
757 while (frag_len_left) {
758 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
759 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
760 len, PCI_DMA_TODEVICE);
761 enic_queue_wq_desc_tso(wq, skb,
762 dma_addr,
763 len,
764 mss, hdr_len,
765 vlan_tag_insert, vlan_tag,
1825aca6 766 eop && (len == frag_len_left), loopback);
ea0d7d91
SF		 767 frag_len_left -= len;
768 offset += len;
769 }
01f2e4ea 770
ea0d7d91
SF		 771 if (eop)
772 return;
773
774 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
775 * for additional data fragments
776 */
777 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
778 len_left -= frag->size;
779 frag_len_left = frag->size;
780 offset = frag->page_offset;
781
782 while (frag_len_left) {
783 len = min(frag_len_left,
784 (unsigned int)WQ_ENET_MAX_DESC_LEN);
785 dma_addr = pci_map_page(enic->pdev, frag->page,
786 offset, len,
787 PCI_DMA_TODEVICE);
788 enic_queue_wq_desc_cont(wq, skb,
789 dma_addr,
790 len,
791 (len_left == 0) &&
1825aca6
VK		 792 (len == frag_len_left), /* EOP? */
793 loopback);
ea0d7d91
SF		 794 frag_len_left -= len;
795 offset += len;
796 }
797 }
01f2e4ea
SF		 798}
799
800static inline void enic_queue_wq_skb(struct enic *enic,
801 struct vnic_wq *wq, struct sk_buff *skb)
802{
803 unsigned int mss = skb_shinfo(skb)->gso_size;
804 unsigned int vlan_tag = 0;
805 int vlan_tag_insert = 0;
1825aca6 806 int loopback = 0;
01f2e4ea 807
eab6d18d 808 if (vlan_tx_tag_present(skb)) {
01f2e4ea
SF		 809 /* VLAN tag from trunking driver */
810 vlan_tag_insert = 1;
811 vlan_tag = vlan_tx_tag_get(skb);
1825aca6
VK		 812 } else if (enic->loop_enable) {
813 vlan_tag = enic->loop_tag;
814 loopback = 1;
01f2e4ea
SF		 815 }
816
817 if (mss)
818 enic_queue_wq_skb_tso(enic, wq, skb, mss,
1825aca6 819 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 820 else if (skb->ip_summed == CHECKSUM_PARTIAL)
821 enic_queue_wq_skb_csum_l4(enic, wq, skb,
1825aca6 822 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 823 else
824 enic_queue_wq_skb_vlan(enic, wq, skb,
1825aca6 825 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 826}
827
ed8af6b2 828/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325 829static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
d87fd25d 830 struct net_device *netdev)
01f2e4ea
SF		 831{
832 struct enic *enic = netdev_priv(netdev);
833 struct vnic_wq *wq = &enic->wq[0];
834 unsigned long flags;
835
836 if (skb->len <= 0) {
837 dev_kfree_skb(skb);
838 return NETDEV_TX_OK;
839 }
840
841 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
842 * which is very likely. In the off chance it's going to take
843 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
844 */
845
846 if (skb_shinfo(skb)->gso_size == 0 &&
847 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
848 skb_linearize(skb)) {
849 dev_kfree_skb(skb);
850 return NETDEV_TX_OK;
851 }
852
853 spin_lock_irqsave(&enic->wq_lock[0], flags);
854
ea0d7d91
SF		 855 if (vnic_wq_desc_avail(wq) <
856 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
SF		 857 netif_stop_queue(netdev);
858 /* This is a hard error, log it */
a7a79deb 859 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
01f2e4ea
SF		 860 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
861 return NETDEV_TX_BUSY;
862 }
863
864 enic_queue_wq_skb(enic, wq, skb);
865
ea0d7d91 866 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF		 867 netif_stop_queue(netdev);
868
01f2e4ea
SF		 869 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
870
871 return NETDEV_TX_OK;
872}
873
874/* dev_base_lock rwlock held, nominally process context */
875static struct net_device_stats *enic_get_stats(struct net_device *netdev)
876{
877 struct enic *enic = netdev_priv(netdev);
25f0a061 878 struct net_device_stats *net_stats = &netdev->stats;
01f2e4ea
SF		 879 struct vnic_stats *stats;
880
383ab92f 881 enic_dev_stats_dump(enic, &stats);
01f2e4ea 882
25f0a061
SF		 883 net_stats->tx_packets = stats->tx.tx_frames_ok;
884 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
885 net_stats->tx_errors = stats->tx.tx_errors;
886 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 887
25f0a061
SF		 888 net_stats->rx_packets = stats->rx.rx_frames_ok;
889 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
890 net_stats->rx_errors = stats->rx.rx_errors;
891 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
350991e1 892 net_stats->rx_over_errors = enic->rq_truncated_pkts;
bd9fb1a4 893 net_stats->rx_crc_errors = enic->rq_bad_fcs;
350991e1 894 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
01f2e4ea 895
25f0a061 896 return net_stats;
01f2e4ea
SF		 897}
898
99ef5639 899static void enic_reset_multicast_list(struct enic *enic)
01f2e4ea
SF		 900{
901 enic->mc_count = 0;
99ef5639 902 enic->flags = 0;
01f2e4ea
SF		 903}
904
905static int enic_set_mac_addr(struct net_device *netdev, char *addr)
906{
f8bd9091
SF		 907 struct enic *enic = netdev_priv(netdev);
908
909 if (enic_is_dynamic(enic)) {
910 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
911 return -EADDRNOTAVAIL;
912 } else {
913 if (!is_valid_ether_addr(addr))
914 return -EADDRNOTAVAIL;
915 }
01f2e4ea
SF		 916
917 memcpy(netdev->dev_addr, addr, netdev->addr_len);
918
919 return 0;
920}
921
f8bd9091
SF		 922static int enic_dev_add_station_addr(struct enic *enic)
923{
924 int err = 0;
925
926 if (is_valid_ether_addr(enic->netdev->dev_addr)) {
927 spin_lock(&enic->devcmd_lock);
928 err = vnic_dev_add_addr(enic->vdev, enic->netdev->dev_addr);
929 spin_unlock(&enic->devcmd_lock);
930 }
931
932 return err;
933}
934
935static int enic_dev_del_station_addr(struct enic *enic)
936{
937 int err = 0;
938
939 if (is_valid_ether_addr(enic->netdev->dev_addr)) {
940 spin_lock(&enic->devcmd_lock);
941 err = vnic_dev_del_addr(enic->vdev, enic->netdev->dev_addr);
942 spin_unlock(&enic->devcmd_lock);
943 }
944
945 return err;
946}
947
948static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
949{
950 struct enic *enic = netdev_priv(netdev);
951 struct sockaddr *saddr = p;
952 char *addr = saddr->sa_data;
953 int err;
954
955 if (netif_running(enic->netdev)) {
956 err = enic_dev_del_station_addr(enic);
957 if (err)
958 return err;
959 }
960
961 err = enic_set_mac_addr(netdev, addr);
962 if (err)
963 return err;
964
965 if (netif_running(enic->netdev)) {
966 err = enic_dev_add_station_addr(enic);
967 if (err)
968 return err;
969 }
970
971 return err;
972}
973
974static int enic_set_mac_address(struct net_device *netdev, void *p)
975{
294dab25 976 struct sockaddr *saddr = p;
c76fd32d
VK		 977 char *addr = saddr->sa_data;
978 struct enic *enic = netdev_priv(netdev);
979 int err;
980
981 err = enic_dev_del_station_addr(enic);
982 if (err)
983 return err;
984
985 err = enic_set_mac_addr(netdev, addr);
986 if (err)
987 return err;
294dab25 988
c76fd32d 989 return enic_dev_add_station_addr(enic);
f8bd9091
SF		 990}
991
383ab92f
VK		 992static int enic_dev_packet_filter(struct enic *enic, int directed,
993 int multicast, int broadcast, int promisc, int allmulti)
994{
995 int err;
996
997 spin_lock(&enic->devcmd_lock);
998 err = vnic_dev_packet_filter(enic->vdev, directed,
999 multicast, broadcast, promisc, allmulti);
1000 spin_unlock(&enic->devcmd_lock);
1001
1002 return err;
1003}
1004
319d7e84 1005static int enic_dev_add_addr(struct enic *enic, u8 *addr)
383ab92f
VK		 1006{
1007 int err;
1008
1009 spin_lock(&enic->devcmd_lock);
1010 err = vnic_dev_add_addr(enic->vdev, addr);
1011 spin_unlock(&enic->devcmd_lock);
1012
1013 return err;
1014}
1015
319d7e84 1016static int enic_dev_del_addr(struct enic *enic, u8 *addr)
383ab92f
VK		 1017{
1018 int err;
1019
1020 spin_lock(&enic->devcmd_lock);
1021 err = vnic_dev_del_addr(enic->vdev, addr);
1022 spin_unlock(&enic->devcmd_lock);
1023
1024 return err;
1025}
1026
319d7e84 1027static void enic_add_multicast_addr_list(struct enic *enic)
01f2e4ea 1028{
319d7e84 1029 struct net_device *netdev = enic->netdev;
22bedad3 1030 struct netdev_hw_addr *ha;
4cd24eaf 1031 unsigned int mc_count = netdev_mc_count(netdev);
01f2e4ea 1032 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
01f2e4ea
SF		 1033 unsigned int i, j;
1034
319d7e84
RP		 1035 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
1036 netdev_warn(netdev, "Registering only %d out of %d "
1037 "multicast addresses\n",
1038 ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
01f2e4ea 1039 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
9959a185 1040 }
01f2e4ea
SF		 1041
1042 /* Is there an easier way? Trying to minimize to
1043 * calls to add/del multicast addrs. We keep the
1044 * addrs from the last call in enic->mc_addr and
1045 * look for changes to add/del.
1046 */
1047
48e2f183 1048 i = 0;
22bedad3 1049 netdev_for_each_mc_addr(ha, netdev) {
48e2f183
JP		 1050 if (i == mc_count)
1051 break;
22bedad3 1052 memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
01f2e4ea
SF		 1053 }
1054
1055 for (i = 0; i < enic->mc_count; i++) {
1056 for (j = 0; j < mc_count; j++)
1057 if (compare_ether_addr(enic->mc_addr[i],
1058 mc_addr[j]) == 0)
1059 break;
1060 if (j == mc_count)
319d7e84 1061 enic_dev_del_addr(enic, enic->mc_addr[i]);
01f2e4ea
SF		 1062 }
1063
1064 for (i = 0; i < mc_count; i++) {
1065 for (j = 0; j < enic->mc_count; j++)
1066 if (compare_ether_addr(mc_addr[i],
1067 enic->mc_addr[j]) == 0)
1068 break;
1069 if (j == enic->mc_count)
319d7e84 1070 enic_dev_add_addr(enic, mc_addr[i]);
01f2e4ea
SF		 1071 }
1072
1073 /* Save the list to compare against next time
1074 */
1075
1076 for (i = 0; i < mc_count; i++)
1077 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
1078
1079 enic->mc_count = mc_count;
01f2e4ea
SF		 1080}
1081
319d7e84
RP		 1082static void enic_add_unicast_addr_list(struct enic *enic)
1083{
1084 struct net_device *netdev = enic->netdev;
1085 struct netdev_hw_addr *ha;
1086 unsigned int uc_count = netdev_uc_count(netdev);
1087 u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
1088 unsigned int i, j;
1089
1090 if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
1091 netdev_warn(netdev, "Registering only %d out of %d "
1092 "unicast addresses\n",
1093 ENIC_UNICAST_PERFECT_FILTERS, uc_count);
1094 uc_count = ENIC_UNICAST_PERFECT_FILTERS;
1095 }
1096
1097 /* Is there an easier way? Trying to minimize to
1098 * calls to add/del unicast addrs. We keep the
1099 * addrs from the last call in enic->uc_addr and
1100 * look for changes to add/del.
1101 */
1102
1103 i = 0;
1104 netdev_for_each_uc_addr(ha, netdev) {
1105 if (i == uc_count)
1106 break;
1107 memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
1108 }
1109
1110 for (i = 0; i < enic->uc_count; i++) {
1111 for (j = 0; j < uc_count; j++)
1112 if (compare_ether_addr(enic->uc_addr[i],
1113 uc_addr[j]) == 0)
1114 break;
1115 if (j == uc_count)
1116 enic_dev_del_addr(enic, enic->uc_addr[i]);
1117 }
1118
1119 for (i = 0; i < uc_count; i++) {
1120 for (j = 0; j < enic->uc_count; j++)
1121 if (compare_ether_addr(uc_addr[i],
1122 enic->uc_addr[j]) == 0)
1123 break;
1124 if (j == enic->uc_count)
1125 enic_dev_add_addr(enic, uc_addr[i]);
1126 }
1127
1128 /* Save the list to compare against next time
1129 */
1130
1131 for (i = 0; i < uc_count; i++)
1132 memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
1133
1134 enic->uc_count = uc_count;
1135}
1136
1137/* netif_tx_lock held, BHs disabled */
1138static void enic_set_rx_mode(struct net_device *netdev)
1139{
1140 struct enic *enic = netdev_priv(netdev);
1141 int directed = 1;
1142 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1143 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1144 int promisc = (netdev->flags & IFF_PROMISC) ||
1145 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
1146 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
1147 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
1148 unsigned int flags = netdev->flags |
1149 (allmulti ? IFF_ALLMULTI : 0) |
1150 (promisc ? IFF_PROMISC : 0);
1151
1152 if (enic->flags != flags) {
1153 enic->flags = flags;
1154 enic_dev_packet_filter(enic, directed,
1155 multicast, broadcast, promisc, allmulti);
1156 }
1157
1158 if (!promisc) {
1159 enic_add_unicast_addr_list(enic);
1160 if (!allmulti)
1161 enic_add_multicast_addr_list(enic);
1162 }
1163}
1164
01f2e4ea
SF		 1165/* rtnl lock is held */
1166static void enic_vlan_rx_register(struct net_device *netdev,
1167 struct vlan_group *vlan_group)
1168{
1169 struct enic *enic = netdev_priv(netdev);
1170 enic->vlan_group = vlan_group;
1171}
1172
1173/* rtnl lock is held */
1174static void enic_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1175{
1176 struct enic *enic = netdev_priv(netdev);
1177
1178 spin_lock(&enic->devcmd_lock);
1179 enic_add_vlan(enic, vid);
1180 spin_unlock(&enic->devcmd_lock);
1181}
1182
1183/* rtnl lock is held */
1184static void enic_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1185{
1186 struct enic *enic = netdev_priv(netdev);
1187
1188 spin_lock(&enic->devcmd_lock);
1189 enic_del_vlan(enic, vid);
1190 spin_unlock(&enic->devcmd_lock);
1191}
1192
1193/* netif_tx_lock held, BHs disabled */
1194static void enic_tx_timeout(struct net_device *netdev)
1195{
1196 struct enic *enic = netdev_priv(netdev);
1197 schedule_work(&enic->reset);
1198}
1199
f8bd9091
SF		 1200static int enic_vnic_dev_deinit(struct enic *enic)
1201{
1202 int err;
1203
1204 spin_lock(&enic->devcmd_lock);
1205 err = vnic_dev_deinit(enic->vdev);
1206 spin_unlock(&enic->devcmd_lock);
1207
1208 return err;
1209}
1210
1211static int enic_dev_init_prov(struct enic *enic, struct vic_provinfo *vp)
1212{
1213 int err;
1214
1215 spin_lock(&enic->devcmd_lock);
1216 err = vnic_dev_init_prov(enic->vdev,
1217 (u8 *)vp, vic_provinfo_size(vp));
1218 spin_unlock(&enic->devcmd_lock);
1219
1220 return err;
1221}
1222
1223static int enic_dev_init_done(struct enic *enic, int *done, int *error)
1224{
1225 int err;
1226
1227 spin_lock(&enic->devcmd_lock);
1228 err = vnic_dev_init_done(enic->vdev, done, error);
1229 spin_unlock(&enic->devcmd_lock);
1230
1231 return err;
1232}
1233
0b1c00fc
RP		 1234static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1235{
1236 struct enic *enic = netdev_priv(netdev);
1237
1238 if (vf != PORT_SELF_VF)
1239 return -EOPNOTSUPP;
1240
1241 /* Ignore the vf argument for now. We can assume the request
1242 * is coming on a vf.
1243 */
1244 if (is_valid_ether_addr(mac)) {
1245 memcpy(enic->pp.vf_mac, mac, ETH_ALEN);
1246 return 0;
1247 } else
1248 return -EINVAL;
1249}
1250
08f382eb 1251static int enic_set_port_profile(struct enic *enic, u8 *mac)
f8bd9091
SF		 1252{
1253 struct vic_provinfo *vp;
1254 u8 oui[3] = VIC_PROVINFO_CISCO_OUI;
f8bd9091 1255 char uuid_str[38];
f8bd9091
SF		 1256 int err;
1257
08f382eb
SF		 1258 err = enic_vnic_dev_deinit(enic);
1259 if (err)
1260 return err;
f8bd9091 1261
08f382eb 1262 switch (enic->pp.request) {
f8bd9091 1263
08f382eb 1264 case PORT_REQUEST_ASSOCIATE:
f8bd9091 1265
08f382eb
SF		 1266 if (!(enic->pp.set & ENIC_SET_NAME) || !strlen(enic->pp.name))
1267 return -EINVAL;
f8bd9091 1268
08f382eb
SF		 1269 if (!is_valid_ether_addr(mac))
1270 return -EADDRNOTAVAIL;
f8bd9091 1271
08f382eb
SF		 1272 vp = vic_provinfo_alloc(GFP_KERNEL, oui,
1273 VIC_PROVINFO_LINUX_TYPE);
1274 if (!vp)
1275 return -ENOMEM;
f8bd9091 1276
f8bd9091 1277 vic_provinfo_add_tlv(vp,
08f382eb
SF		 1278 VIC_LINUX_PROV_TLV_PORT_PROFILE_NAME_STR,
1279 strlen(enic->pp.name) + 1, enic->pp.name);
f8bd9091 1280
08f382eb
SF		 1281 vic_provinfo_add_tlv(vp,
1282 VIC_LINUX_PROV_TLV_CLIENT_MAC_ADDR,
1283 ETH_ALEN, mac);
1284
1285 if (enic->pp.set & ENIC_SET_INSTANCE) {
c33788b4 1286 sprintf(uuid_str, "%pUB", enic->pp.instance_uuid);
08f382eb
SF		 1287 vic_provinfo_add_tlv(vp,
1288 VIC_LINUX_PROV_TLV_CLIENT_UUID_STR,
1289 sizeof(uuid_str), uuid_str);
1290 }
f8bd9091 1291
08f382eb 1292 if (enic->pp.set & ENIC_SET_HOST) {
c33788b4 1293 sprintf(uuid_str, "%pUB", enic->pp.host_uuid);
08f382eb
SF		 1294 vic_provinfo_add_tlv(vp,
1295 VIC_LINUX_PROV_TLV_HOST_UUID_STR,
1296 sizeof(uuid_str), uuid_str);
1297 }
f8bd9091 1298
08f382eb
SF		 1299 err = enic_dev_init_prov(enic, vp);
1300 vic_provinfo_free(vp);
1301 if (err)
1302 return err;
1303 break;
f8bd9091 1304
08f382eb
SF		 1305 case PORT_REQUEST_DISASSOCIATE:
1306 break;
f8bd9091 1307
08f382eb
SF		 1308 default:
1309 return -EINVAL;
1310 }
f8bd9091 1311
08f382eb
SF		 1312 enic->pp.set |= ENIC_SET_APPLIED;
1313 return 0;
f8bd9091
SF		 1314}
1315
1316static int enic_set_vf_port(struct net_device *netdev, int vf,
1317 struct nlattr *port[])
1318{
1319 struct enic *enic = netdev_priv(netdev);
08f382eb
SF		 1320
1321 memset(&enic->pp, 0, sizeof(enic->pp));
1322
1323 if (port[IFLA_PORT_REQUEST]) {
1324 enic->pp.set |= ENIC_SET_REQUEST;
1325 enic->pp.request = nla_get_u8(port[IFLA_PORT_REQUEST]);
1326 }
1327
1328 if (port[IFLA_PORT_PROFILE]) {
1329 enic->pp.set |= ENIC_SET_NAME;
1330 memcpy(enic->pp.name, nla_data(port[IFLA_PORT_PROFILE]),
1331 PORT_PROFILE_MAX);
1332 }
1333
1334 if (port[IFLA_PORT_INSTANCE_UUID]) {
1335 enic->pp.set |= ENIC_SET_INSTANCE;
1336 memcpy(enic->pp.instance_uuid,
1337 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1338 }
1339
1340 if (port[IFLA_PORT_HOST_UUID]) {
1341 enic->pp.set |= ENIC_SET_HOST;
1342 memcpy(enic->pp.host_uuid,
1343 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1344 }
f8bd9091
SF		 1345
1346 /* don't support VFs, yet */
1347 if (vf != PORT_SELF_VF)
1348 return -EOPNOTSUPP;
1349
08f382eb
SF		 1350 if (!(enic->pp.set & ENIC_SET_REQUEST))
1351 return -EOPNOTSUPP;
f8bd9091 1352
08f382eb 1353 if (enic->pp.request == PORT_REQUEST_ASSOCIATE) {
f8bd9091 1354
418c437d
SF		 1355 /* If the interface mac addr hasn't been assigned,
1356 * assign a random mac addr before setting port-
1357 * profile.
1358 */
1359
1360 if (is_zero_ether_addr(netdev->dev_addr))
1361 random_ether_addr(netdev->dev_addr);
f8bd9091
SF		 1362 }
1363
08f382eb 1364 return enic_set_port_profile(enic, netdev->dev_addr);
f8bd9091
SF		 1365}
1366
1367static int enic_get_vf_port(struct net_device *netdev, int vf,
1368 struct sk_buff *skb)
1369{
1370 struct enic *enic = netdev_priv(netdev);
1371 int err, error, done;
1372 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
1373
08f382eb
SF		 1374 if (!(enic->pp.set & ENIC_SET_APPLIED))
1375 return -ENODATA;
f8bd9091
SF		 1376
1377 err = enic_dev_init_done(enic, &done, &error);
f8bd9091 1378 if (err)
08f382eb 1379 error = err;
f8bd9091
SF		 1380
1381 switch (error) {
1382 case ERR_SUCCESS:
1383 if (!done)
1384 response = PORT_PROFILE_RESPONSE_INPROGRESS;
1385 break;
1386 case ERR_EINVAL:
1387 response = PORT_PROFILE_RESPONSE_INVALID;
1388 break;
1389 case ERR_EBADSTATE:
1390 response = PORT_PROFILE_RESPONSE_BADSTATE;
1391 break;
1392 case ERR_ENOMEM:
1393 response = PORT_PROFILE_RESPONSE_INSUFFICIENT_RESOURCES;
1394 break;
1395 default:
1396 response = PORT_PROFILE_RESPONSE_ERROR;
1397 break;
1398 }
1399
1400 NLA_PUT_U16(skb, IFLA_PORT_REQUEST, enic->pp.request);
1401 NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
08f382eb
SF		 1402 if (enic->pp.set & ENIC_SET_NAME)
1403 NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
1404 enic->pp.name);
1405 if (enic->pp.set & ENIC_SET_INSTANCE)
1406 NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1407 enic->pp.instance_uuid);
1408 if (enic->pp.set & ENIC_SET_HOST)
1409 NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
1410 enic->pp.host_uuid);
f8bd9091
SF		 1411
1412 return 0;
1413
1414nla_put_failure:
1415 return -EMSGSIZE;
1416}
1417
01f2e4ea
SF		 1418static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1419{
1420 struct enic *enic = vnic_dev_priv(rq->vdev);
1421
1422 if (!buf->os_buf)
1423 return;
1424
1425 pci_unmap_single(enic->pdev, buf->dma_addr,
1426 buf->len, PCI_DMA_FROMDEVICE);
1427 dev_kfree_skb_any(buf->os_buf);
1428}
1429
01f2e4ea
SF		 1430static int enic_rq_alloc_buf(struct vnic_rq *rq)
1431{
1432 struct enic *enic = vnic_dev_priv(rq->vdev);
d19e22dc 1433 struct net_device *netdev = enic->netdev;
01f2e4ea 1434 struct sk_buff *skb;
1825aca6 1435 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
01f2e4ea
SF		 1436 unsigned int os_buf_index = 0;
1437 dma_addr_t dma_addr;
1438
89d71a66 1439 skb = netdev_alloc_skb_ip_align(netdev, len);
01f2e4ea
SF		 1440 if (!skb)
1441 return -ENOMEM;
1442
1443 dma_addr = pci_map_single(enic->pdev, skb->data,
1444 len, PCI_DMA_FROMDEVICE);
1445
1446 enic_queue_rq_desc(rq, skb, os_buf_index,
1447 dma_addr, len);
1448
1449 return 0;
1450}
1451
4badc385
SF		 1452static int enic_rq_alloc_buf_a1(struct vnic_rq *rq)
1453{
1454 struct rq_enet_desc *desc = vnic_rq_next_desc(rq);
1455
1456 if (vnic_rq_posting_soon(rq)) {
1457
1458 /* SW workaround for A0 HW erratum: if we're just about
1459 * to write posted_index, insert a dummy desc
1460 * of type resvd
1461 */
1462
1463 rq_enet_desc_enc(desc, 0, RQ_ENET_TYPE_RESV2, 0);
1464 vnic_rq_post(rq, 0, 0, 0, 0);
1465 } else {
1466 return enic_rq_alloc_buf(rq);
1467 }
1468
1469 return 0;
1470}
1471
383ab92f
VK		 1472static int enic_dev_hw_version(struct enic *enic,
1473 enum vnic_dev_hw_version *hw_ver)
1474{
1475 int err;
1476
1477 spin_lock(&enic->devcmd_lock);
1478 err = vnic_dev_hw_version(enic->vdev, hw_ver);
1479 spin_unlock(&enic->devcmd_lock);
1480
1481 return err;
1482}
1483
4badc385
SF		 1484static int enic_set_rq_alloc_buf(struct enic *enic)
1485{
1486 enum vnic_dev_hw_version hw_ver;
1487 int err;
1488
383ab92f 1489 err = enic_dev_hw_version(enic, &hw_ver);
4badc385
SF		 1490 if (err)
1491 return err;
1492
1493 switch (hw_ver) {
1494 case VNIC_DEV_HW_VER_A1:
1495 enic->rq_alloc_buf = enic_rq_alloc_buf_a1;
1496 break;
1497 case VNIC_DEV_HW_VER_A2:
1498 case VNIC_DEV_HW_VER_UNKNOWN:
1499 enic->rq_alloc_buf = enic_rq_alloc_buf;
1500 break;
1501 default:
1502 return -ENODEV;
1503 }
1504
1505 return 0;
1506}
1507
01f2e4ea
SF		 1508static void enic_rq_indicate_buf(struct vnic_rq *rq,
1509 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1510 int skipped, void *opaque)
1511{
1512 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 1513 struct net_device *netdev = enic->netdev;
01f2e4ea
SF		 1514 struct sk_buff *skb;
1515
1516 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1517 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1518 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1519 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1520 u8 packet_error;
f8cac14a 1521 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
01f2e4ea
SF		 1522 u32 rss_hash;
1523
1524 if (skipped)
1525 return;
1526
1527 skb = buf->os_buf;
1528 prefetch(skb->data - NET_IP_ALIGN);
1529 pci_unmap_single(enic->pdev, buf->dma_addr,
1530 buf->len, PCI_DMA_FROMDEVICE);
1531
1532 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1533 &type, &color, &q_number, &completed_index,
1534 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1535 &csum_not_calc, &rss_hash, &bytes_written,
f8cac14a 1536 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
01f2e4ea
SF		 1537 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1538 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1539 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1540 &fcs_ok);
1541
1542 if (packet_error) {
1543
350991e1
SF		 1544 if (!fcs_ok) {
1545 if (bytes_written > 0)
1546 enic->rq_bad_fcs++;
1547 else if (bytes_written == 0)
1548 enic->rq_truncated_pkts++;
1549 }
01f2e4ea
SF		 1550
1551 dev_kfree_skb_any(skb);
1552
1553 return;
1554 }
1555
1556 if (eop && bytes_written > 0) {
1557
1558 /* Good receive
1559 */
1560
1561 skb_put(skb, bytes_written);
86ca9db7 1562 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea
SF		 1563
1564 if (enic->csum_rx_enabled && !csum_not_calc) {
1565 skb->csum = htons(checksum);
1566 skb->ip_summed = CHECKSUM_COMPLETE;
1567 }
1568
86ca9db7 1569 skb->dev = netdev;
01f2e4ea 1570
f8cac14a
VK		 1571 if (enic->vlan_group && vlan_stripped &&
1572 (vlan_tci & CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK)) {
01f2e4ea 1573
88132f55 1574 if (netdev->features & NETIF_F_GRO)
717258ba
VK		 1575 vlan_gro_receive(&enic->napi[q_number],
1576 enic->vlan_group, vlan_tci, skb);
01f2e4ea
SF		 1577 else
1578 vlan_hwaccel_receive_skb(skb,
f8cac14a 1579 enic->vlan_group, vlan_tci);
01f2e4ea
SF		 1580
1581 } else {
1582
88132f55 1583 if (netdev->features & NETIF_F_GRO)
717258ba 1584 napi_gro_receive(&enic->napi[q_number], skb);
01f2e4ea
SF		 1585 else
1586 netif_receive_skb(skb);
1587
1588 }
01f2e4ea
SF		 1589 } else {
1590
1591 /* Buffer overflow
1592 */
1593
1594 dev_kfree_skb_any(skb);
1595 }
1596}
1597
1598static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1599 u8 type, u16 q_number, u16 completed_index, void *opaque)
1600{
1601 struct enic *enic = vnic_dev_priv(vdev);
1602
1603 vnic_rq_service(&enic->rq[q_number], cq_desc,
1604 completed_index, VNIC_RQ_RETURN_DESC,
1605 enic_rq_indicate_buf, opaque);
1606
1607 return 0;
1608}
1609
01f2e4ea
SF		 1610static int enic_poll(struct napi_struct *napi, int budget)
1611{
717258ba
VK		 1612 struct net_device *netdev = napi->dev;
1613 struct enic *enic = netdev_priv(netdev);
1614 unsigned int cq_rq = enic_cq_rq(enic, 0);
1615 unsigned int cq_wq = enic_cq_wq(enic, 0);
1616 unsigned int intr = enic_legacy_io_intr();
01f2e4ea
SF		 1617 unsigned int rq_work_to_do = budget;
1618 unsigned int wq_work_to_do = -1; /* no limit */
1619 unsigned int work_done, rq_work_done, wq_work_done;
2d6ddced 1620 int err;
01f2e4ea
SF		 1621
1622 /* Service RQ (first) and WQ
1623 */
1624
717258ba 1625 rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
01f2e4ea
SF		 1626 rq_work_to_do, enic_rq_service, NULL);
1627
717258ba 1628 wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
01f2e4ea
SF		 1629 wq_work_to_do, enic_wq_service, NULL);
1630
1631 /* Accumulate intr event credits for this polling
1632 * cycle. An intr event is the completion of a
1633 * a WQ or RQ packet.
1634 */
1635
1636 work_done = rq_work_done + wq_work_done;
1637
1638 if (work_done > 0)
717258ba 1639 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1640 work_done,
1641 0 /* don't unmask intr */,
1642 0 /* don't reset intr timer */);
1643
2d6ddced 1644 err = vnic_rq_fill(&enic->rq[0], enic->rq_alloc_buf);
01f2e4ea 1645
2d6ddced
SF		 1646 /* Buffer allocation failed. Stay in polling
1647 * mode so we can try to fill the ring again.
1648 */
01f2e4ea 1649
2d6ddced
SF		 1650 if (err)
1651 rq_work_done = rq_work_to_do;
01f2e4ea 1652
2d6ddced 1653 if (rq_work_done < rq_work_to_do) {
01f2e4ea 1654
2d6ddced 1655 /* Some work done, but not enough to stay in polling,
88132f55 1656 * exit polling
01f2e4ea
SF		 1657 */
1658
288379f0 1659 napi_complete(napi);
717258ba 1660 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1661 }
1662
1663 return rq_work_done;
1664}
1665
1666static int enic_poll_msix(struct napi_struct *napi, int budget)
1667{
717258ba
VK		 1668 struct net_device *netdev = napi->dev;
1669 struct enic *enic = netdev_priv(netdev);
1670 unsigned int rq = (napi - &enic->napi[0]);
1671 unsigned int cq = enic_cq_rq(enic, rq);
1672 unsigned int intr = enic_msix_rq_intr(enic, rq);
01f2e4ea
SF		 1673 unsigned int work_to_do = budget;
1674 unsigned int work_done;
2d6ddced 1675 int err;
01f2e4ea
SF		 1676
1677 /* Service RQ
1678 */
1679
717258ba 1680 work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 1681 work_to_do, enic_rq_service, NULL);
1682
2d6ddced
SF		 1683 /* Return intr event credits for this polling
1684 * cycle. An intr event is the completion of a
1685 * RQ packet.
1686 */
01f2e4ea 1687
2d6ddced 1688 if (work_done > 0)
717258ba 1689 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1690 work_done,
1691 0 /* don't unmask intr */,
1692 0 /* don't reset intr timer */);
01f2e4ea 1693
717258ba 1694 err = vnic_rq_fill(&enic->rq[rq], enic->rq_alloc_buf);
2d6ddced
SF		 1695
1696 /* Buffer allocation failed. Stay in polling mode
1697 * so we can try to fill the ring again.
1698 */
1699
1700 if (err)
1701 work_done = work_to_do;
1702
1703 if (work_done < work_to_do) {
1704
1705 /* Some work done, but not enough to stay in polling,
88132f55 1706 * exit polling
01f2e4ea
SF		 1707 */
1708
288379f0 1709 napi_complete(napi);
717258ba 1710 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1711 }
1712
1713 return work_done;
1714}
1715
1716static void enic_notify_timer(unsigned long data)
1717{
1718 struct enic *enic = (struct enic *)data;
1719
1720 enic_notify_check(enic);
1721
25f0a061
SF		 1722 mod_timer(&enic->notify_timer,
1723 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF		 1724}
1725
1726static void enic_free_intr(struct enic *enic)
1727{
1728 struct net_device *netdev = enic->netdev;
1729 unsigned int i;
1730
1731 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1732 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF		 1733 free_irq(enic->pdev->irq, netdev);
1734 break;
8f4d248c
SF		 1735 case VNIC_DEV_INTR_MODE_MSI:
1736 free_irq(enic->pdev->irq, enic);
1737 break;
01f2e4ea
SF		 1738 case VNIC_DEV_INTR_MODE_MSIX:
1739 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1740 if (enic->msix[i].requested)
1741 free_irq(enic->msix_entry[i].vector,
1742 enic->msix[i].devid);
1743 break;
1744 default:
1745 break;
1746 }
1747}
1748
1749static int enic_request_intr(struct enic *enic)
1750{
1751 struct net_device *netdev = enic->netdev;
717258ba 1752 unsigned int i, intr;
01f2e4ea
SF		 1753 int err = 0;
1754
1755 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1756
1757 case VNIC_DEV_INTR_MODE_INTX:
1758
1759 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1760 IRQF_SHARED, netdev->name, netdev);
1761 break;
1762
1763 case VNIC_DEV_INTR_MODE_MSI:
1764
1765 err = request_irq(enic->pdev->irq, enic_isr_msi,
1766 0, netdev->name, enic);
1767 break;
1768
1769 case VNIC_DEV_INTR_MODE_MSIX:
1770
717258ba
VK		 1771 for (i = 0; i < enic->rq_count; i++) {
1772 intr = enic_msix_rq_intr(enic, i);
1773 sprintf(enic->msix[intr].devname,
1774 "%.11s-rx-%d", netdev->name, i);
1775 enic->msix[intr].isr = enic_isr_msix_rq;
1776 enic->msix[intr].devid = &enic->napi[i];
1777 }
01f2e4ea 1778
717258ba
VK		 1779 for (i = 0; i < enic->wq_count; i++) {
1780 intr = enic_msix_wq_intr(enic, i);
1781 sprintf(enic->msix[intr].devname,
1782 "%.11s-tx-%d", netdev->name, i);
1783 enic->msix[intr].isr = enic_isr_msix_wq;
1784 enic->msix[intr].devid = enic;
1785 }
01f2e4ea 1786
717258ba
VK		 1787 intr = enic_msix_err_intr(enic);
1788 sprintf(enic->msix[intr].devname,
01f2e4ea 1789 "%.11s-err", netdev->name);
717258ba
VK		 1790 enic->msix[intr].isr = enic_isr_msix_err;
1791 enic->msix[intr].devid = enic;
01f2e4ea 1792
717258ba
VK		 1793 intr = enic_msix_notify_intr(enic);
1794 sprintf(enic->msix[intr].devname,
01f2e4ea 1795 "%.11s-notify", netdev->name);
717258ba
VK		 1796 enic->msix[intr].isr = enic_isr_msix_notify;
1797 enic->msix[intr].devid = enic;
1798
1799 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1800 enic->msix[i].requested = 0;
01f2e4ea 1801
717258ba 1802 for (i = 0; i < enic->intr_count; i++) {
01f2e4ea
SF		 1803 err = request_irq(enic->msix_entry[i].vector,
1804 enic->msix[i].isr, 0,
1805 enic->msix[i].devname,
1806 enic->msix[i].devid);
1807 if (err) {
1808 enic_free_intr(enic);
1809 break;
1810 }
1811 enic->msix[i].requested = 1;
1812 }
1813
1814 break;
1815
1816 default:
1817 break;
1818 }
1819
1820 return err;
1821}
1822
b3d18d19
SF		 1823static void enic_synchronize_irqs(struct enic *enic)
1824{
1825 unsigned int i;
1826
1827 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1828 case VNIC_DEV_INTR_MODE_INTX:
1829 case VNIC_DEV_INTR_MODE_MSI:
1830 synchronize_irq(enic->pdev->irq);
1831 break;
1832 case VNIC_DEV_INTR_MODE_MSIX:
1833 for (i = 0; i < enic->intr_count; i++)
1834 synchronize_irq(enic->msix_entry[i].vector);
1835 break;
1836 default:
1837 break;
1838 }
1839}
1840
383ab92f 1841static int enic_dev_notify_set(struct enic *enic)
01f2e4ea
SF		 1842{
1843 int err;
1844
56ac88b3 1845 spin_lock(&enic->devcmd_lock);
01f2e4ea
SF		 1846 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1847 case VNIC_DEV_INTR_MODE_INTX:
717258ba
VK		 1848 err = vnic_dev_notify_set(enic->vdev,
1849 enic_legacy_notify_intr());
01f2e4ea
SF		 1850 break;
1851 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1852 err = vnic_dev_notify_set(enic->vdev,
1853 enic_msix_notify_intr(enic));
01f2e4ea
SF		 1854 break;
1855 default:
1856 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1857 break;
1858 }
56ac88b3 1859 spin_unlock(&enic->devcmd_lock);
01f2e4ea
SF		 1860
1861 return err;
1862}
1863
383ab92f
VK		 1864static int enic_dev_notify_unset(struct enic *enic)
1865{
1866 int err;
1867
1868 spin_lock(&enic->devcmd_lock);
1869 err = vnic_dev_notify_unset(enic->vdev);
1870 spin_unlock(&enic->devcmd_lock);
1871
1872 return err;
1873}
1874
1875static int enic_dev_enable(struct enic *enic)
1876{
1877 int err;
1878
1879 spin_lock(&enic->devcmd_lock);
2db77e0f 1880 err = vnic_dev_enable_wait(enic->vdev);
383ab92f
VK		 1881 spin_unlock(&enic->devcmd_lock);
1882
1883 return err;
1884}
1885
1886static int enic_dev_disable(struct enic *enic)
1887{
1888 int err;
1889
1890 spin_lock(&enic->devcmd_lock);
1891 err = vnic_dev_disable(enic->vdev);
1892 spin_unlock(&enic->devcmd_lock);
1893
1894 return err;
1895}
1896
01f2e4ea
SF		 1897static void enic_notify_timer_start(struct enic *enic)
1898{
1899 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1900 case VNIC_DEV_INTR_MODE_MSI:
1901 mod_timer(&enic->notify_timer, jiffies);
1902 break;
1903 default:
1904 /* Using intr for notification for INTx/MSI-X */
1905 break;
1906 };
1907}
1908
1909/* rtnl lock is held, process context */
1910static int enic_open(struct net_device *netdev)
1911{
1912 struct enic *enic = netdev_priv(netdev);
1913 unsigned int i;
1914 int err;
1915
4b75a442
SF		 1916 err = enic_request_intr(enic);
1917 if (err) {
a7a79deb 1918 netdev_err(netdev, "Unable to request irq.\n");
4b75a442
SF		 1919 return err;
1920 }
1921
383ab92f 1922 err = enic_dev_notify_set(enic);
4b75a442 1923 if (err) {
a7a79deb
VK		 1924 netdev_err(netdev,
1925 "Failed to alloc notify buffer, aborting.\n");
4b75a442
SF		 1926 goto err_out_free_intr;
1927 }
1928
01f2e4ea 1929 for (i = 0; i < enic->rq_count; i++) {
2d6ddced
SF		 1930 vnic_rq_fill(&enic->rq[i], enic->rq_alloc_buf);
1931 /* Need at least one buffer on ring to get going */
1932 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
a7a79deb 1933 netdev_err(netdev, "Unable to alloc receive buffers\n");
2d6ddced 1934 err = -ENOMEM;
4b75a442 1935 goto err_out_notify_unset;
01f2e4ea
SF		 1936 }
1937 }
1938
1939 for (i = 0; i < enic->wq_count; i++)
1940 vnic_wq_enable(&enic->wq[i]);
1941 for (i = 0; i < enic->rq_count; i++)
1942 vnic_rq_enable(&enic->rq[i]);
1943
f8bd9091 1944 enic_dev_add_station_addr(enic);
319d7e84 1945 enic_set_rx_mode(netdev);
01f2e4ea
SF		 1946
1947 netif_wake_queue(netdev);
717258ba
VK		 1948
1949 for (i = 0; i < enic->rq_count; i++)
1950 napi_enable(&enic->napi[i]);
1951
383ab92f 1952 enic_dev_enable(enic);
01f2e4ea
SF		 1953
1954 for (i = 0; i < enic->intr_count; i++)
1955 vnic_intr_unmask(&enic->intr[i]);
1956
1957 enic_notify_timer_start(enic);
1958
1959 return 0;
4b75a442
SF		 1960
1961err_out_notify_unset:
383ab92f 1962 enic_dev_notify_unset(enic);
4b75a442
SF		 1963err_out_free_intr:
1964 enic_free_intr(enic);
1965
1966 return err;
01f2e4ea
SF		 1967}
1968
1969/* rtnl lock is held, process context */
1970static int enic_stop(struct net_device *netdev)
1971{
1972 struct enic *enic = netdev_priv(netdev);
1973 unsigned int i;
1974 int err;
1975
29046f9b 1976 for (i = 0; i < enic->intr_count; i++) {
b3d18d19 1977 vnic_intr_mask(&enic->intr[i]);
29046f9b
VK		 1978 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1979 }
b3d18d19
SF		 1980
1981 enic_synchronize_irqs(enic);
1982
01f2e4ea
SF		 1983 del_timer_sync(&enic->notify_timer);
1984
383ab92f 1985 enic_dev_disable(enic);
717258ba
VK		 1986
1987 for (i = 0; i < enic->rq_count; i++)
1988 napi_disable(&enic->napi[i]);
1989
b3d18d19
SF		 1990 netif_carrier_off(netdev);
1991 netif_tx_disable(netdev);
f8bd9091
SF		 1992 enic_dev_del_station_addr(enic);
1993
01f2e4ea
SF		 1994 for (i = 0; i < enic->wq_count; i++) {
1995 err = vnic_wq_disable(&enic->wq[i]);
1996 if (err)
1997 return err;
1998 }
1999 for (i = 0; i < enic->rq_count; i++) {
2000 err = vnic_rq_disable(&enic->rq[i]);
2001 if (err)
2002 return err;
2003 }
2004
383ab92f 2005 enic_dev_notify_unset(enic);
4b75a442
SF		 2006 enic_free_intr(enic);
2007
01f2e4ea
SF		 2008 for (i = 0; i < enic->wq_count; i++)
2009 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
2010 for (i = 0; i < enic->rq_count; i++)
2011 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
2012 for (i = 0; i < enic->cq_count; i++)
2013 vnic_cq_clean(&enic->cq[i]);
2014 for (i = 0; i < enic->intr_count; i++)
2015 vnic_intr_clean(&enic->intr[i]);
2016
2017 return 0;
2018}
2019
2020static int enic_change_mtu(struct net_device *netdev, int new_mtu)
2021{
2022 struct enic *enic = netdev_priv(netdev);
2023 int running = netif_running(netdev);
2024
25f0a061
SF		 2025 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
2026 return -EINVAL;
2027
01f2e4ea
SF		 2028 if (running)
2029 enic_stop(netdev);
2030
01f2e4ea
SF		 2031 netdev->mtu = new_mtu;
2032
2033 if (netdev->mtu > enic->port_mtu)
a7a79deb
VK		 2034 netdev_warn(netdev,
2035 "interface MTU (%d) set higher than port MTU (%d)\n",
2036 netdev->mtu, enic->port_mtu);
01f2e4ea
SF		 2037
2038 if (running)
2039 enic_open(netdev);
2040
2041 return 0;
2042}
2043
2044#ifdef CONFIG_NET_POLL_CONTROLLER
2045static void enic_poll_controller(struct net_device *netdev)
2046{
2047 struct enic *enic = netdev_priv(netdev);
2048 struct vnic_dev *vdev = enic->vdev;
717258ba 2049 unsigned int i, intr;
01f2e4ea
SF		 2050
2051 switch (vnic_dev_get_intr_mode(vdev)) {
2052 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 2053 for (i = 0; i < enic->rq_count; i++) {
2054 intr = enic_msix_rq_intr(enic, i);
2055 enic_isr_msix_rq(enic->msix_entry[intr].vector, enic);
2056 }
2057 intr = enic_msix_wq_intr(enic, i);
2058 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
01f2e4ea
SF		 2059 break;
2060 case VNIC_DEV_INTR_MODE_MSI:
2061 enic_isr_msi(enic->pdev->irq, enic);
2062 break;
2063 case VNIC_DEV_INTR_MODE_INTX:
2064 enic_isr_legacy(enic->pdev->irq, netdev);
2065 break;
2066 default:
2067 break;
2068 }
2069}
2070#endif
2071
2072static int enic_dev_wait(struct vnic_dev *vdev,
2073 int (*start)(struct vnic_dev *, int),
2074 int (*finished)(struct vnic_dev *, int *),
2075 int arg)
2076{
2077 unsigned long time;
2078 int done;
2079 int err;
2080
2081 BUG_ON(in_interrupt());
2082
2083 err = start(vdev, arg);
2084 if (err)
2085 return err;
2086
2087 /* Wait for func to complete...2 seconds max
2088 */
2089
2090 time = jiffies + (HZ * 2);
2091 do {
2092
2093 err = finished(vdev, &done);
2094 if (err)
2095 return err;
2096
2097 if (done)
2098 return 0;
2099
2100 schedule_timeout_uninterruptible(HZ / 10);
2101
2102 } while (time_after(time, jiffies));
2103
2104 return -ETIMEDOUT;
2105}
2106
2107static int enic_dev_open(struct enic *enic)
2108{
2109 int err;
2110
2111 err = enic_dev_wait(enic->vdev, vnic_dev_open,
2112 vnic_dev_open_done, 0);
2113 if (err)
a7a79deb
VK		 2114 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
2115 err);
01f2e4ea
SF		 2116
2117 return err;
2118}
2119
99ef5639 2120static int enic_dev_hang_reset(struct enic *enic)
01f2e4ea
SF		 2121{
2122 int err;
2123
99ef5639
VK		 2124 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
2125 vnic_dev_hang_reset_done, 0);
01f2e4ea 2126 if (err)
a7a79deb
VK		 2127 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
2128 err);
01f2e4ea
SF		 2129
2130 return err;
2131}
2132
717258ba
VK		 2133static int enic_set_rsskey(struct enic *enic)
2134{
1f4f067f 2135 dma_addr_t rss_key_buf_pa;
717258ba
VK		 2136 union vnic_rss_key *rss_key_buf_va = NULL;
2137 union vnic_rss_key rss_key = {
2138 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
2139 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
2140 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
2141 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
2142 };
2143 int err;
2144
2145 rss_key_buf_va = pci_alloc_consistent(enic->pdev,
2146 sizeof(union vnic_rss_key), &rss_key_buf_pa);
2147 if (!rss_key_buf_va)
2148 return -ENOMEM;
2149
2150 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
2151
2152 spin_lock(&enic->devcmd_lock);
2153 err = enic_set_rss_key(enic,
2154 rss_key_buf_pa,
2155 sizeof(union vnic_rss_key));
2156 spin_unlock(&enic->devcmd_lock);
2157
2158 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
2159 rss_key_buf_va, rss_key_buf_pa);
2160
2161 return err;
2162}
2163
2164static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
2165{
1f4f067f 2166 dma_addr_t rss_cpu_buf_pa;
717258ba
VK		 2167 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
2168 unsigned int i;
2169 int err;
2170
2171 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
2172 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
2173 if (!rss_cpu_buf_va)
2174 return -ENOMEM;
2175
2176 for (i = 0; i < (1 << rss_hash_bits); i++)
2177 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
2178
2179 spin_lock(&enic->devcmd_lock);
2180 err = enic_set_rss_cpu(enic,
2181 rss_cpu_buf_pa,
2182 sizeof(union vnic_rss_cpu));
2183 spin_unlock(&enic->devcmd_lock);
2184
2185 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
2186 rss_cpu_buf_va, rss_cpu_buf_pa);
2187
2188 return err;
2189}
2190
2191static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
2192 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
68f71708 2193{
68f71708
SF		 2194 const u8 tso_ipid_split_en = 0;
2195 const u8 ig_vlan_strip_en = 1;
383ab92f 2196 int err;
68f71708 2197
717258ba
VK		 2198 /* Enable VLAN tag stripping.
2199 */
68f71708 2200
383ab92f
VK		 2201 spin_lock(&enic->devcmd_lock);
2202 err = enic_set_nic_cfg(enic,
68f71708
SF		 2203 rss_default_cpu, rss_hash_type,
2204 rss_hash_bits, rss_base_cpu,
2205 rss_enable, tso_ipid_split_en,
2206 ig_vlan_strip_en);
383ab92f
VK		 2207 spin_unlock(&enic->devcmd_lock);
2208
2209 return err;
2210}
2211
717258ba
VK		 2212static int enic_set_rss_nic_cfg(struct enic *enic)
2213{
2214 struct device *dev = enic_get_dev(enic);
2215 const u8 rss_default_cpu = 0;
2216 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
2217 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
2218 NIC_CFG_RSS_HASH_TYPE_IPV6 |
2219 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
2220 const u8 rss_hash_bits = 7;
2221 const u8 rss_base_cpu = 0;
2222 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
2223
2224 if (rss_enable) {
2225 if (!enic_set_rsskey(enic)) {
2226 if (enic_set_rsscpu(enic, rss_hash_bits)) {
2227 rss_enable = 0;
2228 dev_warn(dev, "RSS disabled, "
2229 "Failed to set RSS cpu indirection table.");
2230 }
2231 } else {
2232 rss_enable = 0;
2233 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
2234 }
2235 }
2236
2237 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
2238 rss_hash_bits, rss_base_cpu, rss_enable);
2239}
2240
383ab92f
VK		 2241static int enic_dev_hang_notify(struct enic *enic)
2242{
2243 int err;
2244
2245 spin_lock(&enic->devcmd_lock);
2246 err = vnic_dev_hang_notify(enic->vdev);
2247 spin_unlock(&enic->devcmd_lock);
2248
2249 return err;
68f71708
SF		 2250}
2251
2fdba388 2252static int enic_dev_set_ig_vlan_rewrite_mode(struct enic *enic)
f8cac14a
VK		 2253{
2254 int err;
2255
2256 spin_lock(&enic->devcmd_lock);
2257 err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,
2258 IG_VLAN_REWRITE_MODE_PRIORITY_TAG_DEFAULT_VLAN);
2259 spin_unlock(&enic->devcmd_lock);
2260
2261 return err;
2262}
2263
01f2e4ea
SF		 2264static void enic_reset(struct work_struct *work)
2265{
2266 struct enic *enic = container_of(work, struct enic, reset);
2267
2268 if (!netif_running(enic->netdev))
2269 return;
2270
2271 rtnl_lock();
2272
383ab92f 2273 enic_dev_hang_notify(enic);
01f2e4ea 2274 enic_stop(enic->netdev);
99ef5639
VK		 2275 enic_dev_hang_reset(enic);
2276 enic_reset_multicast_list(enic);
01f2e4ea 2277 enic_init_vnic_resources(enic);
717258ba 2278 enic_set_rss_nic_cfg(enic);
f8cac14a 2279 enic_dev_set_ig_vlan_rewrite_mode(enic);
01f2e4ea
SF		 2280 enic_open(enic->netdev);
2281
2282 rtnl_unlock();
2283}
2284
2285static int enic_set_intr_mode(struct enic *enic)
2286{
717258ba 2287 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
6ba9cdc0 2288 unsigned int m = 1;
01f2e4ea
SF		 2289 unsigned int i;
2290
2291 /* Set interrupt mode (INTx, MSI, MSI-X) depending
717258ba 2292 * on system capabilities.
01f2e4ea
SF		 2293 *
2294 * Try MSI-X first
2295 *
2296 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
2297 * (the second to last INTR is used for WQ/RQ errors)
2298 * (the last INTR is used for notifications)
2299 */
2300
2301 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
2302 for (i = 0; i < n + m + 2; i++)
2303 enic->msix_entry[i].entry = i;
2304
717258ba
VK		 2305 /* Use multiple RQs if RSS is enabled
2306 */
2307
2308 if (ENIC_SETTING(enic, RSS) &&
2309 enic->config.intr_mode < 1 &&
01f2e4ea
SF		 2310 enic->rq_count >= n &&
2311 enic->wq_count >= m &&
2312 enic->cq_count >= n + m &&
717258ba 2313 enic->intr_count >= n + m + 2) {
01f2e4ea 2314
717258ba 2315 if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
01f2e4ea 2316
717258ba
VK		 2317 enic->rq_count = n;
2318 enic->wq_count = m;
2319 enic->cq_count = n + m;
2320 enic->intr_count = n + m + 2;
01f2e4ea 2321
717258ba
VK		 2322 vnic_dev_set_intr_mode(enic->vdev,
2323 VNIC_DEV_INTR_MODE_MSIX);
2324
2325 return 0;
2326 }
2327 }
2328
2329 if (enic->config.intr_mode < 1 &&
2330 enic->rq_count >= 1 &&
2331 enic->wq_count >= m &&
2332 enic->cq_count >= 1 + m &&
2333 enic->intr_count >= 1 + m + 2) {
2334 if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
2335
2336 enic->rq_count = 1;
2337 enic->wq_count = m;
2338 enic->cq_count = 1 + m;
2339 enic->intr_count = 1 + m + 2;
2340
2341 vnic_dev_set_intr_mode(enic->vdev,
2342 VNIC_DEV_INTR_MODE_MSIX);
2343
2344 return 0;
2345 }
01f2e4ea
SF		 2346 }
2347
2348 /* Next try MSI
2349 *
2350 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2351 */
2352
2353 if (enic->config.intr_mode < 2 &&
2354 enic->rq_count >= 1 &&
2355 enic->wq_count >= 1 &&
2356 enic->cq_count >= 2 &&
2357 enic->intr_count >= 1 &&
2358 !pci_enable_msi(enic->pdev)) {
2359
2360 enic->rq_count = 1;
2361 enic->wq_count = 1;
2362 enic->cq_count = 2;
2363 enic->intr_count = 1;
2364
2365 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2366
2367 return 0;
2368 }
2369
2370 /* Next try INTx
2371 *
2372 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2373 * (the first INTR is used for WQ/RQ)
2374 * (the second INTR is used for WQ/RQ errors)
2375 * (the last INTR is used for notifications)
2376 */
2377
2378 if (enic->config.intr_mode < 3 &&
2379 enic->rq_count >= 1 &&
2380 enic->wq_count >= 1 &&
2381 enic->cq_count >= 2 &&
2382 enic->intr_count >= 3) {
2383
2384 enic->rq_count = 1;
2385 enic->wq_count = 1;
2386 enic->cq_count = 2;
2387 enic->intr_count = 3;
2388
2389 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2390
2391 return 0;
2392 }
2393
2394 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2395
2396 return -EINVAL;
2397}
2398
2399static void enic_clear_intr_mode(struct enic *enic)
2400{
2401 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2402 case VNIC_DEV_INTR_MODE_MSIX:
2403 pci_disable_msix(enic->pdev);
2404 break;
2405 case VNIC_DEV_INTR_MODE_MSI:
2406 pci_disable_msi(enic->pdev);
2407 break;
2408 default:
2409 break;
2410 }
2411
2412 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2413}
2414
f8bd9091
SF		 2415static const struct net_device_ops enic_netdev_dynamic_ops = {
2416 .ndo_open = enic_open,
2417 .ndo_stop = enic_stop,
2418 .ndo_start_xmit = enic_hard_start_xmit,
2419 .ndo_get_stats = enic_get_stats,
2420 .ndo_validate_addr = eth_validate_addr,
319d7e84
RP		 2421 .ndo_set_rx_mode = enic_set_rx_mode,
2422 .ndo_set_multicast_list = enic_set_rx_mode,
f8bd9091
SF		 2423 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2424 .ndo_change_mtu = enic_change_mtu,
2425 .ndo_vlan_rx_register = enic_vlan_rx_register,
2426 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2427 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2428 .ndo_tx_timeout = enic_tx_timeout,
2429 .ndo_set_vf_port = enic_set_vf_port,
2430 .ndo_get_vf_port = enic_get_vf_port,
0b1c00fc
RP		 2431#ifdef IFLA_VF_MAX
2432 .ndo_set_vf_mac = enic_set_vf_mac,
2433#endif
f8bd9091
SF		 2434#ifdef CONFIG_NET_POLL_CONTROLLER
2435 .ndo_poll_controller = enic_poll_controller,
2436#endif
2437};
2438
afe29f7a
SH		 2439static const struct net_device_ops enic_netdev_ops = {
2440 .ndo_open = enic_open,
2441 .ndo_stop = enic_stop,
00829823 2442 .ndo_start_xmit = enic_hard_start_xmit,
afe29f7a
SH		 2443 .ndo_get_stats = enic_get_stats,
2444 .ndo_validate_addr = eth_validate_addr,
f8bd9091 2445 .ndo_set_mac_address = enic_set_mac_address,
319d7e84
RP		 2446 .ndo_set_rx_mode = enic_set_rx_mode,
2447 .ndo_set_multicast_list = enic_set_rx_mode,
afe29f7a
SH		 2448 .ndo_change_mtu = enic_change_mtu,
2449 .ndo_vlan_rx_register = enic_vlan_rx_register,
2450 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2451 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2452 .ndo_tx_timeout = enic_tx_timeout,
2453#ifdef CONFIG_NET_POLL_CONTROLLER
2454 .ndo_poll_controller = enic_poll_controller,
2455#endif
2456};
2457
2fdba388 2458static void enic_dev_deinit(struct enic *enic)
6fdfa970 2459{
717258ba
VK		 2460 unsigned int i;
2461
2462 for (i = 0; i < enic->rq_count; i++)
2463 netif_napi_del(&enic->napi[i]);
2464
6fdfa970
SF		 2465 enic_free_vnic_resources(enic);
2466 enic_clear_intr_mode(enic);
2467}
2468
2fdba388 2469static int enic_dev_init(struct enic *enic)
6fdfa970 2470{
a7a79deb 2471 struct device *dev = enic_get_dev(enic);
6fdfa970 2472 struct net_device *netdev = enic->netdev;
717258ba 2473 unsigned int i;
6fdfa970
SF		 2474 int err;
2475
2476 /* Get vNIC configuration
2477 */
2478
2479 err = enic_get_vnic_config(enic);
2480 if (err) {
a7a79deb 2481 dev_err(dev, "Get vNIC configuration failed, aborting\n");
6fdfa970
SF		 2482 return err;
2483 }
2484
2485 /* Get available resource counts
2486 */
2487
2488 enic_get_res_counts(enic);
2489
2490 /* Set interrupt mode based on resource counts and system
2491 * capabilities
2492 */
2493
2494 err = enic_set_intr_mode(enic);
2495 if (err) {
a7a79deb
VK		 2496 dev_err(dev, "Failed to set intr mode based on resource "
2497 "counts and system capabilities, aborting\n");
6fdfa970
SF		 2498 return err;
2499 }
2500
2501 /* Allocate and configure vNIC resources
2502 */
2503
2504 err = enic_alloc_vnic_resources(enic);
2505 if (err) {
a7a79deb 2506 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
6fdfa970
SF		 2507 goto err_out_free_vnic_resources;
2508 }
2509
2510 enic_init_vnic_resources(enic);
2511
2512 err = enic_set_rq_alloc_buf(enic);
2513 if (err) {
a7a79deb 2514 dev_err(dev, "Failed to set RQ buffer allocator, aborting\n");
6fdfa970
SF		 2515 goto err_out_free_vnic_resources;
2516 }
2517
717258ba 2518 err = enic_set_rss_nic_cfg(enic);
6fdfa970 2519 if (err) {
a7a79deb 2520 dev_err(dev, "Failed to config nic, aborting\n");
6fdfa970
SF		 2521 goto err_out_free_vnic_resources;
2522 }
2523
f8cac14a
VK		 2524 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2525 if (err) {
53c90536 2526 dev_err(dev,
f8cac14a
VK		 2527 "Failed to set ingress vlan rewrite mode, aborting.\n");
2528 goto err_out_free_vnic_resources;
2529 }
2530
6fdfa970
SF		 2531 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2532 default:
717258ba 2533 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
6fdfa970
SF		 2534 break;
2535 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 2536 for (i = 0; i < enic->rq_count; i++)
2537 netif_napi_add(netdev, &enic->napi[i],
2538 enic_poll_msix, 64);
6fdfa970
SF		 2539 break;
2540 }
2541
2542 return 0;
2543
2544err_out_free_vnic_resources:
2545 enic_clear_intr_mode(enic);
2546 enic_free_vnic_resources(enic);
2547
2548 return err;
2549}
2550
27e6c7d3
SF		 2551static void enic_iounmap(struct enic *enic)
2552{
2553 unsigned int i;
2554
2555 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2556 if (enic->bar[i].vaddr)
2557 iounmap(enic->bar[i].vaddr);
2558}
2559
01f2e4ea
SF		 2560static int __devinit enic_probe(struct pci_dev *pdev,
2561 const struct pci_device_id *ent)
2562{
a7a79deb 2563 struct device *dev = &pdev->dev;
01f2e4ea
SF		 2564 struct net_device *netdev;
2565 struct enic *enic;
2566 int using_dac = 0;
2567 unsigned int i;
2568 int err;
2569
01f2e4ea
SF		 2570 /* Allocate net device structure and initialize. Private
2571 * instance data is initialized to zero.
2572 */
2573
2574 netdev = alloc_etherdev(sizeof(struct enic));
2575 if (!netdev) {
a7a79deb 2576 pr_err("Etherdev alloc failed, aborting\n");
01f2e4ea
SF		 2577 return -ENOMEM;
2578 }
2579
01f2e4ea
SF		 2580 pci_set_drvdata(pdev, netdev);
2581
2582 SET_NETDEV_DEV(netdev, &pdev->dev);
2583
2584 enic = netdev_priv(netdev);
2585 enic->netdev = netdev;
2586 enic->pdev = pdev;
2587
2588 /* Setup PCI resources
2589 */
2590
29046f9b 2591 err = pci_enable_device_mem(pdev);
01f2e4ea 2592 if (err) {
a7a79deb 2593 dev_err(dev, "Cannot enable PCI device, aborting\n");
01f2e4ea
SF		 2594 goto err_out_free_netdev;
2595 }
2596
2597 err = pci_request_regions(pdev, DRV_NAME);
2598 if (err) {
a7a79deb 2599 dev_err(dev, "Cannot request PCI regions, aborting\n");
01f2e4ea
SF		 2600 goto err_out_disable_device;
2601 }
2602
2603 pci_set_master(pdev);
2604
2605 /* Query PCI controller on system for DMA addressing
2606 * limitation for the device. Try 40-bit first, and
2607 * fail to 32-bit.
2608 */
2609
50cf156a 2610 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2611 if (err) {
284901a9 2612 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2613 if (err) {
a7a79deb 2614 dev_err(dev, "No usable DMA configuration, aborting\n");
01f2e4ea
SF		 2615 goto err_out_release_regions;
2616 }
284901a9 2617 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2618 if (err) {
a7a79deb
VK		 2619 dev_err(dev, "Unable to obtain %u-bit DMA "
2620 "for consistent allocations, aborting\n", 32);
01f2e4ea
SF		 2621 goto err_out_release_regions;
2622 }
2623 } else {
50cf156a 2624 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2625 if (err) {
a7a79deb
VK		 2626 dev_err(dev, "Unable to obtain %u-bit DMA "
2627 "for consistent allocations, aborting\n", 40);
01f2e4ea
SF		 2628 goto err_out_release_regions;
2629 }
2630 using_dac = 1;
2631 }
2632
27e6c7d3 2633 /* Map vNIC resources from BAR0-5
01f2e4ea
SF		 2634 */
2635
27e6c7d3
SF		 2636 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2637 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2638 continue;
2639 enic->bar[i].len = pci_resource_len(pdev, i);
2640 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2641 if (!enic->bar[i].vaddr) {
a7a79deb 2642 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
27e6c7d3
SF		 2643 err = -ENODEV;
2644 goto err_out_iounmap;
2645 }
2646 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF		 2647 }
2648
2649 /* Register vNIC device
2650 */
2651
27e6c7d3
SF		 2652 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2653 ARRAY_SIZE(enic->bar));
01f2e4ea 2654 if (!enic->vdev) {
a7a79deb 2655 dev_err(dev, "vNIC registration failed, aborting\n");
01f2e4ea
SF		 2656 err = -ENODEV;
2657 goto err_out_iounmap;
2658 }
2659
2660 /* Issue device open to get device in known state
2661 */
2662
2663 err = enic_dev_open(enic);
2664 if (err) {
a7a79deb 2665 dev_err(dev, "vNIC dev open failed, aborting\n");
01f2e4ea
SF		 2666 goto err_out_vnic_unregister;
2667 }
2668
2669 /* Issue device init to initialize the vnic-to-switch link.
2670 * We'll start with carrier off and wait for link UP
2671 * notification later to turn on carrier. We don't need
2672 * to wait here for the vnic-to-switch link initialization
2673 * to complete; link UP notification is the indication that
2674 * the process is complete.
2675 */
2676
2677 netif_carrier_off(netdev);
2678
a7a79deb
VK		 2679 /* Do not call dev_init for a dynamic vnic.
2680 * For a dynamic vnic, init_prov_info will be
2681 * called later by an upper layer.
2682 */
2683
f8bd9091
SF		 2684 if (!enic_is_dynamic(enic)) {
2685 err = vnic_dev_init(enic->vdev, 0);
2686 if (err) {
a7a79deb 2687 dev_err(dev, "vNIC dev init failed, aborting\n");
f8bd9091
SF		 2688 goto err_out_dev_close;
2689 }
01f2e4ea
SF		 2690 }
2691
383ab92f
VK		 2692 /* Setup devcmd lock
2693 */
2694
2695 spin_lock_init(&enic->devcmd_lock);
2696
6fdfa970 2697 err = enic_dev_init(enic);
01f2e4ea 2698 if (err) {
a7a79deb 2699 dev_err(dev, "Device initialization failed, aborting\n");
01f2e4ea
SF		 2700 goto err_out_dev_close;
2701 }
2702
383ab92f 2703 /* Setup notification timer, HW reset task, and wq locks
01f2e4ea
SF		 2704 */
2705
2706 init_timer(&enic->notify_timer);
2707 enic->notify_timer.function = enic_notify_timer;
2708 enic->notify_timer.data = (unsigned long)enic;
2709
2710 INIT_WORK(&enic->reset, enic_reset);
2711
2712 for (i = 0; i < enic->wq_count; i++)
2713 spin_lock_init(&enic->wq_lock[i]);
2714
01f2e4ea
SF		 2715 /* Register net device
2716 */
2717
2718 enic->port_mtu = enic->config.mtu;
2719 (void)enic_change_mtu(netdev, enic->port_mtu);
2720
2721 err = enic_set_mac_addr(netdev, enic->mac_addr);
2722 if (err) {
a7a79deb 2723 dev_err(dev, "Invalid MAC address, aborting\n");
6fdfa970 2724 goto err_out_dev_deinit;
01f2e4ea
SF		 2725 }
2726
7c844599
SF		 2727 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2728 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2729
f8bd9091
SF		 2730 if (enic_is_dynamic(enic))
2731 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2732 else
2733 netdev->netdev_ops = &enic_netdev_ops;
2734
01f2e4ea
SF		 2735 netdev->watchdog_timeo = 2 * HZ;
2736 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea 2737
73c1ea9b 2738 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1825aca6
VK		 2739 if (ENIC_SETTING(enic, LOOP)) {
2740 netdev->features &= ~NETIF_F_HW_VLAN_TX;
2741 enic->loop_enable = 1;
2742 enic->loop_tag = enic->config.loop_tag;
2743 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2744 }
01f2e4ea
SF		 2745 if (ENIC_SETTING(enic, TXCSUM))
2746 netdev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
2747 if (ENIC_SETTING(enic, TSO))
2748 netdev->features |= NETIF_F_TSO |
2749 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
86ca9db7 2750 if (ENIC_SETTING(enic, LRO))
88132f55 2751 netdev->features |= NETIF_F_GRO;
01f2e4ea
SF		 2752 if (using_dac)
2753 netdev->features |= NETIF_F_HIGHDMA;
2754
01f2e4ea
SF		 2755 enic->csum_rx_enabled = ENIC_SETTING(enic, RXCSUM);
2756
01f2e4ea
SF		 2757 err = register_netdev(netdev);
2758 if (err) {
a7a79deb 2759 dev_err(dev, "Cannot register net device, aborting\n");
6fdfa970 2760 goto err_out_dev_deinit;
01f2e4ea
SF		 2761 }
2762
2763 return 0;
2764
6fdfa970
SF		 2765err_out_dev_deinit:
2766 enic_dev_deinit(enic);
01f2e4ea
SF		 2767err_out_dev_close:
2768 vnic_dev_close(enic->vdev);
2769err_out_vnic_unregister:
01f2e4ea
SF		 2770 vnic_dev_unregister(enic->vdev);
2771err_out_iounmap:
2772 enic_iounmap(enic);
2773err_out_release_regions:
2774 pci_release_regions(pdev);
2775err_out_disable_device:
2776 pci_disable_device(pdev);
2777err_out_free_netdev:
2778 pci_set_drvdata(pdev, NULL);
2779 free_netdev(netdev);
2780
2781 return err;
2782}
2783
2784static void __devexit enic_remove(struct pci_dev *pdev)
2785{
2786 struct net_device *netdev = pci_get_drvdata(pdev);
2787
2788 if (netdev) {
2789 struct enic *enic = netdev_priv(netdev);
2790
2791 flush_scheduled_work();
2792 unregister_netdev(netdev);
6fdfa970 2793 enic_dev_deinit(enic);
01f2e4ea 2794 vnic_dev_close(enic->vdev);
01f2e4ea
SF		 2795 vnic_dev_unregister(enic->vdev);
2796 enic_iounmap(enic);
2797 pci_release_regions(pdev);
2798 pci_disable_device(pdev);
2799 pci_set_drvdata(pdev, NULL);
2800 free_netdev(netdev);
2801 }
2802}
2803
2804static struct pci_driver enic_driver = {
2805 .name = DRV_NAME,
2806 .id_table = enic_id_table,
2807 .probe = enic_probe,
2808 .remove = __devexit_p(enic_remove),
2809};
2810
2811static int __init enic_init_module(void)
2812{
a7a79deb 2813 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
01f2e4ea
SF		 2814
2815 return pci_register_driver(&enic_driver);
2816}
2817
2818static void __exit enic_cleanup_module(void)
2819{
2820 pci_unregister_driver(&enic_driver);
2821}
2822
2823module_init(enic_init_module);
2824module_exit(enic_cleanup_module);
Linux 6.x block layer and io_uring tree(s)