e1000e: Fix/cleanup PHY reset code for ICHx/PCHx
[linux-block.git] / drivers / net / e1000e / netdev.c
CommitLineData
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1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
c7e54b1b 4 Copyright(c) 1999 - 2009 Intel Corporation.
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5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
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29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
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31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
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42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
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52
53#include "e1000.h"
54
eab2abf5 55#define DRV_VERSION "1.0.2-k4"
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56char e1000e_driver_name[] = "e1000e";
57const char e1000e_driver_version[] = DRV_VERSION;
58
59static const struct e1000_info *e1000_info_tbl[] = {
60 [board_82571] = &e1000_82571_info,
61 [board_82572] = &e1000_82572_info,
62 [board_82573] = &e1000_82573_info,
4662e82b 63 [board_82574] = &e1000_82574_info,
8c81c9c3 64 [board_82583] = &e1000_82583_info,
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65 [board_80003es2lan] = &e1000_es2_info,
66 [board_ich8lan] = &e1000_ich8_info,
67 [board_ich9lan] = &e1000_ich9_info,
f4187b56 68 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 69 [board_pchlan] = &e1000_pch_info,
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70};
71
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72struct e1000_reg_info {
73 u32 ofs;
74 char *name;
75};
76
77#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
78#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
79#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
80#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
81#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
82
83#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
84#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
85#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
86#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
87#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
88
89static const struct e1000_reg_info e1000_reg_info_tbl[] = {
90
91 /* General Registers */
92 {E1000_CTRL, "CTRL"},
93 {E1000_STATUS, "STATUS"},
94 {E1000_CTRL_EXT, "CTRL_EXT"},
95
96 /* Interrupt Registers */
97 {E1000_ICR, "ICR"},
98
99 /* RX Registers */
100 {E1000_RCTL, "RCTL"},
101 {E1000_RDLEN, "RDLEN"},
102 {E1000_RDH, "RDH"},
103 {E1000_RDT, "RDT"},
104 {E1000_RDTR, "RDTR"},
105 {E1000_RXDCTL(0), "RXDCTL"},
106 {E1000_ERT, "ERT"},
107 {E1000_RDBAL, "RDBAL"},
108 {E1000_RDBAH, "RDBAH"},
109 {E1000_RDFH, "RDFH"},
110 {E1000_RDFT, "RDFT"},
111 {E1000_RDFHS, "RDFHS"},
112 {E1000_RDFTS, "RDFTS"},
113 {E1000_RDFPC, "RDFPC"},
114
115 /* TX Registers */
116 {E1000_TCTL, "TCTL"},
117 {E1000_TDBAL, "TDBAL"},
118 {E1000_TDBAH, "TDBAH"},
119 {E1000_TDLEN, "TDLEN"},
120 {E1000_TDH, "TDH"},
121 {E1000_TDT, "TDT"},
122 {E1000_TIDV, "TIDV"},
123 {E1000_TXDCTL(0), "TXDCTL"},
124 {E1000_TADV, "TADV"},
125 {E1000_TARC(0), "TARC"},
126 {E1000_TDFH, "TDFH"},
127 {E1000_TDFT, "TDFT"},
128 {E1000_TDFHS, "TDFHS"},
129 {E1000_TDFTS, "TDFTS"},
130 {E1000_TDFPC, "TDFPC"},
131
132 /* List Terminator */
133 {}
134};
135
136/*
137 * e1000_regdump - register printout routine
138 */
139static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
140{
141 int n = 0;
142 char rname[16];
143 u32 regs[8];
144
145 switch (reginfo->ofs) {
146 case E1000_RXDCTL(0):
147 for (n = 0; n < 2; n++)
148 regs[n] = __er32(hw, E1000_RXDCTL(n));
149 break;
150 case E1000_TXDCTL(0):
151 for (n = 0; n < 2; n++)
152 regs[n] = __er32(hw, E1000_TXDCTL(n));
153 break;
154 case E1000_TARC(0):
155 for (n = 0; n < 2; n++)
156 regs[n] = __er32(hw, E1000_TARC(n));
157 break;
158 default:
159 printk(KERN_INFO "%-15s %08x\n",
160 reginfo->name, __er32(hw, reginfo->ofs));
161 return;
162 }
163
164 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
165 printk(KERN_INFO "%-15s ", rname);
166 for (n = 0; n < 2; n++)
167 printk(KERN_CONT "%08x ", regs[n]);
168 printk(KERN_CONT "\n");
169}
170
171
172/*
173 * e1000e_dump - Print registers, tx-ring and rx-ring
174 */
175static void e1000e_dump(struct e1000_adapter *adapter)
176{
177 struct net_device *netdev = adapter->netdev;
178 struct e1000_hw *hw = &adapter->hw;
179 struct e1000_reg_info *reginfo;
180 struct e1000_ring *tx_ring = adapter->tx_ring;
181 struct e1000_tx_desc *tx_desc;
182 struct my_u0 { u64 a; u64 b; } *u0;
183 struct e1000_buffer *buffer_info;
184 struct e1000_ring *rx_ring = adapter->rx_ring;
185 union e1000_rx_desc_packet_split *rx_desc_ps;
186 struct e1000_rx_desc *rx_desc;
187 struct my_u1 { u64 a; u64 b; u64 c; u64 d; } *u1;
188 u32 staterr;
189 int i = 0;
190
191 if (!netif_msg_hw(adapter))
192 return;
193
194 /* Print netdevice Info */
195 if (netdev) {
196 dev_info(&adapter->pdev->dev, "Net device Info\n");
197 printk(KERN_INFO "Device Name state "
198 "trans_start last_rx\n");
199 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
200 netdev->name,
201 netdev->state,
202 netdev->trans_start,
203 netdev->last_rx);
204 }
205
206 /* Print Registers */
207 dev_info(&adapter->pdev->dev, "Register Dump\n");
208 printk(KERN_INFO " Register Name Value\n");
209 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
210 reginfo->name; reginfo++) {
211 e1000_regdump(hw, reginfo);
212 }
213
214 /* Print TX Ring Summary */
215 if (!netdev || !netif_running(netdev))
216 goto exit;
217
218 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
219 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
220 " leng ntw timestamp\n");
221 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
222 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
223 0, tx_ring->next_to_use, tx_ring->next_to_clean,
224 (u64)buffer_info->dma,
225 buffer_info->length,
226 buffer_info->next_to_watch,
227 (u64)buffer_info->time_stamp);
228
229 /* Print TX Rings */
230 if (!netif_msg_tx_done(adapter))
231 goto rx_ring_summary;
232
233 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
234
235 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
236 *
237 * Legacy Transmit Descriptor
238 * +--------------------------------------------------------------+
239 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
240 * +--------------------------------------------------------------+
241 * 8 | Special | CSS | Status | CMD | CSO | Length |
242 * +--------------------------------------------------------------+
243 * 63 48 47 36 35 32 31 24 23 16 15 0
244 *
245 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
246 * 63 48 47 40 39 32 31 16 15 8 7 0
247 * +----------------------------------------------------------------+
248 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
249 * +----------------------------------------------------------------+
250 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
251 * +----------------------------------------------------------------+
252 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
253 *
254 * Extended Data Descriptor (DTYP=0x1)
255 * +----------------------------------------------------------------+
256 * 0 | Buffer Address [63:0] |
257 * +----------------------------------------------------------------+
258 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
259 * +----------------------------------------------------------------+
260 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
261 */
262 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
263 " [bi->dma ] leng ntw timestamp bi->skb "
264 "<-- Legacy format\n");
265 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
266 " [bi->dma ] leng ntw timestamp bi->skb "
267 "<-- Ext Context format\n");
268 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
269 " [bi->dma ] leng ntw timestamp bi->skb "
270 "<-- Ext Data format\n");
271 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
272 tx_desc = E1000_TX_DESC(*tx_ring, i);
273 buffer_info = &tx_ring->buffer_info[i];
274 u0 = (struct my_u0 *)tx_desc;
275 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
276 "%04X %3X %016llX %p",
277 (!(le64_to_cpu(u0->b) & (1<<29)) ? 'l' :
278 ((le64_to_cpu(u0->b) & (1<<20)) ? 'd' : 'c')), i,
279 le64_to_cpu(u0->a), le64_to_cpu(u0->b),
280 (u64)buffer_info->dma, buffer_info->length,
281 buffer_info->next_to_watch, (u64)buffer_info->time_stamp,
282 buffer_info->skb);
283 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
284 printk(KERN_CONT " NTC/U\n");
285 else if (i == tx_ring->next_to_use)
286 printk(KERN_CONT " NTU\n");
287 else if (i == tx_ring->next_to_clean)
288 printk(KERN_CONT " NTC\n");
289 else
290 printk(KERN_CONT "\n");
291
292 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
293 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
294 16, 1, phys_to_virt(buffer_info->dma),
295 buffer_info->length, true);
296 }
297
298 /* Print RX Rings Summary */
299rx_ring_summary:
300 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
301 printk(KERN_INFO "Queue [NTU] [NTC]\n");
302 printk(KERN_INFO " %5d %5X %5X\n", 0,
303 rx_ring->next_to_use, rx_ring->next_to_clean);
304
305 /* Print RX Rings */
306 if (!netif_msg_rx_status(adapter))
307 goto exit;
308
309 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
310 switch (adapter->rx_ps_pages) {
311 case 1:
312 case 2:
313 case 3:
314 /* [Extended] Packet Split Receive Descriptor Format
315 *
316 * +-----------------------------------------------------+
317 * 0 | Buffer Address 0 [63:0] |
318 * +-----------------------------------------------------+
319 * 8 | Buffer Address 1 [63:0] |
320 * +-----------------------------------------------------+
321 * 16 | Buffer Address 2 [63:0] |
322 * +-----------------------------------------------------+
323 * 24 | Buffer Address 3 [63:0] |
324 * +-----------------------------------------------------+
325 */
326 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
327 "[buffer 1 63:0 ] "
328 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
329 "[bi->skb] <-- Ext Pkt Split format\n");
330 /* [Extended] Receive Descriptor (Write-Back) Format
331 *
332 * 63 48 47 32 31 13 12 8 7 4 3 0
333 * +------------------------------------------------------+
334 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
335 * | Checksum | Ident | | Queue | | Type |
336 * +------------------------------------------------------+
337 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
338 * +------------------------------------------------------+
339 * 63 48 47 32 31 20 19 0
340 */
341 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
342 "[vl l0 ee es] "
343 "[ l3 l2 l1 hs] [reserved ] ---------------- "
344 "[bi->skb] <-- Ext Rx Write-Back format\n");
345 for (i = 0; i < rx_ring->count; i++) {
346 buffer_info = &rx_ring->buffer_info[i];
347 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
348 u1 = (struct my_u1 *)rx_desc_ps;
349 staterr =
350 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
351 if (staterr & E1000_RXD_STAT_DD) {
352 /* Descriptor Done */
353 printk(KERN_INFO "RWB[0x%03X] %016llX "
354 "%016llX %016llX %016llX "
355 "---------------- %p", i,
356 le64_to_cpu(u1->a),
357 le64_to_cpu(u1->b),
358 le64_to_cpu(u1->c),
359 le64_to_cpu(u1->d),
360 buffer_info->skb);
361 } else {
362 printk(KERN_INFO "R [0x%03X] %016llX "
363 "%016llX %016llX %016llX %016llX %p", i,
364 le64_to_cpu(u1->a),
365 le64_to_cpu(u1->b),
366 le64_to_cpu(u1->c),
367 le64_to_cpu(u1->d),
368 (u64)buffer_info->dma,
369 buffer_info->skb);
370
371 if (netif_msg_pktdata(adapter))
372 print_hex_dump(KERN_INFO, "",
373 DUMP_PREFIX_ADDRESS, 16, 1,
374 phys_to_virt(buffer_info->dma),
375 adapter->rx_ps_bsize0, true);
376 }
377
378 if (i == rx_ring->next_to_use)
379 printk(KERN_CONT " NTU\n");
380 else if (i == rx_ring->next_to_clean)
381 printk(KERN_CONT " NTC\n");
382 else
383 printk(KERN_CONT "\n");
384 }
385 break;
386 default:
387 case 0:
388 /* Legacy Receive Descriptor Format
389 *
390 * +-----------------------------------------------------+
391 * | Buffer Address [63:0] |
392 * +-----------------------------------------------------+
393 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
394 * +-----------------------------------------------------+
395 * 63 48 47 40 39 32 31 16 15 0
396 */
397 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
398 "[vl er S cks ln] [bi->dma ] [bi->skb] "
399 "<-- Legacy format\n");
400 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
401 rx_desc = E1000_RX_DESC(*rx_ring, i);
402 buffer_info = &rx_ring->buffer_info[i];
403 u0 = (struct my_u0 *)rx_desc;
404 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
405 "%016llX %p",
406 i, le64_to_cpu(u0->a), le64_to_cpu(u0->b),
407 (u64)buffer_info->dma, buffer_info->skb);
408 if (i == rx_ring->next_to_use)
409 printk(KERN_CONT " NTU\n");
410 else if (i == rx_ring->next_to_clean)
411 printk(KERN_CONT " NTC\n");
412 else
413 printk(KERN_CONT "\n");
414
415 if (netif_msg_pktdata(adapter))
416 print_hex_dump(KERN_INFO, "",
417 DUMP_PREFIX_ADDRESS,
418 16, 1, phys_to_virt(buffer_info->dma),
419 adapter->rx_buffer_len, true);
420 }
421 }
422
423exit:
424 return;
425}
426
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427/**
428 * e1000_desc_unused - calculate if we have unused descriptors
429 **/
430static int e1000_desc_unused(struct e1000_ring *ring)
431{
432 if (ring->next_to_clean > ring->next_to_use)
433 return ring->next_to_clean - ring->next_to_use - 1;
434
435 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
436}
437
438/**
ad68076e 439 * e1000_receive_skb - helper function to handle Rx indications
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440 * @adapter: board private structure
441 * @status: descriptor status field as written by hardware
442 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
443 * @skb: pointer to sk_buff to be indicated to stack
444 **/
445static void e1000_receive_skb(struct e1000_adapter *adapter,
446 struct net_device *netdev,
447 struct sk_buff *skb,
a39fe742 448 u8 status, __le16 vlan)
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449{
450 skb->protocol = eth_type_trans(skb, netdev);
451
452 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
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453 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
454 le16_to_cpu(vlan), skb);
bc7f75fa 455 else
89c88b16 456 napi_gro_receive(&adapter->napi, skb);
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457}
458
459/**
460 * e1000_rx_checksum - Receive Checksum Offload for 82543
461 * @adapter: board private structure
462 * @status_err: receive descriptor status and error fields
463 * @csum: receive descriptor csum field
464 * @sk_buff: socket buffer with received data
465 **/
466static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
467 u32 csum, struct sk_buff *skb)
468{
469 u16 status = (u16)status_err;
470 u8 errors = (u8)(status_err >> 24);
471 skb->ip_summed = CHECKSUM_NONE;
472
473 /* Ignore Checksum bit is set */
474 if (status & E1000_RXD_STAT_IXSM)
475 return;
476 /* TCP/UDP checksum error bit is set */
477 if (errors & E1000_RXD_ERR_TCPE) {
478 /* let the stack verify checksum errors */
479 adapter->hw_csum_err++;
480 return;
481 }
482
483 /* TCP/UDP Checksum has not been calculated */
484 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
485 return;
486
487 /* It must be a TCP or UDP packet with a valid checksum */
488 if (status & E1000_RXD_STAT_TCPCS) {
489 /* TCP checksum is good */
490 skb->ip_summed = CHECKSUM_UNNECESSARY;
491 } else {
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492 /*
493 * IP fragment with UDP payload
494 * Hardware complements the payload checksum, so we undo it
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495 * and then put the value in host order for further stack use.
496 */
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497 __sum16 sum = (__force __sum16)htons(csum);
498 skb->csum = csum_unfold(~sum);
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499 skb->ip_summed = CHECKSUM_COMPLETE;
500 }
501 adapter->hw_csum_good++;
502}
503
504/**
505 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
506 * @adapter: address of board private structure
507 **/
508static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
509 int cleaned_count)
510{
511 struct net_device *netdev = adapter->netdev;
512 struct pci_dev *pdev = adapter->pdev;
513 struct e1000_ring *rx_ring = adapter->rx_ring;
514 struct e1000_rx_desc *rx_desc;
515 struct e1000_buffer *buffer_info;
516 struct sk_buff *skb;
517 unsigned int i;
89d71a66 518 unsigned int bufsz = adapter->rx_buffer_len;
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519
520 i = rx_ring->next_to_use;
521 buffer_info = &rx_ring->buffer_info[i];
522
523 while (cleaned_count--) {
524 skb = buffer_info->skb;
525 if (skb) {
526 skb_trim(skb, 0);
527 goto map_skb;
528 }
529
89d71a66 530 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
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531 if (!skb) {
532 /* Better luck next round */
533 adapter->alloc_rx_buff_failed++;
534 break;
535 }
536
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537 buffer_info->skb = skb;
538map_skb:
0be3f55f 539 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 540 adapter->rx_buffer_len,
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541 DMA_FROM_DEVICE);
542 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
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543 dev_err(&pdev->dev, "RX DMA map failed\n");
544 adapter->rx_dma_failed++;
545 break;
546 }
547
548 rx_desc = E1000_RX_DESC(*rx_ring, i);
549 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
550
50849d79
TH
551 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
552 /*
553 * Force memory writes to complete before letting h/w
554 * know there are new descriptors to fetch. (Only
555 * applicable for weak-ordered memory model archs,
556 * such as IA-64).
557 */
558 wmb();
559 writel(i, adapter->hw.hw_addr + rx_ring->tail);
560 }
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561 i++;
562 if (i == rx_ring->count)
563 i = 0;
564 buffer_info = &rx_ring->buffer_info[i];
565 }
566
50849d79 567 rx_ring->next_to_use = i;
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568}
569
570/**
571 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
572 * @adapter: address of board private structure
573 **/
574static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
575 int cleaned_count)
576{
577 struct net_device *netdev = adapter->netdev;
578 struct pci_dev *pdev = adapter->pdev;
579 union e1000_rx_desc_packet_split *rx_desc;
580 struct e1000_ring *rx_ring = adapter->rx_ring;
581 struct e1000_buffer *buffer_info;
582 struct e1000_ps_page *ps_page;
583 struct sk_buff *skb;
584 unsigned int i, j;
585
586 i = rx_ring->next_to_use;
587 buffer_info = &rx_ring->buffer_info[i];
588
589 while (cleaned_count--) {
590 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
591
592 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
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593 ps_page = &buffer_info->ps_pages[j];
594 if (j >= adapter->rx_ps_pages) {
595 /* all unused desc entries get hw null ptr */
a39fe742 596 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK
597 continue;
598 }
599 if (!ps_page->page) {
600 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 601 if (!ps_page->page) {
47f44e40
AK
602 adapter->alloc_rx_buff_failed++;
603 goto no_buffers;
604 }
0be3f55f
NN
605 ps_page->dma = dma_map_page(&pdev->dev,
606 ps_page->page,
607 0, PAGE_SIZE,
608 DMA_FROM_DEVICE);
609 if (dma_mapping_error(&pdev->dev,
610 ps_page->dma)) {
47f44e40
AK
611 dev_err(&adapter->pdev->dev,
612 "RX DMA page map failed\n");
613 adapter->rx_dma_failed++;
614 goto no_buffers;
bc7f75fa 615 }
bc7f75fa 616 }
47f44e40
AK
617 /*
618 * Refresh the desc even if buffer_addrs
619 * didn't change because each write-back
620 * erases this info.
621 */
622 rx_desc->read.buffer_addr[j+1] =
623 cpu_to_le64(ps_page->dma);
bc7f75fa
AK
624 }
625
89d71a66
ED
626 skb = netdev_alloc_skb_ip_align(netdev,
627 adapter->rx_ps_bsize0);
bc7f75fa
AK
628
629 if (!skb) {
630 adapter->alloc_rx_buff_failed++;
631 break;
632 }
633
bc7f75fa 634 buffer_info->skb = skb;
0be3f55f 635 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 636 adapter->rx_ps_bsize0,
0be3f55f
NN
637 DMA_FROM_DEVICE);
638 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK
639 dev_err(&pdev->dev, "RX DMA map failed\n");
640 adapter->rx_dma_failed++;
641 /* cleanup skb */
642 dev_kfree_skb_any(skb);
643 buffer_info->skb = NULL;
644 break;
645 }
646
647 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
648
50849d79
TH
649 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
650 /*
651 * Force memory writes to complete before letting h/w
652 * know there are new descriptors to fetch. (Only
653 * applicable for weak-ordered memory model archs,
654 * such as IA-64).
655 */
656 wmb();
657 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
658 }
659
bc7f75fa
AK
660 i++;
661 if (i == rx_ring->count)
662 i = 0;
663 buffer_info = &rx_ring->buffer_info[i];
664 }
665
666no_buffers:
50849d79 667 rx_ring->next_to_use = i;
bc7f75fa
AK
668}
669
97ac8cae
BA
670/**
671 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
672 * @adapter: address of board private structure
97ac8cae
BA
673 * @cleaned_count: number of buffers to allocate this pass
674 **/
675
676static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
677 int cleaned_count)
678{
679 struct net_device *netdev = adapter->netdev;
680 struct pci_dev *pdev = adapter->pdev;
681 struct e1000_rx_desc *rx_desc;
682 struct e1000_ring *rx_ring = adapter->rx_ring;
683 struct e1000_buffer *buffer_info;
684 struct sk_buff *skb;
685 unsigned int i;
89d71a66 686 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA
687
688 i = rx_ring->next_to_use;
689 buffer_info = &rx_ring->buffer_info[i];
690
691 while (cleaned_count--) {
692 skb = buffer_info->skb;
693 if (skb) {
694 skb_trim(skb, 0);
695 goto check_page;
696 }
697
89d71a66 698 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA
699 if (unlikely(!skb)) {
700 /* Better luck next round */
701 adapter->alloc_rx_buff_failed++;
702 break;
703 }
704
97ac8cae
BA
705 buffer_info->skb = skb;
706check_page:
707 /* allocate a new page if necessary */
708 if (!buffer_info->page) {
709 buffer_info->page = alloc_page(GFP_ATOMIC);
710 if (unlikely(!buffer_info->page)) {
711 adapter->alloc_rx_buff_failed++;
712 break;
713 }
714 }
715
716 if (!buffer_info->dma)
0be3f55f 717 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA
718 buffer_info->page, 0,
719 PAGE_SIZE,
0be3f55f 720 DMA_FROM_DEVICE);
97ac8cae
BA
721
722 rx_desc = E1000_RX_DESC(*rx_ring, i);
723 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
724
725 if (unlikely(++i == rx_ring->count))
726 i = 0;
727 buffer_info = &rx_ring->buffer_info[i];
728 }
729
730 if (likely(rx_ring->next_to_use != i)) {
731 rx_ring->next_to_use = i;
732 if (unlikely(i-- == 0))
733 i = (rx_ring->count - 1);
734
735 /* Force memory writes to complete before letting h/w
736 * know there are new descriptors to fetch. (Only
737 * applicable for weak-ordered memory model archs,
738 * such as IA-64). */
739 wmb();
740 writel(i, adapter->hw.hw_addr + rx_ring->tail);
741 }
742}
743
bc7f75fa
AK
744/**
745 * e1000_clean_rx_irq - Send received data up the network stack; legacy
746 * @adapter: board private structure
747 *
748 * the return value indicates whether actual cleaning was done, there
749 * is no guarantee that everything was cleaned
750 **/
751static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
752 int *work_done, int work_to_do)
753{
754 struct net_device *netdev = adapter->netdev;
755 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 756 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK
757 struct e1000_ring *rx_ring = adapter->rx_ring;
758 struct e1000_rx_desc *rx_desc, *next_rxd;
759 struct e1000_buffer *buffer_info, *next_buffer;
760 u32 length;
761 unsigned int i;
762 int cleaned_count = 0;
763 bool cleaned = 0;
764 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
765
766 i = rx_ring->next_to_clean;
767 rx_desc = E1000_RX_DESC(*rx_ring, i);
768 buffer_info = &rx_ring->buffer_info[i];
769
770 while (rx_desc->status & E1000_RXD_STAT_DD) {
771 struct sk_buff *skb;
772 u8 status;
773
774 if (*work_done >= work_to_do)
775 break;
776 (*work_done)++;
777
778 status = rx_desc->status;
779 skb = buffer_info->skb;
780 buffer_info->skb = NULL;
781
782 prefetch(skb->data - NET_IP_ALIGN);
783
784 i++;
785 if (i == rx_ring->count)
786 i = 0;
787 next_rxd = E1000_RX_DESC(*rx_ring, i);
788 prefetch(next_rxd);
789
790 next_buffer = &rx_ring->buffer_info[i];
791
792 cleaned = 1;
793 cleaned_count++;
0be3f55f 794 dma_unmap_single(&pdev->dev,
bc7f75fa
AK
795 buffer_info->dma,
796 adapter->rx_buffer_len,
0be3f55f 797 DMA_FROM_DEVICE);
bc7f75fa
AK
798 buffer_info->dma = 0;
799
800 length = le16_to_cpu(rx_desc->length);
801
b94b5028
JB
802 /*
803 * !EOP means multiple descriptors were used to store a single
804 * packet, if that's the case we need to toss it. In fact, we
805 * need to toss every packet with the EOP bit clear and the
806 * next frame that _does_ have the EOP bit set, as it is by
807 * definition only a frame fragment
808 */
809 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
810 adapter->flags2 |= FLAG2_IS_DISCARDING;
811
812 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 813 /* All receives must fit into a single buffer */
3bb99fe2 814 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK
815 /* recycle */
816 buffer_info->skb = skb;
b94b5028
JB
817 if (status & E1000_RXD_STAT_EOP)
818 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK
819 goto next_desc;
820 }
821
822 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
823 /* recycle */
824 buffer_info->skb = skb;
825 goto next_desc;
826 }
827
eb7c3adb
JK
828 /* adjust length to remove Ethernet CRC */
829 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
830 length -= 4;
831
bc7f75fa
AK
832 total_rx_bytes += length;
833 total_rx_packets++;
834
ad68076e
BA
835 /*
836 * code added for copybreak, this should improve
bc7f75fa 837 * performance for small packets with large amounts
ad68076e
BA
838 * of reassembly being done in the stack
839 */
bc7f75fa
AK
840 if (length < copybreak) {
841 struct sk_buff *new_skb =
89d71a66 842 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 843 if (new_skb) {
808ff676
BA
844 skb_copy_to_linear_data_offset(new_skb,
845 -NET_IP_ALIGN,
846 (skb->data -
847 NET_IP_ALIGN),
848 (length +
849 NET_IP_ALIGN));
bc7f75fa
AK
850 /* save the skb in buffer_info as good */
851 buffer_info->skb = skb;
852 skb = new_skb;
853 }
854 /* else just continue with the old one */
855 }
856 /* end copybreak code */
857 skb_put(skb, length);
858
859 /* Receive Checksum Offload */
860 e1000_rx_checksum(adapter,
861 (u32)(status) |
862 ((u32)(rx_desc->errors) << 24),
863 le16_to_cpu(rx_desc->csum), skb);
864
865 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
866
867next_desc:
868 rx_desc->status = 0;
869
870 /* return some buffers to hardware, one at a time is too slow */
871 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
872 adapter->alloc_rx_buf(adapter, cleaned_count);
873 cleaned_count = 0;
874 }
875
876 /* use prefetched values */
877 rx_desc = next_rxd;
878 buffer_info = next_buffer;
879 }
880 rx_ring->next_to_clean = i;
881
882 cleaned_count = e1000_desc_unused(rx_ring);
883 if (cleaned_count)
884 adapter->alloc_rx_buf(adapter, cleaned_count);
885
bc7f75fa 886 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 887 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK
888 netdev->stats.rx_bytes += total_rx_bytes;
889 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK
890 return cleaned;
891}
892
bc7f75fa
AK
893static void e1000_put_txbuf(struct e1000_adapter *adapter,
894 struct e1000_buffer *buffer_info)
895{
03b1320d
AD
896 if (buffer_info->dma) {
897 if (buffer_info->mapped_as_page)
0be3f55f
NN
898 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
899 buffer_info->length, DMA_TO_DEVICE);
03b1320d 900 else
0be3f55f
NN
901 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
902 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD
903 buffer_info->dma = 0;
904 }
bc7f75fa
AK
905 if (buffer_info->skb) {
906 dev_kfree_skb_any(buffer_info->skb);
907 buffer_info->skb = NULL;
908 }
1b7719c4 909 buffer_info->time_stamp = 0;
bc7f75fa
AK
910}
911
41cec6f1 912static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 913{
41cec6f1
BA
914 struct e1000_adapter *adapter = container_of(work,
915 struct e1000_adapter,
916 print_hang_task);
bc7f75fa
AK
917 struct e1000_ring *tx_ring = adapter->tx_ring;
918 unsigned int i = tx_ring->next_to_clean;
919 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
920 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA
921 struct e1000_hw *hw = &adapter->hw;
922 u16 phy_status, phy_1000t_status, phy_ext_status;
923 u16 pci_status;
924
925 e1e_rphy(hw, PHY_STATUS, &phy_status);
926 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
927 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 928
41cec6f1
BA
929 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
930
931 /* detected Hardware unit hang */
932 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK
933 " TDH <%x>\n"
934 " TDT <%x>\n"
935 " next_to_use <%x>\n"
936 " next_to_clean <%x>\n"
937 "buffer_info[next_to_clean]:\n"
938 " time_stamp <%lx>\n"
939 " next_to_watch <%x>\n"
940 " jiffies <%lx>\n"
41cec6f1
BA
941 " next_to_watch.status <%x>\n"
942 "MAC Status <%x>\n"
943 "PHY Status <%x>\n"
944 "PHY 1000BASE-T Status <%x>\n"
945 "PHY Extended Status <%x>\n"
946 "PCI Status <%x>\n",
44defeb3
JK
947 readl(adapter->hw.hw_addr + tx_ring->head),
948 readl(adapter->hw.hw_addr + tx_ring->tail),
949 tx_ring->next_to_use,
950 tx_ring->next_to_clean,
951 tx_ring->buffer_info[eop].time_stamp,
952 eop,
953 jiffies,
41cec6f1
BA
954 eop_desc->upper.fields.status,
955 er32(STATUS),
956 phy_status,
957 phy_1000t_status,
958 phy_ext_status,
959 pci_status);
bc7f75fa
AK
960}
961
962/**
963 * e1000_clean_tx_irq - Reclaim resources after transmit completes
964 * @adapter: board private structure
965 *
966 * the return value indicates whether actual cleaning was done, there
967 * is no guarantee that everything was cleaned
968 **/
969static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
970{
971 struct net_device *netdev = adapter->netdev;
972 struct e1000_hw *hw = &adapter->hw;
973 struct e1000_ring *tx_ring = adapter->tx_ring;
974 struct e1000_tx_desc *tx_desc, *eop_desc;
975 struct e1000_buffer *buffer_info;
976 unsigned int i, eop;
977 unsigned int count = 0;
bc7f75fa
AK
978 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
979
980 i = tx_ring->next_to_clean;
981 eop = tx_ring->buffer_info[i].next_to_watch;
982 eop_desc = E1000_TX_DESC(*tx_ring, eop);
983
12d04a3c
AD
984 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
985 (count < tx_ring->count)) {
a86043c2
JB
986 bool cleaned = false;
987 for (; !cleaned; count++) {
bc7f75fa
AK
988 tx_desc = E1000_TX_DESC(*tx_ring, i);
989 buffer_info = &tx_ring->buffer_info[i];
990 cleaned = (i == eop);
991
992 if (cleaned) {
9ed318d5
TH
993 total_tx_packets += buffer_info->segs;
994 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK
995 }
996
997 e1000_put_txbuf(adapter, buffer_info);
998 tx_desc->upper.data = 0;
999
1000 i++;
1001 if (i == tx_ring->count)
1002 i = 0;
1003 }
1004
dac87619
TL
1005 if (i == tx_ring->next_to_use)
1006 break;
bc7f75fa
AK
1007 eop = tx_ring->buffer_info[i].next_to_watch;
1008 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK
1009 }
1010
1011 tx_ring->next_to_clean = i;
1012
1013#define TX_WAKE_THRESHOLD 32
a86043c2
JB
1014 if (count && netif_carrier_ok(netdev) &&
1015 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK
1016 /* Make sure that anybody stopping the queue after this
1017 * sees the new next_to_clean.
1018 */
1019 smp_mb();
1020
1021 if (netif_queue_stopped(netdev) &&
1022 !(test_bit(__E1000_DOWN, &adapter->state))) {
1023 netif_wake_queue(netdev);
1024 ++adapter->restart_queue;
1025 }
1026 }
1027
1028 if (adapter->detect_tx_hung) {
41cec6f1
BA
1029 /*
1030 * Detect a transmit hang in hardware, this serializes the
1031 * check with the clearing of time_stamp and movement of i
1032 */
bc7f75fa 1033 adapter->detect_tx_hung = 0;
12d04a3c
AD
1034 if (tx_ring->buffer_info[i].time_stamp &&
1035 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP
1036 + (adapter->tx_timeout_factor * HZ)) &&
1037 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1038 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK
1039 netif_stop_queue(netdev);
1040 }
1041 }
1042 adapter->total_tx_bytes += total_tx_bytes;
1043 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK
1044 netdev->stats.tx_bytes += total_tx_bytes;
1045 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 1046 return (count < tx_ring->count);
bc7f75fa
AK
1047}
1048
bc7f75fa
AK
1049/**
1050 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1051 * @adapter: board private structure
1052 *
1053 * the return value indicates whether actual cleaning was done, there
1054 * is no guarantee that everything was cleaned
1055 **/
1056static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1057 int *work_done, int work_to_do)
1058{
3bb99fe2 1059 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK
1060 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1061 struct net_device *netdev = adapter->netdev;
1062 struct pci_dev *pdev = adapter->pdev;
1063 struct e1000_ring *rx_ring = adapter->rx_ring;
1064 struct e1000_buffer *buffer_info, *next_buffer;
1065 struct e1000_ps_page *ps_page;
1066 struct sk_buff *skb;
1067 unsigned int i, j;
1068 u32 length, staterr;
1069 int cleaned_count = 0;
1070 bool cleaned = 0;
1071 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1072
1073 i = rx_ring->next_to_clean;
1074 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1075 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1076 buffer_info = &rx_ring->buffer_info[i];
1077
1078 while (staterr & E1000_RXD_STAT_DD) {
1079 if (*work_done >= work_to_do)
1080 break;
1081 (*work_done)++;
1082 skb = buffer_info->skb;
1083
1084 /* in the packet split case this is header only */
1085 prefetch(skb->data - NET_IP_ALIGN);
1086
1087 i++;
1088 if (i == rx_ring->count)
1089 i = 0;
1090 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1091 prefetch(next_rxd);
1092
1093 next_buffer = &rx_ring->buffer_info[i];
1094
1095 cleaned = 1;
1096 cleaned_count++;
0be3f55f 1097 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1098 adapter->rx_ps_bsize0,
0be3f55f 1099 DMA_FROM_DEVICE);
bc7f75fa
AK
1100 buffer_info->dma = 0;
1101
b94b5028
JB
1102 /* see !EOP comment in other rx routine */
1103 if (!(staterr & E1000_RXD_STAT_EOP))
1104 adapter->flags2 |= FLAG2_IS_DISCARDING;
1105
1106 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA
1107 e_dbg("Packet Split buffers didn't pick up the full "
1108 "packet\n");
bc7f75fa 1109 dev_kfree_skb_irq(skb);
b94b5028
JB
1110 if (staterr & E1000_RXD_STAT_EOP)
1111 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK
1112 goto next_desc;
1113 }
1114
1115 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1116 dev_kfree_skb_irq(skb);
1117 goto next_desc;
1118 }
1119
1120 length = le16_to_cpu(rx_desc->wb.middle.length0);
1121
1122 if (!length) {
3bb99fe2
BA
1123 e_dbg("Last part of the packet spanning multiple "
1124 "descriptors\n");
bc7f75fa
AK
1125 dev_kfree_skb_irq(skb);
1126 goto next_desc;
1127 }
1128
1129 /* Good Receive */
1130 skb_put(skb, length);
1131
1132 {
ad68076e
BA
1133 /*
1134 * this looks ugly, but it seems compiler issues make it
1135 * more efficient than reusing j
1136 */
bc7f75fa
AK
1137 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1138
ad68076e
BA
1139 /*
1140 * page alloc/put takes too long and effects small packet
1141 * throughput, so unsplit small packets and save the alloc/put
1142 * only valid in softirq (napi) context to call kmap_*
1143 */
bc7f75fa
AK
1144 if (l1 && (l1 <= copybreak) &&
1145 ((length + l1) <= adapter->rx_ps_bsize0)) {
1146 u8 *vaddr;
1147
47f44e40 1148 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1149
ad68076e
BA
1150 /*
1151 * there is no documentation about how to call
bc7f75fa 1152 * kmap_atomic, so we can't hold the mapping
ad68076e
BA
1153 * very long
1154 */
0be3f55f
NN
1155 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1156 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK
1157 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1158 memcpy(skb_tail_pointer(skb), vaddr, l1);
1159 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN
1160 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1161 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1162
eb7c3adb
JK
1163 /* remove the CRC */
1164 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1165 l1 -= 4;
1166
bc7f75fa
AK
1167 skb_put(skb, l1);
1168 goto copydone;
1169 } /* if */
1170 }
1171
1172 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1173 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1174 if (!length)
1175 break;
1176
47f44e40 1177 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN
1178 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1179 DMA_FROM_DEVICE);
bc7f75fa
AK
1180 ps_page->dma = 0;
1181 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1182 ps_page->page = NULL;
1183 skb->len += length;
1184 skb->data_len += length;
1185 skb->truesize += length;
1186 }
1187
eb7c3adb
JK
1188 /* strip the ethernet crc, problem is we're using pages now so
1189 * this whole operation can get a little cpu intensive
1190 */
1191 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1192 pskb_trim(skb, skb->len - 4);
1193
bc7f75fa
AK
1194copydone:
1195 total_rx_bytes += skb->len;
1196 total_rx_packets++;
1197
1198 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1199 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1200
1201 if (rx_desc->wb.upper.header_status &
1202 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1203 adapter->rx_hdr_split++;
1204
1205 e1000_receive_skb(adapter, netdev, skb,
1206 staterr, rx_desc->wb.middle.vlan);
1207
1208next_desc:
1209 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1210 buffer_info->skb = NULL;
1211
1212 /* return some buffers to hardware, one at a time is too slow */
1213 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1214 adapter->alloc_rx_buf(adapter, cleaned_count);
1215 cleaned_count = 0;
1216 }
1217
1218 /* use prefetched values */
1219 rx_desc = next_rxd;
1220 buffer_info = next_buffer;
1221
1222 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1223 }
1224 rx_ring->next_to_clean = i;
1225
1226 cleaned_count = e1000_desc_unused(rx_ring);
1227 if (cleaned_count)
1228 adapter->alloc_rx_buf(adapter, cleaned_count);
1229
bc7f75fa 1230 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1231 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK
1232 netdev->stats.rx_bytes += total_rx_bytes;
1233 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK
1234 return cleaned;
1235}
1236
97ac8cae
BA
1237/**
1238 * e1000_consume_page - helper function
1239 **/
1240static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1241 u16 length)
1242{
1243 bi->page = NULL;
1244 skb->len += length;
1245 skb->data_len += length;
1246 skb->truesize += length;
1247}
1248
1249/**
1250 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1251 * @adapter: board private structure
1252 *
1253 * the return value indicates whether actual cleaning was done, there
1254 * is no guarantee that everything was cleaned
1255 **/
1256
1257static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1258 int *work_done, int work_to_do)
1259{
1260 struct net_device *netdev = adapter->netdev;
1261 struct pci_dev *pdev = adapter->pdev;
1262 struct e1000_ring *rx_ring = adapter->rx_ring;
1263 struct e1000_rx_desc *rx_desc, *next_rxd;
1264 struct e1000_buffer *buffer_info, *next_buffer;
1265 u32 length;
1266 unsigned int i;
1267 int cleaned_count = 0;
1268 bool cleaned = false;
1269 unsigned int total_rx_bytes=0, total_rx_packets=0;
1270
1271 i = rx_ring->next_to_clean;
1272 rx_desc = E1000_RX_DESC(*rx_ring, i);
1273 buffer_info = &rx_ring->buffer_info[i];
1274
1275 while (rx_desc->status & E1000_RXD_STAT_DD) {
1276 struct sk_buff *skb;
1277 u8 status;
1278
1279 if (*work_done >= work_to_do)
1280 break;
1281 (*work_done)++;
1282
1283 status = rx_desc->status;
1284 skb = buffer_info->skb;
1285 buffer_info->skb = NULL;
1286
1287 ++i;
1288 if (i == rx_ring->count)
1289 i = 0;
1290 next_rxd = E1000_RX_DESC(*rx_ring, i);
1291 prefetch(next_rxd);
1292
1293 next_buffer = &rx_ring->buffer_info[i];
1294
1295 cleaned = true;
1296 cleaned_count++;
0be3f55f
NN
1297 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1298 DMA_FROM_DEVICE);
97ac8cae
BA
1299 buffer_info->dma = 0;
1300
1301 length = le16_to_cpu(rx_desc->length);
1302
1303 /* errors is only valid for DD + EOP descriptors */
1304 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1305 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1306 /* recycle both page and skb */
1307 buffer_info->skb = skb;
1308 /* an error means any chain goes out the window
1309 * too */
1310 if (rx_ring->rx_skb_top)
1311 dev_kfree_skb(rx_ring->rx_skb_top);
1312 rx_ring->rx_skb_top = NULL;
1313 goto next_desc;
1314 }
1315
1316#define rxtop rx_ring->rx_skb_top
1317 if (!(status & E1000_RXD_STAT_EOP)) {
1318 /* this descriptor is only the beginning (or middle) */
1319 if (!rxtop) {
1320 /* this is the beginning of a chain */
1321 rxtop = skb;
1322 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1323 0, length);
1324 } else {
1325 /* this is the middle of a chain */
1326 skb_fill_page_desc(rxtop,
1327 skb_shinfo(rxtop)->nr_frags,
1328 buffer_info->page, 0, length);
1329 /* re-use the skb, only consumed the page */
1330 buffer_info->skb = skb;
1331 }
1332 e1000_consume_page(buffer_info, rxtop, length);
1333 goto next_desc;
1334 } else {
1335 if (rxtop) {
1336 /* end of the chain */
1337 skb_fill_page_desc(rxtop,
1338 skb_shinfo(rxtop)->nr_frags,
1339 buffer_info->page, 0, length);
1340 /* re-use the current skb, we only consumed the
1341 * page */
1342 buffer_info->skb = skb;
1343 skb = rxtop;
1344 rxtop = NULL;
1345 e1000_consume_page(buffer_info, skb, length);
1346 } else {
1347 /* no chain, got EOP, this buf is the packet
1348 * copybreak to save the put_page/alloc_page */
1349 if (length <= copybreak &&
1350 skb_tailroom(skb) >= length) {
1351 u8 *vaddr;
1352 vaddr = kmap_atomic(buffer_info->page,
1353 KM_SKB_DATA_SOFTIRQ);
1354 memcpy(skb_tail_pointer(skb), vaddr,
1355 length);
1356 kunmap_atomic(vaddr,
1357 KM_SKB_DATA_SOFTIRQ);
1358 /* re-use the page, so don't erase
1359 * buffer_info->page */
1360 skb_put(skb, length);
1361 } else {
1362 skb_fill_page_desc(skb, 0,
1363 buffer_info->page, 0,
1364 length);
1365 e1000_consume_page(buffer_info, skb,
1366 length);
1367 }
1368 }
1369 }
1370
1371 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1372 e1000_rx_checksum(adapter,
1373 (u32)(status) |
1374 ((u32)(rx_desc->errors) << 24),
1375 le16_to_cpu(rx_desc->csum), skb);
1376
1377 /* probably a little skewed due to removing CRC */
1378 total_rx_bytes += skb->len;
1379 total_rx_packets++;
1380
1381 /* eth type trans needs skb->data to point to something */
1382 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1383 e_err("pskb_may_pull failed.\n");
97ac8cae
BA
1384 dev_kfree_skb(skb);
1385 goto next_desc;
1386 }
1387
1388 e1000_receive_skb(adapter, netdev, skb, status,
1389 rx_desc->special);
1390
1391next_desc:
1392 rx_desc->status = 0;
1393
1394 /* return some buffers to hardware, one at a time is too slow */
1395 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1396 adapter->alloc_rx_buf(adapter, cleaned_count);
1397 cleaned_count = 0;
1398 }
1399
1400 /* use prefetched values */
1401 rx_desc = next_rxd;
1402 buffer_info = next_buffer;
1403 }
1404 rx_ring->next_to_clean = i;
1405
1406 cleaned_count = e1000_desc_unused(rx_ring);
1407 if (cleaned_count)
1408 adapter->alloc_rx_buf(adapter, cleaned_count);
1409
1410 adapter->total_rx_bytes += total_rx_bytes;
1411 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK
1412 netdev->stats.rx_bytes += total_rx_bytes;
1413 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA
1414 return cleaned;
1415}
1416
bc7f75fa
AK
1417/**
1418 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1419 * @adapter: board private structure
1420 **/
1421static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1422{
1423 struct e1000_ring *rx_ring = adapter->rx_ring;
1424 struct e1000_buffer *buffer_info;
1425 struct e1000_ps_page *ps_page;
1426 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK
1427 unsigned int i, j;
1428
1429 /* Free all the Rx ring sk_buffs */
1430 for (i = 0; i < rx_ring->count; i++) {
1431 buffer_info = &rx_ring->buffer_info[i];
1432 if (buffer_info->dma) {
1433 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1434 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1435 adapter->rx_buffer_len,
0be3f55f 1436 DMA_FROM_DEVICE);
97ac8cae 1437 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1438 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1439 PAGE_SIZE,
0be3f55f 1440 DMA_FROM_DEVICE);
bc7f75fa 1441 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1442 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1443 adapter->rx_ps_bsize0,
0be3f55f 1444 DMA_FROM_DEVICE);
bc7f75fa
AK
1445 buffer_info->dma = 0;
1446 }
1447
97ac8cae
BA
1448 if (buffer_info->page) {
1449 put_page(buffer_info->page);
1450 buffer_info->page = NULL;
1451 }
1452
bc7f75fa
AK
1453 if (buffer_info->skb) {
1454 dev_kfree_skb(buffer_info->skb);
1455 buffer_info->skb = NULL;
1456 }
1457
1458 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1459 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK
1460 if (!ps_page->page)
1461 break;
0be3f55f
NN
1462 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1463 DMA_FROM_DEVICE);
bc7f75fa
AK
1464 ps_page->dma = 0;
1465 put_page(ps_page->page);
1466 ps_page->page = NULL;
1467 }
1468 }
1469
1470 /* there also may be some cached data from a chained receive */
1471 if (rx_ring->rx_skb_top) {
1472 dev_kfree_skb(rx_ring->rx_skb_top);
1473 rx_ring->rx_skb_top = NULL;
1474 }
1475
bc7f75fa
AK
1476 /* Zero out the descriptor ring */
1477 memset(rx_ring->desc, 0, rx_ring->size);
1478
1479 rx_ring->next_to_clean = 0;
1480 rx_ring->next_to_use = 0;
b94b5028 1481 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK
1482
1483 writel(0, adapter->hw.hw_addr + rx_ring->head);
1484 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1485}
1486
a8f88ff5
JB
1487static void e1000e_downshift_workaround(struct work_struct *work)
1488{
1489 struct e1000_adapter *adapter = container_of(work,
1490 struct e1000_adapter, downshift_task);
1491
1492 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1493}
1494
bc7f75fa
AK
1495/**
1496 * e1000_intr_msi - Interrupt Handler
1497 * @irq: interrupt number
1498 * @data: pointer to a network interface device structure
1499 **/
1500static irqreturn_t e1000_intr_msi(int irq, void *data)
1501{
1502 struct net_device *netdev = data;
1503 struct e1000_adapter *adapter = netdev_priv(netdev);
1504 struct e1000_hw *hw = &adapter->hw;
1505 u32 icr = er32(ICR);
1506
ad68076e
BA
1507 /*
1508 * read ICR disables interrupts using IAM
1509 */
bc7f75fa 1510
573cca8c 1511 if (icr & E1000_ICR_LSC) {
bc7f75fa 1512 hw->mac.get_link_status = 1;
ad68076e
BA
1513 /*
1514 * ICH8 workaround-- Call gig speed drop workaround on cable
1515 * disconnect (LSC) before accessing any PHY registers
1516 */
bc7f75fa
AK
1517 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1518 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1519 schedule_work(&adapter->downshift_task);
bc7f75fa 1520
ad68076e
BA
1521 /*
1522 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1523 * link down event; disable receives here in the ISR and reset
ad68076e
BA
1524 * adapter in watchdog
1525 */
bc7f75fa
AK
1526 if (netif_carrier_ok(netdev) &&
1527 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1528 /* disable receives */
1529 u32 rctl = er32(RCTL);
1530 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1531 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK
1532 }
1533 /* guard against interrupt when we're going down */
1534 if (!test_bit(__E1000_DOWN, &adapter->state))
1535 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1536 }
1537
288379f0 1538 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK
1539 adapter->total_tx_bytes = 0;
1540 adapter->total_tx_packets = 0;
1541 adapter->total_rx_bytes = 0;
1542 adapter->total_rx_packets = 0;
288379f0 1543 __napi_schedule(&adapter->napi);
bc7f75fa
AK
1544 }
1545
1546 return IRQ_HANDLED;
1547}
1548
1549/**
1550 * e1000_intr - Interrupt Handler
1551 * @irq: interrupt number
1552 * @data: pointer to a network interface device structure
1553 **/
1554static irqreturn_t e1000_intr(int irq, void *data)
1555{
1556 struct net_device *netdev = data;
1557 struct e1000_adapter *adapter = netdev_priv(netdev);
1558 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1559 u32 rctl, icr = er32(ICR);
4662e82b 1560
a68ea775 1561 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK
1562 return IRQ_NONE; /* Not our interrupt */
1563
ad68076e
BA
1564 /*
1565 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1566 * not set, then the adapter didn't send an interrupt
1567 */
bc7f75fa
AK
1568 if (!(icr & E1000_ICR_INT_ASSERTED))
1569 return IRQ_NONE;
1570
ad68076e
BA
1571 /*
1572 * Interrupt Auto-Mask...upon reading ICR,
1573 * interrupts are masked. No need for the
1574 * IMC write
1575 */
bc7f75fa 1576
573cca8c 1577 if (icr & E1000_ICR_LSC) {
bc7f75fa 1578 hw->mac.get_link_status = 1;
ad68076e
BA
1579 /*
1580 * ICH8 workaround-- Call gig speed drop workaround on cable
1581 * disconnect (LSC) before accessing any PHY registers
1582 */
bc7f75fa
AK
1583 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1584 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1585 schedule_work(&adapter->downshift_task);
bc7f75fa 1586
ad68076e
BA
1587 /*
1588 * 80003ES2LAN workaround--
bc7f75fa
AK
1589 * For packet buffer work-around on link down event;
1590 * disable receives here in the ISR and
1591 * reset adapter in watchdog
1592 */
1593 if (netif_carrier_ok(netdev) &&
1594 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1595 /* disable receives */
1596 rctl = er32(RCTL);
1597 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1598 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK
1599 }
1600 /* guard against interrupt when we're going down */
1601 if (!test_bit(__E1000_DOWN, &adapter->state))
1602 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1603 }
1604
288379f0 1605 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK
1606 adapter->total_tx_bytes = 0;
1607 adapter->total_tx_packets = 0;
1608 adapter->total_rx_bytes = 0;
1609 adapter->total_rx_packets = 0;
288379f0 1610 __napi_schedule(&adapter->napi);
bc7f75fa
AK
1611 }
1612
1613 return IRQ_HANDLED;
1614}
1615
4662e82b
BA
1616static irqreturn_t e1000_msix_other(int irq, void *data)
1617{
1618 struct net_device *netdev = data;
1619 struct e1000_adapter *adapter = netdev_priv(netdev);
1620 struct e1000_hw *hw = &adapter->hw;
1621 u32 icr = er32(ICR);
1622
1623 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB
1624 if (!test_bit(__E1000_DOWN, &adapter->state))
1625 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA
1626 return IRQ_NONE;
1627 }
1628
1629 if (icr & adapter->eiac_mask)
1630 ew32(ICS, (icr & adapter->eiac_mask));
1631
1632 if (icr & E1000_ICR_OTHER) {
1633 if (!(icr & E1000_ICR_LSC))
1634 goto no_link_interrupt;
1635 hw->mac.get_link_status = 1;
1636 /* guard against interrupt when we're going down */
1637 if (!test_bit(__E1000_DOWN, &adapter->state))
1638 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1639 }
1640
1641no_link_interrupt:
a3c69fef
JB
1642 if (!test_bit(__E1000_DOWN, &adapter->state))
1643 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA
1644
1645 return IRQ_HANDLED;
1646}
1647
1648
1649static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1650{
1651 struct net_device *netdev = data;
1652 struct e1000_adapter *adapter = netdev_priv(netdev);
1653 struct e1000_hw *hw = &adapter->hw;
1654 struct e1000_ring *tx_ring = adapter->tx_ring;
1655
1656
1657 adapter->total_tx_bytes = 0;
1658 adapter->total_tx_packets = 0;
1659
1660 if (!e1000_clean_tx_irq(adapter))
1661 /* Ring was not completely cleaned, so fire another interrupt */
1662 ew32(ICS, tx_ring->ims_val);
1663
1664 return IRQ_HANDLED;
1665}
1666
1667static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1668{
1669 struct net_device *netdev = data;
1670 struct e1000_adapter *adapter = netdev_priv(netdev);
1671
1672 /* Write the ITR value calculated at the end of the
1673 * previous interrupt.
1674 */
1675 if (adapter->rx_ring->set_itr) {
1676 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1677 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1678 adapter->rx_ring->set_itr = 0;
1679 }
1680
288379f0 1681 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA
1682 adapter->total_rx_bytes = 0;
1683 adapter->total_rx_packets = 0;
288379f0 1684 __napi_schedule(&adapter->napi);
4662e82b
BA
1685 }
1686 return IRQ_HANDLED;
1687}
1688
1689/**
1690 * e1000_configure_msix - Configure MSI-X hardware
1691 *
1692 * e1000_configure_msix sets up the hardware to properly
1693 * generate MSI-X interrupts.
1694 **/
1695static void e1000_configure_msix(struct e1000_adapter *adapter)
1696{
1697 struct e1000_hw *hw = &adapter->hw;
1698 struct e1000_ring *rx_ring = adapter->rx_ring;
1699 struct e1000_ring *tx_ring = adapter->tx_ring;
1700 int vector = 0;
1701 u32 ctrl_ext, ivar = 0;
1702
1703 adapter->eiac_mask = 0;
1704
1705 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1706 if (hw->mac.type == e1000_82574) {
1707 u32 rfctl = er32(RFCTL);
1708 rfctl |= E1000_RFCTL_ACK_DIS;
1709 ew32(RFCTL, rfctl);
1710 }
1711
1712#define E1000_IVAR_INT_ALLOC_VALID 0x8
1713 /* Configure Rx vector */
1714 rx_ring->ims_val = E1000_IMS_RXQ0;
1715 adapter->eiac_mask |= rx_ring->ims_val;
1716 if (rx_ring->itr_val)
1717 writel(1000000000 / (rx_ring->itr_val * 256),
1718 hw->hw_addr + rx_ring->itr_register);
1719 else
1720 writel(1, hw->hw_addr + rx_ring->itr_register);
1721 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1722
1723 /* Configure Tx vector */
1724 tx_ring->ims_val = E1000_IMS_TXQ0;
1725 vector++;
1726 if (tx_ring->itr_val)
1727 writel(1000000000 / (tx_ring->itr_val * 256),
1728 hw->hw_addr + tx_ring->itr_register);
1729 else
1730 writel(1, hw->hw_addr + tx_ring->itr_register);
1731 adapter->eiac_mask |= tx_ring->ims_val;
1732 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1733
1734 /* set vector for Other Causes, e.g. link changes */
1735 vector++;
1736 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1737 if (rx_ring->itr_val)
1738 writel(1000000000 / (rx_ring->itr_val * 256),
1739 hw->hw_addr + E1000_EITR_82574(vector));
1740 else
1741 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1742
1743 /* Cause Tx interrupts on every write back */
1744 ivar |= (1 << 31);
1745
1746 ew32(IVAR, ivar);
1747
1748 /* enable MSI-X PBA support */
1749 ctrl_ext = er32(CTRL_EXT);
1750 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1751
1752 /* Auto-Mask Other interrupts upon ICR read */
1753#define E1000_EIAC_MASK_82574 0x01F00000
1754 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1755 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1756 ew32(CTRL_EXT, ctrl_ext);
1757 e1e_flush();
1758}
1759
1760void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1761{
1762 if (adapter->msix_entries) {
1763 pci_disable_msix(adapter->pdev);
1764 kfree(adapter->msix_entries);
1765 adapter->msix_entries = NULL;
1766 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1767 pci_disable_msi(adapter->pdev);
1768 adapter->flags &= ~FLAG_MSI_ENABLED;
1769 }
1770
1771 return;
1772}
1773
1774/**
1775 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1776 *
1777 * Attempt to configure interrupts using the best available
1778 * capabilities of the hardware and kernel.
1779 **/
1780void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1781{
1782 int err;
1783 int numvecs, i;
1784
1785
1786 switch (adapter->int_mode) {
1787 case E1000E_INT_MODE_MSIX:
1788 if (adapter->flags & FLAG_HAS_MSIX) {
1789 numvecs = 3; /* RxQ0, TxQ0 and other */
1790 adapter->msix_entries = kcalloc(numvecs,
1791 sizeof(struct msix_entry),
1792 GFP_KERNEL);
1793 if (adapter->msix_entries) {
1794 for (i = 0; i < numvecs; i++)
1795 adapter->msix_entries[i].entry = i;
1796
1797 err = pci_enable_msix(adapter->pdev,
1798 adapter->msix_entries,
1799 numvecs);
1800 if (err == 0)
1801 return;
1802 }
1803 /* MSI-X failed, so fall through and try MSI */
1804 e_err("Failed to initialize MSI-X interrupts. "
1805 "Falling back to MSI interrupts.\n");
1806 e1000e_reset_interrupt_capability(adapter);
1807 }
1808 adapter->int_mode = E1000E_INT_MODE_MSI;
1809 /* Fall through */
1810 case E1000E_INT_MODE_MSI:
1811 if (!pci_enable_msi(adapter->pdev)) {
1812 adapter->flags |= FLAG_MSI_ENABLED;
1813 } else {
1814 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1815 e_err("Failed to initialize MSI interrupts. Falling "
1816 "back to legacy interrupts.\n");
1817 }
1818 /* Fall through */
1819 case E1000E_INT_MODE_LEGACY:
1820 /* Don't do anything; this is the system default */
1821 break;
1822 }
1823
1824 return;
1825}
1826
1827/**
1828 * e1000_request_msix - Initialize MSI-X interrupts
1829 *
1830 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1831 * kernel.
1832 **/
1833static int e1000_request_msix(struct e1000_adapter *adapter)
1834{
1835 struct net_device *netdev = adapter->netdev;
1836 int err = 0, vector = 0;
1837
1838 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1839 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
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1840 else
1841 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1842 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1843 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA
1844 netdev);
1845 if (err)
1846 goto out;
1847 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1848 adapter->rx_ring->itr_val = adapter->itr;
1849 vector++;
1850
1851 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1852 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
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1853 else
1854 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1855 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1856 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA
1857 netdev);
1858 if (err)
1859 goto out;
1860 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1861 adapter->tx_ring->itr_val = adapter->itr;
1862 vector++;
1863
1864 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1865 e1000_msix_other, 0, netdev->name, netdev);
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1866 if (err)
1867 goto out;
1868
1869 e1000_configure_msix(adapter);
1870 return 0;
1871out:
1872 return err;
1873}
1874
f8d59f78
BA
1875/**
1876 * e1000_request_irq - initialize interrupts
1877 *
1878 * Attempts to configure interrupts using the best available
1879 * capabilities of the hardware and kernel.
1880 **/
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1881static int e1000_request_irq(struct e1000_adapter *adapter)
1882{
1883 struct net_device *netdev = adapter->netdev;
bc7f75fa
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1884 int err;
1885
4662e82b
BA
1886 if (adapter->msix_entries) {
1887 err = e1000_request_msix(adapter);
1888 if (!err)
1889 return err;
1890 /* fall back to MSI */
1891 e1000e_reset_interrupt_capability(adapter);
1892 adapter->int_mode = E1000E_INT_MODE_MSI;
1893 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1894 }
4662e82b 1895 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1896 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA
1897 netdev->name, netdev);
1898 if (!err)
1899 return err;
bc7f75fa 1900
4662e82b
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1901 /* fall back to legacy interrupt */
1902 e1000e_reset_interrupt_capability(adapter);
1903 adapter->int_mode = E1000E_INT_MODE_LEGACY;
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1904 }
1905
a0607fd3 1906 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA
1907 netdev->name, netdev);
1908 if (err)
1909 e_err("Unable to allocate interrupt, Error: %d\n", err);
1910
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1911 return err;
1912}
1913
1914static void e1000_free_irq(struct e1000_adapter *adapter)
1915{
1916 struct net_device *netdev = adapter->netdev;
1917
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1918 if (adapter->msix_entries) {
1919 int vector = 0;
1920
1921 free_irq(adapter->msix_entries[vector].vector, netdev);
1922 vector++;
1923
1924 free_irq(adapter->msix_entries[vector].vector, netdev);
1925 vector++;
1926
1927 /* Other Causes interrupt vector */
1928 free_irq(adapter->msix_entries[vector].vector, netdev);
1929 return;
bc7f75fa 1930 }
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1931
1932 free_irq(adapter->pdev->irq, netdev);
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1933}
1934
1935/**
1936 * e1000_irq_disable - Mask off interrupt generation on the NIC
1937 **/
1938static void e1000_irq_disable(struct e1000_adapter *adapter)
1939{
1940 struct e1000_hw *hw = &adapter->hw;
1941
bc7f75fa 1942 ew32(IMC, ~0);
4662e82b
BA
1943 if (adapter->msix_entries)
1944 ew32(EIAC_82574, 0);
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AK
1945 e1e_flush();
1946 synchronize_irq(adapter->pdev->irq);
1947}
1948
1949/**
1950 * e1000_irq_enable - Enable default interrupt generation settings
1951 **/
1952static void e1000_irq_enable(struct e1000_adapter *adapter)
1953{
1954 struct e1000_hw *hw = &adapter->hw;
1955
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1956 if (adapter->msix_entries) {
1957 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1958 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1959 } else {
1960 ew32(IMS, IMS_ENABLE_MASK);
1961 }
74ef9c39 1962 e1e_flush();
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AK
1963}
1964
1965/**
1966 * e1000_get_hw_control - get control of the h/w from f/w
1967 * @adapter: address of board private structure
1968 *
489815ce 1969 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
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1970 * For ASF and Pass Through versions of f/w this means that
1971 * the driver is loaded. For AMT version (only with 82573)
1972 * of the f/w this means that the network i/f is open.
1973 **/
1974static void e1000_get_hw_control(struct e1000_adapter *adapter)
1975{
1976 struct e1000_hw *hw = &adapter->hw;
1977 u32 ctrl_ext;
1978 u32 swsm;
1979
1980 /* Let firmware know the driver has taken over */
1981 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1982 swsm = er32(SWSM);
1983 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1984 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1985 ctrl_ext = er32(CTRL_EXT);
ad68076e 1986 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
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1987 }
1988}
1989
1990/**
1991 * e1000_release_hw_control - release control of the h/w to f/w
1992 * @adapter: address of board private structure
1993 *
489815ce 1994 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
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1995 * For ASF and Pass Through versions of f/w this means that the
1996 * driver is no longer loaded. For AMT version (only with 82573) i
1997 * of the f/w this means that the network i/f is closed.
1998 *
1999 **/
2000static void e1000_release_hw_control(struct e1000_adapter *adapter)
2001{
2002 struct e1000_hw *hw = &adapter->hw;
2003 u32 ctrl_ext;
2004 u32 swsm;
2005
2006 /* Let firmware taken over control of h/w */
2007 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2008 swsm = er32(SWSM);
2009 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2010 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2011 ctrl_ext = er32(CTRL_EXT);
ad68076e 2012 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
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AK
2013 }
2014}
2015
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2016/**
2017 * @e1000_alloc_ring - allocate memory for a ring structure
2018 **/
2019static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2020 struct e1000_ring *ring)
2021{
2022 struct pci_dev *pdev = adapter->pdev;
2023
2024 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2025 GFP_KERNEL);
2026 if (!ring->desc)
2027 return -ENOMEM;
2028
2029 return 0;
2030}
2031
2032/**
2033 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2034 * @adapter: board private structure
2035 *
2036 * Return 0 on success, negative on failure
2037 **/
2038int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2039{
2040 struct e1000_ring *tx_ring = adapter->tx_ring;
2041 int err = -ENOMEM, size;
2042
2043 size = sizeof(struct e1000_buffer) * tx_ring->count;
2044 tx_ring->buffer_info = vmalloc(size);
2045 if (!tx_ring->buffer_info)
2046 goto err;
2047 memset(tx_ring->buffer_info, 0, size);
2048
2049 /* round up to nearest 4K */
2050 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2051 tx_ring->size = ALIGN(tx_ring->size, 4096);
2052
2053 err = e1000_alloc_ring_dma(adapter, tx_ring);
2054 if (err)
2055 goto err;
2056
2057 tx_ring->next_to_use = 0;
2058 tx_ring->next_to_clean = 0;
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AK
2059
2060 return 0;
2061err:
2062 vfree(tx_ring->buffer_info);
44defeb3 2063 e_err("Unable to allocate memory for the transmit descriptor ring\n");
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AK
2064 return err;
2065}
2066
2067/**
2068 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2069 * @adapter: board private structure
2070 *
2071 * Returns 0 on success, negative on failure
2072 **/
2073int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2074{
2075 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK
2076 struct e1000_buffer *buffer_info;
2077 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK
2078
2079 size = sizeof(struct e1000_buffer) * rx_ring->count;
2080 rx_ring->buffer_info = vmalloc(size);
2081 if (!rx_ring->buffer_info)
2082 goto err;
2083 memset(rx_ring->buffer_info, 0, size);
2084
47f44e40
AK
2085 for (i = 0; i < rx_ring->count; i++) {
2086 buffer_info = &rx_ring->buffer_info[i];
2087 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2088 sizeof(struct e1000_ps_page),
2089 GFP_KERNEL);
2090 if (!buffer_info->ps_pages)
2091 goto err_pages;
2092 }
bc7f75fa
AK
2093
2094 desc_len = sizeof(union e1000_rx_desc_packet_split);
2095
2096 /* Round up to nearest 4K */
2097 rx_ring->size = rx_ring->count * desc_len;
2098 rx_ring->size = ALIGN(rx_ring->size, 4096);
2099
2100 err = e1000_alloc_ring_dma(adapter, rx_ring);
2101 if (err)
47f44e40 2102 goto err_pages;
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AK
2103
2104 rx_ring->next_to_clean = 0;
2105 rx_ring->next_to_use = 0;
2106 rx_ring->rx_skb_top = NULL;
2107
2108 return 0;
47f44e40
AK
2109
2110err_pages:
2111 for (i = 0; i < rx_ring->count; i++) {
2112 buffer_info = &rx_ring->buffer_info[i];
2113 kfree(buffer_info->ps_pages);
2114 }
bc7f75fa
AK
2115err:
2116 vfree(rx_ring->buffer_info);
44defeb3 2117 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK
2118 return err;
2119}
2120
2121/**
2122 * e1000_clean_tx_ring - Free Tx Buffers
2123 * @adapter: board private structure
2124 **/
2125static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2126{
2127 struct e1000_ring *tx_ring = adapter->tx_ring;
2128 struct e1000_buffer *buffer_info;
2129 unsigned long size;
2130 unsigned int i;
2131
2132 for (i = 0; i < tx_ring->count; i++) {
2133 buffer_info = &tx_ring->buffer_info[i];
2134 e1000_put_txbuf(adapter, buffer_info);
2135 }
2136
2137 size = sizeof(struct e1000_buffer) * tx_ring->count;
2138 memset(tx_ring->buffer_info, 0, size);
2139
2140 memset(tx_ring->desc, 0, tx_ring->size);
2141
2142 tx_ring->next_to_use = 0;
2143 tx_ring->next_to_clean = 0;
2144
2145 writel(0, adapter->hw.hw_addr + tx_ring->head);
2146 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2147}
2148
2149/**
2150 * e1000e_free_tx_resources - Free Tx Resources per Queue
2151 * @adapter: board private structure
2152 *
2153 * Free all transmit software resources
2154 **/
2155void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2156{
2157 struct pci_dev *pdev = adapter->pdev;
2158 struct e1000_ring *tx_ring = adapter->tx_ring;
2159
2160 e1000_clean_tx_ring(adapter);
2161
2162 vfree(tx_ring->buffer_info);
2163 tx_ring->buffer_info = NULL;
2164
2165 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2166 tx_ring->dma);
2167 tx_ring->desc = NULL;
2168}
2169
2170/**
2171 * e1000e_free_rx_resources - Free Rx Resources
2172 * @adapter: board private structure
2173 *
2174 * Free all receive software resources
2175 **/
2176
2177void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2178{
2179 struct pci_dev *pdev = adapter->pdev;
2180 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2181 int i;
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2182
2183 e1000_clean_rx_ring(adapter);
2184
47f44e40
AK
2185 for (i = 0; i < rx_ring->count; i++) {
2186 kfree(rx_ring->buffer_info[i].ps_pages);
2187 }
2188
bc7f75fa
AK
2189 vfree(rx_ring->buffer_info);
2190 rx_ring->buffer_info = NULL;
2191
bc7f75fa
AK
2192 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2193 rx_ring->dma);
2194 rx_ring->desc = NULL;
2195}
2196
2197/**
2198 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
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2199 * @adapter: pointer to adapter
2200 * @itr_setting: current adapter->itr
2201 * @packets: the number of packets during this measurement interval
2202 * @bytes: the number of bytes during this measurement interval
2203 *
bc7f75fa
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2204 * Stores a new ITR value based on packets and byte
2205 * counts during the last interrupt. The advantage of per interrupt
2206 * computation is faster updates and more accurate ITR for the current
2207 * traffic pattern. Constants in this function were computed
2208 * based on theoretical maximum wire speed and thresholds were set based
2209 * on testing data as well as attempting to minimize response time
4662e82b
BA
2210 * while increasing bulk throughput. This functionality is controlled
2211 * by the InterruptThrottleRate module parameter.
bc7f75fa
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2212 **/
2213static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2214 u16 itr_setting, int packets,
2215 int bytes)
2216{
2217 unsigned int retval = itr_setting;
2218
2219 if (packets == 0)
2220 goto update_itr_done;
2221
2222 switch (itr_setting) {
2223 case lowest_latency:
2224 /* handle TSO and jumbo frames */
2225 if (bytes/packets > 8000)
2226 retval = bulk_latency;
2227 else if ((packets < 5) && (bytes > 512)) {
2228 retval = low_latency;
2229 }
2230 break;
2231 case low_latency: /* 50 usec aka 20000 ints/s */
2232 if (bytes > 10000) {
2233 /* this if handles the TSO accounting */
2234 if (bytes/packets > 8000) {
2235 retval = bulk_latency;
2236 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2237 retval = bulk_latency;
2238 } else if ((packets > 35)) {
2239 retval = lowest_latency;
2240 }
2241 } else if (bytes/packets > 2000) {
2242 retval = bulk_latency;
2243 } else if (packets <= 2 && bytes < 512) {
2244 retval = lowest_latency;
2245 }
2246 break;
2247 case bulk_latency: /* 250 usec aka 4000 ints/s */
2248 if (bytes > 25000) {
2249 if (packets > 35) {
2250 retval = low_latency;
2251 }
2252 } else if (bytes < 6000) {
2253 retval = low_latency;
2254 }
2255 break;
2256 }
2257
2258update_itr_done:
2259 return retval;
2260}
2261
2262static void e1000_set_itr(struct e1000_adapter *adapter)
2263{
2264 struct e1000_hw *hw = &adapter->hw;
2265 u16 current_itr;
2266 u32 new_itr = adapter->itr;
2267
2268 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2269 if (adapter->link_speed != SPEED_1000) {
2270 current_itr = 0;
2271 new_itr = 4000;
2272 goto set_itr_now;
2273 }
2274
2275 adapter->tx_itr = e1000_update_itr(adapter,
2276 adapter->tx_itr,
2277 adapter->total_tx_packets,
2278 adapter->total_tx_bytes);
2279 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2280 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2281 adapter->tx_itr = low_latency;
2282
2283 adapter->rx_itr = e1000_update_itr(adapter,
2284 adapter->rx_itr,
2285 adapter->total_rx_packets,
2286 adapter->total_rx_bytes);
2287 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2288 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2289 adapter->rx_itr = low_latency;
2290
2291 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2292
2293 switch (current_itr) {
2294 /* counts and packets in update_itr are dependent on these numbers */
2295 case lowest_latency:
2296 new_itr = 70000;
2297 break;
2298 case low_latency:
2299 new_itr = 20000; /* aka hwitr = ~200 */
2300 break;
2301 case bulk_latency:
2302 new_itr = 4000;
2303 break;
2304 default:
2305 break;
2306 }
2307
2308set_itr_now:
2309 if (new_itr != adapter->itr) {
ad68076e
BA
2310 /*
2311 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2312 * by adding intermediate steps when interrupt rate is
ad68076e
BA
2313 * increasing
2314 */
bc7f75fa
AK
2315 new_itr = new_itr > adapter->itr ?
2316 min(adapter->itr + (new_itr >> 2), new_itr) :
2317 new_itr;
2318 adapter->itr = new_itr;
4662e82b
BA
2319 adapter->rx_ring->itr_val = new_itr;
2320 if (adapter->msix_entries)
2321 adapter->rx_ring->set_itr = 1;
2322 else
2323 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK
2324 }
2325}
2326
4662e82b
BA
2327/**
2328 * e1000_alloc_queues - Allocate memory for all rings
2329 * @adapter: board private structure to initialize
2330 **/
2331static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2332{
2333 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2334 if (!adapter->tx_ring)
2335 goto err;
2336
2337 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2338 if (!adapter->rx_ring)
2339 goto err;
2340
2341 return 0;
2342err:
2343 e_err("Unable to allocate memory for queues\n");
2344 kfree(adapter->rx_ring);
2345 kfree(adapter->tx_ring);
2346 return -ENOMEM;
2347}
2348
bc7f75fa
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2349/**
2350 * e1000_clean - NAPI Rx polling callback
ad68076e 2351 * @napi: struct associated with this polling callback
489815ce 2352 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK
2353 **/
2354static int e1000_clean(struct napi_struct *napi, int budget)
2355{
2356 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2357 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2358 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2359 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2360
4cf1653a 2361 adapter = netdev_priv(poll_dev);
bc7f75fa 2362
4662e82b
BA
2363 if (adapter->msix_entries &&
2364 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2365 goto clean_rx;
2366
92af3e95 2367 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2368
4662e82b 2369clean_rx:
bc7f75fa 2370 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2371
12d04a3c 2372 if (!tx_cleaned)
d2c7ddd6 2373 work_done = budget;
bc7f75fa 2374
53e52c72
DM
2375 /* If budget not fully consumed, exit the polling mode */
2376 if (work_done < budget) {
bc7f75fa
AK
2377 if (adapter->itr_setting & 3)
2378 e1000_set_itr(adapter);
288379f0 2379 napi_complete(napi);
a3c69fef
JB
2380 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2381 if (adapter->msix_entries)
2382 ew32(IMS, adapter->rx_ring->ims_val);
2383 else
2384 e1000_irq_enable(adapter);
2385 }
bc7f75fa
AK
2386 }
2387
2388 return work_done;
2389}
2390
2391static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2392{
2393 struct e1000_adapter *adapter = netdev_priv(netdev);
2394 struct e1000_hw *hw = &adapter->hw;
2395 u32 vfta, index;
2396
2397 /* don't update vlan cookie if already programmed */
2398 if ((adapter->hw.mng_cookie.status &
2399 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2400 (vid == adapter->mng_vlan_id))
2401 return;
caaddaf8 2402
bc7f75fa 2403 /* add VID to filter table */
caaddaf8
BA
2404 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2405 index = (vid >> 5) & 0x7F;
2406 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2407 vfta |= (1 << (vid & 0x1F));
2408 hw->mac.ops.write_vfta(hw, index, vfta);
2409 }
bc7f75fa
AK
2410}
2411
2412static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2413{
2414 struct e1000_adapter *adapter = netdev_priv(netdev);
2415 struct e1000_hw *hw = &adapter->hw;
2416 u32 vfta, index;
2417
74ef9c39
JB
2418 if (!test_bit(__E1000_DOWN, &adapter->state))
2419 e1000_irq_disable(adapter);
bc7f75fa 2420 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB
2421
2422 if (!test_bit(__E1000_DOWN, &adapter->state))
2423 e1000_irq_enable(adapter);
bc7f75fa
AK
2424
2425 if ((adapter->hw.mng_cookie.status &
2426 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2427 (vid == adapter->mng_vlan_id)) {
2428 /* release control to f/w */
2429 e1000_release_hw_control(adapter);
2430 return;
2431 }
2432
2433 /* remove VID from filter table */
caaddaf8
BA
2434 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2435 index = (vid >> 5) & 0x7F;
2436 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2437 vfta &= ~(1 << (vid & 0x1F));
2438 hw->mac.ops.write_vfta(hw, index, vfta);
2439 }
bc7f75fa
AK
2440}
2441
2442static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2443{
2444 struct net_device *netdev = adapter->netdev;
2445 u16 vid = adapter->hw.mng_cookie.vlan_id;
2446 u16 old_vid = adapter->mng_vlan_id;
2447
2448 if (!adapter->vlgrp)
2449 return;
2450
2451 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2452 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2453 if (adapter->hw.mng_cookie.status &
2454 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2455 e1000_vlan_rx_add_vid(netdev, vid);
2456 adapter->mng_vlan_id = vid;
2457 }
2458
2459 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2460 (vid != old_vid) &&
2461 !vlan_group_get_device(adapter->vlgrp, old_vid))
2462 e1000_vlan_rx_kill_vid(netdev, old_vid);
2463 } else {
2464 adapter->mng_vlan_id = vid;
2465 }
2466}
2467
2468
2469static void e1000_vlan_rx_register(struct net_device *netdev,
2470 struct vlan_group *grp)
2471{
2472 struct e1000_adapter *adapter = netdev_priv(netdev);
2473 struct e1000_hw *hw = &adapter->hw;
2474 u32 ctrl, rctl;
2475
74ef9c39
JB
2476 if (!test_bit(__E1000_DOWN, &adapter->state))
2477 e1000_irq_disable(adapter);
bc7f75fa
AK
2478 adapter->vlgrp = grp;
2479
2480 if (grp) {
2481 /* enable VLAN tag insert/strip */
2482 ctrl = er32(CTRL);
2483 ctrl |= E1000_CTRL_VME;
2484 ew32(CTRL, ctrl);
2485
2486 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2487 /* enable VLAN receive filtering */
2488 rctl = er32(RCTL);
bc7f75fa
AK
2489 rctl &= ~E1000_RCTL_CFIEN;
2490 ew32(RCTL, rctl);
2491 e1000_update_mng_vlan(adapter);
2492 }
2493 } else {
2494 /* disable VLAN tag insert/strip */
2495 ctrl = er32(CTRL);
2496 ctrl &= ~E1000_CTRL_VME;
2497 ew32(CTRL, ctrl);
2498
2499 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK
2500 if (adapter->mng_vlan_id !=
2501 (u16)E1000_MNG_VLAN_NONE) {
2502 e1000_vlan_rx_kill_vid(netdev,
2503 adapter->mng_vlan_id);
2504 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2505 }
2506 }
2507 }
2508
74ef9c39
JB
2509 if (!test_bit(__E1000_DOWN, &adapter->state))
2510 e1000_irq_enable(adapter);
bc7f75fa
AK
2511}
2512
2513static void e1000_restore_vlan(struct e1000_adapter *adapter)
2514{
2515 u16 vid;
2516
2517 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2518
2519 if (!adapter->vlgrp)
2520 return;
2521
2522 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2523 if (!vlan_group_get_device(adapter->vlgrp, vid))
2524 continue;
2525 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2526 }
2527}
2528
cd791618 2529static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK
2530{
2531 struct e1000_hw *hw = &adapter->hw;
cd791618 2532 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK
2533
2534 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2535 return;
2536
2537 manc = er32(MANC);
2538
ad68076e
BA
2539 /*
2540 * enable receiving management packets to the host. this will probably
bc7f75fa 2541 * generate destination unreachable messages from the host OS, but
ad68076e
BA
2542 * the packets will be handled on SMBUS
2543 */
bc7f75fa
AK
2544 manc |= E1000_MANC_EN_MNG2HOST;
2545 manc2h = er32(MANC2H);
cd791618
BA
2546
2547 switch (hw->mac.type) {
2548 default:
2549 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2550 break;
2551 case e1000_82574:
2552 case e1000_82583:
2553 /*
2554 * Check if IPMI pass-through decision filter already exists;
2555 * if so, enable it.
2556 */
2557 for (i = 0, j = 0; i < 8; i++) {
2558 mdef = er32(MDEF(i));
2559
2560 /* Ignore filters with anything other than IPMI ports */
2561 if (mdef & !(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2562 continue;
2563
2564 /* Enable this decision filter in MANC2H */
2565 if (mdef)
2566 manc2h |= (1 << i);
2567
2568 j |= mdef;
2569 }
2570
2571 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2572 break;
2573
2574 /* Create new decision filter in an empty filter */
2575 for (i = 0, j = 0; i < 8; i++)
2576 if (er32(MDEF(i)) == 0) {
2577 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2578 E1000_MDEF_PORT_664));
2579 manc2h |= (1 << 1);
2580 j++;
2581 break;
2582 }
2583
2584 if (!j)
2585 e_warn("Unable to create IPMI pass-through filter\n");
2586 break;
2587 }
2588
bc7f75fa
AK
2589 ew32(MANC2H, manc2h);
2590 ew32(MANC, manc);
2591}
2592
2593/**
2594 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2595 * @adapter: board private structure
2596 *
2597 * Configure the Tx unit of the MAC after a reset.
2598 **/
2599static void e1000_configure_tx(struct e1000_adapter *adapter)
2600{
2601 struct e1000_hw *hw = &adapter->hw;
2602 struct e1000_ring *tx_ring = adapter->tx_ring;
2603 u64 tdba;
2604 u32 tdlen, tctl, tipg, tarc;
2605 u32 ipgr1, ipgr2;
2606
2607 /* Setup the HW Tx Head and Tail descriptor pointers */
2608 tdba = tx_ring->dma;
2609 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2610 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK
2611 ew32(TDBAH, (tdba >> 32));
2612 ew32(TDLEN, tdlen);
2613 ew32(TDH, 0);
2614 ew32(TDT, 0);
2615 tx_ring->head = E1000_TDH;
2616 tx_ring->tail = E1000_TDT;
2617
2618 /* Set the default values for the Tx Inter Packet Gap timer */
2619 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2620 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2621 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2622
2623 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2624 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2625
2626 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2627 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2628 ew32(TIPG, tipg);
2629
2630 /* Set the Tx Interrupt Delay register */
2631 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2632 /* Tx irq moderation */
bc7f75fa
AK
2633 ew32(TADV, adapter->tx_abs_int_delay);
2634
2635 /* Program the Transmit Control Register */
2636 tctl = er32(TCTL);
2637 tctl &= ~E1000_TCTL_CT;
2638 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2639 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2640
2641 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2642 tarc = er32(TARC(0));
ad68076e
BA
2643 /*
2644 * set the speed mode bit, we'll clear it if we're not at
2645 * gigabit link later
2646 */
bc7f75fa
AK
2647#define SPEED_MODE_BIT (1 << 21)
2648 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2649 ew32(TARC(0), tarc);
bc7f75fa
AK
2650 }
2651
2652 /* errata: program both queues to unweighted RR */
2653 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2654 tarc = er32(TARC(0));
bc7f75fa 2655 tarc |= 1;
e9ec2c0f
JK
2656 ew32(TARC(0), tarc);
2657 tarc = er32(TARC(1));
bc7f75fa 2658 tarc |= 1;
e9ec2c0f 2659 ew32(TARC(1), tarc);
bc7f75fa
AK
2660 }
2661
bc7f75fa
AK
2662 /* Setup Transmit Descriptor Settings for eop descriptor */
2663 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2664
2665 /* only set IDE if we are delaying interrupts using the timers */
2666 if (adapter->tx_int_delay)
2667 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2668
2669 /* enable Report Status bit */
2670 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2671
2672 ew32(TCTL, tctl);
2673
edfea6e6 2674 e1000e_config_collision_dist(hw);
bc7f75fa
AK
2675}
2676
2677/**
2678 * e1000_setup_rctl - configure the receive control registers
2679 * @adapter: Board private structure
2680 **/
2681#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2682 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2683static void e1000_setup_rctl(struct e1000_adapter *adapter)
2684{
2685 struct e1000_hw *hw = &adapter->hw;
2686 u32 rctl, rfctl;
2687 u32 psrctl = 0;
2688 u32 pages = 0;
2689
2690 /* Program MC offset vector base */
2691 rctl = er32(RCTL);
2692 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2693 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2694 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2695 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2696
2697 /* Do not Store bad packets */
2698 rctl &= ~E1000_RCTL_SBP;
2699
2700 /* Enable Long Packet receive */
2701 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2702 rctl &= ~E1000_RCTL_LPE;
2703 else
2704 rctl |= E1000_RCTL_LPE;
2705
eb7c3adb
JK
2706 /* Some systems expect that the CRC is included in SMBUS traffic. The
2707 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2708 * host memory when this is enabled
2709 */
2710 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2711 rctl |= E1000_RCTL_SECRC;
5918bd88 2712
a4f58f54
BA
2713 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2714 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2715 u16 phy_data;
2716
2717 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2718 phy_data &= 0xfff8;
2719 phy_data |= (1 << 2);
2720 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2721
2722 e1e_rphy(hw, 22, &phy_data);
2723 phy_data &= 0x0fff;
2724 phy_data |= (1 << 14);
2725 e1e_wphy(hw, 0x10, 0x2823);
2726 e1e_wphy(hw, 0x11, 0x0003);
2727 e1e_wphy(hw, 22, phy_data);
2728 }
2729
bc7f75fa
AK
2730 /* Setup buffer sizes */
2731 rctl &= ~E1000_RCTL_SZ_4096;
2732 rctl |= E1000_RCTL_BSEX;
2733 switch (adapter->rx_buffer_len) {
bc7f75fa
AK
2734 case 2048:
2735 default:
2736 rctl |= E1000_RCTL_SZ_2048;
2737 rctl &= ~E1000_RCTL_BSEX;
2738 break;
2739 case 4096:
2740 rctl |= E1000_RCTL_SZ_4096;
2741 break;
2742 case 8192:
2743 rctl |= E1000_RCTL_SZ_8192;
2744 break;
2745 case 16384:
2746 rctl |= E1000_RCTL_SZ_16384;
2747 break;
2748 }
2749
2750 /*
2751 * 82571 and greater support packet-split where the protocol
2752 * header is placed in skb->data and the packet data is
2753 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2754 * In the case of a non-split, skb->data is linearly filled,
2755 * followed by the page buffers. Therefore, skb->data is
2756 * sized to hold the largest protocol header.
2757 *
2758 * allocations using alloc_page take too long for regular MTU
2759 * so only enable packet split for jumbo frames
2760 *
2761 * Using pages when the page size is greater than 16k wastes
2762 * a lot of memory, since we allocate 3 pages at all times
2763 * per packet.
2764 */
bc7f75fa 2765 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA
2766 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2767 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2768 adapter->rx_ps_pages = pages;
97ac8cae
BA
2769 else
2770 adapter->rx_ps_pages = 0;
bc7f75fa
AK
2771
2772 if (adapter->rx_ps_pages) {
2773 /* Configure extra packet-split registers */
2774 rfctl = er32(RFCTL);
2775 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA
2776 /*
2777 * disable packet split support for IPv6 extension headers,
2778 * because some malformed IPv6 headers can hang the Rx
2779 */
bc7f75fa
AK
2780 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2781 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2782
2783 ew32(RFCTL, rfctl);
2784
140a7480
AK
2785 /* Enable Packet split descriptors */
2786 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK
2787
2788 psrctl |= adapter->rx_ps_bsize0 >>
2789 E1000_PSRCTL_BSIZE0_SHIFT;
2790
2791 switch (adapter->rx_ps_pages) {
2792 case 3:
2793 psrctl |= PAGE_SIZE <<
2794 E1000_PSRCTL_BSIZE3_SHIFT;
2795 case 2:
2796 psrctl |= PAGE_SIZE <<
2797 E1000_PSRCTL_BSIZE2_SHIFT;
2798 case 1:
2799 psrctl |= PAGE_SIZE >>
2800 E1000_PSRCTL_BSIZE1_SHIFT;
2801 break;
2802 }
2803
2804 ew32(PSRCTL, psrctl);
2805 }
2806
2807 ew32(RCTL, rctl);
318a94d6
JK
2808 /* just started the receive unit, no need to restart */
2809 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK
2810}
2811
2812/**
2813 * e1000_configure_rx - Configure Receive Unit after Reset
2814 * @adapter: board private structure
2815 *
2816 * Configure the Rx unit of the MAC after a reset.
2817 **/
2818static void e1000_configure_rx(struct e1000_adapter *adapter)
2819{
2820 struct e1000_hw *hw = &adapter->hw;
2821 struct e1000_ring *rx_ring = adapter->rx_ring;
2822 u64 rdba;
2823 u32 rdlen, rctl, rxcsum, ctrl_ext;
2824
2825 if (adapter->rx_ps_pages) {
2826 /* this is a 32 byte descriptor */
2827 rdlen = rx_ring->count *
2828 sizeof(union e1000_rx_desc_packet_split);
2829 adapter->clean_rx = e1000_clean_rx_irq_ps;
2830 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA
2831 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2832 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2833 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2834 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2835 } else {
97ac8cae 2836 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK
2837 adapter->clean_rx = e1000_clean_rx_irq;
2838 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2839 }
2840
2841 /* disable receives while setting up the descriptors */
2842 rctl = er32(RCTL);
2843 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2844 e1e_flush();
2845 msleep(10);
2846
2847 /* set the Receive Delay Timer Register */
2848 ew32(RDTR, adapter->rx_int_delay);
2849
2850 /* irq moderation */
2851 ew32(RADV, adapter->rx_abs_int_delay);
2852 if (adapter->itr_setting != 0)
ad68076e 2853 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK
2854
2855 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK
2856 /* Auto-Mask interrupts upon ICR access */
2857 ctrl_ext |= E1000_CTRL_EXT_IAME;
2858 ew32(IAM, 0xffffffff);
2859 ew32(CTRL_EXT, ctrl_ext);
2860 e1e_flush();
2861
ad68076e
BA
2862 /*
2863 * Setup the HW Rx Head and Tail Descriptor Pointers and
2864 * the Base and Length of the Rx Descriptor Ring
2865 */
bc7f75fa 2866 rdba = rx_ring->dma;
284901a9 2867 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK
2868 ew32(RDBAH, (rdba >> 32));
2869 ew32(RDLEN, rdlen);
2870 ew32(RDH, 0);
2871 ew32(RDT, 0);
2872 rx_ring->head = E1000_RDH;
2873 rx_ring->tail = E1000_RDT;
2874
2875 /* Enable Receive Checksum Offload for TCP and UDP */
2876 rxcsum = er32(RXCSUM);
2877 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2878 rxcsum |= E1000_RXCSUM_TUOFL;
2879
ad68076e
BA
2880 /*
2881 * IPv4 payload checksum for UDP fragments must be
2882 * used in conjunction with packet-split.
2883 */
bc7f75fa
AK
2884 if (adapter->rx_ps_pages)
2885 rxcsum |= E1000_RXCSUM_IPPCSE;
2886 } else {
2887 rxcsum &= ~E1000_RXCSUM_TUOFL;
2888 /* no need to clear IPPCSE as it defaults to 0 */
2889 }
2890 ew32(RXCSUM, rxcsum);
2891
ad68076e
BA
2892 /*
2893 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2894 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA
2895 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2896 */
53ec5498
BA
2897 if (adapter->flags & FLAG_HAS_ERT) {
2898 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2899 u32 rxdctl = er32(RXDCTL(0));
2900 ew32(RXDCTL(0), rxdctl | 0x3);
2901 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2902 /*
2903 * With jumbo frames and early-receive enabled,
2904 * excessive C-state transition latencies result in
2905 * dropped transactions.
2906 */
2907 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2908 adapter->netdev->name, 55);
2909 } else {
2910 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2911 adapter->netdev->name,
2912 PM_QOS_DEFAULT_VALUE);
2913 }
97ac8cae 2914 }
bc7f75fa
AK
2915
2916 /* Enable Receives */
2917 ew32(RCTL, rctl);
2918}
2919
2920/**
e2de3eb6 2921 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK
2922 * @hw: pointer to the HW structure
2923 * @mc_addr_list: array of multicast addresses to program
2924 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2925 *
ab8932f3 2926 * Updates the Multicast Table Array.
bc7f75fa 2927 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 2928 **/
e2de3eb6 2929static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 2930 u32 mc_addr_count)
bc7f75fa 2931{
ab8932f3 2932 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK
2933}
2934
2935/**
2936 * e1000_set_multi - Multicast and Promiscuous mode set
2937 * @netdev: network interface device structure
2938 *
2939 * The set_multi entry point is called whenever the multicast address
2940 * list or the network interface flags are updated. This routine is
2941 * responsible for configuring the hardware for proper multicast,
2942 * promiscuous mode, and all-multi behavior.
2943 **/
2944static void e1000_set_multi(struct net_device *netdev)
2945{
2946 struct e1000_adapter *adapter = netdev_priv(netdev);
2947 struct e1000_hw *hw = &adapter->hw;
22bedad3 2948 struct netdev_hw_addr *ha;
bc7f75fa
AK
2949 u8 *mta_list;
2950 u32 rctl;
2951 int i;
2952
2953 /* Check for Promiscuous and All Multicast modes */
2954
2955 rctl = er32(RCTL);
2956
2957 if (netdev->flags & IFF_PROMISC) {
2958 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2959 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2960 } else {
746b9f02
PM
2961 if (netdev->flags & IFF_ALLMULTI) {
2962 rctl |= E1000_RCTL_MPE;
2963 rctl &= ~E1000_RCTL_UPE;
2964 } else {
2965 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2966 }
78ed11a5 2967 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2968 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK
2969 }
2970
2971 ew32(RCTL, rctl);
2972
7aeef972
JP
2973 if (!netdev_mc_empty(netdev)) {
2974 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK
2975 if (!mta_list)
2976 return;
2977
2978 /* prepare a packed array of only addresses. */
7aeef972 2979 i = 0;
22bedad3
JP
2980 netdev_for_each_mc_addr(ha, netdev)
2981 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 2982
ab8932f3 2983 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK
2984 kfree(mta_list);
2985 } else {
2986 /*
2987 * if we're called from probe, we might not have
2988 * anything to do here, so clear out the list
2989 */
ab8932f3 2990 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK
2991 }
2992}
2993
2994/**
ad68076e 2995 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK
2996 * @adapter: private board structure
2997 **/
2998static void e1000_configure(struct e1000_adapter *adapter)
2999{
3000 e1000_set_multi(adapter->netdev);
3001
3002 e1000_restore_vlan(adapter);
cd791618 3003 e1000_init_manageability_pt(adapter);
bc7f75fa
AK
3004
3005 e1000_configure_tx(adapter);
3006 e1000_setup_rctl(adapter);
3007 e1000_configure_rx(adapter);
ad68076e 3008 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK
3009}
3010
3011/**
3012 * e1000e_power_up_phy - restore link in case the phy was powered down
3013 * @adapter: address of board private structure
3014 *
3015 * The phy may be powered down to save power and turn off link when the
3016 * driver is unloaded and wake on lan is not enabled (among others)
3017 * *** this routine MUST be followed by a call to e1000e_reset ***
3018 **/
3019void e1000e_power_up_phy(struct e1000_adapter *adapter)
3020{
17f208de
BA
3021 if (adapter->hw.phy.ops.power_up)
3022 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK
3023
3024 adapter->hw.mac.ops.setup_link(&adapter->hw);
3025}
3026
3027/**
3028 * e1000_power_down_phy - Power down the PHY
3029 *
17f208de
BA
3030 * Power down the PHY so no link is implied when interface is down.
3031 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK
3032 */
3033static void e1000_power_down_phy(struct e1000_adapter *adapter)
3034{
bc7f75fa 3035 /* WoL is enabled */
23b66e2b 3036 if (adapter->wol)
bc7f75fa
AK
3037 return;
3038
17f208de
BA
3039 if (adapter->hw.phy.ops.power_down)
3040 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK
3041}
3042
3043/**
3044 * e1000e_reset - bring the hardware into a known good state
3045 *
3046 * This function boots the hardware and enables some settings that
3047 * require a configuration cycle of the hardware - those cannot be
3048 * set/changed during runtime. After reset the device needs to be
ad68076e 3049 * properly configured for Rx, Tx etc.
bc7f75fa
AK
3050 */
3051void e1000e_reset(struct e1000_adapter *adapter)
3052{
3053 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3054 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK
3055 struct e1000_hw *hw = &adapter->hw;
3056 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3057 u32 pba = adapter->pba;
bc7f75fa
AK
3058 u16 hwm;
3059
ad68076e 3060 /* reset Packet Buffer Allocation to default */
318a94d6 3061 ew32(PBA, pba);
df762464 3062
318a94d6 3063 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA
3064 /*
3065 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK
3066 * large enough to accommodate two full transmit packets,
3067 * rounded up to the next 1KB and expressed in KB. Likewise,
3068 * the Rx FIFO should be large enough to accommodate at least
3069 * one full receive packet and is similarly rounded up and
ad68076e
BA
3070 * expressed in KB.
3071 */
df762464 3072 pba = er32(PBA);
bc7f75fa 3073 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3074 tx_space = pba >> 16;
bc7f75fa 3075 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3076 pba &= 0xffff;
ad68076e
BA
3077 /*
3078 * the Tx fifo also stores 16 bytes of information about the tx
3079 * but don't include ethernet FCS because hardware appends it
318a94d6
JK
3080 */
3081 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK
3082 sizeof(struct e1000_tx_desc) -
3083 ETH_FCS_LEN) * 2;
3084 min_tx_space = ALIGN(min_tx_space, 1024);
3085 min_tx_space >>= 10;
3086 /* software strips receive CRC, so leave room for it */
318a94d6 3087 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK
3088 min_rx_space = ALIGN(min_rx_space, 1024);
3089 min_rx_space >>= 10;
3090
ad68076e
BA
3091 /*
3092 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3093 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA
3094 * allocation, take space away from current Rx allocation
3095 */
df762464
AK
3096 if ((tx_space < min_tx_space) &&
3097 ((min_tx_space - tx_space) < pba)) {
3098 pba -= min_tx_space - tx_space;
bc7f75fa 3099
ad68076e
BA
3100 /*
3101 * if short on Rx space, Rx wins and must trump tx
3102 * adjustment or use Early Receive if available
3103 */
df762464 3104 if ((pba < min_rx_space) &&
bc7f75fa
AK
3105 (!(adapter->flags & FLAG_HAS_ERT)))
3106 /* ERT enabled in e1000_configure_rx */
df762464 3107 pba = min_rx_space;
bc7f75fa 3108 }
df762464
AK
3109
3110 ew32(PBA, pba);
bc7f75fa
AK
3111 }
3112
bc7f75fa 3113
ad68076e
BA
3114 /*
3115 * flow control settings
3116 *
38eb394e 3117 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK
3118 * (or the size used for early receive) above it in the Rx FIFO.
3119 * Set it to the lower of:
3120 * - 90% of the Rx FIFO size, and
3121 * - the full Rx FIFO size minus the early receive size (for parts
3122 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3123 * - the full Rx FIFO size minus one full frame
ad68076e 3124 */
38eb394e
BA
3125 if (hw->mac.type == e1000_pchlan) {
3126 /*
3127 * Workaround PCH LOM adapter hangs with certain network
3128 * loads. If hangs persist, try disabling Tx flow control.
3129 */
3130 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3131 fc->high_water = 0x3500;
3132 fc->low_water = 0x1500;
3133 } else {
3134 fc->high_water = 0x5000;
3135 fc->low_water = 0x3000;
3136 }
a305595b 3137 fc->refresh_time = 0x1000;
38eb394e
BA
3138 } else {
3139 if ((adapter->flags & FLAG_HAS_ERT) &&
3140 (adapter->netdev->mtu > ETH_DATA_LEN))
3141 hwm = min(((pba << 10) * 9 / 10),
3142 ((pba << 10) - (E1000_ERT_2048 << 3)));
3143 else
3144 hwm = min(((pba << 10) * 9 / 10),
3145 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 3146
38eb394e
BA
3147 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3148 fc->low_water = fc->high_water - 8;
3149 }
bc7f75fa
AK
3150
3151 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 3152 fc->pause_time = 0xFFFF;
bc7f75fa 3153 else
318a94d6
JK
3154 fc->pause_time = E1000_FC_PAUSE_TIME;
3155 fc->send_xon = 1;
5c48ef3e 3156 fc->current_mode = fc->requested_mode;
bc7f75fa
AK
3157
3158 /* Allow time for pending master requests to run */
3159 mac->ops.reset_hw(hw);
97ac8cae
BA
3160
3161 /*
3162 * For parts with AMT enabled, let the firmware know
3163 * that the network interface is in control
3164 */
c43bc57e 3165 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA
3166 e1000_get_hw_control(adapter);
3167
bc7f75fa 3168 ew32(WUC, 0);
a4f58f54
BA
3169 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
3170 e1e_wphy(&adapter->hw, BM_WUC, 0);
bc7f75fa
AK
3171
3172 if (mac->ops.init_hw(hw))
44defeb3 3173 e_err("Hardware Error\n");
bc7f75fa
AK
3174
3175 e1000_update_mng_vlan(adapter);
3176
3177 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3178 ew32(VET, ETH_P_8021Q);
3179
3180 e1000e_reset_adaptive(hw);
3181 e1000_get_phy_info(hw);
3182
918d7197
BA
3183 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3184 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3185 u16 phy_data = 0;
ad68076e
BA
3186 /*
3187 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3188 * the return value of this function because there is nothing
ad68076e
BA
3189 * different we would do if it failed
3190 */
bc7f75fa
AK
3191 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3192 phy_data &= ~IGP02E1000_PM_SPD;
3193 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3194 }
bc7f75fa
AK
3195}
3196
3197int e1000e_up(struct e1000_adapter *adapter)
3198{
3199 struct e1000_hw *hw = &adapter->hw;
3200
53ec5498
BA
3201 /* DMA latency requirement to workaround early-receive/jumbo issue */
3202 if (adapter->flags & FLAG_HAS_ERT)
3203 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY,
3204 adapter->netdev->name,
3205 PM_QOS_DEFAULT_VALUE);
3206
bc7f75fa
AK
3207 /* hardware has been reset, we need to reload some things */
3208 e1000_configure(adapter);
3209
3210 clear_bit(__E1000_DOWN, &adapter->state);
3211
3212 napi_enable(&adapter->napi);
4662e82b
BA
3213 if (adapter->msix_entries)
3214 e1000_configure_msix(adapter);
bc7f75fa
AK
3215 e1000_irq_enable(adapter);
3216
4cb9be7a
JB
3217 netif_wake_queue(adapter->netdev);
3218
bc7f75fa 3219 /* fire a link change interrupt to start the watchdog */
52a9b231
BA
3220 if (adapter->msix_entries)
3221 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3222 else
3223 ew32(ICS, E1000_ICS_LSC);
3224
bc7f75fa
AK
3225 return 0;
3226}
3227
3228void e1000e_down(struct e1000_adapter *adapter)
3229{
3230 struct net_device *netdev = adapter->netdev;
3231 struct e1000_hw *hw = &adapter->hw;
3232 u32 tctl, rctl;
3233
ad68076e
BA
3234 /*
3235 * signal that we're down so the interrupt handler does not
3236 * reschedule our watchdog timer
3237 */
bc7f75fa
AK
3238 set_bit(__E1000_DOWN, &adapter->state);
3239
3240 /* disable receives in the hardware */
3241 rctl = er32(RCTL);
3242 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3243 /* flush and sleep below */
3244
4cb9be7a 3245 netif_stop_queue(netdev);
bc7f75fa
AK
3246
3247 /* disable transmits in the hardware */
3248 tctl = er32(TCTL);
3249 tctl &= ~E1000_TCTL_EN;
3250 ew32(TCTL, tctl);
3251 /* flush both disables and wait for them to finish */
3252 e1e_flush();
3253 msleep(10);
3254
3255 napi_disable(&adapter->napi);
3256 e1000_irq_disable(adapter);
3257
3258 del_timer_sync(&adapter->watchdog_timer);
3259 del_timer_sync(&adapter->phy_info_timer);
3260
bc7f75fa
AK
3261 netif_carrier_off(netdev);
3262 adapter->link_speed = 0;
3263 adapter->link_duplex = 0;
3264
52cc3086
JK
3265 if (!pci_channel_offline(adapter->pdev))
3266 e1000e_reset(adapter);
bc7f75fa
AK
3267 e1000_clean_tx_ring(adapter);
3268 e1000_clean_rx_ring(adapter);
3269
53ec5498
BA
3270 if (adapter->flags & FLAG_HAS_ERT)
3271 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY,
3272 adapter->netdev->name);
3273
bc7f75fa
AK
3274 /*
3275 * TODO: for power management, we could drop the link and
3276 * pci_disable_device here.
3277 */
3278}
3279
3280void e1000e_reinit_locked(struct e1000_adapter *adapter)
3281{
3282 might_sleep();
3283 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3284 msleep(1);
3285 e1000e_down(adapter);
3286 e1000e_up(adapter);
3287 clear_bit(__E1000_RESETTING, &adapter->state);
3288}
3289
3290/**
3291 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3292 * @adapter: board private structure to initialize
3293 *
3294 * e1000_sw_init initializes the Adapter private data structure.
3295 * Fields are initialized based on PCI device information and
3296 * OS network device settings (MTU size).
3297 **/
3298static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3299{
bc7f75fa
AK
3300 struct net_device *netdev = adapter->netdev;
3301
3302 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3303 adapter->rx_ps_bsize0 = 128;
318a94d6
JK
3304 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3305 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3306
4662e82b 3307 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3308
4662e82b
BA
3309 if (e1000_alloc_queues(adapter))
3310 return -ENOMEM;
bc7f75fa 3311
bc7f75fa 3312 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK
3313 e1000_irq_disable(adapter);
3314
bc7f75fa
AK
3315 set_bit(__E1000_DOWN, &adapter->state);
3316 return 0;
bc7f75fa
AK
3317}
3318
f8d59f78
BA
3319/**
3320 * e1000_intr_msi_test - Interrupt Handler
3321 * @irq: interrupt number
3322 * @data: pointer to a network interface device structure
3323 **/
3324static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3325{
3326 struct net_device *netdev = data;
3327 struct e1000_adapter *adapter = netdev_priv(netdev);
3328 struct e1000_hw *hw = &adapter->hw;
3329 u32 icr = er32(ICR);
3330
3bb99fe2 3331 e_dbg("icr is %08X\n", icr);
f8d59f78
BA
3332 if (icr & E1000_ICR_RXSEQ) {
3333 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3334 wmb();
3335 }
3336
3337 return IRQ_HANDLED;
3338}
3339
3340/**
3341 * e1000_test_msi_interrupt - Returns 0 for successful test
3342 * @adapter: board private struct
3343 *
3344 * code flow taken from tg3.c
3345 **/
3346static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3347{
3348 struct net_device *netdev = adapter->netdev;
3349 struct e1000_hw *hw = &adapter->hw;
3350 int err;
3351
3352 /* poll_enable hasn't been called yet, so don't need disable */
3353 /* clear any pending events */
3354 er32(ICR);
3355
3356 /* free the real vector and request a test handler */
3357 e1000_free_irq(adapter);
4662e82b 3358 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA
3359
3360 /* Assume that the test fails, if it succeeds then the test
3361 * MSI irq handler will unset this flag */
3362 adapter->flags |= FLAG_MSI_TEST_FAILED;
3363
3364 err = pci_enable_msi(adapter->pdev);
3365 if (err)
3366 goto msi_test_failed;
3367
a0607fd3 3368 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA
3369 netdev->name, netdev);
3370 if (err) {
3371 pci_disable_msi(adapter->pdev);
3372 goto msi_test_failed;
3373 }
3374
3375 wmb();
3376
3377 e1000_irq_enable(adapter);
3378
3379 /* fire an unusual interrupt on the test handler */
3380 ew32(ICS, E1000_ICS_RXSEQ);
3381 e1e_flush();
3382 msleep(50);
3383
3384 e1000_irq_disable(adapter);
3385
3386 rmb();
3387
3388 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3389 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA
3390 err = -EIO;
3391 e_info("MSI interrupt test failed!\n");
3392 }
3393
3394 free_irq(adapter->pdev->irq, netdev);
3395 pci_disable_msi(adapter->pdev);
3396
3397 if (err == -EIO)
3398 goto msi_test_failed;
3399
3400 /* okay so the test worked, restore settings */
3bb99fe2 3401 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3402msi_test_failed:
4662e82b 3403 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA
3404 e1000_request_irq(adapter);
3405 return err;
3406}
3407
3408/**
3409 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3410 * @adapter: board private struct
3411 *
3412 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3413 **/
3414static int e1000_test_msi(struct e1000_adapter *adapter)
3415{
3416 int err;
3417 u16 pci_cmd;
3418
3419 if (!(adapter->flags & FLAG_MSI_ENABLED))
3420 return 0;
3421
3422 /* disable SERR in case the MSI write causes a master abort */
3423 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3424 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3425 pci_cmd & ~PCI_COMMAND_SERR);
3426
3427 err = e1000_test_msi_interrupt(adapter);
3428
3429 /* restore previous setting of command word */
3430 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3431
3432 /* success ! */
3433 if (!err)
3434 return 0;
3435
3436 /* EIO means MSI test failed */
3437 if (err != -EIO)
3438 return err;
3439
3440 /* back to INTx mode */
3441 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3442
3443 e1000_free_irq(adapter);
3444
3445 err = e1000_request_irq(adapter);
3446
3447 return err;
3448}
3449
bc7f75fa
AK
3450/**
3451 * e1000_open - Called when a network interface is made active
3452 * @netdev: network interface device structure
3453 *
3454 * Returns 0 on success, negative value on failure
3455 *
3456 * The open entry point is called when a network interface is made
3457 * active by the system (IFF_UP). At this point all resources needed
3458 * for transmit and receive operations are allocated, the interrupt
3459 * handler is registered with the OS, the watchdog timer is started,
3460 * and the stack is notified that the interface is ready.
3461 **/
3462static int e1000_open(struct net_device *netdev)
3463{
3464 struct e1000_adapter *adapter = netdev_priv(netdev);
3465 struct e1000_hw *hw = &adapter->hw;
23606cf5 3466 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK
3467 int err;
3468
3469 /* disallow open during test */
3470 if (test_bit(__E1000_TESTING, &adapter->state))
3471 return -EBUSY;
3472
23606cf5
RW
3473 pm_runtime_get_sync(&pdev->dev);
3474
9c563d20
JB
3475 netif_carrier_off(netdev);
3476
bc7f75fa
AK
3477 /* allocate transmit descriptors */
3478 err = e1000e_setup_tx_resources(adapter);
3479 if (err)
3480 goto err_setup_tx;
3481
3482 /* allocate receive descriptors */
3483 err = e1000e_setup_rx_resources(adapter);
3484 if (err)
3485 goto err_setup_rx;
3486
11b08be8
BA
3487 /*
3488 * If AMT is enabled, let the firmware know that the network
3489 * interface is now open and reset the part to a known state.
3490 */
3491 if (adapter->flags & FLAG_HAS_AMT) {
3492 e1000_get_hw_control(adapter);
3493 e1000e_reset(adapter);
3494 }
3495
bc7f75fa
AK
3496 e1000e_power_up_phy(adapter);
3497
3498 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3499 if ((adapter->hw.mng_cookie.status &
3500 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3501 e1000_update_mng_vlan(adapter);
3502
ad68076e
BA
3503 /*
3504 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK
3505 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3506 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA
3507 * clean_rx handler before we do so.
3508 */
bc7f75fa
AK
3509 e1000_configure(adapter);
3510
3511 err = e1000_request_irq(adapter);
3512 if (err)
3513 goto err_req_irq;
3514
f8d59f78
BA
3515 /*
3516 * Work around PCIe errata with MSI interrupts causing some chipsets to
3517 * ignore e1000e MSI messages, which means we need to test our MSI
3518 * interrupt now
3519 */
4662e82b 3520 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA
3521 err = e1000_test_msi(adapter);
3522 if (err) {
3523 e_err("Interrupt allocation failed\n");
3524 goto err_req_irq;
3525 }
3526 }
3527
bc7f75fa
AK
3528 /* From here on the code is the same as e1000e_up() */
3529 clear_bit(__E1000_DOWN, &adapter->state);
3530
3531 napi_enable(&adapter->napi);
3532
3533 e1000_irq_enable(adapter);
3534
4cb9be7a 3535 netif_start_queue(netdev);
d55b53ff 3536
23606cf5
RW
3537 adapter->idle_check = true;
3538 pm_runtime_put(&pdev->dev);
3539
bc7f75fa 3540 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA
3541 if (adapter->msix_entries)
3542 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3543 else
3544 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK
3545
3546 return 0;
3547
3548err_req_irq:
3549 e1000_release_hw_control(adapter);
3550 e1000_power_down_phy(adapter);
3551 e1000e_free_rx_resources(adapter);
3552err_setup_rx:
3553 e1000e_free_tx_resources(adapter);
3554err_setup_tx:
3555 e1000e_reset(adapter);
23606cf5 3556 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK
3557
3558 return err;
3559}
3560
3561/**
3562 * e1000_close - Disables a network interface
3563 * @netdev: network interface device structure
3564 *
3565 * Returns 0, this is not allowed to fail
3566 *
3567 * The close entry point is called when an interface is de-activated
3568 * by the OS. The hardware is still under the drivers control, but
3569 * needs to be disabled. A global MAC reset is issued to stop the
3570 * hardware, and all transmit and receive resources are freed.
3571 **/
3572static int e1000_close(struct net_device *netdev)
3573{
3574 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3575 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK
3576
3577 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW
3578
3579 pm_runtime_get_sync(&pdev->dev);
3580
3581 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3582 e1000e_down(adapter);
3583 e1000_free_irq(adapter);
3584 }
bc7f75fa 3585 e1000_power_down_phy(adapter);
bc7f75fa
AK
3586
3587 e1000e_free_tx_resources(adapter);
3588 e1000e_free_rx_resources(adapter);
3589
ad68076e
BA
3590 /*
3591 * kill manageability vlan ID if supported, but not if a vlan with
3592 * the same ID is registered on the host OS (let 8021q kill it)
3593 */
bc7f75fa
AK
3594 if ((adapter->hw.mng_cookie.status &
3595 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3596 !(adapter->vlgrp &&
3597 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3598 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3599
ad68076e
BA
3600 /*
3601 * If AMT is enabled, let the firmware know that the network
3602 * interface is now closed
3603 */
c43bc57e 3604 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK
3605 e1000_release_hw_control(adapter);
3606
23606cf5
RW
3607 pm_runtime_put_sync(&pdev->dev);
3608
bc7f75fa
AK
3609 return 0;
3610}
3611/**
3612 * e1000_set_mac - Change the Ethernet Address of the NIC
3613 * @netdev: network interface device structure
3614 * @p: pointer to an address structure
3615 *
3616 * Returns 0 on success, negative on failure
3617 **/
3618static int e1000_set_mac(struct net_device *netdev, void *p)
3619{
3620 struct e1000_adapter *adapter = netdev_priv(netdev);
3621 struct sockaddr *addr = p;
3622
3623 if (!is_valid_ether_addr(addr->sa_data))
3624 return -EADDRNOTAVAIL;
3625
3626 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3627 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3628
3629 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3630
3631 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3632 /* activate the work around */
3633 e1000e_set_laa_state_82571(&adapter->hw, 1);
3634
ad68076e
BA
3635 /*
3636 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK
3637 * between the time RAR[0] gets clobbered and the time it
3638 * gets fixed (in e1000_watchdog), the actual LAA is in one
3639 * of the RARs and no incoming packets directed to this port
3640 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA
3641 * RAR[14]
3642 */
bc7f75fa
AK
3643 e1000e_rar_set(&adapter->hw,
3644 adapter->hw.mac.addr,
3645 adapter->hw.mac.rar_entry_count - 1);
3646 }
3647
3648 return 0;
3649}
3650
a8f88ff5
JB
3651/**
3652 * e1000e_update_phy_task - work thread to update phy
3653 * @work: pointer to our work struct
3654 *
3655 * this worker thread exists because we must acquire a
3656 * semaphore to read the phy, which we could msleep while
3657 * waiting for it, and we can't msleep in a timer.
3658 **/
3659static void e1000e_update_phy_task(struct work_struct *work)
3660{
3661 struct e1000_adapter *adapter = container_of(work,
3662 struct e1000_adapter, update_phy_task);
3663 e1000_get_phy_info(&adapter->hw);
3664}
3665
ad68076e
BA
3666/*
3667 * Need to wait a few seconds after link up to get diagnostic information from
3668 * the phy
3669 */
bc7f75fa
AK
3670static void e1000_update_phy_info(unsigned long data)
3671{
3672 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3673 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK
3674}
3675
3676/**
3677 * e1000e_update_stats - Update the board statistics counters
3678 * @adapter: board private structure
3679 **/
3680void e1000e_update_stats(struct e1000_adapter *adapter)
3681{
7274c20f 3682 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK
3683 struct e1000_hw *hw = &adapter->hw;
3684 struct pci_dev *pdev = adapter->pdev;
a4f58f54 3685 u16 phy_data;
bc7f75fa
AK
3686
3687 /*
3688 * Prevent stats update while adapter is being reset, or if the pci
3689 * connection is down.
3690 */
3691 if (adapter->link_speed == 0)
3692 return;
3693 if (pci_channel_offline(pdev))
3694 return;
3695
bc7f75fa
AK
3696 adapter->stats.crcerrs += er32(CRCERRS);
3697 adapter->stats.gprc += er32(GPRC);
7c25769f
BA
3698 adapter->stats.gorc += er32(GORCL);
3699 er32(GORCH); /* Clear gorc */
bc7f75fa
AK
3700 adapter->stats.bprc += er32(BPRC);
3701 adapter->stats.mprc += er32(MPRC);
3702 adapter->stats.roc += er32(ROC);
3703
bc7f75fa 3704 adapter->stats.mpc += er32(MPC);
a4f58f54
BA
3705 if ((hw->phy.type == e1000_phy_82578) ||
3706 (hw->phy.type == e1000_phy_82577)) {
3707 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
29477e24
BA
3708 if (!e1e_rphy(hw, HV_SCC_LOWER, &phy_data))
3709 adapter->stats.scc += phy_data;
a4f58f54
BA
3710
3711 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
29477e24
BA
3712 if (!e1e_rphy(hw, HV_ECOL_LOWER, &phy_data))
3713 adapter->stats.ecol += phy_data;
a4f58f54
BA
3714
3715 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
29477e24
BA
3716 if (!e1e_rphy(hw, HV_MCC_LOWER, &phy_data))
3717 adapter->stats.mcc += phy_data;
a4f58f54
BA
3718
3719 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
29477e24
BA
3720 if (!e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data))
3721 adapter->stats.latecol += phy_data;
a4f58f54
BA
3722
3723 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
29477e24
BA
3724 if (!e1e_rphy(hw, HV_DC_LOWER, &phy_data))
3725 adapter->stats.dc += phy_data;
a4f58f54
BA
3726 } else {
3727 adapter->stats.scc += er32(SCC);
3728 adapter->stats.ecol += er32(ECOL);
3729 adapter->stats.mcc += er32(MCC);
3730 adapter->stats.latecol += er32(LATECOL);
3731 adapter->stats.dc += er32(DC);
3732 }
bc7f75fa
AK
3733 adapter->stats.xonrxc += er32(XONRXC);
3734 adapter->stats.xontxc += er32(XONTXC);
3735 adapter->stats.xoffrxc += er32(XOFFRXC);
3736 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3737 adapter->stats.gptc += er32(GPTC);
7c25769f
BA
3738 adapter->stats.gotc += er32(GOTCL);
3739 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK
3740 adapter->stats.rnbc += er32(RNBC);
3741 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK
3742
3743 adapter->stats.mptc += er32(MPTC);
3744 adapter->stats.bptc += er32(BPTC);
3745
3746 /* used for adaptive IFS */
3747
3748 hw->mac.tx_packet_delta = er32(TPT);
3749 adapter->stats.tpt += hw->mac.tx_packet_delta;
a4f58f54
BA
3750 if ((hw->phy.type == e1000_phy_82578) ||
3751 (hw->phy.type == e1000_phy_82577)) {
3752 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
29477e24
BA
3753 if (!e1e_rphy(hw, HV_COLC_LOWER, &phy_data))
3754 hw->mac.collision_delta = phy_data;
a4f58f54
BA
3755 } else {
3756 hw->mac.collision_delta = er32(COLC);
3757 }
bc7f75fa
AK
3758 adapter->stats.colc += hw->mac.collision_delta;
3759
3760 adapter->stats.algnerrc += er32(ALGNERRC);
3761 adapter->stats.rxerrc += er32(RXERRC);
a4f58f54
BA
3762 if ((hw->phy.type == e1000_phy_82578) ||
3763 (hw->phy.type == e1000_phy_82577)) {
3764 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
29477e24
BA
3765 if (!e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data))
3766 adapter->stats.tncrs += phy_data;
a4f58f54
BA
3767 } else {
3768 if ((hw->mac.type != e1000_82574) &&
3769 (hw->mac.type != e1000_82583))
3770 adapter->stats.tncrs += er32(TNCRS);
3771 }
bc7f75fa
AK
3772 adapter->stats.cexterr += er32(CEXTERR);
3773 adapter->stats.tsctc += er32(TSCTC);
3774 adapter->stats.tsctfc += er32(TSCTFC);
3775
bc7f75fa 3776 /* Fill out the OS statistics structure */
7274c20f
AK
3777 netdev->stats.multicast = adapter->stats.mprc;
3778 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK
3779
3780 /* Rx Errors */
3781
ad68076e
BA
3782 /*
3783 * RLEC on some newer hardware can be incorrect so build
3784 * our own version based on RUC and ROC
3785 */
7274c20f 3786 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK
3787 adapter->stats.crcerrs + adapter->stats.algnerrc +
3788 adapter->stats.ruc + adapter->stats.roc +
3789 adapter->stats.cexterr;
7274c20f 3790 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3791 adapter->stats.roc;
7274c20f
AK
3792 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3793 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3794 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK
3795
3796 /* Tx Errors */
7274c20f 3797 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3798 adapter->stats.latecol;
7274c20f
AK
3799 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3800 netdev->stats.tx_window_errors = adapter->stats.latecol;
3801 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK
3802
3803 /* Tx Dropped needs to be maintained elsewhere */
3804
bc7f75fa
AK
3805 /* Management Stats */
3806 adapter->stats.mgptc += er32(MGTPTC);
3807 adapter->stats.mgprc += er32(MGTPRC);
3808 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK
3809}
3810
7c25769f
BA
3811/**
3812 * e1000_phy_read_status - Update the PHY register status snapshot
3813 * @adapter: board private structure
3814 **/
3815static void e1000_phy_read_status(struct e1000_adapter *adapter)
3816{
3817 struct e1000_hw *hw = &adapter->hw;
3818 struct e1000_phy_regs *phy = &adapter->phy_regs;
3819 int ret_val;
7c25769f
BA
3820
3821 if ((er32(STATUS) & E1000_STATUS_LU) &&
3822 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3823 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3824 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3825 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3826 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3827 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3828 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3829 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3830 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3831 if (ret_val)
44defeb3 3832 e_warn("Error reading PHY register\n");
7c25769f
BA
3833 } else {
3834 /*
3835 * Do not read PHY registers if link is not up
3836 * Set values to typical power-on defaults
3837 */
3838 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3839 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3840 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3841 BMSR_ERCAP);
3842 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3843 ADVERTISE_ALL | ADVERTISE_CSMA);
3844 phy->lpa = 0;
3845 phy->expansion = EXPANSION_ENABLENPAGE;
3846 phy->ctrl1000 = ADVERTISE_1000FULL;
3847 phy->stat1000 = 0;
3848 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3849 }
7c25769f
BA
3850}
3851
bc7f75fa
AK
3852static void e1000_print_link_info(struct e1000_adapter *adapter)
3853{
bc7f75fa
AK
3854 struct e1000_hw *hw = &adapter->hw;
3855 u32 ctrl = er32(CTRL);
3856
8f12fe86
BA
3857 /* Link status message must follow this format for user tools */
3858 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3859 "Flow Control: %s\n",
3860 adapter->netdev->name,
44defeb3
JK
3861 adapter->link_speed,
3862 (adapter->link_duplex == FULL_DUPLEX) ?
3863 "Full Duplex" : "Half Duplex",
3864 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3865 "RX/TX" :
3866 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3867 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK
3868}
3869
b405e8df 3870bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK
3871{
3872 struct e1000_hw *hw = &adapter->hw;
3873 bool link_active = 0;
3874 s32 ret_val = 0;
3875
3876 /*
3877 * get_link_status is set on LSC (link status) interrupt or
3878 * Rx sequence error interrupt. get_link_status will stay
3879 * false until the check_for_link establishes link
3880 * for copper adapters ONLY
3881 */
3882 switch (hw->phy.media_type) {
3883 case e1000_media_type_copper:
3884 if (hw->mac.get_link_status) {
3885 ret_val = hw->mac.ops.check_for_link(hw);
3886 link_active = !hw->mac.get_link_status;
3887 } else {
3888 link_active = 1;
3889 }
3890 break;
3891 case e1000_media_type_fiber:
3892 ret_val = hw->mac.ops.check_for_link(hw);
3893 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3894 break;
3895 case e1000_media_type_internal_serdes:
3896 ret_val = hw->mac.ops.check_for_link(hw);
3897 link_active = adapter->hw.mac.serdes_has_link;
3898 break;
3899 default:
3900 case e1000_media_type_unknown:
3901 break;
3902 }
3903
3904 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3905 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3906 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3907 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK
3908 }
3909
3910 return link_active;
3911}
3912
3913static void e1000e_enable_receives(struct e1000_adapter *adapter)
3914{
3915 /* make sure the receive unit is started */
3916 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3917 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3918 struct e1000_hw *hw = &adapter->hw;
3919 u32 rctl = er32(RCTL);
3920 ew32(RCTL, rctl | E1000_RCTL_EN);
3921 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3922 }
3923}
3924
bc7f75fa
AK
3925/**
3926 * e1000_watchdog - Timer Call-back
3927 * @data: pointer to adapter cast into an unsigned long
3928 **/
3929static void e1000_watchdog(unsigned long data)
3930{
3931 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3932
3933 /* Do the rest outside of interrupt context */
3934 schedule_work(&adapter->watchdog_task);
3935
3936 /* TODO: make this use queue_delayed_work() */
3937}
3938
3939static void e1000_watchdog_task(struct work_struct *work)
3940{
3941 struct e1000_adapter *adapter = container_of(work,
3942 struct e1000_adapter, watchdog_task);
bc7f75fa
AK
3943 struct net_device *netdev = adapter->netdev;
3944 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3945 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK
3946 struct e1000_ring *tx_ring = adapter->tx_ring;
3947 struct e1000_hw *hw = &adapter->hw;
3948 u32 link, tctl;
bc7f75fa
AK
3949 int tx_pending = 0;
3950
b405e8df 3951 link = e1000e_has_link(adapter);
318a94d6 3952 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW
3953 /* Cancel scheduled suspend requests. */
3954 pm_runtime_resume(netdev->dev.parent);
3955
318a94d6 3956 e1000e_enable_receives(adapter);
bc7f75fa 3957 goto link_up;
bc7f75fa
AK
3958 }
3959
3960 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3961 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3962 e1000_update_mng_vlan(adapter);
3963
bc7f75fa
AK
3964 if (link) {
3965 if (!netif_carrier_ok(netdev)) {
3966 bool txb2b = 1;
23606cf5
RW
3967
3968 /* Cancel scheduled suspend requests. */
3969 pm_runtime_resume(netdev->dev.parent);
3970
318a94d6 3971 /* update snapshot of PHY registers on LSC */
7c25769f 3972 e1000_phy_read_status(adapter);
bc7f75fa
AK
3973 mac->ops.get_link_up_info(&adapter->hw,
3974 &adapter->link_speed,
3975 &adapter->link_duplex);
3976 e1000_print_link_info(adapter);
f4187b56
BA
3977 /*
3978 * On supported PHYs, check for duplex mismatch only
3979 * if link has autonegotiated at 10/100 half
3980 */
3981 if ((hw->phy.type == e1000_phy_igp_3 ||
3982 hw->phy.type == e1000_phy_bm) &&
3983 (hw->mac.autoneg == true) &&
3984 (adapter->link_speed == SPEED_10 ||
3985 adapter->link_speed == SPEED_100) &&
3986 (adapter->link_duplex == HALF_DUPLEX)) {
3987 u16 autoneg_exp;
3988
3989 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3990
3991 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3992 e_info("Autonegotiated half duplex but"
3993 " link partner cannot autoneg. "
3994 " Try forcing full duplex if "
3995 "link gets many collisions.\n");
3996 }
3997
f49c57e1 3998 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK
3999 adapter->tx_timeout_factor = 1;
4000 switch (adapter->link_speed) {
4001 case SPEED_10:
4002 txb2b = 0;
10f1b492 4003 adapter->tx_timeout_factor = 16;
bc7f75fa
AK
4004 break;
4005 case SPEED_100:
4006 txb2b = 0;
4c86e0b9 4007 adapter->tx_timeout_factor = 10;
bc7f75fa
AK
4008 break;
4009 }
4010
ad68076e
BA
4011 /*
4012 * workaround: re-program speed mode bit after
4013 * link-up event
4014 */
bc7f75fa
AK
4015 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4016 !txb2b) {
4017 u32 tarc0;
e9ec2c0f 4018 tarc0 = er32(TARC(0));
bc7f75fa 4019 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4020 ew32(TARC(0), tarc0);
bc7f75fa
AK
4021 }
4022
ad68076e
BA
4023 /*
4024 * disable TSO for pcie and 10/100 speeds, to avoid
4025 * some hardware issues
4026 */
bc7f75fa
AK
4027 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4028 switch (adapter->link_speed) {
4029 case SPEED_10:
4030 case SPEED_100:
44defeb3 4031 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK
4032 netdev->features &= ~NETIF_F_TSO;
4033 netdev->features &= ~NETIF_F_TSO6;
4034 break;
4035 case SPEED_1000:
4036 netdev->features |= NETIF_F_TSO;
4037 netdev->features |= NETIF_F_TSO6;
4038 break;
4039 default:
4040 /* oops */
4041 break;
4042 }
4043 }
4044
ad68076e
BA
4045 /*
4046 * enable transmits in the hardware, need to do this
4047 * after setting TARC(0)
4048 */
bc7f75fa
AK
4049 tctl = er32(TCTL);
4050 tctl |= E1000_TCTL_EN;
4051 ew32(TCTL, tctl);
4052
75eb0fad
BA
4053 /*
4054 * Perform any post-link-up configuration before
4055 * reporting link up.
4056 */
4057 if (phy->ops.cfg_on_link_up)
4058 phy->ops.cfg_on_link_up(hw);
4059
bc7f75fa 4060 netif_carrier_on(netdev);
bc7f75fa
AK
4061
4062 if (!test_bit(__E1000_DOWN, &adapter->state))
4063 mod_timer(&adapter->phy_info_timer,
4064 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK
4065 }
4066 } else {
4067 if (netif_carrier_ok(netdev)) {
4068 adapter->link_speed = 0;
4069 adapter->link_duplex = 0;
8f12fe86
BA
4070 /* Link status message must follow this format */
4071 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4072 adapter->netdev->name);
bc7f75fa 4073 netif_carrier_off(netdev);
bc7f75fa
AK
4074 if (!test_bit(__E1000_DOWN, &adapter->state))
4075 mod_timer(&adapter->phy_info_timer,
4076 round_jiffies(jiffies + 2 * HZ));
4077
4078 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4079 schedule_work(&adapter->reset_task);
23606cf5
RW
4080 else
4081 pm_schedule_suspend(netdev->dev.parent,
4082 LINK_TIMEOUT);
bc7f75fa
AK
4083 }
4084 }
4085
4086link_up:
4087 e1000e_update_stats(adapter);
4088
4089 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4090 adapter->tpt_old = adapter->stats.tpt;
4091 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4092 adapter->colc_old = adapter->stats.colc;
4093
7c25769f
BA
4094 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4095 adapter->gorc_old = adapter->stats.gorc;
4096 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4097 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK
4098
4099 e1000e_update_adaptive(&adapter->hw);
4100
4101 if (!netif_carrier_ok(netdev)) {
4102 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
4103 tx_ring->count);
4104 if (tx_pending) {
ad68076e
BA
4105 /*
4106 * We've lost link, so the controller stops DMA,
bc7f75fa
AK
4107 * but we've got queued Tx work that's never going
4108 * to get done, so reset controller to flush Tx.
ad68076e
BA
4109 * (Do the reset outside of interrupt context).
4110 */
bc7f75fa
AK
4111 adapter->tx_timeout_count++;
4112 schedule_work(&adapter->reset_task);
c2d5ab49
JB
4113 /* return immediately since reset is imminent */
4114 return;
bc7f75fa
AK
4115 }
4116 }
4117
eab2abf5
JB
4118 /* Simple mode for Interrupt Throttle Rate (ITR) */
4119 if (adapter->itr_setting == 4) {
4120 /*
4121 * Symmetric Tx/Rx gets a reduced ITR=2000;
4122 * Total asymmetrical Tx or Rx gets ITR=8000;
4123 * everyone else is between 2000-8000.
4124 */
4125 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4126 u32 dif = (adapter->gotc > adapter->gorc ?
4127 adapter->gotc - adapter->gorc :
4128 adapter->gorc - adapter->gotc) / 10000;
4129 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4130
4131 ew32(ITR, 1000000000 / (itr * 256));
4132 }
4133
ad68076e 4134 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA
4135 if (adapter->msix_entries)
4136 ew32(ICS, adapter->rx_ring->ims_val);
4137 else
4138 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK
4139
4140 /* Force detection of hung controller every watchdog period */
4141 adapter->detect_tx_hung = 1;
4142
ad68076e
BA
4143 /*
4144 * With 82571 controllers, LAA may be overwritten due to controller
4145 * reset from the other port. Set the appropriate LAA in RAR[0]
4146 */
bc7f75fa
AK
4147 if (e1000e_get_laa_state_82571(hw))
4148 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4149
4150 /* Reset the timer */
4151 if (!test_bit(__E1000_DOWN, &adapter->state))
4152 mod_timer(&adapter->watchdog_timer,
4153 round_jiffies(jiffies + 2 * HZ));
4154}
4155
4156#define E1000_TX_FLAGS_CSUM 0x00000001
4157#define E1000_TX_FLAGS_VLAN 0x00000002
4158#define E1000_TX_FLAGS_TSO 0x00000004
4159#define E1000_TX_FLAGS_IPV4 0x00000008
4160#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4161#define E1000_TX_FLAGS_VLAN_SHIFT 16
4162
4163static int e1000_tso(struct e1000_adapter *adapter,
4164 struct sk_buff *skb)
4165{
4166 struct e1000_ring *tx_ring = adapter->tx_ring;
4167 struct e1000_context_desc *context_desc;
4168 struct e1000_buffer *buffer_info;
4169 unsigned int i;
4170 u32 cmd_length = 0;
4171 u16 ipcse = 0, tucse, mss;
4172 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4173 int err;
4174
3d5e33c9
BA
4175 if (!skb_is_gso(skb))
4176 return 0;
bc7f75fa 4177
3d5e33c9
BA
4178 if (skb_header_cloned(skb)) {
4179 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4180 if (err)
4181 return err;
bc7f75fa
AK
4182 }
4183
3d5e33c9
BA
4184 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4185 mss = skb_shinfo(skb)->gso_size;
4186 if (skb->protocol == htons(ETH_P_IP)) {
4187 struct iphdr *iph = ip_hdr(skb);
4188 iph->tot_len = 0;
4189 iph->check = 0;
4190 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4191 0, IPPROTO_TCP, 0);
4192 cmd_length = E1000_TXD_CMD_IP;
4193 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4194 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA
4195 ipv6_hdr(skb)->payload_len = 0;
4196 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4197 &ipv6_hdr(skb)->daddr,
4198 0, IPPROTO_TCP, 0);
4199 ipcse = 0;
4200 }
4201 ipcss = skb_network_offset(skb);
4202 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4203 tucss = skb_transport_offset(skb);
4204 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4205 tucse = 0;
4206
4207 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4208 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4209
4210 i = tx_ring->next_to_use;
4211 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4212 buffer_info = &tx_ring->buffer_info[i];
4213
4214 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4215 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4216 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4217 context_desc->upper_setup.tcp_fields.tucss = tucss;
4218 context_desc->upper_setup.tcp_fields.tucso = tucso;
4219 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4220 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4221 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4222 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4223
4224 buffer_info->time_stamp = jiffies;
4225 buffer_info->next_to_watch = i;
4226
4227 i++;
4228 if (i == tx_ring->count)
4229 i = 0;
4230 tx_ring->next_to_use = i;
4231
4232 return 1;
bc7f75fa
AK
4233}
4234
4235static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4236{
4237 struct e1000_ring *tx_ring = adapter->tx_ring;
4238 struct e1000_context_desc *context_desc;
4239 struct e1000_buffer *buffer_info;
4240 unsigned int i;
4241 u8 css;
af807c82 4242 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4243 __be16 protocol;
bc7f75fa 4244
af807c82
DG
4245 if (skb->ip_summed != CHECKSUM_PARTIAL)
4246 return 0;
bc7f75fa 4247
5f66f208
AJ
4248 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4249 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4250 else
4251 protocol = skb->protocol;
4252
3f518390 4253 switch (protocol) {
09640e63 4254 case cpu_to_be16(ETH_P_IP):
af807c82
DG
4255 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4256 cmd_len |= E1000_TXD_CMD_TCP;
4257 break;
09640e63 4258 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG
4259 /* XXX not handling all IPV6 headers */
4260 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4261 cmd_len |= E1000_TXD_CMD_TCP;
4262 break;
4263 default:
4264 if (unlikely(net_ratelimit()))
5f66f208
AJ
4265 e_warn("checksum_partial proto=%x!\n",
4266 be16_to_cpu(protocol));
af807c82 4267 break;
bc7f75fa
AK
4268 }
4269
af807c82
DG
4270 css = skb_transport_offset(skb);
4271
4272 i = tx_ring->next_to_use;
4273 buffer_info = &tx_ring->buffer_info[i];
4274 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4275
4276 context_desc->lower_setup.ip_config = 0;
4277 context_desc->upper_setup.tcp_fields.tucss = css;
4278 context_desc->upper_setup.tcp_fields.tucso =
4279 css + skb->csum_offset;
4280 context_desc->upper_setup.tcp_fields.tucse = 0;
4281 context_desc->tcp_seg_setup.data = 0;
4282 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4283
4284 buffer_info->time_stamp = jiffies;
4285 buffer_info->next_to_watch = i;
4286
4287 i++;
4288 if (i == tx_ring->count)
4289 i = 0;
4290 tx_ring->next_to_use = i;
4291
4292 return 1;
bc7f75fa
AK
4293}
4294
4295#define E1000_MAX_PER_TXD 8192
4296#define E1000_MAX_TXD_PWR 12
4297
4298static int e1000_tx_map(struct e1000_adapter *adapter,
4299 struct sk_buff *skb, unsigned int first,
4300 unsigned int max_per_txd, unsigned int nr_frags,
4301 unsigned int mss)
4302{
4303 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4304 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4305 struct e1000_buffer *buffer_info;
8ddc951c 4306 unsigned int len = skb_headlen(skb);
03b1320d 4307 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4308 unsigned int f, bytecount, segs;
bc7f75fa
AK
4309
4310 i = tx_ring->next_to_use;
4311
4312 while (len) {
1b7719c4 4313 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK
4314 size = min(len, max_per_txd);
4315
bc7f75fa 4316 buffer_info->length = size;
bc7f75fa 4317 buffer_info->time_stamp = jiffies;
bc7f75fa 4318 buffer_info->next_to_watch = i;
0be3f55f
NN
4319 buffer_info->dma = dma_map_single(&pdev->dev,
4320 skb->data + offset,
4321 size, DMA_TO_DEVICE);
03b1320d 4322 buffer_info->mapped_as_page = false;
0be3f55f 4323 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4324 goto dma_error;
bc7f75fa
AK
4325
4326 len -= size;
4327 offset += size;
03b1320d 4328 count++;
1b7719c4
AD
4329
4330 if (len) {
4331 i++;
4332 if (i == tx_ring->count)
4333 i = 0;
4334 }
bc7f75fa
AK
4335 }
4336
4337 for (f = 0; f < nr_frags; f++) {
4338 struct skb_frag_struct *frag;
4339
4340 frag = &skb_shinfo(skb)->frags[f];
4341 len = frag->size;
03b1320d 4342 offset = frag->page_offset;
bc7f75fa
AK
4343
4344 while (len) {
1b7719c4
AD
4345 i++;
4346 if (i == tx_ring->count)
4347 i = 0;
4348
bc7f75fa
AK
4349 buffer_info = &tx_ring->buffer_info[i];
4350 size = min(len, max_per_txd);
bc7f75fa
AK
4351
4352 buffer_info->length = size;
4353 buffer_info->time_stamp = jiffies;
bc7f75fa 4354 buffer_info->next_to_watch = i;
0be3f55f 4355 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4356 offset, size,
0be3f55f 4357 DMA_TO_DEVICE);
03b1320d 4358 buffer_info->mapped_as_page = true;
0be3f55f 4359 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4360 goto dma_error;
bc7f75fa
AK
4361
4362 len -= size;
4363 offset += size;
4364 count++;
bc7f75fa
AK
4365 }
4366 }
4367
9ed318d5
TH
4368 segs = skb_shinfo(skb)->gso_segs ?: 1;
4369 /* multiply data chunks by size of headers */
4370 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4371
bc7f75fa 4372 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH
4373 tx_ring->buffer_info[i].segs = segs;
4374 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK
4375 tx_ring->buffer_info[first].next_to_watch = i;
4376
4377 return count;
03b1320d
AD
4378
4379dma_error:
4380 dev_err(&pdev->dev, "TX DMA map failed\n");
4381 buffer_info->dma = 0;
c1fa347f 4382 if (count)
03b1320d 4383 count--;
c1fa347f
RK
4384
4385 while (count--) {
4386 if (i==0)
03b1320d 4387 i += tx_ring->count;
c1fa347f 4388 i--;
03b1320d
AD
4389 buffer_info = &tx_ring->buffer_info[i];
4390 e1000_put_txbuf(adapter, buffer_info);;
4391 }
4392
4393 return 0;
bc7f75fa
AK
4394}
4395
4396static void e1000_tx_queue(struct e1000_adapter *adapter,
4397 int tx_flags, int count)
4398{
4399 struct e1000_ring *tx_ring = adapter->tx_ring;
4400 struct e1000_tx_desc *tx_desc = NULL;
4401 struct e1000_buffer *buffer_info;
4402 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4403 unsigned int i;
4404
4405 if (tx_flags & E1000_TX_FLAGS_TSO) {
4406 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4407 E1000_TXD_CMD_TSE;
4408 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4409
4410 if (tx_flags & E1000_TX_FLAGS_IPV4)
4411 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4412 }
4413
4414 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4415 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4416 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4417 }
4418
4419 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4420 txd_lower |= E1000_TXD_CMD_VLE;
4421 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4422 }
4423
4424 i = tx_ring->next_to_use;
4425
4426 while (count--) {
4427 buffer_info = &tx_ring->buffer_info[i];
4428 tx_desc = E1000_TX_DESC(*tx_ring, i);
4429 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4430 tx_desc->lower.data =
4431 cpu_to_le32(txd_lower | buffer_info->length);
4432 tx_desc->upper.data = cpu_to_le32(txd_upper);
4433
4434 i++;
4435 if (i == tx_ring->count)
4436 i = 0;
4437 }
4438
4439 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4440
ad68076e
BA
4441 /*
4442 * Force memory writes to complete before letting h/w
bc7f75fa
AK
4443 * know there are new descriptors to fetch. (Only
4444 * applicable for weak-ordered memory model archs,
ad68076e
BA
4445 * such as IA-64).
4446 */
bc7f75fa
AK
4447 wmb();
4448
4449 tx_ring->next_to_use = i;
4450 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA
4451 /*
4452 * we need this if more than one processor can write to our tail
4453 * at a time, it synchronizes IO on IA64/Altix systems
4454 */
bc7f75fa
AK
4455 mmiowb();
4456}
4457
4458#define MINIMUM_DHCP_PACKET_SIZE 282
4459static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4460 struct sk_buff *skb)
4461{
4462 struct e1000_hw *hw = &adapter->hw;
4463 u16 length, offset;
4464
4465 if (vlan_tx_tag_present(skb)) {
8e95a202
JP
4466 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4467 (adapter->hw.mng_cookie.status &
bc7f75fa
AK
4468 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4469 return 0;
4470 }
4471
4472 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4473 return 0;
4474
4475 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4476 return 0;
4477
4478 {
4479 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4480 struct udphdr *udp;
4481
4482 if (ip->protocol != IPPROTO_UDP)
4483 return 0;
4484
4485 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4486 if (ntohs(udp->dest) != 67)
4487 return 0;
4488
4489 offset = (u8 *)udp + 8 - skb->data;
4490 length = skb->len - offset;
4491 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4492 }
4493
4494 return 0;
4495}
4496
4497static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4498{
4499 struct e1000_adapter *adapter = netdev_priv(netdev);
4500
4501 netif_stop_queue(netdev);
ad68076e
BA
4502 /*
4503 * Herbert's original patch had:
bc7f75fa 4504 * smp_mb__after_netif_stop_queue();
ad68076e
BA
4505 * but since that doesn't exist yet, just open code it.
4506 */
bc7f75fa
AK
4507 smp_mb();
4508
ad68076e
BA
4509 /*
4510 * We need to check again in a case another CPU has just
4511 * made room available.
4512 */
bc7f75fa
AK
4513 if (e1000_desc_unused(adapter->tx_ring) < size)
4514 return -EBUSY;
4515
4516 /* A reprieve! */
4517 netif_start_queue(netdev);
4518 ++adapter->restart_queue;
4519 return 0;
4520}
4521
4522static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4523{
4524 struct e1000_adapter *adapter = netdev_priv(netdev);
4525
4526 if (e1000_desc_unused(adapter->tx_ring) >= size)
4527 return 0;
4528 return __e1000_maybe_stop_tx(netdev, size);
4529}
4530
4531#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH
4532static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4533 struct net_device *netdev)
bc7f75fa
AK
4534{
4535 struct e1000_adapter *adapter = netdev_priv(netdev);
4536 struct e1000_ring *tx_ring = adapter->tx_ring;
4537 unsigned int first;
4538 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4539 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4540 unsigned int tx_flags = 0;
e743d313 4541 unsigned int len = skb_headlen(skb);
4e6c709c
AK
4542 unsigned int nr_frags;
4543 unsigned int mss;
bc7f75fa
AK
4544 int count = 0;
4545 int tso;
4546 unsigned int f;
bc7f75fa
AK
4547
4548 if (test_bit(__E1000_DOWN, &adapter->state)) {
4549 dev_kfree_skb_any(skb);
4550 return NETDEV_TX_OK;
4551 }
4552
4553 if (skb->len <= 0) {
4554 dev_kfree_skb_any(skb);
4555 return NETDEV_TX_OK;
4556 }
4557
4558 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA
4559 /*
4560 * The controller does a simple calculation to
bc7f75fa
AK
4561 * make sure there is enough room in the FIFO before
4562 * initiating the DMA for each buffer. The calc is:
4563 * 4 = ceil(buffer len/mss). To make sure we don't
4564 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA
4565 * drops.
4566 */
bc7f75fa
AK
4567 if (mss) {
4568 u8 hdr_len;
4569 max_per_txd = min(mss << 2, max_per_txd);
4570 max_txd_pwr = fls(max_per_txd) - 1;
4571
ad68076e
BA
4572 /*
4573 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4574 * points to just header, pull a few bytes of payload from
4575 * frags into skb->data
4576 */
bc7f75fa 4577 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA
4578 /*
4579 * we do this workaround for ES2LAN, but it is un-necessary,
4580 * avoiding it could save a lot of cycles
4581 */
4e6c709c 4582 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK
4583 unsigned int pull_size;
4584
4585 pull_size = min((unsigned int)4, skb->data_len);
4586 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4587 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK
4588 dev_kfree_skb_any(skb);
4589 return NETDEV_TX_OK;
4590 }
e743d313 4591 len = skb_headlen(skb);
bc7f75fa
AK
4592 }
4593 }
4594
4595 /* reserve a descriptor for the offload context */
4596 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4597 count++;
4598 count++;
4599
4600 count += TXD_USE_COUNT(len, max_txd_pwr);
4601
4602 nr_frags = skb_shinfo(skb)->nr_frags;
4603 for (f = 0; f < nr_frags; f++)
4604 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4605 max_txd_pwr);
4606
4607 if (adapter->hw.mac.tx_pkt_filtering)
4608 e1000_transfer_dhcp_info(adapter, skb);
4609
ad68076e
BA
4610 /*
4611 * need: count + 2 desc gap to keep tail from touching
4612 * head, otherwise try next time
4613 */
92af3e95 4614 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4615 return NETDEV_TX_BUSY;
bc7f75fa
AK
4616
4617 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4618 tx_flags |= E1000_TX_FLAGS_VLAN;
4619 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4620 }
4621
4622 first = tx_ring->next_to_use;
4623
4624 tso = e1000_tso(adapter, skb);
4625 if (tso < 0) {
4626 dev_kfree_skb_any(skb);
bc7f75fa
AK
4627 return NETDEV_TX_OK;
4628 }
4629
4630 if (tso)
4631 tx_flags |= E1000_TX_FLAGS_TSO;
4632 else if (e1000_tx_csum(adapter, skb))
4633 tx_flags |= E1000_TX_FLAGS_CSUM;
4634
ad68076e
BA
4635 /*
4636 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4637 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA
4638 * no longer assume, we must.
4639 */
bc7f75fa
AK
4640 if (skb->protocol == htons(ETH_P_IP))
4641 tx_flags |= E1000_TX_FLAGS_IPV4;
4642
1b7719c4 4643 /* if count is 0 then mapping error has occured */
bc7f75fa 4644 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD
4645 if (count) {
4646 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD
4647 /* Make sure there is space in the ring for the next send. */
4648 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4649
4650 } else {
bc7f75fa 4651 dev_kfree_skb_any(skb);
1b7719c4
AD
4652 tx_ring->buffer_info[first].time_stamp = 0;
4653 tx_ring->next_to_use = first;
bc7f75fa
AK
4654 }
4655
bc7f75fa
AK
4656 return NETDEV_TX_OK;
4657}
4658
4659/**
4660 * e1000_tx_timeout - Respond to a Tx Hang
4661 * @netdev: network interface device structure
4662 **/
4663static void e1000_tx_timeout(struct net_device *netdev)
4664{
4665 struct e1000_adapter *adapter = netdev_priv(netdev);
4666
4667 /* Do the reset outside of interrupt context */
4668 adapter->tx_timeout_count++;
4669 schedule_work(&adapter->reset_task);
4670}
4671
4672static void e1000_reset_task(struct work_struct *work)
4673{
4674 struct e1000_adapter *adapter;
4675 adapter = container_of(work, struct e1000_adapter, reset_task);
4676
84f4ee90
TI
4677 e1000e_dump(adapter);
4678 e_err("Reset adapter\n");
bc7f75fa
AK
4679 e1000e_reinit_locked(adapter);
4680}
4681
4682/**
4683 * e1000_get_stats - Get System Network Statistics
4684 * @netdev: network interface device structure
4685 *
4686 * Returns the address of the device statistics structure.
4687 * The statistics are actually updated from the timer callback.
4688 **/
4689static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4690{
bc7f75fa 4691 /* only return the current stats */
7274c20f 4692 return &netdev->stats;
bc7f75fa
AK
4693}
4694
4695/**
4696 * e1000_change_mtu - Change the Maximum Transfer Unit
4697 * @netdev: network interface device structure
4698 * @new_mtu: new value for maximum frame size
4699 *
4700 * Returns 0 on success, negative on failure
4701 **/
4702static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4703{
4704 struct e1000_adapter *adapter = netdev_priv(netdev);
4705 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4706
2adc55c9
BA
4707 /* Jumbo frame support */
4708 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4709 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4710 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK
4711 return -EINVAL;
4712 }
4713
2adc55c9
BA
4714 /* Supported frame sizes */
4715 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4716 (max_frame > adapter->max_hw_frame_size)) {
4717 e_err("Unsupported MTU setting\n");
bc7f75fa
AK
4718 return -EINVAL;
4719 }
4720
6f461f6c
BA
4721 /* 82573 Errata 17 */
4722 if (((adapter->hw.mac.type == e1000_82573) ||
4723 (adapter->hw.mac.type == e1000_82574)) &&
4724 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4725 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4726 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4727 }
4728
bc7f75fa
AK
4729 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4730 msleep(1);
610c9928 4731 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4732 adapter->max_frame_size = max_frame;
610c9928
BA
4733 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4734 netdev->mtu = new_mtu;
bc7f75fa
AK
4735 if (netif_running(netdev))
4736 e1000e_down(adapter);
4737
ad68076e
BA
4738 /*
4739 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK
4740 * means we reserve 2 more, this pushes us to allocate from the next
4741 * larger slab size.
ad68076e 4742 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA
4743 * However with the new *_jumbo_rx* routines, jumbo receives will use
4744 * fragmented skbs
ad68076e 4745 */
bc7f75fa 4746
9926146b 4747 if (max_frame <= 2048)
bc7f75fa
AK
4748 adapter->rx_buffer_len = 2048;
4749 else
4750 adapter->rx_buffer_len = 4096;
4751
4752 /* adjust allocation if LPE protects us, and we aren't using SBP */
4753 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4754 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4755 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4756 + ETH_FCS_LEN;
bc7f75fa 4757
bc7f75fa
AK
4758 if (netif_running(netdev))
4759 e1000e_up(adapter);
4760 else
4761 e1000e_reset(adapter);
4762
4763 clear_bit(__E1000_RESETTING, &adapter->state);
4764
4765 return 0;
4766}
4767
4768static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4769 int cmd)
4770{
4771 struct e1000_adapter *adapter = netdev_priv(netdev);
4772 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4773
318a94d6 4774 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK
4775 return -EOPNOTSUPP;
4776
4777 switch (cmd) {
4778 case SIOCGMIIPHY:
4779 data->phy_id = adapter->hw.phy.addr;
4780 break;
4781 case SIOCGMIIREG:
b16a002e
BA
4782 e1000_phy_read_status(adapter);
4783
7c25769f
BA
4784 switch (data->reg_num & 0x1F) {
4785 case MII_BMCR:
4786 data->val_out = adapter->phy_regs.bmcr;
4787 break;
4788 case MII_BMSR:
4789 data->val_out = adapter->phy_regs.bmsr;
4790 break;
4791 case MII_PHYSID1:
4792 data->val_out = (adapter->hw.phy.id >> 16);
4793 break;
4794 case MII_PHYSID2:
4795 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4796 break;
4797 case MII_ADVERTISE:
4798 data->val_out = adapter->phy_regs.advertise;
4799 break;
4800 case MII_LPA:
4801 data->val_out = adapter->phy_regs.lpa;
4802 break;
4803 case MII_EXPANSION:
4804 data->val_out = adapter->phy_regs.expansion;
4805 break;
4806 case MII_CTRL1000:
4807 data->val_out = adapter->phy_regs.ctrl1000;
4808 break;
4809 case MII_STAT1000:
4810 data->val_out = adapter->phy_regs.stat1000;
4811 break;
4812 case MII_ESTATUS:
4813 data->val_out = adapter->phy_regs.estatus;
4814 break;
4815 default:
bc7f75fa
AK
4816 return -EIO;
4817 }
bc7f75fa
AK
4818 break;
4819 case SIOCSMIIREG:
4820 default:
4821 return -EOPNOTSUPP;
4822 }
4823 return 0;
4824}
4825
4826static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4827{
4828 switch (cmd) {
4829 case SIOCGMIIPHY:
4830 case SIOCGMIIREG:
4831 case SIOCSMIIREG:
4832 return e1000_mii_ioctl(netdev, ifr, cmd);
4833 default:
4834 return -EOPNOTSUPP;
4835 }
4836}
4837
a4f58f54
BA
4838static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4839{
4840 struct e1000_hw *hw = &adapter->hw;
4841 u32 i, mac_reg;
4842 u16 phy_reg;
4843 int retval = 0;
4844
4845 /* copy MAC RARs to PHY RARs */
4846 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4847 mac_reg = er32(RAL(i));
4848 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4849 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4850 mac_reg = er32(RAH(i));
4851 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4852 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4853 }
4854
4855 /* copy MAC MTA to PHY MTA */
4856 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4857 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4858 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4859 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4860 }
4861
4862 /* configure PHY Rx Control register */
4863 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4864 mac_reg = er32(RCTL);
4865 if (mac_reg & E1000_RCTL_UPE)
4866 phy_reg |= BM_RCTL_UPE;
4867 if (mac_reg & E1000_RCTL_MPE)
4868 phy_reg |= BM_RCTL_MPE;
4869 phy_reg &= ~(BM_RCTL_MO_MASK);
4870 if (mac_reg & E1000_RCTL_MO_3)
4871 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4872 << BM_RCTL_MO_SHIFT);
4873 if (mac_reg & E1000_RCTL_BAM)
4874 phy_reg |= BM_RCTL_BAM;
4875 if (mac_reg & E1000_RCTL_PMCF)
4876 phy_reg |= BM_RCTL_PMCF;
4877 mac_reg = er32(CTRL);
4878 if (mac_reg & E1000_CTRL_RFCE)
4879 phy_reg |= BM_RCTL_RFCE;
4880 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4881
4882 /* enable PHY wakeup in MAC register */
4883 ew32(WUFC, wufc);
4884 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4885
4886 /* configure and enable PHY wakeup in PHY registers */
4887 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4888 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4889
4890 /* activate PHY wakeup */
94d8186a 4891 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA
4892 if (retval) {
4893 e_err("Could not acquire PHY\n");
4894 return retval;
4895 }
4896 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4897 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4898 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4899 if (retval) {
4900 e_err("Could not read PHY page 769\n");
4901 goto out;
4902 }
4903 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4904 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4905 if (retval)
4906 e_err("Could not set PHY Host Wakeup bit\n");
4907out:
94d8186a 4908 hw->phy.ops.release(hw);
a4f58f54
BA
4909
4910 return retval;
4911}
4912
23606cf5
RW
4913static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
4914 bool runtime)
bc7f75fa
AK
4915{
4916 struct net_device *netdev = pci_get_drvdata(pdev);
4917 struct e1000_adapter *adapter = netdev_priv(netdev);
4918 struct e1000_hw *hw = &adapter->hw;
4919 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW
4920 /* Runtime suspend should only enable wakeup for link changes */
4921 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK
4922 int retval = 0;
4923
4924 netif_device_detach(netdev);
4925
4926 if (netif_running(netdev)) {
4927 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4928 e1000e_down(adapter);
4929 e1000_free_irq(adapter);
4930 }
4662e82b 4931 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK
4932
4933 retval = pci_save_state(pdev);
4934 if (retval)
4935 return retval;
4936
4937 status = er32(STATUS);
4938 if (status & E1000_STATUS_LU)
4939 wufc &= ~E1000_WUFC_LNKC;
4940
4941 if (wufc) {
4942 e1000_setup_rctl(adapter);
4943 e1000_set_multi(netdev);
4944
4945 /* turn on all-multi mode if wake on multicast is enabled */
4946 if (wufc & E1000_WUFC_MC) {
4947 rctl = er32(RCTL);
4948 rctl |= E1000_RCTL_MPE;
4949 ew32(RCTL, rctl);
4950 }
4951
4952 ctrl = er32(CTRL);
4953 /* advertise wake from D3Cold */
4954 #define E1000_CTRL_ADVD3WUC 0x00100000
4955 /* phy power management enable */
4956 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA
4957 ctrl |= E1000_CTRL_ADVD3WUC;
4958 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4959 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK
4960 ew32(CTRL, ctrl);
4961
318a94d6
JK
4962 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4963 adapter->hw.phy.media_type ==
4964 e1000_media_type_internal_serdes) {
bc7f75fa
AK
4965 /* keep the laser running in D3 */
4966 ctrl_ext = er32(CTRL_EXT);
93a23f48 4967 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK
4968 ew32(CTRL_EXT, ctrl_ext);
4969 }
4970
97ac8cae
BA
4971 if (adapter->flags & FLAG_IS_ICH)
4972 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4973
bc7f75fa
AK
4974 /* Allow time for pending master requests to run */
4975 e1000e_disable_pcie_master(&adapter->hw);
4976
82776a4b 4977 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA
4978 /* enable wakeup by the PHY */
4979 retval = e1000_init_phy_wakeup(adapter, wufc);
4980 if (retval)
4981 return retval;
4982 } else {
4983 /* enable wakeup by the MAC */
4984 ew32(WUFC, wufc);
4985 ew32(WUC, E1000_WUC_PME_EN);
4986 }
bc7f75fa
AK
4987 } else {
4988 ew32(WUC, 0);
4989 ew32(WUFC, 0);
bc7f75fa
AK
4990 }
4991
4f9de721
RW
4992 *enable_wake = !!wufc;
4993
bc7f75fa 4994 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA
4995 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4996 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 4997 *enable_wake = true;
bc7f75fa
AK
4998
4999 if (adapter->hw.phy.type == e1000_phy_igp_3)
5000 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5001
ad68076e
BA
5002 /*
5003 * Release control of h/w to f/w. If f/w is AMT enabled, this
5004 * would have already happened in close and is redundant.
5005 */
bc7f75fa
AK
5006 e1000_release_hw_control(adapter);
5007
5008 pci_disable_device(pdev);
5009
4f9de721
RW
5010 return 0;
5011}
5012
5013static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5014{
5015 if (sleep && wake) {
5016 pci_prepare_to_sleep(pdev);
5017 return;
5018 }
5019
5020 pci_wake_from_d3(pdev, wake);
5021 pci_set_power_state(pdev, PCI_D3hot);
5022}
5023
5024static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5025 bool wake)
5026{
5027 struct net_device *netdev = pci_get_drvdata(pdev);
5028 struct e1000_adapter *adapter = netdev_priv(netdev);
5029
005cbdfc
AD
5030 /*
5031 * The pci-e switch on some quad port adapters will report a
5032 * correctable error when the MAC transitions from D0 to D3. To
5033 * prevent this we need to mask off the correctable errors on the
5034 * downstream port of the pci-e switch.
5035 */
5036 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5037 struct pci_dev *us_dev = pdev->bus->self;
5038 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5039 u16 devctl;
5040
5041 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5042 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5043 (devctl & ~PCI_EXP_DEVCTL_CERE));
5044
4f9de721 5045 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD
5046
5047 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5048 } else {
4f9de721 5049 e1000_power_off(pdev, sleep, wake);
005cbdfc 5050 }
bc7f75fa
AK
5051}
5052
6f461f6c
BA
5053#ifdef CONFIG_PCIEASPM
5054static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5055{
5056 pci_disable_link_state(pdev, state);
5057}
5058#else
5059static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK
5060{
5061 int pos;
6f461f6c 5062 u16 reg16;
1eae4eb2
AK
5063
5064 /*
6f461f6c
BA
5065 * Both device and parent should have the same ASPM setting.
5066 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5067 */
6f461f6c
BA
5068 pos = pci_pcie_cap(pdev);
5069 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5070 reg16 &= ~state;
5071 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5072
0c75ba22
AB
5073 if (!pdev->bus->self)
5074 return;
5075
6f461f6c
BA
5076 pos = pci_pcie_cap(pdev->bus->self);
5077 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5078 reg16 &= ~state;
5079 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5080}
5081#endif
5082void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5083{
5084 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5085 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5086 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5087
5088 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK
5089}
5090
a0340162 5091#ifdef CONFIG_PM_OPS
23606cf5
RW
5092static bool e1000e_pm_ready(struct e1000_adapter *adapter)
5093{
5094 return !!adapter->tx_ring->buffer_info;
5095}
5096
23606cf5
RW
5097static int __e1000_resume(struct pci_dev *pdev)
5098{
5099 struct net_device *netdev = pci_get_drvdata(pdev);
5100 struct e1000_adapter *adapter = netdev_priv(netdev);
5101 struct e1000_hw *hw = &adapter->hw;
5102 u32 err;
5103
bc7f75fa
AK
5104 pci_set_power_state(pdev, PCI_D0);
5105 pci_restore_state(pdev);
28b8f04a 5106 pci_save_state(pdev);
6f461f6c
BA
5107 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5108 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
bc7f75fa 5109
4662e82b 5110 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK
5111 if (netif_running(netdev)) {
5112 err = e1000_request_irq(adapter);
5113 if (err)
5114 return err;
5115 }
5116
5117 e1000e_power_up_phy(adapter);
a4f58f54
BA
5118
5119 /* report the system wakeup cause from S3/S4 */
5120 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5121 u16 phy_data;
5122
5123 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5124 if (phy_data) {
5125 e_info("PHY Wakeup cause - %s\n",
5126 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5127 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5128 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5129 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5130 phy_data & E1000_WUS_LNKC ? "Link Status "
5131 " Change" : "other");
5132 }
5133 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5134 } else {
5135 u32 wus = er32(WUS);
5136 if (wus) {
5137 e_info("MAC Wakeup cause - %s\n",
5138 wus & E1000_WUS_EX ? "Unicast Packet" :
5139 wus & E1000_WUS_MC ? "Multicast Packet" :
5140 wus & E1000_WUS_BC ? "Broadcast Packet" :
5141 wus & E1000_WUS_MAG ? "Magic Packet" :
5142 wus & E1000_WUS_LNKC ? "Link Status Change" :
5143 "other");
5144 }
5145 ew32(WUS, ~0);
5146 }
5147
bc7f75fa 5148 e1000e_reset(adapter);
bc7f75fa 5149
cd791618 5150 e1000_init_manageability_pt(adapter);
bc7f75fa
AK
5151
5152 if (netif_running(netdev))
5153 e1000e_up(adapter);
5154
5155 netif_device_attach(netdev);
5156
ad68076e
BA
5157 /*
5158 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5159 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
5160 * under the control of the driver.
5161 */
c43bc57e 5162 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
5163 e1000_get_hw_control(adapter);
5164
5165 return 0;
5166}
23606cf5 5167
a0340162
RW
5168#ifdef CONFIG_PM_SLEEP
5169static int e1000_suspend(struct device *dev)
5170{
5171 struct pci_dev *pdev = to_pci_dev(dev);
5172 int retval;
5173 bool wake;
5174
5175 retval = __e1000_shutdown(pdev, &wake, false);
5176 if (!retval)
5177 e1000_complete_shutdown(pdev, true, wake);
5178
5179 return retval;
5180}
5181
23606cf5
RW
5182static int e1000_resume(struct device *dev)
5183{
5184 struct pci_dev *pdev = to_pci_dev(dev);
5185 struct net_device *netdev = pci_get_drvdata(pdev);
5186 struct e1000_adapter *adapter = netdev_priv(netdev);
5187
5188 if (e1000e_pm_ready(adapter))
5189 adapter->idle_check = true;
5190
5191 return __e1000_resume(pdev);
5192}
a0340162
RW
5193#endif /* CONFIG_PM_SLEEP */
5194
5195#ifdef CONFIG_PM_RUNTIME
5196static int e1000_runtime_suspend(struct device *dev)
5197{
5198 struct pci_dev *pdev = to_pci_dev(dev);
5199 struct net_device *netdev = pci_get_drvdata(pdev);
5200 struct e1000_adapter *adapter = netdev_priv(netdev);
5201
5202 if (e1000e_pm_ready(adapter)) {
5203 bool wake;
5204
5205 __e1000_shutdown(pdev, &wake, true);
5206 }
5207
5208 return 0;
5209}
5210
5211static int e1000_idle(struct device *dev)
5212{
5213 struct pci_dev *pdev = to_pci_dev(dev);
5214 struct net_device *netdev = pci_get_drvdata(pdev);
5215 struct e1000_adapter *adapter = netdev_priv(netdev);
5216
5217 if (!e1000e_pm_ready(adapter))
5218 return 0;
5219
5220 if (adapter->idle_check) {
5221 adapter->idle_check = false;
5222 if (!e1000e_has_link(adapter))
5223 pm_schedule_suspend(dev, MSEC_PER_SEC);
5224 }
5225
5226 return -EBUSY;
5227}
23606cf5
RW
5228
5229static int e1000_runtime_resume(struct device *dev)
5230{
5231 struct pci_dev *pdev = to_pci_dev(dev);
5232 struct net_device *netdev = pci_get_drvdata(pdev);
5233 struct e1000_adapter *adapter = netdev_priv(netdev);
5234
5235 if (!e1000e_pm_ready(adapter))
5236 return 0;
5237
5238 adapter->idle_check = !dev->power.runtime_auto;
5239 return __e1000_resume(pdev);
5240}
a0340162
RW
5241#endif /* CONFIG_PM_RUNTIME */
5242#endif /* CONFIG_PM_OPS */
bc7f75fa
AK
5243
5244static void e1000_shutdown(struct pci_dev *pdev)
5245{
4f9de721
RW
5246 bool wake = false;
5247
23606cf5 5248 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW
5249
5250 if (system_state == SYSTEM_POWER_OFF)
5251 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK
5252}
5253
5254#ifdef CONFIG_NET_POLL_CONTROLLER
5255/*
5256 * Polling 'interrupt' - used by things like netconsole to send skbs
5257 * without having to re-enable interrupts. It's not called while
5258 * the interrupt routine is executing.
5259 */
5260static void e1000_netpoll(struct net_device *netdev)
5261{
5262 struct e1000_adapter *adapter = netdev_priv(netdev);
5263
5264 disable_irq(adapter->pdev->irq);
5265 e1000_intr(adapter->pdev->irq, netdev);
5266
bc7f75fa
AK
5267 enable_irq(adapter->pdev->irq);
5268}
5269#endif
5270
5271/**
5272 * e1000_io_error_detected - called when PCI error is detected
5273 * @pdev: Pointer to PCI device
5274 * @state: The current pci connection state
5275 *
5276 * This function is called after a PCI bus error affecting
5277 * this device has been detected.
5278 */
5279static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5280 pci_channel_state_t state)
5281{
5282 struct net_device *netdev = pci_get_drvdata(pdev);
5283 struct e1000_adapter *adapter = netdev_priv(netdev);
5284
5285 netif_device_detach(netdev);
5286
c93b5a76
MM
5287 if (state == pci_channel_io_perm_failure)
5288 return PCI_ERS_RESULT_DISCONNECT;
5289
bc7f75fa
AK
5290 if (netif_running(netdev))
5291 e1000e_down(adapter);
5292 pci_disable_device(pdev);
5293
5294 /* Request a slot slot reset. */
5295 return PCI_ERS_RESULT_NEED_RESET;
5296}
5297
5298/**
5299 * e1000_io_slot_reset - called after the pci bus has been reset.
5300 * @pdev: Pointer to PCI device
5301 *
5302 * Restart the card from scratch, as if from a cold-boot. Implementation
5303 * resembles the first-half of the e1000_resume routine.
5304 */
5305static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5306{
5307 struct net_device *netdev = pci_get_drvdata(pdev);
5308 struct e1000_adapter *adapter = netdev_priv(netdev);
5309 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 5310 int err;
111b9dc5 5311 pci_ers_result_t result;
bc7f75fa 5312
6f461f6c
BA
5313 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5314 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 5315 err = pci_enable_device_mem(pdev);
6e4f6f6b 5316 if (err) {
bc7f75fa
AK
5317 dev_err(&pdev->dev,
5318 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB
5319 result = PCI_ERS_RESULT_DISCONNECT;
5320 } else {
5321 pci_set_master(pdev);
23606cf5 5322 pdev->state_saved = true;
111b9dc5 5323 pci_restore_state(pdev);
bc7f75fa 5324
111b9dc5
JB
5325 pci_enable_wake(pdev, PCI_D3hot, 0);
5326 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5327
111b9dc5
JB
5328 e1000e_reset(adapter);
5329 ew32(WUS, ~0);
5330 result = PCI_ERS_RESULT_RECOVERED;
5331 }
bc7f75fa 5332
111b9dc5
JB
5333 pci_cleanup_aer_uncorrect_error_status(pdev);
5334
5335 return result;
bc7f75fa
AK
5336}
5337
5338/**
5339 * e1000_io_resume - called when traffic can start flowing again.
5340 * @pdev: Pointer to PCI device
5341 *
5342 * This callback is called when the error recovery driver tells us that
5343 * its OK to resume normal operation. Implementation resembles the
5344 * second-half of the e1000_resume routine.
5345 */
5346static void e1000_io_resume(struct pci_dev *pdev)
5347{
5348 struct net_device *netdev = pci_get_drvdata(pdev);
5349 struct e1000_adapter *adapter = netdev_priv(netdev);
5350
cd791618 5351 e1000_init_manageability_pt(adapter);
bc7f75fa
AK
5352
5353 if (netif_running(netdev)) {
5354 if (e1000e_up(adapter)) {
5355 dev_err(&pdev->dev,
5356 "can't bring device back up after reset\n");
5357 return;
5358 }
5359 }
5360
5361 netif_device_attach(netdev);
5362
ad68076e
BA
5363 /*
5364 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5365 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
5366 * under the control of the driver.
5367 */
c43bc57e 5368 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
5369 e1000_get_hw_control(adapter);
5370
5371}
5372
5373static void e1000_print_device_info(struct e1000_adapter *adapter)
5374{
5375 struct e1000_hw *hw = &adapter->hw;
5376 struct net_device *netdev = adapter->netdev;
69e3fd8c 5377 u32 pba_num;
bc7f75fa
AK
5378
5379 /* print bus type/speed/width info */
7c510e4b 5380 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK
5381 /* bus width */
5382 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5383 "Width x1"),
5384 /* MAC address */
7c510e4b 5385 netdev->dev_addr);
44defeb3
JK
5386 e_info("Intel(R) PRO/%s Network Connection\n",
5387 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 5388 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK
5389 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
5390 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK
5391}
5392
10aa4c04
AK
5393static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5394{
5395 struct e1000_hw *hw = &adapter->hw;
5396 int ret_val;
5397 u16 buf = 0;
5398
5399 if (hw->mac.type != e1000_82573)
5400 return;
5401
5402 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5403 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5404 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP
5405 dev_warn(&adapter->pdev->dev,
5406 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5407 }
10aa4c04
AK
5408}
5409
651c2466
SH
5410static const struct net_device_ops e1000e_netdev_ops = {
5411 .ndo_open = e1000_open,
5412 .ndo_stop = e1000_close,
00829823 5413 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH
5414 .ndo_get_stats = e1000_get_stats,
5415 .ndo_set_multicast_list = e1000_set_multi,
5416 .ndo_set_mac_address = e1000_set_mac,
5417 .ndo_change_mtu = e1000_change_mtu,
5418 .ndo_do_ioctl = e1000_ioctl,
5419 .ndo_tx_timeout = e1000_tx_timeout,
5420 .ndo_validate_addr = eth_validate_addr,
5421
5422 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5423 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5424 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5425#ifdef CONFIG_NET_POLL_CONTROLLER
5426 .ndo_poll_controller = e1000_netpoll,
5427#endif
5428};
5429
bc7f75fa
AK
5430/**
5431 * e1000_probe - Device Initialization Routine
5432 * @pdev: PCI device information struct
5433 * @ent: entry in e1000_pci_tbl
5434 *
5435 * Returns 0 on success, negative on failure
5436 *
5437 * e1000_probe initializes an adapter identified by a pci_dev structure.
5438 * The OS initialization, configuring of the adapter private structure,
5439 * and a hardware reset occur.
5440 **/
5441static int __devinit e1000_probe(struct pci_dev *pdev,
5442 const struct pci_device_id *ent)
5443{
5444 struct net_device *netdev;
5445 struct e1000_adapter *adapter;
5446 struct e1000_hw *hw;
5447 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB
5448 resource_size_t mmio_start, mmio_len;
5449 resource_size_t flash_start, flash_len;
bc7f75fa
AK
5450
5451 static int cards_found;
5452 int i, err, pci_using_dac;
5453 u16 eeprom_data = 0;
5454 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5455
6f461f6c
BA
5456 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5457 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5458
f0f422e5 5459 err = pci_enable_device_mem(pdev);
bc7f75fa
AK
5460 if (err)
5461 return err;
5462
5463 pci_using_dac = 0;
0be3f55f 5464 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5465 if (!err) {
0be3f55f 5466 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK
5467 if (!err)
5468 pci_using_dac = 1;
5469 } else {
0be3f55f 5470 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5471 if (err) {
0be3f55f
NN
5472 err = dma_set_coherent_mask(&pdev->dev,
5473 DMA_BIT_MASK(32));
bc7f75fa
AK
5474 if (err) {
5475 dev_err(&pdev->dev, "No usable DMA "
5476 "configuration, aborting\n");
5477 goto err_dma;
5478 }
5479 }
5480 }
5481
e8de1481 5482 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA
5483 pci_select_bars(pdev, IORESOURCE_MEM),
5484 e1000e_driver_name);
bc7f75fa
AK
5485 if (err)
5486 goto err_pci_reg;
5487
68eac460 5488 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5489 pci_enable_pcie_error_reporting(pdev);
68eac460 5490
bc7f75fa 5491 pci_set_master(pdev);
438b365a
BA
5492 /* PCI config space info */
5493 err = pci_save_state(pdev);
5494 if (err)
5495 goto err_alloc_etherdev;
bc7f75fa
AK
5496
5497 err = -ENOMEM;
5498 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5499 if (!netdev)
5500 goto err_alloc_etherdev;
5501
bc7f75fa
AK
5502 SET_NETDEV_DEV(netdev, &pdev->dev);
5503
f85e4dfa
TH
5504 netdev->irq = pdev->irq;
5505
bc7f75fa
AK
5506 pci_set_drvdata(pdev, netdev);
5507 adapter = netdev_priv(netdev);
5508 hw = &adapter->hw;
5509 adapter->netdev = netdev;
5510 adapter->pdev = pdev;
5511 adapter->ei = ei;
5512 adapter->pba = ei->pba;
5513 adapter->flags = ei->flags;
eb7c3adb 5514 adapter->flags2 = ei->flags2;
bc7f75fa
AK
5515 adapter->hw.adapter = adapter;
5516 adapter->hw.mac.type = ei->mac;
2adc55c9 5517 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK
5518 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5519
5520 mmio_start = pci_resource_start(pdev, 0);
5521 mmio_len = pci_resource_len(pdev, 0);
5522
5523 err = -EIO;
5524 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5525 if (!adapter->hw.hw_addr)
5526 goto err_ioremap;
5527
5528 if ((adapter->flags & FLAG_HAS_FLASH) &&
5529 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5530 flash_start = pci_resource_start(pdev, 1);
5531 flash_len = pci_resource_len(pdev, 1);
5532 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5533 if (!adapter->hw.flash_address)
5534 goto err_flashmap;
5535 }
5536
5537 /* construct the net_device struct */
651c2466 5538 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5539 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK
5540 netdev->watchdog_timeo = 5 * HZ;
5541 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK
5542 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5543
5544 netdev->mem_start = mmio_start;
5545 netdev->mem_end = mmio_start + mmio_len;
5546
5547 adapter->bd_number = cards_found++;
5548
4662e82b
BA
5549 e1000e_check_options(adapter);
5550
bc7f75fa
AK
5551 /* setup adapter struct */
5552 err = e1000_sw_init(adapter);
5553 if (err)
5554 goto err_sw_init;
5555
5556 err = -EIO;
5557
5558 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5559 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5560 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5561
69e3fd8c 5562 err = ei->get_variants(adapter);
bc7f75fa
AK
5563 if (err)
5564 goto err_hw_init;
5565
4a770358
BA
5566 if ((adapter->flags & FLAG_IS_ICH) &&
5567 (adapter->flags & FLAG_READ_ONLY_NVM))
5568 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5569
bc7f75fa
AK
5570 hw->mac.ops.get_bus_info(&adapter->hw);
5571
318a94d6 5572 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK
5573
5574 /* Copper options */
318a94d6 5575 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK
5576 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5577 adapter->hw.phy.disable_polarity_correction = 0;
5578 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5579 }
5580
5581 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5582 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK
5583
5584 netdev->features = NETIF_F_SG |
5585 NETIF_F_HW_CSUM |
5586 NETIF_F_HW_VLAN_TX |
5587 NETIF_F_HW_VLAN_RX;
5588
5589 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5590 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5591
5592 netdev->features |= NETIF_F_TSO;
5593 netdev->features |= NETIF_F_TSO6;
5594
a5136e23
JK
5595 netdev->vlan_features |= NETIF_F_TSO;
5596 netdev->vlan_features |= NETIF_F_TSO6;
5597 netdev->vlan_features |= NETIF_F_HW_CSUM;
5598 netdev->vlan_features |= NETIF_F_SG;
5599
bc7f75fa
AK
5600 if (pci_using_dac)
5601 netdev->features |= NETIF_F_HIGHDMA;
5602
bc7f75fa
AK
5603 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5604 adapter->flags |= FLAG_MNG_PT_ENABLED;
5605
ad68076e
BA
5606 /*
5607 * before reading the NVM, reset the controller to
5608 * put the device in a known good starting state
5609 */
bc7f75fa
AK
5610 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5611
5612 /*
5613 * systems with ASPM and others may see the checksum fail on the first
5614 * attempt. Let's give it a few tries
5615 */
5616 for (i = 0;; i++) {
5617 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5618 break;
5619 if (i == 2) {
44defeb3 5620 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK
5621 err = -EIO;
5622 goto err_eeprom;
5623 }
5624 }
5625
10aa4c04
AK
5626 e1000_eeprom_checks(adapter);
5627
608f8a0d 5628 /* copy the MAC address */
bc7f75fa 5629 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5630 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK
5631
5632 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5633 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5634
5635 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5636 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK
5637 err = -EIO;
5638 goto err_eeprom;
5639 }
5640
5641 init_timer(&adapter->watchdog_timer);
5642 adapter->watchdog_timer.function = &e1000_watchdog;
5643 adapter->watchdog_timer.data = (unsigned long) adapter;
5644
5645 init_timer(&adapter->phy_info_timer);
5646 adapter->phy_info_timer.function = &e1000_update_phy_info;
5647 adapter->phy_info_timer.data = (unsigned long) adapter;
5648
5649 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5650 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB
5651 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5652 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5653 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5654
bc7f75fa
AK
5655 /* Initialize link parameters. User can change them with ethtool */
5656 adapter->hw.mac.autoneg = 1;
309af40b 5657 adapter->fc_autoneg = 1;
5c48ef3e
BA
5658 adapter->hw.fc.requested_mode = e1000_fc_default;
5659 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK
5660 adapter->hw.phy.autoneg_advertised = 0x2f;
5661
5662 /* ring size defaults */
5663 adapter->rx_ring->count = 256;
5664 adapter->tx_ring->count = 256;
5665
5666 /*
5667 * Initial Wake on LAN setting - If APM wake is enabled in
5668 * the EEPROM, enable the ACPI Magic Packet filter
5669 */
5670 if (adapter->flags & FLAG_APME_IN_WUC) {
5671 /* APME bit in EEPROM is mapped to WUC.APME */
5672 eeprom_data = er32(WUC);
5673 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA
5674 if (eeprom_data & E1000_WUC_PHY_WAKE)
5675 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK
5676 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5677 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5678 (adapter->hw.bus.func == 1))
5679 e1000_read_nvm(&adapter->hw,
5680 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5681 else
5682 e1000_read_nvm(&adapter->hw,
5683 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5684 }
5685
5686 /* fetch WoL from EEPROM */
5687 if (eeprom_data & eeprom_apme_mask)
5688 adapter->eeprom_wol |= E1000_WUFC_MAG;
5689
5690 /*
5691 * now that we have the eeprom settings, apply the special cases
5692 * where the eeprom may be wrong or the board simply won't support
5693 * wake on lan on a particular port
5694 */
5695 if (!(adapter->flags & FLAG_HAS_WOL))
5696 adapter->eeprom_wol = 0;
5697
5698 /* initialize the wol settings based on the eeprom settings */
5699 adapter->wol = adapter->eeprom_wol;
6ff68026 5700 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5701
84527590
BA
5702 /* save off EEPROM version number */
5703 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5704
bc7f75fa
AK
5705 /* reset the hardware with the new settings */
5706 e1000e_reset(adapter);
5707
ad68076e
BA
5708 /*
5709 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5710 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
5711 * under the control of the driver.
5712 */
c43bc57e 5713 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
5714 e1000_get_hw_control(adapter);
5715
bc7f75fa
AK
5716 strcpy(netdev->name, "eth%d");
5717 err = register_netdev(netdev);
5718 if (err)
5719 goto err_register;
5720
9c563d20
JB
5721 /* carrier off reporting is important to ethtool even BEFORE open */
5722 netif_carrier_off(netdev);
5723
bc7f75fa
AK
5724 e1000_print_device_info(adapter);
5725
23606cf5
RW
5726 if (pci_dev_run_wake(pdev)) {
5727 pm_runtime_set_active(&pdev->dev);
5728 pm_runtime_enable(&pdev->dev);
5729 }
5730 pm_schedule_suspend(&pdev->dev, MSEC_PER_SEC);
5731
bc7f75fa
AK
5732 return 0;
5733
5734err_register:
c43bc57e
JB
5735 if (!(adapter->flags & FLAG_HAS_AMT))
5736 e1000_release_hw_control(adapter);
bc7f75fa
AK
5737err_eeprom:
5738 if (!e1000_check_reset_block(&adapter->hw))
5739 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5740err_hw_init:
bc7f75fa 5741
bc7f75fa
AK
5742 kfree(adapter->tx_ring);
5743 kfree(adapter->rx_ring);
5744err_sw_init:
c43bc57e
JB
5745 if (adapter->hw.flash_address)
5746 iounmap(adapter->hw.flash_address);
e82f54ba 5747 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5748err_flashmap:
bc7f75fa
AK
5749 iounmap(adapter->hw.hw_addr);
5750err_ioremap:
5751 free_netdev(netdev);
5752err_alloc_etherdev:
f0f422e5
BA
5753 pci_release_selected_regions(pdev,
5754 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK
5755err_pci_reg:
5756err_dma:
5757 pci_disable_device(pdev);
5758 return err;
5759}
5760
5761/**
5762 * e1000_remove - Device Removal Routine
5763 * @pdev: PCI device information struct
5764 *
5765 * e1000_remove is called by the PCI subsystem to alert the driver
5766 * that it should release a PCI device. The could be caused by a
5767 * Hot-Plug event, or because the driver is going to be removed from
5768 * memory.
5769 **/
5770static void __devexit e1000_remove(struct pci_dev *pdev)
5771{
5772 struct net_device *netdev = pci_get_drvdata(pdev);
5773 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW
5774 bool down = test_bit(__E1000_DOWN, &adapter->state);
5775
5776 pm_runtime_get_sync(&pdev->dev);
bc7f75fa 5777
ad68076e
BA
5778 /*
5779 * flush_scheduled work may reschedule our watchdog task, so
5780 * explicitly disable watchdog tasks from being rescheduled
5781 */
23606cf5
RW
5782 if (!down)
5783 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK
5784 del_timer_sync(&adapter->watchdog_timer);
5785 del_timer_sync(&adapter->phy_info_timer);
5786
41cec6f1
BA
5787 cancel_work_sync(&adapter->reset_task);
5788 cancel_work_sync(&adapter->watchdog_task);
5789 cancel_work_sync(&adapter->downshift_task);
5790 cancel_work_sync(&adapter->update_phy_task);
5791 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK
5792 flush_scheduled_work();
5793
17f208de
BA
5794 if (!(netdev->flags & IFF_UP))
5795 e1000_power_down_phy(adapter);
5796
23606cf5
RW
5797 /* Don't lie to e1000_close() down the road. */
5798 if (!down)
5799 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA
5800 unregister_netdev(netdev);
5801
23606cf5
RW
5802 if (pci_dev_run_wake(pdev)) {
5803 pm_runtime_disable(&pdev->dev);
5804 pm_runtime_set_suspended(&pdev->dev);
5805 }
5806 pm_runtime_put_noidle(&pdev->dev);
5807
ad68076e
BA
5808 /*
5809 * Release control of h/w to f/w. If f/w is AMT enabled, this
5810 * would have already happened in close and is redundant.
5811 */
bc7f75fa
AK
5812 e1000_release_hw_control(adapter);
5813
4662e82b 5814 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK
5815 kfree(adapter->tx_ring);
5816 kfree(adapter->rx_ring);
5817
5818 iounmap(adapter->hw.hw_addr);
5819 if (adapter->hw.flash_address)
5820 iounmap(adapter->hw.flash_address);
f0f422e5
BA
5821 pci_release_selected_regions(pdev,
5822 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK
5823
5824 free_netdev(netdev);
5825
111b9dc5 5826 /* AER disable */
19d5afd4 5827 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5828
bc7f75fa
AK
5829 pci_disable_device(pdev);
5830}
5831
5832/* PCI Error Recovery (ERS) */
5833static struct pci_error_handlers e1000_err_handler = {
5834 .error_detected = e1000_io_error_detected,
5835 .slot_reset = e1000_io_slot_reset,
5836 .resume = e1000_io_resume,
5837};
5838
a3aa1884 5839static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK
5840 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5841 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5842 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5843 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5844 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5845 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK
5846 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5847 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5848 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5849
bc7f75fa
AK
5850 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5851 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5852 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5853 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5854
bc7f75fa
AK
5855 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5856 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5857 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5858
4662e82b 5859 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5860 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5861 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5862
bc7f75fa
AK
5863 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5864 board_80003es2lan },
5865 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5866 board_80003es2lan },
5867 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5868 board_80003es2lan },
5869 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5870 board_80003es2lan },
ad68076e 5871
bc7f75fa
AK
5872 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5873 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5874 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5875 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5876 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5877 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5878 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5879 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5880
bc7f75fa
AK
5881 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5882 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5883 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5884 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5885 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5886 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA
5887 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5888 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5889 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5890
5891 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5892 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5893 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5894
f4187b56
BA
5895 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5896 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5897
a4f58f54
BA
5898 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5899 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5900 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5901 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5902
bc7f75fa
AK
5903 { } /* terminate list */
5904};
5905MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5906
a0340162 5907#ifdef CONFIG_PM_OPS
23606cf5 5908static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW
5909 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
5910 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
5911 e1000_runtime_resume, e1000_idle)
23606cf5 5912};
e50208a0 5913#endif
23606cf5 5914
bc7f75fa
AK
5915/* PCI Device API Driver */
5916static struct pci_driver e1000_driver = {
5917 .name = e1000e_driver_name,
5918 .id_table = e1000_pci_tbl,
5919 .probe = e1000_probe,
5920 .remove = __devexit_p(e1000_remove),
a0340162 5921#ifdef CONFIG_PM_OPS
23606cf5 5922 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK
5923#endif
5924 .shutdown = e1000_shutdown,
5925 .err_handler = &e1000_err_handler
5926};
5927
5928/**
5929 * e1000_init_module - Driver Registration Routine
5930 *
5931 * e1000_init_module is the first routine called when the driver is
5932 * loaded. All it does is register with the PCI subsystem.
5933 **/
5934static int __init e1000_init_module(void)
5935{
5936 int ret;
8544b9f7
BA
5937 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
5938 e1000e_driver_version);
5939 pr_info("Copyright (c) 1999 - 2009 Intel Corporation.\n");
bc7f75fa 5940 ret = pci_register_driver(&e1000_driver);
53ec5498 5941
bc7f75fa
AK
5942 return ret;
5943}
5944module_init(e1000_init_module);
5945
5946/**
5947 * e1000_exit_module - Driver Exit Cleanup Routine
5948 *
5949 * e1000_exit_module is called just before the driver is removed
5950 * from memory.
5951 **/
5952static void __exit e1000_exit_module(void)
5953{
5954 pci_unregister_driver(&e1000_driver);
5955}
5956module_exit(e1000_exit_module);
5957
5958
5959MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5960MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5961MODULE_LICENSE("GPL");
5962MODULE_VERSION(DRV_VERSION);
5963
5964/* e1000_main.c */