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smsc9420: fix big endian rx checksum offload
[linux-block.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
ad68076e 4 Copyright(c) 1999 - 2008 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/module.h>
30#include <linux/types.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/vmalloc.h>
34#include <linux/pagemap.h>
35#include <linux/delay.h>
36#include <linux/netdevice.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/mii.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
44#include <linux/cpu.h>
45#include <linux/smp.h>
97ac8cae 46#include <linux/pm_qos_params.h>
111b9dc5 47#include <linux/aer.h>
bc7f75fa
AK		 48
49#include "e1000.h"
50
92af3e95 51#define DRV_VERSION "0.3.3.4-k2"
bc7f75fa
AK		 52char e1000e_driver_name[] = "e1000e";
53const char e1000e_driver_version[] = DRV_VERSION;
54
55static const struct e1000_info *e1000_info_tbl[] = {
56 [board_82571] = &e1000_82571_info,
57 [board_82572] = &e1000_82572_info,
58 [board_82573] = &e1000_82573_info,
4662e82b 59 [board_82574] = &e1000_82574_info,
bc7f75fa
AK		 60 [board_80003es2lan] = &e1000_es2_info,
61 [board_ich8lan] = &e1000_ich8_info,
62 [board_ich9lan] = &e1000_ich9_info,
f4187b56 63 [board_ich10lan] = &e1000_ich10_info,
bc7f75fa
AK		 64};
65
66#ifdef DEBUG
67/**
68 * e1000_get_hw_dev_name - return device name string
69 * used by hardware layer to print debugging information
70 **/
71char *e1000e_get_hw_dev_name(struct e1000_hw *hw)
72{
589c085f 73 return hw->adapter->netdev->name;
bc7f75fa
AK		 74}
75#endif
76
77/**
78 * e1000_desc_unused - calculate if we have unused descriptors
79 **/
80static int e1000_desc_unused(struct e1000_ring *ring)
81{
82 if (ring->next_to_clean > ring->next_to_use)
83 return ring->next_to_clean - ring->next_to_use - 1;
84
85 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
86}
87
88/**
ad68076e 89 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 90 * @adapter: board private structure
91 * @status: descriptor status field as written by hardware
92 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
93 * @skb: pointer to sk_buff to be indicated to stack
94 **/
95static void e1000_receive_skb(struct e1000_adapter *adapter,
96 struct net_device *netdev,
97 struct sk_buff *skb,
a39fe742 98 u8 status, __le16 vlan)
bc7f75fa
AK		 99{
100 skb->protocol = eth_type_trans(skb, netdev);
101
102 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 103 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
104 le16_to_cpu(vlan), skb);
bc7f75fa 105 else
89c88b16 106 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 107}
108
109/**
110 * e1000_rx_checksum - Receive Checksum Offload for 82543
111 * @adapter: board private structure
112 * @status_err: receive descriptor status and error fields
113 * @csum: receive descriptor csum field
114 * @sk_buff: socket buffer with received data
115 **/
116static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
117 u32 csum, struct sk_buff *skb)
118{
119 u16 status = (u16)status_err;
120 u8 errors = (u8)(status_err >> 24);
121 skb->ip_summed = CHECKSUM_NONE;
122
123 /* Ignore Checksum bit is set */
124 if (status & E1000_RXD_STAT_IXSM)
125 return;
126 /* TCP/UDP checksum error bit is set */
127 if (errors & E1000_RXD_ERR_TCPE) {
128 /* let the stack verify checksum errors */
129 adapter->hw_csum_err++;
130 return;
131 }
132
133 /* TCP/UDP Checksum has not been calculated */
134 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
135 return;
136
137 /* It must be a TCP or UDP packet with a valid checksum */
138 if (status & E1000_RXD_STAT_TCPCS) {
139 /* TCP checksum is good */
140 skb->ip_summed = CHECKSUM_UNNECESSARY;
141 } else {
ad68076e
BA		 142 /*
143 * IP fragment with UDP payload
144 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 145 * and then put the value in host order for further stack use.
146 */
a39fe742
AV		 147 __sum16 sum = (__force __sum16)htons(csum);
148 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 149 skb->ip_summed = CHECKSUM_COMPLETE;
150 }
151 adapter->hw_csum_good++;
152}
153
154/**
155 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
156 * @adapter: address of board private structure
157 **/
158static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
159 int cleaned_count)
160{
161 struct net_device *netdev = adapter->netdev;
162 struct pci_dev *pdev = adapter->pdev;
163 struct e1000_ring *rx_ring = adapter->rx_ring;
164 struct e1000_rx_desc *rx_desc;
165 struct e1000_buffer *buffer_info;
166 struct sk_buff *skb;
167 unsigned int i;
168 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
169
170 i = rx_ring->next_to_use;
171 buffer_info = &rx_ring->buffer_info[i];
172
173 while (cleaned_count--) {
174 skb = buffer_info->skb;
175 if (skb) {
176 skb_trim(skb, 0);
177 goto map_skb;
178 }
179
180 skb = netdev_alloc_skb(netdev, bufsz);
181 if (!skb) {
182 /* Better luck next round */
183 adapter->alloc_rx_buff_failed++;
184 break;
185 }
186
ad68076e
BA		 187 /*
188 * Make buffer alignment 2 beyond a 16 byte boundary
bc7f75fa
AK		 189 * this will result in a 16 byte aligned IP header after
190 * the 14 byte MAC header is removed
191 */
192 skb_reserve(skb, NET_IP_ALIGN);
193
194 buffer_info->skb = skb;
195map_skb:
196 buffer_info->dma = pci_map_single(pdev, skb->data,
197 adapter->rx_buffer_len,
198 PCI_DMA_FROMDEVICE);
8d8bb39b 199 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 200 dev_err(&pdev->dev, "RX DMA map failed\n");
201 adapter->rx_dma_failed++;
202 break;
203 }
204
205 rx_desc = E1000_RX_DESC(*rx_ring, i);
206 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
207
208 i++;
209 if (i == rx_ring->count)
210 i = 0;
211 buffer_info = &rx_ring->buffer_info[i];
212 }
213
214 if (rx_ring->next_to_use != i) {
215 rx_ring->next_to_use = i;
216 if (i-- == 0)
217 i = (rx_ring->count - 1);
218
ad68076e
BA		 219 /*
220 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 221 * know there are new descriptors to fetch. (Only
222 * applicable for weak-ordered memory model archs,
ad68076e
BA		 223 * such as IA-64).
224 */
bc7f75fa
AK		 225 wmb();
226 writel(i, adapter->hw.hw_addr + rx_ring->tail);
227 }
228}
229
230/**
231 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
232 * @adapter: address of board private structure
233 **/
234static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
235 int cleaned_count)
236{
237 struct net_device *netdev = adapter->netdev;
238 struct pci_dev *pdev = adapter->pdev;
239 union e1000_rx_desc_packet_split *rx_desc;
240 struct e1000_ring *rx_ring = adapter->rx_ring;
241 struct e1000_buffer *buffer_info;
242 struct e1000_ps_page *ps_page;
243 struct sk_buff *skb;
244 unsigned int i, j;
245
246 i = rx_ring->next_to_use;
247 buffer_info = &rx_ring->buffer_info[i];
248
249 while (cleaned_count--) {
250 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
251
252 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 253 ps_page = &buffer_info->ps_pages[j];
254 if (j >= adapter->rx_ps_pages) {
255 /* all unused desc entries get hw null ptr */
a39fe742 256 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 257 continue;
258 }
259 if (!ps_page->page) {
260 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 261 if (!ps_page->page) {
47f44e40
AK		 262 adapter->alloc_rx_buff_failed++;
263 goto no_buffers;
264 }
265 ps_page->dma = pci_map_page(pdev,
266 ps_page->page,
267 0, PAGE_SIZE,
268 PCI_DMA_FROMDEVICE);
8d8bb39b 269 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
47f44e40
AK		 270 dev_err(&adapter->pdev->dev,
271 "RX DMA page map failed\n");
272 adapter->rx_dma_failed++;
273 goto no_buffers;
bc7f75fa 274 }
bc7f75fa 275 }
47f44e40
AK		 276 /*
277 * Refresh the desc even if buffer_addrs
278 * didn't change because each write-back
279 * erases this info.
280 */
281 rx_desc->read.buffer_addr[j+1] =
282 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 283 }
284
285 skb = netdev_alloc_skb(netdev,
286 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
287
288 if (!skb) {
289 adapter->alloc_rx_buff_failed++;
290 break;
291 }
292
ad68076e
BA		 293 /*
294 * Make buffer alignment 2 beyond a 16 byte boundary
bc7f75fa
AK		 295 * this will result in a 16 byte aligned IP header after
296 * the 14 byte MAC header is removed
297 */
298 skb_reserve(skb, NET_IP_ALIGN);
299
300 buffer_info->skb = skb;
301 buffer_info->dma = pci_map_single(pdev, skb->data,
302 adapter->rx_ps_bsize0,
303 PCI_DMA_FROMDEVICE);
8d8bb39b 304 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 305 dev_err(&pdev->dev, "RX DMA map failed\n");
306 adapter->rx_dma_failed++;
307 /* cleanup skb */
308 dev_kfree_skb_any(skb);
309 buffer_info->skb = NULL;
310 break;
311 }
312
313 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
314
315 i++;
316 if (i == rx_ring->count)
317 i = 0;
318 buffer_info = &rx_ring->buffer_info[i];
319 }
320
321no_buffers:
322 if (rx_ring->next_to_use != i) {
323 rx_ring->next_to_use = i;
324
325 if (!(i--))
326 i = (rx_ring->count - 1);
327
ad68076e
BA		 328 /*
329 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 330 * know there are new descriptors to fetch. (Only
331 * applicable for weak-ordered memory model archs,
ad68076e
BA		 332 * such as IA-64).
333 */
bc7f75fa 334 wmb();
ad68076e
BA		 335 /*
336 * Hardware increments by 16 bytes, but packet split
bc7f75fa
AK		 337 * descriptors are 32 bytes...so we increment tail
338 * twice as much.
339 */
340 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
341 }
342}
343
97ac8cae
BA		 344/**
345 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
346 * @adapter: address of board private structure
97ac8cae
BA		 347 * @cleaned_count: number of buffers to allocate this pass
348 **/
349
350static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
351 int cleaned_count)
352{
353 struct net_device *netdev = adapter->netdev;
354 struct pci_dev *pdev = adapter->pdev;
355 struct e1000_rx_desc *rx_desc;
356 struct e1000_ring *rx_ring = adapter->rx_ring;
357 struct e1000_buffer *buffer_info;
358 struct sk_buff *skb;
359 unsigned int i;
360 unsigned int bufsz = 256 -
361 16 /* for skb_reserve */ -
362 NET_IP_ALIGN;
363
364 i = rx_ring->next_to_use;
365 buffer_info = &rx_ring->buffer_info[i];
366
367 while (cleaned_count--) {
368 skb = buffer_info->skb;
369 if (skb) {
370 skb_trim(skb, 0);
371 goto check_page;
372 }
373
374 skb = netdev_alloc_skb(netdev, bufsz);
375 if (unlikely(!skb)) {
376 /* Better luck next round */
377 adapter->alloc_rx_buff_failed++;
378 break;
379 }
380
381 /* Make buffer alignment 2 beyond a 16 byte boundary
382 * this will result in a 16 byte aligned IP header after
383 * the 14 byte MAC header is removed
384 */
385 skb_reserve(skb, NET_IP_ALIGN);
386
387 buffer_info->skb = skb;
388check_page:
389 /* allocate a new page if necessary */
390 if (!buffer_info->page) {
391 buffer_info->page = alloc_page(GFP_ATOMIC);
392 if (unlikely(!buffer_info->page)) {
393 adapter->alloc_rx_buff_failed++;
394 break;
395 }
396 }
397
398 if (!buffer_info->dma)
399 buffer_info->dma = pci_map_page(pdev,
400 buffer_info->page, 0,
401 PAGE_SIZE,
402 PCI_DMA_FROMDEVICE);
403
404 rx_desc = E1000_RX_DESC(*rx_ring, i);
405 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
406
407 if (unlikely(++i == rx_ring->count))
408 i = 0;
409 buffer_info = &rx_ring->buffer_info[i];
410 }
411
412 if (likely(rx_ring->next_to_use != i)) {
413 rx_ring->next_to_use = i;
414 if (unlikely(i-- == 0))
415 i = (rx_ring->count - 1);
416
417 /* Force memory writes to complete before letting h/w
418 * know there are new descriptors to fetch. (Only
419 * applicable for weak-ordered memory model archs,
420 * such as IA-64). */
421 wmb();
422 writel(i, adapter->hw.hw_addr + rx_ring->tail);
423 }
424}
425
bc7f75fa
AK		 426/**
427 * e1000_clean_rx_irq - Send received data up the network stack; legacy
428 * @adapter: board private structure
429 *
430 * the return value indicates whether actual cleaning was done, there
431 * is no guarantee that everything was cleaned
432 **/
433static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
434 int *work_done, int work_to_do)
435{
436 struct net_device *netdev = adapter->netdev;
437 struct pci_dev *pdev = adapter->pdev;
438 struct e1000_ring *rx_ring = adapter->rx_ring;
439 struct e1000_rx_desc *rx_desc, *next_rxd;
440 struct e1000_buffer *buffer_info, *next_buffer;
441 u32 length;
442 unsigned int i;
443 int cleaned_count = 0;
444 bool cleaned = 0;
445 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
446
447 i = rx_ring->next_to_clean;
448 rx_desc = E1000_RX_DESC(*rx_ring, i);
449 buffer_info = &rx_ring->buffer_info[i];
450
451 while (rx_desc->status & E1000_RXD_STAT_DD) {
452 struct sk_buff *skb;
453 u8 status;
454
455 if (*work_done >= work_to_do)
456 break;
457 (*work_done)++;
458
459 status = rx_desc->status;
460 skb = buffer_info->skb;
461 buffer_info->skb = NULL;
462
463 prefetch(skb->data - NET_IP_ALIGN);
464
465 i++;
466 if (i == rx_ring->count)
467 i = 0;
468 next_rxd = E1000_RX_DESC(*rx_ring, i);
469 prefetch(next_rxd);
470
471 next_buffer = &rx_ring->buffer_info[i];
472
473 cleaned = 1;
474 cleaned_count++;
475 pci_unmap_single(pdev,
476 buffer_info->dma,
477 adapter->rx_buffer_len,
478 PCI_DMA_FROMDEVICE);
479 buffer_info->dma = 0;
480
481 length = le16_to_cpu(rx_desc->length);
482
483 /* !EOP means multiple descriptors were used to store a single
484 * packet, also make sure the frame isn't just CRC only */
485 if (!(status & E1000_RXD_STAT_EOP) || (length <= 4)) {
486 /* All receives must fit into a single buffer */
44defeb3
JK		 487 e_dbg("%s: Receive packet consumed multiple buffers\n",
488 netdev->name);
bc7f75fa
AK		 489 /* recycle */
490 buffer_info->skb = skb;
491 goto next_desc;
492 }
493
494 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
495 /* recycle */
496 buffer_info->skb = skb;
497 goto next_desc;
498 }
499
eb7c3adb
JK		 500 /* adjust length to remove Ethernet CRC */
501 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
502 length -= 4;
503
bc7f75fa
AK		 504 total_rx_bytes += length;
505 total_rx_packets++;
506
ad68076e
BA		 507 /*
508 * code added for copybreak, this should improve
bc7f75fa 509 * performance for small packets with large amounts
ad68076e
BA		 510 * of reassembly being done in the stack
511 */
bc7f75fa
AK		 512 if (length < copybreak) {
513 struct sk_buff *new_skb =
514 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
515 if (new_skb) {
516 skb_reserve(new_skb, NET_IP_ALIGN);
808ff676
BA		 517 skb_copy_to_linear_data_offset(new_skb,
518 -NET_IP_ALIGN,
519 (skb->data -
520 NET_IP_ALIGN),
521 (length +
522 NET_IP_ALIGN));
bc7f75fa
AK		 523 /* save the skb in buffer_info as good */
524 buffer_info->skb = skb;
525 skb = new_skb;
526 }
527 /* else just continue with the old one */
528 }
529 /* end copybreak code */
530 skb_put(skb, length);
531
532 /* Receive Checksum Offload */
533 e1000_rx_checksum(adapter,
534 (u32)(status) |
535 ((u32)(rx_desc->errors) << 24),
536 le16_to_cpu(rx_desc->csum), skb);
537
538 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
539
540next_desc:
541 rx_desc->status = 0;
542
543 /* return some buffers to hardware, one at a time is too slow */
544 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
545 adapter->alloc_rx_buf(adapter, cleaned_count);
546 cleaned_count = 0;
547 }
548
549 /* use prefetched values */
550 rx_desc = next_rxd;
551 buffer_info = next_buffer;
552 }
553 rx_ring->next_to_clean = i;
554
555 cleaned_count = e1000_desc_unused(rx_ring);
556 if (cleaned_count)
557 adapter->alloc_rx_buf(adapter, cleaned_count);
558
bc7f75fa 559 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 560 adapter->total_rx_packets += total_rx_packets;
41988692 561 adapter->net_stats.rx_bytes += total_rx_bytes;
7c25769f 562 adapter->net_stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 563 return cleaned;
564}
565
bc7f75fa
AK		 566static void e1000_put_txbuf(struct e1000_adapter *adapter,
567 struct e1000_buffer *buffer_info)
568{
8ddc951c 569 buffer_info->dma = 0;
bc7f75fa 570 if (buffer_info->skb) {
8ddc951c
JB		 571 skb_dma_unmap(&adapter->pdev->dev, buffer_info->skb,
572 DMA_TO_DEVICE);
bc7f75fa
AK		 573 dev_kfree_skb_any(buffer_info->skb);
574 buffer_info->skb = NULL;
575 }
576}
577
578static void e1000_print_tx_hang(struct e1000_adapter *adapter)
579{
580 struct e1000_ring *tx_ring = adapter->tx_ring;
581 unsigned int i = tx_ring->next_to_clean;
582 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
583 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 584
585 /* detected Tx unit hang */
44defeb3
JK		 586 e_err("Detected Tx Unit Hang:\n"
587 " TDH <%x>\n"
588 " TDT <%x>\n"
589 " next_to_use <%x>\n"
590 " next_to_clean <%x>\n"
591 "buffer_info[next_to_clean]:\n"
592 " time_stamp <%lx>\n"
593 " next_to_watch <%x>\n"
594 " jiffies <%lx>\n"
595 " next_to_watch.status <%x>\n",
596 readl(adapter->hw.hw_addr + tx_ring->head),
597 readl(adapter->hw.hw_addr + tx_ring->tail),
598 tx_ring->next_to_use,
599 tx_ring->next_to_clean,
600 tx_ring->buffer_info[eop].time_stamp,
601 eop,
602 jiffies,
603 eop_desc->upper.fields.status);
bc7f75fa
AK		 604}
605
606/**
607 * e1000_clean_tx_irq - Reclaim resources after transmit completes
608 * @adapter: board private structure
609 *
610 * the return value indicates whether actual cleaning was done, there
611 * is no guarantee that everything was cleaned
612 **/
613static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
614{
615 struct net_device *netdev = adapter->netdev;
616 struct e1000_hw *hw = &adapter->hw;
617 struct e1000_ring *tx_ring = adapter->tx_ring;
618 struct e1000_tx_desc *tx_desc, *eop_desc;
619 struct e1000_buffer *buffer_info;
620 unsigned int i, eop;
621 unsigned int count = 0;
622 bool cleaned = 0;
623 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
624
625 i = tx_ring->next_to_clean;
626 eop = tx_ring->buffer_info[i].next_to_watch;
627 eop_desc = E1000_TX_DESC(*tx_ring, eop);
628
629 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
630 for (cleaned = 0; !cleaned; ) {
631 tx_desc = E1000_TX_DESC(*tx_ring, i);
632 buffer_info = &tx_ring->buffer_info[i];
633 cleaned = (i == eop);
634
635 if (cleaned) {
636 struct sk_buff *skb = buffer_info->skb;
637 unsigned int segs, bytecount;
638 segs = skb_shinfo(skb)->gso_segs ?: 1;
639 /* multiply data chunks by size of headers */
640 bytecount = ((segs - 1) * skb_headlen(skb)) +
641 skb->len;
642 total_tx_packets += segs;
643 total_tx_bytes += bytecount;
644 }
645
646 e1000_put_txbuf(adapter, buffer_info);
647 tx_desc->upper.data = 0;
648
649 i++;
650 if (i == tx_ring->count)
651 i = 0;
652 }
653
654 eop = tx_ring->buffer_info[i].next_to_watch;
655 eop_desc = E1000_TX_DESC(*tx_ring, eop);
656#define E1000_TX_WEIGHT 64
657 /* weight of a sort for tx, to avoid endless transmit cleanup */
658 if (count++ == E1000_TX_WEIGHT)
659 break;
660 }
661
662 tx_ring->next_to_clean = i;
663
664#define TX_WAKE_THRESHOLD 32
665 if (cleaned && netif_carrier_ok(netdev) &&
666 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
667 /* Make sure that anybody stopping the queue after this
668 * sees the new next_to_clean.
669 */
670 smp_mb();
671
672 if (netif_queue_stopped(netdev) &&
673 !(test_bit(__E1000_DOWN, &adapter->state))) {
674 netif_wake_queue(netdev);
675 ++adapter->restart_queue;
676 }
677 }
678
679 if (adapter->detect_tx_hung) {
ad68076e
BA		 680 /*
681 * Detect a transmit hang in hardware, this serializes the
682 * check with the clearing of time_stamp and movement of i
683 */
bc7f75fa 684 adapter->detect_tx_hung = 0;
8ddc951c
JB		 685 /*
686 * read barrier to make sure that the ->dma member and time
687 * stamp are updated fully
688 */
689 smp_rmb();
bc7f75fa
AK		 690 if (tx_ring->buffer_info[eop].dma &&
691 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp
692 + (adapter->tx_timeout_factor * HZ))
ad68076e 693 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
bc7f75fa
AK		 694 e1000_print_tx_hang(adapter);
695 netif_stop_queue(netdev);
696 }
697 }
698 adapter->total_tx_bytes += total_tx_bytes;
699 adapter->total_tx_packets += total_tx_packets;
41988692 700 adapter->net_stats.tx_bytes += total_tx_bytes;
7c25769f 701 adapter->net_stats.tx_packets += total_tx_packets;
bc7f75fa
AK		 702 return cleaned;
703}
704
bc7f75fa
AK		 705/**
706 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
707 * @adapter: board private structure
708 *
709 * the return value indicates whether actual cleaning was done, there
710 * is no guarantee that everything was cleaned
711 **/
712static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
713 int *work_done, int work_to_do)
714{
715 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
716 struct net_device *netdev = adapter->netdev;
717 struct pci_dev *pdev = adapter->pdev;
718 struct e1000_ring *rx_ring = adapter->rx_ring;
719 struct e1000_buffer *buffer_info, *next_buffer;
720 struct e1000_ps_page *ps_page;
721 struct sk_buff *skb;
722 unsigned int i, j;
723 u32 length, staterr;
724 int cleaned_count = 0;
725 bool cleaned = 0;
726 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
727
728 i = rx_ring->next_to_clean;
729 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
730 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
731 buffer_info = &rx_ring->buffer_info[i];
732
733 while (staterr & E1000_RXD_STAT_DD) {
734 if (*work_done >= work_to_do)
735 break;
736 (*work_done)++;
737 skb = buffer_info->skb;
738
739 /* in the packet split case this is header only */
740 prefetch(skb->data - NET_IP_ALIGN);
741
742 i++;
743 if (i == rx_ring->count)
744 i = 0;
745 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
746 prefetch(next_rxd);
747
748 next_buffer = &rx_ring->buffer_info[i];
749
750 cleaned = 1;
751 cleaned_count++;
752 pci_unmap_single(pdev, buffer_info->dma,
753 adapter->rx_ps_bsize0,
754 PCI_DMA_FROMDEVICE);
755 buffer_info->dma = 0;
756
757 if (!(staterr & E1000_RXD_STAT_EOP)) {
44defeb3
JK		 758 e_dbg("%s: Packet Split buffers didn't pick up the "
759 "full packet\n", netdev->name);
bc7f75fa
AK		 760 dev_kfree_skb_irq(skb);
761 goto next_desc;
762 }
763
764 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
765 dev_kfree_skb_irq(skb);
766 goto next_desc;
767 }
768
769 length = le16_to_cpu(rx_desc->wb.middle.length0);
770
771 if (!length) {
44defeb3
JK		 772 e_dbg("%s: Last part of the packet spanning multiple "
773 "descriptors\n", netdev->name);
bc7f75fa
AK		 774 dev_kfree_skb_irq(skb);
775 goto next_desc;
776 }
777
778 /* Good Receive */
779 skb_put(skb, length);
780
781 {
ad68076e
BA		 782 /*
783 * this looks ugly, but it seems compiler issues make it
784 * more efficient than reusing j
785 */
bc7f75fa
AK		 786 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
787
ad68076e
BA		 788 /*
789 * page alloc/put takes too long and effects small packet
790 * throughput, so unsplit small packets and save the alloc/put
791 * only valid in softirq (napi) context to call kmap_*
792 */
bc7f75fa
AK		 793 if (l1 && (l1 <= copybreak) &&
794 ((length + l1) <= adapter->rx_ps_bsize0)) {
795 u8 *vaddr;
796
47f44e40 797 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 798
ad68076e
BA		 799 /*
800 * there is no documentation about how to call
bc7f75fa 801 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 802 * very long
803 */
bc7f75fa
AK		 804 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
805 PAGE_SIZE, PCI_DMA_FROMDEVICE);
806 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
807 memcpy(skb_tail_pointer(skb), vaddr, l1);
808 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
809 pci_dma_sync_single_for_device(pdev, ps_page->dma,
810 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 811
eb7c3adb
JK		 812 /* remove the CRC */
813 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
814 l1 -= 4;
815
bc7f75fa
AK		 816 skb_put(skb, l1);
817 goto copydone;
818 } /* if */
819 }
820
821 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
822 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
823 if (!length)
824 break;
825
47f44e40 826 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 827 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
828 PCI_DMA_FROMDEVICE);
829 ps_page->dma = 0;
830 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
831 ps_page->page = NULL;
832 skb->len += length;
833 skb->data_len += length;
834 skb->truesize += length;
835 }
836
eb7c3adb
JK		 837 /* strip the ethernet crc, problem is we're using pages now so
838 * this whole operation can get a little cpu intensive
839 */
840 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
841 pskb_trim(skb, skb->len - 4);
842
bc7f75fa
AK		 843copydone:
844 total_rx_bytes += skb->len;
845 total_rx_packets++;
846
847 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
848 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
849
850 if (rx_desc->wb.upper.header_status &
851 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
852 adapter->rx_hdr_split++;
853
854 e1000_receive_skb(adapter, netdev, skb,
855 staterr, rx_desc->wb.middle.vlan);
856
857next_desc:
858 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
859 buffer_info->skb = NULL;
860
861 /* return some buffers to hardware, one at a time is too slow */
862 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
863 adapter->alloc_rx_buf(adapter, cleaned_count);
864 cleaned_count = 0;
865 }
866
867 /* use prefetched values */
868 rx_desc = next_rxd;
869 buffer_info = next_buffer;
870
871 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
872 }
873 rx_ring->next_to_clean = i;
874
875 cleaned_count = e1000_desc_unused(rx_ring);
876 if (cleaned_count)
877 adapter->alloc_rx_buf(adapter, cleaned_count);
878
bc7f75fa 879 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 880 adapter->total_rx_packets += total_rx_packets;
41988692 881 adapter->net_stats.rx_bytes += total_rx_bytes;
7c25769f 882 adapter->net_stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 883 return cleaned;
884}
885
97ac8cae
BA		 886/**
887 * e1000_consume_page - helper function
888 **/
889static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
890 u16 length)
891{
892 bi->page = NULL;
893 skb->len += length;
894 skb->data_len += length;
895 skb->truesize += length;
896}
897
898/**
899 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
900 * @adapter: board private structure
901 *
902 * the return value indicates whether actual cleaning was done, there
903 * is no guarantee that everything was cleaned
904 **/
905
906static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
907 int *work_done, int work_to_do)
908{
909 struct net_device *netdev = adapter->netdev;
910 struct pci_dev *pdev = adapter->pdev;
911 struct e1000_ring *rx_ring = adapter->rx_ring;
912 struct e1000_rx_desc *rx_desc, *next_rxd;
913 struct e1000_buffer *buffer_info, *next_buffer;
914 u32 length;
915 unsigned int i;
916 int cleaned_count = 0;
917 bool cleaned = false;
918 unsigned int total_rx_bytes=0, total_rx_packets=0;
919
920 i = rx_ring->next_to_clean;
921 rx_desc = E1000_RX_DESC(*rx_ring, i);
922 buffer_info = &rx_ring->buffer_info[i];
923
924 while (rx_desc->status & E1000_RXD_STAT_DD) {
925 struct sk_buff *skb;
926 u8 status;
927
928 if (*work_done >= work_to_do)
929 break;
930 (*work_done)++;
931
932 status = rx_desc->status;
933 skb = buffer_info->skb;
934 buffer_info->skb = NULL;
935
936 ++i;
937 if (i == rx_ring->count)
938 i = 0;
939 next_rxd = E1000_RX_DESC(*rx_ring, i);
940 prefetch(next_rxd);
941
942 next_buffer = &rx_ring->buffer_info[i];
943
944 cleaned = true;
945 cleaned_count++;
946 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
947 PCI_DMA_FROMDEVICE);
948 buffer_info->dma = 0;
949
950 length = le16_to_cpu(rx_desc->length);
951
952 /* errors is only valid for DD + EOP descriptors */
953 if (unlikely((status & E1000_RXD_STAT_EOP) &&
954 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
955 /* recycle both page and skb */
956 buffer_info->skb = skb;
957 /* an error means any chain goes out the window
958 * too */
959 if (rx_ring->rx_skb_top)
960 dev_kfree_skb(rx_ring->rx_skb_top);
961 rx_ring->rx_skb_top = NULL;
962 goto next_desc;
963 }
964
965#define rxtop rx_ring->rx_skb_top
966 if (!(status & E1000_RXD_STAT_EOP)) {
967 /* this descriptor is only the beginning (or middle) */
968 if (!rxtop) {
969 /* this is the beginning of a chain */
970 rxtop = skb;
971 skb_fill_page_desc(rxtop, 0, buffer_info->page,
972 0, length);
973 } else {
974 /* this is the middle of a chain */
975 skb_fill_page_desc(rxtop,
976 skb_shinfo(rxtop)->nr_frags,
977 buffer_info->page, 0, length);
978 /* re-use the skb, only consumed the page */
979 buffer_info->skb = skb;
980 }
981 e1000_consume_page(buffer_info, rxtop, length);
982 goto next_desc;
983 } else {
984 if (rxtop) {
985 /* end of the chain */
986 skb_fill_page_desc(rxtop,
987 skb_shinfo(rxtop)->nr_frags,
988 buffer_info->page, 0, length);
989 /* re-use the current skb, we only consumed the
990 * page */
991 buffer_info->skb = skb;
992 skb = rxtop;
993 rxtop = NULL;
994 e1000_consume_page(buffer_info, skb, length);
995 } else {
996 /* no chain, got EOP, this buf is the packet
997 * copybreak to save the put_page/alloc_page */
998 if (length <= copybreak &&
999 skb_tailroom(skb) >= length) {
1000 u8 *vaddr;
1001 vaddr = kmap_atomic(buffer_info->page,
1002 KM_SKB_DATA_SOFTIRQ);
1003 memcpy(skb_tail_pointer(skb), vaddr,
1004 length);
1005 kunmap_atomic(vaddr,
1006 KM_SKB_DATA_SOFTIRQ);
1007 /* re-use the page, so don't erase
1008 * buffer_info->page */
1009 skb_put(skb, length);
1010 } else {
1011 skb_fill_page_desc(skb, 0,
1012 buffer_info->page, 0,
1013 length);
1014 e1000_consume_page(buffer_info, skb,
1015 length);
1016 }
1017 }
1018 }
1019
1020 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1021 e1000_rx_checksum(adapter,
1022 (u32)(status) |
1023 ((u32)(rx_desc->errors) << 24),
1024 le16_to_cpu(rx_desc->csum), skb);
1025
1026 /* probably a little skewed due to removing CRC */
1027 total_rx_bytes += skb->len;
1028 total_rx_packets++;
1029
1030 /* eth type trans needs skb->data to point to something */
1031 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1032 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1033 dev_kfree_skb(skb);
1034 goto next_desc;
1035 }
1036
1037 e1000_receive_skb(adapter, netdev, skb, status,
1038 rx_desc->special);
1039
1040next_desc:
1041 rx_desc->status = 0;
1042
1043 /* return some buffers to hardware, one at a time is too slow */
1044 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1045 adapter->alloc_rx_buf(adapter, cleaned_count);
1046 cleaned_count = 0;
1047 }
1048
1049 /* use prefetched values */
1050 rx_desc = next_rxd;
1051 buffer_info = next_buffer;
1052 }
1053 rx_ring->next_to_clean = i;
1054
1055 cleaned_count = e1000_desc_unused(rx_ring);
1056 if (cleaned_count)
1057 adapter->alloc_rx_buf(adapter, cleaned_count);
1058
1059 adapter->total_rx_bytes += total_rx_bytes;
1060 adapter->total_rx_packets += total_rx_packets;
1061 adapter->net_stats.rx_bytes += total_rx_bytes;
1062 adapter->net_stats.rx_packets += total_rx_packets;
1063 return cleaned;
1064}
1065
bc7f75fa
AK		 1066/**
1067 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1068 * @adapter: board private structure
1069 **/
1070static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1071{
1072 struct e1000_ring *rx_ring = adapter->rx_ring;
1073 struct e1000_buffer *buffer_info;
1074 struct e1000_ps_page *ps_page;
1075 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1076 unsigned int i, j;
1077
1078 /* Free all the Rx ring sk_buffs */
1079 for (i = 0; i < rx_ring->count; i++) {
1080 buffer_info = &rx_ring->buffer_info[i];
1081 if (buffer_info->dma) {
1082 if (adapter->clean_rx == e1000_clean_rx_irq)
1083 pci_unmap_single(pdev, buffer_info->dma,
1084 adapter->rx_buffer_len,
1085 PCI_DMA_FROMDEVICE);
97ac8cae
BA		 1086 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1087 pci_unmap_page(pdev, buffer_info->dma,
1088 PAGE_SIZE,
1089 PCI_DMA_FROMDEVICE);
bc7f75fa
AK		 1090 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1091 pci_unmap_single(pdev, buffer_info->dma,
1092 adapter->rx_ps_bsize0,
1093 PCI_DMA_FROMDEVICE);
1094 buffer_info->dma = 0;
1095 }
1096
97ac8cae
BA		 1097 if (buffer_info->page) {
1098 put_page(buffer_info->page);
1099 buffer_info->page = NULL;
1100 }
1101
bc7f75fa
AK		 1102 if (buffer_info->skb) {
1103 dev_kfree_skb(buffer_info->skb);
1104 buffer_info->skb = NULL;
1105 }
1106
1107 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1108 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1109 if (!ps_page->page)
1110 break;
1111 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1112 PCI_DMA_FROMDEVICE);
1113 ps_page->dma = 0;
1114 put_page(ps_page->page);
1115 ps_page->page = NULL;
1116 }
1117 }
1118
1119 /* there also may be some cached data from a chained receive */
1120 if (rx_ring->rx_skb_top) {
1121 dev_kfree_skb(rx_ring->rx_skb_top);
1122 rx_ring->rx_skb_top = NULL;
1123 }
1124
bc7f75fa
AK		 1125 /* Zero out the descriptor ring */
1126 memset(rx_ring->desc, 0, rx_ring->size);
1127
1128 rx_ring->next_to_clean = 0;
1129 rx_ring->next_to_use = 0;
1130
1131 writel(0, adapter->hw.hw_addr + rx_ring->head);
1132 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1133}
1134
a8f88ff5
JB		 1135static void e1000e_downshift_workaround(struct work_struct *work)
1136{
1137 struct e1000_adapter *adapter = container_of(work,
1138 struct e1000_adapter, downshift_task);
1139
1140 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1141}
1142
bc7f75fa
AK		 1143/**
1144 * e1000_intr_msi - Interrupt Handler
1145 * @irq: interrupt number
1146 * @data: pointer to a network interface device structure
1147 **/
1148static irqreturn_t e1000_intr_msi(int irq, void *data)
1149{
1150 struct net_device *netdev = data;
1151 struct e1000_adapter *adapter = netdev_priv(netdev);
1152 struct e1000_hw *hw = &adapter->hw;
1153 u32 icr = er32(ICR);
1154
ad68076e
BA		 1155 /*
1156 * read ICR disables interrupts using IAM
1157 */
bc7f75fa 1158
573cca8c 1159 if (icr & E1000_ICR_LSC) {
bc7f75fa 1160 hw->mac.get_link_status = 1;
ad68076e
BA		 1161 /*
1162 * ICH8 workaround-- Call gig speed drop workaround on cable
1163 * disconnect (LSC) before accessing any PHY registers
1164 */
bc7f75fa
AK		 1165 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1166 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1167 schedule_work(&adapter->downshift_task);
bc7f75fa 1168
ad68076e
BA		 1169 /*
1170 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1171 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1172 * adapter in watchdog
1173 */
bc7f75fa
AK		 1174 if (netif_carrier_ok(netdev) &&
1175 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1176 /* disable receives */
1177 u32 rctl = er32(RCTL);
1178 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1179 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1180 }
1181 /* guard against interrupt when we're going down */
1182 if (!test_bit(__E1000_DOWN, &adapter->state))
1183 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1184 }
1185
288379f0 1186 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1187 adapter->total_tx_bytes = 0;
1188 adapter->total_tx_packets = 0;
1189 adapter->total_rx_bytes = 0;
1190 adapter->total_rx_packets = 0;
288379f0 1191 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1192 }
1193
1194 return IRQ_HANDLED;
1195}
1196
1197/**
1198 * e1000_intr - Interrupt Handler
1199 * @irq: interrupt number
1200 * @data: pointer to a network interface device structure
1201 **/
1202static irqreturn_t e1000_intr(int irq, void *data)
1203{
1204 struct net_device *netdev = data;
1205 struct e1000_adapter *adapter = netdev_priv(netdev);
1206 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1207 u32 rctl, icr = er32(ICR);
4662e82b 1208
bc7f75fa
AK		 1209 if (!icr)
1210 return IRQ_NONE; /* Not our interrupt */
1211
ad68076e
BA		 1212 /*
1213 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1214 * not set, then the adapter didn't send an interrupt
1215 */
bc7f75fa
AK		 1216 if (!(icr & E1000_ICR_INT_ASSERTED))
1217 return IRQ_NONE;
1218
ad68076e
BA		 1219 /*
1220 * Interrupt Auto-Mask...upon reading ICR,
1221 * interrupts are masked. No need for the
1222 * IMC write
1223 */
bc7f75fa 1224
573cca8c 1225 if (icr & E1000_ICR_LSC) {
bc7f75fa 1226 hw->mac.get_link_status = 1;
ad68076e
BA		 1227 /*
1228 * ICH8 workaround-- Call gig speed drop workaround on cable
1229 * disconnect (LSC) before accessing any PHY registers
1230 */
bc7f75fa
AK		 1231 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1232 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1233 schedule_work(&adapter->downshift_task);
bc7f75fa 1234
ad68076e
BA		 1235 /*
1236 * 80003ES2LAN workaround--
bc7f75fa
AK		 1237 * For packet buffer work-around on link down event;
1238 * disable receives here in the ISR and
1239 * reset adapter in watchdog
1240 */
1241 if (netif_carrier_ok(netdev) &&
1242 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1243 /* disable receives */
1244 rctl = er32(RCTL);
1245 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1246 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1247 }
1248 /* guard against interrupt when we're going down */
1249 if (!test_bit(__E1000_DOWN, &adapter->state))
1250 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1251 }
1252
288379f0 1253 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1254 adapter->total_tx_bytes = 0;
1255 adapter->total_tx_packets = 0;
1256 adapter->total_rx_bytes = 0;
1257 adapter->total_rx_packets = 0;
288379f0 1258 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1259 }
1260
1261 return IRQ_HANDLED;
1262}
1263
4662e82b
BA		 1264static irqreturn_t e1000_msix_other(int irq, void *data)
1265{
1266 struct net_device *netdev = data;
1267 struct e1000_adapter *adapter = netdev_priv(netdev);
1268 struct e1000_hw *hw = &adapter->hw;
1269 u32 icr = er32(ICR);
1270
1271 if (!(icr & E1000_ICR_INT_ASSERTED)) {
1272 ew32(IMS, E1000_IMS_OTHER);
1273 return IRQ_NONE;
1274 }
1275
1276 if (icr & adapter->eiac_mask)
1277 ew32(ICS, (icr & adapter->eiac_mask));
1278
1279 if (icr & E1000_ICR_OTHER) {
1280 if (!(icr & E1000_ICR_LSC))
1281 goto no_link_interrupt;
1282 hw->mac.get_link_status = 1;
1283 /* guard against interrupt when we're going down */
1284 if (!test_bit(__E1000_DOWN, &adapter->state))
1285 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1286 }
1287
1288no_link_interrupt:
1289 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1290
1291 return IRQ_HANDLED;
1292}
1293
1294
1295static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1296{
1297 struct net_device *netdev = data;
1298 struct e1000_adapter *adapter = netdev_priv(netdev);
1299 struct e1000_hw *hw = &adapter->hw;
1300 struct e1000_ring *tx_ring = adapter->tx_ring;
1301
1302
1303 adapter->total_tx_bytes = 0;
1304 adapter->total_tx_packets = 0;
1305
1306 if (!e1000_clean_tx_irq(adapter))
1307 /* Ring was not completely cleaned, so fire another interrupt */
1308 ew32(ICS, tx_ring->ims_val);
1309
1310 return IRQ_HANDLED;
1311}
1312
1313static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1314{
1315 struct net_device *netdev = data;
1316 struct e1000_adapter *adapter = netdev_priv(netdev);
1317
1318 /* Write the ITR value calculated at the end of the
1319 * previous interrupt.
1320 */
1321 if (adapter->rx_ring->set_itr) {
1322 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1323 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1324 adapter->rx_ring->set_itr = 0;
1325 }
1326
288379f0 1327 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1328 adapter->total_rx_bytes = 0;
1329 adapter->total_rx_packets = 0;
288379f0 1330 __napi_schedule(&adapter->napi);
4662e82b
BA		 1331 }
1332 return IRQ_HANDLED;
1333}
1334
1335/**
1336 * e1000_configure_msix - Configure MSI-X hardware
1337 *
1338 * e1000_configure_msix sets up the hardware to properly
1339 * generate MSI-X interrupts.
1340 **/
1341static void e1000_configure_msix(struct e1000_adapter *adapter)
1342{
1343 struct e1000_hw *hw = &adapter->hw;
1344 struct e1000_ring *rx_ring = adapter->rx_ring;
1345 struct e1000_ring *tx_ring = adapter->tx_ring;
1346 int vector = 0;
1347 u32 ctrl_ext, ivar = 0;
1348
1349 adapter->eiac_mask = 0;
1350
1351 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1352 if (hw->mac.type == e1000_82574) {
1353 u32 rfctl = er32(RFCTL);
1354 rfctl |= E1000_RFCTL_ACK_DIS;
1355 ew32(RFCTL, rfctl);
1356 }
1357
1358#define E1000_IVAR_INT_ALLOC_VALID 0x8
1359 /* Configure Rx vector */
1360 rx_ring->ims_val = E1000_IMS_RXQ0;
1361 adapter->eiac_mask |= rx_ring->ims_val;
1362 if (rx_ring->itr_val)
1363 writel(1000000000 / (rx_ring->itr_val * 256),
1364 hw->hw_addr + rx_ring->itr_register);
1365 else
1366 writel(1, hw->hw_addr + rx_ring->itr_register);
1367 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1368
1369 /* Configure Tx vector */
1370 tx_ring->ims_val = E1000_IMS_TXQ0;
1371 vector++;
1372 if (tx_ring->itr_val)
1373 writel(1000000000 / (tx_ring->itr_val * 256),
1374 hw->hw_addr + tx_ring->itr_register);
1375 else
1376 writel(1, hw->hw_addr + tx_ring->itr_register);
1377 adapter->eiac_mask |= tx_ring->ims_val;
1378 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1379
1380 /* set vector for Other Causes, e.g. link changes */
1381 vector++;
1382 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1383 if (rx_ring->itr_val)
1384 writel(1000000000 / (rx_ring->itr_val * 256),
1385 hw->hw_addr + E1000_EITR_82574(vector));
1386 else
1387 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1388
1389 /* Cause Tx interrupts on every write back */
1390 ivar |= (1 << 31);
1391
1392 ew32(IVAR, ivar);
1393
1394 /* enable MSI-X PBA support */
1395 ctrl_ext = er32(CTRL_EXT);
1396 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1397
1398 /* Auto-Mask Other interrupts upon ICR read */
1399#define E1000_EIAC_MASK_82574 0x01F00000
1400 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1401 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1402 ew32(CTRL_EXT, ctrl_ext);
1403 e1e_flush();
1404}
1405
1406void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1407{
1408 if (adapter->msix_entries) {
1409 pci_disable_msix(adapter->pdev);
1410 kfree(adapter->msix_entries);
1411 adapter->msix_entries = NULL;
1412 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1413 pci_disable_msi(adapter->pdev);
1414 adapter->flags &= ~FLAG_MSI_ENABLED;
1415 }
1416
1417 return;
1418}
1419
1420/**
1421 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1422 *
1423 * Attempt to configure interrupts using the best available
1424 * capabilities of the hardware and kernel.
1425 **/
1426void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1427{
1428 int err;
1429 int numvecs, i;
1430
1431
1432 switch (adapter->int_mode) {
1433 case E1000E_INT_MODE_MSIX:
1434 if (adapter->flags & FLAG_HAS_MSIX) {
1435 numvecs = 3; /* RxQ0, TxQ0 and other */
1436 adapter->msix_entries = kcalloc(numvecs,
1437 sizeof(struct msix_entry),
1438 GFP_KERNEL);
1439 if (adapter->msix_entries) {
1440 for (i = 0; i < numvecs; i++)
1441 adapter->msix_entries[i].entry = i;
1442
1443 err = pci_enable_msix(adapter->pdev,
1444 adapter->msix_entries,
1445 numvecs);
1446 if (err == 0)
1447 return;
1448 }
1449 /* MSI-X failed, so fall through and try MSI */
1450 e_err("Failed to initialize MSI-X interrupts. "
1451 "Falling back to MSI interrupts.\n");
1452 e1000e_reset_interrupt_capability(adapter);
1453 }
1454 adapter->int_mode = E1000E_INT_MODE_MSI;
1455 /* Fall through */
1456 case E1000E_INT_MODE_MSI:
1457 if (!pci_enable_msi(adapter->pdev)) {
1458 adapter->flags |= FLAG_MSI_ENABLED;
1459 } else {
1460 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1461 e_err("Failed to initialize MSI interrupts. Falling "
1462 "back to legacy interrupts.\n");
1463 }
1464 /* Fall through */
1465 case E1000E_INT_MODE_LEGACY:
1466 /* Don't do anything; this is the system default */
1467 break;
1468 }
1469
1470 return;
1471}
1472
1473/**
1474 * e1000_request_msix - Initialize MSI-X interrupts
1475 *
1476 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1477 * kernel.
1478 **/
1479static int e1000_request_msix(struct e1000_adapter *adapter)
1480{
1481 struct net_device *netdev = adapter->netdev;
1482 int err = 0, vector = 0;
1483
1484 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1485 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1486 else
1487 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1488 err = request_irq(adapter->msix_entries[vector].vector,
1489 &e1000_intr_msix_rx, 0, adapter->rx_ring->name,
1490 netdev);
1491 if (err)
1492 goto out;
1493 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1494 adapter->rx_ring->itr_val = adapter->itr;
1495 vector++;
1496
1497 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1498 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1499 else
1500 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1501 err = request_irq(adapter->msix_entries[vector].vector,
1502 &e1000_intr_msix_tx, 0, adapter->tx_ring->name,
1503 netdev);
1504 if (err)
1505 goto out;
1506 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1507 adapter->tx_ring->itr_val = adapter->itr;
1508 vector++;
1509
1510 err = request_irq(adapter->msix_entries[vector].vector,
1511 &e1000_msix_other, 0, netdev->name, netdev);
1512 if (err)
1513 goto out;
1514
1515 e1000_configure_msix(adapter);
1516 return 0;
1517out:
1518 return err;
1519}
1520
f8d59f78
BA		 1521/**
1522 * e1000_request_irq - initialize interrupts
1523 *
1524 * Attempts to configure interrupts using the best available
1525 * capabilities of the hardware and kernel.
1526 **/
bc7f75fa
AK		 1527static int e1000_request_irq(struct e1000_adapter *adapter)
1528{
1529 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1530 int err;
1531
4662e82b
BA		 1532 if (adapter->msix_entries) {
1533 err = e1000_request_msix(adapter);
1534 if (!err)
1535 return err;
1536 /* fall back to MSI */
1537 e1000e_reset_interrupt_capability(adapter);
1538 adapter->int_mode = E1000E_INT_MODE_MSI;
1539 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1540 }
4662e82b
BA		 1541 if (adapter->flags & FLAG_MSI_ENABLED) {
1542 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, 0,
1543 netdev->name, netdev);
1544 if (!err)
1545 return err;
bc7f75fa 1546
4662e82b
BA		 1547 /* fall back to legacy interrupt */
1548 e1000e_reset_interrupt_capability(adapter);
1549 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1550 }
1551
4662e82b
BA		 1552 err = request_irq(adapter->pdev->irq, &e1000_intr, IRQF_SHARED,
1553 netdev->name, netdev);
1554 if (err)
1555 e_err("Unable to allocate interrupt, Error: %d\n", err);
1556
bc7f75fa
AK		 1557 return err;
1558}
1559
1560static void e1000_free_irq(struct e1000_adapter *adapter)
1561{
1562 struct net_device *netdev = adapter->netdev;
1563
4662e82b
BA		 1564 if (adapter->msix_entries) {
1565 int vector = 0;
1566
1567 free_irq(adapter->msix_entries[vector].vector, netdev);
1568 vector++;
1569
1570 free_irq(adapter->msix_entries[vector].vector, netdev);
1571 vector++;
1572
1573 /* Other Causes interrupt vector */
1574 free_irq(adapter->msix_entries[vector].vector, netdev);
1575 return;
bc7f75fa 1576 }
4662e82b
BA		 1577
1578 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1579}
1580
1581/**
1582 * e1000_irq_disable - Mask off interrupt generation on the NIC
1583 **/
1584static void e1000_irq_disable(struct e1000_adapter *adapter)
1585{
1586 struct e1000_hw *hw = &adapter->hw;
1587
bc7f75fa 1588 ew32(IMC, ~0);
4662e82b
BA		 1589 if (adapter->msix_entries)
1590 ew32(EIAC_82574, 0);
bc7f75fa
AK		 1591 e1e_flush();
1592 synchronize_irq(adapter->pdev->irq);
1593}
1594
1595/**
1596 * e1000_irq_enable - Enable default interrupt generation settings
1597 **/
1598static void e1000_irq_enable(struct e1000_adapter *adapter)
1599{
1600 struct e1000_hw *hw = &adapter->hw;
1601
4662e82b
BA		 1602 if (adapter->msix_entries) {
1603 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1604 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1605 } else {
1606 ew32(IMS, IMS_ENABLE_MASK);
1607 }
74ef9c39 1608 e1e_flush();
bc7f75fa
AK		 1609}
1610
1611/**
1612 * e1000_get_hw_control - get control of the h/w from f/w
1613 * @adapter: address of board private structure
1614 *
489815ce 1615 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1616 * For ASF and Pass Through versions of f/w this means that
1617 * the driver is loaded. For AMT version (only with 82573)
1618 * of the f/w this means that the network i/f is open.
1619 **/
1620static void e1000_get_hw_control(struct e1000_adapter *adapter)
1621{
1622 struct e1000_hw *hw = &adapter->hw;
1623 u32 ctrl_ext;
1624 u32 swsm;
1625
1626 /* Let firmware know the driver has taken over */
1627 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1628 swsm = er32(SWSM);
1629 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1630 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1631 ctrl_ext = er32(CTRL_EXT);
ad68076e 1632 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1633 }
1634}
1635
1636/**
1637 * e1000_release_hw_control - release control of the h/w to f/w
1638 * @adapter: address of board private structure
1639 *
489815ce 1640 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1641 * For ASF and Pass Through versions of f/w this means that the
1642 * driver is no longer loaded. For AMT version (only with 82573) i
1643 * of the f/w this means that the network i/f is closed.
1644 *
1645 **/
1646static void e1000_release_hw_control(struct e1000_adapter *adapter)
1647{
1648 struct e1000_hw *hw = &adapter->hw;
1649 u32 ctrl_ext;
1650 u32 swsm;
1651
1652 /* Let firmware taken over control of h/w */
1653 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1654 swsm = er32(SWSM);
1655 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1656 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1657 ctrl_ext = er32(CTRL_EXT);
ad68076e 1658 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1659 }
1660}
1661
bc7f75fa
AK		 1662/**
1663 * @e1000_alloc_ring - allocate memory for a ring structure
1664 **/
1665static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1666 struct e1000_ring *ring)
1667{
1668 struct pci_dev *pdev = adapter->pdev;
1669
1670 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1671 GFP_KERNEL);
1672 if (!ring->desc)
1673 return -ENOMEM;
1674
1675 return 0;
1676}
1677
1678/**
1679 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1680 * @adapter: board private structure
1681 *
1682 * Return 0 on success, negative on failure
1683 **/
1684int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1685{
1686 struct e1000_ring *tx_ring = adapter->tx_ring;
1687 int err = -ENOMEM, size;
1688
1689 size = sizeof(struct e1000_buffer) * tx_ring->count;
1690 tx_ring->buffer_info = vmalloc(size);
1691 if (!tx_ring->buffer_info)
1692 goto err;
1693 memset(tx_ring->buffer_info, 0, size);
1694
1695 /* round up to nearest 4K */
1696 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1697 tx_ring->size = ALIGN(tx_ring->size, 4096);
1698
1699 err = e1000_alloc_ring_dma(adapter, tx_ring);
1700 if (err)
1701 goto err;
1702
1703 tx_ring->next_to_use = 0;
1704 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 1705
1706 return 0;
1707err:
1708 vfree(tx_ring->buffer_info);
44defeb3 1709 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1710 return err;
1711}
1712
1713/**
1714 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1715 * @adapter: board private structure
1716 *
1717 * Returns 0 on success, negative on failure
1718 **/
1719int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1720{
1721 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 1722 struct e1000_buffer *buffer_info;
1723 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 1724
1725 size = sizeof(struct e1000_buffer) * rx_ring->count;
1726 rx_ring->buffer_info = vmalloc(size);
1727 if (!rx_ring->buffer_info)
1728 goto err;
1729 memset(rx_ring->buffer_info, 0, size);
1730
47f44e40
AK		 1731 for (i = 0; i < rx_ring->count; i++) {
1732 buffer_info = &rx_ring->buffer_info[i];
1733 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1734 sizeof(struct e1000_ps_page),
1735 GFP_KERNEL);
1736 if (!buffer_info->ps_pages)
1737 goto err_pages;
1738 }
bc7f75fa
AK		 1739
1740 desc_len = sizeof(union e1000_rx_desc_packet_split);
1741
1742 /* Round up to nearest 4K */
1743 rx_ring->size = rx_ring->count * desc_len;
1744 rx_ring->size = ALIGN(rx_ring->size, 4096);
1745
1746 err = e1000_alloc_ring_dma(adapter, rx_ring);
1747 if (err)
47f44e40 1748 goto err_pages;
bc7f75fa
AK		 1749
1750 rx_ring->next_to_clean = 0;
1751 rx_ring->next_to_use = 0;
1752 rx_ring->rx_skb_top = NULL;
1753
1754 return 0;
47f44e40
AK		 1755
1756err_pages:
1757 for (i = 0; i < rx_ring->count; i++) {
1758 buffer_info = &rx_ring->buffer_info[i];
1759 kfree(buffer_info->ps_pages);
1760 }
bc7f75fa
AK		 1761err:
1762 vfree(rx_ring->buffer_info);
44defeb3 1763 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1764 return err;
1765}
1766
1767/**
1768 * e1000_clean_tx_ring - Free Tx Buffers
1769 * @adapter: board private structure
1770 **/
1771static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1772{
1773 struct e1000_ring *tx_ring = adapter->tx_ring;
1774 struct e1000_buffer *buffer_info;
1775 unsigned long size;
1776 unsigned int i;
1777
1778 for (i = 0; i < tx_ring->count; i++) {
1779 buffer_info = &tx_ring->buffer_info[i];
1780 e1000_put_txbuf(adapter, buffer_info);
1781 }
1782
1783 size = sizeof(struct e1000_buffer) * tx_ring->count;
1784 memset(tx_ring->buffer_info, 0, size);
1785
1786 memset(tx_ring->desc, 0, tx_ring->size);
1787
1788 tx_ring->next_to_use = 0;
1789 tx_ring->next_to_clean = 0;
1790
1791 writel(0, adapter->hw.hw_addr + tx_ring->head);
1792 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1793}
1794
1795/**
1796 * e1000e_free_tx_resources - Free Tx Resources per Queue
1797 * @adapter: board private structure
1798 *
1799 * Free all transmit software resources
1800 **/
1801void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1802{
1803 struct pci_dev *pdev = adapter->pdev;
1804 struct e1000_ring *tx_ring = adapter->tx_ring;
1805
1806 e1000_clean_tx_ring(adapter);
1807
1808 vfree(tx_ring->buffer_info);
1809 tx_ring->buffer_info = NULL;
1810
1811 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1812 tx_ring->dma);
1813 tx_ring->desc = NULL;
1814}
1815
1816/**
1817 * e1000e_free_rx_resources - Free Rx Resources
1818 * @adapter: board private structure
1819 *
1820 * Free all receive software resources
1821 **/
1822
1823void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1824{
1825 struct pci_dev *pdev = adapter->pdev;
1826 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1827 int i;
bc7f75fa
AK		 1828
1829 e1000_clean_rx_ring(adapter);
1830
47f44e40
AK		 1831 for (i = 0; i < rx_ring->count; i++) {
1832 kfree(rx_ring->buffer_info[i].ps_pages);
1833 }
1834
bc7f75fa
AK		 1835 vfree(rx_ring->buffer_info);
1836 rx_ring->buffer_info = NULL;
1837
bc7f75fa
AK		 1838 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1839 rx_ring->dma);
1840 rx_ring->desc = NULL;
1841}
1842
1843/**
1844 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 1845 * @adapter: pointer to adapter
1846 * @itr_setting: current adapter->itr
1847 * @packets: the number of packets during this measurement interval
1848 * @bytes: the number of bytes during this measurement interval
1849 *
bc7f75fa
AK		 1850 * Stores a new ITR value based on packets and byte
1851 * counts during the last interrupt. The advantage of per interrupt
1852 * computation is faster updates and more accurate ITR for the current
1853 * traffic pattern. Constants in this function were computed
1854 * based on theoretical maximum wire speed and thresholds were set based
1855 * on testing data as well as attempting to minimize response time
4662e82b
BA		 1856 * while increasing bulk throughput. This functionality is controlled
1857 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 1858 **/
1859static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1860 u16 itr_setting, int packets,
1861 int bytes)
1862{
1863 unsigned int retval = itr_setting;
1864
1865 if (packets == 0)
1866 goto update_itr_done;
1867
1868 switch (itr_setting) {
1869 case lowest_latency:
1870 /* handle TSO and jumbo frames */
1871 if (bytes/packets > 8000)
1872 retval = bulk_latency;
1873 else if ((packets < 5) && (bytes > 512)) {
1874 retval = low_latency;
1875 }
1876 break;
1877 case low_latency: /* 50 usec aka 20000 ints/s */
1878 if (bytes > 10000) {
1879 /* this if handles the TSO accounting */
1880 if (bytes/packets > 8000) {
1881 retval = bulk_latency;
1882 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1883 retval = bulk_latency;
1884 } else if ((packets > 35)) {
1885 retval = lowest_latency;
1886 }
1887 } else if (bytes/packets > 2000) {
1888 retval = bulk_latency;
1889 } else if (packets <= 2 && bytes < 512) {
1890 retval = lowest_latency;
1891 }
1892 break;
1893 case bulk_latency: /* 250 usec aka 4000 ints/s */
1894 if (bytes > 25000) {
1895 if (packets > 35) {
1896 retval = low_latency;
1897 }
1898 } else if (bytes < 6000) {
1899 retval = low_latency;
1900 }
1901 break;
1902 }
1903
1904update_itr_done:
1905 return retval;
1906}
1907
1908static void e1000_set_itr(struct e1000_adapter *adapter)
1909{
1910 struct e1000_hw *hw = &adapter->hw;
1911 u16 current_itr;
1912 u32 new_itr = adapter->itr;
1913
1914 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1915 if (adapter->link_speed != SPEED_1000) {
1916 current_itr = 0;
1917 new_itr = 4000;
1918 goto set_itr_now;
1919 }
1920
1921 adapter->tx_itr = e1000_update_itr(adapter,
1922 adapter->tx_itr,
1923 adapter->total_tx_packets,
1924 adapter->total_tx_bytes);
1925 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1926 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1927 adapter->tx_itr = low_latency;
1928
1929 adapter->rx_itr = e1000_update_itr(adapter,
1930 adapter->rx_itr,
1931 adapter->total_rx_packets,
1932 adapter->total_rx_bytes);
1933 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1934 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1935 adapter->rx_itr = low_latency;
1936
1937 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1938
1939 switch (current_itr) {
1940 /* counts and packets in update_itr are dependent on these numbers */
1941 case lowest_latency:
1942 new_itr = 70000;
1943 break;
1944 case low_latency:
1945 new_itr = 20000; /* aka hwitr = ~200 */
1946 break;
1947 case bulk_latency:
1948 new_itr = 4000;
1949 break;
1950 default:
1951 break;
1952 }
1953
1954set_itr_now:
1955 if (new_itr != adapter->itr) {
ad68076e
BA		 1956 /*
1957 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1958 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 1959 * increasing
1960 */
bc7f75fa
AK		 1961 new_itr = new_itr > adapter->itr ?
1962 min(adapter->itr + (new_itr >> 2), new_itr) :
1963 new_itr;
1964 adapter->itr = new_itr;
4662e82b
BA		 1965 adapter->rx_ring->itr_val = new_itr;
1966 if (adapter->msix_entries)
1967 adapter->rx_ring->set_itr = 1;
1968 else
1969 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 1970 }
1971}
1972
4662e82b
BA		 1973/**
1974 * e1000_alloc_queues - Allocate memory for all rings
1975 * @adapter: board private structure to initialize
1976 **/
1977static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1978{
1979 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1980 if (!adapter->tx_ring)
1981 goto err;
1982
1983 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1984 if (!adapter->rx_ring)
1985 goto err;
1986
1987 return 0;
1988err:
1989 e_err("Unable to allocate memory for queues\n");
1990 kfree(adapter->rx_ring);
1991 kfree(adapter->tx_ring);
1992 return -ENOMEM;
1993}
1994
bc7f75fa
AK		 1995/**
1996 * e1000_clean - NAPI Rx polling callback
ad68076e 1997 * @napi: struct associated with this polling callback
489815ce 1998 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 1999 **/
2000static int e1000_clean(struct napi_struct *napi, int budget)
2001{
2002 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2003 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2004 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 2005 int tx_cleaned = 0, work_done = 0;
bc7f75fa 2006
4cf1653a 2007 adapter = netdev_priv(poll_dev);
bc7f75fa 2008
4662e82b
BA		 2009 if (adapter->msix_entries &&
2010 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2011 goto clean_rx;
2012
92af3e95 2013 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2014
4662e82b 2015clean_rx:
bc7f75fa 2016 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6
DM		 2017
2018 if (tx_cleaned)
2019 work_done = budget;
bc7f75fa 2020
53e52c72
DM		 2021 /* If budget not fully consumed, exit the polling mode */
2022 if (work_done < budget) {
bc7f75fa
AK		 2023 if (adapter->itr_setting & 3)
2024 e1000_set_itr(adapter);
288379f0 2025 napi_complete(napi);
4662e82b
BA		 2026 if (adapter->msix_entries)
2027 ew32(IMS, adapter->rx_ring->ims_val);
2028 else
2029 e1000_irq_enable(adapter);
bc7f75fa
AK		 2030 }
2031
2032 return work_done;
2033}
2034
2035static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2036{
2037 struct e1000_adapter *adapter = netdev_priv(netdev);
2038 struct e1000_hw *hw = &adapter->hw;
2039 u32 vfta, index;
2040
2041 /* don't update vlan cookie if already programmed */
2042 if ((adapter->hw.mng_cookie.status &
2043 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2044 (vid == adapter->mng_vlan_id))
2045 return;
2046 /* add VID to filter table */
2047 index = (vid >> 5) & 0x7F;
2048 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2049 vfta |= (1 << (vid & 0x1F));
2050 e1000e_write_vfta(hw, index, vfta);
2051}
2052
2053static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2054{
2055 struct e1000_adapter *adapter = netdev_priv(netdev);
2056 struct e1000_hw *hw = &adapter->hw;
2057 u32 vfta, index;
2058
74ef9c39
JB		 2059 if (!test_bit(__E1000_DOWN, &adapter->state))
2060 e1000_irq_disable(adapter);
bc7f75fa 2061 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2062
2063 if (!test_bit(__E1000_DOWN, &adapter->state))
2064 e1000_irq_enable(adapter);
bc7f75fa
AK		 2065
2066 if ((adapter->hw.mng_cookie.status &
2067 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2068 (vid == adapter->mng_vlan_id)) {
2069 /* release control to f/w */
2070 e1000_release_hw_control(adapter);
2071 return;
2072 }
2073
2074 /* remove VID from filter table */
2075 index = (vid >> 5) & 0x7F;
2076 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2077 vfta &= ~(1 << (vid & 0x1F));
2078 e1000e_write_vfta(hw, index, vfta);
2079}
2080
2081static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2082{
2083 struct net_device *netdev = adapter->netdev;
2084 u16 vid = adapter->hw.mng_cookie.vlan_id;
2085 u16 old_vid = adapter->mng_vlan_id;
2086
2087 if (!adapter->vlgrp)
2088 return;
2089
2090 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2091 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2092 if (adapter->hw.mng_cookie.status &
2093 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2094 e1000_vlan_rx_add_vid(netdev, vid);
2095 adapter->mng_vlan_id = vid;
2096 }
2097
2098 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2099 (vid != old_vid) &&
2100 !vlan_group_get_device(adapter->vlgrp, old_vid))
2101 e1000_vlan_rx_kill_vid(netdev, old_vid);
2102 } else {
2103 adapter->mng_vlan_id = vid;
2104 }
2105}
2106
2107
2108static void e1000_vlan_rx_register(struct net_device *netdev,
2109 struct vlan_group *grp)
2110{
2111 struct e1000_adapter *adapter = netdev_priv(netdev);
2112 struct e1000_hw *hw = &adapter->hw;
2113 u32 ctrl, rctl;
2114
74ef9c39
JB		 2115 if (!test_bit(__E1000_DOWN, &adapter->state))
2116 e1000_irq_disable(adapter);
bc7f75fa
AK		 2117 adapter->vlgrp = grp;
2118
2119 if (grp) {
2120 /* enable VLAN tag insert/strip */
2121 ctrl = er32(CTRL);
2122 ctrl |= E1000_CTRL_VME;
2123 ew32(CTRL, ctrl);
2124
2125 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2126 /* enable VLAN receive filtering */
2127 rctl = er32(RCTL);
bc7f75fa
AK		 2128 rctl &= ~E1000_RCTL_CFIEN;
2129 ew32(RCTL, rctl);
2130 e1000_update_mng_vlan(adapter);
2131 }
2132 } else {
2133 /* disable VLAN tag insert/strip */
2134 ctrl = er32(CTRL);
2135 ctrl &= ~E1000_CTRL_VME;
2136 ew32(CTRL, ctrl);
2137
2138 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2139 if (adapter->mng_vlan_id !=
2140 (u16)E1000_MNG_VLAN_NONE) {
2141 e1000_vlan_rx_kill_vid(netdev,
2142 adapter->mng_vlan_id);
2143 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2144 }
2145 }
2146 }
2147
74ef9c39
JB		 2148 if (!test_bit(__E1000_DOWN, &adapter->state))
2149 e1000_irq_enable(adapter);
bc7f75fa
AK		 2150}
2151
2152static void e1000_restore_vlan(struct e1000_adapter *adapter)
2153{
2154 u16 vid;
2155
2156 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2157
2158 if (!adapter->vlgrp)
2159 return;
2160
2161 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2162 if (!vlan_group_get_device(adapter->vlgrp, vid))
2163 continue;
2164 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2165 }
2166}
2167
2168static void e1000_init_manageability(struct e1000_adapter *adapter)
2169{
2170 struct e1000_hw *hw = &adapter->hw;
2171 u32 manc, manc2h;
2172
2173 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2174 return;
2175
2176 manc = er32(MANC);
2177
ad68076e
BA		 2178 /*
2179 * enable receiving management packets to the host. this will probably
bc7f75fa 2180 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2181 * the packets will be handled on SMBUS
2182 */
bc7f75fa
AK		 2183 manc |= E1000_MANC_EN_MNG2HOST;
2184 manc2h = er32(MANC2H);
2185#define E1000_MNG2HOST_PORT_623 (1 << 5)
2186#define E1000_MNG2HOST_PORT_664 (1 << 6)
2187 manc2h |= E1000_MNG2HOST_PORT_623;
2188 manc2h |= E1000_MNG2HOST_PORT_664;
2189 ew32(MANC2H, manc2h);
2190 ew32(MANC, manc);
2191}
2192
2193/**
2194 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2195 * @adapter: board private structure
2196 *
2197 * Configure the Tx unit of the MAC after a reset.
2198 **/
2199static void e1000_configure_tx(struct e1000_adapter *adapter)
2200{
2201 struct e1000_hw *hw = &adapter->hw;
2202 struct e1000_ring *tx_ring = adapter->tx_ring;
2203 u64 tdba;
2204 u32 tdlen, tctl, tipg, tarc;
2205 u32 ipgr1, ipgr2;
2206
2207 /* Setup the HW Tx Head and Tail descriptor pointers */
2208 tdba = tx_ring->dma;
2209 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2210 ew32(TDBAL, (tdba & DMA_32BIT_MASK));
2211 ew32(TDBAH, (tdba >> 32));
2212 ew32(TDLEN, tdlen);
2213 ew32(TDH, 0);
2214 ew32(TDT, 0);
2215 tx_ring->head = E1000_TDH;
2216 tx_ring->tail = E1000_TDT;
2217
2218 /* Set the default values for the Tx Inter Packet Gap timer */
2219 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2220 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2221 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2222
2223 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2224 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2225
2226 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2227 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2228 ew32(TIPG, tipg);
2229
2230 /* Set the Tx Interrupt Delay register */
2231 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2232 /* Tx irq moderation */
bc7f75fa
AK		 2233 ew32(TADV, adapter->tx_abs_int_delay);
2234
2235 /* Program the Transmit Control Register */
2236 tctl = er32(TCTL);
2237 tctl &= ~E1000_TCTL_CT;
2238 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2239 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2240
2241 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2242 tarc = er32(TARC(0));
ad68076e
BA		 2243 /*
2244 * set the speed mode bit, we'll clear it if we're not at
2245 * gigabit link later
2246 */
bc7f75fa
AK		 2247#define SPEED_MODE_BIT (1 << 21)
2248 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2249 ew32(TARC(0), tarc);
bc7f75fa
AK		 2250 }
2251
2252 /* errata: program both queues to unweighted RR */
2253 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2254 tarc = er32(TARC(0));
bc7f75fa 2255 tarc |= 1;
e9ec2c0f
JK		 2256 ew32(TARC(0), tarc);
2257 tarc = er32(TARC(1));
bc7f75fa 2258 tarc |= 1;
e9ec2c0f 2259 ew32(TARC(1), tarc);
bc7f75fa
AK		 2260 }
2261
2262 e1000e_config_collision_dist(hw);
2263
2264 /* Setup Transmit Descriptor Settings for eop descriptor */
2265 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2266
2267 /* only set IDE if we are delaying interrupts using the timers */
2268 if (adapter->tx_int_delay)
2269 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2270
2271 /* enable Report Status bit */
2272 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2273
2274 ew32(TCTL, tctl);
2275
2276 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
2277}
2278
2279/**
2280 * e1000_setup_rctl - configure the receive control registers
2281 * @adapter: Board private structure
2282 **/
2283#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2284 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2285static void e1000_setup_rctl(struct e1000_adapter *adapter)
2286{
2287 struct e1000_hw *hw = &adapter->hw;
2288 u32 rctl, rfctl;
2289 u32 psrctl = 0;
2290 u32 pages = 0;
2291
2292 /* Program MC offset vector base */
2293 rctl = er32(RCTL);
2294 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2295 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2296 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2297 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2298
2299 /* Do not Store bad packets */
2300 rctl &= ~E1000_RCTL_SBP;
2301
2302 /* Enable Long Packet receive */
2303 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2304 rctl &= ~E1000_RCTL_LPE;
2305 else
2306 rctl |= E1000_RCTL_LPE;
2307
eb7c3adb
JK		 2308 /* Some systems expect that the CRC is included in SMBUS traffic. The
2309 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2310 * host memory when this is enabled
2311 */
2312 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2313 rctl |= E1000_RCTL_SECRC;
5918bd88 2314
bc7f75fa
AK		 2315 /* Setup buffer sizes */
2316 rctl &= ~E1000_RCTL_SZ_4096;
2317 rctl |= E1000_RCTL_BSEX;
2318 switch (adapter->rx_buffer_len) {
2319 case 256:
2320 rctl |= E1000_RCTL_SZ_256;
2321 rctl &= ~E1000_RCTL_BSEX;
2322 break;
2323 case 512:
2324 rctl |= E1000_RCTL_SZ_512;
2325 rctl &= ~E1000_RCTL_BSEX;
2326 break;
2327 case 1024:
2328 rctl |= E1000_RCTL_SZ_1024;
2329 rctl &= ~E1000_RCTL_BSEX;
2330 break;
2331 case 2048:
2332 default:
2333 rctl |= E1000_RCTL_SZ_2048;
2334 rctl &= ~E1000_RCTL_BSEX;
2335 break;
2336 case 4096:
2337 rctl |= E1000_RCTL_SZ_4096;
2338 break;
2339 case 8192:
2340 rctl |= E1000_RCTL_SZ_8192;
2341 break;
2342 case 16384:
2343 rctl |= E1000_RCTL_SZ_16384;
2344 break;
2345 }
2346
2347 /*
2348 * 82571 and greater support packet-split where the protocol
2349 * header is placed in skb->data and the packet data is
2350 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2351 * In the case of a non-split, skb->data is linearly filled,
2352 * followed by the page buffers. Therefore, skb->data is
2353 * sized to hold the largest protocol header.
2354 *
2355 * allocations using alloc_page take too long for regular MTU
2356 * so only enable packet split for jumbo frames
2357 *
2358 * Using pages when the page size is greater than 16k wastes
2359 * a lot of memory, since we allocate 3 pages at all times
2360 * per packet.
2361 */
bc7f75fa 2362 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA		 2363 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2364 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2365 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2366 else
2367 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2368
2369 if (adapter->rx_ps_pages) {
2370 /* Configure extra packet-split registers */
2371 rfctl = er32(RFCTL);
2372 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2373 /*
2374 * disable packet split support for IPv6 extension headers,
2375 * because some malformed IPv6 headers can hang the Rx
2376 */
bc7f75fa
AK		 2377 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2378 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2379
2380 ew32(RFCTL, rfctl);
2381
140a7480
AK		 2382 /* Enable Packet split descriptors */
2383 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2384
2385 psrctl |= adapter->rx_ps_bsize0 >>
2386 E1000_PSRCTL_BSIZE0_SHIFT;
2387
2388 switch (adapter->rx_ps_pages) {
2389 case 3:
2390 psrctl |= PAGE_SIZE <<
2391 E1000_PSRCTL_BSIZE3_SHIFT;
2392 case 2:
2393 psrctl |= PAGE_SIZE <<
2394 E1000_PSRCTL_BSIZE2_SHIFT;
2395 case 1:
2396 psrctl |= PAGE_SIZE >>
2397 E1000_PSRCTL_BSIZE1_SHIFT;
2398 break;
2399 }
2400
2401 ew32(PSRCTL, psrctl);
2402 }
2403
2404 ew32(RCTL, rctl);
318a94d6
JK		 2405 /* just started the receive unit, no need to restart */
2406 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2407}
2408
2409/**
2410 * e1000_configure_rx - Configure Receive Unit after Reset
2411 * @adapter: board private structure
2412 *
2413 * Configure the Rx unit of the MAC after a reset.
2414 **/
2415static void e1000_configure_rx(struct e1000_adapter *adapter)
2416{
2417 struct e1000_hw *hw = &adapter->hw;
2418 struct e1000_ring *rx_ring = adapter->rx_ring;
2419 u64 rdba;
2420 u32 rdlen, rctl, rxcsum, ctrl_ext;
2421
2422 if (adapter->rx_ps_pages) {
2423 /* this is a 32 byte descriptor */
2424 rdlen = rx_ring->count *
2425 sizeof(union e1000_rx_desc_packet_split);
2426 adapter->clean_rx = e1000_clean_rx_irq_ps;
2427 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2428 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2429 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2430 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2431 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2432 } else {
97ac8cae 2433 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2434 adapter->clean_rx = e1000_clean_rx_irq;
2435 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2436 }
2437
2438 /* disable receives while setting up the descriptors */
2439 rctl = er32(RCTL);
2440 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2441 e1e_flush();
2442 msleep(10);
2443
2444 /* set the Receive Delay Timer Register */
2445 ew32(RDTR, adapter->rx_int_delay);
2446
2447 /* irq moderation */
2448 ew32(RADV, adapter->rx_abs_int_delay);
2449 if (adapter->itr_setting != 0)
ad68076e 2450 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2451
2452 ctrl_ext = er32(CTRL_EXT);
2453 /* Reset delay timers after every interrupt */
2454 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2455 /* Auto-Mask interrupts upon ICR access */
2456 ctrl_ext |= E1000_CTRL_EXT_IAME;
2457 ew32(IAM, 0xffffffff);
2458 ew32(CTRL_EXT, ctrl_ext);
2459 e1e_flush();
2460
ad68076e
BA		 2461 /*
2462 * Setup the HW Rx Head and Tail Descriptor Pointers and
2463 * the Base and Length of the Rx Descriptor Ring
2464 */
bc7f75fa
AK		 2465 rdba = rx_ring->dma;
2466 ew32(RDBAL, (rdba & DMA_32BIT_MASK));
2467 ew32(RDBAH, (rdba >> 32));
2468 ew32(RDLEN, rdlen);
2469 ew32(RDH, 0);
2470 ew32(RDT, 0);
2471 rx_ring->head = E1000_RDH;
2472 rx_ring->tail = E1000_RDT;
2473
2474 /* Enable Receive Checksum Offload for TCP and UDP */
2475 rxcsum = er32(RXCSUM);
2476 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2477 rxcsum |= E1000_RXCSUM_TUOFL;
2478
ad68076e
BA		 2479 /*
2480 * IPv4 payload checksum for UDP fragments must be
2481 * used in conjunction with packet-split.
2482 */
bc7f75fa
AK		 2483 if (adapter->rx_ps_pages)
2484 rxcsum |= E1000_RXCSUM_IPPCSE;
2485 } else {
2486 rxcsum &= ~E1000_RXCSUM_TUOFL;
2487 /* no need to clear IPPCSE as it defaults to 0 */
2488 }
2489 ew32(RXCSUM, rxcsum);
2490
ad68076e
BA		 2491 /*
2492 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2493 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2494 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2495 */
bc7f75fa 2496 if ((adapter->flags & FLAG_HAS_ERT) &&
97ac8cae
BA		 2497 (adapter->netdev->mtu > ETH_DATA_LEN)) {
2498 u32 rxdctl = er32(RXDCTL(0));
2499 ew32(RXDCTL(0), rxdctl | 0x3);
2500 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2501 /*
2502 * With jumbo frames and early-receive enabled, excessive
2503 * C4->C2 latencies result in dropped transactions.
2504 */
2505 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2506 e1000e_driver_name, 55);
2507 } else {
2508 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2509 e1000e_driver_name,
2510 PM_QOS_DEFAULT_VALUE);
2511 }
bc7f75fa
AK		 2512
2513 /* Enable Receives */
2514 ew32(RCTL, rctl);
2515}
2516
2517/**
e2de3eb6 2518 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2519 * @hw: pointer to the HW structure
2520 * @mc_addr_list: array of multicast addresses to program
2521 * @mc_addr_count: number of multicast addresses to program
2522 * @rar_used_count: the first RAR register free to program
2523 * @rar_count: total number of supported Receive Address Registers
2524 *
2525 * Updates the Receive Address Registers and Multicast Table Array.
2526 * The caller must have a packed mc_addr_list of multicast addresses.
2527 * The parameter rar_count will usually be hw->mac.rar_entry_count
2528 * unless there are workarounds that change this. Currently no func pointer
2529 * exists and all implementations are handled in the generic version of this
2530 * function.
2531 **/
e2de3eb6
JK		 2532static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
2533 u32 mc_addr_count, u32 rar_used_count,
2534 u32 rar_count)
bc7f75fa 2535{
e2de3eb6 2536 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count,
bc7f75fa
AK		 2537 rar_used_count, rar_count);
2538}
2539
2540/**
2541 * e1000_set_multi - Multicast and Promiscuous mode set
2542 * @netdev: network interface device structure
2543 *
2544 * The set_multi entry point is called whenever the multicast address
2545 * list or the network interface flags are updated. This routine is
2546 * responsible for configuring the hardware for proper multicast,
2547 * promiscuous mode, and all-multi behavior.
2548 **/
2549static void e1000_set_multi(struct net_device *netdev)
2550{
2551 struct e1000_adapter *adapter = netdev_priv(netdev);
2552 struct e1000_hw *hw = &adapter->hw;
2553 struct e1000_mac_info *mac = &hw->mac;
2554 struct dev_mc_list *mc_ptr;
2555 u8 *mta_list;
2556 u32 rctl;
2557 int i;
2558
2559 /* Check for Promiscuous and All Multicast modes */
2560
2561 rctl = er32(RCTL);
2562
2563 if (netdev->flags & IFF_PROMISC) {
2564 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2565 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2566 } else {
746b9f02
PM		 2567 if (netdev->flags & IFF_ALLMULTI) {
2568 rctl |= E1000_RCTL_MPE;
2569 rctl &= ~E1000_RCTL_UPE;
2570 } else {
2571 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2572 }
78ed11a5 2573 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2574 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2575 }
2576
2577 ew32(RCTL, rctl);
2578
2579 if (netdev->mc_count) {
2580 mta_list = kmalloc(netdev->mc_count * 6, GFP_ATOMIC);
2581 if (!mta_list)
2582 return;
2583
2584 /* prepare a packed array of only addresses. */
2585 mc_ptr = netdev->mc_list;
2586
2587 for (i = 0; i < netdev->mc_count; i++) {
2588 if (!mc_ptr)
2589 break;
2590 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr,
2591 ETH_ALEN);
2592 mc_ptr = mc_ptr->next;
2593 }
2594
e2de3eb6 2595 e1000_update_mc_addr_list(hw, mta_list, i, 1,
bc7f75fa
AK		 2596 mac->rar_entry_count);
2597 kfree(mta_list);
2598 } else {
2599 /*
2600 * if we're called from probe, we might not have
2601 * anything to do here, so clear out the list
2602 */
e2de3eb6 2603 e1000_update_mc_addr_list(hw, NULL, 0, 1, mac->rar_entry_count);
bc7f75fa
AK		 2604 }
2605}
2606
2607/**
ad68076e 2608 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 2609 * @adapter: private board structure
2610 **/
2611static void e1000_configure(struct e1000_adapter *adapter)
2612{
2613 e1000_set_multi(adapter->netdev);
2614
2615 e1000_restore_vlan(adapter);
2616 e1000_init_manageability(adapter);
2617
2618 e1000_configure_tx(adapter);
2619 e1000_setup_rctl(adapter);
2620 e1000_configure_rx(adapter);
ad68076e 2621 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 2622}
2623
2624/**
2625 * e1000e_power_up_phy - restore link in case the phy was powered down
2626 * @adapter: address of board private structure
2627 *
2628 * The phy may be powered down to save power and turn off link when the
2629 * driver is unloaded and wake on lan is not enabled (among others)
2630 * *** this routine MUST be followed by a call to e1000e_reset ***
2631 **/
2632void e1000e_power_up_phy(struct e1000_adapter *adapter)
2633{
2634 u16 mii_reg = 0;
2635
2636 /* Just clear the power down bit to wake the phy back up */
318a94d6 2637 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
ad68076e
BA		 2638 /*
2639 * According to the manual, the phy will retain its
2640 * settings across a power-down/up cycle
2641 */
bc7f75fa
AK		 2642 e1e_rphy(&adapter->hw, PHY_CONTROL, &mii_reg);
2643 mii_reg &= ~MII_CR_POWER_DOWN;
2644 e1e_wphy(&adapter->hw, PHY_CONTROL, mii_reg);
2645 }
2646
2647 adapter->hw.mac.ops.setup_link(&adapter->hw);
2648}
2649
2650/**
2651 * e1000_power_down_phy - Power down the PHY
2652 *
2653 * Power down the PHY so no link is implied when interface is down
2654 * The PHY cannot be powered down is management or WoL is active
2655 */
2656static void e1000_power_down_phy(struct e1000_adapter *adapter)
2657{
2658 struct e1000_hw *hw = &adapter->hw;
2659 u16 mii_reg;
2660
2661 /* WoL is enabled */
23b66e2b 2662 if (adapter->wol)
bc7f75fa
AK		 2663 return;
2664
2665 /* non-copper PHY? */
318a94d6 2666 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 2667 return;
2668
2669 /* reset is blocked because of a SoL/IDER session */
ad68076e 2670 if (e1000e_check_mng_mode(hw) || e1000_check_reset_block(hw))
bc7f75fa
AK		 2671 return;
2672
489815ce 2673 /* manageability (AMT) is enabled */
bc7f75fa
AK		 2674 if (er32(MANC) & E1000_MANC_SMBUS_EN)
2675 return;
2676
2677 /* power down the PHY */
2678 e1e_rphy(hw, PHY_CONTROL, &mii_reg);
2679 mii_reg |= MII_CR_POWER_DOWN;
2680 e1e_wphy(hw, PHY_CONTROL, mii_reg);
2681 mdelay(1);
2682}
2683
2684/**
2685 * e1000e_reset - bring the hardware into a known good state
2686 *
2687 * This function boots the hardware and enables some settings that
2688 * require a configuration cycle of the hardware - those cannot be
2689 * set/changed during runtime. After reset the device needs to be
ad68076e 2690 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 2691 */
2692void e1000e_reset(struct e1000_adapter *adapter)
2693{
2694 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2695 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 2696 struct e1000_hw *hw = &adapter->hw;
2697 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2698 u32 pba = adapter->pba;
bc7f75fa
AK		 2699 u16 hwm;
2700
ad68076e 2701 /* reset Packet Buffer Allocation to default */
318a94d6 2702 ew32(PBA, pba);
df762464 2703
318a94d6 2704 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 2705 /*
2706 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 2707 * large enough to accommodate two full transmit packets,
2708 * rounded up to the next 1KB and expressed in KB. Likewise,
2709 * the Rx FIFO should be large enough to accommodate at least
2710 * one full receive packet and is similarly rounded up and
ad68076e
BA		 2711 * expressed in KB.
2712 */
df762464 2713 pba = er32(PBA);
bc7f75fa 2714 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2715 tx_space = pba >> 16;
bc7f75fa 2716 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2717 pba &= 0xffff;
ad68076e
BA		 2718 /*
2719 * the Tx fifo also stores 16 bytes of information about the tx
2720 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 2721 */
2722 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 2723 sizeof(struct e1000_tx_desc) -
2724 ETH_FCS_LEN) * 2;
2725 min_tx_space = ALIGN(min_tx_space, 1024);
2726 min_tx_space >>= 10;
2727 /* software strips receive CRC, so leave room for it */
318a94d6 2728 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 2729 min_rx_space = ALIGN(min_rx_space, 1024);
2730 min_rx_space >>= 10;
2731
ad68076e
BA		 2732 /*
2733 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2734 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 2735 * allocation, take space away from current Rx allocation
2736 */
df762464
AK		 2737 if ((tx_space < min_tx_space) &&
2738 ((min_tx_space - tx_space) < pba)) {
2739 pba -= min_tx_space - tx_space;
bc7f75fa 2740
ad68076e
BA		 2741 /*
2742 * if short on Rx space, Rx wins and must trump tx
2743 * adjustment or use Early Receive if available
2744 */
df762464 2745 if ((pba < min_rx_space) &&
bc7f75fa
AK		 2746 (!(adapter->flags & FLAG_HAS_ERT)))
2747 /* ERT enabled in e1000_configure_rx */
df762464 2748 pba = min_rx_space;
bc7f75fa 2749 }
df762464
AK		 2750
2751 ew32(PBA, pba);
bc7f75fa
AK		 2752 }
2753
bc7f75fa 2754
ad68076e
BA		 2755 /*
2756 * flow control settings
2757 *
2758 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 2759 * (or the size used for early receive) above it in the Rx FIFO.
2760 * Set it to the lower of:
2761 * - 90% of the Rx FIFO size, and
2762 * - the full Rx FIFO size minus the early receive size (for parts
2763 * with ERT support assuming ERT set to E1000_ERT_2048), or
ad68076e
BA		 2764 * - the full Rx FIFO size minus one full frame
2765 */
bc7f75fa 2766 if (adapter->flags & FLAG_HAS_ERT)
318a94d6
JK		 2767 hwm = min(((pba << 10) * 9 / 10),
2768 ((pba << 10) - (E1000_ERT_2048 << 3)));
bc7f75fa 2769 else
318a94d6
JK		 2770 hwm = min(((pba << 10) * 9 / 10),
2771 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 2772
318a94d6
JK		 2773 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */
2774 fc->low_water = fc->high_water - 8;
bc7f75fa
AK		 2775
2776 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2777 fc->pause_time = 0xFFFF;
bc7f75fa 2778 else
318a94d6
JK		 2779 fc->pause_time = E1000_FC_PAUSE_TIME;
2780 fc->send_xon = 1;
5c48ef3e 2781 fc->current_mode = fc->requested_mode;
bc7f75fa
AK		 2782
2783 /* Allow time for pending master requests to run */
2784 mac->ops.reset_hw(hw);
97ac8cae
BA		 2785
2786 /*
2787 * For parts with AMT enabled, let the firmware know
2788 * that the network interface is in control
2789 */
c43bc57e 2790 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 2791 e1000_get_hw_control(adapter);
2792
bc7f75fa
AK		 2793 ew32(WUC, 0);
2794
2795 if (mac->ops.init_hw(hw))
44defeb3 2796 e_err("Hardware Error\n");
bc7f75fa
AK		 2797
2798 e1000_update_mng_vlan(adapter);
2799
2800 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2801 ew32(VET, ETH_P_8021Q);
2802
2803 e1000e_reset_adaptive(hw);
2804 e1000_get_phy_info(hw);
2805
2806 if (!(adapter->flags & FLAG_SMART_POWER_DOWN)) {
2807 u16 phy_data = 0;
ad68076e
BA		 2808 /*
2809 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2810 * the return value of this function because there is nothing
ad68076e
BA		 2811 * different we would do if it failed
2812 */
bc7f75fa
AK		 2813 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2814 phy_data &= ~IGP02E1000_PM_SPD;
2815 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2816 }
bc7f75fa
AK		 2817}
2818
2819int e1000e_up(struct e1000_adapter *adapter)
2820{
2821 struct e1000_hw *hw = &adapter->hw;
2822
2823 /* hardware has been reset, we need to reload some things */
2824 e1000_configure(adapter);
2825
2826 clear_bit(__E1000_DOWN, &adapter->state);
2827
2828 napi_enable(&adapter->napi);
4662e82b
BA		 2829 if (adapter->msix_entries)
2830 e1000_configure_msix(adapter);
bc7f75fa
AK		 2831 e1000_irq_enable(adapter);
2832
2833 /* fire a link change interrupt to start the watchdog */
2834 ew32(ICS, E1000_ICS_LSC);
2835 return 0;
2836}
2837
2838void e1000e_down(struct e1000_adapter *adapter)
2839{
2840 struct net_device *netdev = adapter->netdev;
2841 struct e1000_hw *hw = &adapter->hw;
2842 u32 tctl, rctl;
2843
ad68076e
BA		 2844 /*
2845 * signal that we're down so the interrupt handler does not
2846 * reschedule our watchdog timer
2847 */
bc7f75fa
AK		 2848 set_bit(__E1000_DOWN, &adapter->state);
2849
2850 /* disable receives in the hardware */
2851 rctl = er32(RCTL);
2852 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2853 /* flush and sleep below */
2854
d55b53ff 2855 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK		 2856
2857 /* disable transmits in the hardware */
2858 tctl = er32(TCTL);
2859 tctl &= ~E1000_TCTL_EN;
2860 ew32(TCTL, tctl);
2861 /* flush both disables and wait for them to finish */
2862 e1e_flush();
2863 msleep(10);
2864
2865 napi_disable(&adapter->napi);
2866 e1000_irq_disable(adapter);
2867
2868 del_timer_sync(&adapter->watchdog_timer);
2869 del_timer_sync(&adapter->phy_info_timer);
2870
2871 netdev->tx_queue_len = adapter->tx_queue_len;
2872 netif_carrier_off(netdev);
2873 adapter->link_speed = 0;
2874 adapter->link_duplex = 0;
2875
52cc3086
JK		 2876 if (!pci_channel_offline(adapter->pdev))
2877 e1000e_reset(adapter);
bc7f75fa
AK		 2878 e1000_clean_tx_ring(adapter);
2879 e1000_clean_rx_ring(adapter);
2880
2881 /*
2882 * TODO: for power management, we could drop the link and
2883 * pci_disable_device here.
2884 */
2885}
2886
2887void e1000e_reinit_locked(struct e1000_adapter *adapter)
2888{
2889 might_sleep();
2890 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2891 msleep(1);
2892 e1000e_down(adapter);
2893 e1000e_up(adapter);
2894 clear_bit(__E1000_RESETTING, &adapter->state);
2895}
2896
2897/**
2898 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2899 * @adapter: board private structure to initialize
2900 *
2901 * e1000_sw_init initializes the Adapter private data structure.
2902 * Fields are initialized based on PCI device information and
2903 * OS network device settings (MTU size).
2904 **/
2905static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2906{
bc7f75fa
AK		 2907 struct net_device *netdev = adapter->netdev;
2908
2909 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2910 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 2911 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2912 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 2913
4662e82b 2914 e1000e_set_interrupt_capability(adapter);
bc7f75fa 2915
4662e82b
BA		 2916 if (e1000_alloc_queues(adapter))
2917 return -ENOMEM;
bc7f75fa 2918
bc7f75fa 2919 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 2920 e1000_irq_disable(adapter);
2921
bc7f75fa
AK		 2922 set_bit(__E1000_DOWN, &adapter->state);
2923 return 0;
bc7f75fa
AK		 2924}
2925
f8d59f78
BA		 2926/**
2927 * e1000_intr_msi_test - Interrupt Handler
2928 * @irq: interrupt number
2929 * @data: pointer to a network interface device structure
2930 **/
2931static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2932{
2933 struct net_device *netdev = data;
2934 struct e1000_adapter *adapter = netdev_priv(netdev);
2935 struct e1000_hw *hw = &adapter->hw;
2936 u32 icr = er32(ICR);
2937
2938 e_dbg("%s: icr is %08X\n", netdev->name, icr);
2939 if (icr & E1000_ICR_RXSEQ) {
2940 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2941 wmb();
2942 }
2943
2944 return IRQ_HANDLED;
2945}
2946
2947/**
2948 * e1000_test_msi_interrupt - Returns 0 for successful test
2949 * @adapter: board private struct
2950 *
2951 * code flow taken from tg3.c
2952 **/
2953static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2954{
2955 struct net_device *netdev = adapter->netdev;
2956 struct e1000_hw *hw = &adapter->hw;
2957 int err;
2958
2959 /* poll_enable hasn't been called yet, so don't need disable */
2960 /* clear any pending events */
2961 er32(ICR);
2962
2963 /* free the real vector and request a test handler */
2964 e1000_free_irq(adapter);
4662e82b 2965 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 2966
2967 /* Assume that the test fails, if it succeeds then the test
2968 * MSI irq handler will unset this flag */
2969 adapter->flags |= FLAG_MSI_TEST_FAILED;
2970
2971 err = pci_enable_msi(adapter->pdev);
2972 if (err)
2973 goto msi_test_failed;
2974
2975 err = request_irq(adapter->pdev->irq, &e1000_intr_msi_test, 0,
2976 netdev->name, netdev);
2977 if (err) {
2978 pci_disable_msi(adapter->pdev);
2979 goto msi_test_failed;
2980 }
2981
2982 wmb();
2983
2984 e1000_irq_enable(adapter);
2985
2986 /* fire an unusual interrupt on the test handler */
2987 ew32(ICS, E1000_ICS_RXSEQ);
2988 e1e_flush();
2989 msleep(50);
2990
2991 e1000_irq_disable(adapter);
2992
2993 rmb();
2994
2995 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 2996 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 2997 err = -EIO;
2998 e_info("MSI interrupt test failed!\n");
2999 }
3000
3001 free_irq(adapter->pdev->irq, netdev);
3002 pci_disable_msi(adapter->pdev);
3003
3004 if (err == -EIO)
3005 goto msi_test_failed;
3006
3007 /* okay so the test worked, restore settings */
3008 e_dbg("%s: MSI interrupt test succeeded!\n", netdev->name);
3009msi_test_failed:
4662e82b 3010 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3011 e1000_request_irq(adapter);
3012 return err;
3013}
3014
3015/**
3016 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3017 * @adapter: board private struct
3018 *
3019 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3020 **/
3021static int e1000_test_msi(struct e1000_adapter *adapter)
3022{
3023 int err;
3024 u16 pci_cmd;
3025
3026 if (!(adapter->flags & FLAG_MSI_ENABLED))
3027 return 0;
3028
3029 /* disable SERR in case the MSI write causes a master abort */
3030 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3031 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3032 pci_cmd & ~PCI_COMMAND_SERR);
3033
3034 err = e1000_test_msi_interrupt(adapter);
3035
3036 /* restore previous setting of command word */
3037 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3038
3039 /* success ! */
3040 if (!err)
3041 return 0;
3042
3043 /* EIO means MSI test failed */
3044 if (err != -EIO)
3045 return err;
3046
3047 /* back to INTx mode */
3048 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3049
3050 e1000_free_irq(adapter);
3051
3052 err = e1000_request_irq(adapter);
3053
3054 return err;
3055}
3056
bc7f75fa
AK		 3057/**
3058 * e1000_open - Called when a network interface is made active
3059 * @netdev: network interface device structure
3060 *
3061 * Returns 0 on success, negative value on failure
3062 *
3063 * The open entry point is called when a network interface is made
3064 * active by the system (IFF_UP). At this point all resources needed
3065 * for transmit and receive operations are allocated, the interrupt
3066 * handler is registered with the OS, the watchdog timer is started,
3067 * and the stack is notified that the interface is ready.
3068 **/
3069static int e1000_open(struct net_device *netdev)
3070{
3071 struct e1000_adapter *adapter = netdev_priv(netdev);
3072 struct e1000_hw *hw = &adapter->hw;
3073 int err;
3074
3075 /* disallow open during test */
3076 if (test_bit(__E1000_TESTING, &adapter->state))
3077 return -EBUSY;
3078
3079 /* allocate transmit descriptors */
3080 err = e1000e_setup_tx_resources(adapter);
3081 if (err)
3082 goto err_setup_tx;
3083
3084 /* allocate receive descriptors */
3085 err = e1000e_setup_rx_resources(adapter);
3086 if (err)
3087 goto err_setup_rx;
3088
3089 e1000e_power_up_phy(adapter);
3090
3091 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3092 if ((adapter->hw.mng_cookie.status &
3093 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3094 e1000_update_mng_vlan(adapter);
3095
ad68076e
BA		 3096 /*
3097 * If AMT is enabled, let the firmware know that the network
3098 * interface is now open
3099 */
c43bc57e 3100 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3101 e1000_get_hw_control(adapter);
3102
ad68076e
BA		 3103 /*
3104 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3105 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3106 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3107 * clean_rx handler before we do so.
3108 */
bc7f75fa
AK		 3109 e1000_configure(adapter);
3110
3111 err = e1000_request_irq(adapter);
3112 if (err)
3113 goto err_req_irq;
3114
f8d59f78
BA		 3115 /*
3116 * Work around PCIe errata with MSI interrupts causing some chipsets to
3117 * ignore e1000e MSI messages, which means we need to test our MSI
3118 * interrupt now
3119 */
4662e82b 3120 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3121 err = e1000_test_msi(adapter);
3122 if (err) {
3123 e_err("Interrupt allocation failed\n");
3124 goto err_req_irq;
3125 }
3126 }
3127
bc7f75fa
AK		 3128 /* From here on the code is the same as e1000e_up() */
3129 clear_bit(__E1000_DOWN, &adapter->state);
3130
3131 napi_enable(&adapter->napi);
3132
3133 e1000_irq_enable(adapter);
3134
d55b53ff
JK		 3135 netif_tx_start_all_queues(netdev);
3136
bc7f75fa
AK		 3137 /* fire a link status change interrupt to start the watchdog */
3138 ew32(ICS, E1000_ICS_LSC);
3139
3140 return 0;
3141
3142err_req_irq:
3143 e1000_release_hw_control(adapter);
3144 e1000_power_down_phy(adapter);
3145 e1000e_free_rx_resources(adapter);
3146err_setup_rx:
3147 e1000e_free_tx_resources(adapter);
3148err_setup_tx:
3149 e1000e_reset(adapter);
3150
3151 return err;
3152}
3153
3154/**
3155 * e1000_close - Disables a network interface
3156 * @netdev: network interface device structure
3157 *
3158 * Returns 0, this is not allowed to fail
3159 *
3160 * The close entry point is called when an interface is de-activated
3161 * by the OS. The hardware is still under the drivers control, but
3162 * needs to be disabled. A global MAC reset is issued to stop the
3163 * hardware, and all transmit and receive resources are freed.
3164 **/
3165static int e1000_close(struct net_device *netdev)
3166{
3167 struct e1000_adapter *adapter = netdev_priv(netdev);
3168
3169 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3170 e1000e_down(adapter);
3171 e1000_power_down_phy(adapter);
3172 e1000_free_irq(adapter);
3173
3174 e1000e_free_tx_resources(adapter);
3175 e1000e_free_rx_resources(adapter);
3176
ad68076e
BA		 3177 /*
3178 * kill manageability vlan ID if supported, but not if a vlan with
3179 * the same ID is registered on the host OS (let 8021q kill it)
3180 */
bc7f75fa
AK		 3181 if ((adapter->hw.mng_cookie.status &
3182 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3183 !(adapter->vlgrp &&
3184 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3185 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3186
ad68076e
BA		 3187 /*
3188 * If AMT is enabled, let the firmware know that the network
3189 * interface is now closed
3190 */
c43bc57e 3191 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3192 e1000_release_hw_control(adapter);
3193
3194 return 0;
3195}
3196/**
3197 * e1000_set_mac - Change the Ethernet Address of the NIC
3198 * @netdev: network interface device structure
3199 * @p: pointer to an address structure
3200 *
3201 * Returns 0 on success, negative on failure
3202 **/
3203static int e1000_set_mac(struct net_device *netdev, void *p)
3204{
3205 struct e1000_adapter *adapter = netdev_priv(netdev);
3206 struct sockaddr *addr = p;
3207
3208 if (!is_valid_ether_addr(addr->sa_data))
3209 return -EADDRNOTAVAIL;
3210
3211 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3212 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3213
3214 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3215
3216 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3217 /* activate the work around */
3218 e1000e_set_laa_state_82571(&adapter->hw, 1);
3219
ad68076e
BA		 3220 /*
3221 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3222 * between the time RAR[0] gets clobbered and the time it
3223 * gets fixed (in e1000_watchdog), the actual LAA is in one
3224 * of the RARs and no incoming packets directed to this port
3225 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3226 * RAR[14]
3227 */
bc7f75fa
AK		 3228 e1000e_rar_set(&adapter->hw,
3229 adapter->hw.mac.addr,
3230 adapter->hw.mac.rar_entry_count - 1);
3231 }
3232
3233 return 0;
3234}
3235
a8f88ff5
JB		 3236/**
3237 * e1000e_update_phy_task - work thread to update phy
3238 * @work: pointer to our work struct
3239 *
3240 * this worker thread exists because we must acquire a
3241 * semaphore to read the phy, which we could msleep while
3242 * waiting for it, and we can't msleep in a timer.
3243 **/
3244static void e1000e_update_phy_task(struct work_struct *work)
3245{
3246 struct e1000_adapter *adapter = container_of(work,
3247 struct e1000_adapter, update_phy_task);
3248 e1000_get_phy_info(&adapter->hw);
3249}
3250
ad68076e
BA		 3251/*
3252 * Need to wait a few seconds after link up to get diagnostic information from
3253 * the phy
3254 */
bc7f75fa
AK		 3255static void e1000_update_phy_info(unsigned long data)
3256{
3257 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3258 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3259}
3260
3261/**
3262 * e1000e_update_stats - Update the board statistics counters
3263 * @adapter: board private structure
3264 **/
3265void e1000e_update_stats(struct e1000_adapter *adapter)
3266{
3267 struct e1000_hw *hw = &adapter->hw;
3268 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3269
3270 /*
3271 * Prevent stats update while adapter is being reset, or if the pci
3272 * connection is down.
3273 */
3274 if (adapter->link_speed == 0)
3275 return;
3276 if (pci_channel_offline(pdev))
3277 return;
3278
bc7f75fa
AK		 3279 adapter->stats.crcerrs += er32(CRCERRS);
3280 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3281 adapter->stats.gorc += er32(GORCL);
3282 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3283 adapter->stats.bprc += er32(BPRC);
3284 adapter->stats.mprc += er32(MPRC);
3285 adapter->stats.roc += er32(ROC);
3286
bc7f75fa
AK		 3287 adapter->stats.mpc += er32(MPC);
3288 adapter->stats.scc += er32(SCC);
3289 adapter->stats.ecol += er32(ECOL);
3290 adapter->stats.mcc += er32(MCC);
3291 adapter->stats.latecol += er32(LATECOL);
3292 adapter->stats.dc += er32(DC);
bc7f75fa
AK		 3293 adapter->stats.xonrxc += er32(XONRXC);
3294 adapter->stats.xontxc += er32(XONTXC);
3295 adapter->stats.xoffrxc += er32(XOFFRXC);
3296 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3297 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3298 adapter->stats.gotc += er32(GOTCL);
3299 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3300 adapter->stats.rnbc += er32(RNBC);
3301 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3302
3303 adapter->stats.mptc += er32(MPTC);
3304 adapter->stats.bptc += er32(BPTC);
3305
3306 /* used for adaptive IFS */
3307
3308 hw->mac.tx_packet_delta = er32(TPT);
3309 adapter->stats.tpt += hw->mac.tx_packet_delta;
3310 hw->mac.collision_delta = er32(COLC);
3311 adapter->stats.colc += hw->mac.collision_delta;
3312
3313 adapter->stats.algnerrc += er32(ALGNERRC);
3314 adapter->stats.rxerrc += er32(RXERRC);
4662e82b
BA		 3315 if (hw->mac.type != e1000_82574)
3316 adapter->stats.tncrs += er32(TNCRS);
bc7f75fa
AK		 3317 adapter->stats.cexterr += er32(CEXTERR);
3318 adapter->stats.tsctc += er32(TSCTC);
3319 adapter->stats.tsctfc += er32(TSCTFC);
3320
bc7f75fa 3321 /* Fill out the OS statistics structure */
bc7f75fa
AK		 3322 adapter->net_stats.multicast = adapter->stats.mprc;
3323 adapter->net_stats.collisions = adapter->stats.colc;
3324
3325 /* Rx Errors */
3326
ad68076e
BA		 3327 /*
3328 * RLEC on some newer hardware can be incorrect so build
3329 * our own version based on RUC and ROC
3330 */
bc7f75fa
AK		 3331 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3332 adapter->stats.crcerrs + adapter->stats.algnerrc +
3333 adapter->stats.ruc + adapter->stats.roc +
3334 adapter->stats.cexterr;
3335 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3336 adapter->stats.roc;
3337 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3338 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3339 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3340
3341 /* Tx Errors */
3342 adapter->net_stats.tx_errors = adapter->stats.ecol +
3343 adapter->stats.latecol;
3344 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3345 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3346 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3347
3348 /* Tx Dropped needs to be maintained elsewhere */
3349
bc7f75fa
AK		 3350 /* Management Stats */
3351 adapter->stats.mgptc += er32(MGTPTC);
3352 adapter->stats.mgprc += er32(MGTPRC);
3353 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3354}
3355
7c25769f
BA		 3356/**
3357 * e1000_phy_read_status - Update the PHY register status snapshot
3358 * @adapter: board private structure
3359 **/
3360static void e1000_phy_read_status(struct e1000_adapter *adapter)
3361{
3362 struct e1000_hw *hw = &adapter->hw;
3363 struct e1000_phy_regs *phy = &adapter->phy_regs;
3364 int ret_val;
7c25769f
BA		 3365
3366 if ((er32(STATUS) & E1000_STATUS_LU) &&
3367 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3368 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3369 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3370 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3371 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3372 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3373 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3374 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3375 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3376 if (ret_val)
44defeb3 3377 e_warn("Error reading PHY register\n");
7c25769f
BA		 3378 } else {
3379 /*
3380 * Do not read PHY registers if link is not up
3381 * Set values to typical power-on defaults
3382 */
3383 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3384 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3385 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3386 BMSR_ERCAP);
3387 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3388 ADVERTISE_ALL | ADVERTISE_CSMA);
3389 phy->lpa = 0;
3390 phy->expansion = EXPANSION_ENABLENPAGE;
3391 phy->ctrl1000 = ADVERTISE_1000FULL;
3392 phy->stat1000 = 0;
3393 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3394 }
7c25769f
BA		 3395}
3396
bc7f75fa
AK		 3397static void e1000_print_link_info(struct e1000_adapter *adapter)
3398{
bc7f75fa
AK		 3399 struct e1000_hw *hw = &adapter->hw;
3400 u32 ctrl = er32(CTRL);
3401
8f12fe86
BA		 3402 /* Link status message must follow this format for user tools */
3403 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3404 "Flow Control: %s\n",
3405 adapter->netdev->name,
44defeb3
JK		 3406 adapter->link_speed,
3407 (adapter->link_duplex == FULL_DUPLEX) ?
3408 "Full Duplex" : "Half Duplex",
3409 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3410 "RX/TX" :
3411 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3412 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3413}
3414
a20e4cf9 3415bool e1000_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3416{
3417 struct e1000_hw *hw = &adapter->hw;
3418 bool link_active = 0;
3419 s32 ret_val = 0;
3420
3421 /*
3422 * get_link_status is set on LSC (link status) interrupt or
3423 * Rx sequence error interrupt. get_link_status will stay
3424 * false until the check_for_link establishes link
3425 * for copper adapters ONLY
3426 */
3427 switch (hw->phy.media_type) {
3428 case e1000_media_type_copper:
3429 if (hw->mac.get_link_status) {
3430 ret_val = hw->mac.ops.check_for_link(hw);
3431 link_active = !hw->mac.get_link_status;
3432 } else {
3433 link_active = 1;
3434 }
3435 break;
3436 case e1000_media_type_fiber:
3437 ret_val = hw->mac.ops.check_for_link(hw);
3438 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3439 break;
3440 case e1000_media_type_internal_serdes:
3441 ret_val = hw->mac.ops.check_for_link(hw);
3442 link_active = adapter->hw.mac.serdes_has_link;
3443 break;
3444 default:
3445 case e1000_media_type_unknown:
3446 break;
3447 }
3448
3449 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3450 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3451 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3452 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 3453 }
3454
3455 return link_active;
3456}
3457
3458static void e1000e_enable_receives(struct e1000_adapter *adapter)
3459{
3460 /* make sure the receive unit is started */
3461 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3462 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3463 struct e1000_hw *hw = &adapter->hw;
3464 u32 rctl = er32(RCTL);
3465 ew32(RCTL, rctl | E1000_RCTL_EN);
3466 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3467 }
3468}
3469
bc7f75fa
AK		 3470/**
3471 * e1000_watchdog - Timer Call-back
3472 * @data: pointer to adapter cast into an unsigned long
3473 **/
3474static void e1000_watchdog(unsigned long data)
3475{
3476 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3477
3478 /* Do the rest outside of interrupt context */
3479 schedule_work(&adapter->watchdog_task);
3480
3481 /* TODO: make this use queue_delayed_work() */
3482}
3483
3484static void e1000_watchdog_task(struct work_struct *work)
3485{
3486 struct e1000_adapter *adapter = container_of(work,
3487 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 3488 struct net_device *netdev = adapter->netdev;
3489 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3490 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 3491 struct e1000_ring *tx_ring = adapter->tx_ring;
3492 struct e1000_hw *hw = &adapter->hw;
3493 u32 link, tctl;
bc7f75fa
AK		 3494 int tx_pending = 0;
3495
318a94d6
JK		 3496 link = e1000_has_link(adapter);
3497 if ((netif_carrier_ok(netdev)) && link) {
3498 e1000e_enable_receives(adapter);
bc7f75fa 3499 goto link_up;
bc7f75fa
AK		 3500 }
3501
3502 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3503 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3504 e1000_update_mng_vlan(adapter);
3505
bc7f75fa
AK		 3506 if (link) {
3507 if (!netif_carrier_ok(netdev)) {
3508 bool txb2b = 1;
318a94d6 3509 /* update snapshot of PHY registers on LSC */
7c25769f 3510 e1000_phy_read_status(adapter);
bc7f75fa
AK		 3511 mac->ops.get_link_up_info(&adapter->hw,
3512 &adapter->link_speed,
3513 &adapter->link_duplex);
3514 e1000_print_link_info(adapter);
f4187b56
BA		 3515 /*
3516 * On supported PHYs, check for duplex mismatch only
3517 * if link has autonegotiated at 10/100 half
3518 */
3519 if ((hw->phy.type == e1000_phy_igp_3 ||
3520 hw->phy.type == e1000_phy_bm) &&
3521 (hw->mac.autoneg == true) &&
3522 (adapter->link_speed == SPEED_10 ||
3523 adapter->link_speed == SPEED_100) &&
3524 (adapter->link_duplex == HALF_DUPLEX)) {
3525 u16 autoneg_exp;
3526
3527 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3528
3529 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3530 e_info("Autonegotiated half duplex but"
3531 " link partner cannot autoneg. "
3532 " Try forcing full duplex if "
3533 "link gets many collisions.\n");
3534 }
3535
ad68076e
BA		 3536 /*
3537 * tweak tx_queue_len according to speed/duplex
3538 * and adjust the timeout factor
3539 */
bc7f75fa
AK		 3540 netdev->tx_queue_len = adapter->tx_queue_len;
3541 adapter->tx_timeout_factor = 1;
3542 switch (adapter->link_speed) {
3543 case SPEED_10:
3544 txb2b = 0;
3545 netdev->tx_queue_len = 10;
10f1b492 3546 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 3547 break;
3548 case SPEED_100:
3549 txb2b = 0;
3550 netdev->tx_queue_len = 100;
3551 /* maybe add some timeout factor ? */
3552 break;
3553 }
3554
ad68076e
BA		 3555 /*
3556 * workaround: re-program speed mode bit after
3557 * link-up event
3558 */
bc7f75fa
AK		 3559 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3560 !txb2b) {
3561 u32 tarc0;
e9ec2c0f 3562 tarc0 = er32(TARC(0));
bc7f75fa 3563 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3564 ew32(TARC(0), tarc0);
bc7f75fa
AK		 3565 }
3566
ad68076e
BA		 3567 /*
3568 * disable TSO for pcie and 10/100 speeds, to avoid
3569 * some hardware issues
3570 */
bc7f75fa
AK		 3571 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3572 switch (adapter->link_speed) {
3573 case SPEED_10:
3574 case SPEED_100:
44defeb3 3575 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 3576 netdev->features &= ~NETIF_F_TSO;
3577 netdev->features &= ~NETIF_F_TSO6;
3578 break;
3579 case SPEED_1000:
3580 netdev->features |= NETIF_F_TSO;
3581 netdev->features |= NETIF_F_TSO6;
3582 break;
3583 default:
3584 /* oops */
3585 break;
3586 }
3587 }
3588
ad68076e
BA		 3589 /*
3590 * enable transmits in the hardware, need to do this
3591 * after setting TARC(0)
3592 */
bc7f75fa
AK		 3593 tctl = er32(TCTL);
3594 tctl |= E1000_TCTL_EN;
3595 ew32(TCTL, tctl);
3596
75eb0fad
BA		 3597 /*
3598 * Perform any post-link-up configuration before
3599 * reporting link up.
3600 */
3601 if (phy->ops.cfg_on_link_up)
3602 phy->ops.cfg_on_link_up(hw);
3603
bc7f75fa 3604 netif_carrier_on(netdev);
d55b53ff 3605 netif_tx_wake_all_queues(netdev);
bc7f75fa
AK		 3606
3607 if (!test_bit(__E1000_DOWN, &adapter->state))
3608 mod_timer(&adapter->phy_info_timer,
3609 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 3610 }
3611 } else {
3612 if (netif_carrier_ok(netdev)) {
3613 adapter->link_speed = 0;
3614 adapter->link_duplex = 0;
8f12fe86
BA		 3615 /* Link status message must follow this format */
3616 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3617 adapter->netdev->name);
bc7f75fa 3618 netif_carrier_off(netdev);
d55b53ff 3619 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK		 3620 if (!test_bit(__E1000_DOWN, &adapter->state))
3621 mod_timer(&adapter->phy_info_timer,
3622 round_jiffies(jiffies + 2 * HZ));
3623
3624 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3625 schedule_work(&adapter->reset_task);
3626 }
3627 }
3628
3629link_up:
3630 e1000e_update_stats(adapter);
3631
3632 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3633 adapter->tpt_old = adapter->stats.tpt;
3634 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3635 adapter->colc_old = adapter->stats.colc;
3636
7c25769f
BA		 3637 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3638 adapter->gorc_old = adapter->stats.gorc;
3639 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3640 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 3641
3642 e1000e_update_adaptive(&adapter->hw);
3643
3644 if (!netif_carrier_ok(netdev)) {
3645 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3646 tx_ring->count);
3647 if (tx_pending) {
ad68076e
BA		 3648 /*
3649 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 3650 * but we've got queued Tx work that's never going
3651 * to get done, so reset controller to flush Tx.
ad68076e
BA		 3652 * (Do the reset outside of interrupt context).
3653 */
bc7f75fa
AK		 3654 adapter->tx_timeout_count++;
3655 schedule_work(&adapter->reset_task);
3656 }
3657 }
3658
ad68076e 3659 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 3660 if (adapter->msix_entries)
3661 ew32(ICS, adapter->rx_ring->ims_val);
3662 else
3663 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 3664
3665 /* Force detection of hung controller every watchdog period */
3666 adapter->detect_tx_hung = 1;
3667
ad68076e
BA		 3668 /*
3669 * With 82571 controllers, LAA may be overwritten due to controller
3670 * reset from the other port. Set the appropriate LAA in RAR[0]
3671 */
bc7f75fa
AK		 3672 if (e1000e_get_laa_state_82571(hw))
3673 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3674
3675 /* Reset the timer */
3676 if (!test_bit(__E1000_DOWN, &adapter->state))
3677 mod_timer(&adapter->watchdog_timer,
3678 round_jiffies(jiffies + 2 * HZ));
3679}
3680
3681#define E1000_TX_FLAGS_CSUM 0x00000001
3682#define E1000_TX_FLAGS_VLAN 0x00000002
3683#define E1000_TX_FLAGS_TSO 0x00000004
3684#define E1000_TX_FLAGS_IPV4 0x00000008
3685#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3686#define E1000_TX_FLAGS_VLAN_SHIFT 16
3687
3688static int e1000_tso(struct e1000_adapter *adapter,
3689 struct sk_buff *skb)
3690{
3691 struct e1000_ring *tx_ring = adapter->tx_ring;
3692 struct e1000_context_desc *context_desc;
3693 struct e1000_buffer *buffer_info;
3694 unsigned int i;
3695 u32 cmd_length = 0;
3696 u16 ipcse = 0, tucse, mss;
3697 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3698 int err;
3699
3700 if (skb_is_gso(skb)) {
3701 if (skb_header_cloned(skb)) {
3702 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3703 if (err)
3704 return err;
3705 }
3706
3707 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3708 mss = skb_shinfo(skb)->gso_size;
3709 if (skb->protocol == htons(ETH_P_IP)) {
3710 struct iphdr *iph = ip_hdr(skb);
3711 iph->tot_len = 0;
3712 iph->check = 0;
3713 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3714 iph->daddr, 0,
3715 IPPROTO_TCP,
3716 0);
3717 cmd_length = E1000_TXD_CMD_IP;
3718 ipcse = skb_transport_offset(skb) - 1;
3719 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3720 ipv6_hdr(skb)->payload_len = 0;
3721 tcp_hdr(skb)->check =
3722 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3723 &ipv6_hdr(skb)->daddr,
3724 0, IPPROTO_TCP, 0);
3725 ipcse = 0;
3726 }
3727 ipcss = skb_network_offset(skb);
3728 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3729 tucss = skb_transport_offset(skb);
3730 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3731 tucse = 0;
3732
3733 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3734 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3735
3736 i = tx_ring->next_to_use;
3737 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3738 buffer_info = &tx_ring->buffer_info[i];
3739
3740 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3741 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3742 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3743 context_desc->upper_setup.tcp_fields.tucss = tucss;
3744 context_desc->upper_setup.tcp_fields.tucso = tucso;
3745 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3746 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3747 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3748 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3749
3750 buffer_info->time_stamp = jiffies;
3751 buffer_info->next_to_watch = i;
3752
3753 i++;
3754 if (i == tx_ring->count)
3755 i = 0;
3756 tx_ring->next_to_use = i;
3757
3758 return 1;
3759 }
3760
3761 return 0;
3762}
3763
3764static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3765{
3766 struct e1000_ring *tx_ring = adapter->tx_ring;
3767 struct e1000_context_desc *context_desc;
3768 struct e1000_buffer *buffer_info;
3769 unsigned int i;
3770 u8 css;
af807c82 3771 u32 cmd_len = E1000_TXD_CMD_DEXT;
bc7f75fa 3772
af807c82
DG		 3773 if (skb->ip_summed != CHECKSUM_PARTIAL)
3774 return 0;
bc7f75fa 3775
af807c82 3776 switch (skb->protocol) {
09640e63 3777 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 3778 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3779 cmd_len |= E1000_TXD_CMD_TCP;
3780 break;
09640e63 3781 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 3782 /* XXX not handling all IPV6 headers */
3783 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3784 cmd_len |= E1000_TXD_CMD_TCP;
3785 break;
3786 default:
3787 if (unlikely(net_ratelimit()))
3788 e_warn("checksum_partial proto=%x!\n", skb->protocol);
3789 break;
bc7f75fa
AK		 3790 }
3791
af807c82
DG		 3792 css = skb_transport_offset(skb);
3793
3794 i = tx_ring->next_to_use;
3795 buffer_info = &tx_ring->buffer_info[i];
3796 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3797
3798 context_desc->lower_setup.ip_config = 0;
3799 context_desc->upper_setup.tcp_fields.tucss = css;
3800 context_desc->upper_setup.tcp_fields.tucso =
3801 css + skb->csum_offset;
3802 context_desc->upper_setup.tcp_fields.tucse = 0;
3803 context_desc->tcp_seg_setup.data = 0;
3804 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
3805
3806 buffer_info->time_stamp = jiffies;
3807 buffer_info->next_to_watch = i;
3808
3809 i++;
3810 if (i == tx_ring->count)
3811 i = 0;
3812 tx_ring->next_to_use = i;
3813
3814 return 1;
bc7f75fa
AK		 3815}
3816
3817#define E1000_MAX_PER_TXD 8192
3818#define E1000_MAX_TXD_PWR 12
3819
3820static int e1000_tx_map(struct e1000_adapter *adapter,
3821 struct sk_buff *skb, unsigned int first,
3822 unsigned int max_per_txd, unsigned int nr_frags,
3823 unsigned int mss)
3824{
3825 struct e1000_ring *tx_ring = adapter->tx_ring;
8ddc951c
JB		 3826 unsigned int len = skb_headlen(skb);
3827 unsigned int offset, size, count = 0, i;
bc7f75fa 3828 unsigned int f;
8ddc951c 3829 dma_addr_t map;
bc7f75fa
AK		 3830
3831 i = tx_ring->next_to_use;
3832
8ddc951c
JB		 3833 if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
3834 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
3835 adapter->tx_dma_failed++;
3836 dev_kfree_skb(skb);
3837 return -2;
3838 }
3839
3840 map = skb_shinfo(skb)->dma_maps[0];
3841 offset = 0;
3842
bc7f75fa 3843 while (len) {
8ddc951c 3844 struct e1000_buffer *buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 3845 size = min(len, max_per_txd);
3846
bc7f75fa
AK		 3847 buffer_info->length = size;
3848 /* set time_stamp *before* dma to help avoid a possible race */
3849 buffer_info->time_stamp = jiffies;
8ddc951c 3850 buffer_info->dma = map + offset;
bc7f75fa
AK		 3851 buffer_info->next_to_watch = i;
3852
3853 len -= size;
3854 offset += size;
3855 count++;
3856 i++;
3857 if (i == tx_ring->count)
3858 i = 0;
3859 }
3860
3861 for (f = 0; f < nr_frags; f++) {
3862 struct skb_frag_struct *frag;
3863
3864 frag = &skb_shinfo(skb)->frags[f];
3865 len = frag->size;
8ddc951c
JB		 3866 map = skb_shinfo(skb)->dma_maps[f + 1];
3867 offset = 0;
bc7f75fa
AK		 3868
3869 while (len) {
8ddc951c 3870 struct e1000_buffer *buffer_info;
bc7f75fa
AK		 3871 buffer_info = &tx_ring->buffer_info[i];
3872 size = min(len, max_per_txd);
bc7f75fa
AK		 3873
3874 buffer_info->length = size;
3875 buffer_info->time_stamp = jiffies;
8ddc951c 3876 buffer_info->dma = map + offset;
bc7f75fa
AK		 3877 buffer_info->next_to_watch = i;
3878
3879 len -= size;
3880 offset += size;
3881 count++;
3882
3883 i++;
3884 if (i == tx_ring->count)
3885 i = 0;
3886 }
3887 }
3888
3889 if (i == 0)
3890 i = tx_ring->count - 1;
3891 else
3892 i--;
3893
3894 tx_ring->buffer_info[i].skb = skb;
3895 tx_ring->buffer_info[first].next_to_watch = i;
8ddc951c 3896 smp_wmb();
bc7f75fa
AK		 3897
3898 return count;
3899}
3900
3901static void e1000_tx_queue(struct e1000_adapter *adapter,
3902 int tx_flags, int count)
3903{
3904 struct e1000_ring *tx_ring = adapter->tx_ring;
3905 struct e1000_tx_desc *tx_desc = NULL;
3906 struct e1000_buffer *buffer_info;
3907 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3908 unsigned int i;
3909
3910 if (tx_flags & E1000_TX_FLAGS_TSO) {
3911 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3912 E1000_TXD_CMD_TSE;
3913 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3914
3915 if (tx_flags & E1000_TX_FLAGS_IPV4)
3916 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3917 }
3918
3919 if (tx_flags & E1000_TX_FLAGS_CSUM) {
3920 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3921 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3922 }
3923
3924 if (tx_flags & E1000_TX_FLAGS_VLAN) {
3925 txd_lower |= E1000_TXD_CMD_VLE;
3926 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3927 }
3928
3929 i = tx_ring->next_to_use;
3930
3931 while (count--) {
3932 buffer_info = &tx_ring->buffer_info[i];
3933 tx_desc = E1000_TX_DESC(*tx_ring, i);
3934 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3935 tx_desc->lower.data =
3936 cpu_to_le32(txd_lower | buffer_info->length);
3937 tx_desc->upper.data = cpu_to_le32(txd_upper);
3938
3939 i++;
3940 if (i == tx_ring->count)
3941 i = 0;
3942 }
3943
3944 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3945
ad68076e
BA		 3946 /*
3947 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 3948 * know there are new descriptors to fetch. (Only
3949 * applicable for weak-ordered memory model archs,
ad68076e
BA		 3950 * such as IA-64).
3951 */
bc7f75fa
AK		 3952 wmb();
3953
3954 tx_ring->next_to_use = i;
3955 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 3956 /*
3957 * we need this if more than one processor can write to our tail
3958 * at a time, it synchronizes IO on IA64/Altix systems
3959 */
bc7f75fa
AK		 3960 mmiowb();
3961}
3962
3963#define MINIMUM_DHCP_PACKET_SIZE 282
3964static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3965 struct sk_buff *skb)
3966{
3967 struct e1000_hw *hw = &adapter->hw;
3968 u16 length, offset;
3969
3970 if (vlan_tx_tag_present(skb)) {
3971 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id)
3972 && (adapter->hw.mng_cookie.status &
3973 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
3974 return 0;
3975 }
3976
3977 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
3978 return 0;
3979
3980 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
3981 return 0;
3982
3983 {
3984 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
3985 struct udphdr *udp;
3986
3987 if (ip->protocol != IPPROTO_UDP)
3988 return 0;
3989
3990 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
3991 if (ntohs(udp->dest) != 67)
3992 return 0;
3993
3994 offset = (u8 *)udp + 8 - skb->data;
3995 length = skb->len - offset;
3996 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
3997 }
3998
3999 return 0;
4000}
4001
4002static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4003{
4004 struct e1000_adapter *adapter = netdev_priv(netdev);
4005
4006 netif_stop_queue(netdev);
ad68076e
BA		 4007 /*
4008 * Herbert's original patch had:
bc7f75fa 4009 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4010 * but since that doesn't exist yet, just open code it.
4011 */
bc7f75fa
AK		 4012 smp_mb();
4013
ad68076e
BA		 4014 /*
4015 * We need to check again in a case another CPU has just
4016 * made room available.
4017 */
bc7f75fa
AK		 4018 if (e1000_desc_unused(adapter->tx_ring) < size)
4019 return -EBUSY;
4020
4021 /* A reprieve! */
4022 netif_start_queue(netdev);
4023 ++adapter->restart_queue;
4024 return 0;
4025}
4026
4027static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4028{
4029 struct e1000_adapter *adapter = netdev_priv(netdev);
4030
4031 if (e1000_desc_unused(adapter->tx_ring) >= size)
4032 return 0;
4033 return __e1000_maybe_stop_tx(netdev, size);
4034}
4035
4036#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
4037static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
4038{
4039 struct e1000_adapter *adapter = netdev_priv(netdev);
4040 struct e1000_ring *tx_ring = adapter->tx_ring;
4041 unsigned int first;
4042 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4043 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4044 unsigned int tx_flags = 0;
4e6c709c 4045 unsigned int len = skb->len - skb->data_len;
4e6c709c
AK		 4046 unsigned int nr_frags;
4047 unsigned int mss;
bc7f75fa
AK		 4048 int count = 0;
4049 int tso;
4050 unsigned int f;
bc7f75fa
AK		 4051
4052 if (test_bit(__E1000_DOWN, &adapter->state)) {
4053 dev_kfree_skb_any(skb);
4054 return NETDEV_TX_OK;
4055 }
4056
4057 if (skb->len <= 0) {
4058 dev_kfree_skb_any(skb);
4059 return NETDEV_TX_OK;
4060 }
4061
4062 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4063 /*
4064 * The controller does a simple calculation to
bc7f75fa
AK		 4065 * make sure there is enough room in the FIFO before
4066 * initiating the DMA for each buffer. The calc is:
4067 * 4 = ceil(buffer len/mss). To make sure we don't
4068 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4069 * drops.
4070 */
bc7f75fa
AK		 4071 if (mss) {
4072 u8 hdr_len;
4073 max_per_txd = min(mss << 2, max_per_txd);
4074 max_txd_pwr = fls(max_per_txd) - 1;
4075
ad68076e
BA		 4076 /*
4077 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4078 * points to just header, pull a few bytes of payload from
4079 * frags into skb->data
4080 */
bc7f75fa 4081 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4082 /*
4083 * we do this workaround for ES2LAN, but it is un-necessary,
4084 * avoiding it could save a lot of cycles
4085 */
4e6c709c 4086 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4087 unsigned int pull_size;
4088
4089 pull_size = min((unsigned int)4, skb->data_len);
4090 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4091 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4092 dev_kfree_skb_any(skb);
4093 return NETDEV_TX_OK;
4094 }
4095 len = skb->len - skb->data_len;
4096 }
4097 }
4098
4099 /* reserve a descriptor for the offload context */
4100 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4101 count++;
4102 count++;
4103
4104 count += TXD_USE_COUNT(len, max_txd_pwr);
4105
4106 nr_frags = skb_shinfo(skb)->nr_frags;
4107 for (f = 0; f < nr_frags; f++)
4108 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4109 max_txd_pwr);
4110
4111 if (adapter->hw.mac.tx_pkt_filtering)
4112 e1000_transfer_dhcp_info(adapter, skb);
4113
ad68076e
BA		 4114 /*
4115 * need: count + 2 desc gap to keep tail from touching
4116 * head, otherwise try next time
4117 */
92af3e95 4118 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4119 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4120
4121 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4122 tx_flags |= E1000_TX_FLAGS_VLAN;
4123 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4124 }
4125
4126 first = tx_ring->next_to_use;
4127
4128 tso = e1000_tso(adapter, skb);
4129 if (tso < 0) {
4130 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4131 return NETDEV_TX_OK;
4132 }
4133
4134 if (tso)
4135 tx_flags |= E1000_TX_FLAGS_TSO;
4136 else if (e1000_tx_csum(adapter, skb))
4137 tx_flags |= E1000_TX_FLAGS_CSUM;
4138
ad68076e
BA		 4139 /*
4140 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4141 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4142 * no longer assume, we must.
4143 */
bc7f75fa
AK		 4144 if (skb->protocol == htons(ETH_P_IP))
4145 tx_flags |= E1000_TX_FLAGS_IPV4;
4146
4147 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
4148 if (count < 0) {
4149 /* handle pci_map_single() error in e1000_tx_map */
4150 dev_kfree_skb_any(skb);
7b5dfe1a 4151 return NETDEV_TX_OK;
bc7f75fa
AK		 4152 }
4153
4154 e1000_tx_queue(adapter, tx_flags, count);
4155
4156 netdev->trans_start = jiffies;
4157
4158 /* Make sure there is space in the ring for the next send. */
4159 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4160
bc7f75fa
AK		 4161 return NETDEV_TX_OK;
4162}
4163
4164/**
4165 * e1000_tx_timeout - Respond to a Tx Hang
4166 * @netdev: network interface device structure
4167 **/
4168static void e1000_tx_timeout(struct net_device *netdev)
4169{
4170 struct e1000_adapter *adapter = netdev_priv(netdev);
4171
4172 /* Do the reset outside of interrupt context */
4173 adapter->tx_timeout_count++;
4174 schedule_work(&adapter->reset_task);
4175}
4176
4177static void e1000_reset_task(struct work_struct *work)
4178{
4179 struct e1000_adapter *adapter;
4180 adapter = container_of(work, struct e1000_adapter, reset_task);
4181
4182 e1000e_reinit_locked(adapter);
4183}
4184
4185/**
4186 * e1000_get_stats - Get System Network Statistics
4187 * @netdev: network interface device structure
4188 *
4189 * Returns the address of the device statistics structure.
4190 * The statistics are actually updated from the timer callback.
4191 **/
4192static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4193{
4194 struct e1000_adapter *adapter = netdev_priv(netdev);
4195
4196 /* only return the current stats */
4197 return &adapter->net_stats;
4198}
4199
4200/**
4201 * e1000_change_mtu - Change the Maximum Transfer Unit
4202 * @netdev: network interface device structure
4203 * @new_mtu: new value for maximum frame size
4204 *
4205 * Returns 0 on success, negative on failure
4206 **/
4207static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4208{
4209 struct e1000_adapter *adapter = netdev_priv(netdev);
4210 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4211
d53f706d 4212 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
bc7f75fa 4213 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
44defeb3 4214 e_err("Invalid MTU setting\n");
bc7f75fa
AK		 4215 return -EINVAL;
4216 }
4217
4218 /* Jumbo frame size limits */
4219 if (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) {
4220 if (!(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
44defeb3 4221 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4222 return -EINVAL;
4223 }
4224 if (adapter->hw.phy.type == e1000_phy_ife) {
44defeb3 4225 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4226 return -EINVAL;
4227 }
4228 }
4229
4230#define MAX_STD_JUMBO_FRAME_SIZE 9234
4231 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
44defeb3 4232 e_err("MTU > 9216 not supported.\n");
bc7f75fa
AK		 4233 return -EINVAL;
4234 }
4235
4236 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4237 msleep(1);
4238 /* e1000e_down has a dependency on max_frame_size */
318a94d6 4239 adapter->max_frame_size = max_frame;
bc7f75fa
AK		 4240 if (netif_running(netdev))
4241 e1000e_down(adapter);
4242
ad68076e
BA		 4243 /*
4244 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4245 * means we reserve 2 more, this pushes us to allocate from the next
4246 * larger slab size.
ad68076e 4247 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4248 * However with the new *_jumbo_rx* routines, jumbo receives will use
4249 * fragmented skbs
ad68076e 4250 */
bc7f75fa
AK		 4251
4252 if (max_frame <= 256)
4253 adapter->rx_buffer_len = 256;
4254 else if (max_frame <= 512)
4255 adapter->rx_buffer_len = 512;
4256 else if (max_frame <= 1024)
4257 adapter->rx_buffer_len = 1024;
4258 else if (max_frame <= 2048)
4259 adapter->rx_buffer_len = 2048;
4260 else
4261 adapter->rx_buffer_len = 4096;
4262
4263 /* adjust allocation if LPE protects us, and we aren't using SBP */
4264 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4265 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4266 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4267 + ETH_FCS_LEN;
bc7f75fa 4268
44defeb3 4269 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
bc7f75fa
AK		 4270 netdev->mtu = new_mtu;
4271
4272 if (netif_running(netdev))
4273 e1000e_up(adapter);
4274 else
4275 e1000e_reset(adapter);
4276
4277 clear_bit(__E1000_RESETTING, &adapter->state);
4278
4279 return 0;
4280}
4281
4282static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4283 int cmd)
4284{
4285 struct e1000_adapter *adapter = netdev_priv(netdev);
4286 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4287
318a94d6 4288 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4289 return -EOPNOTSUPP;
4290
4291 switch (cmd) {
4292 case SIOCGMIIPHY:
4293 data->phy_id = adapter->hw.phy.addr;
4294 break;
4295 case SIOCGMIIREG:
4296 if (!capable(CAP_NET_ADMIN))
4297 return -EPERM;
7c25769f
BA		 4298 switch (data->reg_num & 0x1F) {
4299 case MII_BMCR:
4300 data->val_out = adapter->phy_regs.bmcr;
4301 break;
4302 case MII_BMSR:
4303 data->val_out = adapter->phy_regs.bmsr;
4304 break;
4305 case MII_PHYSID1:
4306 data->val_out = (adapter->hw.phy.id >> 16);
4307 break;
4308 case MII_PHYSID2:
4309 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4310 break;
4311 case MII_ADVERTISE:
4312 data->val_out = adapter->phy_regs.advertise;
4313 break;
4314 case MII_LPA:
4315 data->val_out = adapter->phy_regs.lpa;
4316 break;
4317 case MII_EXPANSION:
4318 data->val_out = adapter->phy_regs.expansion;
4319 break;
4320 case MII_CTRL1000:
4321 data->val_out = adapter->phy_regs.ctrl1000;
4322 break;
4323 case MII_STAT1000:
4324 data->val_out = adapter->phy_regs.stat1000;
4325 break;
4326 case MII_ESTATUS:
4327 data->val_out = adapter->phy_regs.estatus;
4328 break;
4329 default:
bc7f75fa
AK		 4330 return -EIO;
4331 }
bc7f75fa
AK		 4332 break;
4333 case SIOCSMIIREG:
4334 default:
4335 return -EOPNOTSUPP;
4336 }
4337 return 0;
4338}
4339
4340static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4341{
4342 switch (cmd) {
4343 case SIOCGMIIPHY:
4344 case SIOCGMIIREG:
4345 case SIOCSMIIREG:
4346 return e1000_mii_ioctl(netdev, ifr, cmd);
4347 default:
4348 return -EOPNOTSUPP;
4349 }
4350}
4351
4352static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4353{
4354 struct net_device *netdev = pci_get_drvdata(pdev);
4355 struct e1000_adapter *adapter = netdev_priv(netdev);
4356 struct e1000_hw *hw = &adapter->hw;
4357 u32 ctrl, ctrl_ext, rctl, status;
4358 u32 wufc = adapter->wol;
4359 int retval = 0;
4360
4361 netif_device_detach(netdev);
4362
4363 if (netif_running(netdev)) {
4364 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4365 e1000e_down(adapter);
4366 e1000_free_irq(adapter);
4367 }
4662e82b 4368 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 4369
4370 retval = pci_save_state(pdev);
4371 if (retval)
4372 return retval;
4373
4374 status = er32(STATUS);
4375 if (status & E1000_STATUS_LU)
4376 wufc &= ~E1000_WUFC_LNKC;
4377
4378 if (wufc) {
4379 e1000_setup_rctl(adapter);
4380 e1000_set_multi(netdev);
4381
4382 /* turn on all-multi mode if wake on multicast is enabled */
4383 if (wufc & E1000_WUFC_MC) {
4384 rctl = er32(RCTL);
4385 rctl |= E1000_RCTL_MPE;
4386 ew32(RCTL, rctl);
4387 }
4388
4389 ctrl = er32(CTRL);
4390 /* advertise wake from D3Cold */
4391 #define E1000_CTRL_ADVD3WUC 0x00100000
4392 /* phy power management enable */
4393 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4394 ctrl |= E1000_CTRL_ADVD3WUC |
4395 E1000_CTRL_EN_PHY_PWR_MGMT;
4396 ew32(CTRL, ctrl);
4397
318a94d6
JK		 4398 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4399 adapter->hw.phy.media_type ==
4400 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 4401 /* keep the laser running in D3 */
4402 ctrl_ext = er32(CTRL_EXT);
4403 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4404 ew32(CTRL_EXT, ctrl_ext);
4405 }
4406
97ac8cae
BA		 4407 if (adapter->flags & FLAG_IS_ICH)
4408 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4409
bc7f75fa
AK		 4410 /* Allow time for pending master requests to run */
4411 e1000e_disable_pcie_master(&adapter->hw);
4412
4413 ew32(WUC, E1000_WUC_PME_EN);
4414 ew32(WUFC, wufc);
4415 pci_enable_wake(pdev, PCI_D3hot, 1);
4416 pci_enable_wake(pdev, PCI_D3cold, 1);
4417 } else {
4418 ew32(WUC, 0);
4419 ew32(WUFC, 0);
4420 pci_enable_wake(pdev, PCI_D3hot, 0);
4421 pci_enable_wake(pdev, PCI_D3cold, 0);
4422 }
4423
bc7f75fa
AK		 4424 /* make sure adapter isn't asleep if manageability is enabled */
4425 if (adapter->flags & FLAG_MNG_PT_ENABLED) {
4426 pci_enable_wake(pdev, PCI_D3hot, 1);
4427 pci_enable_wake(pdev, PCI_D3cold, 1);
4428 }
4429
4430 if (adapter->hw.phy.type == e1000_phy_igp_3)
4431 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4432
ad68076e
BA		 4433 /*
4434 * Release control of h/w to f/w. If f/w is AMT enabled, this
4435 * would have already happened in close and is redundant.
4436 */
bc7f75fa
AK		 4437 e1000_release_hw_control(adapter);
4438
4439 pci_disable_device(pdev);
4440
005cbdfc
AD		 4441 /*
4442 * The pci-e switch on some quad port adapters will report a
4443 * correctable error when the MAC transitions from D0 to D3. To
4444 * prevent this we need to mask off the correctable errors on the
4445 * downstream port of the pci-e switch.
4446 */
4447 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4448 struct pci_dev *us_dev = pdev->bus->self;
4449 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4450 u16 devctl;
4451
4452 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4453 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4454 (devctl & ~PCI_EXP_DEVCTL_CERE));
4455
4456 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4457
4458 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4459 } else {
4460 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4461 }
bc7f75fa
AK		 4462
4463 return 0;
4464}
4465
1eae4eb2
AK		 4466static void e1000e_disable_l1aspm(struct pci_dev *pdev)
4467{
4468 int pos;
1eae4eb2
AK		 4469 u16 val;
4470
4471 /*
4472 * 82573 workaround - disable L1 ASPM on mobile chipsets
4473 *
4474 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
4475 * resulting in lost data or garbage information on the pci-e link
4476 * level. This could result in (false) bad EEPROM checksum errors,
4477 * long ping times (up to 2s) or even a system freeze/hang.
4478 *
4479 * Unfortunately this feature saves about 1W power consumption when
4480 * active.
4481 */
4482 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK		 4483 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
4484 if (val & 0x2) {
4485 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
4486 val &= ~0x2;
4487 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
4488 }
4489}
4490
bc7f75fa
AK		 4491#ifdef CONFIG_PM
4492static int e1000_resume(struct pci_dev *pdev)
4493{
4494 struct net_device *netdev = pci_get_drvdata(pdev);
4495 struct e1000_adapter *adapter = netdev_priv(netdev);
4496 struct e1000_hw *hw = &adapter->hw;
4497 u32 err;
4498
4499 pci_set_power_state(pdev, PCI_D0);
4500 pci_restore_state(pdev);
1eae4eb2 4501 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4502
f0f422e5 4503 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4504 if (err) {
4505 dev_err(&pdev->dev,
4506 "Cannot enable PCI device from suspend\n");
4507 return err;
4508 }
4509
111b9dc5
JB		 4510 /* AER (Advanced Error Reporting) hooks */
4511 err = pci_enable_pcie_error_reporting(pdev);
4512 if (err) {
4513 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
4514 "0x%x\n", err);
4515 /* non-fatal, continue */
4516 }
4517
bc7f75fa
AK		 4518 pci_set_master(pdev);
4519
4520 pci_enable_wake(pdev, PCI_D3hot, 0);
4521 pci_enable_wake(pdev, PCI_D3cold, 0);
4522
4662e82b 4523 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 4524 if (netif_running(netdev)) {
4525 err = e1000_request_irq(adapter);
4526 if (err)
4527 return err;
4528 }
4529
4530 e1000e_power_up_phy(adapter);
4531 e1000e_reset(adapter);
4532 ew32(WUS, ~0);
4533
4534 e1000_init_manageability(adapter);
4535
4536 if (netif_running(netdev))
4537 e1000e_up(adapter);
4538
4539 netif_device_attach(netdev);
4540
ad68076e
BA		 4541 /*
4542 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4543 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4544 * under the control of the driver.
4545 */
c43bc57e 4546 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4547 e1000_get_hw_control(adapter);
4548
4549 return 0;
4550}
4551#endif
4552
4553static void e1000_shutdown(struct pci_dev *pdev)
4554{
4555 e1000_suspend(pdev, PMSG_SUSPEND);
4556}
4557
4558#ifdef CONFIG_NET_POLL_CONTROLLER
4559/*
4560 * Polling 'interrupt' - used by things like netconsole to send skbs
4561 * without having to re-enable interrupts. It's not called while
4562 * the interrupt routine is executing.
4563 */
4564static void e1000_netpoll(struct net_device *netdev)
4565{
4566 struct e1000_adapter *adapter = netdev_priv(netdev);
4567
4568 disable_irq(adapter->pdev->irq);
4569 e1000_intr(adapter->pdev->irq, netdev);
4570
bc7f75fa
AK		 4571 enable_irq(adapter->pdev->irq);
4572}
4573#endif
4574
4575/**
4576 * e1000_io_error_detected - called when PCI error is detected
4577 * @pdev: Pointer to PCI device
4578 * @state: The current pci connection state
4579 *
4580 * This function is called after a PCI bus error affecting
4581 * this device has been detected.
4582 */
4583static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4584 pci_channel_state_t state)
4585{
4586 struct net_device *netdev = pci_get_drvdata(pdev);
4587 struct e1000_adapter *adapter = netdev_priv(netdev);
4588
4589 netif_device_detach(netdev);
4590
4591 if (netif_running(netdev))
4592 e1000e_down(adapter);
4593 pci_disable_device(pdev);
4594
4595 /* Request a slot slot reset. */
4596 return PCI_ERS_RESULT_NEED_RESET;
4597}
4598
4599/**
4600 * e1000_io_slot_reset - called after the pci bus has been reset.
4601 * @pdev: Pointer to PCI device
4602 *
4603 * Restart the card from scratch, as if from a cold-boot. Implementation
4604 * resembles the first-half of the e1000_resume routine.
4605 */
4606static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4607{
4608 struct net_device *netdev = pci_get_drvdata(pdev);
4609 struct e1000_adapter *adapter = netdev_priv(netdev);
4610 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4611 int err;
111b9dc5 4612 pci_ers_result_t result;
bc7f75fa 4613
1eae4eb2 4614 e1000e_disable_l1aspm(pdev);
f0f422e5 4615 err = pci_enable_device_mem(pdev);
6e4f6f6b 4616 if (err) {
bc7f75fa
AK		 4617 dev_err(&pdev->dev,
4618 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 4619 result = PCI_ERS_RESULT_DISCONNECT;
4620 } else {
4621 pci_set_master(pdev);
4622 pci_restore_state(pdev);
bc7f75fa 4623
111b9dc5
JB		 4624 pci_enable_wake(pdev, PCI_D3hot, 0);
4625 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 4626
111b9dc5
JB		 4627 e1000e_reset(adapter);
4628 ew32(WUS, ~0);
4629 result = PCI_ERS_RESULT_RECOVERED;
4630 }
bc7f75fa 4631
111b9dc5
JB		 4632 pci_cleanup_aer_uncorrect_error_status(pdev);
4633
4634 return result;
bc7f75fa
AK		 4635}
4636
4637/**
4638 * e1000_io_resume - called when traffic can start flowing again.
4639 * @pdev: Pointer to PCI device
4640 *
4641 * This callback is called when the error recovery driver tells us that
4642 * its OK to resume normal operation. Implementation resembles the
4643 * second-half of the e1000_resume routine.
4644 */
4645static void e1000_io_resume(struct pci_dev *pdev)
4646{
4647 struct net_device *netdev = pci_get_drvdata(pdev);
4648 struct e1000_adapter *adapter = netdev_priv(netdev);
4649
4650 e1000_init_manageability(adapter);
4651
4652 if (netif_running(netdev)) {
4653 if (e1000e_up(adapter)) {
4654 dev_err(&pdev->dev,
4655 "can't bring device back up after reset\n");
4656 return;
4657 }
4658 }
4659
4660 netif_device_attach(netdev);
4661
ad68076e
BA		 4662 /*
4663 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4664 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4665 * under the control of the driver.
4666 */
c43bc57e 4667 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4668 e1000_get_hw_control(adapter);
4669
4670}
4671
4672static void e1000_print_device_info(struct e1000_adapter *adapter)
4673{
4674 struct e1000_hw *hw = &adapter->hw;
4675 struct net_device *netdev = adapter->netdev;
69e3fd8c 4676 u32 pba_num;
bc7f75fa
AK		 4677
4678 /* print bus type/speed/width info */
7c510e4b 4679 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 4680 /* bus width */
4681 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4682 "Width x1"),
4683 /* MAC address */
7c510e4b 4684 netdev->dev_addr);
44defeb3
JK		 4685 e_info("Intel(R) PRO/%s Network Connection\n",
4686 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4687 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 4688 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4689 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 4690}
4691
10aa4c04
AK		 4692static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4693{
4694 struct e1000_hw *hw = &adapter->hw;
4695 int ret_val;
4696 u16 buf = 0;
4697
4698 if (hw->mac.type != e1000_82573)
4699 return;
4700
4701 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 4702 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 4703 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 4704 dev_warn(&adapter->pdev->dev,
4705 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04
AK		 4706 }
4707
4708 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
e243455d 4709 if (!ret_val && (le16_to_cpu(buf) & (3 << 2))) {
10aa4c04 4710 /* ASPM enable */
6c2a9efa
FP		 4711 dev_warn(&adapter->pdev->dev,
4712 "Warning: detected ASPM enabled in EEPROM\n");
10aa4c04
AK		 4713 }
4714}
4715
651c2466
SH		 4716static const struct net_device_ops e1000e_netdev_ops = {
4717 .ndo_open = e1000_open,
4718 .ndo_stop = e1000_close,
00829823 4719 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 4720 .ndo_get_stats = e1000_get_stats,
4721 .ndo_set_multicast_list = e1000_set_multi,
4722 .ndo_set_mac_address = e1000_set_mac,
4723 .ndo_change_mtu = e1000_change_mtu,
4724 .ndo_do_ioctl = e1000_ioctl,
4725 .ndo_tx_timeout = e1000_tx_timeout,
4726 .ndo_validate_addr = eth_validate_addr,
4727
4728 .ndo_vlan_rx_register = e1000_vlan_rx_register,
4729 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
4730 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
4731#ifdef CONFIG_NET_POLL_CONTROLLER
4732 .ndo_poll_controller = e1000_netpoll,
4733#endif
4734};
4735
bc7f75fa
AK		 4736/**
4737 * e1000_probe - Device Initialization Routine
4738 * @pdev: PCI device information struct
4739 * @ent: entry in e1000_pci_tbl
4740 *
4741 * Returns 0 on success, negative on failure
4742 *
4743 * e1000_probe initializes an adapter identified by a pci_dev structure.
4744 * The OS initialization, configuring of the adapter private structure,
4745 * and a hardware reset occur.
4746 **/
4747static int __devinit e1000_probe(struct pci_dev *pdev,
4748 const struct pci_device_id *ent)
4749{
4750 struct net_device *netdev;
4751 struct e1000_adapter *adapter;
4752 struct e1000_hw *hw;
4753 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 4754 resource_size_t mmio_start, mmio_len;
4755 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 4756
4757 static int cards_found;
4758 int i, err, pci_using_dac;
4759 u16 eeprom_data = 0;
4760 u16 eeprom_apme_mask = E1000_EEPROM_APME;
4761
1eae4eb2 4762 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4763
f0f422e5 4764 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4765 if (err)
4766 return err;
4767
4768 pci_using_dac = 0;
4769 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
4770 if (!err) {
4771 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
4772 if (!err)
4773 pci_using_dac = 1;
4774 } else {
4775 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4776 if (err) {
4777 err = pci_set_consistent_dma_mask(pdev,
4778 DMA_32BIT_MASK);
4779 if (err) {
4780 dev_err(&pdev->dev, "No usable DMA "
4781 "configuration, aborting\n");
4782 goto err_dma;
4783 }
4784 }
4785 }
4786
e8de1481 4787 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 4788 pci_select_bars(pdev, IORESOURCE_MEM),
4789 e1000e_driver_name);
bc7f75fa
AK		 4790 if (err)
4791 goto err_pci_reg;
4792
4793 pci_set_master(pdev);
438b365a
BA		 4794 /* PCI config space info */
4795 err = pci_save_state(pdev);
4796 if (err)
4797 goto err_alloc_etherdev;
bc7f75fa
AK		 4798
4799 err = -ENOMEM;
4800 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
4801 if (!netdev)
4802 goto err_alloc_etherdev;
4803
bc7f75fa
AK		 4804 SET_NETDEV_DEV(netdev, &pdev->dev);
4805
4806 pci_set_drvdata(pdev, netdev);
4807 adapter = netdev_priv(netdev);
4808 hw = &adapter->hw;
4809 adapter->netdev = netdev;
4810 adapter->pdev = pdev;
4811 adapter->ei = ei;
4812 adapter->pba = ei->pba;
4813 adapter->flags = ei->flags;
eb7c3adb 4814 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 4815 adapter->hw.adapter = adapter;
4816 adapter->hw.mac.type = ei->mac;
4817 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
4818
4819 mmio_start = pci_resource_start(pdev, 0);
4820 mmio_len = pci_resource_len(pdev, 0);
4821
4822 err = -EIO;
4823 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
4824 if (!adapter->hw.hw_addr)
4825 goto err_ioremap;
4826
4827 if ((adapter->flags & FLAG_HAS_FLASH) &&
4828 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
4829 flash_start = pci_resource_start(pdev, 1);
4830 flash_len = pci_resource_len(pdev, 1);
4831 adapter->hw.flash_address = ioremap(flash_start, flash_len);
4832 if (!adapter->hw.flash_address)
4833 goto err_flashmap;
4834 }
4835
4836 /* construct the net_device struct */
651c2466 4837 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 4838 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 4839 netdev->watchdog_timeo = 5 * HZ;
4840 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 4841 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
4842
4843 netdev->mem_start = mmio_start;
4844 netdev->mem_end = mmio_start + mmio_len;
4845
4846 adapter->bd_number = cards_found++;
4847
4662e82b
BA		 4848 e1000e_check_options(adapter);
4849
bc7f75fa
AK		 4850 /* setup adapter struct */
4851 err = e1000_sw_init(adapter);
4852 if (err)
4853 goto err_sw_init;
4854
4855 err = -EIO;
4856
4857 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
4858 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
4859 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
4860
69e3fd8c 4861 err = ei->get_variants(adapter);
bc7f75fa
AK		 4862 if (err)
4863 goto err_hw_init;
4864
4a770358
BA		 4865 if ((adapter->flags & FLAG_IS_ICH) &&
4866 (adapter->flags & FLAG_READ_ONLY_NVM))
4867 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
4868
bc7f75fa
AK		 4869 hw->mac.ops.get_bus_info(&adapter->hw);
4870
318a94d6 4871 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 4872
4873 /* Copper options */
318a94d6 4874 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 4875 adapter->hw.phy.mdix = AUTO_ALL_MODES;
4876 adapter->hw.phy.disable_polarity_correction = 0;
4877 adapter->hw.phy.ms_type = e1000_ms_hw_default;
4878 }
4879
4880 if (e1000_check_reset_block(&adapter->hw))
44defeb3 4881 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 4882
4883 netdev->features = NETIF_F_SG |
4884 NETIF_F_HW_CSUM |
4885 NETIF_F_HW_VLAN_TX |
4886 NETIF_F_HW_VLAN_RX;
4887
4888 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
4889 netdev->features |= NETIF_F_HW_VLAN_FILTER;
4890
4891 netdev->features |= NETIF_F_TSO;
4892 netdev->features |= NETIF_F_TSO6;
4893
a5136e23
JK		 4894 netdev->vlan_features |= NETIF_F_TSO;
4895 netdev->vlan_features |= NETIF_F_TSO6;
4896 netdev->vlan_features |= NETIF_F_HW_CSUM;
4897 netdev->vlan_features |= NETIF_F_SG;
4898
bc7f75fa
AK		 4899 if (pci_using_dac)
4900 netdev->features |= NETIF_F_HIGHDMA;
4901
bc7f75fa
AK		 4902 if (e1000e_enable_mng_pass_thru(&adapter->hw))
4903 adapter->flags |= FLAG_MNG_PT_ENABLED;
4904
ad68076e
BA		 4905 /*
4906 * before reading the NVM, reset the controller to
4907 * put the device in a known good starting state
4908 */
bc7f75fa
AK		 4909 adapter->hw.mac.ops.reset_hw(&adapter->hw);
4910
4911 /*
4912 * systems with ASPM and others may see the checksum fail on the first
4913 * attempt. Let's give it a few tries
4914 */
4915 for (i = 0;; i++) {
4916 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
4917 break;
4918 if (i == 2) {
44defeb3 4919 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 4920 err = -EIO;
4921 goto err_eeprom;
4922 }
4923 }
4924
10aa4c04
AK		 4925 e1000_eeprom_checks(adapter);
4926
bc7f75fa
AK		 4927 /* copy the MAC address out of the NVM */
4928 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 4929 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 4930
4931 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
4932 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
4933
4934 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 4935 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 4936 err = -EIO;
4937 goto err_eeprom;
4938 }
4939
4940 init_timer(&adapter->watchdog_timer);
4941 adapter->watchdog_timer.function = &e1000_watchdog;
4942 adapter->watchdog_timer.data = (unsigned long) adapter;
4943
4944 init_timer(&adapter->phy_info_timer);
4945 adapter->phy_info_timer.function = &e1000_update_phy_info;
4946 adapter->phy_info_timer.data = (unsigned long) adapter;
4947
4948 INIT_WORK(&adapter->reset_task, e1000_reset_task);
4949 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 4950 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
4951 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
bc7f75fa 4952
bc7f75fa
AK		 4953 /* Initialize link parameters. User can change them with ethtool */
4954 adapter->hw.mac.autoneg = 1;
309af40b 4955 adapter->fc_autoneg = 1;
5c48ef3e
BA		 4956 adapter->hw.fc.requested_mode = e1000_fc_default;
4957 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 4958 adapter->hw.phy.autoneg_advertised = 0x2f;
4959
4960 /* ring size defaults */
4961 adapter->rx_ring->count = 256;
4962 adapter->tx_ring->count = 256;
4963
4964 /*
4965 * Initial Wake on LAN setting - If APM wake is enabled in
4966 * the EEPROM, enable the ACPI Magic Packet filter
4967 */
4968 if (adapter->flags & FLAG_APME_IN_WUC) {
4969 /* APME bit in EEPROM is mapped to WUC.APME */
4970 eeprom_data = er32(WUC);
4971 eeprom_apme_mask = E1000_WUC_APME;
4972 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
4973 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
4974 (adapter->hw.bus.func == 1))
4975 e1000_read_nvm(&adapter->hw,
4976 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
4977 else
4978 e1000_read_nvm(&adapter->hw,
4979 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
4980 }
4981
4982 /* fetch WoL from EEPROM */
4983 if (eeprom_data & eeprom_apme_mask)
4984 adapter->eeprom_wol |= E1000_WUFC_MAG;
4985
4986 /*
4987 * now that we have the eeprom settings, apply the special cases
4988 * where the eeprom may be wrong or the board simply won't support
4989 * wake on lan on a particular port
4990 */
4991 if (!(adapter->flags & FLAG_HAS_WOL))
4992 adapter->eeprom_wol = 0;
4993
4994 /* initialize the wol settings based on the eeprom settings */
4995 adapter->wol = adapter->eeprom_wol;
6ff68026 4996 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 4997
84527590
BA		 4998 /* save off EEPROM version number */
4999 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5000
bc7f75fa
AK		 5001 /* reset the hardware with the new settings */
5002 e1000e_reset(adapter);
5003
ad68076e
BA		 5004 /*
5005 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5006 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5007 * under the control of the driver.
5008 */
c43bc57e 5009 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5010 e1000_get_hw_control(adapter);
5011
5012 /* tell the stack to leave us alone until e1000_open() is called */
5013 netif_carrier_off(netdev);
d55b53ff 5014 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK		 5015
5016 strcpy(netdev->name, "eth%d");
5017 err = register_netdev(netdev);
5018 if (err)
5019 goto err_register;
5020
5021 e1000_print_device_info(adapter);
5022
5023 return 0;
5024
5025err_register:
c43bc57e
JB		 5026 if (!(adapter->flags & FLAG_HAS_AMT))
5027 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5028err_eeprom:
5029 if (!e1000_check_reset_block(&adapter->hw))
5030 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5031err_hw_init:
bc7f75fa 5032
bc7f75fa
AK		 5033 kfree(adapter->tx_ring);
5034 kfree(adapter->rx_ring);
5035err_sw_init:
c43bc57e
JB		 5036 if (adapter->hw.flash_address)
5037 iounmap(adapter->hw.flash_address);
e82f54ba 5038 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5039err_flashmap:
bc7f75fa
AK		 5040 iounmap(adapter->hw.hw_addr);
5041err_ioremap:
5042 free_netdev(netdev);
5043err_alloc_etherdev:
f0f422e5
BA		 5044 pci_release_selected_regions(pdev,
5045 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5046err_pci_reg:
5047err_dma:
5048 pci_disable_device(pdev);
5049 return err;
5050}
5051
5052/**
5053 * e1000_remove - Device Removal Routine
5054 * @pdev: PCI device information struct
5055 *
5056 * e1000_remove is called by the PCI subsystem to alert the driver
5057 * that it should release a PCI device. The could be caused by a
5058 * Hot-Plug event, or because the driver is going to be removed from
5059 * memory.
5060 **/
5061static void __devexit e1000_remove(struct pci_dev *pdev)
5062{
5063 struct net_device *netdev = pci_get_drvdata(pdev);
5064 struct e1000_adapter *adapter = netdev_priv(netdev);
111b9dc5 5065 int err;
bc7f75fa 5066
ad68076e
BA		 5067 /*
5068 * flush_scheduled work may reschedule our watchdog task, so
5069 * explicitly disable watchdog tasks from being rescheduled
5070 */
bc7f75fa
AK		 5071 set_bit(__E1000_DOWN, &adapter->state);
5072 del_timer_sync(&adapter->watchdog_timer);
5073 del_timer_sync(&adapter->phy_info_timer);
5074
5075 flush_scheduled_work();
5076
ad68076e
BA		 5077 /*
5078 * Release control of h/w to f/w. If f/w is AMT enabled, this
5079 * would have already happened in close and is redundant.
5080 */
bc7f75fa
AK		 5081 e1000_release_hw_control(adapter);
5082
5083 unregister_netdev(netdev);
5084
5085 if (!e1000_check_reset_block(&adapter->hw))
5086 e1000_phy_hw_reset(&adapter->hw);
5087
4662e82b 5088 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5089 kfree(adapter->tx_ring);
5090 kfree(adapter->rx_ring);
5091
5092 iounmap(adapter->hw.hw_addr);
5093 if (adapter->hw.flash_address)
5094 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5095 pci_release_selected_regions(pdev,
5096 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5097
5098 free_netdev(netdev);
5099
111b9dc5
JB		 5100 /* AER disable */
5101 err = pci_disable_pcie_error_reporting(pdev);
5102 if (err)
5103 dev_err(&pdev->dev,
5104 "pci_disable_pcie_error_reporting failed 0x%x\n", err);
5105
bc7f75fa
AK		 5106 pci_disable_device(pdev);
5107}
5108
5109/* PCI Error Recovery (ERS) */
5110static struct pci_error_handlers e1000_err_handler = {
5111 .error_detected = e1000_io_error_detected,
5112 .slot_reset = e1000_io_slot_reset,
5113 .resume = e1000_io_resume,
5114};
5115
5116static struct pci_device_id e1000_pci_tbl[] = {
bc7f75fa
AK		 5117 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5118 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5119 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5120 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5121 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5122 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5123 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5124 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5125 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5126
bc7f75fa
AK		 5127 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5128 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5129 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5130 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5131
bc7f75fa
AK		 5132 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5133 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5134 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5135
4662e82b
BA		 5136 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
5137
bc7f75fa
AK		 5138 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5139 board_80003es2lan },
5140 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5141 board_80003es2lan },
5142 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5143 board_80003es2lan },
5144 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5145 board_80003es2lan },
ad68076e 5146
bc7f75fa
AK		 5147 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5148 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5149 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5150 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5151 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5152 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5153 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
ad68076e 5154
bc7f75fa
AK		 5155 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5156 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5157 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5158 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5159 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5160 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5161 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5162 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5163 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5164
5165 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5166 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5167 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5168
f4187b56
BA		 5169 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5170 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5171
bc7f75fa
AK		 5172 { } /* terminate list */
5173};
5174MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5175
5176/* PCI Device API Driver */
5177static struct pci_driver e1000_driver = {
5178 .name = e1000e_driver_name,
5179 .id_table = e1000_pci_tbl,
5180 .probe = e1000_probe,
5181 .remove = __devexit_p(e1000_remove),
5182#ifdef CONFIG_PM
ad68076e 5183 /* Power Management Hooks */
bc7f75fa
AK		 5184 .suspend = e1000_suspend,
5185 .resume = e1000_resume,
5186#endif
5187 .shutdown = e1000_shutdown,
5188 .err_handler = &e1000_err_handler
5189};
5190
5191/**
5192 * e1000_init_module - Driver Registration Routine
5193 *
5194 * e1000_init_module is the first routine called when the driver is
5195 * loaded. All it does is register with the PCI subsystem.
5196 **/
5197static int __init e1000_init_module(void)
5198{
5199 int ret;
5200 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
5201 e1000e_driver_name, e1000e_driver_version);
ad68076e 5202 printk(KERN_INFO "%s: Copyright (c) 1999-2008 Intel Corporation.\n",
bc7f75fa
AK		 5203 e1000e_driver_name);
5204 ret = pci_register_driver(&e1000_driver);
97ac8cae
BA		 5205 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name,
5206 PM_QOS_DEFAULT_VALUE);
5207
bc7f75fa
AK		 5208 return ret;
5209}
5210module_init(e1000_init_module);
5211
5212/**
5213 * e1000_exit_module - Driver Exit Cleanup Routine
5214 *
5215 * e1000_exit_module is called just before the driver is removed
5216 * from memory.
5217 **/
5218static void __exit e1000_exit_module(void)
5219{
5220 pci_unregister_driver(&e1000_driver);
97ac8cae 5221 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name);
bc7f75fa
AK		 5222}
5223module_exit(e1000_exit_module);
5224
5225
5226MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5227MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5228MODULE_LICENSE("GPL");
5229MODULE_VERSION(DRV_VERSION);
5230
5231/* e1000_main.c */
Linux 6.x block layer and io_uring tree(s)