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isdn: hisax: Use l2headersize() instead of dup (and buggy) func.
[linux-block.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
0d6057e4 4 Copyright(c) 1999 - 2011 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
bc7f75fa
AK		 42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
bc7f75fa
AK		 52
53#include "e1000.h"
54
c14c643b
BA		 55#define DRV_EXTRAVERSION "-k2"
56
c920aa8b 57#define DRV_VERSION "1.2.20" DRV_EXTRAVERSION
bc7f75fa
AK		 58char e1000e_driver_name[] = "e1000e";
59const char e1000e_driver_version[] = DRV_VERSION;
60
61static const struct e1000_info *e1000_info_tbl[] = {
62 [board_82571] = &e1000_82571_info,
63 [board_82572] = &e1000_82572_info,
64 [board_82573] = &e1000_82573_info,
4662e82b 65 [board_82574] = &e1000_82574_info,
8c81c9c3 66 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 67 [board_80003es2lan] = &e1000_es2_info,
68 [board_ich8lan] = &e1000_ich8_info,
69 [board_ich9lan] = &e1000_ich9_info,
f4187b56 70 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 71 [board_pchlan] = &e1000_pch_info,
d3738bb8 72 [board_pch2lan] = &e1000_pch2_info,
bc7f75fa
AK		 73};
74
84f4ee90
TI		 75struct e1000_reg_info {
76 u32 ofs;
77 char *name;
78};
79
af667a29
BA		 80#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
81#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
82#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
83#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
84#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
85
86#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
87#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
88#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
89#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
90#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
84f4ee90
TI		 91
92static const struct e1000_reg_info e1000_reg_info_tbl[] = {
93
94 /* General Registers */
95 {E1000_CTRL, "CTRL"},
96 {E1000_STATUS, "STATUS"},
97 {E1000_CTRL_EXT, "CTRL_EXT"},
98
99 /* Interrupt Registers */
100 {E1000_ICR, "ICR"},
101
af667a29 102 /* Rx Registers */
84f4ee90
TI		 103 {E1000_RCTL, "RCTL"},
104 {E1000_RDLEN, "RDLEN"},
105 {E1000_RDH, "RDH"},
106 {E1000_RDT, "RDT"},
107 {E1000_RDTR, "RDTR"},
108 {E1000_RXDCTL(0), "RXDCTL"},
109 {E1000_ERT, "ERT"},
110 {E1000_RDBAL, "RDBAL"},
111 {E1000_RDBAH, "RDBAH"},
112 {E1000_RDFH, "RDFH"},
113 {E1000_RDFT, "RDFT"},
114 {E1000_RDFHS, "RDFHS"},
115 {E1000_RDFTS, "RDFTS"},
116 {E1000_RDFPC, "RDFPC"},
117
af667a29 118 /* Tx Registers */
84f4ee90
TI		 119 {E1000_TCTL, "TCTL"},
120 {E1000_TDBAL, "TDBAL"},
121 {E1000_TDBAH, "TDBAH"},
122 {E1000_TDLEN, "TDLEN"},
123 {E1000_TDH, "TDH"},
124 {E1000_TDT, "TDT"},
125 {E1000_TIDV, "TIDV"},
126 {E1000_TXDCTL(0), "TXDCTL"},
127 {E1000_TADV, "TADV"},
128 {E1000_TARC(0), "TARC"},
129 {E1000_TDFH, "TDFH"},
130 {E1000_TDFT, "TDFT"},
131 {E1000_TDFHS, "TDFHS"},
132 {E1000_TDFTS, "TDFTS"},
133 {E1000_TDFPC, "TDFPC"},
134
135 /* List Terminator */
136 {}
137};
138
139/*
140 * e1000_regdump - register printout routine
141 */
142static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
143{
144 int n = 0;
145 char rname[16];
146 u32 regs[8];
147
148 switch (reginfo->ofs) {
149 case E1000_RXDCTL(0):
150 for (n = 0; n < 2; n++)
151 regs[n] = __er32(hw, E1000_RXDCTL(n));
152 break;
153 case E1000_TXDCTL(0):
154 for (n = 0; n < 2; n++)
155 regs[n] = __er32(hw, E1000_TXDCTL(n));
156 break;
157 case E1000_TARC(0):
158 for (n = 0; n < 2; n++)
159 regs[n] = __er32(hw, E1000_TARC(n));
160 break;
161 default:
162 printk(KERN_INFO "%-15s %08x\n",
af667a29 163 reginfo->name, __er32(hw, reginfo->ofs));
84f4ee90
TI		 164 return;
165 }
166
167 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
168 printk(KERN_INFO "%-15s ", rname);
169 for (n = 0; n < 2; n++)
170 printk(KERN_CONT "%08x ", regs[n]);
171 printk(KERN_CONT "\n");
172}
173
84f4ee90 174/*
af667a29 175 * e1000e_dump - Print registers, Tx-ring and Rx-ring
84f4ee90
TI		 176 */
177static void e1000e_dump(struct e1000_adapter *adapter)
178{
179 struct net_device *netdev = adapter->netdev;
180 struct e1000_hw *hw = &adapter->hw;
181 struct e1000_reg_info *reginfo;
182 struct e1000_ring *tx_ring = adapter->tx_ring;
183 struct e1000_tx_desc *tx_desc;
af667a29
BA		 184 struct my_u0 {
185 u64 a;
186 u64 b;
187 } *u0;
84f4ee90
TI		 188 struct e1000_buffer *buffer_info;
189 struct e1000_ring *rx_ring = adapter->rx_ring;
190 union e1000_rx_desc_packet_split *rx_desc_ps;
191 struct e1000_rx_desc *rx_desc;
af667a29
BA		 192 struct my_u1 {
193 u64 a;
194 u64 b;
195 u64 c;
196 u64 d;
197 } *u1;
84f4ee90
TI		 198 u32 staterr;
199 int i = 0;
200
201 if (!netif_msg_hw(adapter))
202 return;
203
204 /* Print netdevice Info */
205 if (netdev) {
206 dev_info(&adapter->pdev->dev, "Net device Info\n");
207 printk(KERN_INFO "Device Name state "
af667a29 208 "trans_start last_rx\n");
84f4ee90 209 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
af667a29
BA		 210 netdev->name, netdev->state, netdev->trans_start,
211 netdev->last_rx);
84f4ee90
TI		 212 }
213
214 /* Print Registers */
215 dev_info(&adapter->pdev->dev, "Register Dump\n");
216 printk(KERN_INFO " Register Name Value\n");
217 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
218 reginfo->name; reginfo++) {
219 e1000_regdump(hw, reginfo);
220 }
221
af667a29 222 /* Print Tx Ring Summary */
84f4ee90
TI		 223 if (!netdev || !netif_running(netdev))
224 goto exit;
225
af667a29 226 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
84f4ee90 227 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
af667a29 228 " leng ntw timestamp\n");
84f4ee90
TI		 229 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
230 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
af667a29
BA		 231 0, tx_ring->next_to_use, tx_ring->next_to_clean,
232 (unsigned long long)buffer_info->dma,
233 buffer_info->length,
234 buffer_info->next_to_watch,
235 (unsigned long long)buffer_info->time_stamp);
84f4ee90 236
af667a29 237 /* Print Tx Ring */
84f4ee90
TI		 238 if (!netif_msg_tx_done(adapter))
239 goto rx_ring_summary;
240
af667a29 241 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
84f4ee90
TI		 242
243 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
244 *
245 * Legacy Transmit Descriptor
246 * +--------------------------------------------------------------+
247 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
248 * +--------------------------------------------------------------+
249 * 8 | Special | CSS | Status | CMD | CSO | Length |
250 * +--------------------------------------------------------------+
251 * 63 48 47 36 35 32 31 24 23 16 15 0
252 *
253 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
254 * 63 48 47 40 39 32 31 16 15 8 7 0
255 * +----------------------------------------------------------------+
256 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
257 * +----------------------------------------------------------------+
258 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
259 * +----------------------------------------------------------------+
260 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
261 *
262 * Extended Data Descriptor (DTYP=0x1)
263 * +----------------------------------------------------------------+
264 * 0 | Buffer Address [63:0] |
265 * +----------------------------------------------------------------+
266 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
267 * +----------------------------------------------------------------+
268 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
269 */
270 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
af667a29
BA		 271 " [bi->dma ] leng ntw timestamp bi->skb "
272 "<-- Legacy format\n");
84f4ee90 273 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
af667a29
BA		 274 " [bi->dma ] leng ntw timestamp bi->skb "
275 "<-- Ext Context format\n");
84f4ee90 276 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
af667a29
BA		 277 " [bi->dma ] leng ntw timestamp bi->skb "
278 "<-- Ext Data format\n");
84f4ee90
TI		 279 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
280 tx_desc = E1000_TX_DESC(*tx_ring, i);
281 buffer_info = &tx_ring->buffer_info[i];
282 u0 = (struct my_u0 *)tx_desc;
283 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
af667a29
BA		 284 "%04X %3X %016llX %p",
285 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
286 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), i,
8eb64e6b
BA		 287 (unsigned long long)le64_to_cpu(u0->a),
288 (unsigned long long)le64_to_cpu(u0->b),
289 (unsigned long long)buffer_info->dma,
290 buffer_info->length, buffer_info->next_to_watch,
291 (unsigned long long)buffer_info->time_stamp,
84f4ee90
TI		 292 buffer_info->skb);
293 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
294 printk(KERN_CONT " NTC/U\n");
295 else if (i == tx_ring->next_to_use)
296 printk(KERN_CONT " NTU\n");
297 else if (i == tx_ring->next_to_clean)
298 printk(KERN_CONT " NTC\n");
299 else
300 printk(KERN_CONT "\n");
301
302 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
303 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
af667a29
BA		 304 16, 1, phys_to_virt(buffer_info->dma),
305 buffer_info->length, true);
84f4ee90
TI		 306 }
307
af667a29 308 /* Print Rx Ring Summary */
84f4ee90 309rx_ring_summary:
af667a29 310 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
84f4ee90
TI		 311 printk(KERN_INFO "Queue [NTU] [NTC]\n");
312 printk(KERN_INFO " %5d %5X %5X\n", 0,
af667a29 313 rx_ring->next_to_use, rx_ring->next_to_clean);
84f4ee90 314
af667a29 315 /* Print Rx Ring */
84f4ee90
TI		 316 if (!netif_msg_rx_status(adapter))
317 goto exit;
318
af667a29 319 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
84f4ee90
TI		 320 switch (adapter->rx_ps_pages) {
321 case 1:
322 case 2:
323 case 3:
324 /* [Extended] Packet Split Receive Descriptor Format
325 *
326 * +-----------------------------------------------------+
327 * 0 | Buffer Address 0 [63:0] |
328 * +-----------------------------------------------------+
329 * 8 | Buffer Address 1 [63:0] |
330 * +-----------------------------------------------------+
331 * 16 | Buffer Address 2 [63:0] |
332 * +-----------------------------------------------------+
333 * 24 | Buffer Address 3 [63:0] |
334 * +-----------------------------------------------------+
335 */
336 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
af667a29 337 "[buffer 1 63:0 ] "
84f4ee90
TI		 338 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
339 "[bi->skb] <-- Ext Pkt Split format\n");
340 /* [Extended] Receive Descriptor (Write-Back) Format
341 *
342 * 63 48 47 32 31 13 12 8 7 4 3 0
343 * +------------------------------------------------------+
344 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
345 * | Checksum | Ident | | Queue | | Type |
346 * +------------------------------------------------------+
347 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
348 * +------------------------------------------------------+
349 * 63 48 47 32 31 20 19 0
350 */
351 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
af667a29 352 "[vl l0 ee es] "
84f4ee90
TI		 353 "[ l3 l2 l1 hs] [reserved ] ---------------- "
354 "[bi->skb] <-- Ext Rx Write-Back format\n");
355 for (i = 0; i < rx_ring->count; i++) {
356 buffer_info = &rx_ring->buffer_info[i];
357 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
358 u1 = (struct my_u1 *)rx_desc_ps;
359 staterr =
af667a29 360 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
84f4ee90
TI		 361 if (staterr & E1000_RXD_STAT_DD) {
362 /* Descriptor Done */
363 printk(KERN_INFO "RWB[0x%03X] %016llX "
af667a29
BA		 364 "%016llX %016llX %016llX "
365 "---------------- %p", i,
366 (unsigned long long)le64_to_cpu(u1->a),
367 (unsigned long long)le64_to_cpu(u1->b),
368 (unsigned long long)le64_to_cpu(u1->c),
369 (unsigned long long)le64_to_cpu(u1->d),
370 buffer_info->skb);
84f4ee90
TI		 371 } else {
372 printk(KERN_INFO "R [0x%03X] %016llX "
af667a29
BA		 373 "%016llX %016llX %016llX %016llX %p", i,
374 (unsigned long long)le64_to_cpu(u1->a),
375 (unsigned long long)le64_to_cpu(u1->b),
376 (unsigned long long)le64_to_cpu(u1->c),
377 (unsigned long long)le64_to_cpu(u1->d),
378 (unsigned long long)buffer_info->dma,
379 buffer_info->skb);
84f4ee90
TI		 380
381 if (netif_msg_pktdata(adapter))
382 print_hex_dump(KERN_INFO, "",
383 DUMP_PREFIX_ADDRESS, 16, 1,
384 phys_to_virt(buffer_info->dma),
385 adapter->rx_ps_bsize0, true);
386 }
387
388 if (i == rx_ring->next_to_use)
389 printk(KERN_CONT " NTU\n");
390 else if (i == rx_ring->next_to_clean)
391 printk(KERN_CONT " NTC\n");
392 else
393 printk(KERN_CONT "\n");
394 }
395 break;
396 default:
397 case 0:
398 /* Legacy Receive Descriptor Format
399 *
400 * +-----------------------------------------------------+
401 * | Buffer Address [63:0] |
402 * +-----------------------------------------------------+
403 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
404 * +-----------------------------------------------------+
405 * 63 48 47 40 39 32 31 16 15 0
406 */
407 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
af667a29
BA		 408 "[vl er S cks ln] [bi->dma ] [bi->skb] "
409 "<-- Legacy format\n");
84f4ee90
TI		 410 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
411 rx_desc = E1000_RX_DESC(*rx_ring, i);
412 buffer_info = &rx_ring->buffer_info[i];
413 u0 = (struct my_u0 *)rx_desc;
414 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
af667a29
BA		 415 "%016llX %p", i,
416 (unsigned long long)le64_to_cpu(u0->a),
417 (unsigned long long)le64_to_cpu(u0->b),
418 (unsigned long long)buffer_info->dma,
419 buffer_info->skb);
84f4ee90
TI		 420 if (i == rx_ring->next_to_use)
421 printk(KERN_CONT " NTU\n");
422 else if (i == rx_ring->next_to_clean)
423 printk(KERN_CONT " NTC\n");
424 else
425 printk(KERN_CONT "\n");
426
427 if (netif_msg_pktdata(adapter))
428 print_hex_dump(KERN_INFO, "",
af667a29
BA		 429 DUMP_PREFIX_ADDRESS,
430 16, 1,
431 phys_to_virt(buffer_info->dma),
432 adapter->rx_buffer_len, true);
84f4ee90
TI		 433 }
434 }
435
436exit:
437 return;
438}
439
bc7f75fa
AK		 440/**
441 * e1000_desc_unused - calculate if we have unused descriptors
442 **/
443static int e1000_desc_unused(struct e1000_ring *ring)
444{
445 if (ring->next_to_clean > ring->next_to_use)
446 return ring->next_to_clean - ring->next_to_use - 1;
447
448 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
449}
450
451/**
ad68076e 452 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 453 * @adapter: board private structure
454 * @status: descriptor status field as written by hardware
455 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
456 * @skb: pointer to sk_buff to be indicated to stack
457 **/
458static void e1000_receive_skb(struct e1000_adapter *adapter,
af667a29 459 struct net_device *netdev, struct sk_buff *skb,
a39fe742 460 u8 status, __le16 vlan)
bc7f75fa
AK		 461{
462 skb->protocol = eth_type_trans(skb, netdev);
463
464 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 465 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
466 le16_to_cpu(vlan), skb);
bc7f75fa 467 else
89c88b16 468 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 469}
470
471/**
af667a29 472 * e1000_rx_checksum - Receive Checksum Offload
bc7f75fa
AK		 473 * @adapter: board private structure
474 * @status_err: receive descriptor status and error fields
475 * @csum: receive descriptor csum field
476 * @sk_buff: socket buffer with received data
477 **/
478static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
479 u32 csum, struct sk_buff *skb)
480{
481 u16 status = (u16)status_err;
482 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 483
484 skb_checksum_none_assert(skb);
bc7f75fa
AK		 485
486 /* Ignore Checksum bit is set */
487 if (status & E1000_RXD_STAT_IXSM)
488 return;
489 /* TCP/UDP checksum error bit is set */
490 if (errors & E1000_RXD_ERR_TCPE) {
491 /* let the stack verify checksum errors */
492 adapter->hw_csum_err++;
493 return;
494 }
495
496 /* TCP/UDP Checksum has not been calculated */
497 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
498 return;
499
500 /* It must be a TCP or UDP packet with a valid checksum */
501 if (status & E1000_RXD_STAT_TCPCS) {
502 /* TCP checksum is good */
503 skb->ip_summed = CHECKSUM_UNNECESSARY;
504 } else {
ad68076e
BA		 505 /*
506 * IP fragment with UDP payload
507 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 508 * and then put the value in host order for further stack use.
509 */
a39fe742
AV		 510 __sum16 sum = (__force __sum16)htons(csum);
511 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 512 skb->ip_summed = CHECKSUM_COMPLETE;
513 }
514 adapter->hw_csum_good++;
515}
516
517/**
518 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
519 * @adapter: address of board private structure
520 **/
521static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
522 int cleaned_count)
523{
524 struct net_device *netdev = adapter->netdev;
525 struct pci_dev *pdev = adapter->pdev;
526 struct e1000_ring *rx_ring = adapter->rx_ring;
527 struct e1000_rx_desc *rx_desc;
528 struct e1000_buffer *buffer_info;
529 struct sk_buff *skb;
530 unsigned int i;
89d71a66 531 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 532
533 i = rx_ring->next_to_use;
534 buffer_info = &rx_ring->buffer_info[i];
535
536 while (cleaned_count--) {
537 skb = buffer_info->skb;
538 if (skb) {
539 skb_trim(skb, 0);
540 goto map_skb;
541 }
542
89d71a66 543 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 544 if (!skb) {
545 /* Better luck next round */
546 adapter->alloc_rx_buff_failed++;
547 break;
548 }
549
bc7f75fa
AK		 550 buffer_info->skb = skb;
551map_skb:
0be3f55f 552 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 553 adapter->rx_buffer_len,
0be3f55f
NN		 554 DMA_FROM_DEVICE);
555 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
af667a29 556 dev_err(&pdev->dev, "Rx DMA map failed\n");
bc7f75fa
AK		 557 adapter->rx_dma_failed++;
558 break;
559 }
560
561 rx_desc = E1000_RX_DESC(*rx_ring, i);
562 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
563
50849d79
TH		 564 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
565 /*
566 * Force memory writes to complete before letting h/w
567 * know there are new descriptors to fetch. (Only
568 * applicable for weak-ordered memory model archs,
569 * such as IA-64).
570 */
571 wmb();
572 writel(i, adapter->hw.hw_addr + rx_ring->tail);
573 }
bc7f75fa
AK		 574 i++;
575 if (i == rx_ring->count)
576 i = 0;
577 buffer_info = &rx_ring->buffer_info[i];
578 }
579
50849d79 580 rx_ring->next_to_use = i;
bc7f75fa
AK		 581}
582
583/**
584 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
585 * @adapter: address of board private structure
586 **/
587static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
588 int cleaned_count)
589{
590 struct net_device *netdev = adapter->netdev;
591 struct pci_dev *pdev = adapter->pdev;
592 union e1000_rx_desc_packet_split *rx_desc;
593 struct e1000_ring *rx_ring = adapter->rx_ring;
594 struct e1000_buffer *buffer_info;
595 struct e1000_ps_page *ps_page;
596 struct sk_buff *skb;
597 unsigned int i, j;
598
599 i = rx_ring->next_to_use;
600 buffer_info = &rx_ring->buffer_info[i];
601
602 while (cleaned_count--) {
603 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
604
605 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 606 ps_page = &buffer_info->ps_pages[j];
607 if (j >= adapter->rx_ps_pages) {
608 /* all unused desc entries get hw null ptr */
af667a29
BA		 609 rx_desc->read.buffer_addr[j + 1] =
610 ~cpu_to_le64(0);
47f44e40
AK		 611 continue;
612 }
613 if (!ps_page->page) {
614 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 615 if (!ps_page->page) {
47f44e40
AK		 616 adapter->alloc_rx_buff_failed++;
617 goto no_buffers;
618 }
0be3f55f
NN		 619 ps_page->dma = dma_map_page(&pdev->dev,
620 ps_page->page,
621 0, PAGE_SIZE,
622 DMA_FROM_DEVICE);
623 if (dma_mapping_error(&pdev->dev,
624 ps_page->dma)) {
47f44e40 625 dev_err(&adapter->pdev->dev,
af667a29 626 "Rx DMA page map failed\n");
47f44e40
AK		 627 adapter->rx_dma_failed++;
628 goto no_buffers;
bc7f75fa 629 }
bc7f75fa 630 }
47f44e40
AK		 631 /*
632 * Refresh the desc even if buffer_addrs
633 * didn't change because each write-back
634 * erases this info.
635 */
af667a29
BA		 636 rx_desc->read.buffer_addr[j + 1] =
637 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 638 }
639
89d71a66
ED		 640 skb = netdev_alloc_skb_ip_align(netdev,
641 adapter->rx_ps_bsize0);
bc7f75fa
AK		 642
643 if (!skb) {
644 adapter->alloc_rx_buff_failed++;
645 break;
646 }
647
bc7f75fa 648 buffer_info->skb = skb;
0be3f55f 649 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 650 adapter->rx_ps_bsize0,
0be3f55f
NN		 651 DMA_FROM_DEVICE);
652 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
af667a29 653 dev_err(&pdev->dev, "Rx DMA map failed\n");
bc7f75fa
AK		 654 adapter->rx_dma_failed++;
655 /* cleanup skb */
656 dev_kfree_skb_any(skb);
657 buffer_info->skb = NULL;
658 break;
659 }
660
661 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
662
50849d79
TH		 663 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
664 /*
665 * Force memory writes to complete before letting h/w
666 * know there are new descriptors to fetch. (Only
667 * applicable for weak-ordered memory model archs,
668 * such as IA-64).
669 */
670 wmb();
af667a29 671 writel(i << 1, adapter->hw.hw_addr + rx_ring->tail);
50849d79
TH		 672 }
673
bc7f75fa
AK		 674 i++;
675 if (i == rx_ring->count)
676 i = 0;
677 buffer_info = &rx_ring->buffer_info[i];
678 }
679
680no_buffers:
50849d79 681 rx_ring->next_to_use = i;
bc7f75fa
AK		 682}
683
97ac8cae
BA		 684/**
685 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
686 * @adapter: address of board private structure
97ac8cae
BA		 687 * @cleaned_count: number of buffers to allocate this pass
688 **/
689
690static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
691 int cleaned_count)
692{
693 struct net_device *netdev = adapter->netdev;
694 struct pci_dev *pdev = adapter->pdev;
695 struct e1000_rx_desc *rx_desc;
696 struct e1000_ring *rx_ring = adapter->rx_ring;
697 struct e1000_buffer *buffer_info;
698 struct sk_buff *skb;
699 unsigned int i;
89d71a66 700 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 701
702 i = rx_ring->next_to_use;
703 buffer_info = &rx_ring->buffer_info[i];
704
705 while (cleaned_count--) {
706 skb = buffer_info->skb;
707 if (skb) {
708 skb_trim(skb, 0);
709 goto check_page;
710 }
711
89d71a66 712 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 713 if (unlikely(!skb)) {
714 /* Better luck next round */
715 adapter->alloc_rx_buff_failed++;
716 break;
717 }
718
97ac8cae
BA		 719 buffer_info->skb = skb;
720check_page:
721 /* allocate a new page if necessary */
722 if (!buffer_info->page) {
723 buffer_info->page = alloc_page(GFP_ATOMIC);
724 if (unlikely(!buffer_info->page)) {
725 adapter->alloc_rx_buff_failed++;
726 break;
727 }
728 }
729
730 if (!buffer_info->dma)
0be3f55f 731 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 732 buffer_info->page, 0,
733 PAGE_SIZE,
0be3f55f 734 DMA_FROM_DEVICE);
97ac8cae
BA		 735
736 rx_desc = E1000_RX_DESC(*rx_ring, i);
737 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
738
739 if (unlikely(++i == rx_ring->count))
740 i = 0;
741 buffer_info = &rx_ring->buffer_info[i];
742 }
743
744 if (likely(rx_ring->next_to_use != i)) {
745 rx_ring->next_to_use = i;
746 if (unlikely(i-- == 0))
747 i = (rx_ring->count - 1);
748
749 /* Force memory writes to complete before letting h/w
750 * know there are new descriptors to fetch. (Only
751 * applicable for weak-ordered memory model archs,
752 * such as IA-64). */
753 wmb();
754 writel(i, adapter->hw.hw_addr + rx_ring->tail);
755 }
756}
757
bc7f75fa
AK		 758/**
759 * e1000_clean_rx_irq - Send received data up the network stack; legacy
760 * @adapter: board private structure
761 *
762 * the return value indicates whether actual cleaning was done, there
763 * is no guarantee that everything was cleaned
764 **/
765static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
766 int *work_done, int work_to_do)
767{
768 struct net_device *netdev = adapter->netdev;
769 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 770 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 771 struct e1000_ring *rx_ring = adapter->rx_ring;
772 struct e1000_rx_desc *rx_desc, *next_rxd;
773 struct e1000_buffer *buffer_info, *next_buffer;
774 u32 length;
775 unsigned int i;
776 int cleaned_count = 0;
777 bool cleaned = 0;
778 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
779
780 i = rx_ring->next_to_clean;
781 rx_desc = E1000_RX_DESC(*rx_ring, i);
782 buffer_info = &rx_ring->buffer_info[i];
783
784 while (rx_desc->status & E1000_RXD_STAT_DD) {
785 struct sk_buff *skb;
786 u8 status;
787
788 if (*work_done >= work_to_do)
789 break;
790 (*work_done)++;
2d0bb1c1 791 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 792
793 status = rx_desc->status;
794 skb = buffer_info->skb;
795 buffer_info->skb = NULL;
796
797 prefetch(skb->data - NET_IP_ALIGN);
798
799 i++;
800 if (i == rx_ring->count)
801 i = 0;
802 next_rxd = E1000_RX_DESC(*rx_ring, i);
803 prefetch(next_rxd);
804
805 next_buffer = &rx_ring->buffer_info[i];
806
807 cleaned = 1;
808 cleaned_count++;
0be3f55f 809 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 810 buffer_info->dma,
811 adapter->rx_buffer_len,
0be3f55f 812 DMA_FROM_DEVICE);
bc7f75fa
AK		 813 buffer_info->dma = 0;
814
815 length = le16_to_cpu(rx_desc->length);
816
b94b5028
JB		 817 /*
818 * !EOP means multiple descriptors were used to store a single
819 * packet, if that's the case we need to toss it. In fact, we
820 * need to toss every packet with the EOP bit clear and the
821 * next frame that _does_ have the EOP bit set, as it is by
822 * definition only a frame fragment
823 */
824 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
825 adapter->flags2 |= FLAG2_IS_DISCARDING;
826
827 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 828 /* All receives must fit into a single buffer */
3bb99fe2 829 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 830 /* recycle */
831 buffer_info->skb = skb;
b94b5028
JB		 832 if (status & E1000_RXD_STAT_EOP)
833 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 834 goto next_desc;
835 }
836
837 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
838 /* recycle */
839 buffer_info->skb = skb;
840 goto next_desc;
841 }
842
eb7c3adb
JK		 843 /* adjust length to remove Ethernet CRC */
844 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
845 length -= 4;
846
bc7f75fa
AK		 847 total_rx_bytes += length;
848 total_rx_packets++;
849
ad68076e
BA		 850 /*
851 * code added for copybreak, this should improve
bc7f75fa 852 * performance for small packets with large amounts
ad68076e
BA		 853 * of reassembly being done in the stack
854 */
bc7f75fa
AK		 855 if (length < copybreak) {
856 struct sk_buff *new_skb =
89d71a66 857 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 858 if (new_skb) {
808ff676
BA		 859 skb_copy_to_linear_data_offset(new_skb,
860 -NET_IP_ALIGN,
861 (skb->data -
862 NET_IP_ALIGN),
863 (length +
864 NET_IP_ALIGN));
bc7f75fa
AK		 865 /* save the skb in buffer_info as good */
866 buffer_info->skb = skb;
867 skb = new_skb;
868 }
869 /* else just continue with the old one */
870 }
871 /* end copybreak code */
872 skb_put(skb, length);
873
874 /* Receive Checksum Offload */
875 e1000_rx_checksum(adapter,
876 (u32)(status) |
877 ((u32)(rx_desc->errors) << 24),
878 le16_to_cpu(rx_desc->csum), skb);
879
880 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
881
882next_desc:
883 rx_desc->status = 0;
884
885 /* return some buffers to hardware, one at a time is too slow */
886 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
887 adapter->alloc_rx_buf(adapter, cleaned_count);
888 cleaned_count = 0;
889 }
890
891 /* use prefetched values */
892 rx_desc = next_rxd;
893 buffer_info = next_buffer;
894 }
895 rx_ring->next_to_clean = i;
896
897 cleaned_count = e1000_desc_unused(rx_ring);
898 if (cleaned_count)
899 adapter->alloc_rx_buf(adapter, cleaned_count);
900
bc7f75fa 901 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 902 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 903 netdev->stats.rx_bytes += total_rx_bytes;
904 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 905 return cleaned;
906}
907
bc7f75fa
AK		 908static void e1000_put_txbuf(struct e1000_adapter *adapter,
909 struct e1000_buffer *buffer_info)
910{
03b1320d
AD		 911 if (buffer_info->dma) {
912 if (buffer_info->mapped_as_page)
0be3f55f
NN		 913 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
914 buffer_info->length, DMA_TO_DEVICE);
03b1320d 915 else
0be3f55f
NN		 916 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
917 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 918 buffer_info->dma = 0;
919 }
bc7f75fa
AK		 920 if (buffer_info->skb) {
921 dev_kfree_skb_any(buffer_info->skb);
922 buffer_info->skb = NULL;
923 }
1b7719c4 924 buffer_info->time_stamp = 0;
bc7f75fa
AK		 925}
926
41cec6f1 927static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 928{
41cec6f1
BA		 929 struct e1000_adapter *adapter = container_of(work,
930 struct e1000_adapter,
931 print_hang_task);
bc7f75fa
AK		 932 struct e1000_ring *tx_ring = adapter->tx_ring;
933 unsigned int i = tx_ring->next_to_clean;
934 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
935 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 936 struct e1000_hw *hw = &adapter->hw;
937 u16 phy_status, phy_1000t_status, phy_ext_status;
938 u16 pci_status;
939
940 e1e_rphy(hw, PHY_STATUS, &phy_status);
941 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
942 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 943
41cec6f1
BA		 944 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
945
946 /* detected Hardware unit hang */
947 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 948 " TDH <%x>\n"
949 " TDT <%x>\n"
950 " next_to_use <%x>\n"
951 " next_to_clean <%x>\n"
952 "buffer_info[next_to_clean]:\n"
953 " time_stamp <%lx>\n"
954 " next_to_watch <%x>\n"
955 " jiffies <%lx>\n"
41cec6f1
BA		 956 " next_to_watch.status <%x>\n"
957 "MAC Status <%x>\n"
958 "PHY Status <%x>\n"
959 "PHY 1000BASE-T Status <%x>\n"
960 "PHY Extended Status <%x>\n"
961 "PCI Status <%x>\n",
44defeb3
JK		 962 readl(adapter->hw.hw_addr + tx_ring->head),
963 readl(adapter->hw.hw_addr + tx_ring->tail),
964 tx_ring->next_to_use,
965 tx_ring->next_to_clean,
966 tx_ring->buffer_info[eop].time_stamp,
967 eop,
968 jiffies,
41cec6f1
BA		 969 eop_desc->upper.fields.status,
970 er32(STATUS),
971 phy_status,
972 phy_1000t_status,
973 phy_ext_status,
974 pci_status);
bc7f75fa
AK		 975}
976
977/**
978 * e1000_clean_tx_irq - Reclaim resources after transmit completes
979 * @adapter: board private structure
980 *
981 * the return value indicates whether actual cleaning was done, there
982 * is no guarantee that everything was cleaned
983 **/
984static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
985{
986 struct net_device *netdev = adapter->netdev;
987 struct e1000_hw *hw = &adapter->hw;
988 struct e1000_ring *tx_ring = adapter->tx_ring;
989 struct e1000_tx_desc *tx_desc, *eop_desc;
990 struct e1000_buffer *buffer_info;
991 unsigned int i, eop;
992 unsigned int count = 0;
bc7f75fa
AK		 993 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
994
995 i = tx_ring->next_to_clean;
996 eop = tx_ring->buffer_info[i].next_to_watch;
997 eop_desc = E1000_TX_DESC(*tx_ring, eop);
998
12d04a3c
AD		 999 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1000 (count < tx_ring->count)) {
a86043c2 1001 bool cleaned = false;
2d0bb1c1 1002 rmb(); /* read buffer_info after eop_desc */
a86043c2 1003 for (; !cleaned; count++) {
bc7f75fa
AK		 1004 tx_desc = E1000_TX_DESC(*tx_ring, i);
1005 buffer_info = &tx_ring->buffer_info[i];
1006 cleaned = (i == eop);
1007
1008 if (cleaned) {
9ed318d5
TH		 1009 total_tx_packets += buffer_info->segs;
1010 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK		 1011 }
1012
1013 e1000_put_txbuf(adapter, buffer_info);
1014 tx_desc->upper.data = 0;
1015
1016 i++;
1017 if (i == tx_ring->count)
1018 i = 0;
1019 }
1020
dac87619
TL		 1021 if (i == tx_ring->next_to_use)
1022 break;
bc7f75fa
AK		 1023 eop = tx_ring->buffer_info[i].next_to_watch;
1024 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1025 }
1026
1027 tx_ring->next_to_clean = i;
1028
1029#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1030 if (count && netif_carrier_ok(netdev) &&
1031 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1032 /* Make sure that anybody stopping the queue after this
1033 * sees the new next_to_clean.
1034 */
1035 smp_mb();
1036
1037 if (netif_queue_stopped(netdev) &&
1038 !(test_bit(__E1000_DOWN, &adapter->state))) {
1039 netif_wake_queue(netdev);
1040 ++adapter->restart_queue;
1041 }
1042 }
1043
1044 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1045 /*
1046 * Detect a transmit hang in hardware, this serializes the
1047 * check with the clearing of time_stamp and movement of i
1048 */
bc7f75fa 1049 adapter->detect_tx_hung = 0;
12d04a3c
AD		 1050 if (tx_ring->buffer_info[i].time_stamp &&
1051 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 1052 + (adapter->tx_timeout_factor * HZ)) &&
1053 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1054 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 1055 netif_stop_queue(netdev);
1056 }
1057 }
1058 adapter->total_tx_bytes += total_tx_bytes;
1059 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 1060 netdev->stats.tx_bytes += total_tx_bytes;
1061 netdev->stats.tx_packets += total_tx_packets;
807540ba 1062 return count < tx_ring->count;
bc7f75fa
AK		 1063}
1064
bc7f75fa
AK		 1065/**
1066 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1067 * @adapter: board private structure
1068 *
1069 * the return value indicates whether actual cleaning was done, there
1070 * is no guarantee that everything was cleaned
1071 **/
1072static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1073 int *work_done, int work_to_do)
1074{
3bb99fe2 1075 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1076 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1077 struct net_device *netdev = adapter->netdev;
1078 struct pci_dev *pdev = adapter->pdev;
1079 struct e1000_ring *rx_ring = adapter->rx_ring;
1080 struct e1000_buffer *buffer_info, *next_buffer;
1081 struct e1000_ps_page *ps_page;
1082 struct sk_buff *skb;
1083 unsigned int i, j;
1084 u32 length, staterr;
1085 int cleaned_count = 0;
1086 bool cleaned = 0;
1087 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1088
1089 i = rx_ring->next_to_clean;
1090 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1091 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1092 buffer_info = &rx_ring->buffer_info[i];
1093
1094 while (staterr & E1000_RXD_STAT_DD) {
1095 if (*work_done >= work_to_do)
1096 break;
1097 (*work_done)++;
1098 skb = buffer_info->skb;
2d0bb1c1 1099 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 1100
1101 /* in the packet split case this is header only */
1102 prefetch(skb->data - NET_IP_ALIGN);
1103
1104 i++;
1105 if (i == rx_ring->count)
1106 i = 0;
1107 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1108 prefetch(next_rxd);
1109
1110 next_buffer = &rx_ring->buffer_info[i];
1111
1112 cleaned = 1;
1113 cleaned_count++;
0be3f55f 1114 dma_unmap_single(&pdev->dev, buffer_info->dma,
af667a29 1115 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
bc7f75fa
AK		 1116 buffer_info->dma = 0;
1117
af667a29 1118 /* see !EOP comment in other Rx routine */
b94b5028
JB		 1119 if (!(staterr & E1000_RXD_STAT_EOP))
1120 adapter->flags2 |= FLAG2_IS_DISCARDING;
1121
1122 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 1123 e_dbg("Packet Split buffers didn't pick up the full "
1124 "packet\n");
bc7f75fa 1125 dev_kfree_skb_irq(skb);
b94b5028
JB		 1126 if (staterr & E1000_RXD_STAT_EOP)
1127 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1128 goto next_desc;
1129 }
1130
1131 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1132 dev_kfree_skb_irq(skb);
1133 goto next_desc;
1134 }
1135
1136 length = le16_to_cpu(rx_desc->wb.middle.length0);
1137
1138 if (!length) {
3bb99fe2
BA		 1139 e_dbg("Last part of the packet spanning multiple "
1140 "descriptors\n");
bc7f75fa
AK		 1141 dev_kfree_skb_irq(skb);
1142 goto next_desc;
1143 }
1144
1145 /* Good Receive */
1146 skb_put(skb, length);
1147
1148 {
ad68076e
BA		 1149 /*
1150 * this looks ugly, but it seems compiler issues make it
1151 * more efficient than reusing j
1152 */
bc7f75fa
AK		 1153 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1154
ad68076e
BA		 1155 /*
1156 * page alloc/put takes too long and effects small packet
1157 * throughput, so unsplit small packets and save the alloc/put
1158 * only valid in softirq (napi) context to call kmap_*
1159 */
bc7f75fa
AK		 1160 if (l1 && (l1 <= copybreak) &&
1161 ((length + l1) <= adapter->rx_ps_bsize0)) {
1162 u8 *vaddr;
1163
47f44e40 1164 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1165
ad68076e
BA		 1166 /*
1167 * there is no documentation about how to call
bc7f75fa 1168 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 1169 * very long
1170 */
0be3f55f
NN		 1171 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1172 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK		 1173 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1174 memcpy(skb_tail_pointer(skb), vaddr, l1);
1175 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN		 1176 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1177 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1178
eb7c3adb
JK		 1179 /* remove the CRC */
1180 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1181 l1 -= 4;
1182
bc7f75fa
AK		 1183 skb_put(skb, l1);
1184 goto copydone;
1185 } /* if */
1186 }
1187
1188 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1189 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1190 if (!length)
1191 break;
1192
47f44e40 1193 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1194 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1195 DMA_FROM_DEVICE);
bc7f75fa
AK		 1196 ps_page->dma = 0;
1197 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1198 ps_page->page = NULL;
1199 skb->len += length;
1200 skb->data_len += length;
1201 skb->truesize += length;
1202 }
1203
eb7c3adb
JK		 1204 /* strip the ethernet crc, problem is we're using pages now so
1205 * this whole operation can get a little cpu intensive
1206 */
1207 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1208 pskb_trim(skb, skb->len - 4);
1209
bc7f75fa
AK		 1210copydone:
1211 total_rx_bytes += skb->len;
1212 total_rx_packets++;
1213
1214 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1215 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1216
1217 if (rx_desc->wb.upper.header_status &
1218 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1219 adapter->rx_hdr_split++;
1220
1221 e1000_receive_skb(adapter, netdev, skb,
1222 staterr, rx_desc->wb.middle.vlan);
1223
1224next_desc:
1225 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1226 buffer_info->skb = NULL;
1227
1228 /* return some buffers to hardware, one at a time is too slow */
1229 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1230 adapter->alloc_rx_buf(adapter, cleaned_count);
1231 cleaned_count = 0;
1232 }
1233
1234 /* use prefetched values */
1235 rx_desc = next_rxd;
1236 buffer_info = next_buffer;
1237
1238 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1239 }
1240 rx_ring->next_to_clean = i;
1241
1242 cleaned_count = e1000_desc_unused(rx_ring);
1243 if (cleaned_count)
1244 adapter->alloc_rx_buf(adapter, cleaned_count);
1245
bc7f75fa 1246 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1247 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1248 netdev->stats.rx_bytes += total_rx_bytes;
1249 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 1250 return cleaned;
1251}
1252
97ac8cae
BA		 1253/**
1254 * e1000_consume_page - helper function
1255 **/
1256static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1257 u16 length)
1258{
1259 bi->page = NULL;
1260 skb->len += length;
1261 skb->data_len += length;
1262 skb->truesize += length;
1263}
1264
1265/**
1266 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1267 * @adapter: board private structure
1268 *
1269 * the return value indicates whether actual cleaning was done, there
1270 * is no guarantee that everything was cleaned
1271 **/
1272
1273static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1274 int *work_done, int work_to_do)
1275{
1276 struct net_device *netdev = adapter->netdev;
1277 struct pci_dev *pdev = adapter->pdev;
1278 struct e1000_ring *rx_ring = adapter->rx_ring;
1279 struct e1000_rx_desc *rx_desc, *next_rxd;
1280 struct e1000_buffer *buffer_info, *next_buffer;
1281 u32 length;
1282 unsigned int i;
1283 int cleaned_count = 0;
1284 bool cleaned = false;
1285 unsigned int total_rx_bytes=0, total_rx_packets=0;
1286
1287 i = rx_ring->next_to_clean;
1288 rx_desc = E1000_RX_DESC(*rx_ring, i);
1289 buffer_info = &rx_ring->buffer_info[i];
1290
1291 while (rx_desc->status & E1000_RXD_STAT_DD) {
1292 struct sk_buff *skb;
1293 u8 status;
1294
1295 if (*work_done >= work_to_do)
1296 break;
1297 (*work_done)++;
2d0bb1c1 1298 rmb(); /* read descriptor and rx_buffer_info after status DD */
97ac8cae
BA		 1299
1300 status = rx_desc->status;
1301 skb = buffer_info->skb;
1302 buffer_info->skb = NULL;
1303
1304 ++i;
1305 if (i == rx_ring->count)
1306 i = 0;
1307 next_rxd = E1000_RX_DESC(*rx_ring, i);
1308 prefetch(next_rxd);
1309
1310 next_buffer = &rx_ring->buffer_info[i];
1311
1312 cleaned = true;
1313 cleaned_count++;
0be3f55f
NN		 1314 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1315 DMA_FROM_DEVICE);
97ac8cae
BA		 1316 buffer_info->dma = 0;
1317
1318 length = le16_to_cpu(rx_desc->length);
1319
1320 /* errors is only valid for DD + EOP descriptors */
1321 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1322 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1323 /* recycle both page and skb */
1324 buffer_info->skb = skb;
1325 /* an error means any chain goes out the window
1326 * too */
1327 if (rx_ring->rx_skb_top)
1328 dev_kfree_skb(rx_ring->rx_skb_top);
1329 rx_ring->rx_skb_top = NULL;
1330 goto next_desc;
1331 }
1332
f0f1a172 1333#define rxtop (rx_ring->rx_skb_top)
97ac8cae
BA		 1334 if (!(status & E1000_RXD_STAT_EOP)) {
1335 /* this descriptor is only the beginning (or middle) */
1336 if (!rxtop) {
1337 /* this is the beginning of a chain */
1338 rxtop = skb;
1339 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1340 0, length);
1341 } else {
1342 /* this is the middle of a chain */
1343 skb_fill_page_desc(rxtop,
1344 skb_shinfo(rxtop)->nr_frags,
1345 buffer_info->page, 0, length);
1346 /* re-use the skb, only consumed the page */
1347 buffer_info->skb = skb;
1348 }
1349 e1000_consume_page(buffer_info, rxtop, length);
1350 goto next_desc;
1351 } else {
1352 if (rxtop) {
1353 /* end of the chain */
1354 skb_fill_page_desc(rxtop,
1355 skb_shinfo(rxtop)->nr_frags,
1356 buffer_info->page, 0, length);
1357 /* re-use the current skb, we only consumed the
1358 * page */
1359 buffer_info->skb = skb;
1360 skb = rxtop;
1361 rxtop = NULL;
1362 e1000_consume_page(buffer_info, skb, length);
1363 } else {
1364 /* no chain, got EOP, this buf is the packet
1365 * copybreak to save the put_page/alloc_page */
1366 if (length <= copybreak &&
1367 skb_tailroom(skb) >= length) {
1368 u8 *vaddr;
1369 vaddr = kmap_atomic(buffer_info->page,
1370 KM_SKB_DATA_SOFTIRQ);
1371 memcpy(skb_tail_pointer(skb), vaddr,
1372 length);
1373 kunmap_atomic(vaddr,
1374 KM_SKB_DATA_SOFTIRQ);
1375 /* re-use the page, so don't erase
1376 * buffer_info->page */
1377 skb_put(skb, length);
1378 } else {
1379 skb_fill_page_desc(skb, 0,
1380 buffer_info->page, 0,
1381 length);
1382 e1000_consume_page(buffer_info, skb,
1383 length);
1384 }
1385 }
1386 }
1387
1388 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1389 e1000_rx_checksum(adapter,
1390 (u32)(status) |
1391 ((u32)(rx_desc->errors) << 24),
1392 le16_to_cpu(rx_desc->csum), skb);
1393
1394 /* probably a little skewed due to removing CRC */
1395 total_rx_bytes += skb->len;
1396 total_rx_packets++;
1397
1398 /* eth type trans needs skb->data to point to something */
1399 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1400 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1401 dev_kfree_skb(skb);
1402 goto next_desc;
1403 }
1404
1405 e1000_receive_skb(adapter, netdev, skb, status,
1406 rx_desc->special);
1407
1408next_desc:
1409 rx_desc->status = 0;
1410
1411 /* return some buffers to hardware, one at a time is too slow */
1412 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1413 adapter->alloc_rx_buf(adapter, cleaned_count);
1414 cleaned_count = 0;
1415 }
1416
1417 /* use prefetched values */
1418 rx_desc = next_rxd;
1419 buffer_info = next_buffer;
1420 }
1421 rx_ring->next_to_clean = i;
1422
1423 cleaned_count = e1000_desc_unused(rx_ring);
1424 if (cleaned_count)
1425 adapter->alloc_rx_buf(adapter, cleaned_count);
1426
1427 adapter->total_rx_bytes += total_rx_bytes;
1428 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1429 netdev->stats.rx_bytes += total_rx_bytes;
1430 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1431 return cleaned;
1432}
1433
bc7f75fa
AK		 1434/**
1435 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1436 * @adapter: board private structure
1437 **/
1438static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1439{
1440 struct e1000_ring *rx_ring = adapter->rx_ring;
1441 struct e1000_buffer *buffer_info;
1442 struct e1000_ps_page *ps_page;
1443 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1444 unsigned int i, j;
1445
1446 /* Free all the Rx ring sk_buffs */
1447 for (i = 0; i < rx_ring->count; i++) {
1448 buffer_info = &rx_ring->buffer_info[i];
1449 if (buffer_info->dma) {
1450 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1451 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1452 adapter->rx_buffer_len,
0be3f55f 1453 DMA_FROM_DEVICE);
97ac8cae 1454 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1455 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1456 PAGE_SIZE,
0be3f55f 1457 DMA_FROM_DEVICE);
bc7f75fa 1458 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1459 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1460 adapter->rx_ps_bsize0,
0be3f55f 1461 DMA_FROM_DEVICE);
bc7f75fa
AK		 1462 buffer_info->dma = 0;
1463 }
1464
97ac8cae
BA		 1465 if (buffer_info->page) {
1466 put_page(buffer_info->page);
1467 buffer_info->page = NULL;
1468 }
1469
bc7f75fa
AK		 1470 if (buffer_info->skb) {
1471 dev_kfree_skb(buffer_info->skb);
1472 buffer_info->skb = NULL;
1473 }
1474
1475 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1476 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1477 if (!ps_page->page)
1478 break;
0be3f55f
NN		 1479 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1480 DMA_FROM_DEVICE);
bc7f75fa
AK		 1481 ps_page->dma = 0;
1482 put_page(ps_page->page);
1483 ps_page->page = NULL;
1484 }
1485 }
1486
1487 /* there also may be some cached data from a chained receive */
1488 if (rx_ring->rx_skb_top) {
1489 dev_kfree_skb(rx_ring->rx_skb_top);
1490 rx_ring->rx_skb_top = NULL;
1491 }
1492
bc7f75fa
AK		 1493 /* Zero out the descriptor ring */
1494 memset(rx_ring->desc, 0, rx_ring->size);
1495
1496 rx_ring->next_to_clean = 0;
1497 rx_ring->next_to_use = 0;
b94b5028 1498 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1499
1500 writel(0, adapter->hw.hw_addr + rx_ring->head);
1501 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1502}
1503
a8f88ff5
JB		 1504static void e1000e_downshift_workaround(struct work_struct *work)
1505{
1506 struct e1000_adapter *adapter = container_of(work,
1507 struct e1000_adapter, downshift_task);
1508
1509 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1510}
1511
bc7f75fa
AK		 1512/**
1513 * e1000_intr_msi - Interrupt Handler
1514 * @irq: interrupt number
1515 * @data: pointer to a network interface device structure
1516 **/
1517static irqreturn_t e1000_intr_msi(int irq, void *data)
1518{
1519 struct net_device *netdev = data;
1520 struct e1000_adapter *adapter = netdev_priv(netdev);
1521 struct e1000_hw *hw = &adapter->hw;
1522 u32 icr = er32(ICR);
1523
ad68076e
BA		 1524 /*
1525 * read ICR disables interrupts using IAM
1526 */
bc7f75fa 1527
573cca8c 1528 if (icr & E1000_ICR_LSC) {
bc7f75fa 1529 hw->mac.get_link_status = 1;
ad68076e
BA		 1530 /*
1531 * ICH8 workaround-- Call gig speed drop workaround on cable
1532 * disconnect (LSC) before accessing any PHY registers
1533 */
bc7f75fa
AK		 1534 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1535 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1536 schedule_work(&adapter->downshift_task);
bc7f75fa 1537
ad68076e
BA		 1538 /*
1539 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1540 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1541 * adapter in watchdog
1542 */
bc7f75fa
AK		 1543 if (netif_carrier_ok(netdev) &&
1544 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1545 /* disable receives */
1546 u32 rctl = er32(RCTL);
1547 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1548 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1549 }
1550 /* guard against interrupt when we're going down */
1551 if (!test_bit(__E1000_DOWN, &adapter->state))
1552 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1553 }
1554
288379f0 1555 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1556 adapter->total_tx_bytes = 0;
1557 adapter->total_tx_packets = 0;
1558 adapter->total_rx_bytes = 0;
1559 adapter->total_rx_packets = 0;
288379f0 1560 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1561 }
1562
1563 return IRQ_HANDLED;
1564}
1565
1566/**
1567 * e1000_intr - Interrupt Handler
1568 * @irq: interrupt number
1569 * @data: pointer to a network interface device structure
1570 **/
1571static irqreturn_t e1000_intr(int irq, void *data)
1572{
1573 struct net_device *netdev = data;
1574 struct e1000_adapter *adapter = netdev_priv(netdev);
1575 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1576 u32 rctl, icr = er32(ICR);
4662e82b 1577
a68ea775 1578 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1579 return IRQ_NONE; /* Not our interrupt */
1580
ad68076e
BA		 1581 /*
1582 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1583 * not set, then the adapter didn't send an interrupt
1584 */
bc7f75fa
AK		 1585 if (!(icr & E1000_ICR_INT_ASSERTED))
1586 return IRQ_NONE;
1587
ad68076e
BA		 1588 /*
1589 * Interrupt Auto-Mask...upon reading ICR,
1590 * interrupts are masked. No need for the
1591 * IMC write
1592 */
bc7f75fa 1593
573cca8c 1594 if (icr & E1000_ICR_LSC) {
bc7f75fa 1595 hw->mac.get_link_status = 1;
ad68076e
BA		 1596 /*
1597 * ICH8 workaround-- Call gig speed drop workaround on cable
1598 * disconnect (LSC) before accessing any PHY registers
1599 */
bc7f75fa
AK		 1600 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1601 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1602 schedule_work(&adapter->downshift_task);
bc7f75fa 1603
ad68076e
BA		 1604 /*
1605 * 80003ES2LAN workaround--
bc7f75fa
AK		 1606 * For packet buffer work-around on link down event;
1607 * disable receives here in the ISR and
1608 * reset adapter in watchdog
1609 */
1610 if (netif_carrier_ok(netdev) &&
1611 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1612 /* disable receives */
1613 rctl = er32(RCTL);
1614 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1615 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1616 }
1617 /* guard against interrupt when we're going down */
1618 if (!test_bit(__E1000_DOWN, &adapter->state))
1619 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1620 }
1621
288379f0 1622 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1623 adapter->total_tx_bytes = 0;
1624 adapter->total_tx_packets = 0;
1625 adapter->total_rx_bytes = 0;
1626 adapter->total_rx_packets = 0;
288379f0 1627 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1628 }
1629
1630 return IRQ_HANDLED;
1631}
1632
4662e82b
BA		 1633static irqreturn_t e1000_msix_other(int irq, void *data)
1634{
1635 struct net_device *netdev = data;
1636 struct e1000_adapter *adapter = netdev_priv(netdev);
1637 struct e1000_hw *hw = &adapter->hw;
1638 u32 icr = er32(ICR);
1639
1640 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1641 if (!test_bit(__E1000_DOWN, &adapter->state))
1642 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1643 return IRQ_NONE;
1644 }
1645
1646 if (icr & adapter->eiac_mask)
1647 ew32(ICS, (icr & adapter->eiac_mask));
1648
1649 if (icr & E1000_ICR_OTHER) {
1650 if (!(icr & E1000_ICR_LSC))
1651 goto no_link_interrupt;
1652 hw->mac.get_link_status = 1;
1653 /* guard against interrupt when we're going down */
1654 if (!test_bit(__E1000_DOWN, &adapter->state))
1655 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1656 }
1657
1658no_link_interrupt:
a3c69fef
JB		 1659 if (!test_bit(__E1000_DOWN, &adapter->state))
1660 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1661
1662 return IRQ_HANDLED;
1663}
1664
1665
1666static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1667{
1668 struct net_device *netdev = data;
1669 struct e1000_adapter *adapter = netdev_priv(netdev);
1670 struct e1000_hw *hw = &adapter->hw;
1671 struct e1000_ring *tx_ring = adapter->tx_ring;
1672
1673
1674 adapter->total_tx_bytes = 0;
1675 adapter->total_tx_packets = 0;
1676
1677 if (!e1000_clean_tx_irq(adapter))
1678 /* Ring was not completely cleaned, so fire another interrupt */
1679 ew32(ICS, tx_ring->ims_val);
1680
1681 return IRQ_HANDLED;
1682}
1683
1684static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1685{
1686 struct net_device *netdev = data;
1687 struct e1000_adapter *adapter = netdev_priv(netdev);
1688
1689 /* Write the ITR value calculated at the end of the
1690 * previous interrupt.
1691 */
1692 if (adapter->rx_ring->set_itr) {
1693 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1694 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1695 adapter->rx_ring->set_itr = 0;
1696 }
1697
288379f0 1698 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1699 adapter->total_rx_bytes = 0;
1700 adapter->total_rx_packets = 0;
288379f0 1701 __napi_schedule(&adapter->napi);
4662e82b
BA		 1702 }
1703 return IRQ_HANDLED;
1704}
1705
1706/**
1707 * e1000_configure_msix - Configure MSI-X hardware
1708 *
1709 * e1000_configure_msix sets up the hardware to properly
1710 * generate MSI-X interrupts.
1711 **/
1712static void e1000_configure_msix(struct e1000_adapter *adapter)
1713{
1714 struct e1000_hw *hw = &adapter->hw;
1715 struct e1000_ring *rx_ring = adapter->rx_ring;
1716 struct e1000_ring *tx_ring = adapter->tx_ring;
1717 int vector = 0;
1718 u32 ctrl_ext, ivar = 0;
1719
1720 adapter->eiac_mask = 0;
1721
1722 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1723 if (hw->mac.type == e1000_82574) {
1724 u32 rfctl = er32(RFCTL);
1725 rfctl |= E1000_RFCTL_ACK_DIS;
1726 ew32(RFCTL, rfctl);
1727 }
1728
1729#define E1000_IVAR_INT_ALLOC_VALID 0x8
1730 /* Configure Rx vector */
1731 rx_ring->ims_val = E1000_IMS_RXQ0;
1732 adapter->eiac_mask |= rx_ring->ims_val;
1733 if (rx_ring->itr_val)
1734 writel(1000000000 / (rx_ring->itr_val * 256),
1735 hw->hw_addr + rx_ring->itr_register);
1736 else
1737 writel(1, hw->hw_addr + rx_ring->itr_register);
1738 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1739
1740 /* Configure Tx vector */
1741 tx_ring->ims_val = E1000_IMS_TXQ0;
1742 vector++;
1743 if (tx_ring->itr_val)
1744 writel(1000000000 / (tx_ring->itr_val * 256),
1745 hw->hw_addr + tx_ring->itr_register);
1746 else
1747 writel(1, hw->hw_addr + tx_ring->itr_register);
1748 adapter->eiac_mask |= tx_ring->ims_val;
1749 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1750
1751 /* set vector for Other Causes, e.g. link changes */
1752 vector++;
1753 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1754 if (rx_ring->itr_val)
1755 writel(1000000000 / (rx_ring->itr_val * 256),
1756 hw->hw_addr + E1000_EITR_82574(vector));
1757 else
1758 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1759
1760 /* Cause Tx interrupts on every write back */
1761 ivar |= (1 << 31);
1762
1763 ew32(IVAR, ivar);
1764
1765 /* enable MSI-X PBA support */
1766 ctrl_ext = er32(CTRL_EXT);
1767 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1768
1769 /* Auto-Mask Other interrupts upon ICR read */
1770#define E1000_EIAC_MASK_82574 0x01F00000
1771 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1772 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1773 ew32(CTRL_EXT, ctrl_ext);
1774 e1e_flush();
1775}
1776
1777void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1778{
1779 if (adapter->msix_entries) {
1780 pci_disable_msix(adapter->pdev);
1781 kfree(adapter->msix_entries);
1782 adapter->msix_entries = NULL;
1783 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1784 pci_disable_msi(adapter->pdev);
1785 adapter->flags &= ~FLAG_MSI_ENABLED;
1786 }
4662e82b
BA		 1787}
1788
1789/**
1790 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1791 *
1792 * Attempt to configure interrupts using the best available
1793 * capabilities of the hardware and kernel.
1794 **/
1795void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1796{
1797 int err;
8e86acd7 1798 int i;
4662e82b
BA		 1799
1800 switch (adapter->int_mode) {
1801 case E1000E_INT_MODE_MSIX:
1802 if (adapter->flags & FLAG_HAS_MSIX) {
8e86acd7
JK		 1803 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1804 adapter->msix_entries = kcalloc(adapter->num_vectors,
4662e82b
BA		 1805 sizeof(struct msix_entry),
1806 GFP_KERNEL);
1807 if (adapter->msix_entries) {
8e86acd7 1808 for (i = 0; i < adapter->num_vectors; i++)
4662e82b
BA		 1809 adapter->msix_entries[i].entry = i;
1810
1811 err = pci_enable_msix(adapter->pdev,
1812 adapter->msix_entries,
8e86acd7 1813 adapter->num_vectors);
b1cdfead 1814 if (err == 0)
4662e82b
BA		 1815 return;
1816 }
1817 /* MSI-X failed, so fall through and try MSI */
1818 e_err("Failed to initialize MSI-X interrupts. "
1819 "Falling back to MSI interrupts.\n");
1820 e1000e_reset_interrupt_capability(adapter);
1821 }
1822 adapter->int_mode = E1000E_INT_MODE_MSI;
1823 /* Fall through */
1824 case E1000E_INT_MODE_MSI:
1825 if (!pci_enable_msi(adapter->pdev)) {
1826 adapter->flags |= FLAG_MSI_ENABLED;
1827 } else {
1828 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1829 e_err("Failed to initialize MSI interrupts. Falling "
1830 "back to legacy interrupts.\n");
1831 }
1832 /* Fall through */
1833 case E1000E_INT_MODE_LEGACY:
1834 /* Don't do anything; this is the system default */
1835 break;
1836 }
8e86acd7
JK		 1837
1838 /* store the number of vectors being used */
1839 adapter->num_vectors = 1;
4662e82b
BA		 1840}
1841
1842/**
1843 * e1000_request_msix - Initialize MSI-X interrupts
1844 *
1845 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1846 * kernel.
1847 **/
1848static int e1000_request_msix(struct e1000_adapter *adapter)
1849{
1850 struct net_device *netdev = adapter->netdev;
1851 int err = 0, vector = 0;
1852
1853 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1854 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1855 else
1856 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1857 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1858 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1859 netdev);
1860 if (err)
1861 goto out;
1862 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1863 adapter->rx_ring->itr_val = adapter->itr;
1864 vector++;
1865
1866 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1867 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1868 else
1869 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1870 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1871 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1872 netdev);
1873 if (err)
1874 goto out;
1875 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1876 adapter->tx_ring->itr_val = adapter->itr;
1877 vector++;
1878
1879 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1880 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1881 if (err)
1882 goto out;
1883
1884 e1000_configure_msix(adapter);
1885 return 0;
1886out:
1887 return err;
1888}
1889
f8d59f78
BA		 1890/**
1891 * e1000_request_irq - initialize interrupts
1892 *
1893 * Attempts to configure interrupts using the best available
1894 * capabilities of the hardware and kernel.
1895 **/
bc7f75fa
AK		 1896static int e1000_request_irq(struct e1000_adapter *adapter)
1897{
1898 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1899 int err;
1900
4662e82b
BA		 1901 if (adapter->msix_entries) {
1902 err = e1000_request_msix(adapter);
1903 if (!err)
1904 return err;
1905 /* fall back to MSI */
1906 e1000e_reset_interrupt_capability(adapter);
1907 adapter->int_mode = E1000E_INT_MODE_MSI;
1908 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1909 }
4662e82b 1910 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1911 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1912 netdev->name, netdev);
1913 if (!err)
1914 return err;
bc7f75fa 1915
4662e82b
BA		 1916 /* fall back to legacy interrupt */
1917 e1000e_reset_interrupt_capability(adapter);
1918 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1919 }
1920
a0607fd3 1921 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1922 netdev->name, netdev);
1923 if (err)
1924 e_err("Unable to allocate interrupt, Error: %d\n", err);
1925
bc7f75fa
AK		 1926 return err;
1927}
1928
1929static void e1000_free_irq(struct e1000_adapter *adapter)
1930{
1931 struct net_device *netdev = adapter->netdev;
1932
4662e82b
BA		 1933 if (adapter->msix_entries) {
1934 int vector = 0;
1935
1936 free_irq(adapter->msix_entries[vector].vector, netdev);
1937 vector++;
1938
1939 free_irq(adapter->msix_entries[vector].vector, netdev);
1940 vector++;
1941
1942 /* Other Causes interrupt vector */
1943 free_irq(adapter->msix_entries[vector].vector, netdev);
1944 return;
bc7f75fa 1945 }
4662e82b
BA		 1946
1947 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1948}
1949
1950/**
1951 * e1000_irq_disable - Mask off interrupt generation on the NIC
1952 **/
1953static void e1000_irq_disable(struct e1000_adapter *adapter)
1954{
1955 struct e1000_hw *hw = &adapter->hw;
1956
bc7f75fa 1957 ew32(IMC, ~0);
4662e82b
BA		 1958 if (adapter->msix_entries)
1959 ew32(EIAC_82574, 0);
bc7f75fa 1960 e1e_flush();
8e86acd7
JK		 1961
1962 if (adapter->msix_entries) {
1963 int i;
1964 for (i = 0; i < adapter->num_vectors; i++)
1965 synchronize_irq(adapter->msix_entries[i].vector);
1966 } else {
1967 synchronize_irq(adapter->pdev->irq);
1968 }
bc7f75fa
AK		 1969}
1970
1971/**
1972 * e1000_irq_enable - Enable default interrupt generation settings
1973 **/
1974static void e1000_irq_enable(struct e1000_adapter *adapter)
1975{
1976 struct e1000_hw *hw = &adapter->hw;
1977
4662e82b
BA		 1978 if (adapter->msix_entries) {
1979 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1980 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1981 } else {
1982 ew32(IMS, IMS_ENABLE_MASK);
1983 }
74ef9c39 1984 e1e_flush();
bc7f75fa
AK		 1985}
1986
1987/**
31dbe5b4 1988 * e1000e_get_hw_control - get control of the h/w from f/w
bc7f75fa
AK		 1989 * @adapter: address of board private structure
1990 *
31dbe5b4 1991 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1992 * For ASF and Pass Through versions of f/w this means that
1993 * the driver is loaded. For AMT version (only with 82573)
1994 * of the f/w this means that the network i/f is open.
1995 **/
31dbe5b4 1996void e1000e_get_hw_control(struct e1000_adapter *adapter)
bc7f75fa
AK		 1997{
1998 struct e1000_hw *hw = &adapter->hw;
1999 u32 ctrl_ext;
2000 u32 swsm;
2001
2002 /* Let firmware know the driver has taken over */
2003 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2004 swsm = er32(SWSM);
2005 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2006 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2007 ctrl_ext = er32(CTRL_EXT);
ad68076e 2008 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2009 }
2010}
2011
2012/**
31dbe5b4 2013 * e1000e_release_hw_control - release control of the h/w to f/w
bc7f75fa
AK		 2014 * @adapter: address of board private structure
2015 *
31dbe5b4 2016 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 2017 * For ASF and Pass Through versions of f/w this means that the
2018 * driver is no longer loaded. For AMT version (only with 82573) i
2019 * of the f/w this means that the network i/f is closed.
2020 *
2021 **/
31dbe5b4 2022void e1000e_release_hw_control(struct e1000_adapter *adapter)
bc7f75fa
AK		 2023{
2024 struct e1000_hw *hw = &adapter->hw;
2025 u32 ctrl_ext;
2026 u32 swsm;
2027
2028 /* Let firmware taken over control of h/w */
2029 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2030 swsm = er32(SWSM);
2031 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2032 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2033 ctrl_ext = er32(CTRL_EXT);
ad68076e 2034 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2035 }
2036}
2037
bc7f75fa
AK		 2038/**
2039 * @e1000_alloc_ring - allocate memory for a ring structure
2040 **/
2041static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2042 struct e1000_ring *ring)
2043{
2044 struct pci_dev *pdev = adapter->pdev;
2045
2046 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2047 GFP_KERNEL);
2048 if (!ring->desc)
2049 return -ENOMEM;
2050
2051 return 0;
2052}
2053
2054/**
2055 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2056 * @adapter: board private structure
2057 *
2058 * Return 0 on success, negative on failure
2059 **/
2060int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2061{
2062 struct e1000_ring *tx_ring = adapter->tx_ring;
2063 int err = -ENOMEM, size;
2064
2065 size = sizeof(struct e1000_buffer) * tx_ring->count;
89bf67f1 2066 tx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2067 if (!tx_ring->buffer_info)
2068 goto err;
bc7f75fa
AK		 2069
2070 /* round up to nearest 4K */
2071 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2072 tx_ring->size = ALIGN(tx_ring->size, 4096);
2073
2074 err = e1000_alloc_ring_dma(adapter, tx_ring);
2075 if (err)
2076 goto err;
2077
2078 tx_ring->next_to_use = 0;
2079 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2080
2081 return 0;
2082err:
2083 vfree(tx_ring->buffer_info);
44defeb3 2084 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2085 return err;
2086}
2087
2088/**
2089 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2090 * @adapter: board private structure
2091 *
2092 * Returns 0 on success, negative on failure
2093 **/
2094int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2095{
2096 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 2097 struct e1000_buffer *buffer_info;
2098 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2099
2100 size = sizeof(struct e1000_buffer) * rx_ring->count;
89bf67f1 2101 rx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2102 if (!rx_ring->buffer_info)
2103 goto err;
bc7f75fa 2104
47f44e40
AK		 2105 for (i = 0; i < rx_ring->count; i++) {
2106 buffer_info = &rx_ring->buffer_info[i];
2107 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2108 sizeof(struct e1000_ps_page),
2109 GFP_KERNEL);
2110 if (!buffer_info->ps_pages)
2111 goto err_pages;
2112 }
bc7f75fa
AK		 2113
2114 desc_len = sizeof(union e1000_rx_desc_packet_split);
2115
2116 /* Round up to nearest 4K */
2117 rx_ring->size = rx_ring->count * desc_len;
2118 rx_ring->size = ALIGN(rx_ring->size, 4096);
2119
2120 err = e1000_alloc_ring_dma(adapter, rx_ring);
2121 if (err)
47f44e40 2122 goto err_pages;
bc7f75fa
AK		 2123
2124 rx_ring->next_to_clean = 0;
2125 rx_ring->next_to_use = 0;
2126 rx_ring->rx_skb_top = NULL;
2127
2128 return 0;
47f44e40
AK		 2129
2130err_pages:
2131 for (i = 0; i < rx_ring->count; i++) {
2132 buffer_info = &rx_ring->buffer_info[i];
2133 kfree(buffer_info->ps_pages);
2134 }
bc7f75fa
AK		 2135err:
2136 vfree(rx_ring->buffer_info);
e9262447 2137 e_err("Unable to allocate memory for the receive descriptor ring\n");
bc7f75fa
AK		 2138 return err;
2139}
2140
2141/**
2142 * e1000_clean_tx_ring - Free Tx Buffers
2143 * @adapter: board private structure
2144 **/
2145static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2146{
2147 struct e1000_ring *tx_ring = adapter->tx_ring;
2148 struct e1000_buffer *buffer_info;
2149 unsigned long size;
2150 unsigned int i;
2151
2152 for (i = 0; i < tx_ring->count; i++) {
2153 buffer_info = &tx_ring->buffer_info[i];
2154 e1000_put_txbuf(adapter, buffer_info);
2155 }
2156
2157 size = sizeof(struct e1000_buffer) * tx_ring->count;
2158 memset(tx_ring->buffer_info, 0, size);
2159
2160 memset(tx_ring->desc, 0, tx_ring->size);
2161
2162 tx_ring->next_to_use = 0;
2163 tx_ring->next_to_clean = 0;
2164
2165 writel(0, adapter->hw.hw_addr + tx_ring->head);
2166 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2167}
2168
2169/**
2170 * e1000e_free_tx_resources - Free Tx Resources per Queue
2171 * @adapter: board private structure
2172 *
2173 * Free all transmit software resources
2174 **/
2175void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2176{
2177 struct pci_dev *pdev = adapter->pdev;
2178 struct e1000_ring *tx_ring = adapter->tx_ring;
2179
2180 e1000_clean_tx_ring(adapter);
2181
2182 vfree(tx_ring->buffer_info);
2183 tx_ring->buffer_info = NULL;
2184
2185 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2186 tx_ring->dma);
2187 tx_ring->desc = NULL;
2188}
2189
2190/**
2191 * e1000e_free_rx_resources - Free Rx Resources
2192 * @adapter: board private structure
2193 *
2194 * Free all receive software resources
2195 **/
2196
2197void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2198{
2199 struct pci_dev *pdev = adapter->pdev;
2200 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2201 int i;
bc7f75fa
AK		 2202
2203 e1000_clean_rx_ring(adapter);
2204
b1cdfead 2205 for (i = 0; i < rx_ring->count; i++)
47f44e40 2206 kfree(rx_ring->buffer_info[i].ps_pages);
47f44e40 2207
bc7f75fa
AK		 2208 vfree(rx_ring->buffer_info);
2209 rx_ring->buffer_info = NULL;
2210
bc7f75fa
AK		 2211 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2212 rx_ring->dma);
2213 rx_ring->desc = NULL;
2214}
2215
2216/**
2217 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2218 * @adapter: pointer to adapter
2219 * @itr_setting: current adapter->itr
2220 * @packets: the number of packets during this measurement interval
2221 * @bytes: the number of bytes during this measurement interval
2222 *
bc7f75fa
AK		 2223 * Stores a new ITR value based on packets and byte
2224 * counts during the last interrupt. The advantage of per interrupt
2225 * computation is faster updates and more accurate ITR for the current
2226 * traffic pattern. Constants in this function were computed
2227 * based on theoretical maximum wire speed and thresholds were set based
2228 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2229 * while increasing bulk throughput. This functionality is controlled
2230 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2231 **/
2232static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2233 u16 itr_setting, int packets,
2234 int bytes)
2235{
2236 unsigned int retval = itr_setting;
2237
2238 if (packets == 0)
2239 goto update_itr_done;
2240
2241 switch (itr_setting) {
2242 case lowest_latency:
2243 /* handle TSO and jumbo frames */
2244 if (bytes/packets > 8000)
2245 retval = bulk_latency;
b1cdfead 2246 else if ((packets < 5) && (bytes > 512))
bc7f75fa 2247 retval = low_latency;
bc7f75fa
AK		 2248 break;
2249 case low_latency: /* 50 usec aka 20000 ints/s */
2250 if (bytes > 10000) {
2251 /* this if handles the TSO accounting */
b1cdfead 2252 if (bytes/packets > 8000)
bc7f75fa 2253 retval = bulk_latency;
b1cdfead 2254 else if ((packets < 10) || ((bytes/packets) > 1200))
bc7f75fa 2255 retval = bulk_latency;
b1cdfead 2256 else if ((packets > 35))
bc7f75fa 2257 retval = lowest_latency;
bc7f75fa
AK		 2258 } else if (bytes/packets > 2000) {
2259 retval = bulk_latency;
2260 } else if (packets <= 2 && bytes < 512) {
2261 retval = lowest_latency;
2262 }
2263 break;
2264 case bulk_latency: /* 250 usec aka 4000 ints/s */
2265 if (bytes > 25000) {
b1cdfead 2266 if (packets > 35)
bc7f75fa 2267 retval = low_latency;
bc7f75fa
AK		 2268 } else if (bytes < 6000) {
2269 retval = low_latency;
2270 }
2271 break;
2272 }
2273
2274update_itr_done:
2275 return retval;
2276}
2277
2278static void e1000_set_itr(struct e1000_adapter *adapter)
2279{
2280 struct e1000_hw *hw = &adapter->hw;
2281 u16 current_itr;
2282 u32 new_itr = adapter->itr;
2283
2284 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2285 if (adapter->link_speed != SPEED_1000) {
2286 current_itr = 0;
2287 new_itr = 4000;
2288 goto set_itr_now;
2289 }
2290
828bac87
BA		 2291 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2292 new_itr = 0;
2293 goto set_itr_now;
2294 }
2295
bc7f75fa
AK		 2296 adapter->tx_itr = e1000_update_itr(adapter,
2297 adapter->tx_itr,
2298 adapter->total_tx_packets,
2299 adapter->total_tx_bytes);
2300 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2301 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2302 adapter->tx_itr = low_latency;
2303
2304 adapter->rx_itr = e1000_update_itr(adapter,
2305 adapter->rx_itr,
2306 adapter->total_rx_packets,
2307 adapter->total_rx_bytes);
2308 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2309 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2310 adapter->rx_itr = low_latency;
2311
2312 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2313
2314 switch (current_itr) {
2315 /* counts and packets in update_itr are dependent on these numbers */
2316 case lowest_latency:
2317 new_itr = 70000;
2318 break;
2319 case low_latency:
2320 new_itr = 20000; /* aka hwitr = ~200 */
2321 break;
2322 case bulk_latency:
2323 new_itr = 4000;
2324 break;
2325 default:
2326 break;
2327 }
2328
2329set_itr_now:
2330 if (new_itr != adapter->itr) {
ad68076e
BA		 2331 /*
2332 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2333 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2334 * increasing
2335 */
bc7f75fa
AK		 2336 new_itr = new_itr > adapter->itr ?
2337 min(adapter->itr + (new_itr >> 2), new_itr) :
2338 new_itr;
2339 adapter->itr = new_itr;
4662e82b
BA		 2340 adapter->rx_ring->itr_val = new_itr;
2341 if (adapter->msix_entries)
2342 adapter->rx_ring->set_itr = 1;
2343 else
828bac87
BA		 2344 if (new_itr)
2345 ew32(ITR, 1000000000 / (new_itr * 256));
2346 else
2347 ew32(ITR, 0);
bc7f75fa
AK		 2348 }
2349}
2350
4662e82b
BA		 2351/**
2352 * e1000_alloc_queues - Allocate memory for all rings
2353 * @adapter: board private structure to initialize
2354 **/
2355static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2356{
2357 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2358 if (!adapter->tx_ring)
2359 goto err;
2360
2361 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2362 if (!adapter->rx_ring)
2363 goto err;
2364
2365 return 0;
2366err:
2367 e_err("Unable to allocate memory for queues\n");
2368 kfree(adapter->rx_ring);
2369 kfree(adapter->tx_ring);
2370 return -ENOMEM;
2371}
2372
bc7f75fa
AK		 2373/**
2374 * e1000_clean - NAPI Rx polling callback
ad68076e 2375 * @napi: struct associated with this polling callback
489815ce 2376 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2377 **/
2378static int e1000_clean(struct napi_struct *napi, int budget)
2379{
2380 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2381 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2382 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2383 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2384
4cf1653a 2385 adapter = netdev_priv(poll_dev);
bc7f75fa 2386
4662e82b
BA		 2387 if (adapter->msix_entries &&
2388 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2389 goto clean_rx;
2390
92af3e95 2391 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2392
4662e82b 2393clean_rx:
bc7f75fa 2394 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2395
12d04a3c 2396 if (!tx_cleaned)
d2c7ddd6 2397 work_done = budget;
bc7f75fa 2398
53e52c72
DM		 2399 /* If budget not fully consumed, exit the polling mode */
2400 if (work_done < budget) {
bc7f75fa
AK		 2401 if (adapter->itr_setting & 3)
2402 e1000_set_itr(adapter);
288379f0 2403 napi_complete(napi);
a3c69fef
JB		 2404 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2405 if (adapter->msix_entries)
2406 ew32(IMS, adapter->rx_ring->ims_val);
2407 else
2408 e1000_irq_enable(adapter);
2409 }
bc7f75fa
AK		 2410 }
2411
2412 return work_done;
2413}
2414
2415static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2416{
2417 struct e1000_adapter *adapter = netdev_priv(netdev);
2418 struct e1000_hw *hw = &adapter->hw;
2419 u32 vfta, index;
2420
2421 /* don't update vlan cookie if already programmed */
2422 if ((adapter->hw.mng_cookie.status &
2423 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2424 (vid == adapter->mng_vlan_id))
2425 return;
caaddaf8 2426
bc7f75fa 2427 /* add VID to filter table */
caaddaf8
BA		 2428 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2429 index = (vid >> 5) & 0x7F;
2430 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2431 vfta |= (1 << (vid & 0x1F));
2432 hw->mac.ops.write_vfta(hw, index, vfta);
2433 }
bc7f75fa
AK		 2434}
2435
2436static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2437{
2438 struct e1000_adapter *adapter = netdev_priv(netdev);
2439 struct e1000_hw *hw = &adapter->hw;
2440 u32 vfta, index;
2441
74ef9c39
JB		 2442 if (!test_bit(__E1000_DOWN, &adapter->state))
2443 e1000_irq_disable(adapter);
bc7f75fa 2444 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2445
2446 if (!test_bit(__E1000_DOWN, &adapter->state))
2447 e1000_irq_enable(adapter);
bc7f75fa
AK		 2448
2449 if ((adapter->hw.mng_cookie.status &
2450 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2451 (vid == adapter->mng_vlan_id)) {
2452 /* release control to f/w */
31dbe5b4 2453 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 2454 return;
2455 }
2456
2457 /* remove VID from filter table */
caaddaf8
BA		 2458 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2459 index = (vid >> 5) & 0x7F;
2460 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2461 vfta &= ~(1 << (vid & 0x1F));
2462 hw->mac.ops.write_vfta(hw, index, vfta);
2463 }
bc7f75fa
AK		 2464}
2465
2466static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2467{
2468 struct net_device *netdev = adapter->netdev;
2469 u16 vid = adapter->hw.mng_cookie.vlan_id;
2470 u16 old_vid = adapter->mng_vlan_id;
2471
2472 if (!adapter->vlgrp)
2473 return;
2474
2475 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2476 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2477 if (adapter->hw.mng_cookie.status &
2478 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2479 e1000_vlan_rx_add_vid(netdev, vid);
2480 adapter->mng_vlan_id = vid;
2481 }
2482
2483 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2484 (vid != old_vid) &&
2485 !vlan_group_get_device(adapter->vlgrp, old_vid))
2486 e1000_vlan_rx_kill_vid(netdev, old_vid);
2487 } else {
2488 adapter->mng_vlan_id = vid;
2489 }
2490}
2491
2492
2493static void e1000_vlan_rx_register(struct net_device *netdev,
2494 struct vlan_group *grp)
2495{
2496 struct e1000_adapter *adapter = netdev_priv(netdev);
2497 struct e1000_hw *hw = &adapter->hw;
2498 u32 ctrl, rctl;
2499
74ef9c39
JB		 2500 if (!test_bit(__E1000_DOWN, &adapter->state))
2501 e1000_irq_disable(adapter);
bc7f75fa
AK		 2502 adapter->vlgrp = grp;
2503
2504 if (grp) {
2505 /* enable VLAN tag insert/strip */
2506 ctrl = er32(CTRL);
2507 ctrl |= E1000_CTRL_VME;
2508 ew32(CTRL, ctrl);
2509
2510 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2511 /* enable VLAN receive filtering */
2512 rctl = er32(RCTL);
bc7f75fa
AK		 2513 rctl &= ~E1000_RCTL_CFIEN;
2514 ew32(RCTL, rctl);
2515 e1000_update_mng_vlan(adapter);
2516 }
2517 } else {
2518 /* disable VLAN tag insert/strip */
2519 ctrl = er32(CTRL);
2520 ctrl &= ~E1000_CTRL_VME;
2521 ew32(CTRL, ctrl);
2522
2523 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2524 if (adapter->mng_vlan_id !=
2525 (u16)E1000_MNG_VLAN_NONE) {
2526 e1000_vlan_rx_kill_vid(netdev,
2527 adapter->mng_vlan_id);
2528 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2529 }
2530 }
2531 }
2532
74ef9c39
JB		 2533 if (!test_bit(__E1000_DOWN, &adapter->state))
2534 e1000_irq_enable(adapter);
bc7f75fa
AK		 2535}
2536
2537static void e1000_restore_vlan(struct e1000_adapter *adapter)
2538{
2539 u16 vid;
2540
2541 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2542
2543 if (!adapter->vlgrp)
2544 return;
2545
b738127d 2546 for (vid = 0; vid < VLAN_N_VID; vid++) {
bc7f75fa
AK		 2547 if (!vlan_group_get_device(adapter->vlgrp, vid))
2548 continue;
2549 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2550 }
2551}
2552
cd791618 2553static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK		 2554{
2555 struct e1000_hw *hw = &adapter->hw;
cd791618 2556 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK		 2557
2558 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2559 return;
2560
2561 manc = er32(MANC);
2562
ad68076e
BA		 2563 /*
2564 * enable receiving management packets to the host. this will probably
bc7f75fa 2565 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2566 * the packets will be handled on SMBUS
2567 */
bc7f75fa
AK		 2568 manc |= E1000_MANC_EN_MNG2HOST;
2569 manc2h = er32(MANC2H);
cd791618
BA		 2570
2571 switch (hw->mac.type) {
2572 default:
2573 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2574 break;
2575 case e1000_82574:
2576 case e1000_82583:
2577 /*
2578 * Check if IPMI pass-through decision filter already exists;
2579 * if so, enable it.
2580 */
2581 for (i = 0, j = 0; i < 8; i++) {
2582 mdef = er32(MDEF(i));
2583
2584 /* Ignore filters with anything other than IPMI ports */
3b21b508 2585 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
cd791618
BA		 2586 continue;
2587
2588 /* Enable this decision filter in MANC2H */
2589 if (mdef)
2590 manc2h |= (1 << i);
2591
2592 j |= mdef;
2593 }
2594
2595 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2596 break;
2597
2598 /* Create new decision filter in an empty filter */
2599 for (i = 0, j = 0; i < 8; i++)
2600 if (er32(MDEF(i)) == 0) {
2601 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2602 E1000_MDEF_PORT_664));
2603 manc2h |= (1 << 1);
2604 j++;
2605 break;
2606 }
2607
2608 if (!j)
2609 e_warn("Unable to create IPMI pass-through filter\n");
2610 break;
2611 }
2612
bc7f75fa
AK		 2613 ew32(MANC2H, manc2h);
2614 ew32(MANC, manc);
2615}
2616
2617/**
af667a29 2618 * e1000_configure_tx - Configure Transmit Unit after Reset
bc7f75fa
AK		 2619 * @adapter: board private structure
2620 *
2621 * Configure the Tx unit of the MAC after a reset.
2622 **/
2623static void e1000_configure_tx(struct e1000_adapter *adapter)
2624{
2625 struct e1000_hw *hw = &adapter->hw;
2626 struct e1000_ring *tx_ring = adapter->tx_ring;
2627 u64 tdba;
2628 u32 tdlen, tctl, tipg, tarc;
2629 u32 ipgr1, ipgr2;
2630
2631 /* Setup the HW Tx Head and Tail descriptor pointers */
2632 tdba = tx_ring->dma;
2633 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2634 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2635 ew32(TDBAH, (tdba >> 32));
2636 ew32(TDLEN, tdlen);
2637 ew32(TDH, 0);
2638 ew32(TDT, 0);
2639 tx_ring->head = E1000_TDH;
2640 tx_ring->tail = E1000_TDT;
2641
2642 /* Set the default values for the Tx Inter Packet Gap timer */
2643 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2644 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2645 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2646
2647 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2648 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2649
2650 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2651 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2652 ew32(TIPG, tipg);
2653
2654 /* Set the Tx Interrupt Delay register */
2655 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2656 /* Tx irq moderation */
bc7f75fa
AK		 2657 ew32(TADV, adapter->tx_abs_int_delay);
2658
3a3b7586
JB		 2659 if (adapter->flags2 & FLAG2_DMA_BURST) {
2660 u32 txdctl = er32(TXDCTL(0));
2661 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2662 E1000_TXDCTL_WTHRESH);
2663 /*
2664 * set up some performance related parameters to encourage the
2665 * hardware to use the bus more efficiently in bursts, depends
2666 * on the tx_int_delay to be enabled,
2667 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time
2668 * hthresh = 1 ==> prefetch when one or more available
2669 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2670 * BEWARE: this seems to work but should be considered first if
af667a29 2671 * there are Tx hangs or other Tx related bugs
3a3b7586
JB		 2672 */
2673 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2674 ew32(TXDCTL(0), txdctl);
2675 /* erratum work around: set txdctl the same for both queues */
2676 ew32(TXDCTL(1), txdctl);
2677 }
2678
bc7f75fa
AK		 2679 /* Program the Transmit Control Register */
2680 tctl = er32(TCTL);
2681 tctl &= ~E1000_TCTL_CT;
2682 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2683 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2684
2685 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2686 tarc = er32(TARC(0));
ad68076e
BA		 2687 /*
2688 * set the speed mode bit, we'll clear it if we're not at
2689 * gigabit link later
2690 */
bc7f75fa
AK		 2691#define SPEED_MODE_BIT (1 << 21)
2692 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2693 ew32(TARC(0), tarc);
bc7f75fa
AK		 2694 }
2695
2696 /* errata: program both queues to unweighted RR */
2697 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2698 tarc = er32(TARC(0));
bc7f75fa 2699 tarc |= 1;
e9ec2c0f
JK		 2700 ew32(TARC(0), tarc);
2701 tarc = er32(TARC(1));
bc7f75fa 2702 tarc |= 1;
e9ec2c0f 2703 ew32(TARC(1), tarc);
bc7f75fa
AK		 2704 }
2705
bc7f75fa
AK		 2706 /* Setup Transmit Descriptor Settings for eop descriptor */
2707 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2708
2709 /* only set IDE if we are delaying interrupts using the timers */
2710 if (adapter->tx_int_delay)
2711 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2712
2713 /* enable Report Status bit */
2714 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2715
2716 ew32(TCTL, tctl);
2717
edfea6e6 2718 e1000e_config_collision_dist(hw);
bc7f75fa
AK		 2719}
2720
2721/**
2722 * e1000_setup_rctl - configure the receive control registers
2723 * @adapter: Board private structure
2724 **/
2725#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2726 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2727static void e1000_setup_rctl(struct e1000_adapter *adapter)
2728{
2729 struct e1000_hw *hw = &adapter->hw;
2730 u32 rctl, rfctl;
2731 u32 psrctl = 0;
2732 u32 pages = 0;
2733
a1ce6473
BA		 2734 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2735 if (hw->mac.type == e1000_pch2lan) {
2736 s32 ret_val;
2737
2738 if (adapter->netdev->mtu > ETH_DATA_LEN)
2739 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2740 else
2741 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
dd93f95e
BA		 2742
2743 if (ret_val)
2744 e_dbg("failed to enable jumbo frame workaround mode\n");
a1ce6473
BA		 2745 }
2746
bc7f75fa
AK		 2747 /* Program MC offset vector base */
2748 rctl = er32(RCTL);
2749 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2750 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2751 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2752 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2753
2754 /* Do not Store bad packets */
2755 rctl &= ~E1000_RCTL_SBP;
2756
2757 /* Enable Long Packet receive */
2758 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2759 rctl &= ~E1000_RCTL_LPE;
2760 else
2761 rctl |= E1000_RCTL_LPE;
2762
eb7c3adb
JK		 2763 /* Some systems expect that the CRC is included in SMBUS traffic. The
2764 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2765 * host memory when this is enabled
2766 */
2767 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2768 rctl |= E1000_RCTL_SECRC;
5918bd88 2769
a4f58f54
BA		 2770 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2771 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2772 u16 phy_data;
2773
2774 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2775 phy_data &= 0xfff8;
2776 phy_data |= (1 << 2);
2777 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2778
2779 e1e_rphy(hw, 22, &phy_data);
2780 phy_data &= 0x0fff;
2781 phy_data |= (1 << 14);
2782 e1e_wphy(hw, 0x10, 0x2823);
2783 e1e_wphy(hw, 0x11, 0x0003);
2784 e1e_wphy(hw, 22, phy_data);
2785 }
2786
bc7f75fa
AK		 2787 /* Setup buffer sizes */
2788 rctl &= ~E1000_RCTL_SZ_4096;
2789 rctl |= E1000_RCTL_BSEX;
2790 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2791 case 2048:
2792 default:
2793 rctl |= E1000_RCTL_SZ_2048;
2794 rctl &= ~E1000_RCTL_BSEX;
2795 break;
2796 case 4096:
2797 rctl |= E1000_RCTL_SZ_4096;
2798 break;
2799 case 8192:
2800 rctl |= E1000_RCTL_SZ_8192;
2801 break;
2802 case 16384:
2803 rctl |= E1000_RCTL_SZ_16384;
2804 break;
2805 }
2806
2807 /*
2808 * 82571 and greater support packet-split where the protocol
2809 * header is placed in skb->data and the packet data is
2810 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2811 * In the case of a non-split, skb->data is linearly filled,
2812 * followed by the page buffers. Therefore, skb->data is
2813 * sized to hold the largest protocol header.
2814 *
2815 * allocations using alloc_page take too long for regular MTU
2816 * so only enable packet split for jumbo frames
2817 *
2818 * Using pages when the page size is greater than 16k wastes
2819 * a lot of memory, since we allocate 3 pages at all times
2820 * per packet.
2821 */
bc7f75fa 2822 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
dbcb9fec 2823 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
97ac8cae 2824 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2825 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2826 else
2827 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2828
2829 if (adapter->rx_ps_pages) {
2830 /* Configure extra packet-split registers */
2831 rfctl = er32(RFCTL);
2832 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2833 /*
2834 * disable packet split support for IPv6 extension headers,
2835 * because some malformed IPv6 headers can hang the Rx
2836 */
bc7f75fa
AK		 2837 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2838 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2839
2840 ew32(RFCTL, rfctl);
2841
140a7480
AK		 2842 /* Enable Packet split descriptors */
2843 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2844
2845 psrctl |= adapter->rx_ps_bsize0 >>
2846 E1000_PSRCTL_BSIZE0_SHIFT;
2847
2848 switch (adapter->rx_ps_pages) {
2849 case 3:
2850 psrctl |= PAGE_SIZE <<
2851 E1000_PSRCTL_BSIZE3_SHIFT;
2852 case 2:
2853 psrctl |= PAGE_SIZE <<
2854 E1000_PSRCTL_BSIZE2_SHIFT;
2855 case 1:
2856 psrctl |= PAGE_SIZE >>
2857 E1000_PSRCTL_BSIZE1_SHIFT;
2858 break;
2859 }
2860
2861 ew32(PSRCTL, psrctl);
2862 }
2863
2864 ew32(RCTL, rctl);
318a94d6
JK		 2865 /* just started the receive unit, no need to restart */
2866 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2867}
2868
2869/**
2870 * e1000_configure_rx - Configure Receive Unit after Reset
2871 * @adapter: board private structure
2872 *
2873 * Configure the Rx unit of the MAC after a reset.
2874 **/
2875static void e1000_configure_rx(struct e1000_adapter *adapter)
2876{
2877 struct e1000_hw *hw = &adapter->hw;
2878 struct e1000_ring *rx_ring = adapter->rx_ring;
2879 u64 rdba;
2880 u32 rdlen, rctl, rxcsum, ctrl_ext;
2881
2882 if (adapter->rx_ps_pages) {
2883 /* this is a 32 byte descriptor */
2884 rdlen = rx_ring->count *
af667a29 2885 sizeof(union e1000_rx_desc_packet_split);
bc7f75fa
AK		 2886 adapter->clean_rx = e1000_clean_rx_irq_ps;
2887 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2888 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2889 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2890 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2891 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2892 } else {
97ac8cae 2893 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2894 adapter->clean_rx = e1000_clean_rx_irq;
2895 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2896 }
2897
2898 /* disable receives while setting up the descriptors */
2899 rctl = er32(RCTL);
2900 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2901 e1e_flush();
2902 msleep(10);
2903
3a3b7586
JB		 2904 if (adapter->flags2 & FLAG2_DMA_BURST) {
2905 /*
2906 * set the writeback threshold (only takes effect if the RDTR
2907 * is set). set GRAN=1 and write back up to 0x4 worth, and
af667a29 2908 * enable prefetching of 0x20 Rx descriptors
3a3b7586
JB		 2909 * granularity = 01
2910 * wthresh = 04,
2911 * hthresh = 04,
2912 * pthresh = 0x20
2913 */
2914 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
2915 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
2916
2917 /*
2918 * override the delay timers for enabling bursting, only if
2919 * the value was not set by the user via module options
2920 */
2921 if (adapter->rx_int_delay == DEFAULT_RDTR)
2922 adapter->rx_int_delay = BURST_RDTR;
2923 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
2924 adapter->rx_abs_int_delay = BURST_RADV;
2925 }
2926
bc7f75fa
AK		 2927 /* set the Receive Delay Timer Register */
2928 ew32(RDTR, adapter->rx_int_delay);
2929
2930 /* irq moderation */
2931 ew32(RADV, adapter->rx_abs_int_delay);
828bac87 2932 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
ad68076e 2933 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2934
2935 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2936 /* Auto-Mask interrupts upon ICR access */
2937 ctrl_ext |= E1000_CTRL_EXT_IAME;
2938 ew32(IAM, 0xffffffff);
2939 ew32(CTRL_EXT, ctrl_ext);
2940 e1e_flush();
2941
ad68076e
BA		 2942 /*
2943 * Setup the HW Rx Head and Tail Descriptor Pointers and
2944 * the Base and Length of the Rx Descriptor Ring
2945 */
bc7f75fa 2946 rdba = rx_ring->dma;
284901a9 2947 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2948 ew32(RDBAH, (rdba >> 32));
2949 ew32(RDLEN, rdlen);
2950 ew32(RDH, 0);
2951 ew32(RDT, 0);
2952 rx_ring->head = E1000_RDH;
2953 rx_ring->tail = E1000_RDT;
2954
2955 /* Enable Receive Checksum Offload for TCP and UDP */
2956 rxcsum = er32(RXCSUM);
2957 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2958 rxcsum |= E1000_RXCSUM_TUOFL;
2959
ad68076e
BA		 2960 /*
2961 * IPv4 payload checksum for UDP fragments must be
2962 * used in conjunction with packet-split.
2963 */
bc7f75fa
AK		 2964 if (adapter->rx_ps_pages)
2965 rxcsum |= E1000_RXCSUM_IPPCSE;
2966 } else {
2967 rxcsum &= ~E1000_RXCSUM_TUOFL;
2968 /* no need to clear IPPCSE as it defaults to 0 */
2969 }
2970 ew32(RXCSUM, rxcsum);
2971
ad68076e
BA		 2972 /*
2973 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2974 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2975 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2976 */
828bac87
BA		 2977 if ((adapter->flags & FLAG_HAS_ERT) ||
2978 (adapter->hw.mac.type == e1000_pch2lan)) {
53ec5498
BA		 2979 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2980 u32 rxdctl = er32(RXDCTL(0));
2981 ew32(RXDCTL(0), rxdctl | 0x3);
828bac87
BA		 2982 if (adapter->flags & FLAG_HAS_ERT)
2983 ew32(ERT, E1000_ERT_2048 | (1 << 13));
53ec5498
BA		 2984 /*
2985 * With jumbo frames and early-receive enabled,
2986 * excessive C-state transition latencies result in
2987 * dropped transactions.
2988 */
af667a29 2989 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55);
53ec5498 2990 } else {
af667a29
BA		 2991 pm_qos_update_request(&adapter->netdev->pm_qos_req,
2992 PM_QOS_DEFAULT_VALUE);
53ec5498 2993 }
97ac8cae 2994 }
bc7f75fa
AK		 2995
2996 /* Enable Receives */
2997 ew32(RCTL, rctl);
2998}
2999
3000/**
e2de3eb6 3001 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 3002 * @hw: pointer to the HW structure
3003 * @mc_addr_list: array of multicast addresses to program
3004 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 3005 *
ab8932f3 3006 * Updates the Multicast Table Array.
bc7f75fa 3007 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 3008 **/
e2de3eb6 3009static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 3010 u32 mc_addr_count)
bc7f75fa 3011{
ab8932f3 3012 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 3013}
3014
3015/**
3016 * e1000_set_multi - Multicast and Promiscuous mode set
3017 * @netdev: network interface device structure
3018 *
3019 * The set_multi entry point is called whenever the multicast address
3020 * list or the network interface flags are updated. This routine is
3021 * responsible for configuring the hardware for proper multicast,
3022 * promiscuous mode, and all-multi behavior.
3023 **/
3024static void e1000_set_multi(struct net_device *netdev)
3025{
3026 struct e1000_adapter *adapter = netdev_priv(netdev);
3027 struct e1000_hw *hw = &adapter->hw;
22bedad3 3028 struct netdev_hw_addr *ha;
bc7f75fa
AK		 3029 u8 *mta_list;
3030 u32 rctl;
3031 int i;
3032
3033 /* Check for Promiscuous and All Multicast modes */
3034
3035 rctl = er32(RCTL);
3036
3037 if (netdev->flags & IFF_PROMISC) {
3038 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 3039 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 3040 } else {
746b9f02
PM		 3041 if (netdev->flags & IFF_ALLMULTI) {
3042 rctl |= E1000_RCTL_MPE;
3043 rctl &= ~E1000_RCTL_UPE;
3044 } else {
3045 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3046 }
78ed11a5 3047 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 3048 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 3049 }
3050
3051 ew32(RCTL, rctl);
3052
7aeef972
JP		 3053 if (!netdev_mc_empty(netdev)) {
3054 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 3055 if (!mta_list)
3056 return;
3057
3058 /* prepare a packed array of only addresses. */
7aeef972 3059 i = 0;
22bedad3
JP		 3060 netdev_for_each_mc_addr(ha, netdev)
3061 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 3062
ab8932f3 3063 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 3064 kfree(mta_list);
3065 } else {
3066 /*
3067 * if we're called from probe, we might not have
3068 * anything to do here, so clear out the list
3069 */
ab8932f3 3070 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 3071 }
3072}
3073
3074/**
ad68076e 3075 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 3076 * @adapter: private board structure
3077 **/
3078static void e1000_configure(struct e1000_adapter *adapter)
3079{
3080 e1000_set_multi(adapter->netdev);
3081
3082 e1000_restore_vlan(adapter);
cd791618 3083 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 3084
3085 e1000_configure_tx(adapter);
3086 e1000_setup_rctl(adapter);
3087 e1000_configure_rx(adapter);
ad68076e 3088 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 3089}
3090
3091/**
3092 * e1000e_power_up_phy - restore link in case the phy was powered down
3093 * @adapter: address of board private structure
3094 *
3095 * The phy may be powered down to save power and turn off link when the
3096 * driver is unloaded and wake on lan is not enabled (among others)
3097 * *** this routine MUST be followed by a call to e1000e_reset ***
3098 **/
3099void e1000e_power_up_phy(struct e1000_adapter *adapter)
3100{
17f208de
BA		 3101 if (adapter->hw.phy.ops.power_up)
3102 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 3103
3104 adapter->hw.mac.ops.setup_link(&adapter->hw);
3105}
3106
3107/**
3108 * e1000_power_down_phy - Power down the PHY
3109 *
17f208de
BA		 3110 * Power down the PHY so no link is implied when interface is down.
3111 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 3112 */
3113static void e1000_power_down_phy(struct e1000_adapter *adapter)
3114{
bc7f75fa 3115 /* WoL is enabled */
23b66e2b 3116 if (adapter->wol)
bc7f75fa
AK		 3117 return;
3118
17f208de
BA		 3119 if (adapter->hw.phy.ops.power_down)
3120 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3121}
3122
3123/**
3124 * e1000e_reset - bring the hardware into a known good state
3125 *
3126 * This function boots the hardware and enables some settings that
3127 * require a configuration cycle of the hardware - those cannot be
3128 * set/changed during runtime. After reset the device needs to be
ad68076e 3129 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3130 */
3131void e1000e_reset(struct e1000_adapter *adapter)
3132{
3133 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3134 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3135 struct e1000_hw *hw = &adapter->hw;
3136 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3137 u32 pba = adapter->pba;
bc7f75fa
AK		 3138 u16 hwm;
3139
ad68076e 3140 /* reset Packet Buffer Allocation to default */
318a94d6 3141 ew32(PBA, pba);
df762464 3142
318a94d6 3143 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3144 /*
3145 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3146 * large enough to accommodate two full transmit packets,
3147 * rounded up to the next 1KB and expressed in KB. Likewise,
3148 * the Rx FIFO should be large enough to accommodate at least
3149 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3150 * expressed in KB.
3151 */
df762464 3152 pba = er32(PBA);
bc7f75fa 3153 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3154 tx_space = pba >> 16;
bc7f75fa 3155 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3156 pba &= 0xffff;
ad68076e 3157 /*
af667a29 3158 * the Tx fifo also stores 16 bytes of information about the Tx
ad68076e 3159 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3160 */
3161 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3162 sizeof(struct e1000_tx_desc) -
3163 ETH_FCS_LEN) * 2;
3164 min_tx_space = ALIGN(min_tx_space, 1024);
3165 min_tx_space >>= 10;
3166 /* software strips receive CRC, so leave room for it */
318a94d6 3167 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3168 min_rx_space = ALIGN(min_rx_space, 1024);
3169 min_rx_space >>= 10;
3170
ad68076e
BA		 3171 /*
3172 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3173 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3174 * allocation, take space away from current Rx allocation
3175 */
df762464
AK		 3176 if ((tx_space < min_tx_space) &&
3177 ((min_tx_space - tx_space) < pba)) {
3178 pba -= min_tx_space - tx_space;
bc7f75fa 3179
ad68076e 3180 /*
af667a29 3181 * if short on Rx space, Rx wins and must trump Tx
ad68076e
BA		 3182 * adjustment or use Early Receive if available
3183 */
df762464 3184 if ((pba < min_rx_space) &&
bc7f75fa
AK		 3185 (!(adapter->flags & FLAG_HAS_ERT)))
3186 /* ERT enabled in e1000_configure_rx */
df762464 3187 pba = min_rx_space;
bc7f75fa 3188 }
df762464
AK		 3189
3190 ew32(PBA, pba);
bc7f75fa
AK		 3191 }
3192
ad68076e
BA		 3193 /*
3194 * flow control settings
3195 *
38eb394e 3196 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3197 * (or the size used for early receive) above it in the Rx FIFO.
3198 * Set it to the lower of:
3199 * - 90% of the Rx FIFO size, and
3200 * - the full Rx FIFO size minus the early receive size (for parts
3201 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3202 * - the full Rx FIFO size minus one full frame
ad68076e 3203 */
d3738bb8
BA		 3204 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3205 fc->pause_time = 0xFFFF;
3206 else
3207 fc->pause_time = E1000_FC_PAUSE_TIME;
3208 fc->send_xon = 1;
3209 fc->current_mode = fc->requested_mode;
3210
3211 switch (hw->mac.type) {
3212 default:
3213 if ((adapter->flags & FLAG_HAS_ERT) &&
3214 (adapter->netdev->mtu > ETH_DATA_LEN))
3215 hwm = min(((pba << 10) * 9 / 10),
3216 ((pba << 10) - (E1000_ERT_2048 << 3)));
3217 else
3218 hwm = min(((pba << 10) * 9 / 10),
3219 ((pba << 10) - adapter->max_frame_size));
3220
3221 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3222 fc->low_water = fc->high_water - 8;
3223 break;
3224 case e1000_pchlan:
38eb394e
BA		 3225 /*
3226 * Workaround PCH LOM adapter hangs with certain network
3227 * loads. If hangs persist, try disabling Tx flow control.
3228 */
3229 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3230 fc->high_water = 0x3500;
3231 fc->low_water = 0x1500;
3232 } else {
3233 fc->high_water = 0x5000;
3234 fc->low_water = 0x3000;
3235 }
a305595b 3236 fc->refresh_time = 0x1000;
d3738bb8
BA		 3237 break;
3238 case e1000_pch2lan:
3239 fc->high_water = 0x05C20;
3240 fc->low_water = 0x05048;
3241 fc->pause_time = 0x0650;
3242 fc->refresh_time = 0x0400;
828bac87
BA		 3243 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3244 pba = 14;
3245 ew32(PBA, pba);
3246 }
d3738bb8 3247 break;
38eb394e 3248 }
bc7f75fa 3249
828bac87
BA		 3250 /*
3251 * Disable Adaptive Interrupt Moderation if 2 full packets cannot
3252 * fit in receive buffer and early-receive not supported.
3253 */
3254 if (adapter->itr_setting & 0x3) {
3255 if (((adapter->max_frame_size * 2) > (pba << 10)) &&
3256 !(adapter->flags & FLAG_HAS_ERT)) {
3257 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3258 dev_info(&adapter->pdev->dev,
3259 "Interrupt Throttle Rate turned off\n");
3260 adapter->flags2 |= FLAG2_DISABLE_AIM;
3261 ew32(ITR, 0);
3262 }
3263 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3264 dev_info(&adapter->pdev->dev,
3265 "Interrupt Throttle Rate turned on\n");
3266 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3267 adapter->itr = 20000;
3268 ew32(ITR, 1000000000 / (adapter->itr * 256));
3269 }
3270 }
3271
bc7f75fa
AK		 3272 /* Allow time for pending master requests to run */
3273 mac->ops.reset_hw(hw);
97ac8cae
BA		 3274
3275 /*
3276 * For parts with AMT enabled, let the firmware know
3277 * that the network interface is in control
3278 */
c43bc57e 3279 if (adapter->flags & FLAG_HAS_AMT)
31dbe5b4 3280 e1000e_get_hw_control(adapter);
97ac8cae 3281
bc7f75fa
AK		 3282 ew32(WUC, 0);
3283
3284 if (mac->ops.init_hw(hw))
44defeb3 3285 e_err("Hardware Error\n");
bc7f75fa
AK		 3286
3287 e1000_update_mng_vlan(adapter);
3288
3289 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3290 ew32(VET, ETH_P_8021Q);
3291
3292 e1000e_reset_adaptive(hw);
31dbe5b4
BA		 3293
3294 if (!netif_running(adapter->netdev) &&
3295 !test_bit(__E1000_TESTING, &adapter->state)) {
3296 e1000_power_down_phy(adapter);
3297 return;
3298 }
3299
bc7f75fa
AK		 3300 e1000_get_phy_info(hw);
3301
918d7197
BA		 3302 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3303 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3304 u16 phy_data = 0;
ad68076e
BA		 3305 /*
3306 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3307 * the return value of this function because there is nothing
ad68076e
BA		 3308 * different we would do if it failed
3309 */
bc7f75fa
AK		 3310 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3311 phy_data &= ~IGP02E1000_PM_SPD;
3312 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3313 }
bc7f75fa
AK		 3314}
3315
3316int e1000e_up(struct e1000_adapter *adapter)
3317{
3318 struct e1000_hw *hw = &adapter->hw;
3319
3320 /* hardware has been reset, we need to reload some things */
3321 e1000_configure(adapter);
3322
3323 clear_bit(__E1000_DOWN, &adapter->state);
3324
3325 napi_enable(&adapter->napi);
4662e82b
BA		 3326 if (adapter->msix_entries)
3327 e1000_configure_msix(adapter);
bc7f75fa
AK		 3328 e1000_irq_enable(adapter);
3329
4cb9be7a
JB		 3330 netif_wake_queue(adapter->netdev);
3331
bc7f75fa 3332 /* fire a link change interrupt to start the watchdog */
52a9b231
BA		 3333 if (adapter->msix_entries)
3334 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3335 else
3336 ew32(ICS, E1000_ICS_LSC);
3337
bc7f75fa
AK		 3338 return 0;
3339}
3340
3341void e1000e_down(struct e1000_adapter *adapter)
3342{
3343 struct net_device *netdev = adapter->netdev;
3344 struct e1000_hw *hw = &adapter->hw;
3345 u32 tctl, rctl;
3346
ad68076e
BA		 3347 /*
3348 * signal that we're down so the interrupt handler does not
3349 * reschedule our watchdog timer
3350 */
bc7f75fa
AK		 3351 set_bit(__E1000_DOWN, &adapter->state);
3352
3353 /* disable receives in the hardware */
3354 rctl = er32(RCTL);
3355 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3356 /* flush and sleep below */
3357
4cb9be7a 3358 netif_stop_queue(netdev);
bc7f75fa
AK		 3359
3360 /* disable transmits in the hardware */
3361 tctl = er32(TCTL);
3362 tctl &= ~E1000_TCTL_EN;
3363 ew32(TCTL, tctl);
3364 /* flush both disables and wait for them to finish */
3365 e1e_flush();
3366 msleep(10);
3367
3368 napi_disable(&adapter->napi);
3369 e1000_irq_disable(adapter);
3370
3371 del_timer_sync(&adapter->watchdog_timer);
3372 del_timer_sync(&adapter->phy_info_timer);
3373
bc7f75fa
AK		 3374 netif_carrier_off(netdev);
3375 adapter->link_speed = 0;
3376 adapter->link_duplex = 0;
3377
52cc3086
JK		 3378 if (!pci_channel_offline(adapter->pdev))
3379 e1000e_reset(adapter);
bc7f75fa
AK		 3380 e1000_clean_tx_ring(adapter);
3381 e1000_clean_rx_ring(adapter);
3382
3383 /*
3384 * TODO: for power management, we could drop the link and
3385 * pci_disable_device here.
3386 */
3387}
3388
3389void e1000e_reinit_locked(struct e1000_adapter *adapter)
3390{
3391 might_sleep();
3392 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3393 msleep(1);
3394 e1000e_down(adapter);
3395 e1000e_up(adapter);
3396 clear_bit(__E1000_RESETTING, &adapter->state);
3397}
3398
3399/**
3400 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3401 * @adapter: board private structure to initialize
3402 *
3403 * e1000_sw_init initializes the Adapter private data structure.
3404 * Fields are initialized based on PCI device information and
3405 * OS network device settings (MTU size).
3406 **/
3407static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3408{
bc7f75fa
AK		 3409 struct net_device *netdev = adapter->netdev;
3410
3411 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3412 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3413 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3414 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3415
4662e82b 3416 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3417
4662e82b
BA		 3418 if (e1000_alloc_queues(adapter))
3419 return -ENOMEM;
bc7f75fa 3420
bc7f75fa 3421 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3422 e1000_irq_disable(adapter);
3423
bc7f75fa
AK		 3424 set_bit(__E1000_DOWN, &adapter->state);
3425 return 0;
bc7f75fa
AK		 3426}
3427
f8d59f78
BA		 3428/**
3429 * e1000_intr_msi_test - Interrupt Handler
3430 * @irq: interrupt number
3431 * @data: pointer to a network interface device structure
3432 **/
3433static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3434{
3435 struct net_device *netdev = data;
3436 struct e1000_adapter *adapter = netdev_priv(netdev);
3437 struct e1000_hw *hw = &adapter->hw;
3438 u32 icr = er32(ICR);
3439
3bb99fe2 3440 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3441 if (icr & E1000_ICR_RXSEQ) {
3442 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3443 wmb();
3444 }
3445
3446 return IRQ_HANDLED;
3447}
3448
3449/**
3450 * e1000_test_msi_interrupt - Returns 0 for successful test
3451 * @adapter: board private struct
3452 *
3453 * code flow taken from tg3.c
3454 **/
3455static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3456{
3457 struct net_device *netdev = adapter->netdev;
3458 struct e1000_hw *hw = &adapter->hw;
3459 int err;
3460
3461 /* poll_enable hasn't been called yet, so don't need disable */
3462 /* clear any pending events */
3463 er32(ICR);
3464
3465 /* free the real vector and request a test handler */
3466 e1000_free_irq(adapter);
4662e82b 3467 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3468
3469 /* Assume that the test fails, if it succeeds then the test
3470 * MSI irq handler will unset this flag */
3471 adapter->flags |= FLAG_MSI_TEST_FAILED;
3472
3473 err = pci_enable_msi(adapter->pdev);
3474 if (err)
3475 goto msi_test_failed;
3476
a0607fd3 3477 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3478 netdev->name, netdev);
3479 if (err) {
3480 pci_disable_msi(adapter->pdev);
3481 goto msi_test_failed;
3482 }
3483
3484 wmb();
3485
3486 e1000_irq_enable(adapter);
3487
3488 /* fire an unusual interrupt on the test handler */
3489 ew32(ICS, E1000_ICS_RXSEQ);
3490 e1e_flush();
3491 msleep(50);
3492
3493 e1000_irq_disable(adapter);
3494
3495 rmb();
3496
3497 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3498 adapter->int_mode = E1000E_INT_MODE_LEGACY;
068e8a30
JD		 3499 e_info("MSI interrupt test failed, using legacy interrupt.\n");
3500 } else
3501 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78
BA		 3502
3503 free_irq(adapter->pdev->irq, netdev);
3504 pci_disable_msi(adapter->pdev);
3505
f8d59f78 3506msi_test_failed:
4662e82b 3507 e1000e_set_interrupt_capability(adapter);
068e8a30 3508 return e1000_request_irq(adapter);
f8d59f78
BA		 3509}
3510
3511/**
3512 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3513 * @adapter: board private struct
3514 *
3515 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3516 **/
3517static int e1000_test_msi(struct e1000_adapter *adapter)
3518{
3519 int err;
3520 u16 pci_cmd;
3521
3522 if (!(adapter->flags & FLAG_MSI_ENABLED))
3523 return 0;
3524
3525 /* disable SERR in case the MSI write causes a master abort */
3526 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
36f2407f
DN		 3527 if (pci_cmd & PCI_COMMAND_SERR)
3528 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3529 pci_cmd & ~PCI_COMMAND_SERR);
f8d59f78
BA		 3530
3531 err = e1000_test_msi_interrupt(adapter);
3532
36f2407f
DN		 3533 /* re-enable SERR */
3534 if (pci_cmd & PCI_COMMAND_SERR) {
3535 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3536 pci_cmd |= PCI_COMMAND_SERR;
3537 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3538 }
f8d59f78 3539
f8d59f78
BA		 3540 return err;
3541}
3542
bc7f75fa
AK		 3543/**
3544 * e1000_open - Called when a network interface is made active
3545 * @netdev: network interface device structure
3546 *
3547 * Returns 0 on success, negative value on failure
3548 *
3549 * The open entry point is called when a network interface is made
3550 * active by the system (IFF_UP). At this point all resources needed
3551 * for transmit and receive operations are allocated, the interrupt
3552 * handler is registered with the OS, the watchdog timer is started,
3553 * and the stack is notified that the interface is ready.
3554 **/
3555static int e1000_open(struct net_device *netdev)
3556{
3557 struct e1000_adapter *adapter = netdev_priv(netdev);
3558 struct e1000_hw *hw = &adapter->hw;
23606cf5 3559 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3560 int err;
3561
3562 /* disallow open during test */
3563 if (test_bit(__E1000_TESTING, &adapter->state))
3564 return -EBUSY;
3565
23606cf5
RW		 3566 pm_runtime_get_sync(&pdev->dev);
3567
9c563d20
JB		 3568 netif_carrier_off(netdev);
3569
bc7f75fa
AK		 3570 /* allocate transmit descriptors */
3571 err = e1000e_setup_tx_resources(adapter);
3572 if (err)
3573 goto err_setup_tx;
3574
3575 /* allocate receive descriptors */
3576 err = e1000e_setup_rx_resources(adapter);
3577 if (err)
3578 goto err_setup_rx;
3579
11b08be8
BA		 3580 /*
3581 * If AMT is enabled, let the firmware know that the network
3582 * interface is now open and reset the part to a known state.
3583 */
3584 if (adapter->flags & FLAG_HAS_AMT) {
31dbe5b4 3585 e1000e_get_hw_control(adapter);
11b08be8
BA		 3586 e1000e_reset(adapter);
3587 }
3588
bc7f75fa
AK		 3589 e1000e_power_up_phy(adapter);
3590
3591 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3592 if ((adapter->hw.mng_cookie.status &
3593 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3594 e1000_update_mng_vlan(adapter);
3595
c128ec29 3596 /* DMA latency requirement to workaround early-receive/jumbo issue */
828bac87
BA		 3597 if ((adapter->flags & FLAG_HAS_ERT) ||
3598 (adapter->hw.mac.type == e1000_pch2lan))
6ba74014
LT		 3599 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3600 PM_QOS_CPU_DMA_LATENCY,
3601 PM_QOS_DEFAULT_VALUE);
c128ec29 3602
ad68076e
BA		 3603 /*
3604 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3605 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3606 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3607 * clean_rx handler before we do so.
3608 */
bc7f75fa
AK		 3609 e1000_configure(adapter);
3610
3611 err = e1000_request_irq(adapter);
3612 if (err)
3613 goto err_req_irq;
3614
f8d59f78
BA		 3615 /*
3616 * Work around PCIe errata with MSI interrupts causing some chipsets to
3617 * ignore e1000e MSI messages, which means we need to test our MSI
3618 * interrupt now
3619 */
4662e82b 3620 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3621 err = e1000_test_msi(adapter);
3622 if (err) {
3623 e_err("Interrupt allocation failed\n");
3624 goto err_req_irq;
3625 }
3626 }
3627
bc7f75fa
AK		 3628 /* From here on the code is the same as e1000e_up() */
3629 clear_bit(__E1000_DOWN, &adapter->state);
3630
3631 napi_enable(&adapter->napi);
3632
3633 e1000_irq_enable(adapter);
3634
4cb9be7a 3635 netif_start_queue(netdev);
d55b53ff 3636
23606cf5
RW		 3637 adapter->idle_check = true;
3638 pm_runtime_put(&pdev->dev);
3639
bc7f75fa 3640 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA		 3641 if (adapter->msix_entries)
3642 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3643 else
3644 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK		 3645
3646 return 0;
3647
3648err_req_irq:
31dbe5b4 3649 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 3650 e1000_power_down_phy(adapter);
3651 e1000e_free_rx_resources(adapter);
3652err_setup_rx:
3653 e1000e_free_tx_resources(adapter);
3654err_setup_tx:
3655 e1000e_reset(adapter);
23606cf5 3656 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3657
3658 return err;
3659}
3660
3661/**
3662 * e1000_close - Disables a network interface
3663 * @netdev: network interface device structure
3664 *
3665 * Returns 0, this is not allowed to fail
3666 *
3667 * The close entry point is called when an interface is de-activated
3668 * by the OS. The hardware is still under the drivers control, but
3669 * needs to be disabled. A global MAC reset is issued to stop the
3670 * hardware, and all transmit and receive resources are freed.
3671 **/
3672static int e1000_close(struct net_device *netdev)
3673{
3674 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3675 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3676
3677 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3678
3679 pm_runtime_get_sync(&pdev->dev);
3680
3681 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3682 e1000e_down(adapter);
3683 e1000_free_irq(adapter);
3684 }
bc7f75fa 3685 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3686
3687 e1000e_free_tx_resources(adapter);
3688 e1000e_free_rx_resources(adapter);
3689
ad68076e
BA		 3690 /*
3691 * kill manageability vlan ID if supported, but not if a vlan with
3692 * the same ID is registered on the host OS (let 8021q kill it)
3693 */
bc7f75fa
AK		 3694 if ((adapter->hw.mng_cookie.status &
3695 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3696 !(adapter->vlgrp &&
3697 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3698 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3699
ad68076e
BA		 3700 /*
3701 * If AMT is enabled, let the firmware know that the network
3702 * interface is now closed
3703 */
31dbe5b4
BA		 3704 if ((adapter->flags & FLAG_HAS_AMT) &&
3705 !test_bit(__E1000_TESTING, &adapter->state))
3706 e1000e_release_hw_control(adapter);
bc7f75fa 3707
828bac87
BA		 3708 if ((adapter->flags & FLAG_HAS_ERT) ||
3709 (adapter->hw.mac.type == e1000_pch2lan))
6ba74014 3710 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
c128ec29 3711
23606cf5
RW		 3712 pm_runtime_put_sync(&pdev->dev);
3713
bc7f75fa
AK		 3714 return 0;
3715}
3716/**
3717 * e1000_set_mac - Change the Ethernet Address of the NIC
3718 * @netdev: network interface device structure
3719 * @p: pointer to an address structure
3720 *
3721 * Returns 0 on success, negative on failure
3722 **/
3723static int e1000_set_mac(struct net_device *netdev, void *p)
3724{
3725 struct e1000_adapter *adapter = netdev_priv(netdev);
3726 struct sockaddr *addr = p;
3727
3728 if (!is_valid_ether_addr(addr->sa_data))
3729 return -EADDRNOTAVAIL;
3730
3731 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3732 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3733
3734 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3735
3736 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3737 /* activate the work around */
3738 e1000e_set_laa_state_82571(&adapter->hw, 1);
3739
ad68076e
BA		 3740 /*
3741 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3742 * between the time RAR[0] gets clobbered and the time it
3743 * gets fixed (in e1000_watchdog), the actual LAA is in one
3744 * of the RARs and no incoming packets directed to this port
3745 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3746 * RAR[14]
3747 */
bc7f75fa
AK		 3748 e1000e_rar_set(&adapter->hw,
3749 adapter->hw.mac.addr,
3750 adapter->hw.mac.rar_entry_count - 1);
3751 }
3752
3753 return 0;
3754}
3755
a8f88ff5
JB		 3756/**
3757 * e1000e_update_phy_task - work thread to update phy
3758 * @work: pointer to our work struct
3759 *
3760 * this worker thread exists because we must acquire a
3761 * semaphore to read the phy, which we could msleep while
3762 * waiting for it, and we can't msleep in a timer.
3763 **/
3764static void e1000e_update_phy_task(struct work_struct *work)
3765{
3766 struct e1000_adapter *adapter = container_of(work,
3767 struct e1000_adapter, update_phy_task);
3768 e1000_get_phy_info(&adapter->hw);
3769}
3770
ad68076e
BA		 3771/*
3772 * Need to wait a few seconds after link up to get diagnostic information from
3773 * the phy
3774 */
bc7f75fa
AK		 3775static void e1000_update_phy_info(unsigned long data)
3776{
3777 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3778 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3779}
3780
8c7bbb92
BA		 3781/**
3782 * e1000e_update_phy_stats - Update the PHY statistics counters
3783 * @adapter: board private structure
3784 **/
3785static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3786{
3787 struct e1000_hw *hw = &adapter->hw;
3788 s32 ret_val;
3789 u16 phy_data;
3790
3791 ret_val = hw->phy.ops.acquire(hw);
3792 if (ret_val)
3793 return;
3794
3795 hw->phy.addr = 1;
3796
3797#define HV_PHY_STATS_PAGE 778
3798 /*
3799 * A page set is expensive so check if already on desired page.
3800 * If not, set to the page with the PHY status registers.
3801 */
3802 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3803 &phy_data);
3804 if (ret_val)
3805 goto release;
3806 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) {
3807 ret_val = e1000e_write_phy_reg_mdic(hw,
3808 IGP01E1000_PHY_PAGE_SELECT,
3809 (HV_PHY_STATS_PAGE <<
3810 IGP_PAGE_SHIFT));
3811 if (ret_val)
3812 goto release;
3813 }
3814
3815 /* Read/clear the upper 16-bit registers and read/accumulate lower */
3816
3817 /* Single Collision Count */
3818 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS,
3819 &phy_data);
3820 ret_val = e1000e_read_phy_reg_mdic(hw,
3821 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS,
3822 &phy_data);
3823 if (!ret_val)
3824 adapter->stats.scc += phy_data;
3825
3826 /* Excessive Collision Count */
3827 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS,
3828 &phy_data);
3829 ret_val = e1000e_read_phy_reg_mdic(hw,
3830 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS,
3831 &phy_data);
3832 if (!ret_val)
3833 adapter->stats.ecol += phy_data;
3834
3835 /* Multiple Collision Count */
3836 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS,
3837 &phy_data);
3838 ret_val = e1000e_read_phy_reg_mdic(hw,
3839 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS,
3840 &phy_data);
3841 if (!ret_val)
3842 adapter->stats.mcc += phy_data;
3843
3844 /* Late Collision Count */
3845 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS,
3846 &phy_data);
3847 ret_val = e1000e_read_phy_reg_mdic(hw,
3848 HV_LATECOL_LOWER &
3849 MAX_PHY_REG_ADDRESS,
3850 &phy_data);
3851 if (!ret_val)
3852 adapter->stats.latecol += phy_data;
3853
3854 /* Collision Count - also used for adaptive IFS */
3855 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS,
3856 &phy_data);
3857 ret_val = e1000e_read_phy_reg_mdic(hw,
3858 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS,
3859 &phy_data);
3860 if (!ret_val)
3861 hw->mac.collision_delta = phy_data;
3862
3863 /* Defer Count */
3864 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS,
3865 &phy_data);
3866 ret_val = e1000e_read_phy_reg_mdic(hw,
3867 HV_DC_LOWER & MAX_PHY_REG_ADDRESS,
3868 &phy_data);
3869 if (!ret_val)
3870 adapter->stats.dc += phy_data;
3871
3872 /* Transmit with no CRS */
3873 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS,
3874 &phy_data);
3875 ret_val = e1000e_read_phy_reg_mdic(hw,
3876 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS,
3877 &phy_data);
3878 if (!ret_val)
3879 adapter->stats.tncrs += phy_data;
3880
3881release:
3882 hw->phy.ops.release(hw);
3883}
3884
bc7f75fa
AK		 3885/**
3886 * e1000e_update_stats - Update the board statistics counters
3887 * @adapter: board private structure
3888 **/
3889void e1000e_update_stats(struct e1000_adapter *adapter)
3890{
7274c20f 3891 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3892 struct e1000_hw *hw = &adapter->hw;
3893 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3894
3895 /*
3896 * Prevent stats update while adapter is being reset, or if the pci
3897 * connection is down.
3898 */
3899 if (adapter->link_speed == 0)
3900 return;
3901 if (pci_channel_offline(pdev))
3902 return;
3903
bc7f75fa
AK		 3904 adapter->stats.crcerrs += er32(CRCERRS);
3905 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3906 adapter->stats.gorc += er32(GORCL);
3907 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3908 adapter->stats.bprc += er32(BPRC);
3909 adapter->stats.mprc += er32(MPRC);
3910 adapter->stats.roc += er32(ROC);
3911
bc7f75fa 3912 adapter->stats.mpc += er32(MPC);
8c7bbb92
BA		 3913
3914 /* Half-duplex statistics */
3915 if (adapter->link_duplex == HALF_DUPLEX) {
3916 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
3917 e1000e_update_phy_stats(adapter);
3918 } else {
3919 adapter->stats.scc += er32(SCC);
3920 adapter->stats.ecol += er32(ECOL);
3921 adapter->stats.mcc += er32(MCC);
3922 adapter->stats.latecol += er32(LATECOL);
3923 adapter->stats.dc += er32(DC);
3924
3925 hw->mac.collision_delta = er32(COLC);
3926
3927 if ((hw->mac.type != e1000_82574) &&
3928 (hw->mac.type != e1000_82583))
3929 adapter->stats.tncrs += er32(TNCRS);
3930 }
3931 adapter->stats.colc += hw->mac.collision_delta;
a4f58f54 3932 }
8c7bbb92 3933
bc7f75fa
AK		 3934 adapter->stats.xonrxc += er32(XONRXC);
3935 adapter->stats.xontxc += er32(XONTXC);
3936 adapter->stats.xoffrxc += er32(XOFFRXC);
3937 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3938 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3939 adapter->stats.gotc += er32(GOTCL);
3940 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3941 adapter->stats.rnbc += er32(RNBC);
3942 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3943
3944 adapter->stats.mptc += er32(MPTC);
3945 adapter->stats.bptc += er32(BPTC);
3946
3947 /* used for adaptive IFS */
3948
3949 hw->mac.tx_packet_delta = er32(TPT);
3950 adapter->stats.tpt += hw->mac.tx_packet_delta;
bc7f75fa
AK		 3951
3952 adapter->stats.algnerrc += er32(ALGNERRC);
3953 adapter->stats.rxerrc += er32(RXERRC);
bc7f75fa
AK		 3954 adapter->stats.cexterr += er32(CEXTERR);
3955 adapter->stats.tsctc += er32(TSCTC);
3956 adapter->stats.tsctfc += er32(TSCTFC);
3957
bc7f75fa 3958 /* Fill out the OS statistics structure */
7274c20f
AK		 3959 netdev->stats.multicast = adapter->stats.mprc;
3960 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3961
3962 /* Rx Errors */
3963
ad68076e
BA		 3964 /*
3965 * RLEC on some newer hardware can be incorrect so build
3966 * our own version based on RUC and ROC
3967 */
7274c20f 3968 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3969 adapter->stats.crcerrs + adapter->stats.algnerrc +
3970 adapter->stats.ruc + adapter->stats.roc +
3971 adapter->stats.cexterr;
7274c20f 3972 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3973 adapter->stats.roc;
7274c20f
AK		 3974 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3975 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3976 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3977
3978 /* Tx Errors */
7274c20f 3979 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3980 adapter->stats.latecol;
7274c20f
AK		 3981 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3982 netdev->stats.tx_window_errors = adapter->stats.latecol;
3983 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3984
3985 /* Tx Dropped needs to be maintained elsewhere */
3986
bc7f75fa
AK		 3987 /* Management Stats */
3988 adapter->stats.mgptc += er32(MGTPTC);
3989 adapter->stats.mgprc += er32(MGTPRC);
3990 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3991}
3992
7c25769f
BA		 3993/**
3994 * e1000_phy_read_status - Update the PHY register status snapshot
3995 * @adapter: board private structure
3996 **/
3997static void e1000_phy_read_status(struct e1000_adapter *adapter)
3998{
3999 struct e1000_hw *hw = &adapter->hw;
4000 struct e1000_phy_regs *phy = &adapter->phy_regs;
4001 int ret_val;
7c25769f
BA		 4002
4003 if ((er32(STATUS) & E1000_STATUS_LU) &&
4004 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4005 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
4006 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
4007 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
4008 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
4009 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
4010 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
4011 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
4012 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
4013 if (ret_val)
44defeb3 4014 e_warn("Error reading PHY register\n");
7c25769f
BA		 4015 } else {
4016 /*
4017 * Do not read PHY registers if link is not up
4018 * Set values to typical power-on defaults
4019 */
4020 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4021 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4022 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4023 BMSR_ERCAP);
4024 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4025 ADVERTISE_ALL | ADVERTISE_CSMA);
4026 phy->lpa = 0;
4027 phy->expansion = EXPANSION_ENABLENPAGE;
4028 phy->ctrl1000 = ADVERTISE_1000FULL;
4029 phy->stat1000 = 0;
4030 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4031 }
7c25769f
BA		 4032}
4033
bc7f75fa
AK		 4034static void e1000_print_link_info(struct e1000_adapter *adapter)
4035{
bc7f75fa
AK		 4036 struct e1000_hw *hw = &adapter->hw;
4037 u32 ctrl = er32(CTRL);
4038
8f12fe86
BA		 4039 /* Link status message must follow this format for user tools */
4040 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
4041 "Flow Control: %s\n",
4042 adapter->netdev->name,
44defeb3
JK		 4043 adapter->link_speed,
4044 (adapter->link_duplex == FULL_DUPLEX) ?
af667a29 4045 "Full Duplex" : "Half Duplex",
44defeb3 4046 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
af667a29
BA		 4047 "Rx/Tx" :
4048 ((ctrl & E1000_CTRL_RFCE) ? "Rx" :
4049 ((ctrl & E1000_CTRL_TFCE) ? "Tx" : "None")));
bc7f75fa
AK		 4050}
4051
0c6bdb30 4052static bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 4053{
4054 struct e1000_hw *hw = &adapter->hw;
4055 bool link_active = 0;
4056 s32 ret_val = 0;
4057
4058 /*
4059 * get_link_status is set on LSC (link status) interrupt or
4060 * Rx sequence error interrupt. get_link_status will stay
4061 * false until the check_for_link establishes link
4062 * for copper adapters ONLY
4063 */
4064 switch (hw->phy.media_type) {
4065 case e1000_media_type_copper:
4066 if (hw->mac.get_link_status) {
4067 ret_val = hw->mac.ops.check_for_link(hw);
4068 link_active = !hw->mac.get_link_status;
4069 } else {
4070 link_active = 1;
4071 }
4072 break;
4073 case e1000_media_type_fiber:
4074 ret_val = hw->mac.ops.check_for_link(hw);
4075 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4076 break;
4077 case e1000_media_type_internal_serdes:
4078 ret_val = hw->mac.ops.check_for_link(hw);
4079 link_active = adapter->hw.mac.serdes_has_link;
4080 break;
4081 default:
4082 case e1000_media_type_unknown:
4083 break;
4084 }
4085
4086 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4087 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4088 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 4089 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 4090 }
4091
4092 return link_active;
4093}
4094
4095static void e1000e_enable_receives(struct e1000_adapter *adapter)
4096{
4097 /* make sure the receive unit is started */
4098 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4099 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4100 struct e1000_hw *hw = &adapter->hw;
4101 u32 rctl = er32(RCTL);
4102 ew32(RCTL, rctl | E1000_RCTL_EN);
4103 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4104 }
4105}
4106
ff10e13c
CW		 4107static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4108{
4109 struct e1000_hw *hw = &adapter->hw;
4110
4111 /*
4112 * With 82574 controllers, PHY needs to be checked periodically
4113 * for hung state and reset, if two calls return true
4114 */
4115 if (e1000_check_phy_82574(hw))
4116 adapter->phy_hang_count++;
4117 else
4118 adapter->phy_hang_count = 0;
4119
4120 if (adapter->phy_hang_count > 1) {
4121 adapter->phy_hang_count = 0;
4122 schedule_work(&adapter->reset_task);
4123 }
4124}
4125
bc7f75fa
AK		 4126/**
4127 * e1000_watchdog - Timer Call-back
4128 * @data: pointer to adapter cast into an unsigned long
4129 **/
4130static void e1000_watchdog(unsigned long data)
4131{
4132 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4133
4134 /* Do the rest outside of interrupt context */
4135 schedule_work(&adapter->watchdog_task);
4136
4137 /* TODO: make this use queue_delayed_work() */
4138}
4139
4140static void e1000_watchdog_task(struct work_struct *work)
4141{
4142 struct e1000_adapter *adapter = container_of(work,
4143 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 4144 struct net_device *netdev = adapter->netdev;
4145 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 4146 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 4147 struct e1000_ring *tx_ring = adapter->tx_ring;
4148 struct e1000_hw *hw = &adapter->hw;
4149 u32 link, tctl;
bc7f75fa
AK		 4150 int tx_pending = 0;
4151
b405e8df 4152 link = e1000e_has_link(adapter);
318a94d6 4153 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 4154 /* Cancel scheduled suspend requests. */
4155 pm_runtime_resume(netdev->dev.parent);
4156
318a94d6 4157 e1000e_enable_receives(adapter);
bc7f75fa 4158 goto link_up;
bc7f75fa
AK		 4159 }
4160
4161 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4162 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4163 e1000_update_mng_vlan(adapter);
4164
bc7f75fa
AK		 4165 if (link) {
4166 if (!netif_carrier_ok(netdev)) {
4167 bool txb2b = 1;
23606cf5
RW		 4168
4169 /* Cancel scheduled suspend requests. */
4170 pm_runtime_resume(netdev->dev.parent);
4171
318a94d6 4172 /* update snapshot of PHY registers on LSC */
7c25769f 4173 e1000_phy_read_status(adapter);
bc7f75fa
AK		 4174 mac->ops.get_link_up_info(&adapter->hw,
4175 &adapter->link_speed,
4176 &adapter->link_duplex);
4177 e1000_print_link_info(adapter);
f4187b56
BA		 4178 /*
4179 * On supported PHYs, check for duplex mismatch only
4180 * if link has autonegotiated at 10/100 half
4181 */
4182 if ((hw->phy.type == e1000_phy_igp_3 ||
4183 hw->phy.type == e1000_phy_bm) &&
4184 (hw->mac.autoneg == true) &&
4185 (adapter->link_speed == SPEED_10 ||
4186 adapter->link_speed == SPEED_100) &&
4187 (adapter->link_duplex == HALF_DUPLEX)) {
4188 u16 autoneg_exp;
4189
4190 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4191
4192 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4193 e_info("Autonegotiated half duplex but"
4194 " link partner cannot autoneg. "
4195 " Try forcing full duplex if "
4196 "link gets many collisions.\n");
4197 }
4198
f49c57e1 4199 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 4200 adapter->tx_timeout_factor = 1;
4201 switch (adapter->link_speed) {
4202 case SPEED_10:
4203 txb2b = 0;
10f1b492 4204 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 4205 break;
4206 case SPEED_100:
4207 txb2b = 0;
4c86e0b9 4208 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 4209 break;
4210 }
4211
ad68076e
BA		 4212 /*
4213 * workaround: re-program speed mode bit after
4214 * link-up event
4215 */
bc7f75fa
AK		 4216 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4217 !txb2b) {
4218 u32 tarc0;
e9ec2c0f 4219 tarc0 = er32(TARC(0));
bc7f75fa 4220 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4221 ew32(TARC(0), tarc0);
bc7f75fa
AK		 4222 }
4223
ad68076e
BA		 4224 /*
4225 * disable TSO for pcie and 10/100 speeds, to avoid
4226 * some hardware issues
4227 */
bc7f75fa
AK		 4228 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4229 switch (adapter->link_speed) {
4230 case SPEED_10:
4231 case SPEED_100:
44defeb3 4232 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 4233 netdev->features &= ~NETIF_F_TSO;
4234 netdev->features &= ~NETIF_F_TSO6;
4235 break;
4236 case SPEED_1000:
4237 netdev->features |= NETIF_F_TSO;
4238 netdev->features |= NETIF_F_TSO6;
4239 break;
4240 default:
4241 /* oops */
4242 break;
4243 }
4244 }
4245
ad68076e
BA		 4246 /*
4247 * enable transmits in the hardware, need to do this
4248 * after setting TARC(0)
4249 */
bc7f75fa
AK		 4250 tctl = er32(TCTL);
4251 tctl |= E1000_TCTL_EN;
4252 ew32(TCTL, tctl);
4253
75eb0fad
BA		 4254 /*
4255 * Perform any post-link-up configuration before
4256 * reporting link up.
4257 */
4258 if (phy->ops.cfg_on_link_up)
4259 phy->ops.cfg_on_link_up(hw);
4260
bc7f75fa 4261 netif_carrier_on(netdev);
bc7f75fa
AK		 4262
4263 if (!test_bit(__E1000_DOWN, &adapter->state))
4264 mod_timer(&adapter->phy_info_timer,
4265 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4266 }
4267 } else {
4268 if (netif_carrier_ok(netdev)) {
4269 adapter->link_speed = 0;
4270 adapter->link_duplex = 0;
8f12fe86
BA		 4271 /* Link status message must follow this format */
4272 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4273 adapter->netdev->name);
bc7f75fa 4274 netif_carrier_off(netdev);
bc7f75fa
AK		 4275 if (!test_bit(__E1000_DOWN, &adapter->state))
4276 mod_timer(&adapter->phy_info_timer,
4277 round_jiffies(jiffies + 2 * HZ));
4278
4279 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4280 schedule_work(&adapter->reset_task);
23606cf5
RW		 4281 else
4282 pm_schedule_suspend(netdev->dev.parent,
4283 LINK_TIMEOUT);
bc7f75fa
AK		 4284 }
4285 }
4286
4287link_up:
4288 e1000e_update_stats(adapter);
4289
4290 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4291 adapter->tpt_old = adapter->stats.tpt;
4292 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4293 adapter->colc_old = adapter->stats.colc;
4294
7c25769f
BA		 4295 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4296 adapter->gorc_old = adapter->stats.gorc;
4297 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4298 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 4299
4300 e1000e_update_adaptive(&adapter->hw);
4301
4302 if (!netif_carrier_ok(netdev)) {
4303 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
4304 tx_ring->count);
4305 if (tx_pending) {
ad68076e
BA		 4306 /*
4307 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 4308 * but we've got queued Tx work that's never going
4309 * to get done, so reset controller to flush Tx.
ad68076e
BA		 4310 * (Do the reset outside of interrupt context).
4311 */
bc7f75fa 4312 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 4313 /* return immediately since reset is imminent */
4314 return;
bc7f75fa
AK		 4315 }
4316 }
4317
eab2abf5
JB		 4318 /* Simple mode for Interrupt Throttle Rate (ITR) */
4319 if (adapter->itr_setting == 4) {
4320 /*
4321 * Symmetric Tx/Rx gets a reduced ITR=2000;
4322 * Total asymmetrical Tx or Rx gets ITR=8000;
4323 * everyone else is between 2000-8000.
4324 */
4325 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4326 u32 dif = (adapter->gotc > adapter->gorc ?
4327 adapter->gotc - adapter->gorc :
4328 adapter->gorc - adapter->gotc) / 10000;
4329 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4330
4331 ew32(ITR, 1000000000 / (itr * 256));
4332 }
4333
ad68076e 4334 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4335 if (adapter->msix_entries)
4336 ew32(ICS, adapter->rx_ring->ims_val);
4337 else
4338 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 4339
4340 /* Force detection of hung controller every watchdog period */
4341 adapter->detect_tx_hung = 1;
4342
af667a29 4343 /* flush partial descriptors to memory before detecting Tx hang */
3a3b7586
JB		 4344 if (adapter->flags2 & FLAG2_DMA_BURST) {
4345 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4346 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4347 /*
4348 * no need to flush the writes because the timeout code does
4349 * an er32 first thing
4350 */
4351 }
4352
ad68076e
BA		 4353 /*
4354 * With 82571 controllers, LAA may be overwritten due to controller
4355 * reset from the other port. Set the appropriate LAA in RAR[0]
4356 */
bc7f75fa
AK		 4357 if (e1000e_get_laa_state_82571(hw))
4358 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4359
ff10e13c
CW		 4360 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
4361 e1000e_check_82574_phy_workaround(adapter);
4362
bc7f75fa
AK		 4363 /* Reset the timer */
4364 if (!test_bit(__E1000_DOWN, &adapter->state))
4365 mod_timer(&adapter->watchdog_timer,
4366 round_jiffies(jiffies + 2 * HZ));
4367}
4368
4369#define E1000_TX_FLAGS_CSUM 0x00000001
4370#define E1000_TX_FLAGS_VLAN 0x00000002
4371#define E1000_TX_FLAGS_TSO 0x00000004
4372#define E1000_TX_FLAGS_IPV4 0x00000008
4373#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4374#define E1000_TX_FLAGS_VLAN_SHIFT 16
4375
4376static int e1000_tso(struct e1000_adapter *adapter,
4377 struct sk_buff *skb)
4378{
4379 struct e1000_ring *tx_ring = adapter->tx_ring;
4380 struct e1000_context_desc *context_desc;
4381 struct e1000_buffer *buffer_info;
4382 unsigned int i;
4383 u32 cmd_length = 0;
4384 u16 ipcse = 0, tucse, mss;
4385 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4386 int err;
4387
3d5e33c9
BA		 4388 if (!skb_is_gso(skb))
4389 return 0;
bc7f75fa 4390
3d5e33c9
BA		 4391 if (skb_header_cloned(skb)) {
4392 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4393 if (err)
4394 return err;
bc7f75fa
AK		 4395 }
4396
3d5e33c9
BA		 4397 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4398 mss = skb_shinfo(skb)->gso_size;
4399 if (skb->protocol == htons(ETH_P_IP)) {
4400 struct iphdr *iph = ip_hdr(skb);
4401 iph->tot_len = 0;
4402 iph->check = 0;
4403 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4404 0, IPPROTO_TCP, 0);
4405 cmd_length = E1000_TXD_CMD_IP;
4406 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4407 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4408 ipv6_hdr(skb)->payload_len = 0;
4409 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4410 &ipv6_hdr(skb)->daddr,
4411 0, IPPROTO_TCP, 0);
4412 ipcse = 0;
4413 }
4414 ipcss = skb_network_offset(skb);
4415 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4416 tucss = skb_transport_offset(skb);
4417 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4418 tucse = 0;
4419
4420 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4421 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4422
4423 i = tx_ring->next_to_use;
4424 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4425 buffer_info = &tx_ring->buffer_info[i];
4426
4427 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4428 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4429 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4430 context_desc->upper_setup.tcp_fields.tucss = tucss;
4431 context_desc->upper_setup.tcp_fields.tucso = tucso;
4432 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4433 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4434 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4435 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4436
4437 buffer_info->time_stamp = jiffies;
4438 buffer_info->next_to_watch = i;
4439
4440 i++;
4441 if (i == tx_ring->count)
4442 i = 0;
4443 tx_ring->next_to_use = i;
4444
4445 return 1;
bc7f75fa
AK		 4446}
4447
4448static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4449{
4450 struct e1000_ring *tx_ring = adapter->tx_ring;
4451 struct e1000_context_desc *context_desc;
4452 struct e1000_buffer *buffer_info;
4453 unsigned int i;
4454 u8 css;
af807c82 4455 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4456 __be16 protocol;
bc7f75fa 4457
af807c82
DG		 4458 if (skb->ip_summed != CHECKSUM_PARTIAL)
4459 return 0;
bc7f75fa 4460
5f66f208
AJ		 4461 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4462 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4463 else
4464 protocol = skb->protocol;
4465
3f518390 4466 switch (protocol) {
09640e63 4467 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4468 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4469 cmd_len |= E1000_TXD_CMD_TCP;
4470 break;
09640e63 4471 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4472 /* XXX not handling all IPV6 headers */
4473 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4474 cmd_len |= E1000_TXD_CMD_TCP;
4475 break;
4476 default:
4477 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4478 e_warn("checksum_partial proto=%x!\n",
4479 be16_to_cpu(protocol));
af807c82 4480 break;
bc7f75fa
AK		 4481 }
4482
0d0b1672 4483 css = skb_checksum_start_offset(skb);
af807c82
DG		 4484
4485 i = tx_ring->next_to_use;
4486 buffer_info = &tx_ring->buffer_info[i];
4487 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4488
4489 context_desc->lower_setup.ip_config = 0;
4490 context_desc->upper_setup.tcp_fields.tucss = css;
4491 context_desc->upper_setup.tcp_fields.tucso =
4492 css + skb->csum_offset;
4493 context_desc->upper_setup.tcp_fields.tucse = 0;
4494 context_desc->tcp_seg_setup.data = 0;
4495 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4496
4497 buffer_info->time_stamp = jiffies;
4498 buffer_info->next_to_watch = i;
4499
4500 i++;
4501 if (i == tx_ring->count)
4502 i = 0;
4503 tx_ring->next_to_use = i;
4504
4505 return 1;
bc7f75fa
AK		 4506}
4507
4508#define E1000_MAX_PER_TXD 8192
4509#define E1000_MAX_TXD_PWR 12
4510
4511static int e1000_tx_map(struct e1000_adapter *adapter,
4512 struct sk_buff *skb, unsigned int first,
4513 unsigned int max_per_txd, unsigned int nr_frags,
4514 unsigned int mss)
4515{
4516 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4517 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4518 struct e1000_buffer *buffer_info;
8ddc951c 4519 unsigned int len = skb_headlen(skb);
03b1320d 4520 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4521 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4522
4523 i = tx_ring->next_to_use;
4524
4525 while (len) {
1b7719c4 4526 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4527 size = min(len, max_per_txd);
4528
bc7f75fa 4529 buffer_info->length = size;
bc7f75fa 4530 buffer_info->time_stamp = jiffies;
bc7f75fa 4531 buffer_info->next_to_watch = i;
0be3f55f
NN		 4532 buffer_info->dma = dma_map_single(&pdev->dev,
4533 skb->data + offset,
af667a29 4534 size, DMA_TO_DEVICE);
03b1320d 4535 buffer_info->mapped_as_page = false;
0be3f55f 4536 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4537 goto dma_error;
bc7f75fa
AK		 4538
4539 len -= size;
4540 offset += size;
03b1320d 4541 count++;
1b7719c4
AD		 4542
4543 if (len) {
4544 i++;
4545 if (i == tx_ring->count)
4546 i = 0;
4547 }
bc7f75fa
AK		 4548 }
4549
4550 for (f = 0; f < nr_frags; f++) {
4551 struct skb_frag_struct *frag;
4552
4553 frag = &skb_shinfo(skb)->frags[f];
4554 len = frag->size;
03b1320d 4555 offset = frag->page_offset;
bc7f75fa
AK		 4556
4557 while (len) {
1b7719c4
AD		 4558 i++;
4559 if (i == tx_ring->count)
4560 i = 0;
4561
bc7f75fa
AK		 4562 buffer_info = &tx_ring->buffer_info[i];
4563 size = min(len, max_per_txd);
bc7f75fa
AK		 4564
4565 buffer_info->length = size;
4566 buffer_info->time_stamp = jiffies;
bc7f75fa 4567 buffer_info->next_to_watch = i;
0be3f55f 4568 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4569 offset, size,
0be3f55f 4570 DMA_TO_DEVICE);
03b1320d 4571 buffer_info->mapped_as_page = true;
0be3f55f 4572 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4573 goto dma_error;
bc7f75fa
AK		 4574
4575 len -= size;
4576 offset += size;
4577 count++;
bc7f75fa
AK		 4578 }
4579 }
4580
af667a29 4581 segs = skb_shinfo(skb)->gso_segs ? : 1;
9ed318d5
TH		 4582 /* multiply data chunks by size of headers */
4583 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4584
bc7f75fa 4585 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4586 tx_ring->buffer_info[i].segs = segs;
4587 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4588 tx_ring->buffer_info[first].next_to_watch = i;
4589
4590 return count;
03b1320d
AD		 4591
4592dma_error:
af667a29 4593 dev_err(&pdev->dev, "Tx DMA map failed\n");
03b1320d 4594 buffer_info->dma = 0;
c1fa347f 4595 if (count)
03b1320d 4596 count--;
c1fa347f
RK		 4597
4598 while (count--) {
af667a29 4599 if (i == 0)
03b1320d 4600 i += tx_ring->count;
c1fa347f 4601 i--;
03b1320d 4602 buffer_info = &tx_ring->buffer_info[i];
1d51c418 4603 e1000_put_txbuf(adapter, buffer_info);
03b1320d
AD		 4604 }
4605
4606 return 0;
bc7f75fa
AK		 4607}
4608
4609static void e1000_tx_queue(struct e1000_adapter *adapter,
4610 int tx_flags, int count)
4611{
4612 struct e1000_ring *tx_ring = adapter->tx_ring;
4613 struct e1000_tx_desc *tx_desc = NULL;
4614 struct e1000_buffer *buffer_info;
4615 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4616 unsigned int i;
4617
4618 if (tx_flags & E1000_TX_FLAGS_TSO) {
4619 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4620 E1000_TXD_CMD_TSE;
4621 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4622
4623 if (tx_flags & E1000_TX_FLAGS_IPV4)
4624 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4625 }
4626
4627 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4628 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4629 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4630 }
4631
4632 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4633 txd_lower |= E1000_TXD_CMD_VLE;
4634 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4635 }
4636
4637 i = tx_ring->next_to_use;
4638
36b973df 4639 do {
bc7f75fa
AK		 4640 buffer_info = &tx_ring->buffer_info[i];
4641 tx_desc = E1000_TX_DESC(*tx_ring, i);
4642 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4643 tx_desc->lower.data =
4644 cpu_to_le32(txd_lower | buffer_info->length);
4645 tx_desc->upper.data = cpu_to_le32(txd_upper);
4646
4647 i++;
4648 if (i == tx_ring->count)
4649 i = 0;
36b973df 4650 } while (--count > 0);
bc7f75fa
AK		 4651
4652 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4653
ad68076e
BA		 4654 /*
4655 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4656 * know there are new descriptors to fetch. (Only
4657 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4658 * such as IA-64).
4659 */
bc7f75fa
AK		 4660 wmb();
4661
4662 tx_ring->next_to_use = i;
4663 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4664 /*
4665 * we need this if more than one processor can write to our tail
4666 * at a time, it synchronizes IO on IA64/Altix systems
4667 */
bc7f75fa
AK		 4668 mmiowb();
4669}
4670
4671#define MINIMUM_DHCP_PACKET_SIZE 282
4672static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4673 struct sk_buff *skb)
4674{
4675 struct e1000_hw *hw = &adapter->hw;
4676 u16 length, offset;
4677
4678 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4679 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4680 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4681 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4682 return 0;
4683 }
4684
4685 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4686 return 0;
4687
4688 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4689 return 0;
4690
4691 {
4692 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4693 struct udphdr *udp;
4694
4695 if (ip->protocol != IPPROTO_UDP)
4696 return 0;
4697
4698 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4699 if (ntohs(udp->dest) != 67)
4700 return 0;
4701
4702 offset = (u8 *)udp + 8 - skb->data;
4703 length = skb->len - offset;
4704 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4705 }
4706
4707 return 0;
4708}
4709
4710static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4711{
4712 struct e1000_adapter *adapter = netdev_priv(netdev);
4713
4714 netif_stop_queue(netdev);
ad68076e
BA		 4715 /*
4716 * Herbert's original patch had:
bc7f75fa 4717 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4718 * but since that doesn't exist yet, just open code it.
4719 */
bc7f75fa
AK		 4720 smp_mb();
4721
ad68076e
BA		 4722 /*
4723 * We need to check again in a case another CPU has just
4724 * made room available.
4725 */
bc7f75fa
AK		 4726 if (e1000_desc_unused(adapter->tx_ring) < size)
4727 return -EBUSY;
4728
4729 /* A reprieve! */
4730 netif_start_queue(netdev);
4731 ++adapter->restart_queue;
4732 return 0;
4733}
4734
4735static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4736{
4737 struct e1000_adapter *adapter = netdev_priv(netdev);
4738
4739 if (e1000_desc_unused(adapter->tx_ring) >= size)
4740 return 0;
4741 return __e1000_maybe_stop_tx(netdev, size);
4742}
4743
4744#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4745static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4746 struct net_device *netdev)
bc7f75fa
AK		 4747{
4748 struct e1000_adapter *adapter = netdev_priv(netdev);
4749 struct e1000_ring *tx_ring = adapter->tx_ring;
4750 unsigned int first;
4751 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4752 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4753 unsigned int tx_flags = 0;
e743d313 4754 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 4755 unsigned int nr_frags;
4756 unsigned int mss;
bc7f75fa
AK		 4757 int count = 0;
4758 int tso;
4759 unsigned int f;
bc7f75fa
AK		 4760
4761 if (test_bit(__E1000_DOWN, &adapter->state)) {
4762 dev_kfree_skb_any(skb);
4763 return NETDEV_TX_OK;
4764 }
4765
4766 if (skb->len <= 0) {
4767 dev_kfree_skb_any(skb);
4768 return NETDEV_TX_OK;
4769 }
4770
4771 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4772 /*
4773 * The controller does a simple calculation to
bc7f75fa
AK		 4774 * make sure there is enough room in the FIFO before
4775 * initiating the DMA for each buffer. The calc is:
4776 * 4 = ceil(buffer len/mss). To make sure we don't
4777 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4778 * drops.
4779 */
bc7f75fa
AK		 4780 if (mss) {
4781 u8 hdr_len;
4782 max_per_txd = min(mss << 2, max_per_txd);
4783 max_txd_pwr = fls(max_per_txd) - 1;
4784
ad68076e
BA		 4785 /*
4786 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4787 * points to just header, pull a few bytes of payload from
4788 * frags into skb->data
4789 */
bc7f75fa 4790 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4791 /*
4792 * we do this workaround for ES2LAN, but it is un-necessary,
4793 * avoiding it could save a lot of cycles
4794 */
4e6c709c 4795 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4796 unsigned int pull_size;
4797
4798 pull_size = min((unsigned int)4, skb->data_len);
4799 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4800 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4801 dev_kfree_skb_any(skb);
4802 return NETDEV_TX_OK;
4803 }
e743d313 4804 len = skb_headlen(skb);
bc7f75fa
AK		 4805 }
4806 }
4807
4808 /* reserve a descriptor for the offload context */
4809 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4810 count++;
4811 count++;
4812
4813 count += TXD_USE_COUNT(len, max_txd_pwr);
4814
4815 nr_frags = skb_shinfo(skb)->nr_frags;
4816 for (f = 0; f < nr_frags; f++)
4817 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4818 max_txd_pwr);
4819
4820 if (adapter->hw.mac.tx_pkt_filtering)
4821 e1000_transfer_dhcp_info(adapter, skb);
4822
ad68076e
BA		 4823 /*
4824 * need: count + 2 desc gap to keep tail from touching
4825 * head, otherwise try next time
4826 */
92af3e95 4827 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4828 return NETDEV_TX_BUSY;
bc7f75fa 4829
eab6d18d 4830 if (vlan_tx_tag_present(skb)) {
bc7f75fa
AK		 4831 tx_flags |= E1000_TX_FLAGS_VLAN;
4832 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4833 }
4834
4835 first = tx_ring->next_to_use;
4836
4837 tso = e1000_tso(adapter, skb);
4838 if (tso < 0) {
4839 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4840 return NETDEV_TX_OK;
4841 }
4842
4843 if (tso)
4844 tx_flags |= E1000_TX_FLAGS_TSO;
4845 else if (e1000_tx_csum(adapter, skb))
4846 tx_flags |= E1000_TX_FLAGS_CSUM;
4847
ad68076e
BA		 4848 /*
4849 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4850 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4851 * no longer assume, we must.
4852 */
bc7f75fa
AK		 4853 if (skb->protocol == htons(ETH_P_IP))
4854 tx_flags |= E1000_TX_FLAGS_IPV4;
4855
1b7719c4 4856 /* if count is 0 then mapping error has occured */
bc7f75fa 4857 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4858 if (count) {
4859 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4860 /* Make sure there is space in the ring for the next send. */
4861 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4862
4863 } else {
bc7f75fa 4864 dev_kfree_skb_any(skb);
1b7719c4
AD		 4865 tx_ring->buffer_info[first].time_stamp = 0;
4866 tx_ring->next_to_use = first;
bc7f75fa
AK		 4867 }
4868
bc7f75fa
AK		 4869 return NETDEV_TX_OK;
4870}
4871
4872/**
4873 * e1000_tx_timeout - Respond to a Tx Hang
4874 * @netdev: network interface device structure
4875 **/
4876static void e1000_tx_timeout(struct net_device *netdev)
4877{
4878 struct e1000_adapter *adapter = netdev_priv(netdev);
4879
4880 /* Do the reset outside of interrupt context */
4881 adapter->tx_timeout_count++;
4882 schedule_work(&adapter->reset_task);
4883}
4884
4885static void e1000_reset_task(struct work_struct *work)
4886{
4887 struct e1000_adapter *adapter;
4888 adapter = container_of(work, struct e1000_adapter, reset_task);
4889
affa9dfb
CW		 4890 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4891 (adapter->flags & FLAG_RX_RESTART_NOW))) {
4892 e1000e_dump(adapter);
4893 e_err("Reset adapter\n");
4894 }
bc7f75fa
AK		 4895 e1000e_reinit_locked(adapter);
4896}
4897
4898/**
4899 * e1000_get_stats - Get System Network Statistics
4900 * @netdev: network interface device structure
4901 *
4902 * Returns the address of the device statistics structure.
4903 * The statistics are actually updated from the timer callback.
4904 **/
4905static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4906{
bc7f75fa 4907 /* only return the current stats */
7274c20f 4908 return &netdev->stats;
bc7f75fa
AK		 4909}
4910
4911/**
4912 * e1000_change_mtu - Change the Maximum Transfer Unit
4913 * @netdev: network interface device structure
4914 * @new_mtu: new value for maximum frame size
4915 *
4916 * Returns 0 on success, negative on failure
4917 **/
4918static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4919{
4920 struct e1000_adapter *adapter = netdev_priv(netdev);
4921 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4922
2adc55c9
BA		 4923 /* Jumbo frame support */
4924 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4925 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4926 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4927 return -EINVAL;
4928 }
4929
2adc55c9
BA		 4930 /* Supported frame sizes */
4931 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4932 (max_frame > adapter->max_hw_frame_size)) {
4933 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4934 return -EINVAL;
4935 }
4936
a1ce6473
BA		 4937 /* Jumbo frame workaround on 82579 requires CRC be stripped */
4938 if ((adapter->hw.mac.type == e1000_pch2lan) &&
4939 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
4940 (new_mtu > ETH_DATA_LEN)) {
4941 e_err("Jumbo Frames not supported on 82579 when CRC "
4942 "stripping is disabled.\n");
4943 return -EINVAL;
4944 }
4945
6f461f6c
BA		 4946 /* 82573 Errata 17 */
4947 if (((adapter->hw.mac.type == e1000_82573) ||
4948 (adapter->hw.mac.type == e1000_82574)) &&
4949 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4950 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4951 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4952 }
4953
bc7f75fa
AK		 4954 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4955 msleep(1);
610c9928 4956 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4957 adapter->max_frame_size = max_frame;
610c9928
BA		 4958 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4959 netdev->mtu = new_mtu;
bc7f75fa
AK		 4960 if (netif_running(netdev))
4961 e1000e_down(adapter);
4962
ad68076e
BA		 4963 /*
4964 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4965 * means we reserve 2 more, this pushes us to allocate from the next
4966 * larger slab size.
ad68076e 4967 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4968 * However with the new *_jumbo_rx* routines, jumbo receives will use
4969 * fragmented skbs
ad68076e 4970 */
bc7f75fa 4971
9926146b 4972 if (max_frame <= 2048)
bc7f75fa
AK		 4973 adapter->rx_buffer_len = 2048;
4974 else
4975 adapter->rx_buffer_len = 4096;
4976
4977 /* adjust allocation if LPE protects us, and we aren't using SBP */
4978 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4979 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4980 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4981 + ETH_FCS_LEN;
bc7f75fa 4982
bc7f75fa
AK		 4983 if (netif_running(netdev))
4984 e1000e_up(adapter);
4985 else
4986 e1000e_reset(adapter);
4987
4988 clear_bit(__E1000_RESETTING, &adapter->state);
4989
4990 return 0;
4991}
4992
4993static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4994 int cmd)
4995{
4996 struct e1000_adapter *adapter = netdev_priv(netdev);
4997 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4998
318a94d6 4999 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 5000 return -EOPNOTSUPP;
5001
5002 switch (cmd) {
5003 case SIOCGMIIPHY:
5004 data->phy_id = adapter->hw.phy.addr;
5005 break;
5006 case SIOCGMIIREG:
b16a002e
BA		 5007 e1000_phy_read_status(adapter);
5008
7c25769f
BA		 5009 switch (data->reg_num & 0x1F) {
5010 case MII_BMCR:
5011 data->val_out = adapter->phy_regs.bmcr;
5012 break;
5013 case MII_BMSR:
5014 data->val_out = adapter->phy_regs.bmsr;
5015 break;
5016 case MII_PHYSID1:
5017 data->val_out = (adapter->hw.phy.id >> 16);
5018 break;
5019 case MII_PHYSID2:
5020 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5021 break;
5022 case MII_ADVERTISE:
5023 data->val_out = adapter->phy_regs.advertise;
5024 break;
5025 case MII_LPA:
5026 data->val_out = adapter->phy_regs.lpa;
5027 break;
5028 case MII_EXPANSION:
5029 data->val_out = adapter->phy_regs.expansion;
5030 break;
5031 case MII_CTRL1000:
5032 data->val_out = adapter->phy_regs.ctrl1000;
5033 break;
5034 case MII_STAT1000:
5035 data->val_out = adapter->phy_regs.stat1000;
5036 break;
5037 case MII_ESTATUS:
5038 data->val_out = adapter->phy_regs.estatus;
5039 break;
5040 default:
bc7f75fa
AK		 5041 return -EIO;
5042 }
bc7f75fa
AK		 5043 break;
5044 case SIOCSMIIREG:
5045 default:
5046 return -EOPNOTSUPP;
5047 }
5048 return 0;
5049}
5050
5051static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5052{
5053 switch (cmd) {
5054 case SIOCGMIIPHY:
5055 case SIOCGMIIREG:
5056 case SIOCSMIIREG:
5057 return e1000_mii_ioctl(netdev, ifr, cmd);
5058 default:
5059 return -EOPNOTSUPP;
5060 }
5061}
5062
a4f58f54
BA		 5063static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5064{
5065 struct e1000_hw *hw = &adapter->hw;
5066 u32 i, mac_reg;
5067 u16 phy_reg;
5068 int retval = 0;
5069
5070 /* copy MAC RARs to PHY RARs */
d3738bb8 5071 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
a4f58f54
BA		 5072
5073 /* copy MAC MTA to PHY MTA */
5074 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5075 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5076 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
5077 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
5078 }
5079
5080 /* configure PHY Rx Control register */
5081 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
5082 mac_reg = er32(RCTL);
5083 if (mac_reg & E1000_RCTL_UPE)
5084 phy_reg |= BM_RCTL_UPE;
5085 if (mac_reg & E1000_RCTL_MPE)
5086 phy_reg |= BM_RCTL_MPE;
5087 phy_reg &= ~(BM_RCTL_MO_MASK);
5088 if (mac_reg & E1000_RCTL_MO_3)
5089 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5090 << BM_RCTL_MO_SHIFT);
5091 if (mac_reg & E1000_RCTL_BAM)
5092 phy_reg |= BM_RCTL_BAM;
5093 if (mac_reg & E1000_RCTL_PMCF)
5094 phy_reg |= BM_RCTL_PMCF;
5095 mac_reg = er32(CTRL);
5096 if (mac_reg & E1000_CTRL_RFCE)
5097 phy_reg |= BM_RCTL_RFCE;
5098 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
5099
5100 /* enable PHY wakeup in MAC register */
5101 ew32(WUFC, wufc);
5102 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5103
5104 /* configure and enable PHY wakeup in PHY registers */
5105 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
5106 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5107
5108 /* activate PHY wakeup */
94d8186a 5109 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 5110 if (retval) {
5111 e_err("Could not acquire PHY\n");
5112 return retval;
5113 }
5114 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
5115 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
5116 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
5117 if (retval) {
5118 e_err("Could not read PHY page 769\n");
5119 goto out;
5120 }
5121 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5122 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
5123 if (retval)
5124 e_err("Could not set PHY Host Wakeup bit\n");
5125out:
94d8186a 5126 hw->phy.ops.release(hw);
a4f58f54
BA		 5127
5128 return retval;
5129}
5130
23606cf5
RW		 5131static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5132 bool runtime)
bc7f75fa
AK		 5133{
5134 struct net_device *netdev = pci_get_drvdata(pdev);
5135 struct e1000_adapter *adapter = netdev_priv(netdev);
5136 struct e1000_hw *hw = &adapter->hw;
5137 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 5138 /* Runtime suspend should only enable wakeup for link changes */
5139 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 5140 int retval = 0;
5141
5142 netif_device_detach(netdev);
5143
5144 if (netif_running(netdev)) {
5145 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5146 e1000e_down(adapter);
5147 e1000_free_irq(adapter);
5148 }
4662e82b 5149 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5150
5151 retval = pci_save_state(pdev);
5152 if (retval)
5153 return retval;
5154
5155 status = er32(STATUS);
5156 if (status & E1000_STATUS_LU)
5157 wufc &= ~E1000_WUFC_LNKC;
5158
5159 if (wufc) {
5160 e1000_setup_rctl(adapter);
5161 e1000_set_multi(netdev);
5162
5163 /* turn on all-multi mode if wake on multicast is enabled */
5164 if (wufc & E1000_WUFC_MC) {
5165 rctl = er32(RCTL);
5166 rctl |= E1000_RCTL_MPE;
5167 ew32(RCTL, rctl);
5168 }
5169
5170 ctrl = er32(CTRL);
5171 /* advertise wake from D3Cold */
5172 #define E1000_CTRL_ADVD3WUC 0x00100000
5173 /* phy power management enable */
5174 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 5175 ctrl |= E1000_CTRL_ADVD3WUC;
5176 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5177 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 5178 ew32(CTRL, ctrl);
5179
318a94d6
JK		 5180 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5181 adapter->hw.phy.media_type ==
5182 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 5183 /* keep the laser running in D3 */
5184 ctrl_ext = er32(CTRL_EXT);
93a23f48 5185 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 5186 ew32(CTRL_EXT, ctrl_ext);
5187 }
5188
97ac8cae
BA		 5189 if (adapter->flags & FLAG_IS_ICH)
5190 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
5191
bc7f75fa
AK		 5192 /* Allow time for pending master requests to run */
5193 e1000e_disable_pcie_master(&adapter->hw);
5194
82776a4b 5195 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 5196 /* enable wakeup by the PHY */
5197 retval = e1000_init_phy_wakeup(adapter, wufc);
5198 if (retval)
5199 return retval;
5200 } else {
5201 /* enable wakeup by the MAC */
5202 ew32(WUFC, wufc);
5203 ew32(WUC, E1000_WUC_PME_EN);
5204 }
bc7f75fa
AK		 5205 } else {
5206 ew32(WUC, 0);
5207 ew32(WUFC, 0);
bc7f75fa
AK		 5208 }
5209
4f9de721
RW		 5210 *enable_wake = !!wufc;
5211
bc7f75fa 5212 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 5213 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5214 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 5215 *enable_wake = true;
bc7f75fa
AK		 5216
5217 if (adapter->hw.phy.type == e1000_phy_igp_3)
5218 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5219
ad68076e
BA		 5220 /*
5221 * Release control of h/w to f/w. If f/w is AMT enabled, this
5222 * would have already happened in close and is redundant.
5223 */
31dbe5b4 5224 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 5225
5226 pci_disable_device(pdev);
5227
4f9de721
RW		 5228 return 0;
5229}
5230
5231static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5232{
5233 if (sleep && wake) {
5234 pci_prepare_to_sleep(pdev);
5235 return;
5236 }
5237
5238 pci_wake_from_d3(pdev, wake);
5239 pci_set_power_state(pdev, PCI_D3hot);
5240}
5241
5242static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5243 bool wake)
5244{
5245 struct net_device *netdev = pci_get_drvdata(pdev);
5246 struct e1000_adapter *adapter = netdev_priv(netdev);
5247
005cbdfc
AD		 5248 /*
5249 * The pci-e switch on some quad port adapters will report a
5250 * correctable error when the MAC transitions from D0 to D3. To
5251 * prevent this we need to mask off the correctable errors on the
5252 * downstream port of the pci-e switch.
5253 */
5254 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5255 struct pci_dev *us_dev = pdev->bus->self;
5256 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5257 u16 devctl;
5258
5259 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5260 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5261 (devctl & ~PCI_EXP_DEVCTL_CERE));
5262
4f9de721 5263 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 5264
5265 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5266 } else {
4f9de721 5267 e1000_power_off(pdev, sleep, wake);
005cbdfc 5268 }
bc7f75fa
AK		 5269}
5270
6f461f6c
BA		 5271#ifdef CONFIG_PCIEASPM
5272static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5273{
5274 pci_disable_link_state(pdev, state);
5275}
5276#else
5277static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 5278{
5279 int pos;
6f461f6c 5280 u16 reg16;
1eae4eb2
AK		 5281
5282 /*
6f461f6c
BA		 5283 * Both device and parent should have the same ASPM setting.
5284 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5285 */
6f461f6c
BA		 5286 pos = pci_pcie_cap(pdev);
5287 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5288 reg16 &= ~state;
5289 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5290
0c75ba22
AB		 5291 if (!pdev->bus->self)
5292 return;
5293
6f461f6c
BA		 5294 pos = pci_pcie_cap(pdev->bus->self);
5295 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5296 reg16 &= ~state;
5297 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5298}
5299#endif
5300void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5301{
5302 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5303 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5304 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5305
5306 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5307}
5308
a0340162 5309#ifdef CONFIG_PM_OPS
23606cf5 5310static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4f9de721 5311{
23606cf5 5312 return !!adapter->tx_ring->buffer_info;
4f9de721
RW		 5313}
5314
23606cf5 5315static int __e1000_resume(struct pci_dev *pdev)
bc7f75fa
AK		 5316{
5317 struct net_device *netdev = pci_get_drvdata(pdev);
5318 struct e1000_adapter *adapter = netdev_priv(netdev);
5319 struct e1000_hw *hw = &adapter->hw;
5320 u32 err;
5321
5322 pci_set_power_state(pdev, PCI_D0);
5323 pci_restore_state(pdev);
28b8f04a 5324 pci_save_state(pdev);
6f461f6c
BA		 5325 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5326 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5327
4662e82b 5328 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5329 if (netif_running(netdev)) {
5330 err = e1000_request_irq(adapter);
5331 if (err)
5332 return err;
5333 }
5334
5335 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5336
5337 /* report the system wakeup cause from S3/S4 */
5338 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5339 u16 phy_data;
5340
5341 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5342 if (phy_data) {
5343 e_info("PHY Wakeup cause - %s\n",
5344 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5345 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5346 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5347 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5348 phy_data & E1000_WUS_LNKC ? "Link Status "
5349 " Change" : "other");
5350 }
5351 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5352 } else {
5353 u32 wus = er32(WUS);
5354 if (wus) {
5355 e_info("MAC Wakeup cause - %s\n",
5356 wus & E1000_WUS_EX ? "Unicast Packet" :
5357 wus & E1000_WUS_MC ? "Multicast Packet" :
5358 wus & E1000_WUS_BC ? "Broadcast Packet" :
5359 wus & E1000_WUS_MAG ? "Magic Packet" :
5360 wus & E1000_WUS_LNKC ? "Link Status Change" :
5361 "other");
5362 }
5363 ew32(WUS, ~0);
5364 }
5365
bc7f75fa 5366 e1000e_reset(adapter);
bc7f75fa 5367
cd791618 5368 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5369
5370 if (netif_running(netdev))
5371 e1000e_up(adapter);
5372
5373 netif_device_attach(netdev);
5374
ad68076e
BA		 5375 /*
5376 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5377 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5378 * under the control of the driver.
5379 */
c43bc57e 5380 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5381 e1000e_get_hw_control(adapter);
bc7f75fa
AK		 5382
5383 return 0;
5384}
23606cf5 5385
a0340162
RW		 5386#ifdef CONFIG_PM_SLEEP
5387static int e1000_suspend(struct device *dev)
5388{
5389 struct pci_dev *pdev = to_pci_dev(dev);
5390 int retval;
5391 bool wake;
5392
5393 retval = __e1000_shutdown(pdev, &wake, false);
5394 if (!retval)
5395 e1000_complete_shutdown(pdev, true, wake);
5396
5397 return retval;
5398}
5399
23606cf5
RW		 5400static int e1000_resume(struct device *dev)
5401{
5402 struct pci_dev *pdev = to_pci_dev(dev);
5403 struct net_device *netdev = pci_get_drvdata(pdev);
5404 struct e1000_adapter *adapter = netdev_priv(netdev);
5405
5406 if (e1000e_pm_ready(adapter))
5407 adapter->idle_check = true;
5408
5409 return __e1000_resume(pdev);
5410}
a0340162
RW		 5411#endif /* CONFIG_PM_SLEEP */
5412
5413#ifdef CONFIG_PM_RUNTIME
5414static int e1000_runtime_suspend(struct device *dev)
5415{
5416 struct pci_dev *pdev = to_pci_dev(dev);
5417 struct net_device *netdev = pci_get_drvdata(pdev);
5418 struct e1000_adapter *adapter = netdev_priv(netdev);
5419
5420 if (e1000e_pm_ready(adapter)) {
5421 bool wake;
5422
5423 __e1000_shutdown(pdev, &wake, true);
5424 }
5425
5426 return 0;
5427}
5428
5429static int e1000_idle(struct device *dev)
5430{
5431 struct pci_dev *pdev = to_pci_dev(dev);
5432 struct net_device *netdev = pci_get_drvdata(pdev);
5433 struct e1000_adapter *adapter = netdev_priv(netdev);
5434
5435 if (!e1000e_pm_ready(adapter))
5436 return 0;
5437
5438 if (adapter->idle_check) {
5439 adapter->idle_check = false;
5440 if (!e1000e_has_link(adapter))
5441 pm_schedule_suspend(dev, MSEC_PER_SEC);
5442 }
5443
5444 return -EBUSY;
5445}
23606cf5
RW		 5446
5447static int e1000_runtime_resume(struct device *dev)
5448{
5449 struct pci_dev *pdev = to_pci_dev(dev);
5450 struct net_device *netdev = pci_get_drvdata(pdev);
5451 struct e1000_adapter *adapter = netdev_priv(netdev);
5452
5453 if (!e1000e_pm_ready(adapter))
5454 return 0;
5455
5456 adapter->idle_check = !dev->power.runtime_auto;
5457 return __e1000_resume(pdev);
5458}
a0340162
RW		 5459#endif /* CONFIG_PM_RUNTIME */
5460#endif /* CONFIG_PM_OPS */
bc7f75fa
AK		 5461
5462static void e1000_shutdown(struct pci_dev *pdev)
5463{
4f9de721
RW		 5464 bool wake = false;
5465
23606cf5 5466 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5467
5468 if (system_state == SYSTEM_POWER_OFF)
5469 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5470}
5471
5472#ifdef CONFIG_NET_POLL_CONTROLLER
147b2c8c
DD		 5473
5474static irqreturn_t e1000_intr_msix(int irq, void *data)
5475{
5476 struct net_device *netdev = data;
5477 struct e1000_adapter *adapter = netdev_priv(netdev);
5478 int vector, msix_irq;
5479
5480 if (adapter->msix_entries) {
5481 vector = 0;
5482 msix_irq = adapter->msix_entries[vector].vector;
5483 disable_irq(msix_irq);
5484 e1000_intr_msix_rx(msix_irq, netdev);
5485 enable_irq(msix_irq);
5486
5487 vector++;
5488 msix_irq = adapter->msix_entries[vector].vector;
5489 disable_irq(msix_irq);
5490 e1000_intr_msix_tx(msix_irq, netdev);
5491 enable_irq(msix_irq);
5492
5493 vector++;
5494 msix_irq = adapter->msix_entries[vector].vector;
5495 disable_irq(msix_irq);
5496 e1000_msix_other(msix_irq, netdev);
5497 enable_irq(msix_irq);
5498 }
5499
5500 return IRQ_HANDLED;
5501}
5502
bc7f75fa
AK		 5503/*
5504 * Polling 'interrupt' - used by things like netconsole to send skbs
5505 * without having to re-enable interrupts. It's not called while
5506 * the interrupt routine is executing.
5507 */
5508static void e1000_netpoll(struct net_device *netdev)
5509{
5510 struct e1000_adapter *adapter = netdev_priv(netdev);
5511
147b2c8c
DD		 5512 switch (adapter->int_mode) {
5513 case E1000E_INT_MODE_MSIX:
5514 e1000_intr_msix(adapter->pdev->irq, netdev);
5515 break;
5516 case E1000E_INT_MODE_MSI:
5517 disable_irq(adapter->pdev->irq);
5518 e1000_intr_msi(adapter->pdev->irq, netdev);
5519 enable_irq(adapter->pdev->irq);
5520 break;
5521 default: /* E1000E_INT_MODE_LEGACY */
5522 disable_irq(adapter->pdev->irq);
5523 e1000_intr(adapter->pdev->irq, netdev);
5524 enable_irq(adapter->pdev->irq);
5525 break;
5526 }
bc7f75fa
AK		 5527}
5528#endif
5529
5530/**
5531 * e1000_io_error_detected - called when PCI error is detected
5532 * @pdev: Pointer to PCI device
5533 * @state: The current pci connection state
5534 *
5535 * This function is called after a PCI bus error affecting
5536 * this device has been detected.
5537 */
5538static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5539 pci_channel_state_t state)
5540{
5541 struct net_device *netdev = pci_get_drvdata(pdev);
5542 struct e1000_adapter *adapter = netdev_priv(netdev);
5543
5544 netif_device_detach(netdev);
5545
c93b5a76
MM		 5546 if (state == pci_channel_io_perm_failure)
5547 return PCI_ERS_RESULT_DISCONNECT;
5548
bc7f75fa
AK		 5549 if (netif_running(netdev))
5550 e1000e_down(adapter);
5551 pci_disable_device(pdev);
5552
5553 /* Request a slot slot reset. */
5554 return PCI_ERS_RESULT_NEED_RESET;
5555}
5556
5557/**
5558 * e1000_io_slot_reset - called after the pci bus has been reset.
5559 * @pdev: Pointer to PCI device
5560 *
5561 * Restart the card from scratch, as if from a cold-boot. Implementation
5562 * resembles the first-half of the e1000_resume routine.
5563 */
5564static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5565{
5566 struct net_device *netdev = pci_get_drvdata(pdev);
5567 struct e1000_adapter *adapter = netdev_priv(netdev);
5568 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 5569 int err;
111b9dc5 5570 pci_ers_result_t result;
bc7f75fa 5571
6f461f6c
BA		 5572 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5573 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 5574 err = pci_enable_device_mem(pdev);
6e4f6f6b 5575 if (err) {
bc7f75fa
AK		 5576 dev_err(&pdev->dev,
5577 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5578 result = PCI_ERS_RESULT_DISCONNECT;
5579 } else {
5580 pci_set_master(pdev);
23606cf5 5581 pdev->state_saved = true;
111b9dc5 5582 pci_restore_state(pdev);
bc7f75fa 5583
111b9dc5
JB		 5584 pci_enable_wake(pdev, PCI_D3hot, 0);
5585 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5586
111b9dc5
JB		 5587 e1000e_reset(adapter);
5588 ew32(WUS, ~0);
5589 result = PCI_ERS_RESULT_RECOVERED;
5590 }
bc7f75fa 5591
111b9dc5
JB		 5592 pci_cleanup_aer_uncorrect_error_status(pdev);
5593
5594 return result;
bc7f75fa
AK		 5595}
5596
5597/**
5598 * e1000_io_resume - called when traffic can start flowing again.
5599 * @pdev: Pointer to PCI device
5600 *
5601 * This callback is called when the error recovery driver tells us that
5602 * its OK to resume normal operation. Implementation resembles the
5603 * second-half of the e1000_resume routine.
5604 */
5605static void e1000_io_resume(struct pci_dev *pdev)
5606{
5607 struct net_device *netdev = pci_get_drvdata(pdev);
5608 struct e1000_adapter *adapter = netdev_priv(netdev);
5609
cd791618 5610 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5611
5612 if (netif_running(netdev)) {
5613 if (e1000e_up(adapter)) {
5614 dev_err(&pdev->dev,
5615 "can't bring device back up after reset\n");
5616 return;
5617 }
5618 }
5619
5620 netif_device_attach(netdev);
5621
ad68076e
BA		 5622 /*
5623 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5624 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5625 * under the control of the driver.
5626 */
c43bc57e 5627 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5628 e1000e_get_hw_control(adapter);
bc7f75fa
AK		 5629
5630}
5631
5632static void e1000_print_device_info(struct e1000_adapter *adapter)
5633{
5634 struct e1000_hw *hw = &adapter->hw;
5635 struct net_device *netdev = adapter->netdev;
073287c0
BA		 5636 u32 ret_val;
5637 u8 pba_str[E1000_PBANUM_LENGTH];
bc7f75fa
AK		 5638
5639 /* print bus type/speed/width info */
7c510e4b 5640 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 5641 /* bus width */
5642 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5643 "Width x1"),
5644 /* MAC address */
7c510e4b 5645 netdev->dev_addr);
44defeb3
JK		 5646 e_info("Intel(R) PRO/%s Network Connection\n",
5647 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
073287c0
BA		 5648 ret_val = e1000_read_pba_string_generic(hw, pba_str,
5649 E1000_PBANUM_LENGTH);
5650 if (ret_val)
e0dc4f12 5651 strncpy((char *)pba_str, "Unknown", sizeof(pba_str) - 1);
073287c0
BA		 5652 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
5653 hw->mac.type, hw->phy.type, pba_str);
bc7f75fa
AK		 5654}
5655
10aa4c04
AK		 5656static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5657{
5658 struct e1000_hw *hw = &adapter->hw;
5659 int ret_val;
5660 u16 buf = 0;
5661
5662 if (hw->mac.type != e1000_82573)
5663 return;
5664
5665 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5666 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5667 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 5668 dev_warn(&adapter->pdev->dev,
5669 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5670 }
10aa4c04
AK		 5671}
5672
651c2466
SH		 5673static const struct net_device_ops e1000e_netdev_ops = {
5674 .ndo_open = e1000_open,
5675 .ndo_stop = e1000_close,
00829823 5676 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 5677 .ndo_get_stats = e1000_get_stats,
5678 .ndo_set_multicast_list = e1000_set_multi,
5679 .ndo_set_mac_address = e1000_set_mac,
5680 .ndo_change_mtu = e1000_change_mtu,
5681 .ndo_do_ioctl = e1000_ioctl,
5682 .ndo_tx_timeout = e1000_tx_timeout,
5683 .ndo_validate_addr = eth_validate_addr,
5684
5685 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5686 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5687 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5688#ifdef CONFIG_NET_POLL_CONTROLLER
5689 .ndo_poll_controller = e1000_netpoll,
5690#endif
5691};
5692
bc7f75fa
AK		 5693/**
5694 * e1000_probe - Device Initialization Routine
5695 * @pdev: PCI device information struct
5696 * @ent: entry in e1000_pci_tbl
5697 *
5698 * Returns 0 on success, negative on failure
5699 *
5700 * e1000_probe initializes an adapter identified by a pci_dev structure.
5701 * The OS initialization, configuring of the adapter private structure,
5702 * and a hardware reset occur.
5703 **/
5704static int __devinit e1000_probe(struct pci_dev *pdev,
5705 const struct pci_device_id *ent)
5706{
5707 struct net_device *netdev;
5708 struct e1000_adapter *adapter;
5709 struct e1000_hw *hw;
5710 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5711 resource_size_t mmio_start, mmio_len;
5712 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5713
5714 static int cards_found;
5715 int i, err, pci_using_dac;
5716 u16 eeprom_data = 0;
5717 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5718
6f461f6c
BA		 5719 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5720 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5721
f0f422e5 5722 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5723 if (err)
5724 return err;
5725
5726 pci_using_dac = 0;
0be3f55f 5727 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5728 if (!err) {
0be3f55f 5729 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5730 if (!err)
5731 pci_using_dac = 1;
5732 } else {
0be3f55f 5733 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5734 if (err) {
0be3f55f
NN		 5735 err = dma_set_coherent_mask(&pdev->dev,
5736 DMA_BIT_MASK(32));
bc7f75fa
AK		 5737 if (err) {
5738 dev_err(&pdev->dev, "No usable DMA "
5739 "configuration, aborting\n");
5740 goto err_dma;
5741 }
5742 }
5743 }
5744
e8de1481 5745 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5746 pci_select_bars(pdev, IORESOURCE_MEM),
5747 e1000e_driver_name);
bc7f75fa
AK		 5748 if (err)
5749 goto err_pci_reg;
5750
68eac460 5751 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5752 pci_enable_pcie_error_reporting(pdev);
68eac460 5753
bc7f75fa 5754 pci_set_master(pdev);
438b365a
BA		 5755 /* PCI config space info */
5756 err = pci_save_state(pdev);
5757 if (err)
5758 goto err_alloc_etherdev;
bc7f75fa
AK		 5759
5760 err = -ENOMEM;
5761 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5762 if (!netdev)
5763 goto err_alloc_etherdev;
5764
bc7f75fa
AK		 5765 SET_NETDEV_DEV(netdev, &pdev->dev);
5766
f85e4dfa
TH		 5767 netdev->irq = pdev->irq;
5768
bc7f75fa
AK		 5769 pci_set_drvdata(pdev, netdev);
5770 adapter = netdev_priv(netdev);
5771 hw = &adapter->hw;
5772 adapter->netdev = netdev;
5773 adapter->pdev = pdev;
5774 adapter->ei = ei;
5775 adapter->pba = ei->pba;
5776 adapter->flags = ei->flags;
eb7c3adb 5777 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5778 adapter->hw.adapter = adapter;
5779 adapter->hw.mac.type = ei->mac;
2adc55c9 5780 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5781 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5782
5783 mmio_start = pci_resource_start(pdev, 0);
5784 mmio_len = pci_resource_len(pdev, 0);
5785
5786 err = -EIO;
5787 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5788 if (!adapter->hw.hw_addr)
5789 goto err_ioremap;
5790
5791 if ((adapter->flags & FLAG_HAS_FLASH) &&
5792 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5793 flash_start = pci_resource_start(pdev, 1);
5794 flash_len = pci_resource_len(pdev, 1);
5795 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5796 if (!adapter->hw.flash_address)
5797 goto err_flashmap;
5798 }
5799
5800 /* construct the net_device struct */
651c2466 5801 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5802 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5803 netdev->watchdog_timeo = 5 * HZ;
5804 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5805 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5806
5807 netdev->mem_start = mmio_start;
5808 netdev->mem_end = mmio_start + mmio_len;
5809
5810 adapter->bd_number = cards_found++;
5811
4662e82b
BA		 5812 e1000e_check_options(adapter);
5813
bc7f75fa
AK		 5814 /* setup adapter struct */
5815 err = e1000_sw_init(adapter);
5816 if (err)
5817 goto err_sw_init;
5818
bc7f75fa
AK		 5819 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5820 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5821 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5822
69e3fd8c 5823 err = ei->get_variants(adapter);
bc7f75fa
AK		 5824 if (err)
5825 goto err_hw_init;
5826
4a770358
BA		 5827 if ((adapter->flags & FLAG_IS_ICH) &&
5828 (adapter->flags & FLAG_READ_ONLY_NVM))
5829 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5830
bc7f75fa
AK		 5831 hw->mac.ops.get_bus_info(&adapter->hw);
5832
318a94d6 5833 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5834
5835 /* Copper options */
318a94d6 5836 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5837 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5838 adapter->hw.phy.disable_polarity_correction = 0;
5839 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5840 }
5841
5842 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5843 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5844
5845 netdev->features = NETIF_F_SG |
5846 NETIF_F_HW_CSUM |
5847 NETIF_F_HW_VLAN_TX |
5848 NETIF_F_HW_VLAN_RX;
5849
5850 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5851 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5852
5853 netdev->features |= NETIF_F_TSO;
5854 netdev->features |= NETIF_F_TSO6;
5855
a5136e23
JK		 5856 netdev->vlan_features |= NETIF_F_TSO;
5857 netdev->vlan_features |= NETIF_F_TSO6;
5858 netdev->vlan_features |= NETIF_F_HW_CSUM;
5859 netdev->vlan_features |= NETIF_F_SG;
5860
7b872a55 5861 if (pci_using_dac) {
bc7f75fa 5862 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 5863 netdev->vlan_features |= NETIF_F_HIGHDMA;
5864 }
bc7f75fa 5865
bc7f75fa
AK		 5866 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5867 adapter->flags |= FLAG_MNG_PT_ENABLED;
5868
ad68076e
BA		 5869 /*
5870 * before reading the NVM, reset the controller to
5871 * put the device in a known good starting state
5872 */
bc7f75fa
AK		 5873 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5874
5875 /*
5876 * systems with ASPM and others may see the checksum fail on the first
5877 * attempt. Let's give it a few tries
5878 */
5879 for (i = 0;; i++) {
5880 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5881 break;
5882 if (i == 2) {
44defeb3 5883 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5884 err = -EIO;
5885 goto err_eeprom;
5886 }
5887 }
5888
10aa4c04
AK		 5889 e1000_eeprom_checks(adapter);
5890
608f8a0d 5891 /* copy the MAC address */
bc7f75fa 5892 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5893 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5894
5895 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5896 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5897
5898 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5899 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5900 err = -EIO;
5901 goto err_eeprom;
5902 }
5903
5904 init_timer(&adapter->watchdog_timer);
c061b18d 5905 adapter->watchdog_timer.function = e1000_watchdog;
bc7f75fa
AK		 5906 adapter->watchdog_timer.data = (unsigned long) adapter;
5907
5908 init_timer(&adapter->phy_info_timer);
c061b18d 5909 adapter->phy_info_timer.function = e1000_update_phy_info;
bc7f75fa
AK		 5910 adapter->phy_info_timer.data = (unsigned long) adapter;
5911
5912 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5913 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5914 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5915 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5916 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
9633e63b 5917 INIT_WORK(&adapter->led_blink_task, e1000e_led_blink_task);
bc7f75fa 5918
bc7f75fa
AK		 5919 /* Initialize link parameters. User can change them with ethtool */
5920 adapter->hw.mac.autoneg = 1;
309af40b 5921 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5922 adapter->hw.fc.requested_mode = e1000_fc_default;
5923 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5924 adapter->hw.phy.autoneg_advertised = 0x2f;
5925
5926 /* ring size defaults */
5927 adapter->rx_ring->count = 256;
5928 adapter->tx_ring->count = 256;
5929
5930 /*
5931 * Initial Wake on LAN setting - If APM wake is enabled in
5932 * the EEPROM, enable the ACPI Magic Packet filter
5933 */
5934 if (adapter->flags & FLAG_APME_IN_WUC) {
5935 /* APME bit in EEPROM is mapped to WUC.APME */
5936 eeprom_data = er32(WUC);
5937 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5938 if (eeprom_data & E1000_WUC_PHY_WAKE)
5939 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5940 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5941 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5942 (adapter->hw.bus.func == 1))
5943 e1000_read_nvm(&adapter->hw,
5944 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5945 else
5946 e1000_read_nvm(&adapter->hw,
5947 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5948 }
5949
5950 /* fetch WoL from EEPROM */
5951 if (eeprom_data & eeprom_apme_mask)
5952 adapter->eeprom_wol |= E1000_WUFC_MAG;
5953
5954 /*
5955 * now that we have the eeprom settings, apply the special cases
5956 * where the eeprom may be wrong or the board simply won't support
5957 * wake on lan on a particular port
5958 */
5959 if (!(adapter->flags & FLAG_HAS_WOL))
5960 adapter->eeprom_wol = 0;
5961
5962 /* initialize the wol settings based on the eeprom settings */
5963 adapter->wol = adapter->eeprom_wol;
6ff68026 5964 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5965
84527590
BA		 5966 /* save off EEPROM version number */
5967 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5968
bc7f75fa
AK		 5969 /* reset the hardware with the new settings */
5970 e1000e_reset(adapter);
5971
ad68076e
BA		 5972 /*
5973 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5974 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5975 * under the control of the driver.
5976 */
c43bc57e 5977 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5978 e1000e_get_hw_control(adapter);
bc7f75fa 5979
e0dc4f12 5980 strncpy(netdev->name, "eth%d", sizeof(netdev->name) - 1);
bc7f75fa
AK		 5981 err = register_netdev(netdev);
5982 if (err)
5983 goto err_register;
5984
9c563d20
JB		 5985 /* carrier off reporting is important to ethtool even BEFORE open */
5986 netif_carrier_off(netdev);
5987
bc7f75fa
AK		 5988 e1000_print_device_info(adapter);
5989
f3ec4f87
AS		 5990 if (pci_dev_run_wake(pdev))
5991 pm_runtime_put_noidle(&pdev->dev);
23606cf5 5992
bc7f75fa
AK		 5993 return 0;
5994
5995err_register:
c43bc57e 5996 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5997 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 5998err_eeprom:
5999 if (!e1000_check_reset_block(&adapter->hw))
6000 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 6001err_hw_init:
bc7f75fa
AK		 6002 kfree(adapter->tx_ring);
6003 kfree(adapter->rx_ring);
6004err_sw_init:
c43bc57e
JB		 6005 if (adapter->hw.flash_address)
6006 iounmap(adapter->hw.flash_address);
e82f54ba 6007 e1000e_reset_interrupt_capability(adapter);
c43bc57e 6008err_flashmap:
bc7f75fa
AK		 6009 iounmap(adapter->hw.hw_addr);
6010err_ioremap:
6011 free_netdev(netdev);
6012err_alloc_etherdev:
f0f422e5
BA		 6013 pci_release_selected_regions(pdev,
6014 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6015err_pci_reg:
6016err_dma:
6017 pci_disable_device(pdev);
6018 return err;
6019}
6020
6021/**
6022 * e1000_remove - Device Removal Routine
6023 * @pdev: PCI device information struct
6024 *
6025 * e1000_remove is called by the PCI subsystem to alert the driver
6026 * that it should release a PCI device. The could be caused by a
6027 * Hot-Plug event, or because the driver is going to be removed from
6028 * memory.
6029 **/
6030static void __devexit e1000_remove(struct pci_dev *pdev)
6031{
6032 struct net_device *netdev = pci_get_drvdata(pdev);
6033 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 6034 bool down = test_bit(__E1000_DOWN, &adapter->state);
6035
ad68076e 6036 /*
23f333a2
TH		 6037 * The timers may be rescheduled, so explicitly disable them
6038 * from being rescheduled.
ad68076e 6039 */
23606cf5
RW		 6040 if (!down)
6041 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 6042 del_timer_sync(&adapter->watchdog_timer);
6043 del_timer_sync(&adapter->phy_info_timer);
6044
41cec6f1
BA		 6045 cancel_work_sync(&adapter->reset_task);
6046 cancel_work_sync(&adapter->watchdog_task);
6047 cancel_work_sync(&adapter->downshift_task);
6048 cancel_work_sync(&adapter->update_phy_task);
23f333a2 6049 cancel_work_sync(&adapter->led_blink_task);
41cec6f1 6050 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa 6051
17f208de
BA		 6052 if (!(netdev->flags & IFF_UP))
6053 e1000_power_down_phy(adapter);
6054
23606cf5
RW		 6055 /* Don't lie to e1000_close() down the road. */
6056 if (!down)
6057 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 6058 unregister_netdev(netdev);
6059
f3ec4f87
AS		 6060 if (pci_dev_run_wake(pdev))
6061 pm_runtime_get_noresume(&pdev->dev);
23606cf5 6062
ad68076e
BA		 6063 /*
6064 * Release control of h/w to f/w. If f/w is AMT enabled, this
6065 * would have already happened in close and is redundant.
6066 */
31dbe5b4 6067 e1000e_release_hw_control(adapter);
bc7f75fa 6068
4662e82b 6069 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 6070 kfree(adapter->tx_ring);
6071 kfree(adapter->rx_ring);
6072
6073 iounmap(adapter->hw.hw_addr);
6074 if (adapter->hw.flash_address)
6075 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 6076 pci_release_selected_regions(pdev,
6077 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6078
6079 free_netdev(netdev);
6080
111b9dc5 6081 /* AER disable */
19d5afd4 6082 pci_disable_pcie_error_reporting(pdev);
111b9dc5 6083
bc7f75fa
AK		 6084 pci_disable_device(pdev);
6085}
6086
6087/* PCI Error Recovery (ERS) */
6088static struct pci_error_handlers e1000_err_handler = {
6089 .error_detected = e1000_io_error_detected,
6090 .slot_reset = e1000_io_slot_reset,
6091 .resume = e1000_io_resume,
6092};
6093
a3aa1884 6094static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 6095 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6096 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6097 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6098 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
6099 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 6101 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6102 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6103 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 6104
bc7f75fa
AK		 6105 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 6109
bc7f75fa
AK		 6110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6111 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6112 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 6113
4662e82b 6114 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 6115 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 6116 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 6117
bc7f75fa
AK		 6118 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6119 board_80003es2lan },
6120 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6121 board_80003es2lan },
6122 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6123 board_80003es2lan },
6124 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6125 board_80003es2lan },
ad68076e 6126
bc7f75fa
AK		 6127 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6128 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6129 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6130 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6131 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6132 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6133 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 6134 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 6135
bc7f75fa
AK		 6136 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6137 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6138 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6139 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6140 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 6141 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 6142 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6143 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6144 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6145
6146 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6147 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6148 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 6149
f4187b56
BA		 6150 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
6151 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
10df0b91 6152 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
f4187b56 6153
a4f58f54
BA		 6154 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6155 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6156 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6157 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6158
d3738bb8
BA		 6159 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6160 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6161
bc7f75fa
AK		 6162 { } /* terminate list */
6163};
6164MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6165
a0340162 6166#ifdef CONFIG_PM_OPS
23606cf5 6167static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 6168 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6169 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6170 e1000_runtime_resume, e1000_idle)
23606cf5 6171};
e50208a0 6172#endif
23606cf5 6173
bc7f75fa
AK		 6174/* PCI Device API Driver */
6175static struct pci_driver e1000_driver = {
6176 .name = e1000e_driver_name,
6177 .id_table = e1000_pci_tbl,
6178 .probe = e1000_probe,
6179 .remove = __devexit_p(e1000_remove),
a0340162 6180#ifdef CONFIG_PM_OPS
23606cf5 6181 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 6182#endif
6183 .shutdown = e1000_shutdown,
6184 .err_handler = &e1000_err_handler
6185};
6186
6187/**
6188 * e1000_init_module - Driver Registration Routine
6189 *
6190 * e1000_init_module is the first routine called when the driver is
6191 * loaded. All it does is register with the PCI subsystem.
6192 **/
6193static int __init e1000_init_module(void)
6194{
6195 int ret;
8544b9f7
BA		 6196 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6197 e1000e_driver_version);
0d6057e4 6198 pr_info("Copyright(c) 1999 - 2011 Intel Corporation.\n");
bc7f75fa 6199 ret = pci_register_driver(&e1000_driver);
53ec5498 6200
bc7f75fa
AK		 6201 return ret;
6202}
6203module_init(e1000_init_module);
6204
6205/**
6206 * e1000_exit_module - Driver Exit Cleanup Routine
6207 *
6208 * e1000_exit_module is called just before the driver is removed
6209 * from memory.
6210 **/
6211static void __exit e1000_exit_module(void)
6212{
6213 pci_unregister_driver(&e1000_driver);
6214}
6215module_exit(e1000_exit_module);
6216
6217
6218MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6219MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6220MODULE_LICENSE("GPL");
6221MODULE_VERSION(DRV_VERSION);
6222
6223/* e1000_main.c */
Linux 6.x block layer and io_uring tree(s)