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e1000e: convert to stats64
[linux-2.6-block.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
0d6057e4 4 Copyright(c) 1999 - 2011 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
bc7f75fa
AK		 42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
bc7f75fa
AK		 52
53#include "e1000.h"
54
c14c643b
BA		 55#define DRV_EXTRAVERSION "-k2"
56
c920aa8b 57#define DRV_VERSION "1.2.20" DRV_EXTRAVERSION
bc7f75fa
AK		 58char e1000e_driver_name[] = "e1000e";
59const char e1000e_driver_version[] = DRV_VERSION;
60
61static const struct e1000_info *e1000_info_tbl[] = {
62 [board_82571] = &e1000_82571_info,
63 [board_82572] = &e1000_82572_info,
64 [board_82573] = &e1000_82573_info,
4662e82b 65 [board_82574] = &e1000_82574_info,
8c81c9c3 66 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 67 [board_80003es2lan] = &e1000_es2_info,
68 [board_ich8lan] = &e1000_ich8_info,
69 [board_ich9lan] = &e1000_ich9_info,
f4187b56 70 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 71 [board_pchlan] = &e1000_pch_info,
d3738bb8 72 [board_pch2lan] = &e1000_pch2_info,
bc7f75fa
AK		 73};
74
84f4ee90
TI		 75struct e1000_reg_info {
76 u32 ofs;
77 char *name;
78};
79
af667a29
BA		 80#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
81#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
82#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
83#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
84#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
85
86#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
87#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
88#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
89#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
90#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
84f4ee90
TI		 91
92static const struct e1000_reg_info e1000_reg_info_tbl[] = {
93
94 /* General Registers */
95 {E1000_CTRL, "CTRL"},
96 {E1000_STATUS, "STATUS"},
97 {E1000_CTRL_EXT, "CTRL_EXT"},
98
99 /* Interrupt Registers */
100 {E1000_ICR, "ICR"},
101
af667a29 102 /* Rx Registers */
84f4ee90
TI		 103 {E1000_RCTL, "RCTL"},
104 {E1000_RDLEN, "RDLEN"},
105 {E1000_RDH, "RDH"},
106 {E1000_RDT, "RDT"},
107 {E1000_RDTR, "RDTR"},
108 {E1000_RXDCTL(0), "RXDCTL"},
109 {E1000_ERT, "ERT"},
110 {E1000_RDBAL, "RDBAL"},
111 {E1000_RDBAH, "RDBAH"},
112 {E1000_RDFH, "RDFH"},
113 {E1000_RDFT, "RDFT"},
114 {E1000_RDFHS, "RDFHS"},
115 {E1000_RDFTS, "RDFTS"},
116 {E1000_RDFPC, "RDFPC"},
117
af667a29 118 /* Tx Registers */
84f4ee90
TI		 119 {E1000_TCTL, "TCTL"},
120 {E1000_TDBAL, "TDBAL"},
121 {E1000_TDBAH, "TDBAH"},
122 {E1000_TDLEN, "TDLEN"},
123 {E1000_TDH, "TDH"},
124 {E1000_TDT, "TDT"},
125 {E1000_TIDV, "TIDV"},
126 {E1000_TXDCTL(0), "TXDCTL"},
127 {E1000_TADV, "TADV"},
128 {E1000_TARC(0), "TARC"},
129 {E1000_TDFH, "TDFH"},
130 {E1000_TDFT, "TDFT"},
131 {E1000_TDFHS, "TDFHS"},
132 {E1000_TDFTS, "TDFTS"},
133 {E1000_TDFPC, "TDFPC"},
134
135 /* List Terminator */
136 {}
137};
138
139/*
140 * e1000_regdump - register printout routine
141 */
142static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
143{
144 int n = 0;
145 char rname[16];
146 u32 regs[8];
147
148 switch (reginfo->ofs) {
149 case E1000_RXDCTL(0):
150 for (n = 0; n < 2; n++)
151 regs[n] = __er32(hw, E1000_RXDCTL(n));
152 break;
153 case E1000_TXDCTL(0):
154 for (n = 0; n < 2; n++)
155 regs[n] = __er32(hw, E1000_TXDCTL(n));
156 break;
157 case E1000_TARC(0):
158 for (n = 0; n < 2; n++)
159 regs[n] = __er32(hw, E1000_TARC(n));
160 break;
161 default:
162 printk(KERN_INFO "%-15s %08x\n",
af667a29 163 reginfo->name, __er32(hw, reginfo->ofs));
84f4ee90
TI		 164 return;
165 }
166
167 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
168 printk(KERN_INFO "%-15s ", rname);
169 for (n = 0; n < 2; n++)
170 printk(KERN_CONT "%08x ", regs[n]);
171 printk(KERN_CONT "\n");
172}
173
84f4ee90 174/*
af667a29 175 * e1000e_dump - Print registers, Tx-ring and Rx-ring
84f4ee90
TI		 176 */
177static void e1000e_dump(struct e1000_adapter *adapter)
178{
179 struct net_device *netdev = adapter->netdev;
180 struct e1000_hw *hw = &adapter->hw;
181 struct e1000_reg_info *reginfo;
182 struct e1000_ring *tx_ring = adapter->tx_ring;
183 struct e1000_tx_desc *tx_desc;
af667a29
BA		 184 struct my_u0 {
185 u64 a;
186 u64 b;
187 } *u0;
84f4ee90
TI		 188 struct e1000_buffer *buffer_info;
189 struct e1000_ring *rx_ring = adapter->rx_ring;
190 union e1000_rx_desc_packet_split *rx_desc_ps;
191 struct e1000_rx_desc *rx_desc;
af667a29
BA		 192 struct my_u1 {
193 u64 a;
194 u64 b;
195 u64 c;
196 u64 d;
197 } *u1;
84f4ee90
TI		 198 u32 staterr;
199 int i = 0;
200
201 if (!netif_msg_hw(adapter))
202 return;
203
204 /* Print netdevice Info */
205 if (netdev) {
206 dev_info(&adapter->pdev->dev, "Net device Info\n");
207 printk(KERN_INFO "Device Name state "
af667a29 208 "trans_start last_rx\n");
84f4ee90 209 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
af667a29
BA		 210 netdev->name, netdev->state, netdev->trans_start,
211 netdev->last_rx);
84f4ee90
TI		 212 }
213
214 /* Print Registers */
215 dev_info(&adapter->pdev->dev, "Register Dump\n");
216 printk(KERN_INFO " Register Name Value\n");
217 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
218 reginfo->name; reginfo++) {
219 e1000_regdump(hw, reginfo);
220 }
221
af667a29 222 /* Print Tx Ring Summary */
84f4ee90
TI		 223 if (!netdev || !netif_running(netdev))
224 goto exit;
225
af667a29 226 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
84f4ee90 227 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
af667a29 228 " leng ntw timestamp\n");
84f4ee90
TI		 229 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
230 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
af667a29
BA		 231 0, tx_ring->next_to_use, tx_ring->next_to_clean,
232 (unsigned long long)buffer_info->dma,
233 buffer_info->length,
234 buffer_info->next_to_watch,
235 (unsigned long long)buffer_info->time_stamp);
84f4ee90 236
af667a29 237 /* Print Tx Ring */
84f4ee90
TI		 238 if (!netif_msg_tx_done(adapter))
239 goto rx_ring_summary;
240
af667a29 241 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
84f4ee90
TI		 242
243 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
244 *
245 * Legacy Transmit Descriptor
246 * +--------------------------------------------------------------+
247 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
248 * +--------------------------------------------------------------+
249 * 8 | Special | CSS | Status | CMD | CSO | Length |
250 * +--------------------------------------------------------------+
251 * 63 48 47 36 35 32 31 24 23 16 15 0
252 *
253 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
254 * 63 48 47 40 39 32 31 16 15 8 7 0
255 * +----------------------------------------------------------------+
256 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
257 * +----------------------------------------------------------------+
258 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
259 * +----------------------------------------------------------------+
260 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
261 *
262 * Extended Data Descriptor (DTYP=0x1)
263 * +----------------------------------------------------------------+
264 * 0 | Buffer Address [63:0] |
265 * +----------------------------------------------------------------+
266 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
267 * +----------------------------------------------------------------+
268 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
269 */
270 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
af667a29
BA		 271 " [bi->dma ] leng ntw timestamp bi->skb "
272 "<-- Legacy format\n");
84f4ee90 273 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
af667a29
BA		 274 " [bi->dma ] leng ntw timestamp bi->skb "
275 "<-- Ext Context format\n");
84f4ee90 276 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
af667a29
BA		 277 " [bi->dma ] leng ntw timestamp bi->skb "
278 "<-- Ext Data format\n");
84f4ee90
TI		 279 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
280 tx_desc = E1000_TX_DESC(*tx_ring, i);
281 buffer_info = &tx_ring->buffer_info[i];
282 u0 = (struct my_u0 *)tx_desc;
283 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
af667a29
BA		 284 "%04X %3X %016llX %p",
285 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
286 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), i,
8eb64e6b
BA		 287 (unsigned long long)le64_to_cpu(u0->a),
288 (unsigned long long)le64_to_cpu(u0->b),
289 (unsigned long long)buffer_info->dma,
290 buffer_info->length, buffer_info->next_to_watch,
291 (unsigned long long)buffer_info->time_stamp,
84f4ee90
TI		 292 buffer_info->skb);
293 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
294 printk(KERN_CONT " NTC/U\n");
295 else if (i == tx_ring->next_to_use)
296 printk(KERN_CONT " NTU\n");
297 else if (i == tx_ring->next_to_clean)
298 printk(KERN_CONT " NTC\n");
299 else
300 printk(KERN_CONT "\n");
301
302 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
303 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
af667a29
BA		 304 16, 1, phys_to_virt(buffer_info->dma),
305 buffer_info->length, true);
84f4ee90
TI		 306 }
307
af667a29 308 /* Print Rx Ring Summary */
84f4ee90 309rx_ring_summary:
af667a29 310 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
84f4ee90
TI		 311 printk(KERN_INFO "Queue [NTU] [NTC]\n");
312 printk(KERN_INFO " %5d %5X %5X\n", 0,
af667a29 313 rx_ring->next_to_use, rx_ring->next_to_clean);
84f4ee90 314
af667a29 315 /* Print Rx Ring */
84f4ee90
TI		 316 if (!netif_msg_rx_status(adapter))
317 goto exit;
318
af667a29 319 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
84f4ee90
TI		 320 switch (adapter->rx_ps_pages) {
321 case 1:
322 case 2:
323 case 3:
324 /* [Extended] Packet Split Receive Descriptor Format
325 *
326 * +-----------------------------------------------------+
327 * 0 | Buffer Address 0 [63:0] |
328 * +-----------------------------------------------------+
329 * 8 | Buffer Address 1 [63:0] |
330 * +-----------------------------------------------------+
331 * 16 | Buffer Address 2 [63:0] |
332 * +-----------------------------------------------------+
333 * 24 | Buffer Address 3 [63:0] |
334 * +-----------------------------------------------------+
335 */
336 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
af667a29 337 "[buffer 1 63:0 ] "
84f4ee90
TI		 338 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
339 "[bi->skb] <-- Ext Pkt Split format\n");
340 /* [Extended] Receive Descriptor (Write-Back) Format
341 *
342 * 63 48 47 32 31 13 12 8 7 4 3 0
343 * +------------------------------------------------------+
344 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
345 * | Checksum | Ident | | Queue | | Type |
346 * +------------------------------------------------------+
347 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
348 * +------------------------------------------------------+
349 * 63 48 47 32 31 20 19 0
350 */
351 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
af667a29 352 "[vl l0 ee es] "
84f4ee90
TI		 353 "[ l3 l2 l1 hs] [reserved ] ---------------- "
354 "[bi->skb] <-- Ext Rx Write-Back format\n");
355 for (i = 0; i < rx_ring->count; i++) {
356 buffer_info = &rx_ring->buffer_info[i];
357 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
358 u1 = (struct my_u1 *)rx_desc_ps;
359 staterr =
af667a29 360 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
84f4ee90
TI		 361 if (staterr & E1000_RXD_STAT_DD) {
362 /* Descriptor Done */
363 printk(KERN_INFO "RWB[0x%03X] %016llX "
af667a29
BA		 364 "%016llX %016llX %016llX "
365 "---------------- %p", i,
366 (unsigned long long)le64_to_cpu(u1->a),
367 (unsigned long long)le64_to_cpu(u1->b),
368 (unsigned long long)le64_to_cpu(u1->c),
369 (unsigned long long)le64_to_cpu(u1->d),
370 buffer_info->skb);
84f4ee90
TI		 371 } else {
372 printk(KERN_INFO "R [0x%03X] %016llX "
af667a29
BA		 373 "%016llX %016llX %016llX %016llX %p", i,
374 (unsigned long long)le64_to_cpu(u1->a),
375 (unsigned long long)le64_to_cpu(u1->b),
376 (unsigned long long)le64_to_cpu(u1->c),
377 (unsigned long long)le64_to_cpu(u1->d),
378 (unsigned long long)buffer_info->dma,
379 buffer_info->skb);
84f4ee90
TI		 380
381 if (netif_msg_pktdata(adapter))
382 print_hex_dump(KERN_INFO, "",
383 DUMP_PREFIX_ADDRESS, 16, 1,
384 phys_to_virt(buffer_info->dma),
385 adapter->rx_ps_bsize0, true);
386 }
387
388 if (i == rx_ring->next_to_use)
389 printk(KERN_CONT " NTU\n");
390 else if (i == rx_ring->next_to_clean)
391 printk(KERN_CONT " NTC\n");
392 else
393 printk(KERN_CONT "\n");
394 }
395 break;
396 default:
397 case 0:
398 /* Legacy Receive Descriptor Format
399 *
400 * +-----------------------------------------------------+
401 * | Buffer Address [63:0] |
402 * +-----------------------------------------------------+
403 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
404 * +-----------------------------------------------------+
405 * 63 48 47 40 39 32 31 16 15 0
406 */
407 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
af667a29
BA		 408 "[vl er S cks ln] [bi->dma ] [bi->skb] "
409 "<-- Legacy format\n");
84f4ee90
TI		 410 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
411 rx_desc = E1000_RX_DESC(*rx_ring, i);
412 buffer_info = &rx_ring->buffer_info[i];
413 u0 = (struct my_u0 *)rx_desc;
414 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
af667a29
BA		 415 "%016llX %p", i,
416 (unsigned long long)le64_to_cpu(u0->a),
417 (unsigned long long)le64_to_cpu(u0->b),
418 (unsigned long long)buffer_info->dma,
419 buffer_info->skb);
84f4ee90
TI		 420 if (i == rx_ring->next_to_use)
421 printk(KERN_CONT " NTU\n");
422 else if (i == rx_ring->next_to_clean)
423 printk(KERN_CONT " NTC\n");
424 else
425 printk(KERN_CONT "\n");
426
427 if (netif_msg_pktdata(adapter))
428 print_hex_dump(KERN_INFO, "",
af667a29
BA		 429 DUMP_PREFIX_ADDRESS,
430 16, 1,
431 phys_to_virt(buffer_info->dma),
432 adapter->rx_buffer_len, true);
84f4ee90
TI		 433 }
434 }
435
436exit:
437 return;
438}
439
bc7f75fa
AK		 440/**
441 * e1000_desc_unused - calculate if we have unused descriptors
442 **/
443static int e1000_desc_unused(struct e1000_ring *ring)
444{
445 if (ring->next_to_clean > ring->next_to_use)
446 return ring->next_to_clean - ring->next_to_use - 1;
447
448 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
449}
450
451/**
ad68076e 452 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 453 * @adapter: board private structure
454 * @status: descriptor status field as written by hardware
455 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
456 * @skb: pointer to sk_buff to be indicated to stack
457 **/
458static void e1000_receive_skb(struct e1000_adapter *adapter,
af667a29 459 struct net_device *netdev, struct sk_buff *skb,
a39fe742 460 u8 status, __le16 vlan)
bc7f75fa
AK		 461{
462 skb->protocol = eth_type_trans(skb, netdev);
463
464 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 465 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
466 le16_to_cpu(vlan), skb);
bc7f75fa 467 else
89c88b16 468 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 469}
470
471/**
af667a29 472 * e1000_rx_checksum - Receive Checksum Offload
bc7f75fa
AK		 473 * @adapter: board private structure
474 * @status_err: receive descriptor status and error fields
475 * @csum: receive descriptor csum field
476 * @sk_buff: socket buffer with received data
477 **/
478static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
479 u32 csum, struct sk_buff *skb)
480{
481 u16 status = (u16)status_err;
482 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 483
484 skb_checksum_none_assert(skb);
bc7f75fa
AK		 485
486 /* Ignore Checksum bit is set */
487 if (status & E1000_RXD_STAT_IXSM)
488 return;
489 /* TCP/UDP checksum error bit is set */
490 if (errors & E1000_RXD_ERR_TCPE) {
491 /* let the stack verify checksum errors */
492 adapter->hw_csum_err++;
493 return;
494 }
495
496 /* TCP/UDP Checksum has not been calculated */
497 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
498 return;
499
500 /* It must be a TCP or UDP packet with a valid checksum */
501 if (status & E1000_RXD_STAT_TCPCS) {
502 /* TCP checksum is good */
503 skb->ip_summed = CHECKSUM_UNNECESSARY;
504 } else {
ad68076e
BA		 505 /*
506 * IP fragment with UDP payload
507 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 508 * and then put the value in host order for further stack use.
509 */
a39fe742
AV		 510 __sum16 sum = (__force __sum16)htons(csum);
511 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 512 skb->ip_summed = CHECKSUM_COMPLETE;
513 }
514 adapter->hw_csum_good++;
515}
516
517/**
518 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
519 * @adapter: address of board private structure
520 **/
521static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
522 int cleaned_count)
523{
524 struct net_device *netdev = adapter->netdev;
525 struct pci_dev *pdev = adapter->pdev;
526 struct e1000_ring *rx_ring = adapter->rx_ring;
527 struct e1000_rx_desc *rx_desc;
528 struct e1000_buffer *buffer_info;
529 struct sk_buff *skb;
530 unsigned int i;
89d71a66 531 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 532
533 i = rx_ring->next_to_use;
534 buffer_info = &rx_ring->buffer_info[i];
535
536 while (cleaned_count--) {
537 skb = buffer_info->skb;
538 if (skb) {
539 skb_trim(skb, 0);
540 goto map_skb;
541 }
542
89d71a66 543 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 544 if (!skb) {
545 /* Better luck next round */
546 adapter->alloc_rx_buff_failed++;
547 break;
548 }
549
bc7f75fa
AK		 550 buffer_info->skb = skb;
551map_skb:
0be3f55f 552 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 553 adapter->rx_buffer_len,
0be3f55f
NN		 554 DMA_FROM_DEVICE);
555 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
af667a29 556 dev_err(&pdev->dev, "Rx DMA map failed\n");
bc7f75fa
AK		 557 adapter->rx_dma_failed++;
558 break;
559 }
560
561 rx_desc = E1000_RX_DESC(*rx_ring, i);
562 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
563
50849d79
TH		 564 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
565 /*
566 * Force memory writes to complete before letting h/w
567 * know there are new descriptors to fetch. (Only
568 * applicable for weak-ordered memory model archs,
569 * such as IA-64).
570 */
571 wmb();
572 writel(i, adapter->hw.hw_addr + rx_ring->tail);
573 }
bc7f75fa
AK		 574 i++;
575 if (i == rx_ring->count)
576 i = 0;
577 buffer_info = &rx_ring->buffer_info[i];
578 }
579
50849d79 580 rx_ring->next_to_use = i;
bc7f75fa
AK		 581}
582
583/**
584 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
585 * @adapter: address of board private structure
586 **/
587static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
588 int cleaned_count)
589{
590 struct net_device *netdev = adapter->netdev;
591 struct pci_dev *pdev = adapter->pdev;
592 union e1000_rx_desc_packet_split *rx_desc;
593 struct e1000_ring *rx_ring = adapter->rx_ring;
594 struct e1000_buffer *buffer_info;
595 struct e1000_ps_page *ps_page;
596 struct sk_buff *skb;
597 unsigned int i, j;
598
599 i = rx_ring->next_to_use;
600 buffer_info = &rx_ring->buffer_info[i];
601
602 while (cleaned_count--) {
603 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
604
605 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 606 ps_page = &buffer_info->ps_pages[j];
607 if (j >= adapter->rx_ps_pages) {
608 /* all unused desc entries get hw null ptr */
af667a29
BA		 609 rx_desc->read.buffer_addr[j + 1] =
610 ~cpu_to_le64(0);
47f44e40
AK		 611 continue;
612 }
613 if (!ps_page->page) {
614 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 615 if (!ps_page->page) {
47f44e40
AK		 616 adapter->alloc_rx_buff_failed++;
617 goto no_buffers;
618 }
0be3f55f
NN		 619 ps_page->dma = dma_map_page(&pdev->dev,
620 ps_page->page,
621 0, PAGE_SIZE,
622 DMA_FROM_DEVICE);
623 if (dma_mapping_error(&pdev->dev,
624 ps_page->dma)) {
47f44e40 625 dev_err(&adapter->pdev->dev,
af667a29 626 "Rx DMA page map failed\n");
47f44e40
AK		 627 adapter->rx_dma_failed++;
628 goto no_buffers;
bc7f75fa 629 }
bc7f75fa 630 }
47f44e40
AK		 631 /*
632 * Refresh the desc even if buffer_addrs
633 * didn't change because each write-back
634 * erases this info.
635 */
af667a29
BA		 636 rx_desc->read.buffer_addr[j + 1] =
637 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 638 }
639
89d71a66
ED		 640 skb = netdev_alloc_skb_ip_align(netdev,
641 adapter->rx_ps_bsize0);
bc7f75fa
AK		 642
643 if (!skb) {
644 adapter->alloc_rx_buff_failed++;
645 break;
646 }
647
bc7f75fa 648 buffer_info->skb = skb;
0be3f55f 649 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 650 adapter->rx_ps_bsize0,
0be3f55f
NN		 651 DMA_FROM_DEVICE);
652 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
af667a29 653 dev_err(&pdev->dev, "Rx DMA map failed\n");
bc7f75fa
AK		 654 adapter->rx_dma_failed++;
655 /* cleanup skb */
656 dev_kfree_skb_any(skb);
657 buffer_info->skb = NULL;
658 break;
659 }
660
661 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
662
50849d79
TH		 663 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
664 /*
665 * Force memory writes to complete before letting h/w
666 * know there are new descriptors to fetch. (Only
667 * applicable for weak-ordered memory model archs,
668 * such as IA-64).
669 */
670 wmb();
af667a29 671 writel(i << 1, adapter->hw.hw_addr + rx_ring->tail);
50849d79
TH		 672 }
673
bc7f75fa
AK		 674 i++;
675 if (i == rx_ring->count)
676 i = 0;
677 buffer_info = &rx_ring->buffer_info[i];
678 }
679
680no_buffers:
50849d79 681 rx_ring->next_to_use = i;
bc7f75fa
AK		 682}
683
97ac8cae
BA		 684/**
685 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
686 * @adapter: address of board private structure
97ac8cae
BA		 687 * @cleaned_count: number of buffers to allocate this pass
688 **/
689
690static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
691 int cleaned_count)
692{
693 struct net_device *netdev = adapter->netdev;
694 struct pci_dev *pdev = adapter->pdev;
695 struct e1000_rx_desc *rx_desc;
696 struct e1000_ring *rx_ring = adapter->rx_ring;
697 struct e1000_buffer *buffer_info;
698 struct sk_buff *skb;
699 unsigned int i;
89d71a66 700 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 701
702 i = rx_ring->next_to_use;
703 buffer_info = &rx_ring->buffer_info[i];
704
705 while (cleaned_count--) {
706 skb = buffer_info->skb;
707 if (skb) {
708 skb_trim(skb, 0);
709 goto check_page;
710 }
711
89d71a66 712 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 713 if (unlikely(!skb)) {
714 /* Better luck next round */
715 adapter->alloc_rx_buff_failed++;
716 break;
717 }
718
97ac8cae
BA		 719 buffer_info->skb = skb;
720check_page:
721 /* allocate a new page if necessary */
722 if (!buffer_info->page) {
723 buffer_info->page = alloc_page(GFP_ATOMIC);
724 if (unlikely(!buffer_info->page)) {
725 adapter->alloc_rx_buff_failed++;
726 break;
727 }
728 }
729
730 if (!buffer_info->dma)
0be3f55f 731 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 732 buffer_info->page, 0,
733 PAGE_SIZE,
0be3f55f 734 DMA_FROM_DEVICE);
97ac8cae
BA		 735
736 rx_desc = E1000_RX_DESC(*rx_ring, i);
737 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
738
739 if (unlikely(++i == rx_ring->count))
740 i = 0;
741 buffer_info = &rx_ring->buffer_info[i];
742 }
743
744 if (likely(rx_ring->next_to_use != i)) {
745 rx_ring->next_to_use = i;
746 if (unlikely(i-- == 0))
747 i = (rx_ring->count - 1);
748
749 /* Force memory writes to complete before letting h/w
750 * know there are new descriptors to fetch. (Only
751 * applicable for weak-ordered memory model archs,
752 * such as IA-64). */
753 wmb();
754 writel(i, adapter->hw.hw_addr + rx_ring->tail);
755 }
756}
757
bc7f75fa
AK		 758/**
759 * e1000_clean_rx_irq - Send received data up the network stack; legacy
760 * @adapter: board private structure
761 *
762 * the return value indicates whether actual cleaning was done, there
763 * is no guarantee that everything was cleaned
764 **/
765static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
766 int *work_done, int work_to_do)
767{
768 struct net_device *netdev = adapter->netdev;
769 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 770 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 771 struct e1000_ring *rx_ring = adapter->rx_ring;
772 struct e1000_rx_desc *rx_desc, *next_rxd;
773 struct e1000_buffer *buffer_info, *next_buffer;
774 u32 length;
775 unsigned int i;
776 int cleaned_count = 0;
777 bool cleaned = 0;
778 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
779
780 i = rx_ring->next_to_clean;
781 rx_desc = E1000_RX_DESC(*rx_ring, i);
782 buffer_info = &rx_ring->buffer_info[i];
783
784 while (rx_desc->status & E1000_RXD_STAT_DD) {
785 struct sk_buff *skb;
786 u8 status;
787
788 if (*work_done >= work_to_do)
789 break;
790 (*work_done)++;
2d0bb1c1 791 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 792
793 status = rx_desc->status;
794 skb = buffer_info->skb;
795 buffer_info->skb = NULL;
796
797 prefetch(skb->data - NET_IP_ALIGN);
798
799 i++;
800 if (i == rx_ring->count)
801 i = 0;
802 next_rxd = E1000_RX_DESC(*rx_ring, i);
803 prefetch(next_rxd);
804
805 next_buffer = &rx_ring->buffer_info[i];
806
807 cleaned = 1;
808 cleaned_count++;
0be3f55f 809 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 810 buffer_info->dma,
811 adapter->rx_buffer_len,
0be3f55f 812 DMA_FROM_DEVICE);
bc7f75fa
AK		 813 buffer_info->dma = 0;
814
815 length = le16_to_cpu(rx_desc->length);
816
b94b5028
JB		 817 /*
818 * !EOP means multiple descriptors were used to store a single
819 * packet, if that's the case we need to toss it. In fact, we
820 * need to toss every packet with the EOP bit clear and the
821 * next frame that _does_ have the EOP bit set, as it is by
822 * definition only a frame fragment
823 */
824 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
825 adapter->flags2 |= FLAG2_IS_DISCARDING;
826
827 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 828 /* All receives must fit into a single buffer */
3bb99fe2 829 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 830 /* recycle */
831 buffer_info->skb = skb;
b94b5028
JB		 832 if (status & E1000_RXD_STAT_EOP)
833 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 834 goto next_desc;
835 }
836
837 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
838 /* recycle */
839 buffer_info->skb = skb;
840 goto next_desc;
841 }
842
eb7c3adb
JK		 843 /* adjust length to remove Ethernet CRC */
844 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
845 length -= 4;
846
bc7f75fa
AK		 847 total_rx_bytes += length;
848 total_rx_packets++;
849
ad68076e
BA		 850 /*
851 * code added for copybreak, this should improve
bc7f75fa 852 * performance for small packets with large amounts
ad68076e
BA		 853 * of reassembly being done in the stack
854 */
bc7f75fa
AK		 855 if (length < copybreak) {
856 struct sk_buff *new_skb =
89d71a66 857 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 858 if (new_skb) {
808ff676
BA		 859 skb_copy_to_linear_data_offset(new_skb,
860 -NET_IP_ALIGN,
861 (skb->data -
862 NET_IP_ALIGN),
863 (length +
864 NET_IP_ALIGN));
bc7f75fa
AK		 865 /* save the skb in buffer_info as good */
866 buffer_info->skb = skb;
867 skb = new_skb;
868 }
869 /* else just continue with the old one */
870 }
871 /* end copybreak code */
872 skb_put(skb, length);
873
874 /* Receive Checksum Offload */
875 e1000_rx_checksum(adapter,
876 (u32)(status) |
877 ((u32)(rx_desc->errors) << 24),
878 le16_to_cpu(rx_desc->csum), skb);
879
880 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
881
882next_desc:
883 rx_desc->status = 0;
884
885 /* return some buffers to hardware, one at a time is too slow */
886 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
887 adapter->alloc_rx_buf(adapter, cleaned_count);
888 cleaned_count = 0;
889 }
890
891 /* use prefetched values */
892 rx_desc = next_rxd;
893 buffer_info = next_buffer;
894 }
895 rx_ring->next_to_clean = i;
896
897 cleaned_count = e1000_desc_unused(rx_ring);
898 if (cleaned_count)
899 adapter->alloc_rx_buf(adapter, cleaned_count);
900
bc7f75fa 901 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 902 adapter->total_rx_packets += total_rx_packets;
bc7f75fa
AK		 903 return cleaned;
904}
905
bc7f75fa
AK		 906static void e1000_put_txbuf(struct e1000_adapter *adapter,
907 struct e1000_buffer *buffer_info)
908{
03b1320d
AD		 909 if (buffer_info->dma) {
910 if (buffer_info->mapped_as_page)
0be3f55f
NN		 911 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
912 buffer_info->length, DMA_TO_DEVICE);
03b1320d 913 else
0be3f55f
NN		 914 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
915 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 916 buffer_info->dma = 0;
917 }
bc7f75fa
AK		 918 if (buffer_info->skb) {
919 dev_kfree_skb_any(buffer_info->skb);
920 buffer_info->skb = NULL;
921 }
1b7719c4 922 buffer_info->time_stamp = 0;
bc7f75fa
AK		 923}
924
41cec6f1 925static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 926{
41cec6f1
BA		 927 struct e1000_adapter *adapter = container_of(work,
928 struct e1000_adapter,
929 print_hang_task);
bc7f75fa
AK		 930 struct e1000_ring *tx_ring = adapter->tx_ring;
931 unsigned int i = tx_ring->next_to_clean;
932 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
933 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 934 struct e1000_hw *hw = &adapter->hw;
935 u16 phy_status, phy_1000t_status, phy_ext_status;
936 u16 pci_status;
937
938 e1e_rphy(hw, PHY_STATUS, &phy_status);
939 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
940 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 941
41cec6f1
BA		 942 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
943
944 /* detected Hardware unit hang */
945 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 946 " TDH <%x>\n"
947 " TDT <%x>\n"
948 " next_to_use <%x>\n"
949 " next_to_clean <%x>\n"
950 "buffer_info[next_to_clean]:\n"
951 " time_stamp <%lx>\n"
952 " next_to_watch <%x>\n"
953 " jiffies <%lx>\n"
41cec6f1
BA		 954 " next_to_watch.status <%x>\n"
955 "MAC Status <%x>\n"
956 "PHY Status <%x>\n"
957 "PHY 1000BASE-T Status <%x>\n"
958 "PHY Extended Status <%x>\n"
959 "PCI Status <%x>\n",
44defeb3
JK		 960 readl(adapter->hw.hw_addr + tx_ring->head),
961 readl(adapter->hw.hw_addr + tx_ring->tail),
962 tx_ring->next_to_use,
963 tx_ring->next_to_clean,
964 tx_ring->buffer_info[eop].time_stamp,
965 eop,
966 jiffies,
41cec6f1
BA		 967 eop_desc->upper.fields.status,
968 er32(STATUS),
969 phy_status,
970 phy_1000t_status,
971 phy_ext_status,
972 pci_status);
bc7f75fa
AK		 973}
974
975/**
976 * e1000_clean_tx_irq - Reclaim resources after transmit completes
977 * @adapter: board private structure
978 *
979 * the return value indicates whether actual cleaning was done, there
980 * is no guarantee that everything was cleaned
981 **/
982static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
983{
984 struct net_device *netdev = adapter->netdev;
985 struct e1000_hw *hw = &adapter->hw;
986 struct e1000_ring *tx_ring = adapter->tx_ring;
987 struct e1000_tx_desc *tx_desc, *eop_desc;
988 struct e1000_buffer *buffer_info;
989 unsigned int i, eop;
990 unsigned int count = 0;
bc7f75fa
AK		 991 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
992
993 i = tx_ring->next_to_clean;
994 eop = tx_ring->buffer_info[i].next_to_watch;
995 eop_desc = E1000_TX_DESC(*tx_ring, eop);
996
12d04a3c
AD		 997 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
998 (count < tx_ring->count)) {
a86043c2 999 bool cleaned = false;
2d0bb1c1 1000 rmb(); /* read buffer_info after eop_desc */
a86043c2 1001 for (; !cleaned; count++) {
bc7f75fa
AK		 1002 tx_desc = E1000_TX_DESC(*tx_ring, i);
1003 buffer_info = &tx_ring->buffer_info[i];
1004 cleaned = (i == eop);
1005
1006 if (cleaned) {
9ed318d5
TH		 1007 total_tx_packets += buffer_info->segs;
1008 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK		 1009 }
1010
1011 e1000_put_txbuf(adapter, buffer_info);
1012 tx_desc->upper.data = 0;
1013
1014 i++;
1015 if (i == tx_ring->count)
1016 i = 0;
1017 }
1018
dac87619
TL		 1019 if (i == tx_ring->next_to_use)
1020 break;
bc7f75fa
AK		 1021 eop = tx_ring->buffer_info[i].next_to_watch;
1022 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1023 }
1024
1025 tx_ring->next_to_clean = i;
1026
1027#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1028 if (count && netif_carrier_ok(netdev) &&
1029 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1030 /* Make sure that anybody stopping the queue after this
1031 * sees the new next_to_clean.
1032 */
1033 smp_mb();
1034
1035 if (netif_queue_stopped(netdev) &&
1036 !(test_bit(__E1000_DOWN, &adapter->state))) {
1037 netif_wake_queue(netdev);
1038 ++adapter->restart_queue;
1039 }
1040 }
1041
1042 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1043 /*
1044 * Detect a transmit hang in hardware, this serializes the
1045 * check with the clearing of time_stamp and movement of i
1046 */
bc7f75fa 1047 adapter->detect_tx_hung = 0;
12d04a3c
AD		 1048 if (tx_ring->buffer_info[i].time_stamp &&
1049 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 1050 + (adapter->tx_timeout_factor * HZ)) &&
1051 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1052 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 1053 netif_stop_queue(netdev);
1054 }
1055 }
1056 adapter->total_tx_bytes += total_tx_bytes;
1057 adapter->total_tx_packets += total_tx_packets;
807540ba 1058 return count < tx_ring->count;
bc7f75fa
AK		 1059}
1060
bc7f75fa
AK		 1061/**
1062 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1063 * @adapter: board private structure
1064 *
1065 * the return value indicates whether actual cleaning was done, there
1066 * is no guarantee that everything was cleaned
1067 **/
1068static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1069 int *work_done, int work_to_do)
1070{
3bb99fe2 1071 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1072 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1073 struct net_device *netdev = adapter->netdev;
1074 struct pci_dev *pdev = adapter->pdev;
1075 struct e1000_ring *rx_ring = adapter->rx_ring;
1076 struct e1000_buffer *buffer_info, *next_buffer;
1077 struct e1000_ps_page *ps_page;
1078 struct sk_buff *skb;
1079 unsigned int i, j;
1080 u32 length, staterr;
1081 int cleaned_count = 0;
1082 bool cleaned = 0;
1083 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1084
1085 i = rx_ring->next_to_clean;
1086 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1087 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1088 buffer_info = &rx_ring->buffer_info[i];
1089
1090 while (staterr & E1000_RXD_STAT_DD) {
1091 if (*work_done >= work_to_do)
1092 break;
1093 (*work_done)++;
1094 skb = buffer_info->skb;
2d0bb1c1 1095 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 1096
1097 /* in the packet split case this is header only */
1098 prefetch(skb->data - NET_IP_ALIGN);
1099
1100 i++;
1101 if (i == rx_ring->count)
1102 i = 0;
1103 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1104 prefetch(next_rxd);
1105
1106 next_buffer = &rx_ring->buffer_info[i];
1107
1108 cleaned = 1;
1109 cleaned_count++;
0be3f55f 1110 dma_unmap_single(&pdev->dev, buffer_info->dma,
af667a29 1111 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
bc7f75fa
AK		 1112 buffer_info->dma = 0;
1113
af667a29 1114 /* see !EOP comment in other Rx routine */
b94b5028
JB		 1115 if (!(staterr & E1000_RXD_STAT_EOP))
1116 adapter->flags2 |= FLAG2_IS_DISCARDING;
1117
1118 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 1119 e_dbg("Packet Split buffers didn't pick up the full "
1120 "packet\n");
bc7f75fa 1121 dev_kfree_skb_irq(skb);
b94b5028
JB		 1122 if (staterr & E1000_RXD_STAT_EOP)
1123 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1124 goto next_desc;
1125 }
1126
1127 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1128 dev_kfree_skb_irq(skb);
1129 goto next_desc;
1130 }
1131
1132 length = le16_to_cpu(rx_desc->wb.middle.length0);
1133
1134 if (!length) {
3bb99fe2
BA		 1135 e_dbg("Last part of the packet spanning multiple "
1136 "descriptors\n");
bc7f75fa
AK		 1137 dev_kfree_skb_irq(skb);
1138 goto next_desc;
1139 }
1140
1141 /* Good Receive */
1142 skb_put(skb, length);
1143
1144 {
ad68076e
BA		 1145 /*
1146 * this looks ugly, but it seems compiler issues make it
1147 * more efficient than reusing j
1148 */
bc7f75fa
AK		 1149 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1150
ad68076e
BA		 1151 /*
1152 * page alloc/put takes too long and effects small packet
1153 * throughput, so unsplit small packets and save the alloc/put
1154 * only valid in softirq (napi) context to call kmap_*
1155 */
bc7f75fa
AK		 1156 if (l1 && (l1 <= copybreak) &&
1157 ((length + l1) <= adapter->rx_ps_bsize0)) {
1158 u8 *vaddr;
1159
47f44e40 1160 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1161
ad68076e
BA		 1162 /*
1163 * there is no documentation about how to call
bc7f75fa 1164 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 1165 * very long
1166 */
0be3f55f
NN		 1167 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1168 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK		 1169 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1170 memcpy(skb_tail_pointer(skb), vaddr, l1);
1171 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN		 1172 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1173 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1174
eb7c3adb
JK		 1175 /* remove the CRC */
1176 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1177 l1 -= 4;
1178
bc7f75fa
AK		 1179 skb_put(skb, l1);
1180 goto copydone;
1181 } /* if */
1182 }
1183
1184 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1185 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1186 if (!length)
1187 break;
1188
47f44e40 1189 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1190 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1191 DMA_FROM_DEVICE);
bc7f75fa
AK		 1192 ps_page->dma = 0;
1193 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1194 ps_page->page = NULL;
1195 skb->len += length;
1196 skb->data_len += length;
1197 skb->truesize += length;
1198 }
1199
eb7c3adb
JK		 1200 /* strip the ethernet crc, problem is we're using pages now so
1201 * this whole operation can get a little cpu intensive
1202 */
1203 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1204 pskb_trim(skb, skb->len - 4);
1205
bc7f75fa
AK		 1206copydone:
1207 total_rx_bytes += skb->len;
1208 total_rx_packets++;
1209
1210 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1211 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1212
1213 if (rx_desc->wb.upper.header_status &
1214 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1215 adapter->rx_hdr_split++;
1216
1217 e1000_receive_skb(adapter, netdev, skb,
1218 staterr, rx_desc->wb.middle.vlan);
1219
1220next_desc:
1221 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1222 buffer_info->skb = NULL;
1223
1224 /* return some buffers to hardware, one at a time is too slow */
1225 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1226 adapter->alloc_rx_buf(adapter, cleaned_count);
1227 cleaned_count = 0;
1228 }
1229
1230 /* use prefetched values */
1231 rx_desc = next_rxd;
1232 buffer_info = next_buffer;
1233
1234 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1235 }
1236 rx_ring->next_to_clean = i;
1237
1238 cleaned_count = e1000_desc_unused(rx_ring);
1239 if (cleaned_count)
1240 adapter->alloc_rx_buf(adapter, cleaned_count);
1241
bc7f75fa 1242 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1243 adapter->total_rx_packets += total_rx_packets;
bc7f75fa
AK		 1244 return cleaned;
1245}
1246
97ac8cae
BA		 1247/**
1248 * e1000_consume_page - helper function
1249 **/
1250static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1251 u16 length)
1252{
1253 bi->page = NULL;
1254 skb->len += length;
1255 skb->data_len += length;
1256 skb->truesize += length;
1257}
1258
1259/**
1260 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1261 * @adapter: board private structure
1262 *
1263 * the return value indicates whether actual cleaning was done, there
1264 * is no guarantee that everything was cleaned
1265 **/
1266
1267static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1268 int *work_done, int work_to_do)
1269{
1270 struct net_device *netdev = adapter->netdev;
1271 struct pci_dev *pdev = adapter->pdev;
1272 struct e1000_ring *rx_ring = adapter->rx_ring;
1273 struct e1000_rx_desc *rx_desc, *next_rxd;
1274 struct e1000_buffer *buffer_info, *next_buffer;
1275 u32 length;
1276 unsigned int i;
1277 int cleaned_count = 0;
1278 bool cleaned = false;
1279 unsigned int total_rx_bytes=0, total_rx_packets=0;
1280
1281 i = rx_ring->next_to_clean;
1282 rx_desc = E1000_RX_DESC(*rx_ring, i);
1283 buffer_info = &rx_ring->buffer_info[i];
1284
1285 while (rx_desc->status & E1000_RXD_STAT_DD) {
1286 struct sk_buff *skb;
1287 u8 status;
1288
1289 if (*work_done >= work_to_do)
1290 break;
1291 (*work_done)++;
2d0bb1c1 1292 rmb(); /* read descriptor and rx_buffer_info after status DD */
97ac8cae
BA		 1293
1294 status = rx_desc->status;
1295 skb = buffer_info->skb;
1296 buffer_info->skb = NULL;
1297
1298 ++i;
1299 if (i == rx_ring->count)
1300 i = 0;
1301 next_rxd = E1000_RX_DESC(*rx_ring, i);
1302 prefetch(next_rxd);
1303
1304 next_buffer = &rx_ring->buffer_info[i];
1305
1306 cleaned = true;
1307 cleaned_count++;
0be3f55f
NN		 1308 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1309 DMA_FROM_DEVICE);
97ac8cae
BA		 1310 buffer_info->dma = 0;
1311
1312 length = le16_to_cpu(rx_desc->length);
1313
1314 /* errors is only valid for DD + EOP descriptors */
1315 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1316 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1317 /* recycle both page and skb */
1318 buffer_info->skb = skb;
1319 /* an error means any chain goes out the window
1320 * too */
1321 if (rx_ring->rx_skb_top)
1322 dev_kfree_skb(rx_ring->rx_skb_top);
1323 rx_ring->rx_skb_top = NULL;
1324 goto next_desc;
1325 }
1326
f0f1a172 1327#define rxtop (rx_ring->rx_skb_top)
97ac8cae
BA		 1328 if (!(status & E1000_RXD_STAT_EOP)) {
1329 /* this descriptor is only the beginning (or middle) */
1330 if (!rxtop) {
1331 /* this is the beginning of a chain */
1332 rxtop = skb;
1333 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1334 0, length);
1335 } else {
1336 /* this is the middle of a chain */
1337 skb_fill_page_desc(rxtop,
1338 skb_shinfo(rxtop)->nr_frags,
1339 buffer_info->page, 0, length);
1340 /* re-use the skb, only consumed the page */
1341 buffer_info->skb = skb;
1342 }
1343 e1000_consume_page(buffer_info, rxtop, length);
1344 goto next_desc;
1345 } else {
1346 if (rxtop) {
1347 /* end of the chain */
1348 skb_fill_page_desc(rxtop,
1349 skb_shinfo(rxtop)->nr_frags,
1350 buffer_info->page, 0, length);
1351 /* re-use the current skb, we only consumed the
1352 * page */
1353 buffer_info->skb = skb;
1354 skb = rxtop;
1355 rxtop = NULL;
1356 e1000_consume_page(buffer_info, skb, length);
1357 } else {
1358 /* no chain, got EOP, this buf is the packet
1359 * copybreak to save the put_page/alloc_page */
1360 if (length <= copybreak &&
1361 skb_tailroom(skb) >= length) {
1362 u8 *vaddr;
1363 vaddr = kmap_atomic(buffer_info->page,
1364 KM_SKB_DATA_SOFTIRQ);
1365 memcpy(skb_tail_pointer(skb), vaddr,
1366 length);
1367 kunmap_atomic(vaddr,
1368 KM_SKB_DATA_SOFTIRQ);
1369 /* re-use the page, so don't erase
1370 * buffer_info->page */
1371 skb_put(skb, length);
1372 } else {
1373 skb_fill_page_desc(skb, 0,
1374 buffer_info->page, 0,
1375 length);
1376 e1000_consume_page(buffer_info, skb,
1377 length);
1378 }
1379 }
1380 }
1381
1382 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1383 e1000_rx_checksum(adapter,
1384 (u32)(status) |
1385 ((u32)(rx_desc->errors) << 24),
1386 le16_to_cpu(rx_desc->csum), skb);
1387
1388 /* probably a little skewed due to removing CRC */
1389 total_rx_bytes += skb->len;
1390 total_rx_packets++;
1391
1392 /* eth type trans needs skb->data to point to something */
1393 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1394 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1395 dev_kfree_skb(skb);
1396 goto next_desc;
1397 }
1398
1399 e1000_receive_skb(adapter, netdev, skb, status,
1400 rx_desc->special);
1401
1402next_desc:
1403 rx_desc->status = 0;
1404
1405 /* return some buffers to hardware, one at a time is too slow */
1406 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1407 adapter->alloc_rx_buf(adapter, cleaned_count);
1408 cleaned_count = 0;
1409 }
1410
1411 /* use prefetched values */
1412 rx_desc = next_rxd;
1413 buffer_info = next_buffer;
1414 }
1415 rx_ring->next_to_clean = i;
1416
1417 cleaned_count = e1000_desc_unused(rx_ring);
1418 if (cleaned_count)
1419 adapter->alloc_rx_buf(adapter, cleaned_count);
1420
1421 adapter->total_rx_bytes += total_rx_bytes;
1422 adapter->total_rx_packets += total_rx_packets;
97ac8cae
BA		 1423 return cleaned;
1424}
1425
bc7f75fa
AK		 1426/**
1427 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1428 * @adapter: board private structure
1429 **/
1430static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1431{
1432 struct e1000_ring *rx_ring = adapter->rx_ring;
1433 struct e1000_buffer *buffer_info;
1434 struct e1000_ps_page *ps_page;
1435 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1436 unsigned int i, j;
1437
1438 /* Free all the Rx ring sk_buffs */
1439 for (i = 0; i < rx_ring->count; i++) {
1440 buffer_info = &rx_ring->buffer_info[i];
1441 if (buffer_info->dma) {
1442 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1443 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1444 adapter->rx_buffer_len,
0be3f55f 1445 DMA_FROM_DEVICE);
97ac8cae 1446 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1447 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1448 PAGE_SIZE,
0be3f55f 1449 DMA_FROM_DEVICE);
bc7f75fa 1450 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1451 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1452 adapter->rx_ps_bsize0,
0be3f55f 1453 DMA_FROM_DEVICE);
bc7f75fa
AK		 1454 buffer_info->dma = 0;
1455 }
1456
97ac8cae
BA		 1457 if (buffer_info->page) {
1458 put_page(buffer_info->page);
1459 buffer_info->page = NULL;
1460 }
1461
bc7f75fa
AK		 1462 if (buffer_info->skb) {
1463 dev_kfree_skb(buffer_info->skb);
1464 buffer_info->skb = NULL;
1465 }
1466
1467 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1468 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1469 if (!ps_page->page)
1470 break;
0be3f55f
NN		 1471 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1472 DMA_FROM_DEVICE);
bc7f75fa
AK		 1473 ps_page->dma = 0;
1474 put_page(ps_page->page);
1475 ps_page->page = NULL;
1476 }
1477 }
1478
1479 /* there also may be some cached data from a chained receive */
1480 if (rx_ring->rx_skb_top) {
1481 dev_kfree_skb(rx_ring->rx_skb_top);
1482 rx_ring->rx_skb_top = NULL;
1483 }
1484
bc7f75fa
AK		 1485 /* Zero out the descriptor ring */
1486 memset(rx_ring->desc, 0, rx_ring->size);
1487
1488 rx_ring->next_to_clean = 0;
1489 rx_ring->next_to_use = 0;
b94b5028 1490 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1491
1492 writel(0, adapter->hw.hw_addr + rx_ring->head);
1493 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1494}
1495
a8f88ff5
JB		 1496static void e1000e_downshift_workaround(struct work_struct *work)
1497{
1498 struct e1000_adapter *adapter = container_of(work,
1499 struct e1000_adapter, downshift_task);
1500
1501 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1502}
1503
bc7f75fa
AK		 1504/**
1505 * e1000_intr_msi - Interrupt Handler
1506 * @irq: interrupt number
1507 * @data: pointer to a network interface device structure
1508 **/
1509static irqreturn_t e1000_intr_msi(int irq, void *data)
1510{
1511 struct net_device *netdev = data;
1512 struct e1000_adapter *adapter = netdev_priv(netdev);
1513 struct e1000_hw *hw = &adapter->hw;
1514 u32 icr = er32(ICR);
1515
ad68076e
BA		 1516 /*
1517 * read ICR disables interrupts using IAM
1518 */
bc7f75fa 1519
573cca8c 1520 if (icr & E1000_ICR_LSC) {
bc7f75fa 1521 hw->mac.get_link_status = 1;
ad68076e
BA		 1522 /*
1523 * ICH8 workaround-- Call gig speed drop workaround on cable
1524 * disconnect (LSC) before accessing any PHY registers
1525 */
bc7f75fa
AK		 1526 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1527 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1528 schedule_work(&adapter->downshift_task);
bc7f75fa 1529
ad68076e
BA		 1530 /*
1531 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1532 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1533 * adapter in watchdog
1534 */
bc7f75fa
AK		 1535 if (netif_carrier_ok(netdev) &&
1536 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1537 /* disable receives */
1538 u32 rctl = er32(RCTL);
1539 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1540 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1541 }
1542 /* guard against interrupt when we're going down */
1543 if (!test_bit(__E1000_DOWN, &adapter->state))
1544 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1545 }
1546
288379f0 1547 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1548 adapter->total_tx_bytes = 0;
1549 adapter->total_tx_packets = 0;
1550 adapter->total_rx_bytes = 0;
1551 adapter->total_rx_packets = 0;
288379f0 1552 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1553 }
1554
1555 return IRQ_HANDLED;
1556}
1557
1558/**
1559 * e1000_intr - Interrupt Handler
1560 * @irq: interrupt number
1561 * @data: pointer to a network interface device structure
1562 **/
1563static irqreturn_t e1000_intr(int irq, void *data)
1564{
1565 struct net_device *netdev = data;
1566 struct e1000_adapter *adapter = netdev_priv(netdev);
1567 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1568 u32 rctl, icr = er32(ICR);
4662e82b 1569
a68ea775 1570 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1571 return IRQ_NONE; /* Not our interrupt */
1572
ad68076e
BA		 1573 /*
1574 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1575 * not set, then the adapter didn't send an interrupt
1576 */
bc7f75fa
AK		 1577 if (!(icr & E1000_ICR_INT_ASSERTED))
1578 return IRQ_NONE;
1579
ad68076e
BA		 1580 /*
1581 * Interrupt Auto-Mask...upon reading ICR,
1582 * interrupts are masked. No need for the
1583 * IMC write
1584 */
bc7f75fa 1585
573cca8c 1586 if (icr & E1000_ICR_LSC) {
bc7f75fa 1587 hw->mac.get_link_status = 1;
ad68076e
BA		 1588 /*
1589 * ICH8 workaround-- Call gig speed drop workaround on cable
1590 * disconnect (LSC) before accessing any PHY registers
1591 */
bc7f75fa
AK		 1592 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1593 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1594 schedule_work(&adapter->downshift_task);
bc7f75fa 1595
ad68076e
BA		 1596 /*
1597 * 80003ES2LAN workaround--
bc7f75fa
AK		 1598 * For packet buffer work-around on link down event;
1599 * disable receives here in the ISR and
1600 * reset adapter in watchdog
1601 */
1602 if (netif_carrier_ok(netdev) &&
1603 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1604 /* disable receives */
1605 rctl = er32(RCTL);
1606 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1607 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1608 }
1609 /* guard against interrupt when we're going down */
1610 if (!test_bit(__E1000_DOWN, &adapter->state))
1611 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1612 }
1613
288379f0 1614 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1615 adapter->total_tx_bytes = 0;
1616 adapter->total_tx_packets = 0;
1617 adapter->total_rx_bytes = 0;
1618 adapter->total_rx_packets = 0;
288379f0 1619 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1620 }
1621
1622 return IRQ_HANDLED;
1623}
1624
4662e82b
BA		 1625static irqreturn_t e1000_msix_other(int irq, void *data)
1626{
1627 struct net_device *netdev = data;
1628 struct e1000_adapter *adapter = netdev_priv(netdev);
1629 struct e1000_hw *hw = &adapter->hw;
1630 u32 icr = er32(ICR);
1631
1632 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1633 if (!test_bit(__E1000_DOWN, &adapter->state))
1634 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1635 return IRQ_NONE;
1636 }
1637
1638 if (icr & adapter->eiac_mask)
1639 ew32(ICS, (icr & adapter->eiac_mask));
1640
1641 if (icr & E1000_ICR_OTHER) {
1642 if (!(icr & E1000_ICR_LSC))
1643 goto no_link_interrupt;
1644 hw->mac.get_link_status = 1;
1645 /* guard against interrupt when we're going down */
1646 if (!test_bit(__E1000_DOWN, &adapter->state))
1647 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1648 }
1649
1650no_link_interrupt:
a3c69fef
JB		 1651 if (!test_bit(__E1000_DOWN, &adapter->state))
1652 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1653
1654 return IRQ_HANDLED;
1655}
1656
1657
1658static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1659{
1660 struct net_device *netdev = data;
1661 struct e1000_adapter *adapter = netdev_priv(netdev);
1662 struct e1000_hw *hw = &adapter->hw;
1663 struct e1000_ring *tx_ring = adapter->tx_ring;
1664
1665
1666 adapter->total_tx_bytes = 0;
1667 adapter->total_tx_packets = 0;
1668
1669 if (!e1000_clean_tx_irq(adapter))
1670 /* Ring was not completely cleaned, so fire another interrupt */
1671 ew32(ICS, tx_ring->ims_val);
1672
1673 return IRQ_HANDLED;
1674}
1675
1676static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1677{
1678 struct net_device *netdev = data;
1679 struct e1000_adapter *adapter = netdev_priv(netdev);
1680
1681 /* Write the ITR value calculated at the end of the
1682 * previous interrupt.
1683 */
1684 if (adapter->rx_ring->set_itr) {
1685 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1686 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1687 adapter->rx_ring->set_itr = 0;
1688 }
1689
288379f0 1690 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1691 adapter->total_rx_bytes = 0;
1692 adapter->total_rx_packets = 0;
288379f0 1693 __napi_schedule(&adapter->napi);
4662e82b
BA		 1694 }
1695 return IRQ_HANDLED;
1696}
1697
1698/**
1699 * e1000_configure_msix - Configure MSI-X hardware
1700 *
1701 * e1000_configure_msix sets up the hardware to properly
1702 * generate MSI-X interrupts.
1703 **/
1704static void e1000_configure_msix(struct e1000_adapter *adapter)
1705{
1706 struct e1000_hw *hw = &adapter->hw;
1707 struct e1000_ring *rx_ring = adapter->rx_ring;
1708 struct e1000_ring *tx_ring = adapter->tx_ring;
1709 int vector = 0;
1710 u32 ctrl_ext, ivar = 0;
1711
1712 adapter->eiac_mask = 0;
1713
1714 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1715 if (hw->mac.type == e1000_82574) {
1716 u32 rfctl = er32(RFCTL);
1717 rfctl |= E1000_RFCTL_ACK_DIS;
1718 ew32(RFCTL, rfctl);
1719 }
1720
1721#define E1000_IVAR_INT_ALLOC_VALID 0x8
1722 /* Configure Rx vector */
1723 rx_ring->ims_val = E1000_IMS_RXQ0;
1724 adapter->eiac_mask |= rx_ring->ims_val;
1725 if (rx_ring->itr_val)
1726 writel(1000000000 / (rx_ring->itr_val * 256),
1727 hw->hw_addr + rx_ring->itr_register);
1728 else
1729 writel(1, hw->hw_addr + rx_ring->itr_register);
1730 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1731
1732 /* Configure Tx vector */
1733 tx_ring->ims_val = E1000_IMS_TXQ0;
1734 vector++;
1735 if (tx_ring->itr_val)
1736 writel(1000000000 / (tx_ring->itr_val * 256),
1737 hw->hw_addr + tx_ring->itr_register);
1738 else
1739 writel(1, hw->hw_addr + tx_ring->itr_register);
1740 adapter->eiac_mask |= tx_ring->ims_val;
1741 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1742
1743 /* set vector for Other Causes, e.g. link changes */
1744 vector++;
1745 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1746 if (rx_ring->itr_val)
1747 writel(1000000000 / (rx_ring->itr_val * 256),
1748 hw->hw_addr + E1000_EITR_82574(vector));
1749 else
1750 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1751
1752 /* Cause Tx interrupts on every write back */
1753 ivar |= (1 << 31);
1754
1755 ew32(IVAR, ivar);
1756
1757 /* enable MSI-X PBA support */
1758 ctrl_ext = er32(CTRL_EXT);
1759 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1760
1761 /* Auto-Mask Other interrupts upon ICR read */
1762#define E1000_EIAC_MASK_82574 0x01F00000
1763 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1764 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1765 ew32(CTRL_EXT, ctrl_ext);
1766 e1e_flush();
1767}
1768
1769void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1770{
1771 if (adapter->msix_entries) {
1772 pci_disable_msix(adapter->pdev);
1773 kfree(adapter->msix_entries);
1774 adapter->msix_entries = NULL;
1775 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1776 pci_disable_msi(adapter->pdev);
1777 adapter->flags &= ~FLAG_MSI_ENABLED;
1778 }
4662e82b
BA		 1779}
1780
1781/**
1782 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1783 *
1784 * Attempt to configure interrupts using the best available
1785 * capabilities of the hardware and kernel.
1786 **/
1787void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1788{
1789 int err;
8e86acd7 1790 int i;
4662e82b
BA		 1791
1792 switch (adapter->int_mode) {
1793 case E1000E_INT_MODE_MSIX:
1794 if (adapter->flags & FLAG_HAS_MSIX) {
8e86acd7
JK		 1795 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1796 adapter->msix_entries = kcalloc(adapter->num_vectors,
4662e82b
BA		 1797 sizeof(struct msix_entry),
1798 GFP_KERNEL);
1799 if (adapter->msix_entries) {
8e86acd7 1800 for (i = 0; i < adapter->num_vectors; i++)
4662e82b
BA		 1801 adapter->msix_entries[i].entry = i;
1802
1803 err = pci_enable_msix(adapter->pdev,
1804 adapter->msix_entries,
8e86acd7 1805 adapter->num_vectors);
b1cdfead 1806 if (err == 0)
4662e82b
BA		 1807 return;
1808 }
1809 /* MSI-X failed, so fall through and try MSI */
1810 e_err("Failed to initialize MSI-X interrupts. "
1811 "Falling back to MSI interrupts.\n");
1812 e1000e_reset_interrupt_capability(adapter);
1813 }
1814 adapter->int_mode = E1000E_INT_MODE_MSI;
1815 /* Fall through */
1816 case E1000E_INT_MODE_MSI:
1817 if (!pci_enable_msi(adapter->pdev)) {
1818 adapter->flags |= FLAG_MSI_ENABLED;
1819 } else {
1820 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1821 e_err("Failed to initialize MSI interrupts. Falling "
1822 "back to legacy interrupts.\n");
1823 }
1824 /* Fall through */
1825 case E1000E_INT_MODE_LEGACY:
1826 /* Don't do anything; this is the system default */
1827 break;
1828 }
8e86acd7
JK		 1829
1830 /* store the number of vectors being used */
1831 adapter->num_vectors = 1;
4662e82b
BA		 1832}
1833
1834/**
1835 * e1000_request_msix - Initialize MSI-X interrupts
1836 *
1837 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1838 * kernel.
1839 **/
1840static int e1000_request_msix(struct e1000_adapter *adapter)
1841{
1842 struct net_device *netdev = adapter->netdev;
1843 int err = 0, vector = 0;
1844
1845 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1846 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1847 else
1848 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1849 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1850 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1851 netdev);
1852 if (err)
1853 goto out;
1854 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1855 adapter->rx_ring->itr_val = adapter->itr;
1856 vector++;
1857
1858 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1859 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1860 else
1861 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1862 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1863 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1864 netdev);
1865 if (err)
1866 goto out;
1867 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1868 adapter->tx_ring->itr_val = adapter->itr;
1869 vector++;
1870
1871 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1872 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1873 if (err)
1874 goto out;
1875
1876 e1000_configure_msix(adapter);
1877 return 0;
1878out:
1879 return err;
1880}
1881
f8d59f78
BA		 1882/**
1883 * e1000_request_irq - initialize interrupts
1884 *
1885 * Attempts to configure interrupts using the best available
1886 * capabilities of the hardware and kernel.
1887 **/
bc7f75fa
AK		 1888static int e1000_request_irq(struct e1000_adapter *adapter)
1889{
1890 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1891 int err;
1892
4662e82b
BA		 1893 if (adapter->msix_entries) {
1894 err = e1000_request_msix(adapter);
1895 if (!err)
1896 return err;
1897 /* fall back to MSI */
1898 e1000e_reset_interrupt_capability(adapter);
1899 adapter->int_mode = E1000E_INT_MODE_MSI;
1900 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1901 }
4662e82b 1902 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1903 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1904 netdev->name, netdev);
1905 if (!err)
1906 return err;
bc7f75fa 1907
4662e82b
BA		 1908 /* fall back to legacy interrupt */
1909 e1000e_reset_interrupt_capability(adapter);
1910 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1911 }
1912
a0607fd3 1913 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1914 netdev->name, netdev);
1915 if (err)
1916 e_err("Unable to allocate interrupt, Error: %d\n", err);
1917
bc7f75fa
AK		 1918 return err;
1919}
1920
1921static void e1000_free_irq(struct e1000_adapter *adapter)
1922{
1923 struct net_device *netdev = adapter->netdev;
1924
4662e82b
BA		 1925 if (adapter->msix_entries) {
1926 int vector = 0;
1927
1928 free_irq(adapter->msix_entries[vector].vector, netdev);
1929 vector++;
1930
1931 free_irq(adapter->msix_entries[vector].vector, netdev);
1932 vector++;
1933
1934 /* Other Causes interrupt vector */
1935 free_irq(adapter->msix_entries[vector].vector, netdev);
1936 return;
bc7f75fa 1937 }
4662e82b
BA		 1938
1939 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1940}
1941
1942/**
1943 * e1000_irq_disable - Mask off interrupt generation on the NIC
1944 **/
1945static void e1000_irq_disable(struct e1000_adapter *adapter)
1946{
1947 struct e1000_hw *hw = &adapter->hw;
1948
bc7f75fa 1949 ew32(IMC, ~0);
4662e82b
BA		 1950 if (adapter->msix_entries)
1951 ew32(EIAC_82574, 0);
bc7f75fa 1952 e1e_flush();
8e86acd7
JK		 1953
1954 if (adapter->msix_entries) {
1955 int i;
1956 for (i = 0; i < adapter->num_vectors; i++)
1957 synchronize_irq(adapter->msix_entries[i].vector);
1958 } else {
1959 synchronize_irq(adapter->pdev->irq);
1960 }
bc7f75fa
AK		 1961}
1962
1963/**
1964 * e1000_irq_enable - Enable default interrupt generation settings
1965 **/
1966static void e1000_irq_enable(struct e1000_adapter *adapter)
1967{
1968 struct e1000_hw *hw = &adapter->hw;
1969
4662e82b
BA		 1970 if (adapter->msix_entries) {
1971 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1972 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1973 } else {
1974 ew32(IMS, IMS_ENABLE_MASK);
1975 }
74ef9c39 1976 e1e_flush();
bc7f75fa
AK		 1977}
1978
1979/**
31dbe5b4 1980 * e1000e_get_hw_control - get control of the h/w from f/w
bc7f75fa
AK		 1981 * @adapter: address of board private structure
1982 *
31dbe5b4 1983 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1984 * For ASF and Pass Through versions of f/w this means that
1985 * the driver is loaded. For AMT version (only with 82573)
1986 * of the f/w this means that the network i/f is open.
1987 **/
31dbe5b4 1988void e1000e_get_hw_control(struct e1000_adapter *adapter)
bc7f75fa
AK		 1989{
1990 struct e1000_hw *hw = &adapter->hw;
1991 u32 ctrl_ext;
1992 u32 swsm;
1993
1994 /* Let firmware know the driver has taken over */
1995 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1996 swsm = er32(SWSM);
1997 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1998 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1999 ctrl_ext = er32(CTRL_EXT);
ad68076e 2000 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2001 }
2002}
2003
2004/**
31dbe5b4 2005 * e1000e_release_hw_control - release control of the h/w to f/w
bc7f75fa
AK		 2006 * @adapter: address of board private structure
2007 *
31dbe5b4 2008 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 2009 * For ASF and Pass Through versions of f/w this means that the
2010 * driver is no longer loaded. For AMT version (only with 82573) i
2011 * of the f/w this means that the network i/f is closed.
2012 *
2013 **/
31dbe5b4 2014void e1000e_release_hw_control(struct e1000_adapter *adapter)
bc7f75fa
AK		 2015{
2016 struct e1000_hw *hw = &adapter->hw;
2017 u32 ctrl_ext;
2018 u32 swsm;
2019
2020 /* Let firmware taken over control of h/w */
2021 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2022 swsm = er32(SWSM);
2023 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2024 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2025 ctrl_ext = er32(CTRL_EXT);
ad68076e 2026 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2027 }
2028}
2029
bc7f75fa
AK		 2030/**
2031 * @e1000_alloc_ring - allocate memory for a ring structure
2032 **/
2033static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2034 struct e1000_ring *ring)
2035{
2036 struct pci_dev *pdev = adapter->pdev;
2037
2038 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2039 GFP_KERNEL);
2040 if (!ring->desc)
2041 return -ENOMEM;
2042
2043 return 0;
2044}
2045
2046/**
2047 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2048 * @adapter: board private structure
2049 *
2050 * Return 0 on success, negative on failure
2051 **/
2052int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2053{
2054 struct e1000_ring *tx_ring = adapter->tx_ring;
2055 int err = -ENOMEM, size;
2056
2057 size = sizeof(struct e1000_buffer) * tx_ring->count;
89bf67f1 2058 tx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2059 if (!tx_ring->buffer_info)
2060 goto err;
bc7f75fa
AK		 2061
2062 /* round up to nearest 4K */
2063 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2064 tx_ring->size = ALIGN(tx_ring->size, 4096);
2065
2066 err = e1000_alloc_ring_dma(adapter, tx_ring);
2067 if (err)
2068 goto err;
2069
2070 tx_ring->next_to_use = 0;
2071 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2072
2073 return 0;
2074err:
2075 vfree(tx_ring->buffer_info);
44defeb3 2076 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2077 return err;
2078}
2079
2080/**
2081 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2082 * @adapter: board private structure
2083 *
2084 * Returns 0 on success, negative on failure
2085 **/
2086int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2087{
2088 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 2089 struct e1000_buffer *buffer_info;
2090 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2091
2092 size = sizeof(struct e1000_buffer) * rx_ring->count;
89bf67f1 2093 rx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2094 if (!rx_ring->buffer_info)
2095 goto err;
bc7f75fa 2096
47f44e40
AK		 2097 for (i = 0; i < rx_ring->count; i++) {
2098 buffer_info = &rx_ring->buffer_info[i];
2099 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2100 sizeof(struct e1000_ps_page),
2101 GFP_KERNEL);
2102 if (!buffer_info->ps_pages)
2103 goto err_pages;
2104 }
bc7f75fa
AK		 2105
2106 desc_len = sizeof(union e1000_rx_desc_packet_split);
2107
2108 /* Round up to nearest 4K */
2109 rx_ring->size = rx_ring->count * desc_len;
2110 rx_ring->size = ALIGN(rx_ring->size, 4096);
2111
2112 err = e1000_alloc_ring_dma(adapter, rx_ring);
2113 if (err)
47f44e40 2114 goto err_pages;
bc7f75fa
AK		 2115
2116 rx_ring->next_to_clean = 0;
2117 rx_ring->next_to_use = 0;
2118 rx_ring->rx_skb_top = NULL;
2119
2120 return 0;
47f44e40
AK		 2121
2122err_pages:
2123 for (i = 0; i < rx_ring->count; i++) {
2124 buffer_info = &rx_ring->buffer_info[i];
2125 kfree(buffer_info->ps_pages);
2126 }
bc7f75fa
AK		 2127err:
2128 vfree(rx_ring->buffer_info);
e9262447 2129 e_err("Unable to allocate memory for the receive descriptor ring\n");
bc7f75fa
AK		 2130 return err;
2131}
2132
2133/**
2134 * e1000_clean_tx_ring - Free Tx Buffers
2135 * @adapter: board private structure
2136 **/
2137static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2138{
2139 struct e1000_ring *tx_ring = adapter->tx_ring;
2140 struct e1000_buffer *buffer_info;
2141 unsigned long size;
2142 unsigned int i;
2143
2144 for (i = 0; i < tx_ring->count; i++) {
2145 buffer_info = &tx_ring->buffer_info[i];
2146 e1000_put_txbuf(adapter, buffer_info);
2147 }
2148
2149 size = sizeof(struct e1000_buffer) * tx_ring->count;
2150 memset(tx_ring->buffer_info, 0, size);
2151
2152 memset(tx_ring->desc, 0, tx_ring->size);
2153
2154 tx_ring->next_to_use = 0;
2155 tx_ring->next_to_clean = 0;
2156
2157 writel(0, adapter->hw.hw_addr + tx_ring->head);
2158 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2159}
2160
2161/**
2162 * e1000e_free_tx_resources - Free Tx Resources per Queue
2163 * @adapter: board private structure
2164 *
2165 * Free all transmit software resources
2166 **/
2167void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2168{
2169 struct pci_dev *pdev = adapter->pdev;
2170 struct e1000_ring *tx_ring = adapter->tx_ring;
2171
2172 e1000_clean_tx_ring(adapter);
2173
2174 vfree(tx_ring->buffer_info);
2175 tx_ring->buffer_info = NULL;
2176
2177 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2178 tx_ring->dma);
2179 tx_ring->desc = NULL;
2180}
2181
2182/**
2183 * e1000e_free_rx_resources - Free Rx Resources
2184 * @adapter: board private structure
2185 *
2186 * Free all receive software resources
2187 **/
2188
2189void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2190{
2191 struct pci_dev *pdev = adapter->pdev;
2192 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2193 int i;
bc7f75fa
AK		 2194
2195 e1000_clean_rx_ring(adapter);
2196
b1cdfead 2197 for (i = 0; i < rx_ring->count; i++)
47f44e40 2198 kfree(rx_ring->buffer_info[i].ps_pages);
47f44e40 2199
bc7f75fa
AK		 2200 vfree(rx_ring->buffer_info);
2201 rx_ring->buffer_info = NULL;
2202
bc7f75fa
AK		 2203 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2204 rx_ring->dma);
2205 rx_ring->desc = NULL;
2206}
2207
2208/**
2209 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2210 * @adapter: pointer to adapter
2211 * @itr_setting: current adapter->itr
2212 * @packets: the number of packets during this measurement interval
2213 * @bytes: the number of bytes during this measurement interval
2214 *
bc7f75fa
AK		 2215 * Stores a new ITR value based on packets and byte
2216 * counts during the last interrupt. The advantage of per interrupt
2217 * computation is faster updates and more accurate ITR for the current
2218 * traffic pattern. Constants in this function were computed
2219 * based on theoretical maximum wire speed and thresholds were set based
2220 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2221 * while increasing bulk throughput. This functionality is controlled
2222 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2223 **/
2224static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2225 u16 itr_setting, int packets,
2226 int bytes)
2227{
2228 unsigned int retval = itr_setting;
2229
2230 if (packets == 0)
2231 goto update_itr_done;
2232
2233 switch (itr_setting) {
2234 case lowest_latency:
2235 /* handle TSO and jumbo frames */
2236 if (bytes/packets > 8000)
2237 retval = bulk_latency;
b1cdfead 2238 else if ((packets < 5) && (bytes > 512))
bc7f75fa 2239 retval = low_latency;
bc7f75fa
AK		 2240 break;
2241 case low_latency: /* 50 usec aka 20000 ints/s */
2242 if (bytes > 10000) {
2243 /* this if handles the TSO accounting */
b1cdfead 2244 if (bytes/packets > 8000)
bc7f75fa 2245 retval = bulk_latency;
b1cdfead 2246 else if ((packets < 10) || ((bytes/packets) > 1200))
bc7f75fa 2247 retval = bulk_latency;
b1cdfead 2248 else if ((packets > 35))
bc7f75fa 2249 retval = lowest_latency;
bc7f75fa
AK		 2250 } else if (bytes/packets > 2000) {
2251 retval = bulk_latency;
2252 } else if (packets <= 2 && bytes < 512) {
2253 retval = lowest_latency;
2254 }
2255 break;
2256 case bulk_latency: /* 250 usec aka 4000 ints/s */
2257 if (bytes > 25000) {
b1cdfead 2258 if (packets > 35)
bc7f75fa 2259 retval = low_latency;
bc7f75fa
AK		 2260 } else if (bytes < 6000) {
2261 retval = low_latency;
2262 }
2263 break;
2264 }
2265
2266update_itr_done:
2267 return retval;
2268}
2269
2270static void e1000_set_itr(struct e1000_adapter *adapter)
2271{
2272 struct e1000_hw *hw = &adapter->hw;
2273 u16 current_itr;
2274 u32 new_itr = adapter->itr;
2275
2276 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2277 if (adapter->link_speed != SPEED_1000) {
2278 current_itr = 0;
2279 new_itr = 4000;
2280 goto set_itr_now;
2281 }
2282
828bac87
BA		 2283 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2284 new_itr = 0;
2285 goto set_itr_now;
2286 }
2287
bc7f75fa
AK		 2288 adapter->tx_itr = e1000_update_itr(adapter,
2289 adapter->tx_itr,
2290 adapter->total_tx_packets,
2291 adapter->total_tx_bytes);
2292 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2293 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2294 adapter->tx_itr = low_latency;
2295
2296 adapter->rx_itr = e1000_update_itr(adapter,
2297 adapter->rx_itr,
2298 adapter->total_rx_packets,
2299 adapter->total_rx_bytes);
2300 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2301 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2302 adapter->rx_itr = low_latency;
2303
2304 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2305
2306 switch (current_itr) {
2307 /* counts and packets in update_itr are dependent on these numbers */
2308 case lowest_latency:
2309 new_itr = 70000;
2310 break;
2311 case low_latency:
2312 new_itr = 20000; /* aka hwitr = ~200 */
2313 break;
2314 case bulk_latency:
2315 new_itr = 4000;
2316 break;
2317 default:
2318 break;
2319 }
2320
2321set_itr_now:
2322 if (new_itr != adapter->itr) {
ad68076e
BA		 2323 /*
2324 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2325 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2326 * increasing
2327 */
bc7f75fa
AK		 2328 new_itr = new_itr > adapter->itr ?
2329 min(adapter->itr + (new_itr >> 2), new_itr) :
2330 new_itr;
2331 adapter->itr = new_itr;
4662e82b
BA		 2332 adapter->rx_ring->itr_val = new_itr;
2333 if (adapter->msix_entries)
2334 adapter->rx_ring->set_itr = 1;
2335 else
828bac87
BA		 2336 if (new_itr)
2337 ew32(ITR, 1000000000 / (new_itr * 256));
2338 else
2339 ew32(ITR, 0);
bc7f75fa
AK		 2340 }
2341}
2342
4662e82b
BA		 2343/**
2344 * e1000_alloc_queues - Allocate memory for all rings
2345 * @adapter: board private structure to initialize
2346 **/
2347static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2348{
2349 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2350 if (!adapter->tx_ring)
2351 goto err;
2352
2353 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2354 if (!adapter->rx_ring)
2355 goto err;
2356
2357 return 0;
2358err:
2359 e_err("Unable to allocate memory for queues\n");
2360 kfree(adapter->rx_ring);
2361 kfree(adapter->tx_ring);
2362 return -ENOMEM;
2363}
2364
bc7f75fa
AK		 2365/**
2366 * e1000_clean - NAPI Rx polling callback
ad68076e 2367 * @napi: struct associated with this polling callback
489815ce 2368 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2369 **/
2370static int e1000_clean(struct napi_struct *napi, int budget)
2371{
2372 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2373 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2374 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2375 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2376
4cf1653a 2377 adapter = netdev_priv(poll_dev);
bc7f75fa 2378
4662e82b
BA		 2379 if (adapter->msix_entries &&
2380 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2381 goto clean_rx;
2382
92af3e95 2383 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2384
4662e82b 2385clean_rx:
bc7f75fa 2386 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2387
12d04a3c 2388 if (!tx_cleaned)
d2c7ddd6 2389 work_done = budget;
bc7f75fa 2390
53e52c72
DM		 2391 /* If budget not fully consumed, exit the polling mode */
2392 if (work_done < budget) {
bc7f75fa
AK		 2393 if (adapter->itr_setting & 3)
2394 e1000_set_itr(adapter);
288379f0 2395 napi_complete(napi);
a3c69fef
JB		 2396 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2397 if (adapter->msix_entries)
2398 ew32(IMS, adapter->rx_ring->ims_val);
2399 else
2400 e1000_irq_enable(adapter);
2401 }
bc7f75fa
AK		 2402 }
2403
2404 return work_done;
2405}
2406
2407static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2408{
2409 struct e1000_adapter *adapter = netdev_priv(netdev);
2410 struct e1000_hw *hw = &adapter->hw;
2411 u32 vfta, index;
2412
2413 /* don't update vlan cookie if already programmed */
2414 if ((adapter->hw.mng_cookie.status &
2415 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2416 (vid == adapter->mng_vlan_id))
2417 return;
caaddaf8 2418
bc7f75fa 2419 /* add VID to filter table */
caaddaf8
BA		 2420 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2421 index = (vid >> 5) & 0x7F;
2422 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2423 vfta |= (1 << (vid & 0x1F));
2424 hw->mac.ops.write_vfta(hw, index, vfta);
2425 }
bc7f75fa
AK		 2426}
2427
2428static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2429{
2430 struct e1000_adapter *adapter = netdev_priv(netdev);
2431 struct e1000_hw *hw = &adapter->hw;
2432 u32 vfta, index;
2433
74ef9c39
JB		 2434 if (!test_bit(__E1000_DOWN, &adapter->state))
2435 e1000_irq_disable(adapter);
bc7f75fa 2436 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2437
2438 if (!test_bit(__E1000_DOWN, &adapter->state))
2439 e1000_irq_enable(adapter);
bc7f75fa
AK		 2440
2441 if ((adapter->hw.mng_cookie.status &
2442 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2443 (vid == adapter->mng_vlan_id)) {
2444 /* release control to f/w */
31dbe5b4 2445 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 2446 return;
2447 }
2448
2449 /* remove VID from filter table */
caaddaf8
BA		 2450 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2451 index = (vid >> 5) & 0x7F;
2452 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2453 vfta &= ~(1 << (vid & 0x1F));
2454 hw->mac.ops.write_vfta(hw, index, vfta);
2455 }
bc7f75fa
AK		 2456}
2457
2458static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2459{
2460 struct net_device *netdev = adapter->netdev;
2461 u16 vid = adapter->hw.mng_cookie.vlan_id;
2462 u16 old_vid = adapter->mng_vlan_id;
2463
2464 if (!adapter->vlgrp)
2465 return;
2466
2467 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2468 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2469 if (adapter->hw.mng_cookie.status &
2470 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2471 e1000_vlan_rx_add_vid(netdev, vid);
2472 adapter->mng_vlan_id = vid;
2473 }
2474
2475 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2476 (vid != old_vid) &&
2477 !vlan_group_get_device(adapter->vlgrp, old_vid))
2478 e1000_vlan_rx_kill_vid(netdev, old_vid);
2479 } else {
2480 adapter->mng_vlan_id = vid;
2481 }
2482}
2483
2484
2485static void e1000_vlan_rx_register(struct net_device *netdev,
2486 struct vlan_group *grp)
2487{
2488 struct e1000_adapter *adapter = netdev_priv(netdev);
2489 struct e1000_hw *hw = &adapter->hw;
2490 u32 ctrl, rctl;
2491
74ef9c39
JB		 2492 if (!test_bit(__E1000_DOWN, &adapter->state))
2493 e1000_irq_disable(adapter);
bc7f75fa
AK		 2494 adapter->vlgrp = grp;
2495
2496 if (grp) {
2497 /* enable VLAN tag insert/strip */
2498 ctrl = er32(CTRL);
2499 ctrl |= E1000_CTRL_VME;
2500 ew32(CTRL, ctrl);
2501
2502 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2503 /* enable VLAN receive filtering */
2504 rctl = er32(RCTL);
bc7f75fa
AK		 2505 rctl &= ~E1000_RCTL_CFIEN;
2506 ew32(RCTL, rctl);
2507 e1000_update_mng_vlan(adapter);
2508 }
2509 } else {
2510 /* disable VLAN tag insert/strip */
2511 ctrl = er32(CTRL);
2512 ctrl &= ~E1000_CTRL_VME;
2513 ew32(CTRL, ctrl);
2514
2515 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2516 if (adapter->mng_vlan_id !=
2517 (u16)E1000_MNG_VLAN_NONE) {
2518 e1000_vlan_rx_kill_vid(netdev,
2519 adapter->mng_vlan_id);
2520 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2521 }
2522 }
2523 }
2524
74ef9c39
JB		 2525 if (!test_bit(__E1000_DOWN, &adapter->state))
2526 e1000_irq_enable(adapter);
bc7f75fa
AK		 2527}
2528
2529static void e1000_restore_vlan(struct e1000_adapter *adapter)
2530{
2531 u16 vid;
2532
2533 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2534
2535 if (!adapter->vlgrp)
2536 return;
2537
b738127d 2538 for (vid = 0; vid < VLAN_N_VID; vid++) {
bc7f75fa
AK		 2539 if (!vlan_group_get_device(adapter->vlgrp, vid))
2540 continue;
2541 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2542 }
2543}
2544
cd791618 2545static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK		 2546{
2547 struct e1000_hw *hw = &adapter->hw;
cd791618 2548 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK		 2549
2550 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2551 return;
2552
2553 manc = er32(MANC);
2554
ad68076e
BA		 2555 /*
2556 * enable receiving management packets to the host. this will probably
bc7f75fa 2557 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2558 * the packets will be handled on SMBUS
2559 */
bc7f75fa
AK		 2560 manc |= E1000_MANC_EN_MNG2HOST;
2561 manc2h = er32(MANC2H);
cd791618
BA		 2562
2563 switch (hw->mac.type) {
2564 default:
2565 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2566 break;
2567 case e1000_82574:
2568 case e1000_82583:
2569 /*
2570 * Check if IPMI pass-through decision filter already exists;
2571 * if so, enable it.
2572 */
2573 for (i = 0, j = 0; i < 8; i++) {
2574 mdef = er32(MDEF(i));
2575
2576 /* Ignore filters with anything other than IPMI ports */
3b21b508 2577 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
cd791618
BA		 2578 continue;
2579
2580 /* Enable this decision filter in MANC2H */
2581 if (mdef)
2582 manc2h |= (1 << i);
2583
2584 j |= mdef;
2585 }
2586
2587 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2588 break;
2589
2590 /* Create new decision filter in an empty filter */
2591 for (i = 0, j = 0; i < 8; i++)
2592 if (er32(MDEF(i)) == 0) {
2593 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2594 E1000_MDEF_PORT_664));
2595 manc2h |= (1 << 1);
2596 j++;
2597 break;
2598 }
2599
2600 if (!j)
2601 e_warn("Unable to create IPMI pass-through filter\n");
2602 break;
2603 }
2604
bc7f75fa
AK		 2605 ew32(MANC2H, manc2h);
2606 ew32(MANC, manc);
2607}
2608
2609/**
af667a29 2610 * e1000_configure_tx - Configure Transmit Unit after Reset
bc7f75fa
AK		 2611 * @adapter: board private structure
2612 *
2613 * Configure the Tx unit of the MAC after a reset.
2614 **/
2615static void e1000_configure_tx(struct e1000_adapter *adapter)
2616{
2617 struct e1000_hw *hw = &adapter->hw;
2618 struct e1000_ring *tx_ring = adapter->tx_ring;
2619 u64 tdba;
2620 u32 tdlen, tctl, tipg, tarc;
2621 u32 ipgr1, ipgr2;
2622
2623 /* Setup the HW Tx Head and Tail descriptor pointers */
2624 tdba = tx_ring->dma;
2625 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2626 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2627 ew32(TDBAH, (tdba >> 32));
2628 ew32(TDLEN, tdlen);
2629 ew32(TDH, 0);
2630 ew32(TDT, 0);
2631 tx_ring->head = E1000_TDH;
2632 tx_ring->tail = E1000_TDT;
2633
2634 /* Set the default values for the Tx Inter Packet Gap timer */
2635 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2636 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2637 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2638
2639 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2640 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2641
2642 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2643 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2644 ew32(TIPG, tipg);
2645
2646 /* Set the Tx Interrupt Delay register */
2647 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2648 /* Tx irq moderation */
bc7f75fa
AK		 2649 ew32(TADV, adapter->tx_abs_int_delay);
2650
3a3b7586
JB		 2651 if (adapter->flags2 & FLAG2_DMA_BURST) {
2652 u32 txdctl = er32(TXDCTL(0));
2653 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2654 E1000_TXDCTL_WTHRESH);
2655 /*
2656 * set up some performance related parameters to encourage the
2657 * hardware to use the bus more efficiently in bursts, depends
2658 * on the tx_int_delay to be enabled,
2659 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time
2660 * hthresh = 1 ==> prefetch when one or more available
2661 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2662 * BEWARE: this seems to work but should be considered first if
af667a29 2663 * there are Tx hangs or other Tx related bugs
3a3b7586
JB		 2664 */
2665 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2666 ew32(TXDCTL(0), txdctl);
2667 /* erratum work around: set txdctl the same for both queues */
2668 ew32(TXDCTL(1), txdctl);
2669 }
2670
bc7f75fa
AK		 2671 /* Program the Transmit Control Register */
2672 tctl = er32(TCTL);
2673 tctl &= ~E1000_TCTL_CT;
2674 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2675 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2676
2677 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2678 tarc = er32(TARC(0));
ad68076e
BA		 2679 /*
2680 * set the speed mode bit, we'll clear it if we're not at
2681 * gigabit link later
2682 */
bc7f75fa
AK		 2683#define SPEED_MODE_BIT (1 << 21)
2684 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2685 ew32(TARC(0), tarc);
bc7f75fa
AK		 2686 }
2687
2688 /* errata: program both queues to unweighted RR */
2689 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2690 tarc = er32(TARC(0));
bc7f75fa 2691 tarc |= 1;
e9ec2c0f
JK		 2692 ew32(TARC(0), tarc);
2693 tarc = er32(TARC(1));
bc7f75fa 2694 tarc |= 1;
e9ec2c0f 2695 ew32(TARC(1), tarc);
bc7f75fa
AK		 2696 }
2697
bc7f75fa
AK		 2698 /* Setup Transmit Descriptor Settings for eop descriptor */
2699 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2700
2701 /* only set IDE if we are delaying interrupts using the timers */
2702 if (adapter->tx_int_delay)
2703 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2704
2705 /* enable Report Status bit */
2706 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2707
2708 ew32(TCTL, tctl);
2709
edfea6e6 2710 e1000e_config_collision_dist(hw);
bc7f75fa
AK		 2711}
2712
2713/**
2714 * e1000_setup_rctl - configure the receive control registers
2715 * @adapter: Board private structure
2716 **/
2717#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2718 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2719static void e1000_setup_rctl(struct e1000_adapter *adapter)
2720{
2721 struct e1000_hw *hw = &adapter->hw;
2722 u32 rctl, rfctl;
2723 u32 psrctl = 0;
2724 u32 pages = 0;
2725
a1ce6473
BA		 2726 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2727 if (hw->mac.type == e1000_pch2lan) {
2728 s32 ret_val;
2729
2730 if (adapter->netdev->mtu > ETH_DATA_LEN)
2731 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2732 else
2733 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
dd93f95e
BA		 2734
2735 if (ret_val)
2736 e_dbg("failed to enable jumbo frame workaround mode\n");
a1ce6473
BA		 2737 }
2738
bc7f75fa
AK		 2739 /* Program MC offset vector base */
2740 rctl = er32(RCTL);
2741 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2742 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2743 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2744 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2745
2746 /* Do not Store bad packets */
2747 rctl &= ~E1000_RCTL_SBP;
2748
2749 /* Enable Long Packet receive */
2750 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2751 rctl &= ~E1000_RCTL_LPE;
2752 else
2753 rctl |= E1000_RCTL_LPE;
2754
eb7c3adb
JK		 2755 /* Some systems expect that the CRC is included in SMBUS traffic. The
2756 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2757 * host memory when this is enabled
2758 */
2759 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2760 rctl |= E1000_RCTL_SECRC;
5918bd88 2761
a4f58f54
BA		 2762 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2763 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2764 u16 phy_data;
2765
2766 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2767 phy_data &= 0xfff8;
2768 phy_data |= (1 << 2);
2769 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2770
2771 e1e_rphy(hw, 22, &phy_data);
2772 phy_data &= 0x0fff;
2773 phy_data |= (1 << 14);
2774 e1e_wphy(hw, 0x10, 0x2823);
2775 e1e_wphy(hw, 0x11, 0x0003);
2776 e1e_wphy(hw, 22, phy_data);
2777 }
2778
bc7f75fa
AK		 2779 /* Setup buffer sizes */
2780 rctl &= ~E1000_RCTL_SZ_4096;
2781 rctl |= E1000_RCTL_BSEX;
2782 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2783 case 2048:
2784 default:
2785 rctl |= E1000_RCTL_SZ_2048;
2786 rctl &= ~E1000_RCTL_BSEX;
2787 break;
2788 case 4096:
2789 rctl |= E1000_RCTL_SZ_4096;
2790 break;
2791 case 8192:
2792 rctl |= E1000_RCTL_SZ_8192;
2793 break;
2794 case 16384:
2795 rctl |= E1000_RCTL_SZ_16384;
2796 break;
2797 }
2798
2799 /*
2800 * 82571 and greater support packet-split where the protocol
2801 * header is placed in skb->data and the packet data is
2802 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2803 * In the case of a non-split, skb->data is linearly filled,
2804 * followed by the page buffers. Therefore, skb->data is
2805 * sized to hold the largest protocol header.
2806 *
2807 * allocations using alloc_page take too long for regular MTU
2808 * so only enable packet split for jumbo frames
2809 *
2810 * Using pages when the page size is greater than 16k wastes
2811 * a lot of memory, since we allocate 3 pages at all times
2812 * per packet.
2813 */
bc7f75fa 2814 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
dbcb9fec 2815 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
97ac8cae 2816 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2817 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2818 else
2819 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2820
2821 if (adapter->rx_ps_pages) {
2822 /* Configure extra packet-split registers */
2823 rfctl = er32(RFCTL);
2824 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2825 /*
2826 * disable packet split support for IPv6 extension headers,
2827 * because some malformed IPv6 headers can hang the Rx
2828 */
bc7f75fa
AK		 2829 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2830 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2831
2832 ew32(RFCTL, rfctl);
2833
140a7480
AK		 2834 /* Enable Packet split descriptors */
2835 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2836
2837 psrctl |= adapter->rx_ps_bsize0 >>
2838 E1000_PSRCTL_BSIZE0_SHIFT;
2839
2840 switch (adapter->rx_ps_pages) {
2841 case 3:
2842 psrctl |= PAGE_SIZE <<
2843 E1000_PSRCTL_BSIZE3_SHIFT;
2844 case 2:
2845 psrctl |= PAGE_SIZE <<
2846 E1000_PSRCTL_BSIZE2_SHIFT;
2847 case 1:
2848 psrctl |= PAGE_SIZE >>
2849 E1000_PSRCTL_BSIZE1_SHIFT;
2850 break;
2851 }
2852
2853 ew32(PSRCTL, psrctl);
2854 }
2855
2856 ew32(RCTL, rctl);
318a94d6
JK		 2857 /* just started the receive unit, no need to restart */
2858 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2859}
2860
2861/**
2862 * e1000_configure_rx - Configure Receive Unit after Reset
2863 * @adapter: board private structure
2864 *
2865 * Configure the Rx unit of the MAC after a reset.
2866 **/
2867static void e1000_configure_rx(struct e1000_adapter *adapter)
2868{
2869 struct e1000_hw *hw = &adapter->hw;
2870 struct e1000_ring *rx_ring = adapter->rx_ring;
2871 u64 rdba;
2872 u32 rdlen, rctl, rxcsum, ctrl_ext;
2873
2874 if (adapter->rx_ps_pages) {
2875 /* this is a 32 byte descriptor */
2876 rdlen = rx_ring->count *
af667a29 2877 sizeof(union e1000_rx_desc_packet_split);
bc7f75fa
AK		 2878 adapter->clean_rx = e1000_clean_rx_irq_ps;
2879 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2880 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2881 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2882 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2883 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2884 } else {
97ac8cae 2885 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2886 adapter->clean_rx = e1000_clean_rx_irq;
2887 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2888 }
2889
2890 /* disable receives while setting up the descriptors */
2891 rctl = er32(RCTL);
2892 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2893 e1e_flush();
2894 msleep(10);
2895
3a3b7586
JB		 2896 if (adapter->flags2 & FLAG2_DMA_BURST) {
2897 /*
2898 * set the writeback threshold (only takes effect if the RDTR
2899 * is set). set GRAN=1 and write back up to 0x4 worth, and
af667a29 2900 * enable prefetching of 0x20 Rx descriptors
3a3b7586
JB		 2901 * granularity = 01
2902 * wthresh = 04,
2903 * hthresh = 04,
2904 * pthresh = 0x20
2905 */
2906 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
2907 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
2908
2909 /*
2910 * override the delay timers for enabling bursting, only if
2911 * the value was not set by the user via module options
2912 */
2913 if (adapter->rx_int_delay == DEFAULT_RDTR)
2914 adapter->rx_int_delay = BURST_RDTR;
2915 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
2916 adapter->rx_abs_int_delay = BURST_RADV;
2917 }
2918
bc7f75fa
AK		 2919 /* set the Receive Delay Timer Register */
2920 ew32(RDTR, adapter->rx_int_delay);
2921
2922 /* irq moderation */
2923 ew32(RADV, adapter->rx_abs_int_delay);
828bac87 2924 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
ad68076e 2925 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2926
2927 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2928 /* Auto-Mask interrupts upon ICR access */
2929 ctrl_ext |= E1000_CTRL_EXT_IAME;
2930 ew32(IAM, 0xffffffff);
2931 ew32(CTRL_EXT, ctrl_ext);
2932 e1e_flush();
2933
ad68076e
BA		 2934 /*
2935 * Setup the HW Rx Head and Tail Descriptor Pointers and
2936 * the Base and Length of the Rx Descriptor Ring
2937 */
bc7f75fa 2938 rdba = rx_ring->dma;
284901a9 2939 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2940 ew32(RDBAH, (rdba >> 32));
2941 ew32(RDLEN, rdlen);
2942 ew32(RDH, 0);
2943 ew32(RDT, 0);
2944 rx_ring->head = E1000_RDH;
2945 rx_ring->tail = E1000_RDT;
2946
2947 /* Enable Receive Checksum Offload for TCP and UDP */
2948 rxcsum = er32(RXCSUM);
2949 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2950 rxcsum |= E1000_RXCSUM_TUOFL;
2951
ad68076e
BA		 2952 /*
2953 * IPv4 payload checksum for UDP fragments must be
2954 * used in conjunction with packet-split.
2955 */
bc7f75fa
AK		 2956 if (adapter->rx_ps_pages)
2957 rxcsum |= E1000_RXCSUM_IPPCSE;
2958 } else {
2959 rxcsum &= ~E1000_RXCSUM_TUOFL;
2960 /* no need to clear IPPCSE as it defaults to 0 */
2961 }
2962 ew32(RXCSUM, rxcsum);
2963
ad68076e
BA		 2964 /*
2965 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2966 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2967 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2968 */
828bac87
BA		 2969 if ((adapter->flags & FLAG_HAS_ERT) ||
2970 (adapter->hw.mac.type == e1000_pch2lan)) {
53ec5498
BA		 2971 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2972 u32 rxdctl = er32(RXDCTL(0));
2973 ew32(RXDCTL(0), rxdctl | 0x3);
828bac87
BA		 2974 if (adapter->flags & FLAG_HAS_ERT)
2975 ew32(ERT, E1000_ERT_2048 | (1 << 13));
53ec5498
BA		 2976 /*
2977 * With jumbo frames and early-receive enabled,
2978 * excessive C-state transition latencies result in
2979 * dropped transactions.
2980 */
af667a29 2981 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55);
53ec5498 2982 } else {
af667a29
BA		 2983 pm_qos_update_request(&adapter->netdev->pm_qos_req,
2984 PM_QOS_DEFAULT_VALUE);
53ec5498 2985 }
97ac8cae 2986 }
bc7f75fa
AK		 2987
2988 /* Enable Receives */
2989 ew32(RCTL, rctl);
2990}
2991
2992/**
e2de3eb6 2993 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2994 * @hw: pointer to the HW structure
2995 * @mc_addr_list: array of multicast addresses to program
2996 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2997 *
ab8932f3 2998 * Updates the Multicast Table Array.
bc7f75fa 2999 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 3000 **/
e2de3eb6 3001static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 3002 u32 mc_addr_count)
bc7f75fa 3003{
ab8932f3 3004 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 3005}
3006
3007/**
3008 * e1000_set_multi - Multicast and Promiscuous mode set
3009 * @netdev: network interface device structure
3010 *
3011 * The set_multi entry point is called whenever the multicast address
3012 * list or the network interface flags are updated. This routine is
3013 * responsible for configuring the hardware for proper multicast,
3014 * promiscuous mode, and all-multi behavior.
3015 **/
3016static void e1000_set_multi(struct net_device *netdev)
3017{
3018 struct e1000_adapter *adapter = netdev_priv(netdev);
3019 struct e1000_hw *hw = &adapter->hw;
22bedad3 3020 struct netdev_hw_addr *ha;
bc7f75fa
AK		 3021 u8 *mta_list;
3022 u32 rctl;
3023 int i;
3024
3025 /* Check for Promiscuous and All Multicast modes */
3026
3027 rctl = er32(RCTL);
3028
3029 if (netdev->flags & IFF_PROMISC) {
3030 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 3031 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 3032 } else {
746b9f02
PM		 3033 if (netdev->flags & IFF_ALLMULTI) {
3034 rctl |= E1000_RCTL_MPE;
3035 rctl &= ~E1000_RCTL_UPE;
3036 } else {
3037 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3038 }
78ed11a5 3039 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 3040 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 3041 }
3042
3043 ew32(RCTL, rctl);
3044
7aeef972
JP		 3045 if (!netdev_mc_empty(netdev)) {
3046 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 3047 if (!mta_list)
3048 return;
3049
3050 /* prepare a packed array of only addresses. */
7aeef972 3051 i = 0;
22bedad3
JP		 3052 netdev_for_each_mc_addr(ha, netdev)
3053 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 3054
ab8932f3 3055 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 3056 kfree(mta_list);
3057 } else {
3058 /*
3059 * if we're called from probe, we might not have
3060 * anything to do here, so clear out the list
3061 */
ab8932f3 3062 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 3063 }
3064}
3065
3066/**
ad68076e 3067 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 3068 * @adapter: private board structure
3069 **/
3070static void e1000_configure(struct e1000_adapter *adapter)
3071{
3072 e1000_set_multi(adapter->netdev);
3073
3074 e1000_restore_vlan(adapter);
cd791618 3075 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 3076
3077 e1000_configure_tx(adapter);
3078 e1000_setup_rctl(adapter);
3079 e1000_configure_rx(adapter);
ad68076e 3080 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 3081}
3082
3083/**
3084 * e1000e_power_up_phy - restore link in case the phy was powered down
3085 * @adapter: address of board private structure
3086 *
3087 * The phy may be powered down to save power and turn off link when the
3088 * driver is unloaded and wake on lan is not enabled (among others)
3089 * *** this routine MUST be followed by a call to e1000e_reset ***
3090 **/
3091void e1000e_power_up_phy(struct e1000_adapter *adapter)
3092{
17f208de
BA		 3093 if (adapter->hw.phy.ops.power_up)
3094 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 3095
3096 adapter->hw.mac.ops.setup_link(&adapter->hw);
3097}
3098
3099/**
3100 * e1000_power_down_phy - Power down the PHY
3101 *
17f208de
BA		 3102 * Power down the PHY so no link is implied when interface is down.
3103 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 3104 */
3105static void e1000_power_down_phy(struct e1000_adapter *adapter)
3106{
bc7f75fa 3107 /* WoL is enabled */
23b66e2b 3108 if (adapter->wol)
bc7f75fa
AK		 3109 return;
3110
17f208de
BA		 3111 if (adapter->hw.phy.ops.power_down)
3112 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3113}
3114
3115/**
3116 * e1000e_reset - bring the hardware into a known good state
3117 *
3118 * This function boots the hardware and enables some settings that
3119 * require a configuration cycle of the hardware - those cannot be
3120 * set/changed during runtime. After reset the device needs to be
ad68076e 3121 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3122 */
3123void e1000e_reset(struct e1000_adapter *adapter)
3124{
3125 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3126 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3127 struct e1000_hw *hw = &adapter->hw;
3128 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3129 u32 pba = adapter->pba;
bc7f75fa
AK		 3130 u16 hwm;
3131
ad68076e 3132 /* reset Packet Buffer Allocation to default */
318a94d6 3133 ew32(PBA, pba);
df762464 3134
318a94d6 3135 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3136 /*
3137 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3138 * large enough to accommodate two full transmit packets,
3139 * rounded up to the next 1KB and expressed in KB. Likewise,
3140 * the Rx FIFO should be large enough to accommodate at least
3141 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3142 * expressed in KB.
3143 */
df762464 3144 pba = er32(PBA);
bc7f75fa 3145 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3146 tx_space = pba >> 16;
bc7f75fa 3147 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3148 pba &= 0xffff;
ad68076e 3149 /*
af667a29 3150 * the Tx fifo also stores 16 bytes of information about the Tx
ad68076e 3151 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3152 */
3153 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3154 sizeof(struct e1000_tx_desc) -
3155 ETH_FCS_LEN) * 2;
3156 min_tx_space = ALIGN(min_tx_space, 1024);
3157 min_tx_space >>= 10;
3158 /* software strips receive CRC, so leave room for it */
318a94d6 3159 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3160 min_rx_space = ALIGN(min_rx_space, 1024);
3161 min_rx_space >>= 10;
3162
ad68076e
BA		 3163 /*
3164 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3165 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3166 * allocation, take space away from current Rx allocation
3167 */
df762464
AK		 3168 if ((tx_space < min_tx_space) &&
3169 ((min_tx_space - tx_space) < pba)) {
3170 pba -= min_tx_space - tx_space;
bc7f75fa 3171
ad68076e 3172 /*
af667a29 3173 * if short on Rx space, Rx wins and must trump Tx
ad68076e
BA		 3174 * adjustment or use Early Receive if available
3175 */
df762464 3176 if ((pba < min_rx_space) &&
bc7f75fa
AK		 3177 (!(adapter->flags & FLAG_HAS_ERT)))
3178 /* ERT enabled in e1000_configure_rx */
df762464 3179 pba = min_rx_space;
bc7f75fa 3180 }
df762464
AK		 3181
3182 ew32(PBA, pba);
bc7f75fa
AK		 3183 }
3184
ad68076e
BA		 3185 /*
3186 * flow control settings
3187 *
38eb394e 3188 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3189 * (or the size used for early receive) above it in the Rx FIFO.
3190 * Set it to the lower of:
3191 * - 90% of the Rx FIFO size, and
3192 * - the full Rx FIFO size minus the early receive size (for parts
3193 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3194 * - the full Rx FIFO size minus one full frame
ad68076e 3195 */
d3738bb8
BA		 3196 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3197 fc->pause_time = 0xFFFF;
3198 else
3199 fc->pause_time = E1000_FC_PAUSE_TIME;
3200 fc->send_xon = 1;
3201 fc->current_mode = fc->requested_mode;
3202
3203 switch (hw->mac.type) {
3204 default:
3205 if ((adapter->flags & FLAG_HAS_ERT) &&
3206 (adapter->netdev->mtu > ETH_DATA_LEN))
3207 hwm = min(((pba << 10) * 9 / 10),
3208 ((pba << 10) - (E1000_ERT_2048 << 3)));
3209 else
3210 hwm = min(((pba << 10) * 9 / 10),
3211 ((pba << 10) - adapter->max_frame_size));
3212
3213 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3214 fc->low_water = fc->high_water - 8;
3215 break;
3216 case e1000_pchlan:
38eb394e
BA		 3217 /*
3218 * Workaround PCH LOM adapter hangs with certain network
3219 * loads. If hangs persist, try disabling Tx flow control.
3220 */
3221 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3222 fc->high_water = 0x3500;
3223 fc->low_water = 0x1500;
3224 } else {
3225 fc->high_water = 0x5000;
3226 fc->low_water = 0x3000;
3227 }
a305595b 3228 fc->refresh_time = 0x1000;
d3738bb8
BA		 3229 break;
3230 case e1000_pch2lan:
3231 fc->high_water = 0x05C20;
3232 fc->low_water = 0x05048;
3233 fc->pause_time = 0x0650;
3234 fc->refresh_time = 0x0400;
828bac87
BA		 3235 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3236 pba = 14;
3237 ew32(PBA, pba);
3238 }
d3738bb8 3239 break;
38eb394e 3240 }
bc7f75fa 3241
828bac87
BA		 3242 /*
3243 * Disable Adaptive Interrupt Moderation if 2 full packets cannot
3244 * fit in receive buffer and early-receive not supported.
3245 */
3246 if (adapter->itr_setting & 0x3) {
3247 if (((adapter->max_frame_size * 2) > (pba << 10)) &&
3248 !(adapter->flags & FLAG_HAS_ERT)) {
3249 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3250 dev_info(&adapter->pdev->dev,
3251 "Interrupt Throttle Rate turned off\n");
3252 adapter->flags2 |= FLAG2_DISABLE_AIM;
3253 ew32(ITR, 0);
3254 }
3255 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3256 dev_info(&adapter->pdev->dev,
3257 "Interrupt Throttle Rate turned on\n");
3258 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3259 adapter->itr = 20000;
3260 ew32(ITR, 1000000000 / (adapter->itr * 256));
3261 }
3262 }
3263
bc7f75fa
AK		 3264 /* Allow time for pending master requests to run */
3265 mac->ops.reset_hw(hw);
97ac8cae
BA		 3266
3267 /*
3268 * For parts with AMT enabled, let the firmware know
3269 * that the network interface is in control
3270 */
c43bc57e 3271 if (adapter->flags & FLAG_HAS_AMT)
31dbe5b4 3272 e1000e_get_hw_control(adapter);
97ac8cae 3273
bc7f75fa
AK		 3274 ew32(WUC, 0);
3275
3276 if (mac->ops.init_hw(hw))
44defeb3 3277 e_err("Hardware Error\n");
bc7f75fa
AK		 3278
3279 e1000_update_mng_vlan(adapter);
3280
3281 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3282 ew32(VET, ETH_P_8021Q);
3283
3284 e1000e_reset_adaptive(hw);
31dbe5b4
BA		 3285
3286 if (!netif_running(adapter->netdev) &&
3287 !test_bit(__E1000_TESTING, &adapter->state)) {
3288 e1000_power_down_phy(adapter);
3289 return;
3290 }
3291
bc7f75fa
AK		 3292 e1000_get_phy_info(hw);
3293
918d7197
BA		 3294 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3295 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3296 u16 phy_data = 0;
ad68076e
BA		 3297 /*
3298 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3299 * the return value of this function because there is nothing
ad68076e
BA		 3300 * different we would do if it failed
3301 */
bc7f75fa
AK		 3302 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3303 phy_data &= ~IGP02E1000_PM_SPD;
3304 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3305 }
bc7f75fa
AK		 3306}
3307
3308int e1000e_up(struct e1000_adapter *adapter)
3309{
3310 struct e1000_hw *hw = &adapter->hw;
3311
3312 /* hardware has been reset, we need to reload some things */
3313 e1000_configure(adapter);
3314
3315 clear_bit(__E1000_DOWN, &adapter->state);
3316
3317 napi_enable(&adapter->napi);
4662e82b
BA		 3318 if (adapter->msix_entries)
3319 e1000_configure_msix(adapter);
bc7f75fa
AK		 3320 e1000_irq_enable(adapter);
3321
4cb9be7a
JB		 3322 netif_wake_queue(adapter->netdev);
3323
bc7f75fa 3324 /* fire a link change interrupt to start the watchdog */
52a9b231
BA		 3325 if (adapter->msix_entries)
3326 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3327 else
3328 ew32(ICS, E1000_ICS_LSC);
3329
bc7f75fa
AK		 3330 return 0;
3331}
3332
67fd4fcb
JK		 3333static void e1000e_update_stats(struct e1000_adapter *adapter);
3334
bc7f75fa
AK		 3335void e1000e_down(struct e1000_adapter *adapter)
3336{
3337 struct net_device *netdev = adapter->netdev;
3338 struct e1000_hw *hw = &adapter->hw;
3339 u32 tctl, rctl;
3340
ad68076e
BA		 3341 /*
3342 * signal that we're down so the interrupt handler does not
3343 * reschedule our watchdog timer
3344 */
bc7f75fa
AK		 3345 set_bit(__E1000_DOWN, &adapter->state);
3346
3347 /* disable receives in the hardware */
3348 rctl = er32(RCTL);
3349 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3350 /* flush and sleep below */
3351
4cb9be7a 3352 netif_stop_queue(netdev);
bc7f75fa
AK		 3353
3354 /* disable transmits in the hardware */
3355 tctl = er32(TCTL);
3356 tctl &= ~E1000_TCTL_EN;
3357 ew32(TCTL, tctl);
3358 /* flush both disables and wait for them to finish */
3359 e1e_flush();
3360 msleep(10);
3361
3362 napi_disable(&adapter->napi);
3363 e1000_irq_disable(adapter);
3364
3365 del_timer_sync(&adapter->watchdog_timer);
3366 del_timer_sync(&adapter->phy_info_timer);
3367
bc7f75fa 3368 netif_carrier_off(netdev);
67fd4fcb
JK		 3369
3370 spin_lock(&adapter->stats64_lock);
3371 e1000e_update_stats(adapter);
3372 spin_unlock(&adapter->stats64_lock);
3373
bc7f75fa
AK		 3374 adapter->link_speed = 0;
3375 adapter->link_duplex = 0;
3376
52cc3086
JK		 3377 if (!pci_channel_offline(adapter->pdev))
3378 e1000e_reset(adapter);
bc7f75fa
AK		 3379 e1000_clean_tx_ring(adapter);
3380 e1000_clean_rx_ring(adapter);
3381
3382 /*
3383 * TODO: for power management, we could drop the link and
3384 * pci_disable_device here.
3385 */
3386}
3387
3388void e1000e_reinit_locked(struct e1000_adapter *adapter)
3389{
3390 might_sleep();
3391 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3392 msleep(1);
3393 e1000e_down(adapter);
3394 e1000e_up(adapter);
3395 clear_bit(__E1000_RESETTING, &adapter->state);
3396}
3397
3398/**
3399 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3400 * @adapter: board private structure to initialize
3401 *
3402 * e1000_sw_init initializes the Adapter private data structure.
3403 * Fields are initialized based on PCI device information and
3404 * OS network device settings (MTU size).
3405 **/
3406static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3407{
bc7f75fa
AK		 3408 struct net_device *netdev = adapter->netdev;
3409
3410 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3411 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3412 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3413 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3414
67fd4fcb
JK		 3415 spin_lock_init(&adapter->stats64_lock);
3416
4662e82b 3417 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3418
4662e82b
BA		 3419 if (e1000_alloc_queues(adapter))
3420 return -ENOMEM;
bc7f75fa 3421
bc7f75fa 3422 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3423 e1000_irq_disable(adapter);
3424
bc7f75fa
AK		 3425 set_bit(__E1000_DOWN, &adapter->state);
3426 return 0;
bc7f75fa
AK		 3427}
3428
f8d59f78
BA		 3429/**
3430 * e1000_intr_msi_test - Interrupt Handler
3431 * @irq: interrupt number
3432 * @data: pointer to a network interface device structure
3433 **/
3434static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3435{
3436 struct net_device *netdev = data;
3437 struct e1000_adapter *adapter = netdev_priv(netdev);
3438 struct e1000_hw *hw = &adapter->hw;
3439 u32 icr = er32(ICR);
3440
3bb99fe2 3441 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3442 if (icr & E1000_ICR_RXSEQ) {
3443 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3444 wmb();
3445 }
3446
3447 return IRQ_HANDLED;
3448}
3449
3450/**
3451 * e1000_test_msi_interrupt - Returns 0 for successful test
3452 * @adapter: board private struct
3453 *
3454 * code flow taken from tg3.c
3455 **/
3456static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3457{
3458 struct net_device *netdev = adapter->netdev;
3459 struct e1000_hw *hw = &adapter->hw;
3460 int err;
3461
3462 /* poll_enable hasn't been called yet, so don't need disable */
3463 /* clear any pending events */
3464 er32(ICR);
3465
3466 /* free the real vector and request a test handler */
3467 e1000_free_irq(adapter);
4662e82b 3468 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3469
3470 /* Assume that the test fails, if it succeeds then the test
3471 * MSI irq handler will unset this flag */
3472 adapter->flags |= FLAG_MSI_TEST_FAILED;
3473
3474 err = pci_enable_msi(adapter->pdev);
3475 if (err)
3476 goto msi_test_failed;
3477
a0607fd3 3478 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3479 netdev->name, netdev);
3480 if (err) {
3481 pci_disable_msi(adapter->pdev);
3482 goto msi_test_failed;
3483 }
3484
3485 wmb();
3486
3487 e1000_irq_enable(adapter);
3488
3489 /* fire an unusual interrupt on the test handler */
3490 ew32(ICS, E1000_ICS_RXSEQ);
3491 e1e_flush();
3492 msleep(50);
3493
3494 e1000_irq_disable(adapter);
3495
3496 rmb();
3497
3498 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3499 adapter->int_mode = E1000E_INT_MODE_LEGACY;
068e8a30
JD		 3500 e_info("MSI interrupt test failed, using legacy interrupt.\n");
3501 } else
3502 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78
BA		 3503
3504 free_irq(adapter->pdev->irq, netdev);
3505 pci_disable_msi(adapter->pdev);
3506
f8d59f78 3507msi_test_failed:
4662e82b 3508 e1000e_set_interrupt_capability(adapter);
068e8a30 3509 return e1000_request_irq(adapter);
f8d59f78
BA		 3510}
3511
3512/**
3513 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3514 * @adapter: board private struct
3515 *
3516 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3517 **/
3518static int e1000_test_msi(struct e1000_adapter *adapter)
3519{
3520 int err;
3521 u16 pci_cmd;
3522
3523 if (!(adapter->flags & FLAG_MSI_ENABLED))
3524 return 0;
3525
3526 /* disable SERR in case the MSI write causes a master abort */
3527 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
36f2407f
DN		 3528 if (pci_cmd & PCI_COMMAND_SERR)
3529 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3530 pci_cmd & ~PCI_COMMAND_SERR);
f8d59f78
BA		 3531
3532 err = e1000_test_msi_interrupt(adapter);
3533
36f2407f
DN		 3534 /* re-enable SERR */
3535 if (pci_cmd & PCI_COMMAND_SERR) {
3536 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3537 pci_cmd |= PCI_COMMAND_SERR;
3538 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3539 }
f8d59f78 3540
f8d59f78
BA		 3541 return err;
3542}
3543
bc7f75fa
AK		 3544/**
3545 * e1000_open - Called when a network interface is made active
3546 * @netdev: network interface device structure
3547 *
3548 * Returns 0 on success, negative value on failure
3549 *
3550 * The open entry point is called when a network interface is made
3551 * active by the system (IFF_UP). At this point all resources needed
3552 * for transmit and receive operations are allocated, the interrupt
3553 * handler is registered with the OS, the watchdog timer is started,
3554 * and the stack is notified that the interface is ready.
3555 **/
3556static int e1000_open(struct net_device *netdev)
3557{
3558 struct e1000_adapter *adapter = netdev_priv(netdev);
3559 struct e1000_hw *hw = &adapter->hw;
23606cf5 3560 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3561 int err;
3562
3563 /* disallow open during test */
3564 if (test_bit(__E1000_TESTING, &adapter->state))
3565 return -EBUSY;
3566
23606cf5
RW		 3567 pm_runtime_get_sync(&pdev->dev);
3568
9c563d20
JB		 3569 netif_carrier_off(netdev);
3570
bc7f75fa
AK		 3571 /* allocate transmit descriptors */
3572 err = e1000e_setup_tx_resources(adapter);
3573 if (err)
3574 goto err_setup_tx;
3575
3576 /* allocate receive descriptors */
3577 err = e1000e_setup_rx_resources(adapter);
3578 if (err)
3579 goto err_setup_rx;
3580
11b08be8
BA		 3581 /*
3582 * If AMT is enabled, let the firmware know that the network
3583 * interface is now open and reset the part to a known state.
3584 */
3585 if (adapter->flags & FLAG_HAS_AMT) {
31dbe5b4 3586 e1000e_get_hw_control(adapter);
11b08be8
BA		 3587 e1000e_reset(adapter);
3588 }
3589
bc7f75fa
AK		 3590 e1000e_power_up_phy(adapter);
3591
3592 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3593 if ((adapter->hw.mng_cookie.status &
3594 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3595 e1000_update_mng_vlan(adapter);
3596
c128ec29 3597 /* DMA latency requirement to workaround early-receive/jumbo issue */
828bac87
BA		 3598 if ((adapter->flags & FLAG_HAS_ERT) ||
3599 (adapter->hw.mac.type == e1000_pch2lan))
6ba74014
LT		 3600 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3601 PM_QOS_CPU_DMA_LATENCY,
3602 PM_QOS_DEFAULT_VALUE);
c128ec29 3603
ad68076e
BA		 3604 /*
3605 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3606 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3607 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3608 * clean_rx handler before we do so.
3609 */
bc7f75fa
AK		 3610 e1000_configure(adapter);
3611
3612 err = e1000_request_irq(adapter);
3613 if (err)
3614 goto err_req_irq;
3615
f8d59f78
BA		 3616 /*
3617 * Work around PCIe errata with MSI interrupts causing some chipsets to
3618 * ignore e1000e MSI messages, which means we need to test our MSI
3619 * interrupt now
3620 */
4662e82b 3621 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3622 err = e1000_test_msi(adapter);
3623 if (err) {
3624 e_err("Interrupt allocation failed\n");
3625 goto err_req_irq;
3626 }
3627 }
3628
bc7f75fa
AK		 3629 /* From here on the code is the same as e1000e_up() */
3630 clear_bit(__E1000_DOWN, &adapter->state);
3631
3632 napi_enable(&adapter->napi);
3633
3634 e1000_irq_enable(adapter);
3635
4cb9be7a 3636 netif_start_queue(netdev);
d55b53ff 3637
23606cf5
RW		 3638 adapter->idle_check = true;
3639 pm_runtime_put(&pdev->dev);
3640
bc7f75fa 3641 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA		 3642 if (adapter->msix_entries)
3643 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3644 else
3645 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK		 3646
3647 return 0;
3648
3649err_req_irq:
31dbe5b4 3650 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 3651 e1000_power_down_phy(adapter);
3652 e1000e_free_rx_resources(adapter);
3653err_setup_rx:
3654 e1000e_free_tx_resources(adapter);
3655err_setup_tx:
3656 e1000e_reset(adapter);
23606cf5 3657 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3658
3659 return err;
3660}
3661
3662/**
3663 * e1000_close - Disables a network interface
3664 * @netdev: network interface device structure
3665 *
3666 * Returns 0, this is not allowed to fail
3667 *
3668 * The close entry point is called when an interface is de-activated
3669 * by the OS. The hardware is still under the drivers control, but
3670 * needs to be disabled. A global MAC reset is issued to stop the
3671 * hardware, and all transmit and receive resources are freed.
3672 **/
3673static int e1000_close(struct net_device *netdev)
3674{
3675 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3676 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3677
3678 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3679
3680 pm_runtime_get_sync(&pdev->dev);
3681
3682 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3683 e1000e_down(adapter);
3684 e1000_free_irq(adapter);
3685 }
bc7f75fa 3686 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3687
3688 e1000e_free_tx_resources(adapter);
3689 e1000e_free_rx_resources(adapter);
3690
ad68076e
BA		 3691 /*
3692 * kill manageability vlan ID if supported, but not if a vlan with
3693 * the same ID is registered on the host OS (let 8021q kill it)
3694 */
bc7f75fa
AK		 3695 if ((adapter->hw.mng_cookie.status &
3696 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3697 !(adapter->vlgrp &&
3698 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3699 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3700
ad68076e
BA		 3701 /*
3702 * If AMT is enabled, let the firmware know that the network
3703 * interface is now closed
3704 */
31dbe5b4
BA		 3705 if ((adapter->flags & FLAG_HAS_AMT) &&
3706 !test_bit(__E1000_TESTING, &adapter->state))
3707 e1000e_release_hw_control(adapter);
bc7f75fa 3708
828bac87
BA		 3709 if ((adapter->flags & FLAG_HAS_ERT) ||
3710 (adapter->hw.mac.type == e1000_pch2lan))
6ba74014 3711 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
c128ec29 3712
23606cf5
RW		 3713 pm_runtime_put_sync(&pdev->dev);
3714
bc7f75fa
AK		 3715 return 0;
3716}
3717/**
3718 * e1000_set_mac - Change the Ethernet Address of the NIC
3719 * @netdev: network interface device structure
3720 * @p: pointer to an address structure
3721 *
3722 * Returns 0 on success, negative on failure
3723 **/
3724static int e1000_set_mac(struct net_device *netdev, void *p)
3725{
3726 struct e1000_adapter *adapter = netdev_priv(netdev);
3727 struct sockaddr *addr = p;
3728
3729 if (!is_valid_ether_addr(addr->sa_data))
3730 return -EADDRNOTAVAIL;
3731
3732 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3733 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3734
3735 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3736
3737 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3738 /* activate the work around */
3739 e1000e_set_laa_state_82571(&adapter->hw, 1);
3740
ad68076e
BA		 3741 /*
3742 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3743 * between the time RAR[0] gets clobbered and the time it
3744 * gets fixed (in e1000_watchdog), the actual LAA is in one
3745 * of the RARs and no incoming packets directed to this port
3746 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3747 * RAR[14]
3748 */
bc7f75fa
AK		 3749 e1000e_rar_set(&adapter->hw,
3750 adapter->hw.mac.addr,
3751 adapter->hw.mac.rar_entry_count - 1);
3752 }
3753
3754 return 0;
3755}
3756
a8f88ff5
JB		 3757/**
3758 * e1000e_update_phy_task - work thread to update phy
3759 * @work: pointer to our work struct
3760 *
3761 * this worker thread exists because we must acquire a
3762 * semaphore to read the phy, which we could msleep while
3763 * waiting for it, and we can't msleep in a timer.
3764 **/
3765static void e1000e_update_phy_task(struct work_struct *work)
3766{
3767 struct e1000_adapter *adapter = container_of(work,
3768 struct e1000_adapter, update_phy_task);
3769 e1000_get_phy_info(&adapter->hw);
3770}
3771
ad68076e
BA		 3772/*
3773 * Need to wait a few seconds after link up to get diagnostic information from
3774 * the phy
3775 */
bc7f75fa
AK		 3776static void e1000_update_phy_info(unsigned long data)
3777{
3778 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3779 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3780}
3781
8c7bbb92
BA		 3782/**
3783 * e1000e_update_phy_stats - Update the PHY statistics counters
3784 * @adapter: board private structure
3785 **/
3786static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3787{
3788 struct e1000_hw *hw = &adapter->hw;
3789 s32 ret_val;
3790 u16 phy_data;
3791
3792 ret_val = hw->phy.ops.acquire(hw);
3793 if (ret_val)
3794 return;
3795
3796 hw->phy.addr = 1;
3797
3798#define HV_PHY_STATS_PAGE 778
3799 /*
3800 * A page set is expensive so check if already on desired page.
3801 * If not, set to the page with the PHY status registers.
3802 */
3803 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3804 &phy_data);
3805 if (ret_val)
3806 goto release;
3807 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) {
3808 ret_val = e1000e_write_phy_reg_mdic(hw,
3809 IGP01E1000_PHY_PAGE_SELECT,
3810 (HV_PHY_STATS_PAGE <<
3811 IGP_PAGE_SHIFT));
3812 if (ret_val)
3813 goto release;
3814 }
3815
3816 /* Read/clear the upper 16-bit registers and read/accumulate lower */
3817
3818 /* Single Collision Count */
3819 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS,
3820 &phy_data);
3821 ret_val = e1000e_read_phy_reg_mdic(hw,
3822 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS,
3823 &phy_data);
3824 if (!ret_val)
3825 adapter->stats.scc += phy_data;
3826
3827 /* Excessive Collision Count */
3828 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS,
3829 &phy_data);
3830 ret_val = e1000e_read_phy_reg_mdic(hw,
3831 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS,
3832 &phy_data);
3833 if (!ret_val)
3834 adapter->stats.ecol += phy_data;
3835
3836 /* Multiple Collision Count */
3837 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS,
3838 &phy_data);
3839 ret_val = e1000e_read_phy_reg_mdic(hw,
3840 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS,
3841 &phy_data);
3842 if (!ret_val)
3843 adapter->stats.mcc += phy_data;
3844
3845 /* Late Collision Count */
3846 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS,
3847 &phy_data);
3848 ret_val = e1000e_read_phy_reg_mdic(hw,
3849 HV_LATECOL_LOWER &
3850 MAX_PHY_REG_ADDRESS,
3851 &phy_data);
3852 if (!ret_val)
3853 adapter->stats.latecol += phy_data;
3854
3855 /* Collision Count - also used for adaptive IFS */
3856 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS,
3857 &phy_data);
3858 ret_val = e1000e_read_phy_reg_mdic(hw,
3859 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS,
3860 &phy_data);
3861 if (!ret_val)
3862 hw->mac.collision_delta = phy_data;
3863
3864 /* Defer Count */
3865 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS,
3866 &phy_data);
3867 ret_val = e1000e_read_phy_reg_mdic(hw,
3868 HV_DC_LOWER & MAX_PHY_REG_ADDRESS,
3869 &phy_data);
3870 if (!ret_val)
3871 adapter->stats.dc += phy_data;
3872
3873 /* Transmit with no CRS */
3874 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS,
3875 &phy_data);
3876 ret_val = e1000e_read_phy_reg_mdic(hw,
3877 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS,
3878 &phy_data);
3879 if (!ret_val)
3880 adapter->stats.tncrs += phy_data;
3881
3882release:
3883 hw->phy.ops.release(hw);
3884}
3885
bc7f75fa
AK		 3886/**
3887 * e1000e_update_stats - Update the board statistics counters
3888 * @adapter: board private structure
3889 **/
67fd4fcb 3890static void e1000e_update_stats(struct e1000_adapter *adapter)
bc7f75fa 3891{
7274c20f 3892 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3893 struct e1000_hw *hw = &adapter->hw;
3894 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3895
3896 /*
3897 * Prevent stats update while adapter is being reset, or if the pci
3898 * connection is down.
3899 */
3900 if (adapter->link_speed == 0)
3901 return;
3902 if (pci_channel_offline(pdev))
3903 return;
3904
bc7f75fa
AK		 3905 adapter->stats.crcerrs += er32(CRCERRS);
3906 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3907 adapter->stats.gorc += er32(GORCL);
3908 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3909 adapter->stats.bprc += er32(BPRC);
3910 adapter->stats.mprc += er32(MPRC);
3911 adapter->stats.roc += er32(ROC);
3912
bc7f75fa 3913 adapter->stats.mpc += er32(MPC);
8c7bbb92
BA		 3914
3915 /* Half-duplex statistics */
3916 if (adapter->link_duplex == HALF_DUPLEX) {
3917 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
3918 e1000e_update_phy_stats(adapter);
3919 } else {
3920 adapter->stats.scc += er32(SCC);
3921 adapter->stats.ecol += er32(ECOL);
3922 adapter->stats.mcc += er32(MCC);
3923 adapter->stats.latecol += er32(LATECOL);
3924 adapter->stats.dc += er32(DC);
3925
3926 hw->mac.collision_delta = er32(COLC);
3927
3928 if ((hw->mac.type != e1000_82574) &&
3929 (hw->mac.type != e1000_82583))
3930 adapter->stats.tncrs += er32(TNCRS);
3931 }
3932 adapter->stats.colc += hw->mac.collision_delta;
a4f58f54 3933 }
8c7bbb92 3934
bc7f75fa
AK		 3935 adapter->stats.xonrxc += er32(XONRXC);
3936 adapter->stats.xontxc += er32(XONTXC);
3937 adapter->stats.xoffrxc += er32(XOFFRXC);
3938 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3939 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3940 adapter->stats.gotc += er32(GOTCL);
3941 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3942 adapter->stats.rnbc += er32(RNBC);
3943 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3944
3945 adapter->stats.mptc += er32(MPTC);
3946 adapter->stats.bptc += er32(BPTC);
3947
3948 /* used for adaptive IFS */
3949
3950 hw->mac.tx_packet_delta = er32(TPT);
3951 adapter->stats.tpt += hw->mac.tx_packet_delta;
bc7f75fa
AK		 3952
3953 adapter->stats.algnerrc += er32(ALGNERRC);
3954 adapter->stats.rxerrc += er32(RXERRC);
bc7f75fa
AK		 3955 adapter->stats.cexterr += er32(CEXTERR);
3956 adapter->stats.tsctc += er32(TSCTC);
3957 adapter->stats.tsctfc += er32(TSCTFC);
3958
bc7f75fa 3959 /* Fill out the OS statistics structure */
7274c20f
AK		 3960 netdev->stats.multicast = adapter->stats.mprc;
3961 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3962
3963 /* Rx Errors */
3964
ad68076e
BA		 3965 /*
3966 * RLEC on some newer hardware can be incorrect so build
3967 * our own version based on RUC and ROC
3968 */
7274c20f 3969 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3970 adapter->stats.crcerrs + adapter->stats.algnerrc +
3971 adapter->stats.ruc + adapter->stats.roc +
3972 adapter->stats.cexterr;
7274c20f 3973 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3974 adapter->stats.roc;
7274c20f
AK		 3975 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3976 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3977 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3978
3979 /* Tx Errors */
7274c20f 3980 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3981 adapter->stats.latecol;
7274c20f
AK		 3982 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3983 netdev->stats.tx_window_errors = adapter->stats.latecol;
3984 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3985
3986 /* Tx Dropped needs to be maintained elsewhere */
3987
bc7f75fa
AK		 3988 /* Management Stats */
3989 adapter->stats.mgptc += er32(MGTPTC);
3990 adapter->stats.mgprc += er32(MGTPRC);
3991 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3992}
3993
7c25769f
BA		 3994/**
3995 * e1000_phy_read_status - Update the PHY register status snapshot
3996 * @adapter: board private structure
3997 **/
3998static void e1000_phy_read_status(struct e1000_adapter *adapter)
3999{
4000 struct e1000_hw *hw = &adapter->hw;
4001 struct e1000_phy_regs *phy = &adapter->phy_regs;
4002 int ret_val;
7c25769f
BA		 4003
4004 if ((er32(STATUS) & E1000_STATUS_LU) &&
4005 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4006 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
4007 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
4008 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
4009 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
4010 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
4011 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
4012 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
4013 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
4014 if (ret_val)
44defeb3 4015 e_warn("Error reading PHY register\n");
7c25769f
BA		 4016 } else {
4017 /*
4018 * Do not read PHY registers if link is not up
4019 * Set values to typical power-on defaults
4020 */
4021 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4022 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4023 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4024 BMSR_ERCAP);
4025 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4026 ADVERTISE_ALL | ADVERTISE_CSMA);
4027 phy->lpa = 0;
4028 phy->expansion = EXPANSION_ENABLENPAGE;
4029 phy->ctrl1000 = ADVERTISE_1000FULL;
4030 phy->stat1000 = 0;
4031 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4032 }
7c25769f
BA		 4033}
4034
bc7f75fa
AK		 4035static void e1000_print_link_info(struct e1000_adapter *adapter)
4036{
bc7f75fa
AK		 4037 struct e1000_hw *hw = &adapter->hw;
4038 u32 ctrl = er32(CTRL);
4039
8f12fe86
BA		 4040 /* Link status message must follow this format for user tools */
4041 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
4042 "Flow Control: %s\n",
4043 adapter->netdev->name,
44defeb3
JK		 4044 adapter->link_speed,
4045 (adapter->link_duplex == FULL_DUPLEX) ?
af667a29 4046 "Full Duplex" : "Half Duplex",
44defeb3 4047 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
af667a29
BA		 4048 "Rx/Tx" :
4049 ((ctrl & E1000_CTRL_RFCE) ? "Rx" :
4050 ((ctrl & E1000_CTRL_TFCE) ? "Tx" : "None")));
bc7f75fa
AK		 4051}
4052
0c6bdb30 4053static bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 4054{
4055 struct e1000_hw *hw = &adapter->hw;
4056 bool link_active = 0;
4057 s32 ret_val = 0;
4058
4059 /*
4060 * get_link_status is set on LSC (link status) interrupt or
4061 * Rx sequence error interrupt. get_link_status will stay
4062 * false until the check_for_link establishes link
4063 * for copper adapters ONLY
4064 */
4065 switch (hw->phy.media_type) {
4066 case e1000_media_type_copper:
4067 if (hw->mac.get_link_status) {
4068 ret_val = hw->mac.ops.check_for_link(hw);
4069 link_active = !hw->mac.get_link_status;
4070 } else {
4071 link_active = 1;
4072 }
4073 break;
4074 case e1000_media_type_fiber:
4075 ret_val = hw->mac.ops.check_for_link(hw);
4076 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4077 break;
4078 case e1000_media_type_internal_serdes:
4079 ret_val = hw->mac.ops.check_for_link(hw);
4080 link_active = adapter->hw.mac.serdes_has_link;
4081 break;
4082 default:
4083 case e1000_media_type_unknown:
4084 break;
4085 }
4086
4087 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4088 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4089 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 4090 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 4091 }
4092
4093 return link_active;
4094}
4095
4096static void e1000e_enable_receives(struct e1000_adapter *adapter)
4097{
4098 /* make sure the receive unit is started */
4099 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4100 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4101 struct e1000_hw *hw = &adapter->hw;
4102 u32 rctl = er32(RCTL);
4103 ew32(RCTL, rctl | E1000_RCTL_EN);
4104 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4105 }
4106}
4107
ff10e13c
CW		 4108static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4109{
4110 struct e1000_hw *hw = &adapter->hw;
4111
4112 /*
4113 * With 82574 controllers, PHY needs to be checked periodically
4114 * for hung state and reset, if two calls return true
4115 */
4116 if (e1000_check_phy_82574(hw))
4117 adapter->phy_hang_count++;
4118 else
4119 adapter->phy_hang_count = 0;
4120
4121 if (adapter->phy_hang_count > 1) {
4122 adapter->phy_hang_count = 0;
4123 schedule_work(&adapter->reset_task);
4124 }
4125}
4126
bc7f75fa
AK		 4127/**
4128 * e1000_watchdog - Timer Call-back
4129 * @data: pointer to adapter cast into an unsigned long
4130 **/
4131static void e1000_watchdog(unsigned long data)
4132{
4133 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4134
4135 /* Do the rest outside of interrupt context */
4136 schedule_work(&adapter->watchdog_task);
4137
4138 /* TODO: make this use queue_delayed_work() */
4139}
4140
4141static void e1000_watchdog_task(struct work_struct *work)
4142{
4143 struct e1000_adapter *adapter = container_of(work,
4144 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 4145 struct net_device *netdev = adapter->netdev;
4146 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 4147 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 4148 struct e1000_ring *tx_ring = adapter->tx_ring;
4149 struct e1000_hw *hw = &adapter->hw;
4150 u32 link, tctl;
bc7f75fa
AK		 4151 int tx_pending = 0;
4152
b405e8df 4153 link = e1000e_has_link(adapter);
318a94d6 4154 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 4155 /* Cancel scheduled suspend requests. */
4156 pm_runtime_resume(netdev->dev.parent);
4157
318a94d6 4158 e1000e_enable_receives(adapter);
bc7f75fa 4159 goto link_up;
bc7f75fa
AK		 4160 }
4161
4162 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4163 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4164 e1000_update_mng_vlan(adapter);
4165
bc7f75fa
AK		 4166 if (link) {
4167 if (!netif_carrier_ok(netdev)) {
4168 bool txb2b = 1;
23606cf5
RW		 4169
4170 /* Cancel scheduled suspend requests. */
4171 pm_runtime_resume(netdev->dev.parent);
4172
318a94d6 4173 /* update snapshot of PHY registers on LSC */
7c25769f 4174 e1000_phy_read_status(adapter);
bc7f75fa
AK		 4175 mac->ops.get_link_up_info(&adapter->hw,
4176 &adapter->link_speed,
4177 &adapter->link_duplex);
4178 e1000_print_link_info(adapter);
f4187b56
BA		 4179 /*
4180 * On supported PHYs, check for duplex mismatch only
4181 * if link has autonegotiated at 10/100 half
4182 */
4183 if ((hw->phy.type == e1000_phy_igp_3 ||
4184 hw->phy.type == e1000_phy_bm) &&
4185 (hw->mac.autoneg == true) &&
4186 (adapter->link_speed == SPEED_10 ||
4187 adapter->link_speed == SPEED_100) &&
4188 (adapter->link_duplex == HALF_DUPLEX)) {
4189 u16 autoneg_exp;
4190
4191 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4192
4193 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4194 e_info("Autonegotiated half duplex but"
4195 " link partner cannot autoneg. "
4196 " Try forcing full duplex if "
4197 "link gets many collisions.\n");
4198 }
4199
f49c57e1 4200 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 4201 adapter->tx_timeout_factor = 1;
4202 switch (adapter->link_speed) {
4203 case SPEED_10:
4204 txb2b = 0;
10f1b492 4205 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 4206 break;
4207 case SPEED_100:
4208 txb2b = 0;
4c86e0b9 4209 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 4210 break;
4211 }
4212
ad68076e
BA		 4213 /*
4214 * workaround: re-program speed mode bit after
4215 * link-up event
4216 */
bc7f75fa
AK		 4217 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4218 !txb2b) {
4219 u32 tarc0;
e9ec2c0f 4220 tarc0 = er32(TARC(0));
bc7f75fa 4221 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4222 ew32(TARC(0), tarc0);
bc7f75fa
AK		 4223 }
4224
ad68076e
BA		 4225 /*
4226 * disable TSO for pcie and 10/100 speeds, to avoid
4227 * some hardware issues
4228 */
bc7f75fa
AK		 4229 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4230 switch (adapter->link_speed) {
4231 case SPEED_10:
4232 case SPEED_100:
44defeb3 4233 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 4234 netdev->features &= ~NETIF_F_TSO;
4235 netdev->features &= ~NETIF_F_TSO6;
4236 break;
4237 case SPEED_1000:
4238 netdev->features |= NETIF_F_TSO;
4239 netdev->features |= NETIF_F_TSO6;
4240 break;
4241 default:
4242 /* oops */
4243 break;
4244 }
4245 }
4246
ad68076e
BA		 4247 /*
4248 * enable transmits in the hardware, need to do this
4249 * after setting TARC(0)
4250 */
bc7f75fa
AK		 4251 tctl = er32(TCTL);
4252 tctl |= E1000_TCTL_EN;
4253 ew32(TCTL, tctl);
4254
75eb0fad
BA		 4255 /*
4256 * Perform any post-link-up configuration before
4257 * reporting link up.
4258 */
4259 if (phy->ops.cfg_on_link_up)
4260 phy->ops.cfg_on_link_up(hw);
4261
bc7f75fa 4262 netif_carrier_on(netdev);
bc7f75fa
AK		 4263
4264 if (!test_bit(__E1000_DOWN, &adapter->state))
4265 mod_timer(&adapter->phy_info_timer,
4266 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4267 }
4268 } else {
4269 if (netif_carrier_ok(netdev)) {
4270 adapter->link_speed = 0;
4271 adapter->link_duplex = 0;
8f12fe86
BA		 4272 /* Link status message must follow this format */
4273 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4274 adapter->netdev->name);
bc7f75fa 4275 netif_carrier_off(netdev);
bc7f75fa
AK		 4276 if (!test_bit(__E1000_DOWN, &adapter->state))
4277 mod_timer(&adapter->phy_info_timer,
4278 round_jiffies(jiffies + 2 * HZ));
4279
4280 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4281 schedule_work(&adapter->reset_task);
23606cf5
RW		 4282 else
4283 pm_schedule_suspend(netdev->dev.parent,
4284 LINK_TIMEOUT);
bc7f75fa
AK		 4285 }
4286 }
4287
4288link_up:
67fd4fcb 4289 spin_lock(&adapter->stats64_lock);
bc7f75fa 4290 e1000e_update_stats(adapter);
67fd4fcb 4291 spin_unlock(&adapter->stats64_lock);
bc7f75fa
AK		 4292
4293 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4294 adapter->tpt_old = adapter->stats.tpt;
4295 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4296 adapter->colc_old = adapter->stats.colc;
4297
7c25769f
BA		 4298 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4299 adapter->gorc_old = adapter->stats.gorc;
4300 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4301 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 4302
4303 e1000e_update_adaptive(&adapter->hw);
4304
4305 if (!netif_carrier_ok(netdev)) {
4306 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
4307 tx_ring->count);
4308 if (tx_pending) {
ad68076e
BA		 4309 /*
4310 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 4311 * but we've got queued Tx work that's never going
4312 * to get done, so reset controller to flush Tx.
ad68076e
BA		 4313 * (Do the reset outside of interrupt context).
4314 */
bc7f75fa
AK		 4315 adapter->tx_timeout_count++;
4316 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 4317 /* return immediately since reset is imminent */
4318 return;
bc7f75fa
AK		 4319 }
4320 }
4321
eab2abf5
JB		 4322 /* Simple mode for Interrupt Throttle Rate (ITR) */
4323 if (adapter->itr_setting == 4) {
4324 /*
4325 * Symmetric Tx/Rx gets a reduced ITR=2000;
4326 * Total asymmetrical Tx or Rx gets ITR=8000;
4327 * everyone else is between 2000-8000.
4328 */
4329 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4330 u32 dif = (adapter->gotc > adapter->gorc ?
4331 adapter->gotc - adapter->gorc :
4332 adapter->gorc - adapter->gotc) / 10000;
4333 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4334
4335 ew32(ITR, 1000000000 / (itr * 256));
4336 }
4337
ad68076e 4338 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4339 if (adapter->msix_entries)
4340 ew32(ICS, adapter->rx_ring->ims_val);
4341 else
4342 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 4343
4344 /* Force detection of hung controller every watchdog period */
4345 adapter->detect_tx_hung = 1;
4346
af667a29 4347 /* flush partial descriptors to memory before detecting Tx hang */
3a3b7586
JB		 4348 if (adapter->flags2 & FLAG2_DMA_BURST) {
4349 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4350 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4351 /*
4352 * no need to flush the writes because the timeout code does
4353 * an er32 first thing
4354 */
4355 }
4356
ad68076e
BA		 4357 /*
4358 * With 82571 controllers, LAA may be overwritten due to controller
4359 * reset from the other port. Set the appropriate LAA in RAR[0]
4360 */
bc7f75fa
AK		 4361 if (e1000e_get_laa_state_82571(hw))
4362 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4363
ff10e13c
CW		 4364 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
4365 e1000e_check_82574_phy_workaround(adapter);
4366
bc7f75fa
AK		 4367 /* Reset the timer */
4368 if (!test_bit(__E1000_DOWN, &adapter->state))
4369 mod_timer(&adapter->watchdog_timer,
4370 round_jiffies(jiffies + 2 * HZ));
4371}
4372
4373#define E1000_TX_FLAGS_CSUM 0x00000001
4374#define E1000_TX_FLAGS_VLAN 0x00000002
4375#define E1000_TX_FLAGS_TSO 0x00000004
4376#define E1000_TX_FLAGS_IPV4 0x00000008
4377#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4378#define E1000_TX_FLAGS_VLAN_SHIFT 16
4379
4380static int e1000_tso(struct e1000_adapter *adapter,
4381 struct sk_buff *skb)
4382{
4383 struct e1000_ring *tx_ring = adapter->tx_ring;
4384 struct e1000_context_desc *context_desc;
4385 struct e1000_buffer *buffer_info;
4386 unsigned int i;
4387 u32 cmd_length = 0;
4388 u16 ipcse = 0, tucse, mss;
4389 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4390 int err;
4391
3d5e33c9
BA		 4392 if (!skb_is_gso(skb))
4393 return 0;
bc7f75fa 4394
3d5e33c9
BA		 4395 if (skb_header_cloned(skb)) {
4396 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4397 if (err)
4398 return err;
bc7f75fa
AK		 4399 }
4400
3d5e33c9
BA		 4401 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4402 mss = skb_shinfo(skb)->gso_size;
4403 if (skb->protocol == htons(ETH_P_IP)) {
4404 struct iphdr *iph = ip_hdr(skb);
4405 iph->tot_len = 0;
4406 iph->check = 0;
4407 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4408 0, IPPROTO_TCP, 0);
4409 cmd_length = E1000_TXD_CMD_IP;
4410 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4411 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4412 ipv6_hdr(skb)->payload_len = 0;
4413 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4414 &ipv6_hdr(skb)->daddr,
4415 0, IPPROTO_TCP, 0);
4416 ipcse = 0;
4417 }
4418 ipcss = skb_network_offset(skb);
4419 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4420 tucss = skb_transport_offset(skb);
4421 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4422 tucse = 0;
4423
4424 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4425 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4426
4427 i = tx_ring->next_to_use;
4428 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4429 buffer_info = &tx_ring->buffer_info[i];
4430
4431 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4432 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4433 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4434 context_desc->upper_setup.tcp_fields.tucss = tucss;
4435 context_desc->upper_setup.tcp_fields.tucso = tucso;
4436 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4437 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4438 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4439 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4440
4441 buffer_info->time_stamp = jiffies;
4442 buffer_info->next_to_watch = i;
4443
4444 i++;
4445 if (i == tx_ring->count)
4446 i = 0;
4447 tx_ring->next_to_use = i;
4448
4449 return 1;
bc7f75fa
AK		 4450}
4451
4452static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4453{
4454 struct e1000_ring *tx_ring = adapter->tx_ring;
4455 struct e1000_context_desc *context_desc;
4456 struct e1000_buffer *buffer_info;
4457 unsigned int i;
4458 u8 css;
af807c82 4459 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4460 __be16 protocol;
bc7f75fa 4461
af807c82
DG		 4462 if (skb->ip_summed != CHECKSUM_PARTIAL)
4463 return 0;
bc7f75fa 4464
5f66f208
AJ		 4465 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4466 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4467 else
4468 protocol = skb->protocol;
4469
3f518390 4470 switch (protocol) {
09640e63 4471 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4472 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4473 cmd_len |= E1000_TXD_CMD_TCP;
4474 break;
09640e63 4475 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4476 /* XXX not handling all IPV6 headers */
4477 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4478 cmd_len |= E1000_TXD_CMD_TCP;
4479 break;
4480 default:
4481 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4482 e_warn("checksum_partial proto=%x!\n",
4483 be16_to_cpu(protocol));
af807c82 4484 break;
bc7f75fa
AK		 4485 }
4486
0d0b1672 4487 css = skb_checksum_start_offset(skb);
af807c82
DG		 4488
4489 i = tx_ring->next_to_use;
4490 buffer_info = &tx_ring->buffer_info[i];
4491 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4492
4493 context_desc->lower_setup.ip_config = 0;
4494 context_desc->upper_setup.tcp_fields.tucss = css;
4495 context_desc->upper_setup.tcp_fields.tucso =
4496 css + skb->csum_offset;
4497 context_desc->upper_setup.tcp_fields.tucse = 0;
4498 context_desc->tcp_seg_setup.data = 0;
4499 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4500
4501 buffer_info->time_stamp = jiffies;
4502 buffer_info->next_to_watch = i;
4503
4504 i++;
4505 if (i == tx_ring->count)
4506 i = 0;
4507 tx_ring->next_to_use = i;
4508
4509 return 1;
bc7f75fa
AK		 4510}
4511
4512#define E1000_MAX_PER_TXD 8192
4513#define E1000_MAX_TXD_PWR 12
4514
4515static int e1000_tx_map(struct e1000_adapter *adapter,
4516 struct sk_buff *skb, unsigned int first,
4517 unsigned int max_per_txd, unsigned int nr_frags,
4518 unsigned int mss)
4519{
4520 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4521 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4522 struct e1000_buffer *buffer_info;
8ddc951c 4523 unsigned int len = skb_headlen(skb);
03b1320d 4524 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4525 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4526
4527 i = tx_ring->next_to_use;
4528
4529 while (len) {
1b7719c4 4530 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4531 size = min(len, max_per_txd);
4532
bc7f75fa 4533 buffer_info->length = size;
bc7f75fa 4534 buffer_info->time_stamp = jiffies;
bc7f75fa 4535 buffer_info->next_to_watch = i;
0be3f55f
NN		 4536 buffer_info->dma = dma_map_single(&pdev->dev,
4537 skb->data + offset,
af667a29 4538 size, DMA_TO_DEVICE);
03b1320d 4539 buffer_info->mapped_as_page = false;
0be3f55f 4540 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4541 goto dma_error;
bc7f75fa
AK		 4542
4543 len -= size;
4544 offset += size;
03b1320d 4545 count++;
1b7719c4
AD		 4546
4547 if (len) {
4548 i++;
4549 if (i == tx_ring->count)
4550 i = 0;
4551 }
bc7f75fa
AK		 4552 }
4553
4554 for (f = 0; f < nr_frags; f++) {
4555 struct skb_frag_struct *frag;
4556
4557 frag = &skb_shinfo(skb)->frags[f];
4558 len = frag->size;
03b1320d 4559 offset = frag->page_offset;
bc7f75fa
AK		 4560
4561 while (len) {
1b7719c4
AD		 4562 i++;
4563 if (i == tx_ring->count)
4564 i = 0;
4565
bc7f75fa
AK		 4566 buffer_info = &tx_ring->buffer_info[i];
4567 size = min(len, max_per_txd);
bc7f75fa
AK		 4568
4569 buffer_info->length = size;
4570 buffer_info->time_stamp = jiffies;
bc7f75fa 4571 buffer_info->next_to_watch = i;
0be3f55f 4572 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4573 offset, size,
0be3f55f 4574 DMA_TO_DEVICE);
03b1320d 4575 buffer_info->mapped_as_page = true;
0be3f55f 4576 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4577 goto dma_error;
bc7f75fa
AK		 4578
4579 len -= size;
4580 offset += size;
4581 count++;
bc7f75fa
AK		 4582 }
4583 }
4584
af667a29 4585 segs = skb_shinfo(skb)->gso_segs ? : 1;
9ed318d5
TH		 4586 /* multiply data chunks by size of headers */
4587 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4588
bc7f75fa 4589 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4590 tx_ring->buffer_info[i].segs = segs;
4591 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4592 tx_ring->buffer_info[first].next_to_watch = i;
4593
4594 return count;
03b1320d
AD		 4595
4596dma_error:
af667a29 4597 dev_err(&pdev->dev, "Tx DMA map failed\n");
03b1320d 4598 buffer_info->dma = 0;
c1fa347f 4599 if (count)
03b1320d 4600 count--;
c1fa347f
RK		 4601
4602 while (count--) {
af667a29 4603 if (i == 0)
03b1320d 4604 i += tx_ring->count;
c1fa347f 4605 i--;
03b1320d 4606 buffer_info = &tx_ring->buffer_info[i];
1d51c418 4607 e1000_put_txbuf(adapter, buffer_info);
03b1320d
AD		 4608 }
4609
4610 return 0;
bc7f75fa
AK		 4611}
4612
4613static void e1000_tx_queue(struct e1000_adapter *adapter,
4614 int tx_flags, int count)
4615{
4616 struct e1000_ring *tx_ring = adapter->tx_ring;
4617 struct e1000_tx_desc *tx_desc = NULL;
4618 struct e1000_buffer *buffer_info;
4619 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4620 unsigned int i;
4621
4622 if (tx_flags & E1000_TX_FLAGS_TSO) {
4623 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4624 E1000_TXD_CMD_TSE;
4625 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4626
4627 if (tx_flags & E1000_TX_FLAGS_IPV4)
4628 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4629 }
4630
4631 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4632 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4633 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4634 }
4635
4636 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4637 txd_lower |= E1000_TXD_CMD_VLE;
4638 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4639 }
4640
4641 i = tx_ring->next_to_use;
4642
36b973df 4643 do {
bc7f75fa
AK		 4644 buffer_info = &tx_ring->buffer_info[i];
4645 tx_desc = E1000_TX_DESC(*tx_ring, i);
4646 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4647 tx_desc->lower.data =
4648 cpu_to_le32(txd_lower | buffer_info->length);
4649 tx_desc->upper.data = cpu_to_le32(txd_upper);
4650
4651 i++;
4652 if (i == tx_ring->count)
4653 i = 0;
36b973df 4654 } while (--count > 0);
bc7f75fa
AK		 4655
4656 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4657
ad68076e
BA		 4658 /*
4659 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4660 * know there are new descriptors to fetch. (Only
4661 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4662 * such as IA-64).
4663 */
bc7f75fa
AK		 4664 wmb();
4665
4666 tx_ring->next_to_use = i;
4667 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4668 /*
4669 * we need this if more than one processor can write to our tail
4670 * at a time, it synchronizes IO on IA64/Altix systems
4671 */
bc7f75fa
AK		 4672 mmiowb();
4673}
4674
4675#define MINIMUM_DHCP_PACKET_SIZE 282
4676static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4677 struct sk_buff *skb)
4678{
4679 struct e1000_hw *hw = &adapter->hw;
4680 u16 length, offset;
4681
4682 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4683 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4684 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4685 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4686 return 0;
4687 }
4688
4689 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4690 return 0;
4691
4692 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4693 return 0;
4694
4695 {
4696 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4697 struct udphdr *udp;
4698
4699 if (ip->protocol != IPPROTO_UDP)
4700 return 0;
4701
4702 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4703 if (ntohs(udp->dest) != 67)
4704 return 0;
4705
4706 offset = (u8 *)udp + 8 - skb->data;
4707 length = skb->len - offset;
4708 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4709 }
4710
4711 return 0;
4712}
4713
4714static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4715{
4716 struct e1000_adapter *adapter = netdev_priv(netdev);
4717
4718 netif_stop_queue(netdev);
ad68076e
BA		 4719 /*
4720 * Herbert's original patch had:
bc7f75fa 4721 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4722 * but since that doesn't exist yet, just open code it.
4723 */
bc7f75fa
AK		 4724 smp_mb();
4725
ad68076e
BA		 4726 /*
4727 * We need to check again in a case another CPU has just
4728 * made room available.
4729 */
bc7f75fa
AK		 4730 if (e1000_desc_unused(adapter->tx_ring) < size)
4731 return -EBUSY;
4732
4733 /* A reprieve! */
4734 netif_start_queue(netdev);
4735 ++adapter->restart_queue;
4736 return 0;
4737}
4738
4739static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4740{
4741 struct e1000_adapter *adapter = netdev_priv(netdev);
4742
4743 if (e1000_desc_unused(adapter->tx_ring) >= size)
4744 return 0;
4745 return __e1000_maybe_stop_tx(netdev, size);
4746}
4747
4748#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4749static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4750 struct net_device *netdev)
bc7f75fa
AK		 4751{
4752 struct e1000_adapter *adapter = netdev_priv(netdev);
4753 struct e1000_ring *tx_ring = adapter->tx_ring;
4754 unsigned int first;
4755 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4756 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4757 unsigned int tx_flags = 0;
e743d313 4758 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 4759 unsigned int nr_frags;
4760 unsigned int mss;
bc7f75fa
AK		 4761 int count = 0;
4762 int tso;
4763 unsigned int f;
bc7f75fa
AK		 4764
4765 if (test_bit(__E1000_DOWN, &adapter->state)) {
4766 dev_kfree_skb_any(skb);
4767 return NETDEV_TX_OK;
4768 }
4769
4770 if (skb->len <= 0) {
4771 dev_kfree_skb_any(skb);
4772 return NETDEV_TX_OK;
4773 }
4774
4775 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4776 /*
4777 * The controller does a simple calculation to
bc7f75fa
AK		 4778 * make sure there is enough room in the FIFO before
4779 * initiating the DMA for each buffer. The calc is:
4780 * 4 = ceil(buffer len/mss). To make sure we don't
4781 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4782 * drops.
4783 */
bc7f75fa
AK		 4784 if (mss) {
4785 u8 hdr_len;
4786 max_per_txd = min(mss << 2, max_per_txd);
4787 max_txd_pwr = fls(max_per_txd) - 1;
4788
ad68076e
BA		 4789 /*
4790 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4791 * points to just header, pull a few bytes of payload from
4792 * frags into skb->data
4793 */
bc7f75fa 4794 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4795 /*
4796 * we do this workaround for ES2LAN, but it is un-necessary,
4797 * avoiding it could save a lot of cycles
4798 */
4e6c709c 4799 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4800 unsigned int pull_size;
4801
4802 pull_size = min((unsigned int)4, skb->data_len);
4803 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4804 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4805 dev_kfree_skb_any(skb);
4806 return NETDEV_TX_OK;
4807 }
e743d313 4808 len = skb_headlen(skb);
bc7f75fa
AK		 4809 }
4810 }
4811
4812 /* reserve a descriptor for the offload context */
4813 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4814 count++;
4815 count++;
4816
4817 count += TXD_USE_COUNT(len, max_txd_pwr);
4818
4819 nr_frags = skb_shinfo(skb)->nr_frags;
4820 for (f = 0; f < nr_frags; f++)
4821 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4822 max_txd_pwr);
4823
4824 if (adapter->hw.mac.tx_pkt_filtering)
4825 e1000_transfer_dhcp_info(adapter, skb);
4826
ad68076e
BA		 4827 /*
4828 * need: count + 2 desc gap to keep tail from touching
4829 * head, otherwise try next time
4830 */
92af3e95 4831 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4832 return NETDEV_TX_BUSY;
bc7f75fa 4833
eab6d18d 4834 if (vlan_tx_tag_present(skb)) {
bc7f75fa
AK		 4835 tx_flags |= E1000_TX_FLAGS_VLAN;
4836 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4837 }
4838
4839 first = tx_ring->next_to_use;
4840
4841 tso = e1000_tso(adapter, skb);
4842 if (tso < 0) {
4843 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4844 return NETDEV_TX_OK;
4845 }
4846
4847 if (tso)
4848 tx_flags |= E1000_TX_FLAGS_TSO;
4849 else if (e1000_tx_csum(adapter, skb))
4850 tx_flags |= E1000_TX_FLAGS_CSUM;
4851
ad68076e
BA		 4852 /*
4853 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4854 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4855 * no longer assume, we must.
4856 */
bc7f75fa
AK		 4857 if (skb->protocol == htons(ETH_P_IP))
4858 tx_flags |= E1000_TX_FLAGS_IPV4;
4859
1b7719c4 4860 /* if count is 0 then mapping error has occured */
bc7f75fa 4861 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4862 if (count) {
4863 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4864 /* Make sure there is space in the ring for the next send. */
4865 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4866
4867 } else {
bc7f75fa 4868 dev_kfree_skb_any(skb);
1b7719c4
AD		 4869 tx_ring->buffer_info[first].time_stamp = 0;
4870 tx_ring->next_to_use = first;
bc7f75fa
AK		 4871 }
4872
bc7f75fa
AK		 4873 return NETDEV_TX_OK;
4874}
4875
4876/**
4877 * e1000_tx_timeout - Respond to a Tx Hang
4878 * @netdev: network interface device structure
4879 **/
4880static void e1000_tx_timeout(struct net_device *netdev)
4881{
4882 struct e1000_adapter *adapter = netdev_priv(netdev);
4883
4884 /* Do the reset outside of interrupt context */
4885 adapter->tx_timeout_count++;
4886 schedule_work(&adapter->reset_task);
4887}
4888
4889static void e1000_reset_task(struct work_struct *work)
4890{
4891 struct e1000_adapter *adapter;
4892 adapter = container_of(work, struct e1000_adapter, reset_task);
4893
affa9dfb
CW		 4894 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4895 (adapter->flags & FLAG_RX_RESTART_NOW))) {
4896 e1000e_dump(adapter);
4897 e_err("Reset adapter\n");
4898 }
bc7f75fa
AK		 4899 e1000e_reinit_locked(adapter);
4900}
4901
4902/**
67fd4fcb 4903 * e1000_get_stats64 - Get System Network Statistics
bc7f75fa 4904 * @netdev: network interface device structure
67fd4fcb 4905 * @stats: rtnl_link_stats64 pointer
bc7f75fa
AK		 4906 *
4907 * Returns the address of the device statistics structure.
bc7f75fa 4908 **/
67fd4fcb
JK		 4909struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
4910 struct rtnl_link_stats64 *stats)
bc7f75fa 4911{
67fd4fcb
JK		 4912 struct e1000_adapter *adapter = netdev_priv(netdev);
4913
4914 memset(stats, 0, sizeof(struct rtnl_link_stats64));
4915 spin_lock(&adapter->stats64_lock);
4916 e1000e_update_stats(adapter);
4917 /* Fill out the OS statistics structure */
4918 stats->rx_bytes = adapter->stats.gorc;
4919 stats->rx_packets = adapter->stats.gprc;
4920 stats->tx_bytes = adapter->stats.gotc;
4921 stats->tx_packets = adapter->stats.gptc;
4922 stats->multicast = adapter->stats.mprc;
4923 stats->collisions = adapter->stats.colc;
4924
4925 /* Rx Errors */
4926
4927 /*
4928 * RLEC on some newer hardware can be incorrect so build
4929 * our own version based on RUC and ROC
4930 */
4931 stats->rx_errors = adapter->stats.rxerrc +
4932 adapter->stats.crcerrs + adapter->stats.algnerrc +
4933 adapter->stats.ruc + adapter->stats.roc +
4934 adapter->stats.cexterr;
4935 stats->rx_length_errors = adapter->stats.ruc +
4936 adapter->stats.roc;
4937 stats->rx_crc_errors = adapter->stats.crcerrs;
4938 stats->rx_frame_errors = adapter->stats.algnerrc;
4939 stats->rx_missed_errors = adapter->stats.mpc;
4940
4941 /* Tx Errors */
4942 stats->tx_errors = adapter->stats.ecol +
4943 adapter->stats.latecol;
4944 stats->tx_aborted_errors = adapter->stats.ecol;
4945 stats->tx_window_errors = adapter->stats.latecol;
4946 stats->tx_carrier_errors = adapter->stats.tncrs;
4947
4948 /* Tx Dropped needs to be maintained elsewhere */
4949
4950 spin_unlock(&adapter->stats64_lock);
4951 return stats;
bc7f75fa
AK		 4952}
4953
4954/**
4955 * e1000_change_mtu - Change the Maximum Transfer Unit
4956 * @netdev: network interface device structure
4957 * @new_mtu: new value for maximum frame size
4958 *
4959 * Returns 0 on success, negative on failure
4960 **/
4961static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4962{
4963 struct e1000_adapter *adapter = netdev_priv(netdev);
4964 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4965
2adc55c9
BA		 4966 /* Jumbo frame support */
4967 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4968 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4969 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4970 return -EINVAL;
4971 }
4972
2adc55c9
BA		 4973 /* Supported frame sizes */
4974 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4975 (max_frame > adapter->max_hw_frame_size)) {
4976 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4977 return -EINVAL;
4978 }
4979
a1ce6473
BA		 4980 /* Jumbo frame workaround on 82579 requires CRC be stripped */
4981 if ((adapter->hw.mac.type == e1000_pch2lan) &&
4982 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
4983 (new_mtu > ETH_DATA_LEN)) {
4984 e_err("Jumbo Frames not supported on 82579 when CRC "
4985 "stripping is disabled.\n");
4986 return -EINVAL;
4987 }
4988
6f461f6c
BA		 4989 /* 82573 Errata 17 */
4990 if (((adapter->hw.mac.type == e1000_82573) ||
4991 (adapter->hw.mac.type == e1000_82574)) &&
4992 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4993 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4994 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4995 }
4996
bc7f75fa
AK		 4997 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4998 msleep(1);
610c9928 4999 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 5000 adapter->max_frame_size = max_frame;
610c9928
BA		 5001 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5002 netdev->mtu = new_mtu;
bc7f75fa
AK		 5003 if (netif_running(netdev))
5004 e1000e_down(adapter);
5005
ad68076e
BA		 5006 /*
5007 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 5008 * means we reserve 2 more, this pushes us to allocate from the next
5009 * larger slab size.
ad68076e 5010 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 5011 * However with the new *_jumbo_rx* routines, jumbo receives will use
5012 * fragmented skbs
ad68076e 5013 */
bc7f75fa 5014
9926146b 5015 if (max_frame <= 2048)
bc7f75fa
AK		 5016 adapter->rx_buffer_len = 2048;
5017 else
5018 adapter->rx_buffer_len = 4096;
5019
5020 /* adjust allocation if LPE protects us, and we aren't using SBP */
5021 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
5022 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
5023 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 5024 + ETH_FCS_LEN;
bc7f75fa 5025
bc7f75fa
AK		 5026 if (netif_running(netdev))
5027 e1000e_up(adapter);
5028 else
5029 e1000e_reset(adapter);
5030
5031 clear_bit(__E1000_RESETTING, &adapter->state);
5032
5033 return 0;
5034}
5035
5036static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5037 int cmd)
5038{
5039 struct e1000_adapter *adapter = netdev_priv(netdev);
5040 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 5041
318a94d6 5042 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 5043 return -EOPNOTSUPP;
5044
5045 switch (cmd) {
5046 case SIOCGMIIPHY:
5047 data->phy_id = adapter->hw.phy.addr;
5048 break;
5049 case SIOCGMIIREG:
b16a002e
BA		 5050 e1000_phy_read_status(adapter);
5051
7c25769f
BA		 5052 switch (data->reg_num & 0x1F) {
5053 case MII_BMCR:
5054 data->val_out = adapter->phy_regs.bmcr;
5055 break;
5056 case MII_BMSR:
5057 data->val_out = adapter->phy_regs.bmsr;
5058 break;
5059 case MII_PHYSID1:
5060 data->val_out = (adapter->hw.phy.id >> 16);
5061 break;
5062 case MII_PHYSID2:
5063 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5064 break;
5065 case MII_ADVERTISE:
5066 data->val_out = adapter->phy_regs.advertise;
5067 break;
5068 case MII_LPA:
5069 data->val_out = adapter->phy_regs.lpa;
5070 break;
5071 case MII_EXPANSION:
5072 data->val_out = adapter->phy_regs.expansion;
5073 break;
5074 case MII_CTRL1000:
5075 data->val_out = adapter->phy_regs.ctrl1000;
5076 break;
5077 case MII_STAT1000:
5078 data->val_out = adapter->phy_regs.stat1000;
5079 break;
5080 case MII_ESTATUS:
5081 data->val_out = adapter->phy_regs.estatus;
5082 break;
5083 default:
bc7f75fa
AK		 5084 return -EIO;
5085 }
bc7f75fa
AK		 5086 break;
5087 case SIOCSMIIREG:
5088 default:
5089 return -EOPNOTSUPP;
5090 }
5091 return 0;
5092}
5093
5094static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5095{
5096 switch (cmd) {
5097 case SIOCGMIIPHY:
5098 case SIOCGMIIREG:
5099 case SIOCSMIIREG:
5100 return e1000_mii_ioctl(netdev, ifr, cmd);
5101 default:
5102 return -EOPNOTSUPP;
5103 }
5104}
5105
a4f58f54
BA		 5106static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5107{
5108 struct e1000_hw *hw = &adapter->hw;
5109 u32 i, mac_reg;
5110 u16 phy_reg;
5111 int retval = 0;
5112
5113 /* copy MAC RARs to PHY RARs */
d3738bb8 5114 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
a4f58f54
BA		 5115
5116 /* copy MAC MTA to PHY MTA */
5117 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5118 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5119 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
5120 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
5121 }
5122
5123 /* configure PHY Rx Control register */
5124 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
5125 mac_reg = er32(RCTL);
5126 if (mac_reg & E1000_RCTL_UPE)
5127 phy_reg |= BM_RCTL_UPE;
5128 if (mac_reg & E1000_RCTL_MPE)
5129 phy_reg |= BM_RCTL_MPE;
5130 phy_reg &= ~(BM_RCTL_MO_MASK);
5131 if (mac_reg & E1000_RCTL_MO_3)
5132 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5133 << BM_RCTL_MO_SHIFT);
5134 if (mac_reg & E1000_RCTL_BAM)
5135 phy_reg |= BM_RCTL_BAM;
5136 if (mac_reg & E1000_RCTL_PMCF)
5137 phy_reg |= BM_RCTL_PMCF;
5138 mac_reg = er32(CTRL);
5139 if (mac_reg & E1000_CTRL_RFCE)
5140 phy_reg |= BM_RCTL_RFCE;
5141 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
5142
5143 /* enable PHY wakeup in MAC register */
5144 ew32(WUFC, wufc);
5145 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5146
5147 /* configure and enable PHY wakeup in PHY registers */
5148 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
5149 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5150
5151 /* activate PHY wakeup */
94d8186a 5152 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 5153 if (retval) {
5154 e_err("Could not acquire PHY\n");
5155 return retval;
5156 }
5157 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
5158 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
5159 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
5160 if (retval) {
5161 e_err("Could not read PHY page 769\n");
5162 goto out;
5163 }
5164 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5165 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
5166 if (retval)
5167 e_err("Could not set PHY Host Wakeup bit\n");
5168out:
94d8186a 5169 hw->phy.ops.release(hw);
a4f58f54
BA		 5170
5171 return retval;
5172}
5173
23606cf5
RW		 5174static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5175 bool runtime)
bc7f75fa
AK		 5176{
5177 struct net_device *netdev = pci_get_drvdata(pdev);
5178 struct e1000_adapter *adapter = netdev_priv(netdev);
5179 struct e1000_hw *hw = &adapter->hw;
5180 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 5181 /* Runtime suspend should only enable wakeup for link changes */
5182 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 5183 int retval = 0;
5184
5185 netif_device_detach(netdev);
5186
5187 if (netif_running(netdev)) {
5188 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5189 e1000e_down(adapter);
5190 e1000_free_irq(adapter);
5191 }
4662e82b 5192 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5193
5194 retval = pci_save_state(pdev);
5195 if (retval)
5196 return retval;
5197
5198 status = er32(STATUS);
5199 if (status & E1000_STATUS_LU)
5200 wufc &= ~E1000_WUFC_LNKC;
5201
5202 if (wufc) {
5203 e1000_setup_rctl(adapter);
5204 e1000_set_multi(netdev);
5205
5206 /* turn on all-multi mode if wake on multicast is enabled */
5207 if (wufc & E1000_WUFC_MC) {
5208 rctl = er32(RCTL);
5209 rctl |= E1000_RCTL_MPE;
5210 ew32(RCTL, rctl);
5211 }
5212
5213 ctrl = er32(CTRL);
5214 /* advertise wake from D3Cold */
5215 #define E1000_CTRL_ADVD3WUC 0x00100000
5216 /* phy power management enable */
5217 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 5218 ctrl |= E1000_CTRL_ADVD3WUC;
5219 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5220 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 5221 ew32(CTRL, ctrl);
5222
318a94d6
JK		 5223 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5224 adapter->hw.phy.media_type ==
5225 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 5226 /* keep the laser running in D3 */
5227 ctrl_ext = er32(CTRL_EXT);
93a23f48 5228 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 5229 ew32(CTRL_EXT, ctrl_ext);
5230 }
5231
97ac8cae
BA		 5232 if (adapter->flags & FLAG_IS_ICH)
5233 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
5234
bc7f75fa
AK		 5235 /* Allow time for pending master requests to run */
5236 e1000e_disable_pcie_master(&adapter->hw);
5237
82776a4b 5238 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 5239 /* enable wakeup by the PHY */
5240 retval = e1000_init_phy_wakeup(adapter, wufc);
5241 if (retval)
5242 return retval;
5243 } else {
5244 /* enable wakeup by the MAC */
5245 ew32(WUFC, wufc);
5246 ew32(WUC, E1000_WUC_PME_EN);
5247 }
bc7f75fa
AK		 5248 } else {
5249 ew32(WUC, 0);
5250 ew32(WUFC, 0);
bc7f75fa
AK		 5251 }
5252
4f9de721
RW		 5253 *enable_wake = !!wufc;
5254
bc7f75fa 5255 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 5256 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5257 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 5258 *enable_wake = true;
bc7f75fa
AK		 5259
5260 if (adapter->hw.phy.type == e1000_phy_igp_3)
5261 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5262
ad68076e
BA		 5263 /*
5264 * Release control of h/w to f/w. If f/w is AMT enabled, this
5265 * would have already happened in close and is redundant.
5266 */
31dbe5b4 5267 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 5268
5269 pci_disable_device(pdev);
5270
4f9de721
RW		 5271 return 0;
5272}
5273
5274static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5275{
5276 if (sleep && wake) {
5277 pci_prepare_to_sleep(pdev);
5278 return;
5279 }
5280
5281 pci_wake_from_d3(pdev, wake);
5282 pci_set_power_state(pdev, PCI_D3hot);
5283}
5284
5285static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5286 bool wake)
5287{
5288 struct net_device *netdev = pci_get_drvdata(pdev);
5289 struct e1000_adapter *adapter = netdev_priv(netdev);
5290
005cbdfc
AD		 5291 /*
5292 * The pci-e switch on some quad port adapters will report a
5293 * correctable error when the MAC transitions from D0 to D3. To
5294 * prevent this we need to mask off the correctable errors on the
5295 * downstream port of the pci-e switch.
5296 */
5297 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5298 struct pci_dev *us_dev = pdev->bus->self;
5299 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5300 u16 devctl;
5301
5302 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5303 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5304 (devctl & ~PCI_EXP_DEVCTL_CERE));
5305
4f9de721 5306 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 5307
5308 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5309 } else {
4f9de721 5310 e1000_power_off(pdev, sleep, wake);
005cbdfc 5311 }
bc7f75fa
AK		 5312}
5313
6f461f6c
BA		 5314#ifdef CONFIG_PCIEASPM
5315static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5316{
5317 pci_disable_link_state(pdev, state);
5318}
5319#else
5320static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 5321{
5322 int pos;
6f461f6c 5323 u16 reg16;
1eae4eb2
AK		 5324
5325 /*
6f461f6c
BA		 5326 * Both device and parent should have the same ASPM setting.
5327 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5328 */
6f461f6c
BA		 5329 pos = pci_pcie_cap(pdev);
5330 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5331 reg16 &= ~state;
5332 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5333
0c75ba22
AB		 5334 if (!pdev->bus->self)
5335 return;
5336
6f461f6c
BA		 5337 pos = pci_pcie_cap(pdev->bus->self);
5338 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5339 reg16 &= ~state;
5340 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5341}
5342#endif
5343void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5344{
5345 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5346 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5347 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5348
5349 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5350}
5351
a0340162 5352#ifdef CONFIG_PM_OPS
23606cf5 5353static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4f9de721 5354{
23606cf5 5355 return !!adapter->tx_ring->buffer_info;
4f9de721
RW		 5356}
5357
23606cf5 5358static int __e1000_resume(struct pci_dev *pdev)
bc7f75fa
AK		 5359{
5360 struct net_device *netdev = pci_get_drvdata(pdev);
5361 struct e1000_adapter *adapter = netdev_priv(netdev);
5362 struct e1000_hw *hw = &adapter->hw;
5363 u32 err;
5364
5365 pci_set_power_state(pdev, PCI_D0);
5366 pci_restore_state(pdev);
28b8f04a 5367 pci_save_state(pdev);
6f461f6c
BA		 5368 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5369 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5370
4662e82b 5371 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5372 if (netif_running(netdev)) {
5373 err = e1000_request_irq(adapter);
5374 if (err)
5375 return err;
5376 }
5377
5378 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5379
5380 /* report the system wakeup cause from S3/S4 */
5381 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5382 u16 phy_data;
5383
5384 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5385 if (phy_data) {
5386 e_info("PHY Wakeup cause - %s\n",
5387 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5388 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5389 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5390 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5391 phy_data & E1000_WUS_LNKC ? "Link Status "
5392 " Change" : "other");
5393 }
5394 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5395 } else {
5396 u32 wus = er32(WUS);
5397 if (wus) {
5398 e_info("MAC Wakeup cause - %s\n",
5399 wus & E1000_WUS_EX ? "Unicast Packet" :
5400 wus & E1000_WUS_MC ? "Multicast Packet" :
5401 wus & E1000_WUS_BC ? "Broadcast Packet" :
5402 wus & E1000_WUS_MAG ? "Magic Packet" :
5403 wus & E1000_WUS_LNKC ? "Link Status Change" :
5404 "other");
5405 }
5406 ew32(WUS, ~0);
5407 }
5408
bc7f75fa 5409 e1000e_reset(adapter);
bc7f75fa 5410
cd791618 5411 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5412
5413 if (netif_running(netdev))
5414 e1000e_up(adapter);
5415
5416 netif_device_attach(netdev);
5417
ad68076e
BA		 5418 /*
5419 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5420 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5421 * under the control of the driver.
5422 */
c43bc57e 5423 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5424 e1000e_get_hw_control(adapter);
bc7f75fa
AK		 5425
5426 return 0;
5427}
23606cf5 5428
a0340162
RW		 5429#ifdef CONFIG_PM_SLEEP
5430static int e1000_suspend(struct device *dev)
5431{
5432 struct pci_dev *pdev = to_pci_dev(dev);
5433 int retval;
5434 bool wake;
5435
5436 retval = __e1000_shutdown(pdev, &wake, false);
5437 if (!retval)
5438 e1000_complete_shutdown(pdev, true, wake);
5439
5440 return retval;
5441}
5442
23606cf5
RW		 5443static int e1000_resume(struct device *dev)
5444{
5445 struct pci_dev *pdev = to_pci_dev(dev);
5446 struct net_device *netdev = pci_get_drvdata(pdev);
5447 struct e1000_adapter *adapter = netdev_priv(netdev);
5448
5449 if (e1000e_pm_ready(adapter))
5450 adapter->idle_check = true;
5451
5452 return __e1000_resume(pdev);
5453}
a0340162
RW		 5454#endif /* CONFIG_PM_SLEEP */
5455
5456#ifdef CONFIG_PM_RUNTIME
5457static int e1000_runtime_suspend(struct device *dev)
5458{
5459 struct pci_dev *pdev = to_pci_dev(dev);
5460 struct net_device *netdev = pci_get_drvdata(pdev);
5461 struct e1000_adapter *adapter = netdev_priv(netdev);
5462
5463 if (e1000e_pm_ready(adapter)) {
5464 bool wake;
5465
5466 __e1000_shutdown(pdev, &wake, true);
5467 }
5468
5469 return 0;
5470}
5471
5472static int e1000_idle(struct device *dev)
5473{
5474 struct pci_dev *pdev = to_pci_dev(dev);
5475 struct net_device *netdev = pci_get_drvdata(pdev);
5476 struct e1000_adapter *adapter = netdev_priv(netdev);
5477
5478 if (!e1000e_pm_ready(adapter))
5479 return 0;
5480
5481 if (adapter->idle_check) {
5482 adapter->idle_check = false;
5483 if (!e1000e_has_link(adapter))
5484 pm_schedule_suspend(dev, MSEC_PER_SEC);
5485 }
5486
5487 return -EBUSY;
5488}
23606cf5
RW		 5489
5490static int e1000_runtime_resume(struct device *dev)
5491{
5492 struct pci_dev *pdev = to_pci_dev(dev);
5493 struct net_device *netdev = pci_get_drvdata(pdev);
5494 struct e1000_adapter *adapter = netdev_priv(netdev);
5495
5496 if (!e1000e_pm_ready(adapter))
5497 return 0;
5498
5499 adapter->idle_check = !dev->power.runtime_auto;
5500 return __e1000_resume(pdev);
5501}
a0340162
RW		 5502#endif /* CONFIG_PM_RUNTIME */
5503#endif /* CONFIG_PM_OPS */
bc7f75fa
AK		 5504
5505static void e1000_shutdown(struct pci_dev *pdev)
5506{
4f9de721
RW		 5507 bool wake = false;
5508
23606cf5 5509 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5510
5511 if (system_state == SYSTEM_POWER_OFF)
5512 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5513}
5514
5515#ifdef CONFIG_NET_POLL_CONTROLLER
147b2c8c
DD		 5516
5517static irqreturn_t e1000_intr_msix(int irq, void *data)
5518{
5519 struct net_device *netdev = data;
5520 struct e1000_adapter *adapter = netdev_priv(netdev);
5521 int vector, msix_irq;
5522
5523 if (adapter->msix_entries) {
5524 vector = 0;
5525 msix_irq = adapter->msix_entries[vector].vector;
5526 disable_irq(msix_irq);
5527 e1000_intr_msix_rx(msix_irq, netdev);
5528 enable_irq(msix_irq);
5529
5530 vector++;
5531 msix_irq = adapter->msix_entries[vector].vector;
5532 disable_irq(msix_irq);
5533 e1000_intr_msix_tx(msix_irq, netdev);
5534 enable_irq(msix_irq);
5535
5536 vector++;
5537 msix_irq = adapter->msix_entries[vector].vector;
5538 disable_irq(msix_irq);
5539 e1000_msix_other(msix_irq, netdev);
5540 enable_irq(msix_irq);
5541 }
5542
5543 return IRQ_HANDLED;
5544}
5545
bc7f75fa
AK		 5546/*
5547 * Polling 'interrupt' - used by things like netconsole to send skbs
5548 * without having to re-enable interrupts. It's not called while
5549 * the interrupt routine is executing.
5550 */
5551static void e1000_netpoll(struct net_device *netdev)
5552{
5553 struct e1000_adapter *adapter = netdev_priv(netdev);
5554
147b2c8c
DD		 5555 switch (adapter->int_mode) {
5556 case E1000E_INT_MODE_MSIX:
5557 e1000_intr_msix(adapter->pdev->irq, netdev);
5558 break;
5559 case E1000E_INT_MODE_MSI:
5560 disable_irq(adapter->pdev->irq);
5561 e1000_intr_msi(adapter->pdev->irq, netdev);
5562 enable_irq(adapter->pdev->irq);
5563 break;
5564 default: /* E1000E_INT_MODE_LEGACY */
5565 disable_irq(adapter->pdev->irq);
5566 e1000_intr(adapter->pdev->irq, netdev);
5567 enable_irq(adapter->pdev->irq);
5568 break;
5569 }
bc7f75fa
AK		 5570}
5571#endif
5572
5573/**
5574 * e1000_io_error_detected - called when PCI error is detected
5575 * @pdev: Pointer to PCI device
5576 * @state: The current pci connection state
5577 *
5578 * This function is called after a PCI bus error affecting
5579 * this device has been detected.
5580 */
5581static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5582 pci_channel_state_t state)
5583{
5584 struct net_device *netdev = pci_get_drvdata(pdev);
5585 struct e1000_adapter *adapter = netdev_priv(netdev);
5586
5587 netif_device_detach(netdev);
5588
c93b5a76
MM		 5589 if (state == pci_channel_io_perm_failure)
5590 return PCI_ERS_RESULT_DISCONNECT;
5591
bc7f75fa
AK		 5592 if (netif_running(netdev))
5593 e1000e_down(adapter);
5594 pci_disable_device(pdev);
5595
5596 /* Request a slot slot reset. */
5597 return PCI_ERS_RESULT_NEED_RESET;
5598}
5599
5600/**
5601 * e1000_io_slot_reset - called after the pci bus has been reset.
5602 * @pdev: Pointer to PCI device
5603 *
5604 * Restart the card from scratch, as if from a cold-boot. Implementation
5605 * resembles the first-half of the e1000_resume routine.
5606 */
5607static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5608{
5609 struct net_device *netdev = pci_get_drvdata(pdev);
5610 struct e1000_adapter *adapter = netdev_priv(netdev);
5611 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 5612 int err;
111b9dc5 5613 pci_ers_result_t result;
bc7f75fa 5614
6f461f6c
BA		 5615 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5616 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 5617 err = pci_enable_device_mem(pdev);
6e4f6f6b 5618 if (err) {
bc7f75fa
AK		 5619 dev_err(&pdev->dev,
5620 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5621 result = PCI_ERS_RESULT_DISCONNECT;
5622 } else {
5623 pci_set_master(pdev);
23606cf5 5624 pdev->state_saved = true;
111b9dc5 5625 pci_restore_state(pdev);
bc7f75fa 5626
111b9dc5
JB		 5627 pci_enable_wake(pdev, PCI_D3hot, 0);
5628 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5629
111b9dc5
JB		 5630 e1000e_reset(adapter);
5631 ew32(WUS, ~0);
5632 result = PCI_ERS_RESULT_RECOVERED;
5633 }
bc7f75fa 5634
111b9dc5
JB		 5635 pci_cleanup_aer_uncorrect_error_status(pdev);
5636
5637 return result;
bc7f75fa
AK		 5638}
5639
5640/**
5641 * e1000_io_resume - called when traffic can start flowing again.
5642 * @pdev: Pointer to PCI device
5643 *
5644 * This callback is called when the error recovery driver tells us that
5645 * its OK to resume normal operation. Implementation resembles the
5646 * second-half of the e1000_resume routine.
5647 */
5648static void e1000_io_resume(struct pci_dev *pdev)
5649{
5650 struct net_device *netdev = pci_get_drvdata(pdev);
5651 struct e1000_adapter *adapter = netdev_priv(netdev);
5652
cd791618 5653 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5654
5655 if (netif_running(netdev)) {
5656 if (e1000e_up(adapter)) {
5657 dev_err(&pdev->dev,
5658 "can't bring device back up after reset\n");
5659 return;
5660 }
5661 }
5662
5663 netif_device_attach(netdev);
5664
ad68076e
BA		 5665 /*
5666 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5667 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5668 * under the control of the driver.
5669 */
c43bc57e 5670 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5671 e1000e_get_hw_control(adapter);
bc7f75fa
AK		 5672
5673}
5674
5675static void e1000_print_device_info(struct e1000_adapter *adapter)
5676{
5677 struct e1000_hw *hw = &adapter->hw;
5678 struct net_device *netdev = adapter->netdev;
073287c0
BA		 5679 u32 ret_val;
5680 u8 pba_str[E1000_PBANUM_LENGTH];
bc7f75fa
AK		 5681
5682 /* print bus type/speed/width info */
7c510e4b 5683 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 5684 /* bus width */
5685 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5686 "Width x1"),
5687 /* MAC address */
7c510e4b 5688 netdev->dev_addr);
44defeb3
JK		 5689 e_info("Intel(R) PRO/%s Network Connection\n",
5690 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
073287c0
BA		 5691 ret_val = e1000_read_pba_string_generic(hw, pba_str,
5692 E1000_PBANUM_LENGTH);
5693 if (ret_val)
e0dc4f12 5694 strncpy((char *)pba_str, "Unknown", sizeof(pba_str) - 1);
073287c0
BA		 5695 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
5696 hw->mac.type, hw->phy.type, pba_str);
bc7f75fa
AK		 5697}
5698
10aa4c04
AK		 5699static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5700{
5701 struct e1000_hw *hw = &adapter->hw;
5702 int ret_val;
5703 u16 buf = 0;
5704
5705 if (hw->mac.type != e1000_82573)
5706 return;
5707
5708 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5709 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5710 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 5711 dev_warn(&adapter->pdev->dev,
5712 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5713 }
10aa4c04
AK		 5714}
5715
651c2466
SH		 5716static const struct net_device_ops e1000e_netdev_ops = {
5717 .ndo_open = e1000_open,
5718 .ndo_stop = e1000_close,
00829823 5719 .ndo_start_xmit = e1000_xmit_frame,
67fd4fcb 5720 .ndo_get_stats64 = e1000e_get_stats64,
651c2466
SH		 5721 .ndo_set_multicast_list = e1000_set_multi,
5722 .ndo_set_mac_address = e1000_set_mac,
5723 .ndo_change_mtu = e1000_change_mtu,
5724 .ndo_do_ioctl = e1000_ioctl,
5725 .ndo_tx_timeout = e1000_tx_timeout,
5726 .ndo_validate_addr = eth_validate_addr,
5727
5728 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5729 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5730 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5731#ifdef CONFIG_NET_POLL_CONTROLLER
5732 .ndo_poll_controller = e1000_netpoll,
5733#endif
5734};
5735
bc7f75fa
AK		 5736/**
5737 * e1000_probe - Device Initialization Routine
5738 * @pdev: PCI device information struct
5739 * @ent: entry in e1000_pci_tbl
5740 *
5741 * Returns 0 on success, negative on failure
5742 *
5743 * e1000_probe initializes an adapter identified by a pci_dev structure.
5744 * The OS initialization, configuring of the adapter private structure,
5745 * and a hardware reset occur.
5746 **/
5747static int __devinit e1000_probe(struct pci_dev *pdev,
5748 const struct pci_device_id *ent)
5749{
5750 struct net_device *netdev;
5751 struct e1000_adapter *adapter;
5752 struct e1000_hw *hw;
5753 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5754 resource_size_t mmio_start, mmio_len;
5755 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5756
5757 static int cards_found;
5758 int i, err, pci_using_dac;
5759 u16 eeprom_data = 0;
5760 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5761
6f461f6c
BA		 5762 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5763 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5764
f0f422e5 5765 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5766 if (err)
5767 return err;
5768
5769 pci_using_dac = 0;
0be3f55f 5770 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5771 if (!err) {
0be3f55f 5772 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5773 if (!err)
5774 pci_using_dac = 1;
5775 } else {
0be3f55f 5776 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5777 if (err) {
0be3f55f
NN		 5778 err = dma_set_coherent_mask(&pdev->dev,
5779 DMA_BIT_MASK(32));
bc7f75fa
AK		 5780 if (err) {
5781 dev_err(&pdev->dev, "No usable DMA "
5782 "configuration, aborting\n");
5783 goto err_dma;
5784 }
5785 }
5786 }
5787
e8de1481 5788 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5789 pci_select_bars(pdev, IORESOURCE_MEM),
5790 e1000e_driver_name);
bc7f75fa
AK		 5791 if (err)
5792 goto err_pci_reg;
5793
68eac460 5794 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5795 pci_enable_pcie_error_reporting(pdev);
68eac460 5796
bc7f75fa 5797 pci_set_master(pdev);
438b365a
BA		 5798 /* PCI config space info */
5799 err = pci_save_state(pdev);
5800 if (err)
5801 goto err_alloc_etherdev;
bc7f75fa
AK		 5802
5803 err = -ENOMEM;
5804 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5805 if (!netdev)
5806 goto err_alloc_etherdev;
5807
bc7f75fa
AK		 5808 SET_NETDEV_DEV(netdev, &pdev->dev);
5809
f85e4dfa
TH		 5810 netdev->irq = pdev->irq;
5811
bc7f75fa
AK		 5812 pci_set_drvdata(pdev, netdev);
5813 adapter = netdev_priv(netdev);
5814 hw = &adapter->hw;
5815 adapter->netdev = netdev;
5816 adapter->pdev = pdev;
5817 adapter->ei = ei;
5818 adapter->pba = ei->pba;
5819 adapter->flags = ei->flags;
eb7c3adb 5820 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5821 adapter->hw.adapter = adapter;
5822 adapter->hw.mac.type = ei->mac;
2adc55c9 5823 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5824 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5825
5826 mmio_start = pci_resource_start(pdev, 0);
5827 mmio_len = pci_resource_len(pdev, 0);
5828
5829 err = -EIO;
5830 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5831 if (!adapter->hw.hw_addr)
5832 goto err_ioremap;
5833
5834 if ((adapter->flags & FLAG_HAS_FLASH) &&
5835 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5836 flash_start = pci_resource_start(pdev, 1);
5837 flash_len = pci_resource_len(pdev, 1);
5838 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5839 if (!adapter->hw.flash_address)
5840 goto err_flashmap;
5841 }
5842
5843 /* construct the net_device struct */
651c2466 5844 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5845 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5846 netdev->watchdog_timeo = 5 * HZ;
5847 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5848 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5849
5850 netdev->mem_start = mmio_start;
5851 netdev->mem_end = mmio_start + mmio_len;
5852
5853 adapter->bd_number = cards_found++;
5854
4662e82b
BA		 5855 e1000e_check_options(adapter);
5856
bc7f75fa
AK		 5857 /* setup adapter struct */
5858 err = e1000_sw_init(adapter);
5859 if (err)
5860 goto err_sw_init;
5861
bc7f75fa
AK		 5862 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5863 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5864 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5865
69e3fd8c 5866 err = ei->get_variants(adapter);
bc7f75fa
AK		 5867 if (err)
5868 goto err_hw_init;
5869
4a770358
BA		 5870 if ((adapter->flags & FLAG_IS_ICH) &&
5871 (adapter->flags & FLAG_READ_ONLY_NVM))
5872 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5873
bc7f75fa
AK		 5874 hw->mac.ops.get_bus_info(&adapter->hw);
5875
318a94d6 5876 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5877
5878 /* Copper options */
318a94d6 5879 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5880 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5881 adapter->hw.phy.disable_polarity_correction = 0;
5882 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5883 }
5884
5885 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5886 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5887
5888 netdev->features = NETIF_F_SG |
5889 NETIF_F_HW_CSUM |
5890 NETIF_F_HW_VLAN_TX |
5891 NETIF_F_HW_VLAN_RX;
5892
5893 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5894 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5895
5896 netdev->features |= NETIF_F_TSO;
5897 netdev->features |= NETIF_F_TSO6;
5898
a5136e23
JK		 5899 netdev->vlan_features |= NETIF_F_TSO;
5900 netdev->vlan_features |= NETIF_F_TSO6;
5901 netdev->vlan_features |= NETIF_F_HW_CSUM;
5902 netdev->vlan_features |= NETIF_F_SG;
5903
7b872a55 5904 if (pci_using_dac) {
bc7f75fa 5905 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 5906 netdev->vlan_features |= NETIF_F_HIGHDMA;
5907 }
bc7f75fa 5908
bc7f75fa
AK		 5909 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5910 adapter->flags |= FLAG_MNG_PT_ENABLED;
5911
ad68076e
BA		 5912 /*
5913 * before reading the NVM, reset the controller to
5914 * put the device in a known good starting state
5915 */
bc7f75fa
AK		 5916 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5917
5918 /*
5919 * systems with ASPM and others may see the checksum fail on the first
5920 * attempt. Let's give it a few tries
5921 */
5922 for (i = 0;; i++) {
5923 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5924 break;
5925 if (i == 2) {
44defeb3 5926 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5927 err = -EIO;
5928 goto err_eeprom;
5929 }
5930 }
5931
10aa4c04
AK		 5932 e1000_eeprom_checks(adapter);
5933
608f8a0d 5934 /* copy the MAC address */
bc7f75fa 5935 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5936 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5937
5938 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5939 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5940
5941 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5942 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5943 err = -EIO;
5944 goto err_eeprom;
5945 }
5946
5947 init_timer(&adapter->watchdog_timer);
c061b18d 5948 adapter->watchdog_timer.function = e1000_watchdog;
bc7f75fa
AK		 5949 adapter->watchdog_timer.data = (unsigned long) adapter;
5950
5951 init_timer(&adapter->phy_info_timer);
c061b18d 5952 adapter->phy_info_timer.function = e1000_update_phy_info;
bc7f75fa
AK		 5953 adapter->phy_info_timer.data = (unsigned long) adapter;
5954
5955 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5956 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5957 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5958 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5959 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
9633e63b 5960 INIT_WORK(&adapter->led_blink_task, e1000e_led_blink_task);
bc7f75fa 5961
bc7f75fa
AK		 5962 /* Initialize link parameters. User can change them with ethtool */
5963 adapter->hw.mac.autoneg = 1;
309af40b 5964 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5965 adapter->hw.fc.requested_mode = e1000_fc_default;
5966 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5967 adapter->hw.phy.autoneg_advertised = 0x2f;
5968
5969 /* ring size defaults */
5970 adapter->rx_ring->count = 256;
5971 adapter->tx_ring->count = 256;
5972
5973 /*
5974 * Initial Wake on LAN setting - If APM wake is enabled in
5975 * the EEPROM, enable the ACPI Magic Packet filter
5976 */
5977 if (adapter->flags & FLAG_APME_IN_WUC) {
5978 /* APME bit in EEPROM is mapped to WUC.APME */
5979 eeprom_data = er32(WUC);
5980 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5981 if (eeprom_data & E1000_WUC_PHY_WAKE)
5982 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5983 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5984 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5985 (adapter->hw.bus.func == 1))
5986 e1000_read_nvm(&adapter->hw,
5987 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5988 else
5989 e1000_read_nvm(&adapter->hw,
5990 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5991 }
5992
5993 /* fetch WoL from EEPROM */
5994 if (eeprom_data & eeprom_apme_mask)
5995 adapter->eeprom_wol |= E1000_WUFC_MAG;
5996
5997 /*
5998 * now that we have the eeprom settings, apply the special cases
5999 * where the eeprom may be wrong or the board simply won't support
6000 * wake on lan on a particular port
6001 */
6002 if (!(adapter->flags & FLAG_HAS_WOL))
6003 adapter->eeprom_wol = 0;
6004
6005 /* initialize the wol settings based on the eeprom settings */
6006 adapter->wol = adapter->eeprom_wol;
6ff68026 6007 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 6008
84527590
BA		 6009 /* save off EEPROM version number */
6010 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
6011
bc7f75fa
AK		 6012 /* reset the hardware with the new settings */
6013 e1000e_reset(adapter);
6014
ad68076e
BA		 6015 /*
6016 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 6017 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 6018 * under the control of the driver.
6019 */
c43bc57e 6020 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 6021 e1000e_get_hw_control(adapter);
bc7f75fa 6022
e0dc4f12 6023 strncpy(netdev->name, "eth%d", sizeof(netdev->name) - 1);
bc7f75fa
AK		 6024 err = register_netdev(netdev);
6025 if (err)
6026 goto err_register;
6027
9c563d20
JB		 6028 /* carrier off reporting is important to ethtool even BEFORE open */
6029 netif_carrier_off(netdev);
6030
bc7f75fa
AK		 6031 e1000_print_device_info(adapter);
6032
f3ec4f87
AS		 6033 if (pci_dev_run_wake(pdev))
6034 pm_runtime_put_noidle(&pdev->dev);
23606cf5 6035
bc7f75fa
AK		 6036 return 0;
6037
6038err_register:
c43bc57e 6039 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 6040 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 6041err_eeprom:
6042 if (!e1000_check_reset_block(&adapter->hw))
6043 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 6044err_hw_init:
bc7f75fa
AK		 6045 kfree(adapter->tx_ring);
6046 kfree(adapter->rx_ring);
6047err_sw_init:
c43bc57e
JB		 6048 if (adapter->hw.flash_address)
6049 iounmap(adapter->hw.flash_address);
e82f54ba 6050 e1000e_reset_interrupt_capability(adapter);
c43bc57e 6051err_flashmap:
bc7f75fa
AK		 6052 iounmap(adapter->hw.hw_addr);
6053err_ioremap:
6054 free_netdev(netdev);
6055err_alloc_etherdev:
f0f422e5
BA		 6056 pci_release_selected_regions(pdev,
6057 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6058err_pci_reg:
6059err_dma:
6060 pci_disable_device(pdev);
6061 return err;
6062}
6063
6064/**
6065 * e1000_remove - Device Removal Routine
6066 * @pdev: PCI device information struct
6067 *
6068 * e1000_remove is called by the PCI subsystem to alert the driver
6069 * that it should release a PCI device. The could be caused by a
6070 * Hot-Plug event, or because the driver is going to be removed from
6071 * memory.
6072 **/
6073static void __devexit e1000_remove(struct pci_dev *pdev)
6074{
6075 struct net_device *netdev = pci_get_drvdata(pdev);
6076 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 6077 bool down = test_bit(__E1000_DOWN, &adapter->state);
6078
ad68076e 6079 /*
23f333a2
TH		 6080 * The timers may be rescheduled, so explicitly disable them
6081 * from being rescheduled.
ad68076e 6082 */
23606cf5
RW		 6083 if (!down)
6084 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 6085 del_timer_sync(&adapter->watchdog_timer);
6086 del_timer_sync(&adapter->phy_info_timer);
6087
41cec6f1
BA		 6088 cancel_work_sync(&adapter->reset_task);
6089 cancel_work_sync(&adapter->watchdog_task);
6090 cancel_work_sync(&adapter->downshift_task);
6091 cancel_work_sync(&adapter->update_phy_task);
23f333a2 6092 cancel_work_sync(&adapter->led_blink_task);
41cec6f1 6093 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa 6094
17f208de
BA		 6095 if (!(netdev->flags & IFF_UP))
6096 e1000_power_down_phy(adapter);
6097
23606cf5
RW		 6098 /* Don't lie to e1000_close() down the road. */
6099 if (!down)
6100 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 6101 unregister_netdev(netdev);
6102
f3ec4f87
AS		 6103 if (pci_dev_run_wake(pdev))
6104 pm_runtime_get_noresume(&pdev->dev);
23606cf5 6105
ad68076e
BA		 6106 /*
6107 * Release control of h/w to f/w. If f/w is AMT enabled, this
6108 * would have already happened in close and is redundant.
6109 */
31dbe5b4 6110 e1000e_release_hw_control(adapter);
bc7f75fa 6111
4662e82b 6112 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 6113 kfree(adapter->tx_ring);
6114 kfree(adapter->rx_ring);
6115
6116 iounmap(adapter->hw.hw_addr);
6117 if (adapter->hw.flash_address)
6118 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 6119 pci_release_selected_regions(pdev,
6120 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6121
6122 free_netdev(netdev);
6123
111b9dc5 6124 /* AER disable */
19d5afd4 6125 pci_disable_pcie_error_reporting(pdev);
111b9dc5 6126
bc7f75fa
AK		 6127 pci_disable_device(pdev);
6128}
6129
6130/* PCI Error Recovery (ERS) */
6131static struct pci_error_handlers e1000_err_handler = {
6132 .error_detected = e1000_io_error_detected,
6133 .slot_reset = e1000_io_slot_reset,
6134 .resume = e1000_io_resume,
6135};
6136
a3aa1884 6137static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 6138 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6139 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6140 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6141 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
6142 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6143 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 6144 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6145 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6146 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 6147
bc7f75fa
AK		 6148 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6149 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6150 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6151 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 6152
bc7f75fa
AK		 6153 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6154 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6155 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 6156
4662e82b 6157 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 6158 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 6159 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 6160
bc7f75fa
AK		 6161 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6162 board_80003es2lan },
6163 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6164 board_80003es2lan },
6165 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6166 board_80003es2lan },
6167 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6168 board_80003es2lan },
ad68076e 6169
bc7f75fa
AK		 6170 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6171 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6172 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6173 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6174 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6175 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6176 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 6177 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 6178
bc7f75fa
AK		 6179 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6180 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6181 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6182 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6183 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 6184 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 6185 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6186 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6187 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6188
6189 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6190 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6191 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 6192
f4187b56
BA		 6193 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
6194 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
10df0b91 6195 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
f4187b56 6196
a4f58f54
BA		 6197 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6198 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6199 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6200 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6201
d3738bb8
BA		 6202 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6203 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6204
bc7f75fa
AK		 6205 { } /* terminate list */
6206};
6207MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6208
a0340162 6209#ifdef CONFIG_PM_OPS
23606cf5 6210static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 6211 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6212 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6213 e1000_runtime_resume, e1000_idle)
23606cf5 6214};
e50208a0 6215#endif
23606cf5 6216
bc7f75fa
AK		 6217/* PCI Device API Driver */
6218static struct pci_driver e1000_driver = {
6219 .name = e1000e_driver_name,
6220 .id_table = e1000_pci_tbl,
6221 .probe = e1000_probe,
6222 .remove = __devexit_p(e1000_remove),
a0340162 6223#ifdef CONFIG_PM_OPS
23606cf5 6224 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 6225#endif
6226 .shutdown = e1000_shutdown,
6227 .err_handler = &e1000_err_handler
6228};
6229
6230/**
6231 * e1000_init_module - Driver Registration Routine
6232 *
6233 * e1000_init_module is the first routine called when the driver is
6234 * loaded. All it does is register with the PCI subsystem.
6235 **/
6236static int __init e1000_init_module(void)
6237{
6238 int ret;
8544b9f7
BA		 6239 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6240 e1000e_driver_version);
0d6057e4 6241 pr_info("Copyright(c) 1999 - 2011 Intel Corporation.\n");
bc7f75fa 6242 ret = pci_register_driver(&e1000_driver);
53ec5498 6243
bc7f75fa
AK		 6244 return ret;
6245}
6246module_init(e1000_init_module);
6247
6248/**
6249 * e1000_exit_module - Driver Exit Cleanup Routine
6250 *
6251 * e1000_exit_module is called just before the driver is removed
6252 * from memory.
6253 **/
6254static void __exit e1000_exit_module(void)
6255{
6256 pci_unregister_driver(&e1000_driver);
6257}
6258module_exit(e1000_exit_module);
6259
6260
6261MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6262MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6263MODULE_LICENSE("GPL");
6264MODULE_VERSION(DRV_VERSION);
6265
6266/* e1000_main.c */
Linux 6.x block layer and io_uring tree(s)