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e1000: Fix mii-tool access to setting speed and duplex
[linux-block.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
2648345f 4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
31/* Change Log
0f15a8fa
JK		 32 * 7.0.33 3-Feb-2006
33 * o Added another fix for the pass false carrier bit
34 * 7.0.32 24-Jan-2006
35 * o Need to rebuild with noew version number for the pass false carrier
36 * fix in e1000_hw.c
37 * 7.0.30 18-Jan-2006
38 * o fixup for tso workaround to disable it for pci-x
39 * o fix mem leak on 82542
40 * o fixes for 10 Mb/s connections and incorrect stats
41 * 7.0.28 01/06/2006
42 * o hardware workaround to only set "speed mode" bit for 1G link.
43 * 7.0.26 12/23/2005
44 * o wake on lan support modified for device ID 10B5
45 * o fix dhcp + vlan issue not making it to the iAMT firmware
46 * 7.0.24 12/9/2005
47 * o New hardware support for the Gigabit NIC embedded in the south bridge
48 * o Fixes to the recycling logic (skb->tail) from IBM LTC
73629bbc
JB		 49 * 6.3.9 12/16/2005
50 * o incorporate fix for recycled skbs from IBM LTC
51 * 6.3.7 11/18/2005
52 * o Honor eeprom setting for enabling/disabling Wake On Lan
53 * 6.3.5 11/17/2005
54 * o Fix memory leak in rx ring handling for PCI Express adapters
55 * 6.3.4 11/8/05
56 * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
57 * 6.3.2 9/20/05
58 * o Render logic that sets/resets DRV_LOAD as inline functions to
59 * avoid code replication. If f/w is AMT then set DRV_LOAD only when
60 * network interface is open.
61 * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
62 * o Adjust PBA partioning for Jumbo frames using MTU size and not
63 * rx_buffer_len
64 * 6.3.1 9/19/05
65 * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
0f15a8fa 66 * (e1000_clean_tx_irq)
73629bbc 67 * o Support for 8086:10B5 device (Quad Port)
1da177e4
LT		 68 */
69
70char e1000_driver_name[] = "e1000";
3ad2cc67 71static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 72#ifndef CONFIG_E1000_NAPI
73#define DRIVERNAPI
74#else
75#define DRIVERNAPI "-NAPI"
76#endif
c1605eb3 77#define DRV_VERSION "7.0.33-k2"DRIVERNAPI
1da177e4 78char e1000_driver_version[] = DRV_VERSION;
3ad2cc67 79static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 80
81/* e1000_pci_tbl - PCI Device ID Table
82 *
83 * Last entry must be all 0s
84 *
85 * Macro expands to...
86 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
87 */
88static struct pci_device_id e1000_pci_tbl[] = {
89 INTEL_E1000_ETHERNET_DEVICE(0x1000),
90 INTEL_E1000_ETHERNET_DEVICE(0x1001),
91 INTEL_E1000_ETHERNET_DEVICE(0x1004),
92 INTEL_E1000_ETHERNET_DEVICE(0x1008),
93 INTEL_E1000_ETHERNET_DEVICE(0x1009),
94 INTEL_E1000_ETHERNET_DEVICE(0x100C),
95 INTEL_E1000_ETHERNET_DEVICE(0x100D),
96 INTEL_E1000_ETHERNET_DEVICE(0x100E),
97 INTEL_E1000_ETHERNET_DEVICE(0x100F),
98 INTEL_E1000_ETHERNET_DEVICE(0x1010),
99 INTEL_E1000_ETHERNET_DEVICE(0x1011),
100 INTEL_E1000_ETHERNET_DEVICE(0x1012),
101 INTEL_E1000_ETHERNET_DEVICE(0x1013),
102 INTEL_E1000_ETHERNET_DEVICE(0x1014),
103 INTEL_E1000_ETHERNET_DEVICE(0x1015),
104 INTEL_E1000_ETHERNET_DEVICE(0x1016),
105 INTEL_E1000_ETHERNET_DEVICE(0x1017),
106 INTEL_E1000_ETHERNET_DEVICE(0x1018),
107 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 108 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 109 INTEL_E1000_ETHERNET_DEVICE(0x101D),
110 INTEL_E1000_ETHERNET_DEVICE(0x101E),
111 INTEL_E1000_ETHERNET_DEVICE(0x1026),
112 INTEL_E1000_ETHERNET_DEVICE(0x1027),
113 INTEL_E1000_ETHERNET_DEVICE(0x1028),
07b8fede
MC		 114 INTEL_E1000_ETHERNET_DEVICE(0x105E),
115 INTEL_E1000_ETHERNET_DEVICE(0x105F),
116 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 117 INTEL_E1000_ETHERNET_DEVICE(0x1075),
118 INTEL_E1000_ETHERNET_DEVICE(0x1076),
119 INTEL_E1000_ETHERNET_DEVICE(0x1077),
120 INTEL_E1000_ETHERNET_DEVICE(0x1078),
121 INTEL_E1000_ETHERNET_DEVICE(0x1079),
122 INTEL_E1000_ETHERNET_DEVICE(0x107A),
123 INTEL_E1000_ETHERNET_DEVICE(0x107B),
124 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 125 INTEL_E1000_ETHERNET_DEVICE(0x107D),
126 INTEL_E1000_ETHERNET_DEVICE(0x107E),
127 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 128 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 129 INTEL_E1000_ETHERNET_DEVICE(0x108B),
130 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 131 INTEL_E1000_ETHERNET_DEVICE(0x1096),
132 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 133 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 134 INTEL_E1000_ETHERNET_DEVICE(0x109A),
b7ee49db 135 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 136 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
1da177e4
LT		 137 /* required last entry */
138 {0,}
139};
140
141MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
142
143int e1000_up(struct e1000_adapter *adapter);
144void e1000_down(struct e1000_adapter *adapter);
145void e1000_reset(struct e1000_adapter *adapter);
146int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
581d708e
MC		 147int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
148int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
149void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
150void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 151static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 152 struct e1000_tx_ring *txdr);
3ad2cc67 153static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 154 struct e1000_rx_ring *rxdr);
3ad2cc67 155static void e1000_free_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 156 struct e1000_tx_ring *tx_ring);
3ad2cc67 157static void e1000_free_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 158 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 159void e1000_update_stats(struct e1000_adapter *adapter);
160
161/* Local Function Prototypes */
162
163static int e1000_init_module(void);
164static void e1000_exit_module(void);
165static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
166static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 167static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 168static int e1000_sw_init(struct e1000_adapter *adapter);
169static int e1000_open(struct net_device *netdev);
170static int e1000_close(struct net_device *netdev);
171static void e1000_configure_tx(struct e1000_adapter *adapter);
172static void e1000_configure_rx(struct e1000_adapter *adapter);
173static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 174static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
175static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
176static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
177 struct e1000_tx_ring *tx_ring);
178static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
179 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 180static void e1000_set_multi(struct net_device *netdev);
181static void e1000_update_phy_info(unsigned long data);
182static void e1000_watchdog(unsigned long data);
183static void e1000_watchdog_task(struct e1000_adapter *adapter);
184static void e1000_82547_tx_fifo_stall(unsigned long data);
185static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
186static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
187static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
188static int e1000_set_mac(struct net_device *netdev, void *p);
189static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 190static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
191 struct e1000_tx_ring *tx_ring);
1da177e4 192#ifdef CONFIG_E1000_NAPI
581d708e 193static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 194static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 195 struct e1000_rx_ring *rx_ring,
1da177e4 196 int *work_done, int work_to_do);
2d7edb92 197static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 198 struct e1000_rx_ring *rx_ring,
2d7edb92 199 int *work_done, int work_to_do);
1da177e4 200#else
581d708e
MC		 201static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
202 struct e1000_rx_ring *rx_ring);
203static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
204 struct e1000_rx_ring *rx_ring);
1da177e4 205#endif
581d708e 206static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 207 struct e1000_rx_ring *rx_ring,
208 int cleaned_count);
581d708e 209static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 210 struct e1000_rx_ring *rx_ring,
211 int cleaned_count);
1da177e4
LT		 212static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
213static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
214 int cmd);
215void e1000_set_ethtool_ops(struct net_device *netdev);
216static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
217static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
218static void e1000_tx_timeout(struct net_device *dev);
87041639 219static void e1000_reset_task(struct net_device *dev);
1da177e4
LT		 220static void e1000_smartspeed(struct e1000_adapter *adapter);
221static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
222 struct sk_buff *skb);
223
224static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
225static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
226static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
227static void e1000_restore_vlan(struct e1000_adapter *adapter);
228
1da177e4 229#ifdef CONFIG_PM
977e74b5 230static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 231static int e1000_resume(struct pci_dev *pdev);
232#endif
233
234#ifdef CONFIG_NET_POLL_CONTROLLER
235/* for netdump / net console */
236static void e1000_netpoll (struct net_device *netdev);
237#endif
238
24025e4e 239
1da177e4
LT		 240/* Exported from other modules */
241
242extern void e1000_check_options(struct e1000_adapter *adapter);
243
244static struct pci_driver e1000_driver = {
245 .name = e1000_driver_name,
246 .id_table = e1000_pci_tbl,
247 .probe = e1000_probe,
248 .remove = __devexit_p(e1000_remove),
249 /* Power Managment Hooks */
250#ifdef CONFIG_PM
251 .suspend = e1000_suspend,
252 .resume = e1000_resume
253#endif
254};
255
256MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
257MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
258MODULE_LICENSE("GPL");
259MODULE_VERSION(DRV_VERSION);
260
261static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
262module_param(debug, int, 0);
263MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
264
265/**
266 * e1000_init_module - Driver Registration Routine
267 *
268 * e1000_init_module is the first routine called when the driver is
269 * loaded. All it does is register with the PCI subsystem.
270 **/
271
272static int __init
273e1000_init_module(void)
274{
275 int ret;
276 printk(KERN_INFO "%s - version %s\n",
277 e1000_driver_string, e1000_driver_version);
278
279 printk(KERN_INFO "%s\n", e1000_copyright);
280
281 ret = pci_module_init(&e1000_driver);
8b378def 282
1da177e4
LT		 283 return ret;
284}
285
286module_init(e1000_init_module);
287
288/**
289 * e1000_exit_module - Driver Exit Cleanup Routine
290 *
291 * e1000_exit_module is called just before the driver is removed
292 * from memory.
293 **/
294
295static void __exit
296e1000_exit_module(void)
297{
1da177e4
LT		 298 pci_unregister_driver(&e1000_driver);
299}
300
301module_exit(e1000_exit_module);
302
303/**
304 * e1000_irq_disable - Mask off interrupt generation on the NIC
305 * @adapter: board private structure
306 **/
307
308static inline void
309e1000_irq_disable(struct e1000_adapter *adapter)
310{
311 atomic_inc(&adapter->irq_sem);
312 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
313 E1000_WRITE_FLUSH(&adapter->hw);
314 synchronize_irq(adapter->pdev->irq);
315}
316
317/**
318 * e1000_irq_enable - Enable default interrupt generation settings
319 * @adapter: board private structure
320 **/
321
322static inline void
323e1000_irq_enable(struct e1000_adapter *adapter)
324{
96838a40 325 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 326 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
327 E1000_WRITE_FLUSH(&adapter->hw);
328 }
329}
3ad2cc67
AB		 330
331static void
2d7edb92
MC		 332e1000_update_mng_vlan(struct e1000_adapter *adapter)
333{
334 struct net_device *netdev = adapter->netdev;
335 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
336 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 337 if (adapter->vlgrp) {
338 if (!adapter->vlgrp->vlan_devices[vid]) {
339 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 340 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
341 e1000_vlan_rx_add_vid(netdev, vid);
342 adapter->mng_vlan_id = vid;
343 } else
344 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 345
346 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
347 (vid != old_vid) &&
2d7edb92
MC		 348 !adapter->vlgrp->vlan_devices[old_vid])
349 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 350 } else
351 adapter->mng_vlan_id = vid;
2d7edb92
MC		 352 }
353}
b55ccb35
JK		 354
355/**
356 * e1000_release_hw_control - release control of the h/w to f/w
357 * @adapter: address of board private structure
358 *
359 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
360 * For ASF and Pass Through versions of f/w this means that the
361 * driver is no longer loaded. For AMT version (only with 82573) i
362 * of the f/w this means that the netowrk i/f is closed.
363 *
364 **/
365
366static inline void
367e1000_release_hw_control(struct e1000_adapter *adapter)
368{
369 uint32_t ctrl_ext;
370 uint32_t swsm;
371
372 /* Let firmware taken over control of h/w */
373 switch (adapter->hw.mac_type) {
374 case e1000_82571:
375 case e1000_82572:
376 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
377 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
378 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
379 break;
380 case e1000_82573:
381 swsm = E1000_READ_REG(&adapter->hw, SWSM);
382 E1000_WRITE_REG(&adapter->hw, SWSM,
383 swsm & ~E1000_SWSM_DRV_LOAD);
384 default:
385 break;
386 }
387}
388
389/**
390 * e1000_get_hw_control - get control of the h/w from f/w
391 * @adapter: address of board private structure
392 *
393 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
394 * For ASF and Pass Through versions of f/w this means that
395 * the driver is loaded. For AMT version (only with 82573)
396 * of the f/w this means that the netowrk i/f is open.
397 *
398 **/
399
400static inline void
401e1000_get_hw_control(struct e1000_adapter *adapter)
402{
403 uint32_t ctrl_ext;
404 uint32_t swsm;
405 /* Let firmware know the driver has taken over */
406 switch (adapter->hw.mac_type) {
407 case e1000_82571:
408 case e1000_82572:
409 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
410 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
411 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
412 break;
413 case e1000_82573:
414 swsm = E1000_READ_REG(&adapter->hw, SWSM);
415 E1000_WRITE_REG(&adapter->hw, SWSM,
416 swsm | E1000_SWSM_DRV_LOAD);
417 break;
418 default:
419 break;
420 }
421}
422
1da177e4
LT		 423int
424e1000_up(struct e1000_adapter *adapter)
425{
426 struct net_device *netdev = adapter->netdev;
581d708e 427 int i, err;
1da177e4
LT		 428
429 /* hardware has been reset, we need to reload some things */
430
431 /* Reset the PHY if it was previously powered down */
96838a40 432 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 433 uint16_t mii_reg;
434 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
96838a40 435 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4
LT		 436 e1000_phy_reset(&adapter->hw);
437 }
438
439 e1000_set_multi(netdev);
440
441 e1000_restore_vlan(adapter);
442
443 e1000_configure_tx(adapter);
444 e1000_setup_rctl(adapter);
445 e1000_configure_rx(adapter);
72d64a43
JK		 446 /* call E1000_DESC_UNUSED which always leaves
447 * at least 1 descriptor unused to make sure
448 * next_to_use != next_to_clean */
f56799ea 449 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 450 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 451 adapter->alloc_rx_buf(adapter, ring,
452 E1000_DESC_UNUSED(ring));
f56799ea 453 }
1da177e4 454
fa4f7ef3 455#ifdef CONFIG_PCI_MSI
96838a40 456 if (adapter->hw.mac_type > e1000_82547_rev_2) {
fa4f7ef3 457 adapter->have_msi = TRUE;
96838a40 458 if ((err = pci_enable_msi(adapter->pdev))) {
fa4f7ef3
MC		 459 DPRINTK(PROBE, ERR,
460 "Unable to allocate MSI interrupt Error: %d\n", err);
461 adapter->have_msi = FALSE;
462 }
463 }
464#endif
96838a40 465 if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
1da177e4 466 SA_SHIRQ | SA_SAMPLE_RANDOM,
2648345f
MC		 467 netdev->name, netdev))) {
468 DPRINTK(PROBE, ERR,
469 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 470 return err;
2648345f 471 }
1da177e4 472
7bfa4816
JK		 473 adapter->tx_queue_len = netdev->tx_queue_len;
474
1da177e4 475 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 476
477#ifdef CONFIG_E1000_NAPI
478 netif_poll_enable(netdev);
479#endif
5de55624
MC		 480 e1000_irq_enable(adapter);
481
1da177e4
LT		 482 return 0;
483}
484
485void
486e1000_down(struct e1000_adapter *adapter)
487{
488 struct net_device *netdev = adapter->netdev;
57128197
JK		 489 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
490 e1000_check_mng_mode(&adapter->hw);
1da177e4
LT		 491
492 e1000_irq_disable(adapter);
c1605eb3 493
1da177e4 494 free_irq(adapter->pdev->irq, netdev);
fa4f7ef3 495#ifdef CONFIG_PCI_MSI
96838a40 496 if (adapter->hw.mac_type > e1000_82547_rev_2 &&
fa4f7ef3
MC		 497 adapter->have_msi == TRUE)
498 pci_disable_msi(adapter->pdev);
499#endif
1da177e4
LT		 500 del_timer_sync(&adapter->tx_fifo_stall_timer);
501 del_timer_sync(&adapter->watchdog_timer);
502 del_timer_sync(&adapter->phy_info_timer);
503
504#ifdef CONFIG_E1000_NAPI
505 netif_poll_disable(netdev);
506#endif
7bfa4816 507 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 508 adapter->link_speed = 0;
509 adapter->link_duplex = 0;
510 netif_carrier_off(netdev);
511 netif_stop_queue(netdev);
512
513 e1000_reset(adapter);
581d708e
MC		 514 e1000_clean_all_tx_rings(adapter);
515 e1000_clean_all_rx_rings(adapter);
1da177e4 516
57128197
JK		 517 /* Power down the PHY so no link is implied when interface is down *
518 * The PHY cannot be powered down if any of the following is TRUE *
519 * (a) WoL is enabled
520 * (b) AMT is active
521 * (c) SoL/IDER session is active */
522 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
2d7edb92 523 adapter->hw.media_type == e1000_media_type_copper &&
57128197
JK		 524 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
525 !mng_mode_enabled &&
526 !e1000_check_phy_reset_block(&adapter->hw)) {
1da177e4
LT		 527 uint16_t mii_reg;
528 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
529 mii_reg |= MII_CR_POWER_DOWN;
530 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
4e48a2b9 531 mdelay(1);
1da177e4
LT		 532 }
533}
534
535void
536e1000_reset(struct e1000_adapter *adapter)
537{
2d7edb92 538 uint32_t pba, manc;
1125ecbc 539 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 540
541 /* Repartition Pba for greater than 9k mtu
542 * To take effect CTRL.RST is required.
543 */
544
2d7edb92
MC		 545 switch (adapter->hw.mac_type) {
546 case e1000_82547:
0e6ef3e0 547 case e1000_82547_rev_2:
2d7edb92
MC		 548 pba = E1000_PBA_30K;
549 break;
868d5309
MC		 550 case e1000_82571:
551 case e1000_82572:
6418ecc6 552 case e1000_80003es2lan:
868d5309
MC		 553 pba = E1000_PBA_38K;
554 break;
2d7edb92
MC		 555 case e1000_82573:
556 pba = E1000_PBA_12K;
557 break;
558 default:
559 pba = E1000_PBA_48K;
560 break;
561 }
562
96838a40 563 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 564 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 565 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 566
567
96838a40 568 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 569 adapter->tx_fifo_head = 0;
570 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
571 adapter->tx_fifo_size =
572 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
573 atomic_set(&adapter->tx_fifo_stall, 0);
574 }
2d7edb92 575
1da177e4
LT		 576 E1000_WRITE_REG(&adapter->hw, PBA, pba);
577
578 /* flow control settings */
f11b7f85
JK		 579 /* Set the FC high water mark to 90% of the FIFO size.
580 * Required to clear last 3 LSB */
581 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
582
583 adapter->hw.fc_high_water = fc_high_water_mark;
584 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 585 if (adapter->hw.mac_type == e1000_80003es2lan)
586 adapter->hw.fc_pause_time = 0xFFFF;
587 else
588 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 589 adapter->hw.fc_send_xon = 1;
590 adapter->hw.fc = adapter->hw.original_fc;
591
2d7edb92 592 /* Allow time for pending master requests to run */
1da177e4 593 e1000_reset_hw(&adapter->hw);
96838a40 594 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 595 E1000_WRITE_REG(&adapter->hw, WUC, 0);
96838a40 596 if (e1000_init_hw(&adapter->hw))
1da177e4 597 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 598 e1000_update_mng_vlan(adapter);
1da177e4
LT		 599 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
600 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
601
602 e1000_reset_adaptive(&adapter->hw);
603 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2d7edb92
MC		 604 if (adapter->en_mng_pt) {
605 manc = E1000_READ_REG(&adapter->hw, MANC);
606 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
607 E1000_WRITE_REG(&adapter->hw, MANC, manc);
608 }
1da177e4
LT		 609}
610
611/**
612 * e1000_probe - Device Initialization Routine
613 * @pdev: PCI device information struct
614 * @ent: entry in e1000_pci_tbl
615 *
616 * Returns 0 on success, negative on failure
617 *
618 * e1000_probe initializes an adapter identified by a pci_dev structure.
619 * The OS initialization, configuring of the adapter private structure,
620 * and a hardware reset occur.
621 **/
622
623static int __devinit
624e1000_probe(struct pci_dev *pdev,
625 const struct pci_device_id *ent)
626{
627 struct net_device *netdev;
628 struct e1000_adapter *adapter;
2d7edb92 629 unsigned long mmio_start, mmio_len;
2d7edb92 630
1da177e4 631 static int cards_found = 0;
84916829 632 static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
2d7edb92 633 int i, err, pci_using_dac;
1da177e4
LT		 634 uint16_t eeprom_data;
635 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 636 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 637 return err;
638
96838a40 639 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 640 pci_using_dac = 1;
641 } else {
96838a40 642 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4
LT		 643 E1000_ERR("No usable DMA configuration, aborting\n");
644 return err;
645 }
646 pci_using_dac = 0;
647 }
648
96838a40 649 if ((err = pci_request_regions(pdev, e1000_driver_name)))
1da177e4
LT		 650 return err;
651
652 pci_set_master(pdev);
653
654 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
96838a40 655 if (!netdev) {
1da177e4
LT		 656 err = -ENOMEM;
657 goto err_alloc_etherdev;
658 }
659
660 SET_MODULE_OWNER(netdev);
661 SET_NETDEV_DEV(netdev, &pdev->dev);
662
663 pci_set_drvdata(pdev, netdev);
60490fe0 664 adapter = netdev_priv(netdev);
1da177e4
LT		 665 adapter->netdev = netdev;
666 adapter->pdev = pdev;
667 adapter->hw.back = adapter;
668 adapter->msg_enable = (1 << debug) - 1;
669
670 mmio_start = pci_resource_start(pdev, BAR_0);
671 mmio_len = pci_resource_len(pdev, BAR_0);
672
673 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
96838a40 674 if (!adapter->hw.hw_addr) {
1da177e4
LT		 675 err = -EIO;
676 goto err_ioremap;
677 }
678
96838a40
JB		 679 for (i = BAR_1; i <= BAR_5; i++) {
680 if (pci_resource_len(pdev, i) == 0)
1da177e4 681 continue;
96838a40 682 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 683 adapter->hw.io_base = pci_resource_start(pdev, i);
684 break;
685 }
686 }
687
688 netdev->open = &e1000_open;
689 netdev->stop = &e1000_close;
690 netdev->hard_start_xmit = &e1000_xmit_frame;
691 netdev->get_stats = &e1000_get_stats;
692 netdev->set_multicast_list = &e1000_set_multi;
693 netdev->set_mac_address = &e1000_set_mac;
694 netdev->change_mtu = &e1000_change_mtu;
695 netdev->do_ioctl = &e1000_ioctl;
696 e1000_set_ethtool_ops(netdev);
697 netdev->tx_timeout = &e1000_tx_timeout;
698 netdev->watchdog_timeo = 5 * HZ;
699#ifdef CONFIG_E1000_NAPI
700 netdev->poll = &e1000_clean;
701 netdev->weight = 64;
702#endif
703 netdev->vlan_rx_register = e1000_vlan_rx_register;
704 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
705 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
706#ifdef CONFIG_NET_POLL_CONTROLLER
707 netdev->poll_controller = e1000_netpoll;
708#endif
709 strcpy(netdev->name, pci_name(pdev));
710
711 netdev->mem_start = mmio_start;
712 netdev->mem_end = mmio_start + mmio_len;
713 netdev->base_addr = adapter->hw.io_base;
714
715 adapter->bd_number = cards_found;
716
717 /* setup the private structure */
718
96838a40 719 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 720 goto err_sw_init;
721
96838a40 722 if ((err = e1000_check_phy_reset_block(&adapter->hw)))
2d7edb92
MC		 723 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
724
84916829
JK		 725 /* if ksp3, indicate if it's port a being setup */
726 if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
727 e1000_ksp3_port_a == 0)
728 adapter->ksp3_port_a = 1;
729 e1000_ksp3_port_a++;
730 /* Reset for multiple KP3 adapters */
731 if (e1000_ksp3_port_a == 4)
732 e1000_ksp3_port_a = 0;
733
96838a40 734 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 735 netdev->features = NETIF_F_SG |
736 NETIF_F_HW_CSUM |
737 NETIF_F_HW_VLAN_TX |
738 NETIF_F_HW_VLAN_RX |
739 NETIF_F_HW_VLAN_FILTER;
740 }
741
742#ifdef NETIF_F_TSO
96838a40 743 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 744 (adapter->hw.mac_type != e1000_82547))
745 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 746
747#ifdef NETIF_F_TSO_IPV6
96838a40 748 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 749 netdev->features |= NETIF_F_TSO_IPV6;
750#endif
1da177e4 751#endif
96838a40 752 if (pci_using_dac)
1da177e4
LT		 753 netdev->features |= NETIF_F_HIGHDMA;
754
755 /* hard_start_xmit is safe against parallel locking */
756 netdev->features |= NETIF_F_LLTX;
757
2d7edb92
MC		 758 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
759
96838a40 760 /* before reading the EEPROM, reset the controller to
1da177e4 761 * put the device in a known good starting state */
96838a40 762
1da177e4
LT		 763 e1000_reset_hw(&adapter->hw);
764
765 /* make sure the EEPROM is good */
766
96838a40 767 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4
LT		 768 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
769 err = -EIO;
770 goto err_eeprom;
771 }
772
773 /* copy the MAC address out of the EEPROM */
774
96838a40 775 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 776 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
777 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 778 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 779
96838a40 780 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 781 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
782 err = -EIO;
783 goto err_eeprom;
784 }
785
786 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
787
788 e1000_get_bus_info(&adapter->hw);
789
790 init_timer(&adapter->tx_fifo_stall_timer);
791 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
792 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
793
794 init_timer(&adapter->watchdog_timer);
795 adapter->watchdog_timer.function = &e1000_watchdog;
796 adapter->watchdog_timer.data = (unsigned long) adapter;
797
798 INIT_WORK(&adapter->watchdog_task,
799 (void (*)(void *))e1000_watchdog_task, adapter);
800
801 init_timer(&adapter->phy_info_timer);
802 adapter->phy_info_timer.function = &e1000_update_phy_info;
803 adapter->phy_info_timer.data = (unsigned long) adapter;
804
87041639
JK		 805 INIT_WORK(&adapter->reset_task,
806 (void (*)(void *))e1000_reset_task, netdev);
1da177e4
LT		 807
808 /* we're going to reset, so assume we have no link for now */
809
810 netif_carrier_off(netdev);
811 netif_stop_queue(netdev);
812
813 e1000_check_options(adapter);
814
815 /* Initial Wake on LAN setting
816 * If APM wake is enabled in the EEPROM,
817 * enable the ACPI Magic Packet filter
818 */
819
96838a40 820 switch (adapter->hw.mac_type) {
1da177e4
LT		 821 case e1000_82542_rev2_0:
822 case e1000_82542_rev2_1:
823 case e1000_82543:
824 break;
825 case e1000_82544:
826 e1000_read_eeprom(&adapter->hw,
827 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
828 eeprom_apme_mask = E1000_EEPROM_82544_APM;
829 break;
830 case e1000_82546:
831 case e1000_82546_rev_3:
fd803241 832 case e1000_82571:
6418ecc6 833 case e1000_80003es2lan:
96838a40 834 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 835 e1000_read_eeprom(&adapter->hw,
836 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
837 break;
838 }
839 /* Fall Through */
840 default:
841 e1000_read_eeprom(&adapter->hw,
842 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
843 break;
844 }
96838a40 845 if (eeprom_data & eeprom_apme_mask)
1da177e4
LT		 846 adapter->wol |= E1000_WUFC_MAG;
847
fb3d47d4
JK		 848 /* print bus type/speed/width info */
849 {
850 struct e1000_hw *hw = &adapter->hw;
851 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
852 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
853 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
854 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
855 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
856 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
857 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
858 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
859 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
860 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
861 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
862 "32-bit"));
863 }
864
865 for (i = 0; i < 6; i++)
866 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
867
1da177e4
LT		 868 /* reset the hardware with the new settings */
869 e1000_reset(adapter);
870
b55ccb35
JK		 871 /* If the controller is 82573 and f/w is AMT, do not set
872 * DRV_LOAD until the interface is up. For all other cases,
873 * let the f/w know that the h/w is now under the control
874 * of the driver. */
875 if (adapter->hw.mac_type != e1000_82573 ||
876 !e1000_check_mng_mode(&adapter->hw))
877 e1000_get_hw_control(adapter);
2d7edb92 878
1da177e4 879 strcpy(netdev->name, "eth%d");
96838a40 880 if ((err = register_netdev(netdev)))
1da177e4
LT		 881 goto err_register;
882
883 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
884
885 cards_found++;
886 return 0;
887
888err_register:
889err_sw_init:
890err_eeprom:
891 iounmap(adapter->hw.hw_addr);
892err_ioremap:
893 free_netdev(netdev);
894err_alloc_etherdev:
895 pci_release_regions(pdev);
896 return err;
897}
898
899/**
900 * e1000_remove - Device Removal Routine
901 * @pdev: PCI device information struct
902 *
903 * e1000_remove is called by the PCI subsystem to alert the driver
904 * that it should release a PCI device. The could be caused by a
905 * Hot-Plug event, or because the driver is going to be removed from
906 * memory.
907 **/
908
909static void __devexit
910e1000_remove(struct pci_dev *pdev)
911{
912 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 913 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 914 uint32_t manc;
581d708e
MC		 915#ifdef CONFIG_E1000_NAPI
916 int i;
917#endif
1da177e4 918
be2b28ed
JG		 919 flush_scheduled_work();
920
96838a40 921 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 922 adapter->hw.media_type == e1000_media_type_copper) {
923 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 924 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 925 manc |= E1000_MANC_ARP_EN;
926 E1000_WRITE_REG(&adapter->hw, MANC, manc);
927 }
928 }
929
b55ccb35
JK		 930 /* Release control of h/w to f/w. If f/w is AMT enabled, this
931 * would have already happened in close and is redundant. */
932 e1000_release_hw_control(adapter);
2d7edb92 933
1da177e4 934 unregister_netdev(netdev);
581d708e 935#ifdef CONFIG_E1000_NAPI
f56799ea 936 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 937 __dev_put(&adapter->polling_netdev[i]);
938#endif
1da177e4 939
96838a40 940 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 941 e1000_phy_hw_reset(&adapter->hw);
1da177e4 942
24025e4e
MC		 943 kfree(adapter->tx_ring);
944 kfree(adapter->rx_ring);
945#ifdef CONFIG_E1000_NAPI
946 kfree(adapter->polling_netdev);
947#endif
948
1da177e4
LT		 949 iounmap(adapter->hw.hw_addr);
950 pci_release_regions(pdev);
951
952 free_netdev(netdev);
953
954 pci_disable_device(pdev);
955}
956
957/**
958 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
959 * @adapter: board private structure to initialize
960 *
961 * e1000_sw_init initializes the Adapter private data structure.
962 * Fields are initialized based on PCI device information and
963 * OS network device settings (MTU size).
964 **/
965
966static int __devinit
967e1000_sw_init(struct e1000_adapter *adapter)
968{
969 struct e1000_hw *hw = &adapter->hw;
970 struct net_device *netdev = adapter->netdev;
971 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 972#ifdef CONFIG_E1000_NAPI
973 int i;
974#endif
1da177e4
LT		 975
976 /* PCI config space info */
977
978 hw->vendor_id = pdev->vendor;
979 hw->device_id = pdev->device;
980 hw->subsystem_vendor_id = pdev->subsystem_vendor;
981 hw->subsystem_id = pdev->subsystem_device;
982
983 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
984
985 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
986
987 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
2d7edb92 988 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
1da177e4
LT		 989 hw->max_frame_size = netdev->mtu +
990 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
991 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
992
993 /* identify the MAC */
994
96838a40 995 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 996 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
997 return -EIO;
998 }
999
1000 /* initialize eeprom parameters */
1001
96838a40 1002 if (e1000_init_eeprom_params(hw)) {
2d7edb92
MC		 1003 E1000_ERR("EEPROM initialization failed\n");
1004 return -EIO;
1005 }
1da177e4 1006
96838a40 1007 switch (hw->mac_type) {
1da177e4
LT		 1008 default:
1009 break;
1010 case e1000_82541:
1011 case e1000_82547:
1012 case e1000_82541_rev_2:
1013 case e1000_82547_rev_2:
1014 hw->phy_init_script = 1;
1015 break;
1016 }
1017
1018 e1000_set_media_type(hw);
1019
1020 hw->wait_autoneg_complete = FALSE;
1021 hw->tbi_compatibility_en = TRUE;
1022 hw->adaptive_ifs = TRUE;
1023
1024 /* Copper options */
1025
96838a40 1026 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1027 hw->mdix = AUTO_ALL_MODES;
1028 hw->disable_polarity_correction = FALSE;
1029 hw->master_slave = E1000_MASTER_SLAVE;
1030 }
1031
f56799ea
JK		 1032 adapter->num_tx_queues = 1;
1033 adapter->num_rx_queues = 1;
581d708e
MC		 1034
1035 if (e1000_alloc_queues(adapter)) {
1036 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1037 return -ENOMEM;
1038 }
1039
1040#ifdef CONFIG_E1000_NAPI
f56799ea 1041 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1042 adapter->polling_netdev[i].priv = adapter;
1043 adapter->polling_netdev[i].poll = &e1000_clean;
1044 adapter->polling_netdev[i].weight = 64;
1045 dev_hold(&adapter->polling_netdev[i]);
1046 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1047 }
7bfa4816 1048 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1049#endif
1050
1da177e4
LT		 1051 atomic_set(&adapter->irq_sem, 1);
1052 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1053
1054 return 0;
1055}
1056
581d708e
MC		 1057/**
1058 * e1000_alloc_queues - Allocate memory for all rings
1059 * @adapter: board private structure to initialize
1060 *
1061 * We allocate one ring per queue at run-time since we don't know the
1062 * number of queues at compile-time. The polling_netdev array is
1063 * intended for Multiqueue, but should work fine with a single queue.
1064 **/
1065
1066static int __devinit
1067e1000_alloc_queues(struct e1000_adapter *adapter)
1068{
1069 int size;
1070
f56799ea 1071 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1072 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1073 if (!adapter->tx_ring)
1074 return -ENOMEM;
1075 memset(adapter->tx_ring, 0, size);
1076
f56799ea 1077 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1078 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1079 if (!adapter->rx_ring) {
1080 kfree(adapter->tx_ring);
1081 return -ENOMEM;
1082 }
1083 memset(adapter->rx_ring, 0, size);
1084
1085#ifdef CONFIG_E1000_NAPI
f56799ea 1086 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1087 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1088 if (!adapter->polling_netdev) {
1089 kfree(adapter->tx_ring);
1090 kfree(adapter->rx_ring);
1091 return -ENOMEM;
1092 }
1093 memset(adapter->polling_netdev, 0, size);
1094#endif
1095
1096 return E1000_SUCCESS;
1097}
1098
1da177e4
LT		 1099/**
1100 * e1000_open - Called when a network interface is made active
1101 * @netdev: network interface device structure
1102 *
1103 * Returns 0 on success, negative value on failure
1104 *
1105 * The open entry point is called when a network interface is made
1106 * active by the system (IFF_UP). At this point all resources needed
1107 * for transmit and receive operations are allocated, the interrupt
1108 * handler is registered with the OS, the watchdog timer is started,
1109 * and the stack is notified that the interface is ready.
1110 **/
1111
1112static int
1113e1000_open(struct net_device *netdev)
1114{
60490fe0 1115 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1116 int err;
1117
1118 /* allocate transmit descriptors */
1119
581d708e 1120 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1121 goto err_setup_tx;
1122
1123 /* allocate receive descriptors */
1124
581d708e 1125 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1126 goto err_setup_rx;
1127
96838a40 1128 if ((err = e1000_up(adapter)))
1da177e4 1129 goto err_up;
2d7edb92 1130 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1131 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1132 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1133 e1000_update_mng_vlan(adapter);
1134 }
1da177e4 1135
b55ccb35
JK		 1136 /* If AMT is enabled, let the firmware know that the network
1137 * interface is now open */
1138 if (adapter->hw.mac_type == e1000_82573 &&
1139 e1000_check_mng_mode(&adapter->hw))
1140 e1000_get_hw_control(adapter);
1141
1da177e4
LT		 1142 return E1000_SUCCESS;
1143
1144err_up:
581d708e 1145 e1000_free_all_rx_resources(adapter);
1da177e4 1146err_setup_rx:
581d708e 1147 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1148err_setup_tx:
1149 e1000_reset(adapter);
1150
1151 return err;
1152}
1153
1154/**
1155 * e1000_close - Disables a network interface
1156 * @netdev: network interface device structure
1157 *
1158 * Returns 0, this is not allowed to fail
1159 *
1160 * The close entry point is called when an interface is de-activated
1161 * by the OS. The hardware is still under the drivers control, but
1162 * needs to be disabled. A global MAC reset is issued to stop the
1163 * hardware, and all transmit and receive resources are freed.
1164 **/
1165
1166static int
1167e1000_close(struct net_device *netdev)
1168{
60490fe0 1169 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1170
1171 e1000_down(adapter);
1172
581d708e
MC		 1173 e1000_free_all_tx_resources(adapter);
1174 e1000_free_all_rx_resources(adapter);
1da177e4 1175
96838a40 1176 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1177 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1178 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1179 }
b55ccb35
JK		 1180
1181 /* If AMT is enabled, let the firmware know that the network
1182 * interface is now closed */
1183 if (adapter->hw.mac_type == e1000_82573 &&
1184 e1000_check_mng_mode(&adapter->hw))
1185 e1000_release_hw_control(adapter);
1186
1da177e4
LT		 1187 return 0;
1188}
1189
1190/**
1191 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1192 * @adapter: address of board private structure
2d7edb92
MC		 1193 * @start: address of beginning of memory
1194 * @len: length of memory
1da177e4
LT		 1195 **/
1196static inline boolean_t
1197e1000_check_64k_bound(struct e1000_adapter *adapter,
1198 void *start, unsigned long len)
1199{
1200 unsigned long begin = (unsigned long) start;
1201 unsigned long end = begin + len;
1202
2648345f
MC		 1203 /* First rev 82545 and 82546 need to not allow any memory
1204 * write location to cross 64k boundary due to errata 23 */
1da177e4 1205 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1206 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1207 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1208 }
1209
1210 return TRUE;
1211}
1212
1213/**
1214 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1215 * @adapter: board private structure
581d708e 1216 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1217 *
1218 * Return 0 on success, negative on failure
1219 **/
1220
3ad2cc67 1221static int
581d708e
MC		 1222e1000_setup_tx_resources(struct e1000_adapter *adapter,
1223 struct e1000_tx_ring *txdr)
1da177e4 1224{
1da177e4
LT		 1225 struct pci_dev *pdev = adapter->pdev;
1226 int size;
1227
1228 size = sizeof(struct e1000_buffer) * txdr->count;
a7ec15da
RT		 1229
1230 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
96838a40 1231 if (!txdr->buffer_info) {
2648345f
MC		 1232 DPRINTK(PROBE, ERR,
1233 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1234 return -ENOMEM;
1235 }
1236 memset(txdr->buffer_info, 0, size);
1237
1238 /* round up to nearest 4K */
1239
1240 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1241 E1000_ROUNDUP(txdr->size, 4096);
1242
1243 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1244 if (!txdr->desc) {
1da177e4 1245setup_tx_desc_die:
1da177e4 1246 vfree(txdr->buffer_info);
2648345f
MC		 1247 DPRINTK(PROBE, ERR,
1248 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1249 return -ENOMEM;
1250 }
1251
2648345f 1252 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1253 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1254 void *olddesc = txdr->desc;
1255 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1256 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1257 "at %p\n", txdr->size, txdr->desc);
1258 /* Try again, without freeing the previous */
1da177e4 1259 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1260 /* Failed allocation, critical failure */
96838a40 1261 if (!txdr->desc) {
1da177e4
LT		 1262 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1263 goto setup_tx_desc_die;
1264 }
1265
1266 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1267 /* give up */
2648345f
MC		 1268 pci_free_consistent(pdev, txdr->size, txdr->desc,
1269 txdr->dma);
1da177e4
LT		 1270 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1271 DPRINTK(PROBE, ERR,
2648345f
MC		 1272 "Unable to allocate aligned memory "
1273 "for the transmit descriptor ring\n");
1da177e4
LT		 1274 vfree(txdr->buffer_info);
1275 return -ENOMEM;
1276 } else {
2648345f 1277 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1278 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1279 }
1280 }
1281 memset(txdr->desc, 0, txdr->size);
1282
1283 txdr->next_to_use = 0;
1284 txdr->next_to_clean = 0;
2ae76d98 1285 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1286
1287 return 0;
1288}
1289
581d708e
MC		 1290/**
1291 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1292 * (Descriptors) for all queues
1293 * @adapter: board private structure
1294 *
1295 * If this function returns with an error, then it's possible one or
1296 * more of the rings is populated (while the rest are not). It is the
1297 * callers duty to clean those orphaned rings.
1298 *
1299 * Return 0 on success, negative on failure
1300 **/
1301
1302int
1303e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1304{
1305 int i, err = 0;
1306
f56799ea 1307 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1308 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1309 if (err) {
1310 DPRINTK(PROBE, ERR,
1311 "Allocation for Tx Queue %u failed\n", i);
1312 break;
1313 }
1314 }
1315
1316 return err;
1317}
1318
1da177e4
LT		 1319/**
1320 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1321 * @adapter: board private structure
1322 *
1323 * Configure the Tx unit of the MAC after a reset.
1324 **/
1325
1326static void
1327e1000_configure_tx(struct e1000_adapter *adapter)
1328{
581d708e
MC		 1329 uint64_t tdba;
1330 struct e1000_hw *hw = &adapter->hw;
1331 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1332 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1333
1334 /* Setup the HW Tx Head and Tail descriptor pointers */
1335
f56799ea 1336 switch (adapter->num_tx_queues) {
24025e4e
MC		 1337 case 1:
1338 default:
581d708e
MC		 1339 tdba = adapter->tx_ring[0].dma;
1340 tdlen = adapter->tx_ring[0].count *
1341 sizeof(struct e1000_tx_desc);
1342 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1343 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1344 E1000_WRITE_REG(hw, TDLEN, tdlen);
1345 E1000_WRITE_REG(hw, TDH, 0);
1346 E1000_WRITE_REG(hw, TDT, 0);
1347 adapter->tx_ring[0].tdh = E1000_TDH;
1348 adapter->tx_ring[0].tdt = E1000_TDT;
24025e4e
MC		 1349 break;
1350 }
1da177e4
LT		 1351
1352 /* Set the default values for the Tx Inter Packet Gap timer */
1353
0fadb059
JK		 1354 if (hw->media_type == e1000_media_type_fiber ||
1355 hw->media_type == e1000_media_type_internal_serdes)
1356 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1357 else
1358 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1359
581d708e 1360 switch (hw->mac_type) {
1da177e4
LT		 1361 case e1000_82542_rev2_0:
1362 case e1000_82542_rev2_1:
1363 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1364 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1365 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1366 break;
87041639
JK		 1367 case e1000_80003es2lan:
1368 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1369 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1370 break;
1da177e4 1371 default:
0fadb059
JK		 1372 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1373 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1374 break;
1da177e4 1375 }
0fadb059
JK		 1376 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1377 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1378 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1379
1380 /* Set the Tx Interrupt Delay register */
1381
581d708e
MC		 1382 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1383 if (hw->mac_type >= e1000_82540)
1384 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1385
1386 /* Program the Transmit Control Register */
1387
581d708e 1388 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1389
1390 tctl &= ~E1000_TCTL_CT;
7e6c9861 1391 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1392 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1393
7e6c9861
JK		 1394#ifdef DISABLE_MULR
1395 /* disable Multiple Reads for debugging */
1396 tctl &= ~E1000_TCTL_MULR;
1397#endif
1da177e4 1398
2ae76d98
MC		 1399 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1400 tarc = E1000_READ_REG(hw, TARC0);
1401 tarc |= ((1 << 25) | (1 << 21));
1402 E1000_WRITE_REG(hw, TARC0, tarc);
1403 tarc = E1000_READ_REG(hw, TARC1);
1404 tarc |= (1 << 25);
1405 if (tctl & E1000_TCTL_MULR)
1406 tarc &= ~(1 << 28);
1407 else
1408 tarc |= (1 << 28);
1409 E1000_WRITE_REG(hw, TARC1, tarc);
87041639
JK		 1410 } else if (hw->mac_type == e1000_80003es2lan) {
1411 tarc = E1000_READ_REG(hw, TARC0);
1412 tarc |= 1;
1413 if (hw->media_type == e1000_media_type_internal_serdes)
1414 tarc |= (1 << 20);
1415 E1000_WRITE_REG(hw, TARC0, tarc);
1416 tarc = E1000_READ_REG(hw, TARC1);
1417 tarc |= 1;
1418 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1419 }
1420
581d708e 1421 e1000_config_collision_dist(hw);
1da177e4
LT		 1422
1423 /* Setup Transmit Descriptor Settings for eop descriptor */
1424 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1425 E1000_TXD_CMD_IFCS;
1426
581d708e 1427 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1428 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1429 else
1430 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1431
1432 /* Cache if we're 82544 running in PCI-X because we'll
1433 * need this to apply a workaround later in the send path. */
581d708e
MC		 1434 if (hw->mac_type == e1000_82544 &&
1435 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1436 adapter->pcix_82544 = 1;
7e6c9861
JK		 1437
1438 E1000_WRITE_REG(hw, TCTL, tctl);
1439
1da177e4
LT		 1440}
1441
1442/**
1443 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1444 * @adapter: board private structure
581d708e 1445 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1446 *
1447 * Returns 0 on success, negative on failure
1448 **/
1449
3ad2cc67 1450static int
581d708e
MC		 1451e1000_setup_rx_resources(struct e1000_adapter *adapter,
1452 struct e1000_rx_ring *rxdr)
1da177e4 1453{
1da177e4 1454 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1455 int size, desc_len;
1da177e4
LT		 1456
1457 size = sizeof(struct e1000_buffer) * rxdr->count;
a7ec15da 1458 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
581d708e 1459 if (!rxdr->buffer_info) {
2648345f
MC		 1460 DPRINTK(PROBE, ERR,
1461 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1462 return -ENOMEM;
1463 }
1464 memset(rxdr->buffer_info, 0, size);
1465
2d7edb92
MC		 1466 size = sizeof(struct e1000_ps_page) * rxdr->count;
1467 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1468 if (!rxdr->ps_page) {
2d7edb92
MC		 1469 vfree(rxdr->buffer_info);
1470 DPRINTK(PROBE, ERR,
1471 "Unable to allocate memory for the receive descriptor ring\n");
1472 return -ENOMEM;
1473 }
1474 memset(rxdr->ps_page, 0, size);
1475
1476 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1477 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1478 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1479 vfree(rxdr->buffer_info);
1480 kfree(rxdr->ps_page);
1481 DPRINTK(PROBE, ERR,
1482 "Unable to allocate memory for the receive descriptor ring\n");
1483 return -ENOMEM;
1484 }
1485 memset(rxdr->ps_page_dma, 0, size);
1486
96838a40 1487 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1488 desc_len = sizeof(struct e1000_rx_desc);
1489 else
1490 desc_len = sizeof(union e1000_rx_desc_packet_split);
1491
1da177e4
LT		 1492 /* Round up to nearest 4K */
1493
2d7edb92 1494 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1495 E1000_ROUNDUP(rxdr->size, 4096);
1496
1497 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1498
581d708e
MC		 1499 if (!rxdr->desc) {
1500 DPRINTK(PROBE, ERR,
1501 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1502setup_rx_desc_die:
1da177e4 1503 vfree(rxdr->buffer_info);
2d7edb92
MC		 1504 kfree(rxdr->ps_page);
1505 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1506 return -ENOMEM;
1507 }
1508
2648345f 1509 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1510 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1511 void *olddesc = rxdr->desc;
1512 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1513 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1514 "at %p\n", rxdr->size, rxdr->desc);
1515 /* Try again, without freeing the previous */
1da177e4 1516 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1517 /* Failed allocation, critical failure */
581d708e 1518 if (!rxdr->desc) {
1da177e4 1519 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1520 DPRINTK(PROBE, ERR,
1521 "Unable to allocate memory "
1522 "for the receive descriptor ring\n");
1da177e4
LT		 1523 goto setup_rx_desc_die;
1524 }
1525
1526 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1527 /* give up */
2648345f
MC		 1528 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1529 rxdr->dma);
1da177e4 1530 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1531 DPRINTK(PROBE, ERR,
1532 "Unable to allocate aligned memory "
1533 "for the receive descriptor ring\n");
581d708e 1534 goto setup_rx_desc_die;
1da177e4 1535 } else {
2648345f 1536 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1537 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1538 }
1539 }
1540 memset(rxdr->desc, 0, rxdr->size);
1541
1542 rxdr->next_to_clean = 0;
1543 rxdr->next_to_use = 0;
1544
1545 return 0;
1546}
1547
581d708e
MC		 1548/**
1549 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1550 * (Descriptors) for all queues
1551 * @adapter: board private structure
1552 *
1553 * If this function returns with an error, then it's possible one or
1554 * more of the rings is populated (while the rest are not). It is the
1555 * callers duty to clean those orphaned rings.
1556 *
1557 * Return 0 on success, negative on failure
1558 **/
1559
1560int
1561e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1562{
1563 int i, err = 0;
1564
f56799ea 1565 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1566 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1567 if (err) {
1568 DPRINTK(PROBE, ERR,
1569 "Allocation for Rx Queue %u failed\n", i);
1570 break;
1571 }
1572 }
1573
1574 return err;
1575}
1576
1da177e4 1577/**
2648345f 1578 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1579 * @adapter: Board private structure
1580 **/
e4c811c9
MC		 1581#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1582 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1583static void
1584e1000_setup_rctl(struct e1000_adapter *adapter)
1585{
2d7edb92
MC		 1586 uint32_t rctl, rfctl;
1587 uint32_t psrctl = 0;
35ec56bb 1588#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1589 uint32_t pages = 0;
1590#endif
1da177e4
LT		 1591
1592 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1593
1594 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1595
1596 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1597 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1598 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1599
0fadb059
JK		 1600 if (adapter->hw.mac_type > e1000_82543)
1601 rctl |= E1000_RCTL_SECRC;
1602
1603 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1604 rctl |= E1000_RCTL_SBP;
1605 else
1606 rctl &= ~E1000_RCTL_SBP;
1607
2d7edb92
MC		 1608 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1609 rctl &= ~E1000_RCTL_LPE;
1610 else
1611 rctl |= E1000_RCTL_LPE;
1612
1da177e4 1613 /* Setup buffer sizes */
96838a40 1614 if (adapter->hw.mac_type >= e1000_82571) {
2d7edb92
MC		 1615 /* We can now specify buffers in 1K increments.
1616 * BSIZE and BSEX are ignored in this case. */
1617 rctl |= adapter->rx_buffer_len << 0x11;
1618 } else {
1619 rctl &= ~E1000_RCTL_SZ_4096;
a1415ee6
JK		 1620 rctl |= E1000_RCTL_BSEX;
1621 switch (adapter->rx_buffer_len) {
1622 case E1000_RXBUFFER_2048:
1623 default:
1624 rctl |= E1000_RCTL_SZ_2048;
1625 rctl &= ~E1000_RCTL_BSEX;
1626 break;
1627 case E1000_RXBUFFER_4096:
1628 rctl |= E1000_RCTL_SZ_4096;
1629 break;
1630 case E1000_RXBUFFER_8192:
1631 rctl |= E1000_RCTL_SZ_8192;
1632 break;
1633 case E1000_RXBUFFER_16384:
1634 rctl |= E1000_RCTL_SZ_16384;
1635 break;
1636 }
2d7edb92
MC		 1637 }
1638
35ec56bb 1639#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1640 /* 82571 and greater support packet-split where the protocol
1641 * header is placed in skb->data and the packet data is
1642 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1643 * In the case of a non-split, skb->data is linearly filled,
1644 * followed by the page buffers. Therefore, skb->data is
1645 * sized to hold the largest protocol header.
1646 */
e4c811c9
MC		 1647 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1648 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1649 PAGE_SIZE <= 16384)
1650 adapter->rx_ps_pages = pages;
1651 else
1652 adapter->rx_ps_pages = 0;
2d7edb92 1653#endif
e4c811c9 1654 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1655 /* Configure extra packet-split registers */
1656 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1657 rfctl |= E1000_RFCTL_EXTEN;
1658 /* disable IPv6 packet split support */
1659 rfctl |= E1000_RFCTL_IPV6_DIS;
1660 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1661
1662 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
96838a40 1663
2d7edb92
MC		 1664 psrctl |= adapter->rx_ps_bsize0 >>
1665 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1666
1667 switch (adapter->rx_ps_pages) {
1668 case 3:
1669 psrctl |= PAGE_SIZE <<
1670 E1000_PSRCTL_BSIZE3_SHIFT;
1671 case 2:
1672 psrctl |= PAGE_SIZE <<
1673 E1000_PSRCTL_BSIZE2_SHIFT;
1674 case 1:
1675 psrctl |= PAGE_SIZE >>
1676 E1000_PSRCTL_BSIZE1_SHIFT;
1677 break;
1678 }
2d7edb92
MC		 1679
1680 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1681 }
1682
1683 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1684}
1685
1686/**
1687 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1688 * @adapter: board private structure
1689 *
1690 * Configure the Rx unit of the MAC after a reset.
1691 **/
1692
1693static void
1694e1000_configure_rx(struct e1000_adapter *adapter)
1695{
581d708e
MC		 1696 uint64_t rdba;
1697 struct e1000_hw *hw = &adapter->hw;
1698 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1699
e4c811c9 1700 if (adapter->rx_ps_pages) {
0f15a8fa 1701 /* this is a 32 byte descriptor */
581d708e 1702 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1703 sizeof(union e1000_rx_desc_packet_split);
1704 adapter->clean_rx = e1000_clean_rx_irq_ps;
1705 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1706 } else {
581d708e
MC		 1707 rdlen = adapter->rx_ring[0].count *
1708 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1709 adapter->clean_rx = e1000_clean_rx_irq;
1710 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1711 }
1da177e4
LT		 1712
1713 /* disable receives while setting up the descriptors */
581d708e
MC		 1714 rctl = E1000_READ_REG(hw, RCTL);
1715 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1716
1717 /* set the Receive Delay Timer Register */
581d708e 1718 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1719
581d708e
MC		 1720 if (hw->mac_type >= e1000_82540) {
1721 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1722 if (adapter->itr > 1)
581d708e 1723 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1724 1000000000 / (adapter->itr * 256));
1725 }
1726
2ae76d98 1727 if (hw->mac_type >= e1000_82571) {
2ae76d98 1728 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1729 /* Reset delay timers after every interrupt */
2ae76d98 1730 ctrl_ext |= E1000_CTRL_EXT_CANC;
1e613fd9
JK		 1731#ifdef CONFIG_E1000_NAPI
1732 /* Auto-Mask interrupts upon ICR read. */
1733 ctrl_ext |= E1000_CTRL_EXT_IAME;
1734#endif
2ae76d98 1735 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1736 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1737 E1000_WRITE_FLUSH(hw);
1738 }
1739
581d708e
MC		 1740 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1741 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1742 switch (adapter->num_rx_queues) {
24025e4e
MC		 1743 case 1:
1744 default:
581d708e
MC		 1745 rdba = adapter->rx_ring[0].dma;
1746 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1747 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1748 E1000_WRITE_REG(hw, RDLEN, rdlen);
1749 E1000_WRITE_REG(hw, RDH, 0);
1750 E1000_WRITE_REG(hw, RDT, 0);
1751 adapter->rx_ring[0].rdh = E1000_RDH;
1752 adapter->rx_ring[0].rdt = E1000_RDT;
1753 break;
24025e4e
MC		 1754 }
1755
1da177e4 1756 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1757 if (hw->mac_type >= e1000_82543) {
1758 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1759 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1760 rxcsum |= E1000_RXCSUM_TUOFL;
1761
868d5309 1762 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1763 * Must be used in conjunction with packet-split. */
96838a40
JB		 1764 if ((hw->mac_type >= e1000_82571) &&
1765 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1766 rxcsum |= E1000_RXCSUM_IPPCSE;
1767 }
1768 } else {
1769 rxcsum &= ~E1000_RXCSUM_TUOFL;
1770 /* don't need to clear IPPCSE as it defaults to 0 */
1771 }
581d708e 1772 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1773 }
1774
581d708e
MC		 1775 if (hw->mac_type == e1000_82573)
1776 E1000_WRITE_REG(hw, ERT, 0x0100);
2d7edb92 1777
1da177e4 1778 /* Enable Receives */
581d708e 1779 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1780}
1781
1782/**
581d708e 1783 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1784 * @adapter: board private structure
581d708e 1785 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1786 *
1787 * Free all transmit software resources
1788 **/
1789
3ad2cc67 1790static void
581d708e
MC		 1791e1000_free_tx_resources(struct e1000_adapter *adapter,
1792 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1793{
1794 struct pci_dev *pdev = adapter->pdev;
1795
581d708e 1796 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1797
581d708e
MC		 1798 vfree(tx_ring->buffer_info);
1799 tx_ring->buffer_info = NULL;
1da177e4 1800
581d708e 1801 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1802
581d708e
MC		 1803 tx_ring->desc = NULL;
1804}
1805
1806/**
1807 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1808 * @adapter: board private structure
1809 *
1810 * Free all transmit software resources
1811 **/
1812
1813void
1814e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1815{
1816 int i;
1817
f56799ea 1818 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1819 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1820}
1821
1822static inline void
1823e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1824 struct e1000_buffer *buffer_info)
1825{
96838a40 1826 if (buffer_info->dma) {
2648345f
MC		 1827 pci_unmap_page(adapter->pdev,
1828 buffer_info->dma,
1829 buffer_info->length,
1830 PCI_DMA_TODEVICE);
1da177e4 1831 }
8241e35e 1832 if (buffer_info->skb)
1da177e4 1833 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1834 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1835}
1836
1837/**
1838 * e1000_clean_tx_ring - Free Tx Buffers
1839 * @adapter: board private structure
581d708e 1840 * @tx_ring: ring to be cleaned
1da177e4
LT		 1841 **/
1842
1843static void
581d708e
MC		 1844e1000_clean_tx_ring(struct e1000_adapter *adapter,
1845 struct e1000_tx_ring *tx_ring)
1da177e4 1846{
1da177e4
LT		 1847 struct e1000_buffer *buffer_info;
1848 unsigned long size;
1849 unsigned int i;
1850
1851 /* Free all the Tx ring sk_buffs */
1852
96838a40 1853 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1854 buffer_info = &tx_ring->buffer_info[i];
1855 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1856 }
1857
1858 size = sizeof(struct e1000_buffer) * tx_ring->count;
1859 memset(tx_ring->buffer_info, 0, size);
1860
1861 /* Zero out the descriptor ring */
1862
1863 memset(tx_ring->desc, 0, tx_ring->size);
1864
1865 tx_ring->next_to_use = 0;
1866 tx_ring->next_to_clean = 0;
fd803241 1867 tx_ring->last_tx_tso = 0;
1da177e4 1868
581d708e
MC		 1869 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1870 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1871}
1872
1873/**
1874 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1875 * @adapter: board private structure
1876 **/
1877
1878static void
1879e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1880{
1881 int i;
1882
f56799ea 1883 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1884 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1885}
1886
1887/**
1888 * e1000_free_rx_resources - Free Rx Resources
1889 * @adapter: board private structure
581d708e 1890 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1891 *
1892 * Free all receive software resources
1893 **/
1894
3ad2cc67 1895static void
581d708e
MC		 1896e1000_free_rx_resources(struct e1000_adapter *adapter,
1897 struct e1000_rx_ring *rx_ring)
1da177e4 1898{
1da177e4
LT		 1899 struct pci_dev *pdev = adapter->pdev;
1900
581d708e 1901 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1902
1903 vfree(rx_ring->buffer_info);
1904 rx_ring->buffer_info = NULL;
2d7edb92
MC		 1905 kfree(rx_ring->ps_page);
1906 rx_ring->ps_page = NULL;
1907 kfree(rx_ring->ps_page_dma);
1908 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 1909
1910 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1911
1912 rx_ring->desc = NULL;
1913}
1914
1915/**
581d708e 1916 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1917 * @adapter: board private structure
581d708e
MC		 1918 *
1919 * Free all receive software resources
1920 **/
1921
1922void
1923e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1924{
1925 int i;
1926
f56799ea 1927 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 1928 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1929}
1930
1931/**
1932 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1933 * @adapter: board private structure
1934 * @rx_ring: ring to free buffers from
1da177e4
LT		 1935 **/
1936
1937static void
581d708e
MC		 1938e1000_clean_rx_ring(struct e1000_adapter *adapter,
1939 struct e1000_rx_ring *rx_ring)
1da177e4 1940{
1da177e4 1941 struct e1000_buffer *buffer_info;
2d7edb92
MC		 1942 struct e1000_ps_page *ps_page;
1943 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 1944 struct pci_dev *pdev = adapter->pdev;
1945 unsigned long size;
2d7edb92 1946 unsigned int i, j;
1da177e4
LT		 1947
1948 /* Free all the Rx ring sk_buffs */
96838a40 1949 for (i = 0; i < rx_ring->count; i++) {
1da177e4 1950 buffer_info = &rx_ring->buffer_info[i];
96838a40 1951 if (buffer_info->skb) {
1da177e4
LT		 1952 pci_unmap_single(pdev,
1953 buffer_info->dma,
1954 buffer_info->length,
1955 PCI_DMA_FROMDEVICE);
1956
1957 dev_kfree_skb(buffer_info->skb);
1958 buffer_info->skb = NULL;
997f5cbd
JK		 1959 }
1960 ps_page = &rx_ring->ps_page[i];
1961 ps_page_dma = &rx_ring->ps_page_dma[i];
1962 for (j = 0; j < adapter->rx_ps_pages; j++) {
1963 if (!ps_page->ps_page[j]) break;
1964 pci_unmap_page(pdev,
1965 ps_page_dma->ps_page_dma[j],
1966 PAGE_SIZE, PCI_DMA_FROMDEVICE);
1967 ps_page_dma->ps_page_dma[j] = 0;
1968 put_page(ps_page->ps_page[j]);
1969 ps_page->ps_page[j] = NULL;
1da177e4
LT		 1970 }
1971 }
1972
1973 size = sizeof(struct e1000_buffer) * rx_ring->count;
1974 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 1975 size = sizeof(struct e1000_ps_page) * rx_ring->count;
1976 memset(rx_ring->ps_page, 0, size);
1977 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
1978 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 1979
1980 /* Zero out the descriptor ring */
1981
1982 memset(rx_ring->desc, 0, rx_ring->size);
1983
1984 rx_ring->next_to_clean = 0;
1985 rx_ring->next_to_use = 0;
1986
581d708e
MC		 1987 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
1988 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
1989}
1990
1991/**
1992 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
1993 * @adapter: board private structure
1994 **/
1995
1996static void
1997e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
1998{
1999 int i;
2000
f56799ea 2001 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2002 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2003}
2004
2005/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2006 * and memory write and invalidate disabled for certain operations
2007 */
2008static void
2009e1000_enter_82542_rst(struct e1000_adapter *adapter)
2010{
2011 struct net_device *netdev = adapter->netdev;
2012 uint32_t rctl;
2013
2014 e1000_pci_clear_mwi(&adapter->hw);
2015
2016 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2017 rctl |= E1000_RCTL_RST;
2018 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2019 E1000_WRITE_FLUSH(&adapter->hw);
2020 mdelay(5);
2021
96838a40 2022 if (netif_running(netdev))
581d708e 2023 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2024}
2025
2026static void
2027e1000_leave_82542_rst(struct e1000_adapter *adapter)
2028{
2029 struct net_device *netdev = adapter->netdev;
2030 uint32_t rctl;
2031
2032 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2033 rctl &= ~E1000_RCTL_RST;
2034 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2035 E1000_WRITE_FLUSH(&adapter->hw);
2036 mdelay(5);
2037
96838a40 2038 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2039 e1000_pci_set_mwi(&adapter->hw);
2040
96838a40 2041 if (netif_running(netdev)) {
72d64a43
JK		 2042 /* No need to loop, because 82542 supports only 1 queue */
2043 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2044 e1000_configure_rx(adapter);
72d64a43 2045 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2046 }
2047}
2048
2049/**
2050 * e1000_set_mac - Change the Ethernet Address of the NIC
2051 * @netdev: network interface device structure
2052 * @p: pointer to an address structure
2053 *
2054 * Returns 0 on success, negative on failure
2055 **/
2056
2057static int
2058e1000_set_mac(struct net_device *netdev, void *p)
2059{
60490fe0 2060 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2061 struct sockaddr *addr = p;
2062
96838a40 2063 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2064 return -EADDRNOTAVAIL;
2065
2066 /* 82542 2.0 needs to be in reset to write receive address registers */
2067
96838a40 2068 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2069 e1000_enter_82542_rst(adapter);
2070
2071 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2072 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2073
2074 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2075
868d5309
MC		 2076 /* With 82571 controllers, LAA may be overwritten (with the default)
2077 * due to controller reset from the other port. */
2078 if (adapter->hw.mac_type == e1000_82571) {
2079 /* activate the work around */
2080 adapter->hw.laa_is_present = 1;
2081
96838a40
JB		 2082 /* Hold a copy of the LAA in RAR[14] This is done so that
2083 * between the time RAR[0] gets clobbered and the time it
2084 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2085 * of the RARs and no incoming packets directed to this port
96838a40 2086 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2087 * RAR[14] */
96838a40 2088 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2089 E1000_RAR_ENTRIES - 1);
2090 }
2091
96838a40 2092 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2093 e1000_leave_82542_rst(adapter);
2094
2095 return 0;
2096}
2097
2098/**
2099 * e1000_set_multi - Multicast and Promiscuous mode set
2100 * @netdev: network interface device structure
2101 *
2102 * The set_multi entry point is called whenever the multicast address
2103 * list or the network interface flags are updated. This routine is
2104 * responsible for configuring the hardware for proper multicast,
2105 * promiscuous mode, and all-multi behavior.
2106 **/
2107
2108static void
2109e1000_set_multi(struct net_device *netdev)
2110{
60490fe0 2111 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2112 struct e1000_hw *hw = &adapter->hw;
2113 struct dev_mc_list *mc_ptr;
2114 uint32_t rctl;
2115 uint32_t hash_value;
868d5309 2116 int i, rar_entries = E1000_RAR_ENTRIES;
1da177e4 2117
868d5309
MC		 2118 /* reserve RAR[14] for LAA over-write work-around */
2119 if (adapter->hw.mac_type == e1000_82571)
2120 rar_entries--;
1da177e4 2121
2648345f
MC		 2122 /* Check for Promiscuous and All Multicast modes */
2123
1da177e4
LT		 2124 rctl = E1000_READ_REG(hw, RCTL);
2125
96838a40 2126 if (netdev->flags & IFF_PROMISC) {
1da177e4 2127 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2128 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2129 rctl |= E1000_RCTL_MPE;
2130 rctl &= ~E1000_RCTL_UPE;
2131 } else {
2132 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2133 }
2134
2135 E1000_WRITE_REG(hw, RCTL, rctl);
2136
2137 /* 82542 2.0 needs to be in reset to write receive address registers */
2138
96838a40 2139 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2140 e1000_enter_82542_rst(adapter);
2141
2142 /* load the first 14 multicast address into the exact filters 1-14
2143 * RAR 0 is used for the station MAC adddress
2144 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2145 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2146 */
2147 mc_ptr = netdev->mc_list;
2148
96838a40 2149 for (i = 1; i < rar_entries; i++) {
868d5309 2150 if (mc_ptr) {
1da177e4
LT		 2151 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2152 mc_ptr = mc_ptr->next;
2153 } else {
2154 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2155 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2156 }
2157 }
2158
2159 /* clear the old settings from the multicast hash table */
2160
96838a40 2161 for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
1da177e4
LT		 2162 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2163
2164 /* load any remaining addresses into the hash table */
2165
96838a40 2166 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2167 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2168 e1000_mta_set(hw, hash_value);
2169 }
2170
96838a40 2171 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2172 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2173}
2174
2175/* Need to wait a few seconds after link up to get diagnostic information from
2176 * the phy */
2177
2178static void
2179e1000_update_phy_info(unsigned long data)
2180{
2181 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2182 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2183}
2184
2185/**
2186 * e1000_82547_tx_fifo_stall - Timer Call-back
2187 * @data: pointer to adapter cast into an unsigned long
2188 **/
2189
2190static void
2191e1000_82547_tx_fifo_stall(unsigned long data)
2192{
2193 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2194 struct net_device *netdev = adapter->netdev;
2195 uint32_t tctl;
2196
96838a40
JB		 2197 if (atomic_read(&adapter->tx_fifo_stall)) {
2198 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2199 E1000_READ_REG(&adapter->hw, TDH)) &&
2200 (E1000_READ_REG(&adapter->hw, TDFT) ==
2201 E1000_READ_REG(&adapter->hw, TDFH)) &&
2202 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2203 E1000_READ_REG(&adapter->hw, TDFHS))) {
2204 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2205 E1000_WRITE_REG(&adapter->hw, TCTL,
2206 tctl & ~E1000_TCTL_EN);
2207 E1000_WRITE_REG(&adapter->hw, TDFT,
2208 adapter->tx_head_addr);
2209 E1000_WRITE_REG(&adapter->hw, TDFH,
2210 adapter->tx_head_addr);
2211 E1000_WRITE_REG(&adapter->hw, TDFTS,
2212 adapter->tx_head_addr);
2213 E1000_WRITE_REG(&adapter->hw, TDFHS,
2214 adapter->tx_head_addr);
2215 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2216 E1000_WRITE_FLUSH(&adapter->hw);
2217
2218 adapter->tx_fifo_head = 0;
2219 atomic_set(&adapter->tx_fifo_stall, 0);
2220 netif_wake_queue(netdev);
2221 } else {
2222 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2223 }
2224 }
2225}
2226
2227/**
2228 * e1000_watchdog - Timer Call-back
2229 * @data: pointer to adapter cast into an unsigned long
2230 **/
2231static void
2232e1000_watchdog(unsigned long data)
2233{
2234 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2235
2236 /* Do the rest outside of interrupt context */
2237 schedule_work(&adapter->watchdog_task);
2238}
2239
2240static void
2241e1000_watchdog_task(struct e1000_adapter *adapter)
2242{
2243 struct net_device *netdev = adapter->netdev;
545c67c0 2244 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2245 uint32_t link, tctl;
1da177e4
LT		 2246
2247 e1000_check_for_link(&adapter->hw);
2d7edb92
MC		 2248 if (adapter->hw.mac_type == e1000_82573) {
2249 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2250 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2251 e1000_update_mng_vlan(adapter);
96838a40 2252 }
1da177e4 2253
96838a40 2254 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2255 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2256 link = !adapter->hw.serdes_link_down;
2257 else
2258 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2259
96838a40
JB		 2260 if (link) {
2261 if (!netif_carrier_ok(netdev)) {
1da177e4
LT		 2262 e1000_get_speed_and_duplex(&adapter->hw,
2263 &adapter->link_speed,
2264 &adapter->link_duplex);
2265
2266 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2267 adapter->link_speed,
2268 adapter->link_duplex == FULL_DUPLEX ?
2269 "Full Duplex" : "Half Duplex");
2270
7e6c9861
JK		 2271 /* tweak tx_queue_len according to speed/duplex
2272 * and adjust the timeout factor */
66a2b0a3
JK		 2273 netdev->tx_queue_len = adapter->tx_queue_len;
2274 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2275 adapter->txb2b = 1;
2276 switch (adapter->link_speed) {
2277 case SPEED_10:
2278 adapter->txb2b = 0;
2279 netdev->tx_queue_len = 10;
2280 adapter->tx_timeout_factor = 8;
2281 break;
2282 case SPEED_100:
2283 adapter->txb2b = 0;
2284 netdev->tx_queue_len = 100;
2285 /* maybe add some timeout factor ? */
2286 break;
2287 }
2288
2289 if ((adapter->hw.mac_type == e1000_82571 ||
2290 adapter->hw.mac_type == e1000_82572) &&
2291 adapter->txb2b == 0) {
2292#define SPEED_MODE_BIT (1 << 21)
2293 uint32_t tarc0;
2294 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2295 tarc0 &= ~SPEED_MODE_BIT;
2296 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2297 }
2298
2299#ifdef NETIF_F_TSO
2300 /* disable TSO for pcie and 10/100 speeds, to avoid
2301 * some hardware issues */
2302 if (!adapter->tso_force &&
2303 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2304 switch (adapter->link_speed) {
2305 case SPEED_10:
66a2b0a3 2306 case SPEED_100:
7e6c9861
JK		 2307 DPRINTK(PROBE,INFO,
2308 "10/100 speed: disabling TSO\n");
2309 netdev->features &= ~NETIF_F_TSO;
2310 break;
2311 case SPEED_1000:
2312 netdev->features |= NETIF_F_TSO;
2313 break;
2314 default:
2315 /* oops */
66a2b0a3
JK		 2316 break;
2317 }
2318 }
7e6c9861
JK		 2319#endif
2320
2321 /* enable transmits in the hardware, need to do this
2322 * after setting TARC0 */
2323 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2324 tctl |= E1000_TCTL_EN;
2325 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2326
1da177e4
LT		 2327 netif_carrier_on(netdev);
2328 netif_wake_queue(netdev);
2329 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2330 adapter->smartspeed = 0;
2331 }
2332 } else {
96838a40 2333 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2334 adapter->link_speed = 0;
2335 adapter->link_duplex = 0;
2336 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2337 netif_carrier_off(netdev);
2338 netif_stop_queue(netdev);
2339 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2340
2341 /* 80003ES2LAN workaround--
2342 * For packet buffer work-around on link down event;
2343 * disable receives in the ISR and
2344 * reset device here in the watchdog
2345 */
2346 if (adapter->hw.mac_type == e1000_80003es2lan) {
2347 /* reset device */
2348 schedule_work(&adapter->reset_task);
2349 }
1da177e4
LT		 2350 }
2351
2352 e1000_smartspeed(adapter);
2353 }
2354
2355 e1000_update_stats(adapter);
2356
2357 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2358 adapter->tpt_old = adapter->stats.tpt;
2359 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2360 adapter->colc_old = adapter->stats.colc;
2361
2362 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2363 adapter->gorcl_old = adapter->stats.gorcl;
2364 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2365 adapter->gotcl_old = adapter->stats.gotcl;
2366
2367 e1000_update_adaptive(&adapter->hw);
2368
f56799ea 2369 if (!netif_carrier_ok(netdev)) {
581d708e 2370 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2371 /* We've lost link, so the controller stops DMA,
2372 * but we've got queued Tx work that's never going
2373 * to get done, so reset controller to flush Tx.
2374 * (Do the reset outside of interrupt context). */
87041639
JK		 2375 adapter->tx_timeout_count++;
2376 schedule_work(&adapter->reset_task);
1da177e4
LT		 2377 }
2378 }
2379
2380 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2381 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2382 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2383 * asymmetrical Tx or Rx gets ITR=8000; everyone
2384 * else is between 2000-8000. */
2385 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2386 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2387 adapter->gotcl - adapter->gorcl :
2388 adapter->gorcl - adapter->gotcl) / 10000;
2389 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2390 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2391 }
2392
2393 /* Cause software interrupt to ensure rx ring is cleaned */
2394 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2395
2648345f 2396 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2397 adapter->detect_tx_hung = TRUE;
2398
96838a40 2399 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2400 * reset from the other port. Set the appropriate LAA in RAR[0] */
2401 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2402 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2403
1da177e4
LT		 2404 /* Reset the timer */
2405 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2406}
2407
2408#define E1000_TX_FLAGS_CSUM 0x00000001
2409#define E1000_TX_FLAGS_VLAN 0x00000002
2410#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2411#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2412#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2413#define E1000_TX_FLAGS_VLAN_SHIFT 16
2414
2415static inline int
581d708e
MC		 2416e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2417 struct sk_buff *skb)
1da177e4
LT		 2418{
2419#ifdef NETIF_F_TSO
2420 struct e1000_context_desc *context_desc;
545c67c0 2421 struct e1000_buffer *buffer_info;
1da177e4
LT		 2422 unsigned int i;
2423 uint32_t cmd_length = 0;
2d7edb92 2424 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2425 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2426 int err;
2427
96838a40 2428 if (skb_shinfo(skb)->tso_size) {
1da177e4
LT		 2429 if (skb_header_cloned(skb)) {
2430 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2431 if (err)
2432 return err;
2433 }
2434
2435 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2436 mss = skb_shinfo(skb)->tso_size;
96838a40 2437 if (skb->protocol == ntohs(ETH_P_IP)) {
2d7edb92
MC		 2438 skb->nh.iph->tot_len = 0;
2439 skb->nh.iph->check = 0;
2440 skb->h.th->check =
2441 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2442 skb->nh.iph->daddr,
2443 0,
2444 IPPROTO_TCP,
2445 0);
2446 cmd_length = E1000_TXD_CMD_IP;
2447 ipcse = skb->h.raw - skb->data - 1;
2448#ifdef NETIF_F_TSO_IPV6
96838a40 2449 } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
2d7edb92
MC		 2450 skb->nh.ipv6h->payload_len = 0;
2451 skb->h.th->check =
2452 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2453 &skb->nh.ipv6h->daddr,
2454 0,
2455 IPPROTO_TCP,
2456 0);
2457 ipcse = 0;
2458#endif
2459 }
1da177e4
LT		 2460 ipcss = skb->nh.raw - skb->data;
2461 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2462 tucss = skb->h.raw - skb->data;
2463 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2464 tucse = 0;
2465
2466 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2467 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2468
581d708e
MC		 2469 i = tx_ring->next_to_use;
2470 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2471 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2472
2473 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2474 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2475 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2476 context_desc->upper_setup.tcp_fields.tucss = tucss;
2477 context_desc->upper_setup.tcp_fields.tucso = tucso;
2478 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2479 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2480 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2481 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2482
545c67c0
JK		 2483 buffer_info->time_stamp = jiffies;
2484
581d708e
MC		 2485 if (++i == tx_ring->count) i = 0;
2486 tx_ring->next_to_use = i;
1da177e4 2487
8241e35e 2488 return TRUE;
1da177e4
LT		 2489 }
2490#endif
2491
8241e35e 2492 return FALSE;
1da177e4
LT		 2493}
2494
2495static inline boolean_t
581d708e
MC		 2496e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2497 struct sk_buff *skb)
1da177e4
LT		 2498{
2499 struct e1000_context_desc *context_desc;
545c67c0 2500 struct e1000_buffer *buffer_info;
1da177e4
LT		 2501 unsigned int i;
2502 uint8_t css;
2503
96838a40 2504 if (likely(skb->ip_summed == CHECKSUM_HW)) {
1da177e4
LT		 2505 css = skb->h.raw - skb->data;
2506
581d708e 2507 i = tx_ring->next_to_use;
545c67c0 2508 buffer_info = &tx_ring->buffer_info[i];
581d708e 2509 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2510
2511 context_desc->upper_setup.tcp_fields.tucss = css;
2512 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2513 context_desc->upper_setup.tcp_fields.tucse = 0;
2514 context_desc->tcp_seg_setup.data = 0;
2515 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2516
545c67c0
JK		 2517 buffer_info->time_stamp = jiffies;
2518
581d708e
MC		 2519 if (unlikely(++i == tx_ring->count)) i = 0;
2520 tx_ring->next_to_use = i;
1da177e4
LT		 2521
2522 return TRUE;
2523 }
2524
2525 return FALSE;
2526}
2527
2528#define E1000_MAX_TXD_PWR 12
2529#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2530
2531static inline int
581d708e
MC		 2532e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2533 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2534 unsigned int nr_frags, unsigned int mss)
1da177e4 2535{
1da177e4
LT		 2536 struct e1000_buffer *buffer_info;
2537 unsigned int len = skb->len;
2538 unsigned int offset = 0, size, count = 0, i;
2539 unsigned int f;
2540 len -= skb->data_len;
2541
2542 i = tx_ring->next_to_use;
2543
96838a40 2544 while (len) {
1da177e4
LT		 2545 buffer_info = &tx_ring->buffer_info[i];
2546 size = min(len, max_per_txd);
2547#ifdef NETIF_F_TSO
fd803241
JK		 2548 /* Workaround for Controller erratum --
2549 * descriptor for non-tso packet in a linear SKB that follows a
2550 * tso gets written back prematurely before the data is fully
0f15a8fa 2551 * DMA'd to the controller */
fd803241 2552 if (!skb->data_len && tx_ring->last_tx_tso &&
0f15a8fa 2553 !skb_shinfo(skb)->tso_size) {
fd803241
JK		 2554 tx_ring->last_tx_tso = 0;
2555 size -= 4;
2556 }
2557
1da177e4
LT		 2558 /* Workaround for premature desc write-backs
2559 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2560 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2561 size -= 4;
2562#endif
97338bde
MC		 2563 /* work-around for errata 10 and it applies
2564 * to all controllers in PCI-X mode
2565 * The fix is to make sure that the first descriptor of a
2566 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2567 */
96838a40 2568 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2569 (size > 2015) && count == 0))
2570 size = 2015;
96838a40 2571
1da177e4
LT		 2572 /* Workaround for potential 82544 hang in PCI-X. Avoid
2573 * terminating buffers within evenly-aligned dwords. */
96838a40 2574 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2575 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2576 size > 4))
2577 size -= 4;
2578
2579 buffer_info->length = size;
2580 buffer_info->dma =
2581 pci_map_single(adapter->pdev,
2582 skb->data + offset,
2583 size,
2584 PCI_DMA_TODEVICE);
2585 buffer_info->time_stamp = jiffies;
2586
2587 len -= size;
2588 offset += size;
2589 count++;
96838a40 2590 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2591 }
2592
96838a40 2593 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2594 struct skb_frag_struct *frag;
2595
2596 frag = &skb_shinfo(skb)->frags[f];
2597 len = frag->size;
2598 offset = frag->page_offset;
2599
96838a40 2600 while (len) {
1da177e4
LT		 2601 buffer_info = &tx_ring->buffer_info[i];
2602 size = min(len, max_per_txd);
2603#ifdef NETIF_F_TSO
2604 /* Workaround for premature desc write-backs
2605 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2606 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2607 size -= 4;
2608#endif
2609 /* Workaround for potential 82544 hang in PCI-X.
2610 * Avoid terminating buffers within evenly-aligned
2611 * dwords. */
96838a40 2612 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2613 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2614 size > 4))
2615 size -= 4;
2616
2617 buffer_info->length = size;
2618 buffer_info->dma =
2619 pci_map_page(adapter->pdev,
2620 frag->page,
2621 offset,
2622 size,
2623 PCI_DMA_TODEVICE);
2624 buffer_info->time_stamp = jiffies;
2625
2626 len -= size;
2627 offset += size;
2628 count++;
96838a40 2629 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2630 }
2631 }
2632
2633 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2634 tx_ring->buffer_info[i].skb = skb;
2635 tx_ring->buffer_info[first].next_to_watch = i;
2636
2637 return count;
2638}
2639
2640static inline void
581d708e
MC		 2641e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2642 int tx_flags, int count)
1da177e4 2643{
1da177e4
LT		 2644 struct e1000_tx_desc *tx_desc = NULL;
2645 struct e1000_buffer *buffer_info;
2646 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2647 unsigned int i;
2648
96838a40 2649 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2650 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2651 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2652 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2653
96838a40 2654 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2655 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2656 }
2657
96838a40 2658 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2659 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2660 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2661 }
2662
96838a40 2663 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2664 txd_lower |= E1000_TXD_CMD_VLE;
2665 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2666 }
2667
2668 i = tx_ring->next_to_use;
2669
96838a40 2670 while (count--) {
1da177e4
LT		 2671 buffer_info = &tx_ring->buffer_info[i];
2672 tx_desc = E1000_TX_DESC(*tx_ring, i);
2673 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2674 tx_desc->lower.data =
2675 cpu_to_le32(txd_lower | buffer_info->length);
2676 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2677 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2678 }
2679
2680 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2681
2682 /* Force memory writes to complete before letting h/w
2683 * know there are new descriptors to fetch. (Only
2684 * applicable for weak-ordered memory model archs,
2685 * such as IA-64). */
2686 wmb();
2687
2688 tx_ring->next_to_use = i;
581d708e 2689 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2690}
2691
2692/**
2693 * 82547 workaround to avoid controller hang in half-duplex environment.
2694 * The workaround is to avoid queuing a large packet that would span
2695 * the internal Tx FIFO ring boundary by notifying the stack to resend
2696 * the packet at a later time. This gives the Tx FIFO an opportunity to
2697 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2698 * to the beginning of the Tx FIFO.
2699 **/
2700
2701#define E1000_FIFO_HDR 0x10
2702#define E1000_82547_PAD_LEN 0x3E0
2703
2704static inline int
2705e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2706{
2707 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2708 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2709
2710 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2711
96838a40 2712 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2713 goto no_fifo_stall_required;
2714
96838a40 2715 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2716 return 1;
2717
96838a40 2718 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2719 atomic_set(&adapter->tx_fifo_stall, 1);
2720 return 1;
2721 }
2722
2723no_fifo_stall_required:
2724 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2725 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2726 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2727 return 0;
2728}
2729
2d7edb92
MC		 2730#define MINIMUM_DHCP_PACKET_SIZE 282
2731static inline int
2732e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2733{
2734 struct e1000_hw *hw = &adapter->hw;
2735 uint16_t length, offset;
96838a40
JB		 2736 if (vlan_tx_tag_present(skb)) {
2737 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2738 ( adapter->hw.mng_cookie.status &
2739 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2740 return 0;
2741 }
20a44028 2742 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2743 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2744 if ((htons(ETH_P_IP) == eth->h_proto)) {
2745 const struct iphdr *ip =
2d7edb92 2746 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2747 if (IPPROTO_UDP == ip->protocol) {
2748 struct udphdr *udp =
2749 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2750 (ip->ihl << 2));
96838a40 2751 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2752 offset = (uint8_t *)udp + 8 - skb->data;
2753 length = skb->len - offset;
2754
2755 return e1000_mng_write_dhcp_info(hw,
96838a40 2756 (uint8_t *)udp + 8,
2d7edb92
MC		 2757 length);
2758 }
2759 }
2760 }
2761 }
2762 return 0;
2763}
2764
1da177e4
LT		 2765#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2766static int
2767e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2768{
60490fe0 2769 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2770 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2771 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2772 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2773 unsigned int tx_flags = 0;
2774 unsigned int len = skb->len;
2775 unsigned long flags;
2776 unsigned int nr_frags = 0;
2777 unsigned int mss = 0;
2778 int count = 0;
96838a40 2779 int tso;
1da177e4
LT		 2780 unsigned int f;
2781 len -= skb->data_len;
2782
581d708e 2783 tx_ring = adapter->tx_ring;
24025e4e 2784
581d708e 2785 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2786 dev_kfree_skb_any(skb);
2787 return NETDEV_TX_OK;
2788 }
2789
2790#ifdef NETIF_F_TSO
2791 mss = skb_shinfo(skb)->tso_size;
2648345f 2792 /* The controller does a simple calculation to
1da177e4
LT		 2793 * make sure there is enough room in the FIFO before
2794 * initiating the DMA for each buffer. The calc is:
2795 * 4 = ceil(buffer len/mss). To make sure we don't
2796 * overrun the FIFO, adjust the max buffer len if mss
2797 * drops. */
96838a40 2798 if (mss) {
9a3056da 2799 uint8_t hdr_len;
1da177e4
LT		 2800 max_per_txd = min(mss << 2, max_per_txd);
2801 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2802
9f687888 2803 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
9a3056da
JK		 2804 * points to just header, pull a few bytes of payload from
2805 * frags into skb->data */
2806 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 2807 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2808 switch (adapter->hw.mac_type) {
2809 unsigned int pull_size;
2810 case e1000_82571:
2811 case e1000_82572:
2812 case e1000_82573:
2813 pull_size = min((unsigned int)4, skb->data_len);
2814 if (!__pskb_pull_tail(skb, pull_size)) {
2815 printk(KERN_ERR
2816 "__pskb_pull_tail failed.\n");
2817 dev_kfree_skb_any(skb);
2818 return -EFAULT;
2819 }
2820 len = skb->len - skb->data_len;
2821 break;
2822 default:
2823 /* do nothing */
2824 break;
d74bbd3b 2825 }
9a3056da 2826 }
1da177e4
LT		 2827 }
2828
9a3056da 2829 /* reserve a descriptor for the offload context */
96838a40 2830 if ((mss) || (skb->ip_summed == CHECKSUM_HW))
1da177e4 2831 count++;
2648345f 2832 count++;
1da177e4 2833#else
96838a40 2834 if (skb->ip_summed == CHECKSUM_HW)
1da177e4
LT		 2835 count++;
2836#endif
fd803241
JK		 2837
2838#ifdef NETIF_F_TSO
2839 /* Controller Erratum workaround */
2840 if (!skb->data_len && tx_ring->last_tx_tso &&
0f15a8fa 2841 !skb_shinfo(skb)->tso_size)
fd803241
JK		 2842 count++;
2843#endif
2844
1da177e4
LT		 2845 count += TXD_USE_COUNT(len, max_txd_pwr);
2846
96838a40 2847 if (adapter->pcix_82544)
1da177e4
LT		 2848 count++;
2849
96838a40 2850 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2851 * in PCI-X mode, so add one more descriptor to the count
2852 */
96838a40 2853 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2854 (len > 2015)))
2855 count++;
2856
1da177e4 2857 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2858 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2859 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2860 max_txd_pwr);
96838a40 2861 if (adapter->pcix_82544)
1da177e4
LT		 2862 count += nr_frags;
2863
0f15a8fa
JK		 2864
2865 if (adapter->hw.tx_pkt_filtering &&
2866 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 2867 e1000_transfer_dhcp_info(adapter, skb);
2868
581d708e
MC		 2869 local_irq_save(flags);
2870 if (!spin_trylock(&tx_ring->tx_lock)) {
2871 /* Collision - tell upper layer to requeue */
2872 local_irq_restore(flags);
2873 return NETDEV_TX_LOCKED;
2874 }
1da177e4
LT		 2875
2876 /* need: count + 2 desc gap to keep tail from touching
2877 * head, otherwise try next time */
581d708e 2878 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2879 netif_stop_queue(netdev);
581d708e 2880 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2881 return NETDEV_TX_BUSY;
2882 }
2883
96838a40
JB		 2884 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
2885 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 2886 netif_stop_queue(netdev);
2887 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2888 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2889 return NETDEV_TX_BUSY;
2890 }
2891 }
2892
96838a40 2893 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 2894 tx_flags |= E1000_TX_FLAGS_VLAN;
2895 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2896 }
2897
581d708e 2898 first = tx_ring->next_to_use;
96838a40 2899
581d708e 2900 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2901 if (tso < 0) {
2902 dev_kfree_skb_any(skb);
581d708e 2903 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2904 return NETDEV_TX_OK;
2905 }
2906
fd803241
JK		 2907 if (likely(tso)) {
2908 tx_ring->last_tx_tso = 1;
1da177e4 2909 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 2910 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 2911 tx_flags |= E1000_TX_FLAGS_CSUM;
2912
2d7edb92 2913 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 2914 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 2915 * no longer assume, we must. */
581d708e 2916 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2d7edb92
MC		 2917 tx_flags |= E1000_TX_FLAGS_IPV4;
2918
581d708e
MC		 2919 e1000_tx_queue(adapter, tx_ring, tx_flags,
2920 e1000_tx_map(adapter, tx_ring, skb, first,
2921 max_per_txd, nr_frags, mss));
1da177e4
LT		 2922
2923 netdev->trans_start = jiffies;
2924
2925 /* Make sure there is space in the ring for the next send. */
581d708e 2926 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 2927 netif_stop_queue(netdev);
2928
581d708e 2929 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2930 return NETDEV_TX_OK;
2931}
2932
2933/**
2934 * e1000_tx_timeout - Respond to a Tx Hang
2935 * @netdev: network interface device structure
2936 **/
2937
2938static void
2939e1000_tx_timeout(struct net_device *netdev)
2940{
60490fe0 2941 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2942
2943 /* Do the reset outside of interrupt context */
87041639
JK		 2944 adapter->tx_timeout_count++;
2945 schedule_work(&adapter->reset_task);
1da177e4
LT		 2946}
2947
2948static void
87041639 2949e1000_reset_task(struct net_device *netdev)
1da177e4 2950{
60490fe0 2951 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2952
2953 e1000_down(adapter);
2954 e1000_up(adapter);
2955}
2956
2957/**
2958 * e1000_get_stats - Get System Network Statistics
2959 * @netdev: network interface device structure
2960 *
2961 * Returns the address of the device statistics structure.
2962 * The statistics are actually updated from the timer callback.
2963 **/
2964
2965static struct net_device_stats *
2966e1000_get_stats(struct net_device *netdev)
2967{
60490fe0 2968 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2969
6b7660cd 2970 /* only return the current stats */
1da177e4
LT		 2971 return &adapter->net_stats;
2972}
2973
2974/**
2975 * e1000_change_mtu - Change the Maximum Transfer Unit
2976 * @netdev: network interface device structure
2977 * @new_mtu: new value for maximum frame size
2978 *
2979 * Returns 0 on success, negative on failure
2980 **/
2981
2982static int
2983e1000_change_mtu(struct net_device *netdev, int new_mtu)
2984{
60490fe0 2985 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2986 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 2987 uint16_t eeprom_data = 0;
1da177e4 2988
96838a40
JB		 2989 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
2990 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2991 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 2992 return -EINVAL;
2d7edb92 2993 }
1da177e4 2994
997f5cbd
JK		 2995 /* Adapter-specific max frame size limits. */
2996 switch (adapter->hw.mac_type) {
2997 case e1000_82542_rev2_0:
2998 case e1000_82542_rev2_1:
997f5cbd
JK		 2999 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3000 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3001 return -EINVAL;
2d7edb92 3002 }
997f5cbd 3003 break;
85b22eb6
JK		 3004 case e1000_82573:
3005 /* only enable jumbo frames if ASPM is disabled completely
3006 * this means both bits must be zero in 0x1A bits 3:2 */
3007 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3008 &eeprom_data);
3009 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
3010 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3011 DPRINTK(PROBE, ERR,
3012 "Jumbo Frames not supported.\n");
3013 return -EINVAL;
3014 }
3015 break;
3016 }
3017 /* fall through to get support */
997f5cbd
JK		 3018 case e1000_82571:
3019 case e1000_82572:
87041639 3020 case e1000_80003es2lan:
997f5cbd
JK		 3021#define MAX_STD_JUMBO_FRAME_SIZE 9234
3022 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3023 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3024 return -EINVAL;
3025 }
3026 break;
3027 default:
3028 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3029 break;
1da177e4
LT		 3030 }
3031
997f5cbd 3032
997f5cbd 3033 if (adapter->hw.mac_type > e1000_82547_rev_2) {
a1415ee6 3034 adapter->rx_buffer_len = max_frame;
997f5cbd 3035 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
a1415ee6
JK		 3036 } else {
3037 if(unlikely((adapter->hw.mac_type < e1000_82543) &&
3038 (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
3039 DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
3040 "on 82542\n");
3041 return -EINVAL;
3042 } else {
3043 if(max_frame <= E1000_RXBUFFER_2048)
3044 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3045 else if(max_frame <= E1000_RXBUFFER_4096)
3046 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3047 else if(max_frame <= E1000_RXBUFFER_8192)
3048 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3049 else if(max_frame <= E1000_RXBUFFER_16384)
3050 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3051 }
3052 }
997f5cbd 3053
2d7edb92
MC		 3054 netdev->mtu = new_mtu;
3055
96838a40 3056 if (netif_running(netdev)) {
1da177e4
LT		 3057 e1000_down(adapter);
3058 e1000_up(adapter);
3059 }
3060
1da177e4
LT		 3061 adapter->hw.max_frame_size = max_frame;
3062
3063 return 0;
3064}
3065
3066/**
3067 * e1000_update_stats - Update the board statistics counters
3068 * @adapter: board private structure
3069 **/
3070
3071void
3072e1000_update_stats(struct e1000_adapter *adapter)
3073{
3074 struct e1000_hw *hw = &adapter->hw;
3075 unsigned long flags;
3076 uint16_t phy_tmp;
3077
3078#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3079
3080 spin_lock_irqsave(&adapter->stats_lock, flags);
3081
3082 /* these counters are modified from e1000_adjust_tbi_stats,
3083 * called from the interrupt context, so they must only
3084 * be written while holding adapter->stats_lock
3085 */
3086
3087 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3088 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3089 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3090 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3091 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3092 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3093 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3094 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3095 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3096 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3097 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3098 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3099 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3100
3101 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3102 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3103 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3104 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3105 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3106 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3107 adapter->stats.dc += E1000_READ_REG(hw, DC);
3108 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3109 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3110 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3111 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3112 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3113 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3114 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3115 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3116 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3117 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3118 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3119 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3120 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3121 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3122 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3123 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3124 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3125 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3126 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3127 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3128 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3129 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3130 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3131 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3132 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3133 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3134 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3135
3136 /* used for adaptive IFS */
3137
3138 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3139 adapter->stats.tpt += hw->tx_packet_delta;
3140 hw->collision_delta = E1000_READ_REG(hw, COLC);
3141 adapter->stats.colc += hw->collision_delta;
3142
96838a40 3143 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3144 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3145 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3146 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3147 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3148 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3149 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3150 }
96838a40 3151 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3152 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3153 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3154 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3155 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3156 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3157 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3158 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3159 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3160 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3161 }
1da177e4
LT		 3162
3163 /* Fill out the OS statistics structure */
3164
3165 adapter->net_stats.rx_packets = adapter->stats.gprc;
3166 adapter->net_stats.tx_packets = adapter->stats.gptc;
3167 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3168 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3169 adapter->net_stats.multicast = adapter->stats.mprc;
3170 adapter->net_stats.collisions = adapter->stats.colc;
3171
3172 /* Rx Errors */
3173
87041639
JK		 3174 /* RLEC on some newer hardware can be incorrect so build
3175 * our own version based on RUC and ROC */
1da177e4
LT		 3176 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3177 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3178 adapter->stats.ruc + adapter->stats.roc +
3179 adapter->stats.cexterr;
6b7660cd 3180 adapter->net_stats.rx_dropped = 0;
87041639
JK		 3181 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3182 adapter->stats.roc;
1da177e4
LT		 3183 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3184 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3185 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3186
3187 /* Tx Errors */
3188
3189 adapter->net_stats.tx_errors = adapter->stats.ecol +
3190 adapter->stats.latecol;
3191 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3192 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3193 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3194
3195 /* Tx Dropped needs to be maintained elsewhere */
3196
3197 /* Phy Stats */
3198
96838a40
JB		 3199 if (hw->media_type == e1000_media_type_copper) {
3200 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3201 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3202 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3203 adapter->phy_stats.idle_errors += phy_tmp;
3204 }
3205
96838a40 3206 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3207 (hw->phy_type == e1000_phy_m88) &&
3208 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3209 adapter->phy_stats.receive_errors += phy_tmp;
3210 }
3211
3212 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3213}
3214
3215/**
3216 * e1000_intr - Interrupt Handler
3217 * @irq: interrupt number
3218 * @data: pointer to a network interface device structure
3219 * @pt_regs: CPU registers structure
3220 **/
3221
3222static irqreturn_t
3223e1000_intr(int irq, void *data, struct pt_regs *regs)
3224{
3225 struct net_device *netdev = data;
60490fe0 3226 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3227 struct e1000_hw *hw = &adapter->hw;
87041639 3228 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3229#ifndef CONFIG_E1000_NAPI
581d708e 3230 int i;
1e613fd9
JK		 3231#else
3232 /* Interrupt Auto-Mask...upon reading ICR,
3233 * interrupts are masked. No need for the
3234 * IMC write, but it does mean we should
3235 * account for it ASAP. */
3236 if (likely(hw->mac_type >= e1000_82571))
3237 atomic_inc(&adapter->irq_sem);
be2b28ed 3238#endif
1da177e4 3239
1e613fd9
JK		 3240 if (unlikely(!icr)) {
3241#ifdef CONFIG_E1000_NAPI
3242 if (hw->mac_type >= e1000_82571)
3243 e1000_irq_enable(adapter);
3244#endif
1da177e4 3245 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3246 }
1da177e4 3247
96838a40 3248 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3249 hw->get_link_status = 1;
87041639
JK		 3250 /* 80003ES2LAN workaround--
3251 * For packet buffer work-around on link down event;
3252 * disable receives here in the ISR and
3253 * reset adapter in watchdog
3254 */
3255 if (netif_carrier_ok(netdev) &&
3256 (adapter->hw.mac_type == e1000_80003es2lan)) {
3257 /* disable receives */
3258 rctl = E1000_READ_REG(hw, RCTL);
3259 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3260 }
1da177e4
LT		 3261 mod_timer(&adapter->watchdog_timer, jiffies);
3262 }
3263
3264#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3265 if (unlikely(hw->mac_type < e1000_82571)) {
3266 atomic_inc(&adapter->irq_sem);
3267 E1000_WRITE_REG(hw, IMC, ~0);
3268 E1000_WRITE_FLUSH(hw);
3269 }
581d708e
MC		 3270 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3271 __netif_rx_schedule(&adapter->polling_netdev[0]);
3272 else
3273 e1000_irq_enable(adapter);
c1605eb3 3274#else
1da177e4 3275 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3276 * Due to Hub Link bus being occupied, an interrupt
3277 * de-assertion message is not able to be sent.
3278 * When an interrupt assertion message is generated later,
3279 * two messages are re-ordered and sent out.
3280 * That causes APIC to think 82547 is in de-assertion
3281 * state, while 82547 is in assertion state, resulting
3282 * in dead lock. Writing IMC forces 82547 into
3283 * de-assertion state.
3284 */
3285 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3286 atomic_inc(&adapter->irq_sem);
2648345f 3287 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3288 }
3289
96838a40
JB		 3290 for (i = 0; i < E1000_MAX_INTR; i++)
3291 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3292 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3293 break;
3294
96838a40 3295 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3296 e1000_irq_enable(adapter);
581d708e 3297
c1605eb3 3298#endif
1da177e4
LT		 3299
3300 return IRQ_HANDLED;
3301}
3302
3303#ifdef CONFIG_E1000_NAPI
3304/**
3305 * e1000_clean - NAPI Rx polling callback
3306 * @adapter: board private structure
3307 **/
3308
3309static int
581d708e 3310e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3311{
581d708e
MC		 3312 struct e1000_adapter *adapter;
3313 int work_to_do = min(*budget, poll_dev->quota);
38bd3b26 3314 int tx_cleaned = 0, i = 0, work_done = 0;
581d708e
MC		 3315
3316 /* Must NOT use netdev_priv macro here. */
3317 adapter = poll_dev->priv;
3318
3319 /* Keep link state information with original netdev */
3320 if (!netif_carrier_ok(adapter->netdev))
3321 goto quit_polling;
2648345f 3322
581d708e
MC		 3323 while (poll_dev != &adapter->polling_netdev[i]) {
3324 i++;
f56799ea 3325 if (unlikely(i == adapter->num_rx_queues))
581d708e
MC		 3326 BUG();
3327 }
3328
8241e35e
JK		 3329 if (likely(adapter->num_tx_queues == 1)) {
3330 /* e1000_clean is called per-cpu. This lock protects
3331 * tx_ring[0] from being cleaned by multiple cpus
3332 * simultaneously. A failure obtaining the lock means
3333 * tx_ring[0] is currently being cleaned anyway. */
3334 if (spin_trylock(&adapter->tx_queue_lock)) {
3335 tx_cleaned = e1000_clean_tx_irq(adapter,
3336 &adapter->tx_ring[0]);
3337 spin_unlock(&adapter->tx_queue_lock);
3338 }
3339 } else
3340 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3341
581d708e
MC		 3342 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3343 &work_done, work_to_do);
1da177e4
LT		 3344
3345 *budget -= work_done;
581d708e 3346 poll_dev->quota -= work_done;
96838a40 3347
2b02893e 3348 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3349 if ((!tx_cleaned && (work_done == 0)) ||
581d708e
MC		 3350 !netif_running(adapter->netdev)) {
3351quit_polling:
3352 netif_rx_complete(poll_dev);
1da177e4
LT		 3353 e1000_irq_enable(adapter);
3354 return 0;
3355 }
3356
3357 return 1;
3358}
3359
3360#endif
3361/**
3362 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3363 * @adapter: board private structure
3364 **/
3365
3366static boolean_t
581d708e
MC		 3367e1000_clean_tx_irq(struct e1000_adapter *adapter,
3368 struct e1000_tx_ring *tx_ring)
1da177e4 3369{
1da177e4
LT		 3370 struct net_device *netdev = adapter->netdev;
3371 struct e1000_tx_desc *tx_desc, *eop_desc;
3372 struct e1000_buffer *buffer_info;
3373 unsigned int i, eop;
2a1af5d7
JK		 3374#ifdef CONFIG_E1000_NAPI
3375 unsigned int count = 0;
3376#endif
1da177e4
LT		 3377 boolean_t cleaned = FALSE;
3378
3379 i = tx_ring->next_to_clean;
3380 eop = tx_ring->buffer_info[i].next_to_watch;
3381 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3382
581d708e 3383 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3384 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3385 tx_desc = E1000_TX_DESC(*tx_ring, i);
3386 buffer_info = &tx_ring->buffer_info[i];
3387 cleaned = (i == eop);
3388
fd803241 3389 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3390 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3391
96838a40 3392 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3393 }
581d708e 3394
7bfa4816 3395
1da177e4
LT		 3396 eop = tx_ring->buffer_info[i].next_to_watch;
3397 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3398#ifdef CONFIG_E1000_NAPI
3399#define E1000_TX_WEIGHT 64
3400 /* weight of a sort for tx, to avoid endless transmit cleanup */
3401 if (count++ == E1000_TX_WEIGHT) break;
3402#endif
1da177e4
LT		 3403 }
3404
3405 tx_ring->next_to_clean = i;
3406
581d708e 3407 spin_lock(&tx_ring->tx_lock);
1da177e4 3408
96838a40 3409 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
1da177e4
LT		 3410 netif_carrier_ok(netdev)))
3411 netif_wake_queue(netdev);
3412
581d708e 3413 spin_unlock(&tx_ring->tx_lock);
2648345f 3414
581d708e 3415 if (adapter->detect_tx_hung) {
2648345f 3416 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3417 * check with the clearing of time_stamp and movement of i */
3418 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3419 if (tx_ring->buffer_info[eop].dma &&
3420 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3421 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3422 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3423 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3424
3425 /* detected Tx unit hang */
c6963ef5 3426 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3427 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3428 " TDH <%x>\n"
3429 " TDT <%x>\n"
3430 " next_to_use <%x>\n"
3431 " next_to_clean <%x>\n"
3432 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3433 " time_stamp <%lx>\n"
3434 " next_to_watch <%x>\n"
3435 " jiffies <%lx>\n"
3436 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3437 (unsigned long)((tx_ring - adapter->tx_ring) /
3438 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3439 readl(adapter->hw.hw_addr + tx_ring->tdh),
3440 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3441 tx_ring->next_to_use,
392137fa
JK		 3442 tx_ring->next_to_clean,
3443 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3444 eop,
3445 jiffies,
3446 eop_desc->upper.fields.status);
1da177e4 3447 netif_stop_queue(netdev);
70b8f1e1 3448 }
1da177e4 3449 }
1da177e4
LT		 3450 return cleaned;
3451}
3452
3453/**
3454 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3455 * @adapter: board private structure
3456 * @status_err: receive descriptor status and error fields
3457 * @csum: receive descriptor csum field
3458 * @sk_buff: socket buffer with received data
1da177e4
LT		 3459 **/
3460
3461static inline void
3462e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3463 uint32_t status_err, uint32_t csum,
3464 struct sk_buff *skb)
1da177e4 3465{
2d7edb92
MC		 3466 uint16_t status = (uint16_t)status_err;
3467 uint8_t errors = (uint8_t)(status_err >> 24);
3468 skb->ip_summed = CHECKSUM_NONE;
3469
1da177e4 3470 /* 82543 or newer only */
96838a40 3471 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3472 /* Ignore Checksum bit is set */
96838a40 3473 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3474 /* TCP/UDP checksum error bit is set */
96838a40 3475 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3476 /* let the stack verify checksum errors */
1da177e4 3477 adapter->hw_csum_err++;
2d7edb92
MC		 3478 return;
3479 }
3480 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3481 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3482 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3483 return;
1da177e4 3484 } else {
96838a40 3485 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3486 return;
3487 }
3488 /* It must be a TCP or UDP packet with a valid checksum */
3489 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3490 /* TCP checksum is good */
3491 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3492 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3493 /* IP fragment with UDP payload */
3494 /* Hardware complements the payload checksum, so we undo it
3495 * and then put the value in host order for further stack use.
3496 */
3497 csum = ntohl(csum ^ 0xFFFF);
3498 skb->csum = csum;
3499 skb->ip_summed = CHECKSUM_HW;
1da177e4 3500 }
2d7edb92 3501 adapter->hw_csum_good++;
1da177e4
LT		 3502}
3503
3504/**
2d7edb92 3505 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3506 * @adapter: board private structure
3507 **/
3508
3509static boolean_t
3510#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3511e1000_clean_rx_irq(struct e1000_adapter *adapter,
3512 struct e1000_rx_ring *rx_ring,
3513 int *work_done, int work_to_do)
1da177e4 3514#else
581d708e
MC		 3515e1000_clean_rx_irq(struct e1000_adapter *adapter,
3516 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3517#endif
3518{
1da177e4
LT		 3519 struct net_device *netdev = adapter->netdev;
3520 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3521 struct e1000_rx_desc *rx_desc, *next_rxd;
3522 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3523 unsigned long flags;
3524 uint32_t length;
3525 uint8_t last_byte;
3526 unsigned int i;
72d64a43 3527 int cleaned_count = 0;
a1415ee6 3528 boolean_t cleaned = FALSE;
1da177e4
LT		 3529
3530 i = rx_ring->next_to_clean;
3531 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3532 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3533
b92ff8ee 3534 while (rx_desc->status & E1000_RXD_STAT_DD) {
86c3d59f 3535 struct sk_buff *skb, *next_skb;
a292ca6e 3536 u8 status;
1da177e4 3537#ifdef CONFIG_E1000_NAPI
96838a40 3538 if (*work_done >= work_to_do)
1da177e4
LT		 3539 break;
3540 (*work_done)++;
3541#endif
a292ca6e 3542 status = rx_desc->status;
b92ff8ee 3543 skb = buffer_info->skb;
86c3d59f
JB		 3544 buffer_info->skb = NULL;
3545
30320be8
JK		 3546 prefetch(skb->data - NET_IP_ALIGN);
3547
86c3d59f
JB		 3548 if (++i == rx_ring->count) i = 0;
3549 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3550 prefetch(next_rxd);
3551
86c3d59f
JB		 3552 next_buffer = &rx_ring->buffer_info[i];
3553 next_skb = next_buffer->skb;
30320be8 3554 prefetch(next_skb->data - NET_IP_ALIGN);
86c3d59f 3555
72d64a43
JK		 3556 cleaned = TRUE;
3557 cleaned_count++;
a292ca6e
JK		 3558 pci_unmap_single(pdev,
3559 buffer_info->dma,
3560 buffer_info->length,
1da177e4
LT		 3561 PCI_DMA_FROMDEVICE);
3562
1da177e4
LT		 3563 length = le16_to_cpu(rx_desc->length);
3564
a1415ee6
JK		 3565 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3566 /* All receives must fit into a single buffer */
3567 E1000_DBG("%s: Receive packet consumed multiple"
3568 " buffers\n", netdev->name);
3569 dev_kfree_skb_irq(skb);
1da177e4
LT		 3570 goto next_desc;
3571 }
3572
96838a40 3573 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3574 last_byte = *(skb->data + length - 1);
b92ff8ee 3575 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3576 rx_desc->errors, length, last_byte)) {
3577 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3578 e1000_tbi_adjust_stats(&adapter->hw,
3579 &adapter->stats,
1da177e4
LT		 3580 length, skb->data);
3581 spin_unlock_irqrestore(&adapter->stats_lock,
3582 flags);
3583 length--;
3584 } else {
3585 dev_kfree_skb_irq(skb);
3586 goto next_desc;
3587 }
3588 }
3589
a292ca6e
JK		 3590 /* code added for copybreak, this should improve
3591 * performance for small packets with large amounts
3592 * of reassembly being done in the stack */
3593#define E1000_CB_LENGTH 256
a1415ee6 3594 if (length < E1000_CB_LENGTH) {
a292ca6e
JK		 3595 struct sk_buff *new_skb =
3596 dev_alloc_skb(length + NET_IP_ALIGN);
3597 if (new_skb) {
3598 skb_reserve(new_skb, NET_IP_ALIGN);
3599 new_skb->dev = netdev;
3600 memcpy(new_skb->data - NET_IP_ALIGN,
3601 skb->data - NET_IP_ALIGN,
3602 length + NET_IP_ALIGN);
3603 /* save the skb in buffer_info as good */
3604 buffer_info->skb = skb;
3605 skb = new_skb;
3606 skb_put(skb, length);
3607 }
a1415ee6
JK		 3608 } else
3609 skb_put(skb, length);
a292ca6e
JK		 3610
3611 /* end copybreak code */
1da177e4
LT		 3612
3613 /* Receive Checksum Offload */
a292ca6e
JK		 3614 e1000_rx_checksum(adapter,
3615 (uint32_t)(status) |
2d7edb92
MC		 3616 ((uint32_t)(rx_desc->errors) << 24),
3617 rx_desc->csum, skb);
96838a40 3618
1da177e4
LT		 3619 skb->protocol = eth_type_trans(skb, netdev);
3620#ifdef CONFIG_E1000_NAPI
96838a40 3621 if (unlikely(adapter->vlgrp &&
a292ca6e 3622 (status & E1000_RXD_STAT_VP))) {
1da177e4 3623 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3624 le16_to_cpu(rx_desc->special) &
3625 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3626 } else {
3627 netif_receive_skb(skb);
3628 }
3629#else /* CONFIG_E1000_NAPI */
96838a40 3630 if (unlikely(adapter->vlgrp &&
b92ff8ee 3631 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3632 vlan_hwaccel_rx(skb, adapter->vlgrp,
3633 le16_to_cpu(rx_desc->special) &
3634 E1000_RXD_SPC_VLAN_MASK);
3635 } else {
3636 netif_rx(skb);
3637 }
3638#endif /* CONFIG_E1000_NAPI */
3639 netdev->last_rx = jiffies;
3640
3641next_desc:
3642 rx_desc->status = 0;
1da177e4 3643
72d64a43
JK		 3644 /* return some buffers to hardware, one at a time is too slow */
3645 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3646 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3647 cleaned_count = 0;
3648 }
3649
30320be8 3650 /* use prefetched values */
86c3d59f
JB		 3651 rx_desc = next_rxd;
3652 buffer_info = next_buffer;
1da177e4 3653 }
1da177e4 3654 rx_ring->next_to_clean = i;
72d64a43
JK		 3655
3656 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3657 if (cleaned_count)
3658 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3659
3660 return cleaned;
3661}
3662
3663/**
3664 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3665 * @adapter: board private structure
3666 **/
3667
3668static boolean_t
3669#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3670e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3671 struct e1000_rx_ring *rx_ring,
3672 int *work_done, int work_to_do)
2d7edb92 3673#else
581d708e
MC		 3674e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3675 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3676#endif
3677{
86c3d59f 3678 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3679 struct net_device *netdev = adapter->netdev;
3680 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3681 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3682 struct e1000_ps_page *ps_page;
3683 struct e1000_ps_page_dma *ps_page_dma;
86c3d59f 3684 struct sk_buff *skb, *next_skb;
2d7edb92
MC		 3685 unsigned int i, j;
3686 uint32_t length, staterr;
72d64a43 3687 int cleaned_count = 0;
2d7edb92
MC		 3688 boolean_t cleaned = FALSE;
3689
3690 i = rx_ring->next_to_clean;
3691 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3692 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92 3693
96838a40 3694 while (staterr & E1000_RXD_STAT_DD) {
30320be8 3695 buffer_info = &rx_ring->buffer_info[i];
2d7edb92
MC		 3696 ps_page = &rx_ring->ps_page[i];
3697 ps_page_dma = &rx_ring->ps_page_dma[i];
3698#ifdef CONFIG_E1000_NAPI
96838a40 3699 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3700 break;
3701 (*work_done)++;
3702#endif
86c3d59f
JB		 3703 skb = buffer_info->skb;
3704
30320be8
JK		 3705 /* in the packet split case this is header only */
3706 prefetch(skb->data - NET_IP_ALIGN);
3707
86c3d59f
JB		 3708 if (++i == rx_ring->count) i = 0;
3709 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3710 prefetch(next_rxd);
3711
86c3d59f
JB		 3712 next_buffer = &rx_ring->buffer_info[i];
3713 next_skb = next_buffer->skb;
30320be8 3714 prefetch(next_skb->data - NET_IP_ALIGN);
86c3d59f 3715
2d7edb92 3716 cleaned = TRUE;
72d64a43 3717 cleaned_count++;
2d7edb92
MC		 3718 pci_unmap_single(pdev, buffer_info->dma,
3719 buffer_info->length,
3720 PCI_DMA_FROMDEVICE);
3721
96838a40 3722 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3723 E1000_DBG("%s: Packet Split buffers didn't pick up"
3724 " the full packet\n", netdev->name);
3725 dev_kfree_skb_irq(skb);
3726 goto next_desc;
3727 }
1da177e4 3728
96838a40 3729 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3730 dev_kfree_skb_irq(skb);
3731 goto next_desc;
3732 }
3733
3734 length = le16_to_cpu(rx_desc->wb.middle.length0);
3735
96838a40 3736 if (unlikely(!length)) {
2d7edb92
MC		 3737 E1000_DBG("%s: Last part of the packet spanning"
3738 " multiple descriptors\n", netdev->name);
3739 dev_kfree_skb_irq(skb);
3740 goto next_desc;
3741 }
3742
3743 /* Good Receive */
3744 skb_put(skb, length);
3745
dc7c6add
JK		 3746 {
3747 /* this looks ugly, but it seems compiler issues make it
3748 more efficient than reusing j */
3749 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3750
3751 /* page alloc/put takes too long and effects small packet
3752 * throughput, so unsplit small packets and save the alloc/put*/
3753 if (l1 && ((length + l1) < E1000_CB_LENGTH)) {
3754 u8 *vaddr;
3755 /* there is no documentation about how to call
3756 * kmap_atomic, so we can't hold the mapping
3757 * very long */
3758 pci_dma_sync_single_for_cpu(pdev,
3759 ps_page_dma->ps_page_dma[0],
3760 PAGE_SIZE,
3761 PCI_DMA_FROMDEVICE);
3762 vaddr = kmap_atomic(ps_page->ps_page[0],
3763 KM_SKB_DATA_SOFTIRQ);
3764 memcpy(skb->tail, vaddr, l1);
3765 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3766 pci_dma_sync_single_for_device(pdev,
3767 ps_page_dma->ps_page_dma[0],
3768 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3769 skb_put(skb, l1);
3770 length += l1;
3771 goto copydone;
3772 } /* if */
3773 }
3774
96838a40 3775 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 3776 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 3777 break;
2d7edb92
MC		 3778 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3779 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3780 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 3781 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3782 length);
2d7edb92 3783 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 3784 skb->len += length;
3785 skb->data_len += length;
3786 }
3787
dc7c6add 3788copydone:
2d7edb92
MC		 3789 e1000_rx_checksum(adapter, staterr,
3790 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3791 skb->protocol = eth_type_trans(skb, netdev);
3792
96838a40 3793 if (likely(rx_desc->wb.upper.header_status &
b92ff8ee 3794 E1000_RXDPS_HDRSTAT_HDRSP))
e4c811c9 3795 adapter->rx_hdr_split++;
2d7edb92 3796#ifdef CONFIG_E1000_NAPI
96838a40 3797 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3798 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3799 le16_to_cpu(rx_desc->wb.middle.vlan) &
3800 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3801 } else {
3802 netif_receive_skb(skb);
3803 }
3804#else /* CONFIG_E1000_NAPI */
96838a40 3805 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3806 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3807 le16_to_cpu(rx_desc->wb.middle.vlan) &
3808 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3809 } else {
3810 netif_rx(skb);
3811 }
3812#endif /* CONFIG_E1000_NAPI */
3813 netdev->last_rx = jiffies;
3814
3815next_desc:
3816 rx_desc->wb.middle.status_error &= ~0xFF;
3817 buffer_info->skb = NULL;
2d7edb92 3818
72d64a43
JK		 3819 /* return some buffers to hardware, one at a time is too slow */
3820 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3821 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3822 cleaned_count = 0;
3823 }
3824
30320be8 3825 /* use prefetched values */
86c3d59f
JB		 3826 rx_desc = next_rxd;
3827 buffer_info = next_buffer;
3828
683a38f3 3829 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3830 }
3831 rx_ring->next_to_clean = i;
72d64a43
JK		 3832
3833 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3834 if (cleaned_count)
3835 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3836
3837 return cleaned;
3838}
3839
3840/**
2d7edb92 3841 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3842 * @adapter: address of board private structure
3843 **/
3844
3845static void
581d708e 3846e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 3847 struct e1000_rx_ring *rx_ring,
a292ca6e 3848 int cleaned_count)
1da177e4 3849{
1da177e4
LT		 3850 struct net_device *netdev = adapter->netdev;
3851 struct pci_dev *pdev = adapter->pdev;
3852 struct e1000_rx_desc *rx_desc;
3853 struct e1000_buffer *buffer_info;
3854 struct sk_buff *skb;
2648345f
MC		 3855 unsigned int i;
3856 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3857
3858 i = rx_ring->next_to_use;
3859 buffer_info = &rx_ring->buffer_info[i];
3860
a292ca6e
JK		 3861 while (cleaned_count--) {
3862 if (!(skb = buffer_info->skb))
3863 skb = dev_alloc_skb(bufsz);
3864 else {
3865 skb_trim(skb, 0);
3866 goto map_skb;
3867 }
3868
96838a40 3869 if (unlikely(!skb)) {
1da177e4 3870 /* Better luck next round */
72d64a43 3871 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 3872 break;
3873 }
3874
2648345f 3875 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 3876 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3877 struct sk_buff *oldskb = skb;
2648345f
MC		 3878 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3879 "at %p\n", bufsz, skb->data);
3880 /* Try again, without freeing the previous */
1da177e4 3881 skb = dev_alloc_skb(bufsz);
2648345f 3882 /* Failed allocation, critical failure */
1da177e4
LT		 3883 if (!skb) {
3884 dev_kfree_skb(oldskb);
3885 break;
3886 }
2648345f 3887
1da177e4
LT		 3888 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3889 /* give up */
3890 dev_kfree_skb(skb);
3891 dev_kfree_skb(oldskb);
3892 break; /* while !buffer_info->skb */
3893 } else {
2648345f 3894 /* Use new allocation */
1da177e4
LT		 3895 dev_kfree_skb(oldskb);
3896 }
3897 }
1da177e4
LT		 3898 /* Make buffer alignment 2 beyond a 16 byte boundary
3899 * this will result in a 16 byte aligned IP header after
3900 * the 14 byte MAC header is removed
3901 */
3902 skb_reserve(skb, NET_IP_ALIGN);
3903
3904 skb->dev = netdev;
3905
3906 buffer_info->skb = skb;
3907 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 3908map_skb:
1da177e4
LT		 3909 buffer_info->dma = pci_map_single(pdev,
3910 skb->data,
3911 adapter->rx_buffer_len,
3912 PCI_DMA_FROMDEVICE);
3913
2648345f
MC		 3914 /* Fix for errata 23, can't cross 64kB boundary */
3915 if (!e1000_check_64k_bound(adapter,
3916 (void *)(unsigned long)buffer_info->dma,
3917 adapter->rx_buffer_len)) {
3918 DPRINTK(RX_ERR, ERR,
3919 "dma align check failed: %u bytes at %p\n",
3920 adapter->rx_buffer_len,
3921 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 3922 dev_kfree_skb(skb);
3923 buffer_info->skb = NULL;
3924
2648345f 3925 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 3926 adapter->rx_buffer_len,
3927 PCI_DMA_FROMDEVICE);
3928
3929 break; /* while !buffer_info->skb */
3930 }
1da177e4
LT		 3931 rx_desc = E1000_RX_DESC(*rx_ring, i);
3932 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3933
96838a40
JB		 3934 if (unlikely(++i == rx_ring->count))
3935 i = 0;
1da177e4
LT		 3936 buffer_info = &rx_ring->buffer_info[i];
3937 }
3938
b92ff8ee
JB		 3939 if (likely(rx_ring->next_to_use != i)) {
3940 rx_ring->next_to_use = i;
3941 if (unlikely(i-- == 0))
3942 i = (rx_ring->count - 1);
3943
3944 /* Force memory writes to complete before letting h/w
3945 * know there are new descriptors to fetch. (Only
3946 * applicable for weak-ordered memory model archs,
3947 * such as IA-64). */
3948 wmb();
3949 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3950 }
1da177e4
LT		 3951}
3952
2d7edb92
MC		 3953/**
3954 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3955 * @adapter: address of board private structure
3956 **/
3957
3958static void
581d708e 3959e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 3960 struct e1000_rx_ring *rx_ring,
3961 int cleaned_count)
2d7edb92 3962{
2d7edb92
MC		 3963 struct net_device *netdev = adapter->netdev;
3964 struct pci_dev *pdev = adapter->pdev;
3965 union e1000_rx_desc_packet_split *rx_desc;
3966 struct e1000_buffer *buffer_info;
3967 struct e1000_ps_page *ps_page;
3968 struct e1000_ps_page_dma *ps_page_dma;
3969 struct sk_buff *skb;
3970 unsigned int i, j;
3971
3972 i = rx_ring->next_to_use;
3973 buffer_info = &rx_ring->buffer_info[i];
3974 ps_page = &rx_ring->ps_page[i];
3975 ps_page_dma = &rx_ring->ps_page_dma[i];
3976
72d64a43 3977 while (cleaned_count--) {
2d7edb92
MC		 3978 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3979
96838a40 3980 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 3981 if (j < adapter->rx_ps_pages) {
3982 if (likely(!ps_page->ps_page[j])) {
3983 ps_page->ps_page[j] =
3984 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 3985 if (unlikely(!ps_page->ps_page[j])) {
3986 adapter->alloc_rx_buff_failed++;
e4c811c9 3987 goto no_buffers;
b92ff8ee 3988 }
e4c811c9
MC		 3989 ps_page_dma->ps_page_dma[j] =
3990 pci_map_page(pdev,
3991 ps_page->ps_page[j],
3992 0, PAGE_SIZE,
3993 PCI_DMA_FROMDEVICE);
3994 }
3995 /* Refresh the desc even if buffer_addrs didn't
96838a40 3996 * change because each write-back erases
e4c811c9
MC		 3997 * this info.
3998 */
3999 rx_desc->read.buffer_addr[j+1] =
4000 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4001 } else
4002 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4003 }
4004
4005 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4006
b92ff8ee
JB		 4007 if (unlikely(!skb)) {
4008 adapter->alloc_rx_buff_failed++;
2d7edb92 4009 break;
b92ff8ee 4010 }
2d7edb92
MC		 4011
4012 /* Make buffer alignment 2 beyond a 16 byte boundary
4013 * this will result in a 16 byte aligned IP header after
4014 * the 14 byte MAC header is removed
4015 */
4016 skb_reserve(skb, NET_IP_ALIGN);
4017
4018 skb->dev = netdev;
4019
4020 buffer_info->skb = skb;
4021 buffer_info->length = adapter->rx_ps_bsize0;
4022 buffer_info->dma = pci_map_single(pdev, skb->data,
4023 adapter->rx_ps_bsize0,
4024 PCI_DMA_FROMDEVICE);
4025
4026 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4027
96838a40 4028 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4029 buffer_info = &rx_ring->buffer_info[i];
4030 ps_page = &rx_ring->ps_page[i];
4031 ps_page_dma = &rx_ring->ps_page_dma[i];
4032 }
4033
4034no_buffers:
b92ff8ee
JB		 4035 if (likely(rx_ring->next_to_use != i)) {
4036 rx_ring->next_to_use = i;
4037 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4038
4039 /* Force memory writes to complete before letting h/w
4040 * know there are new descriptors to fetch. (Only
4041 * applicable for weak-ordered memory model archs,
4042 * such as IA-64). */
4043 wmb();
4044 /* Hardware increments by 16 bytes, but packet split
4045 * descriptors are 32 bytes...so we increment tail
4046 * twice as much.
4047 */
4048 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4049 }
2d7edb92
MC		 4050}
4051
1da177e4
LT		 4052/**
4053 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4054 * @adapter:
4055 **/
4056
4057static void
4058e1000_smartspeed(struct e1000_adapter *adapter)
4059{
4060 uint16_t phy_status;
4061 uint16_t phy_ctrl;
4062
96838a40 4063 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4064 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4065 return;
4066
96838a40 4067 if (adapter->smartspeed == 0) {
1da177e4
LT		 4068 /* If Master/Slave config fault is asserted twice,
4069 * we assume back-to-back */
4070 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4071 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4072 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4073 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4074 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4075 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4076 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4077 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4078 phy_ctrl);
4079 adapter->smartspeed++;
96838a40 4080 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4081 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4082 &phy_ctrl)) {
4083 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4084 MII_CR_RESTART_AUTO_NEG);
4085 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4086 phy_ctrl);
4087 }
4088 }
4089 return;
96838a40 4090 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4091 /* If still no link, perhaps using 2/3 pair cable */
4092 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4093 phy_ctrl |= CR_1000T_MS_ENABLE;
4094 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4095 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4096 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4097 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4098 MII_CR_RESTART_AUTO_NEG);
4099 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4100 }
4101 }
4102 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4103 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4104 adapter->smartspeed = 0;
4105}
4106
4107/**
4108 * e1000_ioctl -
4109 * @netdev:
4110 * @ifreq:
4111 * @cmd:
4112 **/
4113
4114static int
4115e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4116{
4117 switch (cmd) {
4118 case SIOCGMIIPHY:
4119 case SIOCGMIIREG:
4120 case SIOCSMIIREG:
4121 return e1000_mii_ioctl(netdev, ifr, cmd);
4122 default:
4123 return -EOPNOTSUPP;
4124 }
4125}
4126
4127/**
4128 * e1000_mii_ioctl -
4129 * @netdev:
4130 * @ifreq:
4131 * @cmd:
4132 **/
4133
4134static int
4135e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4136{
60490fe0 4137 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4138 struct mii_ioctl_data *data = if_mii(ifr);
4139 int retval;
4140 uint16_t mii_reg;
4141 uint16_t spddplx;
97876fc6 4142 unsigned long flags;
1da177e4 4143
96838a40 4144 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4145 return -EOPNOTSUPP;
4146
4147 switch (cmd) {
4148 case SIOCGMIIPHY:
4149 data->phy_id = adapter->hw.phy_addr;
4150 break;
4151 case SIOCGMIIREG:
96838a40 4152 if (!capable(CAP_NET_ADMIN))
1da177e4 4153 return -EPERM;
97876fc6 4154 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4155 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4156 &data->val_out)) {
4157 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4158 return -EIO;
97876fc6
MC		 4159 }
4160 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4161 break;
4162 case SIOCSMIIREG:
96838a40 4163 if (!capable(CAP_NET_ADMIN))
1da177e4 4164 return -EPERM;
96838a40 4165 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4166 return -EFAULT;
4167 mii_reg = data->val_in;
97876fc6 4168 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4169 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4170 mii_reg)) {
4171 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4172 return -EIO;
97876fc6 4173 }
cb764326 4174 if (adapter->hw.phy_type == e1000_media_type_copper) {
1da177e4
LT		 4175 switch (data->reg_num) {
4176 case PHY_CTRL:
96838a40 4177 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4178 break;
96838a40 4179 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4180 adapter->hw.autoneg = 1;
4181 adapter->hw.autoneg_advertised = 0x2F;
4182 } else {
4183 if (mii_reg & 0x40)
4184 spddplx = SPEED_1000;
4185 else if (mii_reg & 0x2000)
4186 spddplx = SPEED_100;
4187 else
4188 spddplx = SPEED_10;
4189 spddplx += (mii_reg & 0x100)
cb764326
JK		 4190 ? DUPLEX_FULL :
4191 DUPLEX_HALF;
1da177e4
LT		 4192 retval = e1000_set_spd_dplx(adapter,
4193 spddplx);
96838a40 4194 if (retval) {
97876fc6 4195 spin_unlock_irqrestore(
96838a40 4196 &adapter->stats_lock,
97876fc6 4197 flags);
1da177e4 4198 return retval;
97876fc6 4199 }
1da177e4 4200 }
96838a40 4201 if (netif_running(adapter->netdev)) {
1da177e4
LT		 4202 e1000_down(adapter);
4203 e1000_up(adapter);
4204 } else
4205 e1000_reset(adapter);
4206 break;
4207 case M88E1000_PHY_SPEC_CTRL:
4208 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4209 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4210 spin_unlock_irqrestore(
4211 &adapter->stats_lock, flags);
1da177e4 4212 return -EIO;
97876fc6 4213 }
1da177e4
LT		 4214 break;
4215 }
4216 } else {
4217 switch (data->reg_num) {
4218 case PHY_CTRL:
96838a40 4219 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4220 break;
96838a40 4221 if (netif_running(adapter->netdev)) {
1da177e4
LT		 4222 e1000_down(adapter);
4223 e1000_up(adapter);
4224 } else
4225 e1000_reset(adapter);
4226 break;
4227 }
4228 }
97876fc6 4229 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4230 break;
4231 default:
4232 return -EOPNOTSUPP;
4233 }
4234 return E1000_SUCCESS;
4235}
4236
4237void
4238e1000_pci_set_mwi(struct e1000_hw *hw)
4239{
4240 struct e1000_adapter *adapter = hw->back;
2648345f 4241 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4242
96838a40 4243 if (ret_val)
2648345f 4244 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4245}
4246
4247void
4248e1000_pci_clear_mwi(struct e1000_hw *hw)
4249{
4250 struct e1000_adapter *adapter = hw->back;
4251
4252 pci_clear_mwi(adapter->pdev);
4253}
4254
4255void
4256e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4257{
4258 struct e1000_adapter *adapter = hw->back;
4259
4260 pci_read_config_word(adapter->pdev, reg, value);
4261}
4262
4263void
4264e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4265{
4266 struct e1000_adapter *adapter = hw->back;
4267
4268 pci_write_config_word(adapter->pdev, reg, *value);
4269}
4270
4271uint32_t
4272e1000_io_read(struct e1000_hw *hw, unsigned long port)
4273{
4274 return inl(port);
4275}
4276
4277void
4278e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4279{
4280 outl(value, port);
4281}
4282
4283static void
4284e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4285{
60490fe0 4286 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4287 uint32_t ctrl, rctl;
4288
4289 e1000_irq_disable(adapter);
4290 adapter->vlgrp = grp;
4291
96838a40 4292 if (grp) {
1da177e4
LT		 4293 /* enable VLAN tag insert/strip */
4294 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4295 ctrl |= E1000_CTRL_VME;
4296 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4297
4298 /* enable VLAN receive filtering */
4299 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4300 rctl |= E1000_RCTL_VFE;
4301 rctl &= ~E1000_RCTL_CFIEN;
4302 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4303 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4304 } else {
4305 /* disable VLAN tag insert/strip */
4306 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4307 ctrl &= ~E1000_CTRL_VME;
4308 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4309
4310 /* disable VLAN filtering */
4311 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4312 rctl &= ~E1000_RCTL_VFE;
4313 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4314 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4315 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4316 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4317 }
1da177e4
LT		 4318 }
4319
4320 e1000_irq_enable(adapter);
4321}
4322
4323static void
4324e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4325{
60490fe0 4326 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4327 uint32_t vfta, index;
96838a40
JB		 4328
4329 if ((adapter->hw.mng_cookie.status &
4330 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4331 (vid == adapter->mng_vlan_id))
2d7edb92 4332 return;
1da177e4
LT		 4333 /* add VID to filter table */
4334 index = (vid >> 5) & 0x7F;
4335 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4336 vfta |= (1 << (vid & 0x1F));
4337 e1000_write_vfta(&adapter->hw, index, vfta);
4338}
4339
4340static void
4341e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4342{
60490fe0 4343 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4344 uint32_t vfta, index;
4345
4346 e1000_irq_disable(adapter);
4347
96838a40 4348 if (adapter->vlgrp)
1da177e4
LT		 4349 adapter->vlgrp->vlan_devices[vid] = NULL;
4350
4351 e1000_irq_enable(adapter);
4352
96838a40
JB		 4353 if ((adapter->hw.mng_cookie.status &
4354 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4355 (vid == adapter->mng_vlan_id)) {
4356 /* release control to f/w */
4357 e1000_release_hw_control(adapter);
2d7edb92 4358 return;
ff147013
JK		 4359 }
4360
1da177e4
LT		 4361 /* remove VID from filter table */
4362 index = (vid >> 5) & 0x7F;
4363 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4364 vfta &= ~(1 << (vid & 0x1F));
4365 e1000_write_vfta(&adapter->hw, index, vfta);
4366}
4367
4368static void
4369e1000_restore_vlan(struct e1000_adapter *adapter)
4370{
4371 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4372
96838a40 4373 if (adapter->vlgrp) {
1da177e4 4374 uint16_t vid;
96838a40
JB		 4375 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4376 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4377 continue;
4378 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4379 }
4380 }
4381}
4382
4383int
4384e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4385{
4386 adapter->hw.autoneg = 0;
4387
6921368f 4388 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4389 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4390 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4391 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4392 return -EINVAL;
4393 }
4394
96838a40 4395 switch (spddplx) {
1da177e4
LT		 4396 case SPEED_10 + DUPLEX_HALF:
4397 adapter->hw.forced_speed_duplex = e1000_10_half;
4398 break;
4399 case SPEED_10 + DUPLEX_FULL:
4400 adapter->hw.forced_speed_duplex = e1000_10_full;
4401 break;
4402 case SPEED_100 + DUPLEX_HALF:
4403 adapter->hw.forced_speed_duplex = e1000_100_half;
4404 break;
4405 case SPEED_100 + DUPLEX_FULL:
4406 adapter->hw.forced_speed_duplex = e1000_100_full;
4407 break;
4408 case SPEED_1000 + DUPLEX_FULL:
4409 adapter->hw.autoneg = 1;
4410 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4411 break;
4412 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4413 default:
2648345f 4414 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4415 return -EINVAL;
4416 }
4417 return 0;
4418}
4419
b6a1d5f8 4420#ifdef CONFIG_PM
0f15a8fa
JK		 4421/* Save/restore 16 or 64 dwords of PCI config space depending on which
4422 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4423 */
4424#define PCIE_CONFIG_SPACE_LEN 256
4425#define PCI_CONFIG_SPACE_LEN 64
4426static int
4427e1000_pci_save_state(struct e1000_adapter *adapter)
4428{
4429 struct pci_dev *dev = adapter->pdev;
4430 int size;
4431 int i;
0f15a8fa 4432
2f82665f
JB		 4433 if (adapter->hw.mac_type >= e1000_82571)
4434 size = PCIE_CONFIG_SPACE_LEN;
4435 else
4436 size = PCI_CONFIG_SPACE_LEN;
4437
4438 WARN_ON(adapter->config_space != NULL);
4439
4440 adapter->config_space = kmalloc(size, GFP_KERNEL);
4441 if (!adapter->config_space) {
4442 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4443 return -ENOMEM;
4444 }
4445 for (i = 0; i < (size / 4); i++)
4446 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4447 return 0;
4448}
4449
4450static void
4451e1000_pci_restore_state(struct e1000_adapter *adapter)
4452{
4453 struct pci_dev *dev = adapter->pdev;
4454 int size;
4455 int i;
0f15a8fa 4456
2f82665f
JB		 4457 if (adapter->config_space == NULL)
4458 return;
0f15a8fa 4459
2f82665f
JB		 4460 if (adapter->hw.mac_type >= e1000_82571)
4461 size = PCIE_CONFIG_SPACE_LEN;
4462 else
4463 size = PCI_CONFIG_SPACE_LEN;
4464 for (i = 0; i < (size / 4); i++)
4465 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4466 kfree(adapter->config_space);
4467 adapter->config_space = NULL;
4468 return;
4469}
4470#endif /* CONFIG_PM */
4471
1da177e4 4472static int
829ca9a3 4473e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4474{
4475 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4476 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4477 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4478 uint32_t wufc = adapter->wol;
240b1710 4479 int retval = 0;
1da177e4
LT		 4480
4481 netif_device_detach(netdev);
4482
96838a40 4483 if (netif_running(netdev))
1da177e4
LT		 4484 e1000_down(adapter);
4485
2f82665f 4486#ifdef CONFIG_PM
0f15a8fa
JK		 4487 /* Implement our own version of pci_save_state(pdev) because pci-
4488 * express adapters have 256-byte config spaces. */
2f82665f
JB		 4489 retval = e1000_pci_save_state(adapter);
4490 if (retval)
4491 return retval;
4492#endif
4493
1da177e4 4494 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4495 if (status & E1000_STATUS_LU)
1da177e4
LT		 4496 wufc &= ~E1000_WUFC_LNKC;
4497
96838a40 4498 if (wufc) {
1da177e4
LT		 4499 e1000_setup_rctl(adapter);
4500 e1000_set_multi(netdev);
4501
4502 /* turn on all-multi mode if wake on multicast is enabled */
96838a40 4503 if (adapter->wol & E1000_WUFC_MC) {
1da177e4
LT		 4504 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4505 rctl |= E1000_RCTL_MPE;
4506 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4507 }
4508
96838a40 4509 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4510 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4511 /* advertise wake from D3Cold */
4512 #define E1000_CTRL_ADVD3WUC 0x00100000
4513 /* phy power management enable */
4514 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4515 ctrl |= E1000_CTRL_ADVD3WUC |
4516 E1000_CTRL_EN_PHY_PWR_MGMT;
4517 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4518 }
4519
96838a40 4520 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4521 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4522 /* keep the laser running in D3 */
4523 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4524 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4525 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4526 }
4527
2d7edb92
MC		 4528 /* Allow time for pending master requests to run */
4529 e1000_disable_pciex_master(&adapter->hw);
4530
1da177e4
LT		 4531 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4532 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
240b1710
JK		 4533 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4534 if (retval)
4535 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4536 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4537 if (retval)
4538 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4539 } else {
4540 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4541 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
240b1710
JK		 4542 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4543 if (retval)
4544 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
0f15a8fa 4545 retval = pci_enable_wake(pdev, PCI_D3cold, 0);
240b1710
JK		 4546 if (retval)
4547 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4548 }
4549
96838a40 4550 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4551 adapter->hw.media_type == e1000_media_type_copper) {
4552 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4553 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4554 manc |= E1000_MANC_ARP_EN;
4555 E1000_WRITE_REG(&adapter->hw, MANC, manc);
240b1710
JK		 4556 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4557 if (retval)
4558 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4559 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4560 if (retval)
0f15a8fa
JK		 4561 DPRINTK(PROBE, ERR,
4562 "Error enabling D3 cold wake\n");
1da177e4
LT		 4563 }
4564 }
4565
b55ccb35
JK		 4566 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4567 * would have already happened in close and is redundant. */
4568 e1000_release_hw_control(adapter);
2d7edb92 4569
1da177e4 4570 pci_disable_device(pdev);
240b1710
JK		 4571
4572 retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
4573 if (retval)
4574 DPRINTK(PROBE, ERR, "Error in setting power state\n");
1da177e4
LT		 4575
4576 return 0;
4577}
4578
2f82665f 4579#ifdef CONFIG_PM
1da177e4
LT		 4580static int
4581e1000_resume(struct pci_dev *pdev)
4582{
4583 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4584 struct e1000_adapter *adapter = netdev_priv(netdev);
240b1710 4585 int retval;
b55ccb35 4586 uint32_t manc, ret_val;
1da177e4 4587
240b1710
JK		 4588 retval = pci_set_power_state(pdev, PCI_D0);
4589 if (retval)
4590 DPRINTK(PROBE, ERR, "Error in setting power state\n");
2f82665f 4591 e1000_pci_restore_state(adapter);
2b02893e 4592 ret_val = pci_enable_device(pdev);
a4cb847d 4593 pci_set_master(pdev);
1da177e4 4594
240b1710
JK		 4595 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4596 if (retval)
4597 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4598 retval = pci_enable_wake(pdev, PCI_D3cold, 0);
4599 if (retval)
4600 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4601
4602 e1000_reset(adapter);
4603 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4604
96838a40 4605 if (netif_running(netdev))
1da177e4
LT		 4606 e1000_up(adapter);
4607
4608 netif_device_attach(netdev);
4609
96838a40 4610 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4611 adapter->hw.media_type == e1000_media_type_copper) {
4612 manc = E1000_READ_REG(&adapter->hw, MANC);
4613 manc &= ~(E1000_MANC_ARP_EN);
4614 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4615 }
4616
b55ccb35
JK		 4617 /* If the controller is 82573 and f/w is AMT, do not set
4618 * DRV_LOAD until the interface is up. For all other cases,
4619 * let the f/w know that the h/w is now under the control
4620 * of the driver. */
4621 if (adapter->hw.mac_type != e1000_82573 ||
4622 !e1000_check_mng_mode(&adapter->hw))
4623 e1000_get_hw_control(adapter);
2d7edb92 4624
1da177e4
LT		 4625 return 0;
4626}
4627#endif
1da177e4
LT		 4628#ifdef CONFIG_NET_POLL_CONTROLLER
4629/*
4630 * Polling 'interrupt' - used by things like netconsole to send skbs
4631 * without having to re-enable interrupts. It's not called while
4632 * the interrupt routine is executing.
4633 */
4634static void
2648345f 4635e1000_netpoll(struct net_device *netdev)
1da177e4 4636{
60490fe0 4637 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4638 disable_irq(adapter->pdev->irq);
4639 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4640 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4641#ifndef CONFIG_E1000_NAPI
4642 adapter->clean_rx(adapter, adapter->rx_ring);
4643#endif
1da177e4
LT		 4644 enable_irq(adapter->pdev->irq);
4645}
4646#endif
4647
4648/* e1000_main.c */
Linux 6.x block layer and io_uring tree(s)