Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
0abb6eb1 AK |
3 | Intel PRO/1000 Linux driver |
4 | Copyright(c) 1999 - 2006 Intel Corporation. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
1da177e4 | 13 | more details. |
0abb6eb1 | 14 | |
1da177e4 | 15 | You should have received a copy of the GNU General Public License along with |
0abb6eb1 AK |
16 | this program; if not, write to the Free Software Foundation, Inc., |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
1da177e4 LT |
22 | Contact Information: |
23 | Linux NICS <linux.nics@intel.com> | |
3d41e30a | 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
1da177e4 LT |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | #include "e1000.h" | |
d0bb53e1 | 30 | #include <net/ip6_checksum.h> |
1da177e4 | 31 | |
1da177e4 | 32 | char e1000_driver_name[] = "e1000"; |
3ad2cc67 | 33 | static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; |
1da177e4 LT |
34 | #ifndef CONFIG_E1000_NAPI |
35 | #define DRIVERNAPI | |
36 | #else | |
37 | #define DRIVERNAPI "-NAPI" | |
38 | #endif | |
25006ac6 | 39 | #define DRV_VERSION "7.3.15-k2"DRIVERNAPI |
1da177e4 | 40 | char e1000_driver_version[] = DRV_VERSION; |
3d41e30a | 41 | static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; |
1da177e4 LT |
42 | |
43 | /* e1000_pci_tbl - PCI Device ID Table | |
44 | * | |
45 | * Last entry must be all 0s | |
46 | * | |
47 | * Macro expands to... | |
48 | * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)} | |
49 | */ | |
50 | static struct pci_device_id e1000_pci_tbl[] = { | |
51 | INTEL_E1000_ETHERNET_DEVICE(0x1000), | |
52 | INTEL_E1000_ETHERNET_DEVICE(0x1001), | |
53 | INTEL_E1000_ETHERNET_DEVICE(0x1004), | |
54 | INTEL_E1000_ETHERNET_DEVICE(0x1008), | |
55 | INTEL_E1000_ETHERNET_DEVICE(0x1009), | |
56 | INTEL_E1000_ETHERNET_DEVICE(0x100C), | |
57 | INTEL_E1000_ETHERNET_DEVICE(0x100D), | |
58 | INTEL_E1000_ETHERNET_DEVICE(0x100E), | |
59 | INTEL_E1000_ETHERNET_DEVICE(0x100F), | |
60 | INTEL_E1000_ETHERNET_DEVICE(0x1010), | |
61 | INTEL_E1000_ETHERNET_DEVICE(0x1011), | |
62 | INTEL_E1000_ETHERNET_DEVICE(0x1012), | |
63 | INTEL_E1000_ETHERNET_DEVICE(0x1013), | |
64 | INTEL_E1000_ETHERNET_DEVICE(0x1014), | |
65 | INTEL_E1000_ETHERNET_DEVICE(0x1015), | |
66 | INTEL_E1000_ETHERNET_DEVICE(0x1016), | |
67 | INTEL_E1000_ETHERNET_DEVICE(0x1017), | |
68 | INTEL_E1000_ETHERNET_DEVICE(0x1018), | |
69 | INTEL_E1000_ETHERNET_DEVICE(0x1019), | |
2648345f | 70 | INTEL_E1000_ETHERNET_DEVICE(0x101A), |
1da177e4 LT |
71 | INTEL_E1000_ETHERNET_DEVICE(0x101D), |
72 | INTEL_E1000_ETHERNET_DEVICE(0x101E), | |
73 | INTEL_E1000_ETHERNET_DEVICE(0x1026), | |
74 | INTEL_E1000_ETHERNET_DEVICE(0x1027), | |
75 | INTEL_E1000_ETHERNET_DEVICE(0x1028), | |
ae2c3860 AK |
76 | INTEL_E1000_ETHERNET_DEVICE(0x1049), |
77 | INTEL_E1000_ETHERNET_DEVICE(0x104A), | |
78 | INTEL_E1000_ETHERNET_DEVICE(0x104B), | |
79 | INTEL_E1000_ETHERNET_DEVICE(0x104C), | |
80 | INTEL_E1000_ETHERNET_DEVICE(0x104D), | |
07b8fede MC |
81 | INTEL_E1000_ETHERNET_DEVICE(0x105E), |
82 | INTEL_E1000_ETHERNET_DEVICE(0x105F), | |
83 | INTEL_E1000_ETHERNET_DEVICE(0x1060), | |
1da177e4 LT |
84 | INTEL_E1000_ETHERNET_DEVICE(0x1075), |
85 | INTEL_E1000_ETHERNET_DEVICE(0x1076), | |
86 | INTEL_E1000_ETHERNET_DEVICE(0x1077), | |
87 | INTEL_E1000_ETHERNET_DEVICE(0x1078), | |
88 | INTEL_E1000_ETHERNET_DEVICE(0x1079), | |
89 | INTEL_E1000_ETHERNET_DEVICE(0x107A), | |
90 | INTEL_E1000_ETHERNET_DEVICE(0x107B), | |
91 | INTEL_E1000_ETHERNET_DEVICE(0x107C), | |
07b8fede MC |
92 | INTEL_E1000_ETHERNET_DEVICE(0x107D), |
93 | INTEL_E1000_ETHERNET_DEVICE(0x107E), | |
94 | INTEL_E1000_ETHERNET_DEVICE(0x107F), | |
1da177e4 | 95 | INTEL_E1000_ETHERNET_DEVICE(0x108A), |
2648345f MC |
96 | INTEL_E1000_ETHERNET_DEVICE(0x108B), |
97 | INTEL_E1000_ETHERNET_DEVICE(0x108C), | |
6418ecc6 JK |
98 | INTEL_E1000_ETHERNET_DEVICE(0x1096), |
99 | INTEL_E1000_ETHERNET_DEVICE(0x1098), | |
b7ee49db | 100 | INTEL_E1000_ETHERNET_DEVICE(0x1099), |
07b8fede | 101 | INTEL_E1000_ETHERNET_DEVICE(0x109A), |
5881cde8 | 102 | INTEL_E1000_ETHERNET_DEVICE(0x10A4), |
b7ee49db | 103 | INTEL_E1000_ETHERNET_DEVICE(0x10B5), |
6418ecc6 | 104 | INTEL_E1000_ETHERNET_DEVICE(0x10B9), |
ae2c3860 AK |
105 | INTEL_E1000_ETHERNET_DEVICE(0x10BA), |
106 | INTEL_E1000_ETHERNET_DEVICE(0x10BB), | |
fc2307d0 AK |
107 | INTEL_E1000_ETHERNET_DEVICE(0x10BC), |
108 | INTEL_E1000_ETHERNET_DEVICE(0x10C4), | |
109 | INTEL_E1000_ETHERNET_DEVICE(0x10C5), | |
1da177e4 LT |
110 | /* required last entry */ |
111 | {0,} | |
112 | }; | |
113 | ||
114 | MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); | |
115 | ||
35574764 NN |
116 | int e1000_up(struct e1000_adapter *adapter); |
117 | void e1000_down(struct e1000_adapter *adapter); | |
118 | void e1000_reinit_locked(struct e1000_adapter *adapter); | |
119 | void e1000_reset(struct e1000_adapter *adapter); | |
120 | int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx); | |
121 | int e1000_setup_all_tx_resources(struct e1000_adapter *adapter); | |
122 | int e1000_setup_all_rx_resources(struct e1000_adapter *adapter); | |
123 | void e1000_free_all_tx_resources(struct e1000_adapter *adapter); | |
124 | void e1000_free_all_rx_resources(struct e1000_adapter *adapter); | |
3ad2cc67 | 125 | static int e1000_setup_tx_resources(struct e1000_adapter *adapter, |
35574764 | 126 | struct e1000_tx_ring *txdr); |
3ad2cc67 | 127 | static int e1000_setup_rx_resources(struct e1000_adapter *adapter, |
35574764 | 128 | struct e1000_rx_ring *rxdr); |
3ad2cc67 | 129 | static void e1000_free_tx_resources(struct e1000_adapter *adapter, |
35574764 | 130 | struct e1000_tx_ring *tx_ring); |
3ad2cc67 | 131 | static void e1000_free_rx_resources(struct e1000_adapter *adapter, |
35574764 NN |
132 | struct e1000_rx_ring *rx_ring); |
133 | void e1000_update_stats(struct e1000_adapter *adapter); | |
1da177e4 LT |
134 | |
135 | static int e1000_init_module(void); | |
136 | static void e1000_exit_module(void); | |
137 | static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent); | |
138 | static void __devexit e1000_remove(struct pci_dev *pdev); | |
581d708e | 139 | static int e1000_alloc_queues(struct e1000_adapter *adapter); |
1da177e4 LT |
140 | static int e1000_sw_init(struct e1000_adapter *adapter); |
141 | static int e1000_open(struct net_device *netdev); | |
142 | static int e1000_close(struct net_device *netdev); | |
143 | static void e1000_configure_tx(struct e1000_adapter *adapter); | |
144 | static void e1000_configure_rx(struct e1000_adapter *adapter); | |
145 | static void e1000_setup_rctl(struct e1000_adapter *adapter); | |
581d708e MC |
146 | static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter); |
147 | static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter); | |
148 | static void e1000_clean_tx_ring(struct e1000_adapter *adapter, | |
149 | struct e1000_tx_ring *tx_ring); | |
150 | static void e1000_clean_rx_ring(struct e1000_adapter *adapter, | |
151 | struct e1000_rx_ring *rx_ring); | |
1da177e4 LT |
152 | static void e1000_set_multi(struct net_device *netdev); |
153 | static void e1000_update_phy_info(unsigned long data); | |
154 | static void e1000_watchdog(unsigned long data); | |
1da177e4 LT |
155 | static void e1000_82547_tx_fifo_stall(unsigned long data); |
156 | static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev); | |
157 | static struct net_device_stats * e1000_get_stats(struct net_device *netdev); | |
158 | static int e1000_change_mtu(struct net_device *netdev, int new_mtu); | |
159 | static int e1000_set_mac(struct net_device *netdev, void *p); | |
7d12e780 | 160 | static irqreturn_t e1000_intr(int irq, void *data); |
9ac98284 JB |
161 | #ifdef CONFIG_PCI_MSI |
162 | static irqreturn_t e1000_intr_msi(int irq, void *data); | |
163 | #endif | |
581d708e MC |
164 | static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter, |
165 | struct e1000_tx_ring *tx_ring); | |
1da177e4 | 166 | #ifdef CONFIG_E1000_NAPI |
581d708e | 167 | static int e1000_clean(struct net_device *poll_dev, int *budget); |
1da177e4 | 168 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
581d708e | 169 | struct e1000_rx_ring *rx_ring, |
1da177e4 | 170 | int *work_done, int work_to_do); |
2d7edb92 | 171 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
581d708e | 172 | struct e1000_rx_ring *rx_ring, |
2d7edb92 | 173 | int *work_done, int work_to_do); |
1da177e4 | 174 | #else |
581d708e MC |
175 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
176 | struct e1000_rx_ring *rx_ring); | |
177 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | |
178 | struct e1000_rx_ring *rx_ring); | |
1da177e4 | 179 | #endif |
581d708e | 180 | static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
72d64a43 JK |
181 | struct e1000_rx_ring *rx_ring, |
182 | int cleaned_count); | |
581d708e | 183 | static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, |
72d64a43 JK |
184 | struct e1000_rx_ring *rx_ring, |
185 | int cleaned_count); | |
1da177e4 LT |
186 | static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); |
187 | static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, | |
188 | int cmd); | |
35574764 | 189 | void e1000_set_ethtool_ops(struct net_device *netdev); |
1da177e4 LT |
190 | static void e1000_enter_82542_rst(struct e1000_adapter *adapter); |
191 | static void e1000_leave_82542_rst(struct e1000_adapter *adapter); | |
192 | static void e1000_tx_timeout(struct net_device *dev); | |
65f27f38 | 193 | static void e1000_reset_task(struct work_struct *work); |
1da177e4 | 194 | static void e1000_smartspeed(struct e1000_adapter *adapter); |
e619d523 AK |
195 | static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, |
196 | struct sk_buff *skb); | |
1da177e4 LT |
197 | |
198 | static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp); | |
199 | static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid); | |
200 | static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); | |
201 | static void e1000_restore_vlan(struct e1000_adapter *adapter); | |
202 | ||
977e74b5 | 203 | static int e1000_suspend(struct pci_dev *pdev, pm_message_t state); |
6fdfef16 | 204 | #ifdef CONFIG_PM |
1da177e4 LT |
205 | static int e1000_resume(struct pci_dev *pdev); |
206 | #endif | |
c653e635 | 207 | static void e1000_shutdown(struct pci_dev *pdev); |
1da177e4 LT |
208 | |
209 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
210 | /* for netdump / net console */ | |
211 | static void e1000_netpoll (struct net_device *netdev); | |
212 | #endif | |
213 | ||
35574764 NN |
214 | extern void e1000_check_options(struct e1000_adapter *adapter); |
215 | ||
9026729b AK |
216 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, |
217 | pci_channel_state_t state); | |
218 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev); | |
219 | static void e1000_io_resume(struct pci_dev *pdev); | |
220 | ||
221 | static struct pci_error_handlers e1000_err_handler = { | |
222 | .error_detected = e1000_io_error_detected, | |
223 | .slot_reset = e1000_io_slot_reset, | |
224 | .resume = e1000_io_resume, | |
225 | }; | |
24025e4e | 226 | |
1da177e4 LT |
227 | static struct pci_driver e1000_driver = { |
228 | .name = e1000_driver_name, | |
229 | .id_table = e1000_pci_tbl, | |
230 | .probe = e1000_probe, | |
231 | .remove = __devexit_p(e1000_remove), | |
c4e24f01 | 232 | #ifdef CONFIG_PM |
1da177e4 | 233 | /* Power Managment Hooks */ |
1da177e4 | 234 | .suspend = e1000_suspend, |
c653e635 | 235 | .resume = e1000_resume, |
1da177e4 | 236 | #endif |
9026729b AK |
237 | .shutdown = e1000_shutdown, |
238 | .err_handler = &e1000_err_handler | |
1da177e4 LT |
239 | }; |
240 | ||
241 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); | |
242 | MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); | |
243 | MODULE_LICENSE("GPL"); | |
244 | MODULE_VERSION(DRV_VERSION); | |
245 | ||
246 | static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE; | |
247 | module_param(debug, int, 0); | |
248 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | |
249 | ||
250 | /** | |
251 | * e1000_init_module - Driver Registration Routine | |
252 | * | |
253 | * e1000_init_module is the first routine called when the driver is | |
254 | * loaded. All it does is register with the PCI subsystem. | |
255 | **/ | |
256 | ||
257 | static int __init | |
258 | e1000_init_module(void) | |
259 | { | |
260 | int ret; | |
261 | printk(KERN_INFO "%s - version %s\n", | |
262 | e1000_driver_string, e1000_driver_version); | |
263 | ||
264 | printk(KERN_INFO "%s\n", e1000_copyright); | |
265 | ||
29917620 | 266 | ret = pci_register_driver(&e1000_driver); |
8b378def | 267 | |
1da177e4 LT |
268 | return ret; |
269 | } | |
270 | ||
271 | module_init(e1000_init_module); | |
272 | ||
273 | /** | |
274 | * e1000_exit_module - Driver Exit Cleanup Routine | |
275 | * | |
276 | * e1000_exit_module is called just before the driver is removed | |
277 | * from memory. | |
278 | **/ | |
279 | ||
280 | static void __exit | |
281 | e1000_exit_module(void) | |
282 | { | |
1da177e4 LT |
283 | pci_unregister_driver(&e1000_driver); |
284 | } | |
285 | ||
286 | module_exit(e1000_exit_module); | |
287 | ||
2db10a08 AK |
288 | static int e1000_request_irq(struct e1000_adapter *adapter) |
289 | { | |
290 | struct net_device *netdev = adapter->netdev; | |
291 | int flags, err = 0; | |
292 | ||
c0bc8721 | 293 | flags = IRQF_SHARED; |
2db10a08 | 294 | #ifdef CONFIG_PCI_MSI |
9ac98284 | 295 | if (adapter->hw.mac_type >= e1000_82571) { |
2db10a08 AK |
296 | adapter->have_msi = TRUE; |
297 | if ((err = pci_enable_msi(adapter->pdev))) { | |
298 | DPRINTK(PROBE, ERR, | |
299 | "Unable to allocate MSI interrupt Error: %d\n", err); | |
300 | adapter->have_msi = FALSE; | |
301 | } | |
302 | } | |
9ac98284 | 303 | if (adapter->have_msi) { |
61ef5c00 | 304 | flags &= ~IRQF_SHARED; |
9ac98284 JB |
305 | err = request_irq(adapter->pdev->irq, &e1000_intr_msi, flags, |
306 | netdev->name, netdev); | |
307 | if (err) | |
308 | DPRINTK(PROBE, ERR, | |
309 | "Unable to allocate interrupt Error: %d\n", err); | |
310 | } else | |
2db10a08 AK |
311 | #endif |
312 | if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags, | |
313 | netdev->name, netdev))) | |
314 | DPRINTK(PROBE, ERR, | |
315 | "Unable to allocate interrupt Error: %d\n", err); | |
316 | ||
317 | return err; | |
318 | } | |
319 | ||
320 | static void e1000_free_irq(struct e1000_adapter *adapter) | |
321 | { | |
322 | struct net_device *netdev = adapter->netdev; | |
323 | ||
324 | free_irq(adapter->pdev->irq, netdev); | |
325 | ||
326 | #ifdef CONFIG_PCI_MSI | |
327 | if (adapter->have_msi) | |
328 | pci_disable_msi(adapter->pdev); | |
329 | #endif | |
330 | } | |
331 | ||
1da177e4 LT |
332 | /** |
333 | * e1000_irq_disable - Mask off interrupt generation on the NIC | |
334 | * @adapter: board private structure | |
335 | **/ | |
336 | ||
e619d523 | 337 | static void |
1da177e4 LT |
338 | e1000_irq_disable(struct e1000_adapter *adapter) |
339 | { | |
340 | atomic_inc(&adapter->irq_sem); | |
341 | E1000_WRITE_REG(&adapter->hw, IMC, ~0); | |
342 | E1000_WRITE_FLUSH(&adapter->hw); | |
343 | synchronize_irq(adapter->pdev->irq); | |
344 | } | |
345 | ||
346 | /** | |
347 | * e1000_irq_enable - Enable default interrupt generation settings | |
348 | * @adapter: board private structure | |
349 | **/ | |
350 | ||
e619d523 | 351 | static void |
1da177e4 LT |
352 | e1000_irq_enable(struct e1000_adapter *adapter) |
353 | { | |
96838a40 | 354 | if (likely(atomic_dec_and_test(&adapter->irq_sem))) { |
1da177e4 LT |
355 | E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK); |
356 | E1000_WRITE_FLUSH(&adapter->hw); | |
357 | } | |
358 | } | |
3ad2cc67 AB |
359 | |
360 | static void | |
2d7edb92 MC |
361 | e1000_update_mng_vlan(struct e1000_adapter *adapter) |
362 | { | |
363 | struct net_device *netdev = adapter->netdev; | |
364 | uint16_t vid = adapter->hw.mng_cookie.vlan_id; | |
365 | uint16_t old_vid = adapter->mng_vlan_id; | |
96838a40 JB |
366 | if (adapter->vlgrp) { |
367 | if (!adapter->vlgrp->vlan_devices[vid]) { | |
368 | if (adapter->hw.mng_cookie.status & | |
2d7edb92 MC |
369 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) { |
370 | e1000_vlan_rx_add_vid(netdev, vid); | |
371 | adapter->mng_vlan_id = vid; | |
372 | } else | |
373 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
96838a40 JB |
374 | |
375 | if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) && | |
376 | (vid != old_vid) && | |
2d7edb92 MC |
377 | !adapter->vlgrp->vlan_devices[old_vid]) |
378 | e1000_vlan_rx_kill_vid(netdev, old_vid); | |
c5f226fe JK |
379 | } else |
380 | adapter->mng_vlan_id = vid; | |
2d7edb92 MC |
381 | } |
382 | } | |
b55ccb35 JK |
383 | |
384 | /** | |
385 | * e1000_release_hw_control - release control of the h/w to f/w | |
386 | * @adapter: address of board private structure | |
387 | * | |
388 | * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit. | |
389 | * For ASF and Pass Through versions of f/w this means that the | |
390 | * driver is no longer loaded. For AMT version (only with 82573) i | |
90fb5135 | 391 | * of the f/w this means that the network i/f is closed. |
76c224bc | 392 | * |
b55ccb35 JK |
393 | **/ |
394 | ||
e619d523 | 395 | static void |
b55ccb35 JK |
396 | e1000_release_hw_control(struct e1000_adapter *adapter) |
397 | { | |
398 | uint32_t ctrl_ext; | |
399 | uint32_t swsm; | |
cd94dd0b | 400 | uint32_t extcnf; |
b55ccb35 JK |
401 | |
402 | /* Let firmware taken over control of h/w */ | |
403 | switch (adapter->hw.mac_type) { | |
404 | case e1000_82571: | |
405 | case e1000_82572: | |
4cc15f54 | 406 | case e1000_80003es2lan: |
b55ccb35 JK |
407 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
408 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
409 | ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); | |
410 | break; | |
411 | case e1000_82573: | |
412 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
413 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
414 | swsm & ~E1000_SWSM_DRV_LOAD); | |
cd94dd0b AK |
415 | case e1000_ich8lan: |
416 | extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
417 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
418 | extcnf & ~E1000_CTRL_EXT_DRV_LOAD); | |
419 | break; | |
b55ccb35 JK |
420 | default: |
421 | break; | |
422 | } | |
423 | } | |
424 | ||
425 | /** | |
426 | * e1000_get_hw_control - get control of the h/w from f/w | |
427 | * @adapter: address of board private structure | |
428 | * | |
429 | * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit. | |
76c224bc AK |
430 | * For ASF and Pass Through versions of f/w this means that |
431 | * the driver is loaded. For AMT version (only with 82573) | |
90fb5135 | 432 | * of the f/w this means that the network i/f is open. |
76c224bc | 433 | * |
b55ccb35 JK |
434 | **/ |
435 | ||
e619d523 | 436 | static void |
b55ccb35 JK |
437 | e1000_get_hw_control(struct e1000_adapter *adapter) |
438 | { | |
439 | uint32_t ctrl_ext; | |
440 | uint32_t swsm; | |
cd94dd0b | 441 | uint32_t extcnf; |
90fb5135 | 442 | |
b55ccb35 JK |
443 | /* Let firmware know the driver has taken over */ |
444 | switch (adapter->hw.mac_type) { | |
445 | case e1000_82571: | |
446 | case e1000_82572: | |
4cc15f54 | 447 | case e1000_80003es2lan: |
b55ccb35 JK |
448 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
449 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
450 | ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); | |
451 | break; | |
452 | case e1000_82573: | |
453 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
454 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
455 | swsm | E1000_SWSM_DRV_LOAD); | |
456 | break; | |
cd94dd0b AK |
457 | case e1000_ich8lan: |
458 | extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL); | |
459 | E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL, | |
460 | extcnf | E1000_EXTCNF_CTRL_SWFLAG); | |
461 | break; | |
b55ccb35 JK |
462 | default: |
463 | break; | |
464 | } | |
465 | } | |
466 | ||
0fccd0e9 JG |
467 | static void |
468 | e1000_init_manageability(struct e1000_adapter *adapter) | |
469 | { | |
470 | if (adapter->en_mng_pt) { | |
471 | uint32_t manc = E1000_READ_REG(&adapter->hw, MANC); | |
472 | ||
473 | /* disable hardware interception of ARP */ | |
474 | manc &= ~(E1000_MANC_ARP_EN); | |
475 | ||
476 | /* enable receiving management packets to the host */ | |
477 | /* this will probably generate destination unreachable messages | |
478 | * from the host OS, but the packets will be handled on SMBUS */ | |
479 | if (adapter->hw.has_manc2h) { | |
480 | uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H); | |
481 | ||
482 | manc |= E1000_MANC_EN_MNG2HOST; | |
483 | #define E1000_MNG2HOST_PORT_623 (1 << 5) | |
484 | #define E1000_MNG2HOST_PORT_664 (1 << 6) | |
485 | manc2h |= E1000_MNG2HOST_PORT_623; | |
486 | manc2h |= E1000_MNG2HOST_PORT_664; | |
487 | E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h); | |
488 | } | |
489 | ||
490 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
491 | } | |
492 | } | |
493 | ||
494 | static void | |
495 | e1000_release_manageability(struct e1000_adapter *adapter) | |
496 | { | |
497 | if (adapter->en_mng_pt) { | |
498 | uint32_t manc = E1000_READ_REG(&adapter->hw, MANC); | |
499 | ||
500 | /* re-enable hardware interception of ARP */ | |
501 | manc |= E1000_MANC_ARP_EN; | |
502 | ||
503 | if (adapter->hw.has_manc2h) | |
504 | manc &= ~E1000_MANC_EN_MNG2HOST; | |
505 | ||
506 | /* don't explicitly have to mess with MANC2H since | |
507 | * MANC has an enable disable that gates MANC2H */ | |
508 | ||
509 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
510 | } | |
511 | } | |
512 | ||
1da177e4 LT |
513 | int |
514 | e1000_up(struct e1000_adapter *adapter) | |
515 | { | |
516 | struct net_device *netdev = adapter->netdev; | |
2db10a08 | 517 | int i; |
1da177e4 LT |
518 | |
519 | /* hardware has been reset, we need to reload some things */ | |
520 | ||
1da177e4 LT |
521 | e1000_set_multi(netdev); |
522 | ||
523 | e1000_restore_vlan(adapter); | |
0fccd0e9 | 524 | e1000_init_manageability(adapter); |
1da177e4 LT |
525 | |
526 | e1000_configure_tx(adapter); | |
527 | e1000_setup_rctl(adapter); | |
528 | e1000_configure_rx(adapter); | |
72d64a43 JK |
529 | /* call E1000_DESC_UNUSED which always leaves |
530 | * at least 1 descriptor unused to make sure | |
531 | * next_to_use != next_to_clean */ | |
f56799ea | 532 | for (i = 0; i < adapter->num_rx_queues; i++) { |
72d64a43 | 533 | struct e1000_rx_ring *ring = &adapter->rx_ring[i]; |
a292ca6e JK |
534 | adapter->alloc_rx_buf(adapter, ring, |
535 | E1000_DESC_UNUSED(ring)); | |
f56799ea | 536 | } |
1da177e4 | 537 | |
7bfa4816 JK |
538 | adapter->tx_queue_len = netdev->tx_queue_len; |
539 | ||
1da177e4 LT |
540 | #ifdef CONFIG_E1000_NAPI |
541 | netif_poll_enable(netdev); | |
542 | #endif | |
5de55624 MC |
543 | e1000_irq_enable(adapter); |
544 | ||
1314bbf3 AK |
545 | clear_bit(__E1000_DOWN, &adapter->flags); |
546 | ||
547 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | |
1da177e4 LT |
548 | return 0; |
549 | } | |
550 | ||
79f05bf0 AK |
551 | /** |
552 | * e1000_power_up_phy - restore link in case the phy was powered down | |
553 | * @adapter: address of board private structure | |
554 | * | |
555 | * The phy may be powered down to save power and turn off link when the | |
556 | * driver is unloaded and wake on lan is not enabled (among others) | |
557 | * *** this routine MUST be followed by a call to e1000_reset *** | |
558 | * | |
559 | **/ | |
560 | ||
d658266e | 561 | void e1000_power_up_phy(struct e1000_adapter *adapter) |
79f05bf0 AK |
562 | { |
563 | uint16_t mii_reg = 0; | |
564 | ||
565 | /* Just clear the power down bit to wake the phy back up */ | |
566 | if (adapter->hw.media_type == e1000_media_type_copper) { | |
567 | /* according to the manual, the phy will retain its | |
568 | * settings across a power-down/up cycle */ | |
569 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | |
570 | mii_reg &= ~MII_CR_POWER_DOWN; | |
571 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); | |
572 | } | |
573 | } | |
574 | ||
575 | static void e1000_power_down_phy(struct e1000_adapter *adapter) | |
576 | { | |
61c2505f BA |
577 | /* Power down the PHY so no link is implied when interface is down * |
578 | * The PHY cannot be powered down if any of the following is TRUE * | |
79f05bf0 AK |
579 | * (a) WoL is enabled |
580 | * (b) AMT is active | |
581 | * (c) SoL/IDER session is active */ | |
582 | if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 && | |
61c2505f | 583 | adapter->hw.media_type == e1000_media_type_copper) { |
79f05bf0 | 584 | uint16_t mii_reg = 0; |
61c2505f BA |
585 | |
586 | switch (adapter->hw.mac_type) { | |
587 | case e1000_82540: | |
588 | case e1000_82545: | |
589 | case e1000_82545_rev_3: | |
590 | case e1000_82546: | |
591 | case e1000_82546_rev_3: | |
592 | case e1000_82541: | |
593 | case e1000_82541_rev_2: | |
594 | case e1000_82547: | |
595 | case e1000_82547_rev_2: | |
596 | if (E1000_READ_REG(&adapter->hw, MANC) & | |
597 | E1000_MANC_SMBUS_EN) | |
598 | goto out; | |
599 | break; | |
600 | case e1000_82571: | |
601 | case e1000_82572: | |
602 | case e1000_82573: | |
603 | case e1000_80003es2lan: | |
604 | case e1000_ich8lan: | |
605 | if (e1000_check_mng_mode(&adapter->hw) || | |
606 | e1000_check_phy_reset_block(&adapter->hw)) | |
607 | goto out; | |
608 | break; | |
609 | default: | |
610 | goto out; | |
611 | } | |
79f05bf0 AK |
612 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); |
613 | mii_reg |= MII_CR_POWER_DOWN; | |
614 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); | |
615 | mdelay(1); | |
616 | } | |
61c2505f BA |
617 | out: |
618 | return; | |
79f05bf0 AK |
619 | } |
620 | ||
1da177e4 LT |
621 | void |
622 | e1000_down(struct e1000_adapter *adapter) | |
623 | { | |
624 | struct net_device *netdev = adapter->netdev; | |
625 | ||
1314bbf3 AK |
626 | /* signal that we're down so the interrupt handler does not |
627 | * reschedule our watchdog timer */ | |
628 | set_bit(__E1000_DOWN, &adapter->flags); | |
629 | ||
1da177e4 | 630 | e1000_irq_disable(adapter); |
c1605eb3 | 631 | |
1da177e4 LT |
632 | del_timer_sync(&adapter->tx_fifo_stall_timer); |
633 | del_timer_sync(&adapter->watchdog_timer); | |
634 | del_timer_sync(&adapter->phy_info_timer); | |
635 | ||
636 | #ifdef CONFIG_E1000_NAPI | |
637 | netif_poll_disable(netdev); | |
638 | #endif | |
7bfa4816 | 639 | netdev->tx_queue_len = adapter->tx_queue_len; |
1da177e4 LT |
640 | adapter->link_speed = 0; |
641 | adapter->link_duplex = 0; | |
642 | netif_carrier_off(netdev); | |
643 | netif_stop_queue(netdev); | |
644 | ||
645 | e1000_reset(adapter); | |
581d708e MC |
646 | e1000_clean_all_tx_rings(adapter); |
647 | e1000_clean_all_rx_rings(adapter); | |
1da177e4 | 648 | } |
1da177e4 | 649 | |
2db10a08 AK |
650 | void |
651 | e1000_reinit_locked(struct e1000_adapter *adapter) | |
652 | { | |
653 | WARN_ON(in_interrupt()); | |
654 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) | |
655 | msleep(1); | |
656 | e1000_down(adapter); | |
657 | e1000_up(adapter); | |
658 | clear_bit(__E1000_RESETTING, &adapter->flags); | |
1da177e4 LT |
659 | } |
660 | ||
661 | void | |
662 | e1000_reset(struct e1000_adapter *adapter) | |
663 | { | |
0fccd0e9 | 664 | uint32_t pba; |
1125ecbc | 665 | uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF; |
1da177e4 LT |
666 | |
667 | /* Repartition Pba for greater than 9k mtu | |
668 | * To take effect CTRL.RST is required. | |
669 | */ | |
670 | ||
2d7edb92 MC |
671 | switch (adapter->hw.mac_type) { |
672 | case e1000_82547: | |
0e6ef3e0 | 673 | case e1000_82547_rev_2: |
2d7edb92 MC |
674 | pba = E1000_PBA_30K; |
675 | break; | |
868d5309 MC |
676 | case e1000_82571: |
677 | case e1000_82572: | |
6418ecc6 | 678 | case e1000_80003es2lan: |
868d5309 MC |
679 | pba = E1000_PBA_38K; |
680 | break; | |
2d7edb92 MC |
681 | case e1000_82573: |
682 | pba = E1000_PBA_12K; | |
683 | break; | |
cd94dd0b AK |
684 | case e1000_ich8lan: |
685 | pba = E1000_PBA_8K; | |
686 | break; | |
2d7edb92 MC |
687 | default: |
688 | pba = E1000_PBA_48K; | |
689 | break; | |
690 | } | |
691 | ||
96838a40 | 692 | if ((adapter->hw.mac_type != e1000_82573) && |
f11b7f85 | 693 | (adapter->netdev->mtu > E1000_RXBUFFER_8192)) |
1125ecbc | 694 | pba -= 8; /* allocate more FIFO for Tx */ |
2d7edb92 MC |
695 | |
696 | ||
96838a40 | 697 | if (adapter->hw.mac_type == e1000_82547) { |
1da177e4 LT |
698 | adapter->tx_fifo_head = 0; |
699 | adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT; | |
700 | adapter->tx_fifo_size = | |
701 | (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT; | |
702 | atomic_set(&adapter->tx_fifo_stall, 0); | |
703 | } | |
2d7edb92 | 704 | |
1da177e4 LT |
705 | E1000_WRITE_REG(&adapter->hw, PBA, pba); |
706 | ||
707 | /* flow control settings */ | |
f11b7f85 JK |
708 | /* Set the FC high water mark to 90% of the FIFO size. |
709 | * Required to clear last 3 LSB */ | |
710 | fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8; | |
cd94dd0b AK |
711 | /* We can't use 90% on small FIFOs because the remainder |
712 | * would be less than 1 full frame. In this case, we size | |
713 | * it to allow at least a full frame above the high water | |
714 | * mark. */ | |
715 | if (pba < E1000_PBA_16K) | |
716 | fc_high_water_mark = (pba * 1024) - 1600; | |
f11b7f85 JK |
717 | |
718 | adapter->hw.fc_high_water = fc_high_water_mark; | |
719 | adapter->hw.fc_low_water = fc_high_water_mark - 8; | |
87041639 JK |
720 | if (adapter->hw.mac_type == e1000_80003es2lan) |
721 | adapter->hw.fc_pause_time = 0xFFFF; | |
722 | else | |
723 | adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME; | |
1da177e4 LT |
724 | adapter->hw.fc_send_xon = 1; |
725 | adapter->hw.fc = adapter->hw.original_fc; | |
726 | ||
2d7edb92 | 727 | /* Allow time for pending master requests to run */ |
1da177e4 | 728 | e1000_reset_hw(&adapter->hw); |
96838a40 | 729 | if (adapter->hw.mac_type >= e1000_82544) |
1da177e4 | 730 | E1000_WRITE_REG(&adapter->hw, WUC, 0); |
09ae3e88 | 731 | |
96838a40 | 732 | if (e1000_init_hw(&adapter->hw)) |
1da177e4 | 733 | DPRINTK(PROBE, ERR, "Hardware Error\n"); |
2d7edb92 | 734 | e1000_update_mng_vlan(adapter); |
3d5460a0 JB |
735 | |
736 | /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */ | |
737 | if (adapter->hw.mac_type >= e1000_82544 && | |
738 | adapter->hw.mac_type <= e1000_82547_rev_2 && | |
739 | adapter->hw.autoneg == 1 && | |
740 | adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) { | |
741 | uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
742 | /* clear phy power management bit if we are in gig only mode, | |
743 | * which if enabled will attempt negotiation to 100Mb, which | |
744 | * can cause a loss of link at power off or driver unload */ | |
745 | ctrl &= ~E1000_CTRL_SWDPIN3; | |
746 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
747 | } | |
748 | ||
1da177e4 LT |
749 | /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ |
750 | E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE); | |
751 | ||
752 | e1000_reset_adaptive(&adapter->hw); | |
753 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
9a53a202 AK |
754 | |
755 | if (!adapter->smart_power_down && | |
756 | (adapter->hw.mac_type == e1000_82571 || | |
757 | adapter->hw.mac_type == e1000_82572)) { | |
758 | uint16_t phy_data = 0; | |
759 | /* speed up time to link by disabling smart power down, ignore | |
760 | * the return value of this function because there is nothing | |
761 | * different we would do if it failed */ | |
762 | e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT, | |
763 | &phy_data); | |
764 | phy_data &= ~IGP02E1000_PM_SPD; | |
765 | e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT, | |
766 | phy_data); | |
767 | } | |
768 | ||
0fccd0e9 | 769 | e1000_release_manageability(adapter); |
1da177e4 LT |
770 | } |
771 | ||
772 | /** | |
773 | * e1000_probe - Device Initialization Routine | |
774 | * @pdev: PCI device information struct | |
775 | * @ent: entry in e1000_pci_tbl | |
776 | * | |
777 | * Returns 0 on success, negative on failure | |
778 | * | |
779 | * e1000_probe initializes an adapter identified by a pci_dev structure. | |
780 | * The OS initialization, configuring of the adapter private structure, | |
781 | * and a hardware reset occur. | |
782 | **/ | |
783 | ||
784 | static int __devinit | |
785 | e1000_probe(struct pci_dev *pdev, | |
786 | const struct pci_device_id *ent) | |
787 | { | |
788 | struct net_device *netdev; | |
789 | struct e1000_adapter *adapter; | |
2d7edb92 | 790 | unsigned long mmio_start, mmio_len; |
cd94dd0b | 791 | unsigned long flash_start, flash_len; |
2d7edb92 | 792 | |
1da177e4 | 793 | static int cards_found = 0; |
120cd576 | 794 | static int global_quad_port_a = 0; /* global ksp3 port a indication */ |
2d7edb92 | 795 | int i, err, pci_using_dac; |
120cd576 | 796 | uint16_t eeprom_data = 0; |
1da177e4 | 797 | uint16_t eeprom_apme_mask = E1000_EEPROM_APME; |
96838a40 | 798 | if ((err = pci_enable_device(pdev))) |
1da177e4 LT |
799 | return err; |
800 | ||
cd94dd0b AK |
801 | if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) && |
802 | !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) { | |
1da177e4 LT |
803 | pci_using_dac = 1; |
804 | } else { | |
cd94dd0b AK |
805 | if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) && |
806 | (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) { | |
1da177e4 | 807 | E1000_ERR("No usable DMA configuration, aborting\n"); |
6dd62ab0 | 808 | goto err_dma; |
1da177e4 LT |
809 | } |
810 | pci_using_dac = 0; | |
811 | } | |
812 | ||
96838a40 | 813 | if ((err = pci_request_regions(pdev, e1000_driver_name))) |
6dd62ab0 | 814 | goto err_pci_reg; |
1da177e4 LT |
815 | |
816 | pci_set_master(pdev); | |
817 | ||
6dd62ab0 | 818 | err = -ENOMEM; |
1da177e4 | 819 | netdev = alloc_etherdev(sizeof(struct e1000_adapter)); |
6dd62ab0 | 820 | if (!netdev) |
1da177e4 | 821 | goto err_alloc_etherdev; |
1da177e4 LT |
822 | |
823 | SET_MODULE_OWNER(netdev); | |
824 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
825 | ||
826 | pci_set_drvdata(pdev, netdev); | |
60490fe0 | 827 | adapter = netdev_priv(netdev); |
1da177e4 LT |
828 | adapter->netdev = netdev; |
829 | adapter->pdev = pdev; | |
830 | adapter->hw.back = adapter; | |
831 | adapter->msg_enable = (1 << debug) - 1; | |
832 | ||
833 | mmio_start = pci_resource_start(pdev, BAR_0); | |
834 | mmio_len = pci_resource_len(pdev, BAR_0); | |
835 | ||
6dd62ab0 | 836 | err = -EIO; |
1da177e4 | 837 | adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); |
6dd62ab0 | 838 | if (!adapter->hw.hw_addr) |
1da177e4 | 839 | goto err_ioremap; |
1da177e4 | 840 | |
96838a40 JB |
841 | for (i = BAR_1; i <= BAR_5; i++) { |
842 | if (pci_resource_len(pdev, i) == 0) | |
1da177e4 | 843 | continue; |
96838a40 | 844 | if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { |
1da177e4 LT |
845 | adapter->hw.io_base = pci_resource_start(pdev, i); |
846 | break; | |
847 | } | |
848 | } | |
849 | ||
850 | netdev->open = &e1000_open; | |
851 | netdev->stop = &e1000_close; | |
852 | netdev->hard_start_xmit = &e1000_xmit_frame; | |
853 | netdev->get_stats = &e1000_get_stats; | |
854 | netdev->set_multicast_list = &e1000_set_multi; | |
855 | netdev->set_mac_address = &e1000_set_mac; | |
856 | netdev->change_mtu = &e1000_change_mtu; | |
857 | netdev->do_ioctl = &e1000_ioctl; | |
858 | e1000_set_ethtool_ops(netdev); | |
859 | netdev->tx_timeout = &e1000_tx_timeout; | |
860 | netdev->watchdog_timeo = 5 * HZ; | |
861 | #ifdef CONFIG_E1000_NAPI | |
862 | netdev->poll = &e1000_clean; | |
863 | netdev->weight = 64; | |
864 | #endif | |
865 | netdev->vlan_rx_register = e1000_vlan_rx_register; | |
866 | netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid; | |
867 | netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid; | |
868 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
869 | netdev->poll_controller = e1000_netpoll; | |
870 | #endif | |
0eb5a34c | 871 | strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); |
1da177e4 LT |
872 | |
873 | netdev->mem_start = mmio_start; | |
874 | netdev->mem_end = mmio_start + mmio_len; | |
875 | netdev->base_addr = adapter->hw.io_base; | |
876 | ||
877 | adapter->bd_number = cards_found; | |
878 | ||
879 | /* setup the private structure */ | |
880 | ||
96838a40 | 881 | if ((err = e1000_sw_init(adapter))) |
1da177e4 LT |
882 | goto err_sw_init; |
883 | ||
6dd62ab0 | 884 | err = -EIO; |
cd94dd0b AK |
885 | /* Flash BAR mapping must happen after e1000_sw_init |
886 | * because it depends on mac_type */ | |
887 | if ((adapter->hw.mac_type == e1000_ich8lan) && | |
888 | (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { | |
889 | flash_start = pci_resource_start(pdev, 1); | |
890 | flash_len = pci_resource_len(pdev, 1); | |
891 | adapter->hw.flash_address = ioremap(flash_start, flash_len); | |
6dd62ab0 | 892 | if (!adapter->hw.flash_address) |
cd94dd0b | 893 | goto err_flashmap; |
cd94dd0b AK |
894 | } |
895 | ||
6dd62ab0 | 896 | if (e1000_check_phy_reset_block(&adapter->hw)) |
2d7edb92 MC |
897 | DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n"); |
898 | ||
96838a40 | 899 | if (adapter->hw.mac_type >= e1000_82543) { |
1da177e4 LT |
900 | netdev->features = NETIF_F_SG | |
901 | NETIF_F_HW_CSUM | | |
902 | NETIF_F_HW_VLAN_TX | | |
903 | NETIF_F_HW_VLAN_RX | | |
904 | NETIF_F_HW_VLAN_FILTER; | |
cd94dd0b AK |
905 | if (adapter->hw.mac_type == e1000_ich8lan) |
906 | netdev->features &= ~NETIF_F_HW_VLAN_FILTER; | |
1da177e4 LT |
907 | } |
908 | ||
909 | #ifdef NETIF_F_TSO | |
96838a40 | 910 | if ((adapter->hw.mac_type >= e1000_82544) && |
1da177e4 LT |
911 | (adapter->hw.mac_type != e1000_82547)) |
912 | netdev->features |= NETIF_F_TSO; | |
2d7edb92 | 913 | |
72f3ab74 JB |
914 | #ifdef CONFIG_DEBUG_SLAB |
915 | /* 82544's work arounds do not play nicely with DEBUG SLAB */ | |
916 | if (adapter->hw.mac_type == e1000_82544) | |
917 | netdev->features &= ~NETIF_F_TSO; | |
918 | #endif | |
919 | ||
87ca4e5b | 920 | #ifdef NETIF_F_TSO6 |
96838a40 | 921 | if (adapter->hw.mac_type > e1000_82547_rev_2) |
87ca4e5b | 922 | netdev->features |= NETIF_F_TSO6; |
2d7edb92 | 923 | #endif |
1da177e4 | 924 | #endif |
96838a40 | 925 | if (pci_using_dac) |
1da177e4 LT |
926 | netdev->features |= NETIF_F_HIGHDMA; |
927 | ||
76c224bc AK |
928 | netdev->features |= NETIF_F_LLTX; |
929 | ||
2d7edb92 MC |
930 | adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw); |
931 | ||
cd94dd0b AK |
932 | /* initialize eeprom parameters */ |
933 | ||
934 | if (e1000_init_eeprom_params(&adapter->hw)) { | |
935 | E1000_ERR("EEPROM initialization failed\n"); | |
6dd62ab0 | 936 | goto err_eeprom; |
cd94dd0b AK |
937 | } |
938 | ||
96838a40 | 939 | /* before reading the EEPROM, reset the controller to |
1da177e4 | 940 | * put the device in a known good starting state */ |
96838a40 | 941 | |
1da177e4 LT |
942 | e1000_reset_hw(&adapter->hw); |
943 | ||
944 | /* make sure the EEPROM is good */ | |
945 | ||
96838a40 | 946 | if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) { |
1da177e4 | 947 | DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n"); |
1da177e4 LT |
948 | goto err_eeprom; |
949 | } | |
950 | ||
951 | /* copy the MAC address out of the EEPROM */ | |
952 | ||
96838a40 | 953 | if (e1000_read_mac_addr(&adapter->hw)) |
1da177e4 LT |
954 | DPRINTK(PROBE, ERR, "EEPROM Read Error\n"); |
955 | memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); | |
9beb0ac1 | 956 | memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); |
1da177e4 | 957 | |
96838a40 | 958 | if (!is_valid_ether_addr(netdev->perm_addr)) { |
1da177e4 | 959 | DPRINTK(PROBE, ERR, "Invalid MAC Address\n"); |
1da177e4 LT |
960 | goto err_eeprom; |
961 | } | |
962 | ||
1da177e4 LT |
963 | e1000_get_bus_info(&adapter->hw); |
964 | ||
965 | init_timer(&adapter->tx_fifo_stall_timer); | |
966 | adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall; | |
967 | adapter->tx_fifo_stall_timer.data = (unsigned long) adapter; | |
968 | ||
969 | init_timer(&adapter->watchdog_timer); | |
970 | adapter->watchdog_timer.function = &e1000_watchdog; | |
971 | adapter->watchdog_timer.data = (unsigned long) adapter; | |
972 | ||
1da177e4 LT |
973 | init_timer(&adapter->phy_info_timer); |
974 | adapter->phy_info_timer.function = &e1000_update_phy_info; | |
975 | adapter->phy_info_timer.data = (unsigned long) adapter; | |
976 | ||
65f27f38 | 977 | INIT_WORK(&adapter->reset_task, e1000_reset_task); |
1da177e4 | 978 | |
1da177e4 LT |
979 | e1000_check_options(adapter); |
980 | ||
981 | /* Initial Wake on LAN setting | |
982 | * If APM wake is enabled in the EEPROM, | |
983 | * enable the ACPI Magic Packet filter | |
984 | */ | |
985 | ||
96838a40 | 986 | switch (adapter->hw.mac_type) { |
1da177e4 LT |
987 | case e1000_82542_rev2_0: |
988 | case e1000_82542_rev2_1: | |
989 | case e1000_82543: | |
990 | break; | |
991 | case e1000_82544: | |
992 | e1000_read_eeprom(&adapter->hw, | |
993 | EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data); | |
994 | eeprom_apme_mask = E1000_EEPROM_82544_APM; | |
995 | break; | |
cd94dd0b AK |
996 | case e1000_ich8lan: |
997 | e1000_read_eeprom(&adapter->hw, | |
998 | EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data); | |
999 | eeprom_apme_mask = E1000_EEPROM_ICH8_APME; | |
1000 | break; | |
1da177e4 LT |
1001 | case e1000_82546: |
1002 | case e1000_82546_rev_3: | |
fd803241 | 1003 | case e1000_82571: |
6418ecc6 | 1004 | case e1000_80003es2lan: |
96838a40 | 1005 | if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){ |
1da177e4 LT |
1006 | e1000_read_eeprom(&adapter->hw, |
1007 | EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); | |
1008 | break; | |
1009 | } | |
1010 | /* Fall Through */ | |
1011 | default: | |
1012 | e1000_read_eeprom(&adapter->hw, | |
1013 | EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); | |
1014 | break; | |
1015 | } | |
96838a40 | 1016 | if (eeprom_data & eeprom_apme_mask) |
120cd576 JB |
1017 | adapter->eeprom_wol |= E1000_WUFC_MAG; |
1018 | ||
1019 | /* now that we have the eeprom settings, apply the special cases | |
1020 | * where the eeprom may be wrong or the board simply won't support | |
1021 | * wake on lan on a particular port */ | |
1022 | switch (pdev->device) { | |
1023 | case E1000_DEV_ID_82546GB_PCIE: | |
1024 | adapter->eeprom_wol = 0; | |
1025 | break; | |
1026 | case E1000_DEV_ID_82546EB_FIBER: | |
1027 | case E1000_DEV_ID_82546GB_FIBER: | |
1028 | case E1000_DEV_ID_82571EB_FIBER: | |
1029 | /* Wake events only supported on port A for dual fiber | |
1030 | * regardless of eeprom setting */ | |
1031 | if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1) | |
1032 | adapter->eeprom_wol = 0; | |
1033 | break; | |
1034 | case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: | |
5881cde8 | 1035 | case E1000_DEV_ID_82571EB_QUAD_COPPER: |
fc2307d0 | 1036 | case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE: |
120cd576 JB |
1037 | /* if quad port adapter, disable WoL on all but port A */ |
1038 | if (global_quad_port_a != 0) | |
1039 | adapter->eeprom_wol = 0; | |
1040 | else | |
1041 | adapter->quad_port_a = 1; | |
1042 | /* Reset for multiple quad port adapters */ | |
1043 | if (++global_quad_port_a == 4) | |
1044 | global_quad_port_a = 0; | |
1045 | break; | |
1046 | } | |
1047 | ||
1048 | /* initialize the wol settings based on the eeprom settings */ | |
1049 | adapter->wol = adapter->eeprom_wol; | |
1da177e4 | 1050 | |
fb3d47d4 JK |
1051 | /* print bus type/speed/width info */ |
1052 | { | |
1053 | struct e1000_hw *hw = &adapter->hw; | |
1054 | DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ", | |
1055 | ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : | |
1056 | (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")), | |
1057 | ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" : | |
1058 | (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" : | |
1059 | (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" : | |
1060 | (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" : | |
1061 | (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"), | |
1062 | ((hw->bus_width == e1000_bus_width_64) ? "64-bit" : | |
1063 | (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" : | |
1064 | (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" : | |
1065 | "32-bit")); | |
1066 | } | |
1067 | ||
1068 | for (i = 0; i < 6; i++) | |
1069 | printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':'); | |
1070 | ||
1da177e4 LT |
1071 | /* reset the hardware with the new settings */ |
1072 | e1000_reset(adapter); | |
1073 | ||
b55ccb35 JK |
1074 | /* If the controller is 82573 and f/w is AMT, do not set |
1075 | * DRV_LOAD until the interface is up. For all other cases, | |
1076 | * let the f/w know that the h/w is now under the control | |
1077 | * of the driver. */ | |
1078 | if (adapter->hw.mac_type != e1000_82573 || | |
1079 | !e1000_check_mng_mode(&adapter->hw)) | |
1080 | e1000_get_hw_control(adapter); | |
2d7edb92 | 1081 | |
1da177e4 | 1082 | strcpy(netdev->name, "eth%d"); |
96838a40 | 1083 | if ((err = register_netdev(netdev))) |
1da177e4 LT |
1084 | goto err_register; |
1085 | ||
1314bbf3 AK |
1086 | /* tell the stack to leave us alone until e1000_open() is called */ |
1087 | netif_carrier_off(netdev); | |
1088 | netif_stop_queue(netdev); | |
1089 | ||
1da177e4 LT |
1090 | DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n"); |
1091 | ||
1092 | cards_found++; | |
1093 | return 0; | |
1094 | ||
1095 | err_register: | |
6dd62ab0 VA |
1096 | e1000_release_hw_control(adapter); |
1097 | err_eeprom: | |
1098 | if (!e1000_check_phy_reset_block(&adapter->hw)) | |
1099 | e1000_phy_hw_reset(&adapter->hw); | |
1100 | ||
cd94dd0b AK |
1101 | if (adapter->hw.flash_address) |
1102 | iounmap(adapter->hw.flash_address); | |
1103 | err_flashmap: | |
6dd62ab0 VA |
1104 | #ifdef CONFIG_E1000_NAPI |
1105 | for (i = 0; i < adapter->num_rx_queues; i++) | |
1106 | dev_put(&adapter->polling_netdev[i]); | |
1107 | #endif | |
1108 | ||
1109 | kfree(adapter->tx_ring); | |
1110 | kfree(adapter->rx_ring); | |
1111 | #ifdef CONFIG_E1000_NAPI | |
1112 | kfree(adapter->polling_netdev); | |
1113 | #endif | |
1da177e4 | 1114 | err_sw_init: |
1da177e4 LT |
1115 | iounmap(adapter->hw.hw_addr); |
1116 | err_ioremap: | |
1117 | free_netdev(netdev); | |
1118 | err_alloc_etherdev: | |
1119 | pci_release_regions(pdev); | |
6dd62ab0 VA |
1120 | err_pci_reg: |
1121 | err_dma: | |
1122 | pci_disable_device(pdev); | |
1da177e4 LT |
1123 | return err; |
1124 | } | |
1125 | ||
1126 | /** | |
1127 | * e1000_remove - Device Removal Routine | |
1128 | * @pdev: PCI device information struct | |
1129 | * | |
1130 | * e1000_remove is called by the PCI subsystem to alert the driver | |
1131 | * that it should release a PCI device. The could be caused by a | |
1132 | * Hot-Plug event, or because the driver is going to be removed from | |
1133 | * memory. | |
1134 | **/ | |
1135 | ||
1136 | static void __devexit | |
1137 | e1000_remove(struct pci_dev *pdev) | |
1138 | { | |
1139 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 1140 | struct e1000_adapter *adapter = netdev_priv(netdev); |
581d708e MC |
1141 | #ifdef CONFIG_E1000_NAPI |
1142 | int i; | |
1143 | #endif | |
1da177e4 | 1144 | |
be2b28ed JG |
1145 | flush_scheduled_work(); |
1146 | ||
0fccd0e9 | 1147 | e1000_release_manageability(adapter); |
1da177e4 | 1148 | |
b55ccb35 JK |
1149 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
1150 | * would have already happened in close and is redundant. */ | |
1151 | e1000_release_hw_control(adapter); | |
2d7edb92 | 1152 | |
1da177e4 | 1153 | unregister_netdev(netdev); |
581d708e | 1154 | #ifdef CONFIG_E1000_NAPI |
f56799ea | 1155 | for (i = 0; i < adapter->num_rx_queues; i++) |
15333061 | 1156 | dev_put(&adapter->polling_netdev[i]); |
581d708e | 1157 | #endif |
1da177e4 | 1158 | |
96838a40 | 1159 | if (!e1000_check_phy_reset_block(&adapter->hw)) |
2d7edb92 | 1160 | e1000_phy_hw_reset(&adapter->hw); |
1da177e4 | 1161 | |
24025e4e MC |
1162 | kfree(adapter->tx_ring); |
1163 | kfree(adapter->rx_ring); | |
1164 | #ifdef CONFIG_E1000_NAPI | |
1165 | kfree(adapter->polling_netdev); | |
1166 | #endif | |
1167 | ||
1da177e4 | 1168 | iounmap(adapter->hw.hw_addr); |
cd94dd0b AK |
1169 | if (adapter->hw.flash_address) |
1170 | iounmap(adapter->hw.flash_address); | |
1da177e4 LT |
1171 | pci_release_regions(pdev); |
1172 | ||
1173 | free_netdev(netdev); | |
1174 | ||
1175 | pci_disable_device(pdev); | |
1176 | } | |
1177 | ||
1178 | /** | |
1179 | * e1000_sw_init - Initialize general software structures (struct e1000_adapter) | |
1180 | * @adapter: board private structure to initialize | |
1181 | * | |
1182 | * e1000_sw_init initializes the Adapter private data structure. | |
1183 | * Fields are initialized based on PCI device information and | |
1184 | * OS network device settings (MTU size). | |
1185 | **/ | |
1186 | ||
1187 | static int __devinit | |
1188 | e1000_sw_init(struct e1000_adapter *adapter) | |
1189 | { | |
1190 | struct e1000_hw *hw = &adapter->hw; | |
1191 | struct net_device *netdev = adapter->netdev; | |
1192 | struct pci_dev *pdev = adapter->pdev; | |
581d708e MC |
1193 | #ifdef CONFIG_E1000_NAPI |
1194 | int i; | |
1195 | #endif | |
1da177e4 LT |
1196 | |
1197 | /* PCI config space info */ | |
1198 | ||
1199 | hw->vendor_id = pdev->vendor; | |
1200 | hw->device_id = pdev->device; | |
1201 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
1202 | hw->subsystem_id = pdev->subsystem_device; | |
1203 | ||
1204 | pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); | |
1205 | ||
1206 | pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); | |
1207 | ||
eb0f8054 | 1208 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; |
9e2feace | 1209 | adapter->rx_ps_bsize0 = E1000_RXBUFFER_128; |
1da177e4 LT |
1210 | hw->max_frame_size = netdev->mtu + |
1211 | ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; | |
1212 | hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE; | |
1213 | ||
1214 | /* identify the MAC */ | |
1215 | ||
96838a40 | 1216 | if (e1000_set_mac_type(hw)) { |
1da177e4 LT |
1217 | DPRINTK(PROBE, ERR, "Unknown MAC Type\n"); |
1218 | return -EIO; | |
1219 | } | |
1220 | ||
96838a40 | 1221 | switch (hw->mac_type) { |
1da177e4 LT |
1222 | default: |
1223 | break; | |
1224 | case e1000_82541: | |
1225 | case e1000_82547: | |
1226 | case e1000_82541_rev_2: | |
1227 | case e1000_82547_rev_2: | |
1228 | hw->phy_init_script = 1; | |
1229 | break; | |
1230 | } | |
1231 | ||
1232 | e1000_set_media_type(hw); | |
1233 | ||
1234 | hw->wait_autoneg_complete = FALSE; | |
1235 | hw->tbi_compatibility_en = TRUE; | |
1236 | hw->adaptive_ifs = TRUE; | |
1237 | ||
1238 | /* Copper options */ | |
1239 | ||
96838a40 | 1240 | if (hw->media_type == e1000_media_type_copper) { |
1da177e4 LT |
1241 | hw->mdix = AUTO_ALL_MODES; |
1242 | hw->disable_polarity_correction = FALSE; | |
1243 | hw->master_slave = E1000_MASTER_SLAVE; | |
1244 | } | |
1245 | ||
f56799ea JK |
1246 | adapter->num_tx_queues = 1; |
1247 | adapter->num_rx_queues = 1; | |
581d708e MC |
1248 | |
1249 | if (e1000_alloc_queues(adapter)) { | |
1250 | DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n"); | |
1251 | return -ENOMEM; | |
1252 | } | |
1253 | ||
1254 | #ifdef CONFIG_E1000_NAPI | |
f56799ea | 1255 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
1256 | adapter->polling_netdev[i].priv = adapter; |
1257 | adapter->polling_netdev[i].poll = &e1000_clean; | |
1258 | adapter->polling_netdev[i].weight = 64; | |
1259 | dev_hold(&adapter->polling_netdev[i]); | |
1260 | set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state); | |
1261 | } | |
7bfa4816 | 1262 | spin_lock_init(&adapter->tx_queue_lock); |
24025e4e MC |
1263 | #endif |
1264 | ||
1da177e4 LT |
1265 | atomic_set(&adapter->irq_sem, 1); |
1266 | spin_lock_init(&adapter->stats_lock); | |
1da177e4 | 1267 | |
1314bbf3 AK |
1268 | set_bit(__E1000_DOWN, &adapter->flags); |
1269 | ||
1da177e4 LT |
1270 | return 0; |
1271 | } | |
1272 | ||
581d708e MC |
1273 | /** |
1274 | * e1000_alloc_queues - Allocate memory for all rings | |
1275 | * @adapter: board private structure to initialize | |
1276 | * | |
1277 | * We allocate one ring per queue at run-time since we don't know the | |
1278 | * number of queues at compile-time. The polling_netdev array is | |
1279 | * intended for Multiqueue, but should work fine with a single queue. | |
1280 | **/ | |
1281 | ||
1282 | static int __devinit | |
1283 | e1000_alloc_queues(struct e1000_adapter *adapter) | |
1284 | { | |
1285 | int size; | |
1286 | ||
f56799ea | 1287 | size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues; |
581d708e MC |
1288 | adapter->tx_ring = kmalloc(size, GFP_KERNEL); |
1289 | if (!adapter->tx_ring) | |
1290 | return -ENOMEM; | |
1291 | memset(adapter->tx_ring, 0, size); | |
1292 | ||
f56799ea | 1293 | size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues; |
581d708e MC |
1294 | adapter->rx_ring = kmalloc(size, GFP_KERNEL); |
1295 | if (!adapter->rx_ring) { | |
1296 | kfree(adapter->tx_ring); | |
1297 | return -ENOMEM; | |
1298 | } | |
1299 | memset(adapter->rx_ring, 0, size); | |
1300 | ||
1301 | #ifdef CONFIG_E1000_NAPI | |
f56799ea | 1302 | size = sizeof(struct net_device) * adapter->num_rx_queues; |
581d708e MC |
1303 | adapter->polling_netdev = kmalloc(size, GFP_KERNEL); |
1304 | if (!adapter->polling_netdev) { | |
1305 | kfree(adapter->tx_ring); | |
1306 | kfree(adapter->rx_ring); | |
1307 | return -ENOMEM; | |
1308 | } | |
1309 | memset(adapter->polling_netdev, 0, size); | |
1310 | #endif | |
1311 | ||
1312 | return E1000_SUCCESS; | |
1313 | } | |
1314 | ||
1da177e4 LT |
1315 | /** |
1316 | * e1000_open - Called when a network interface is made active | |
1317 | * @netdev: network interface device structure | |
1318 | * | |
1319 | * Returns 0 on success, negative value on failure | |
1320 | * | |
1321 | * The open entry point is called when a network interface is made | |
1322 | * active by the system (IFF_UP). At this point all resources needed | |
1323 | * for transmit and receive operations are allocated, the interrupt | |
1324 | * handler is registered with the OS, the watchdog timer is started, | |
1325 | * and the stack is notified that the interface is ready. | |
1326 | **/ | |
1327 | ||
1328 | static int | |
1329 | e1000_open(struct net_device *netdev) | |
1330 | { | |
60490fe0 | 1331 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1332 | int err; |
1333 | ||
2db10a08 | 1334 | /* disallow open during test */ |
1314bbf3 | 1335 | if (test_bit(__E1000_TESTING, &adapter->flags)) |
2db10a08 AK |
1336 | return -EBUSY; |
1337 | ||
1da177e4 | 1338 | /* allocate transmit descriptors */ |
581d708e | 1339 | if ((err = e1000_setup_all_tx_resources(adapter))) |
1da177e4 LT |
1340 | goto err_setup_tx; |
1341 | ||
1342 | /* allocate receive descriptors */ | |
581d708e | 1343 | if ((err = e1000_setup_all_rx_resources(adapter))) |
1da177e4 LT |
1344 | goto err_setup_rx; |
1345 | ||
2db10a08 AK |
1346 | err = e1000_request_irq(adapter); |
1347 | if (err) | |
401a552b | 1348 | goto err_req_irq; |
2db10a08 | 1349 | |
79f05bf0 AK |
1350 | e1000_power_up_phy(adapter); |
1351 | ||
96838a40 | 1352 | if ((err = e1000_up(adapter))) |
1da177e4 | 1353 | goto err_up; |
2d7edb92 | 1354 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; |
96838a40 | 1355 | if ((adapter->hw.mng_cookie.status & |
2d7edb92 MC |
1356 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { |
1357 | e1000_update_mng_vlan(adapter); | |
1358 | } | |
1da177e4 | 1359 | |
b55ccb35 JK |
1360 | /* If AMT is enabled, let the firmware know that the network |
1361 | * interface is now open */ | |
1362 | if (adapter->hw.mac_type == e1000_82573 && | |
1363 | e1000_check_mng_mode(&adapter->hw)) | |
1364 | e1000_get_hw_control(adapter); | |
1365 | ||
1da177e4 LT |
1366 | return E1000_SUCCESS; |
1367 | ||
1368 | err_up: | |
401a552b VA |
1369 | e1000_power_down_phy(adapter); |
1370 | e1000_free_irq(adapter); | |
1371 | err_req_irq: | |
581d708e | 1372 | e1000_free_all_rx_resources(adapter); |
1da177e4 | 1373 | err_setup_rx: |
581d708e | 1374 | e1000_free_all_tx_resources(adapter); |
1da177e4 LT |
1375 | err_setup_tx: |
1376 | e1000_reset(adapter); | |
1377 | ||
1378 | return err; | |
1379 | } | |
1380 | ||
1381 | /** | |
1382 | * e1000_close - Disables a network interface | |
1383 | * @netdev: network interface device structure | |
1384 | * | |
1385 | * Returns 0, this is not allowed to fail | |
1386 | * | |
1387 | * The close entry point is called when an interface is de-activated | |
1388 | * by the OS. The hardware is still under the drivers control, but | |
1389 | * needs to be disabled. A global MAC reset is issued to stop the | |
1390 | * hardware, and all transmit and receive resources are freed. | |
1391 | **/ | |
1392 | ||
1393 | static int | |
1394 | e1000_close(struct net_device *netdev) | |
1395 | { | |
60490fe0 | 1396 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 1397 | |
2db10a08 | 1398 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); |
1da177e4 | 1399 | e1000_down(adapter); |
79f05bf0 | 1400 | e1000_power_down_phy(adapter); |
2db10a08 | 1401 | e1000_free_irq(adapter); |
1da177e4 | 1402 | |
581d708e MC |
1403 | e1000_free_all_tx_resources(adapter); |
1404 | e1000_free_all_rx_resources(adapter); | |
1da177e4 | 1405 | |
4666560a BA |
1406 | /* kill manageability vlan ID if supported, but not if a vlan with |
1407 | * the same ID is registered on the host OS (let 8021q kill it) */ | |
96838a40 | 1408 | if ((adapter->hw.mng_cookie.status & |
4666560a BA |
1409 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && |
1410 | !(adapter->vlgrp && | |
1411 | adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) { | |
2d7edb92 MC |
1412 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); |
1413 | } | |
b55ccb35 JK |
1414 | |
1415 | /* If AMT is enabled, let the firmware know that the network | |
1416 | * interface is now closed */ | |
1417 | if (adapter->hw.mac_type == e1000_82573 && | |
1418 | e1000_check_mng_mode(&adapter->hw)) | |
1419 | e1000_release_hw_control(adapter); | |
1420 | ||
1da177e4 LT |
1421 | return 0; |
1422 | } | |
1423 | ||
1424 | /** | |
1425 | * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary | |
1426 | * @adapter: address of board private structure | |
2d7edb92 MC |
1427 | * @start: address of beginning of memory |
1428 | * @len: length of memory | |
1da177e4 | 1429 | **/ |
e619d523 | 1430 | static boolean_t |
1da177e4 LT |
1431 | e1000_check_64k_bound(struct e1000_adapter *adapter, |
1432 | void *start, unsigned long len) | |
1433 | { | |
1434 | unsigned long begin = (unsigned long) start; | |
1435 | unsigned long end = begin + len; | |
1436 | ||
2648345f MC |
1437 | /* First rev 82545 and 82546 need to not allow any memory |
1438 | * write location to cross 64k boundary due to errata 23 */ | |
1da177e4 | 1439 | if (adapter->hw.mac_type == e1000_82545 || |
2648345f | 1440 | adapter->hw.mac_type == e1000_82546) { |
1da177e4 LT |
1441 | return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE; |
1442 | } | |
1443 | ||
1444 | return TRUE; | |
1445 | } | |
1446 | ||
1447 | /** | |
1448 | * e1000_setup_tx_resources - allocate Tx resources (Descriptors) | |
1449 | * @adapter: board private structure | |
581d708e | 1450 | * @txdr: tx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1451 | * |
1452 | * Return 0 on success, negative on failure | |
1453 | **/ | |
1454 | ||
3ad2cc67 | 1455 | static int |
581d708e MC |
1456 | e1000_setup_tx_resources(struct e1000_adapter *adapter, |
1457 | struct e1000_tx_ring *txdr) | |
1da177e4 | 1458 | { |
1da177e4 LT |
1459 | struct pci_dev *pdev = adapter->pdev; |
1460 | int size; | |
1461 | ||
1462 | size = sizeof(struct e1000_buffer) * txdr->count; | |
cd94dd0b | 1463 | txdr->buffer_info = vmalloc(size); |
96838a40 | 1464 | if (!txdr->buffer_info) { |
2648345f MC |
1465 | DPRINTK(PROBE, ERR, |
1466 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1467 | return -ENOMEM; |
1468 | } | |
1469 | memset(txdr->buffer_info, 0, size); | |
1470 | ||
1471 | /* round up to nearest 4K */ | |
1472 | ||
1473 | txdr->size = txdr->count * sizeof(struct e1000_tx_desc); | |
1474 | E1000_ROUNDUP(txdr->size, 4096); | |
1475 | ||
1476 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); | |
96838a40 | 1477 | if (!txdr->desc) { |
1da177e4 | 1478 | setup_tx_desc_die: |
1da177e4 | 1479 | vfree(txdr->buffer_info); |
2648345f MC |
1480 | DPRINTK(PROBE, ERR, |
1481 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1482 | return -ENOMEM; |
1483 | } | |
1484 | ||
2648345f | 1485 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1486 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { |
1487 | void *olddesc = txdr->desc; | |
1488 | dma_addr_t olddma = txdr->dma; | |
2648345f MC |
1489 | DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes " |
1490 | "at %p\n", txdr->size, txdr->desc); | |
1491 | /* Try again, without freeing the previous */ | |
1da177e4 | 1492 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); |
2648345f | 1493 | /* Failed allocation, critical failure */ |
96838a40 | 1494 | if (!txdr->desc) { |
1da177e4 LT |
1495 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1496 | goto setup_tx_desc_die; | |
1497 | } | |
1498 | ||
1499 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { | |
1500 | /* give up */ | |
2648345f MC |
1501 | pci_free_consistent(pdev, txdr->size, txdr->desc, |
1502 | txdr->dma); | |
1da177e4 LT |
1503 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1504 | DPRINTK(PROBE, ERR, | |
2648345f MC |
1505 | "Unable to allocate aligned memory " |
1506 | "for the transmit descriptor ring\n"); | |
1da177e4 LT |
1507 | vfree(txdr->buffer_info); |
1508 | return -ENOMEM; | |
1509 | } else { | |
2648345f | 1510 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1511 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1512 | } | |
1513 | } | |
1514 | memset(txdr->desc, 0, txdr->size); | |
1515 | ||
1516 | txdr->next_to_use = 0; | |
1517 | txdr->next_to_clean = 0; | |
2ae76d98 | 1518 | spin_lock_init(&txdr->tx_lock); |
1da177e4 LT |
1519 | |
1520 | return 0; | |
1521 | } | |
1522 | ||
581d708e MC |
1523 | /** |
1524 | * e1000_setup_all_tx_resources - wrapper to allocate Tx resources | |
1525 | * (Descriptors) for all queues | |
1526 | * @adapter: board private structure | |
1527 | * | |
581d708e MC |
1528 | * Return 0 on success, negative on failure |
1529 | **/ | |
1530 | ||
1531 | int | |
1532 | e1000_setup_all_tx_resources(struct e1000_adapter *adapter) | |
1533 | { | |
1534 | int i, err = 0; | |
1535 | ||
f56799ea | 1536 | for (i = 0; i < adapter->num_tx_queues; i++) { |
581d708e MC |
1537 | err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]); |
1538 | if (err) { | |
1539 | DPRINTK(PROBE, ERR, | |
1540 | "Allocation for Tx Queue %u failed\n", i); | |
3fbbc72e VA |
1541 | for (i-- ; i >= 0; i--) |
1542 | e1000_free_tx_resources(adapter, | |
1543 | &adapter->tx_ring[i]); | |
581d708e MC |
1544 | break; |
1545 | } | |
1546 | } | |
1547 | ||
1548 | return err; | |
1549 | } | |
1550 | ||
1da177e4 LT |
1551 | /** |
1552 | * e1000_configure_tx - Configure 8254x Transmit Unit after Reset | |
1553 | * @adapter: board private structure | |
1554 | * | |
1555 | * Configure the Tx unit of the MAC after a reset. | |
1556 | **/ | |
1557 | ||
1558 | static void | |
1559 | e1000_configure_tx(struct e1000_adapter *adapter) | |
1560 | { | |
581d708e MC |
1561 | uint64_t tdba; |
1562 | struct e1000_hw *hw = &adapter->hw; | |
1563 | uint32_t tdlen, tctl, tipg, tarc; | |
0fadb059 | 1564 | uint32_t ipgr1, ipgr2; |
1da177e4 LT |
1565 | |
1566 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
1567 | ||
f56799ea | 1568 | switch (adapter->num_tx_queues) { |
24025e4e MC |
1569 | case 1: |
1570 | default: | |
581d708e MC |
1571 | tdba = adapter->tx_ring[0].dma; |
1572 | tdlen = adapter->tx_ring[0].count * | |
1573 | sizeof(struct e1000_tx_desc); | |
581d708e | 1574 | E1000_WRITE_REG(hw, TDLEN, tdlen); |
4ca213a6 AK |
1575 | E1000_WRITE_REG(hw, TDBAH, (tdba >> 32)); |
1576 | E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL)); | |
581d708e | 1577 | E1000_WRITE_REG(hw, TDT, 0); |
4ca213a6 | 1578 | E1000_WRITE_REG(hw, TDH, 0); |
6a951698 AK |
1579 | adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH); |
1580 | adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT); | |
24025e4e MC |
1581 | break; |
1582 | } | |
1da177e4 LT |
1583 | |
1584 | /* Set the default values for the Tx Inter Packet Gap timer */ | |
1585 | ||
0fadb059 JK |
1586 | if (hw->media_type == e1000_media_type_fiber || |
1587 | hw->media_type == e1000_media_type_internal_serdes) | |
1588 | tipg = DEFAULT_82543_TIPG_IPGT_FIBER; | |
1589 | else | |
1590 | tipg = DEFAULT_82543_TIPG_IPGT_COPPER; | |
1591 | ||
581d708e | 1592 | switch (hw->mac_type) { |
1da177e4 LT |
1593 | case e1000_82542_rev2_0: |
1594 | case e1000_82542_rev2_1: | |
1595 | tipg = DEFAULT_82542_TIPG_IPGT; | |
0fadb059 JK |
1596 | ipgr1 = DEFAULT_82542_TIPG_IPGR1; |
1597 | ipgr2 = DEFAULT_82542_TIPG_IPGR2; | |
1da177e4 | 1598 | break; |
87041639 JK |
1599 | case e1000_80003es2lan: |
1600 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; | |
1601 | ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; | |
1602 | break; | |
1da177e4 | 1603 | default: |
0fadb059 JK |
1604 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; |
1605 | ipgr2 = DEFAULT_82543_TIPG_IPGR2; | |
1606 | break; | |
1da177e4 | 1607 | } |
0fadb059 JK |
1608 | tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT; |
1609 | tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT; | |
581d708e | 1610 | E1000_WRITE_REG(hw, TIPG, tipg); |
1da177e4 LT |
1611 | |
1612 | /* Set the Tx Interrupt Delay register */ | |
1613 | ||
581d708e MC |
1614 | E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay); |
1615 | if (hw->mac_type >= e1000_82540) | |
1616 | E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay); | |
1da177e4 LT |
1617 | |
1618 | /* Program the Transmit Control Register */ | |
1619 | ||
581d708e | 1620 | tctl = E1000_READ_REG(hw, TCTL); |
1da177e4 | 1621 | tctl &= ~E1000_TCTL_CT; |
7e6c9861 | 1622 | tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | |
1da177e4 LT |
1623 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); |
1624 | ||
2ae76d98 MC |
1625 | if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) { |
1626 | tarc = E1000_READ_REG(hw, TARC0); | |
90fb5135 AK |
1627 | /* set the speed mode bit, we'll clear it if we're not at |
1628 | * gigabit link later */ | |
09ae3e88 | 1629 | tarc |= (1 << 21); |
2ae76d98 | 1630 | E1000_WRITE_REG(hw, TARC0, tarc); |
87041639 JK |
1631 | } else if (hw->mac_type == e1000_80003es2lan) { |
1632 | tarc = E1000_READ_REG(hw, TARC0); | |
1633 | tarc |= 1; | |
87041639 JK |
1634 | E1000_WRITE_REG(hw, TARC0, tarc); |
1635 | tarc = E1000_READ_REG(hw, TARC1); | |
1636 | tarc |= 1; | |
1637 | E1000_WRITE_REG(hw, TARC1, tarc); | |
2ae76d98 MC |
1638 | } |
1639 | ||
581d708e | 1640 | e1000_config_collision_dist(hw); |
1da177e4 LT |
1641 | |
1642 | /* Setup Transmit Descriptor Settings for eop descriptor */ | |
6a042dab JB |
1643 | adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; |
1644 | ||
1645 | /* only set IDE if we are delaying interrupts using the timers */ | |
1646 | if (adapter->tx_int_delay) | |
1647 | adapter->txd_cmd |= E1000_TXD_CMD_IDE; | |
1da177e4 | 1648 | |
581d708e | 1649 | if (hw->mac_type < e1000_82543) |
1da177e4 LT |
1650 | adapter->txd_cmd |= E1000_TXD_CMD_RPS; |
1651 | else | |
1652 | adapter->txd_cmd |= E1000_TXD_CMD_RS; | |
1653 | ||
1654 | /* Cache if we're 82544 running in PCI-X because we'll | |
1655 | * need this to apply a workaround later in the send path. */ | |
581d708e MC |
1656 | if (hw->mac_type == e1000_82544 && |
1657 | hw->bus_type == e1000_bus_type_pcix) | |
1da177e4 | 1658 | adapter->pcix_82544 = 1; |
7e6c9861 JK |
1659 | |
1660 | E1000_WRITE_REG(hw, TCTL, tctl); | |
1661 | ||
1da177e4 LT |
1662 | } |
1663 | ||
1664 | /** | |
1665 | * e1000_setup_rx_resources - allocate Rx resources (Descriptors) | |
1666 | * @adapter: board private structure | |
581d708e | 1667 | * @rxdr: rx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1668 | * |
1669 | * Returns 0 on success, negative on failure | |
1670 | **/ | |
1671 | ||
3ad2cc67 | 1672 | static int |
581d708e MC |
1673 | e1000_setup_rx_resources(struct e1000_adapter *adapter, |
1674 | struct e1000_rx_ring *rxdr) | |
1da177e4 | 1675 | { |
1da177e4 | 1676 | struct pci_dev *pdev = adapter->pdev; |
2d7edb92 | 1677 | int size, desc_len; |
1da177e4 LT |
1678 | |
1679 | size = sizeof(struct e1000_buffer) * rxdr->count; | |
cd94dd0b | 1680 | rxdr->buffer_info = vmalloc(size); |
581d708e | 1681 | if (!rxdr->buffer_info) { |
2648345f MC |
1682 | DPRINTK(PROBE, ERR, |
1683 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 LT |
1684 | return -ENOMEM; |
1685 | } | |
1686 | memset(rxdr->buffer_info, 0, size); | |
1687 | ||
2d7edb92 MC |
1688 | size = sizeof(struct e1000_ps_page) * rxdr->count; |
1689 | rxdr->ps_page = kmalloc(size, GFP_KERNEL); | |
96838a40 | 1690 | if (!rxdr->ps_page) { |
2d7edb92 MC |
1691 | vfree(rxdr->buffer_info); |
1692 | DPRINTK(PROBE, ERR, | |
1693 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1694 | return -ENOMEM; | |
1695 | } | |
1696 | memset(rxdr->ps_page, 0, size); | |
1697 | ||
1698 | size = sizeof(struct e1000_ps_page_dma) * rxdr->count; | |
1699 | rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL); | |
96838a40 | 1700 | if (!rxdr->ps_page_dma) { |
2d7edb92 MC |
1701 | vfree(rxdr->buffer_info); |
1702 | kfree(rxdr->ps_page); | |
1703 | DPRINTK(PROBE, ERR, | |
1704 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1705 | return -ENOMEM; | |
1706 | } | |
1707 | memset(rxdr->ps_page_dma, 0, size); | |
1708 | ||
96838a40 | 1709 | if (adapter->hw.mac_type <= e1000_82547_rev_2) |
2d7edb92 MC |
1710 | desc_len = sizeof(struct e1000_rx_desc); |
1711 | else | |
1712 | desc_len = sizeof(union e1000_rx_desc_packet_split); | |
1713 | ||
1da177e4 LT |
1714 | /* Round up to nearest 4K */ |
1715 | ||
2d7edb92 | 1716 | rxdr->size = rxdr->count * desc_len; |
1da177e4 LT |
1717 | E1000_ROUNDUP(rxdr->size, 4096); |
1718 | ||
1719 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); | |
1720 | ||
581d708e MC |
1721 | if (!rxdr->desc) { |
1722 | DPRINTK(PROBE, ERR, | |
1723 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 | 1724 | setup_rx_desc_die: |
1da177e4 | 1725 | vfree(rxdr->buffer_info); |
2d7edb92 MC |
1726 | kfree(rxdr->ps_page); |
1727 | kfree(rxdr->ps_page_dma); | |
1da177e4 LT |
1728 | return -ENOMEM; |
1729 | } | |
1730 | ||
2648345f | 1731 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1732 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { |
1733 | void *olddesc = rxdr->desc; | |
1734 | dma_addr_t olddma = rxdr->dma; | |
2648345f MC |
1735 | DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes " |
1736 | "at %p\n", rxdr->size, rxdr->desc); | |
1737 | /* Try again, without freeing the previous */ | |
1da177e4 | 1738 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); |
2648345f | 1739 | /* Failed allocation, critical failure */ |
581d708e | 1740 | if (!rxdr->desc) { |
1da177e4 | 1741 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
581d708e MC |
1742 | DPRINTK(PROBE, ERR, |
1743 | "Unable to allocate memory " | |
1744 | "for the receive descriptor ring\n"); | |
1da177e4 LT |
1745 | goto setup_rx_desc_die; |
1746 | } | |
1747 | ||
1748 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { | |
1749 | /* give up */ | |
2648345f MC |
1750 | pci_free_consistent(pdev, rxdr->size, rxdr->desc, |
1751 | rxdr->dma); | |
1da177e4 | 1752 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
2648345f MC |
1753 | DPRINTK(PROBE, ERR, |
1754 | "Unable to allocate aligned memory " | |
1755 | "for the receive descriptor ring\n"); | |
581d708e | 1756 | goto setup_rx_desc_die; |
1da177e4 | 1757 | } else { |
2648345f | 1758 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1759 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
1760 | } | |
1761 | } | |
1762 | memset(rxdr->desc, 0, rxdr->size); | |
1763 | ||
1764 | rxdr->next_to_clean = 0; | |
1765 | rxdr->next_to_use = 0; | |
1766 | ||
1767 | return 0; | |
1768 | } | |
1769 | ||
581d708e MC |
1770 | /** |
1771 | * e1000_setup_all_rx_resources - wrapper to allocate Rx resources | |
1772 | * (Descriptors) for all queues | |
1773 | * @adapter: board private structure | |
1774 | * | |
581d708e MC |
1775 | * Return 0 on success, negative on failure |
1776 | **/ | |
1777 | ||
1778 | int | |
1779 | e1000_setup_all_rx_resources(struct e1000_adapter *adapter) | |
1780 | { | |
1781 | int i, err = 0; | |
1782 | ||
f56799ea | 1783 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
1784 | err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]); |
1785 | if (err) { | |
1786 | DPRINTK(PROBE, ERR, | |
1787 | "Allocation for Rx Queue %u failed\n", i); | |
3fbbc72e VA |
1788 | for (i-- ; i >= 0; i--) |
1789 | e1000_free_rx_resources(adapter, | |
1790 | &adapter->rx_ring[i]); | |
581d708e MC |
1791 | break; |
1792 | } | |
1793 | } | |
1794 | ||
1795 | return err; | |
1796 | } | |
1797 | ||
1da177e4 | 1798 | /** |
2648345f | 1799 | * e1000_setup_rctl - configure the receive control registers |
1da177e4 LT |
1800 | * @adapter: Board private structure |
1801 | **/ | |
e4c811c9 MC |
1802 | #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ |
1803 | (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) | |
1da177e4 LT |
1804 | static void |
1805 | e1000_setup_rctl(struct e1000_adapter *adapter) | |
1806 | { | |
2d7edb92 MC |
1807 | uint32_t rctl, rfctl; |
1808 | uint32_t psrctl = 0; | |
35ec56bb | 1809 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT |
e4c811c9 MC |
1810 | uint32_t pages = 0; |
1811 | #endif | |
1da177e4 LT |
1812 | |
1813 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
1814 | ||
1815 | rctl &= ~(3 << E1000_RCTL_MO_SHIFT); | |
1816 | ||
1817 | rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | | |
1818 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | |
1819 | (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); | |
1820 | ||
0fadb059 | 1821 | if (adapter->hw.tbi_compatibility_on == 1) |
1da177e4 LT |
1822 | rctl |= E1000_RCTL_SBP; |
1823 | else | |
1824 | rctl &= ~E1000_RCTL_SBP; | |
1825 | ||
2d7edb92 MC |
1826 | if (adapter->netdev->mtu <= ETH_DATA_LEN) |
1827 | rctl &= ~E1000_RCTL_LPE; | |
1828 | else | |
1829 | rctl |= E1000_RCTL_LPE; | |
1830 | ||
1da177e4 | 1831 | /* Setup buffer sizes */ |
9e2feace AK |
1832 | rctl &= ~E1000_RCTL_SZ_4096; |
1833 | rctl |= E1000_RCTL_BSEX; | |
1834 | switch (adapter->rx_buffer_len) { | |
1835 | case E1000_RXBUFFER_256: | |
1836 | rctl |= E1000_RCTL_SZ_256; | |
1837 | rctl &= ~E1000_RCTL_BSEX; | |
1838 | break; | |
1839 | case E1000_RXBUFFER_512: | |
1840 | rctl |= E1000_RCTL_SZ_512; | |
1841 | rctl &= ~E1000_RCTL_BSEX; | |
1842 | break; | |
1843 | case E1000_RXBUFFER_1024: | |
1844 | rctl |= E1000_RCTL_SZ_1024; | |
1845 | rctl &= ~E1000_RCTL_BSEX; | |
1846 | break; | |
a1415ee6 JK |
1847 | case E1000_RXBUFFER_2048: |
1848 | default: | |
1849 | rctl |= E1000_RCTL_SZ_2048; | |
1850 | rctl &= ~E1000_RCTL_BSEX; | |
1851 | break; | |
1852 | case E1000_RXBUFFER_4096: | |
1853 | rctl |= E1000_RCTL_SZ_4096; | |
1854 | break; | |
1855 | case E1000_RXBUFFER_8192: | |
1856 | rctl |= E1000_RCTL_SZ_8192; | |
1857 | break; | |
1858 | case E1000_RXBUFFER_16384: | |
1859 | rctl |= E1000_RCTL_SZ_16384; | |
1860 | break; | |
2d7edb92 MC |
1861 | } |
1862 | ||
35ec56bb | 1863 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT |
2d7edb92 MC |
1864 | /* 82571 and greater support packet-split where the protocol |
1865 | * header is placed in skb->data and the packet data is | |
1866 | * placed in pages hanging off of skb_shinfo(skb)->nr_frags. | |
1867 | * In the case of a non-split, skb->data is linearly filled, | |
1868 | * followed by the page buffers. Therefore, skb->data is | |
1869 | * sized to hold the largest protocol header. | |
1870 | */ | |
e64d7d02 JB |
1871 | /* allocations using alloc_page take too long for regular MTU |
1872 | * so only enable packet split for jumbo frames */ | |
e4c811c9 | 1873 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); |
e64d7d02 JB |
1874 | if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) && |
1875 | PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE)) | |
e4c811c9 MC |
1876 | adapter->rx_ps_pages = pages; |
1877 | else | |
1878 | adapter->rx_ps_pages = 0; | |
2d7edb92 | 1879 | #endif |
e4c811c9 | 1880 | if (adapter->rx_ps_pages) { |
2d7edb92 MC |
1881 | /* Configure extra packet-split registers */ |
1882 | rfctl = E1000_READ_REG(&adapter->hw, RFCTL); | |
1883 | rfctl |= E1000_RFCTL_EXTEN; | |
87ca4e5b AK |
1884 | /* disable packet split support for IPv6 extension headers, |
1885 | * because some malformed IPv6 headers can hang the RX */ | |
1886 | rfctl |= (E1000_RFCTL_IPV6_EX_DIS | | |
1887 | E1000_RFCTL_NEW_IPV6_EXT_DIS); | |
1888 | ||
2d7edb92 MC |
1889 | E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl); |
1890 | ||
7dfee0cb | 1891 | rctl |= E1000_RCTL_DTYP_PS; |
96838a40 | 1892 | |
2d7edb92 MC |
1893 | psrctl |= adapter->rx_ps_bsize0 >> |
1894 | E1000_PSRCTL_BSIZE0_SHIFT; | |
e4c811c9 MC |
1895 | |
1896 | switch (adapter->rx_ps_pages) { | |
1897 | case 3: | |
1898 | psrctl |= PAGE_SIZE << | |
1899 | E1000_PSRCTL_BSIZE3_SHIFT; | |
1900 | case 2: | |
1901 | psrctl |= PAGE_SIZE << | |
1902 | E1000_PSRCTL_BSIZE2_SHIFT; | |
1903 | case 1: | |
1904 | psrctl |= PAGE_SIZE >> | |
1905 | E1000_PSRCTL_BSIZE1_SHIFT; | |
1906 | break; | |
1907 | } | |
2d7edb92 MC |
1908 | |
1909 | E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl); | |
1da177e4 LT |
1910 | } |
1911 | ||
1912 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
1913 | } | |
1914 | ||
1915 | /** | |
1916 | * e1000_configure_rx - Configure 8254x Receive Unit after Reset | |
1917 | * @adapter: board private structure | |
1918 | * | |
1919 | * Configure the Rx unit of the MAC after a reset. | |
1920 | **/ | |
1921 | ||
1922 | static void | |
1923 | e1000_configure_rx(struct e1000_adapter *adapter) | |
1924 | { | |
581d708e MC |
1925 | uint64_t rdba; |
1926 | struct e1000_hw *hw = &adapter->hw; | |
1927 | uint32_t rdlen, rctl, rxcsum, ctrl_ext; | |
2d7edb92 | 1928 | |
e4c811c9 | 1929 | if (adapter->rx_ps_pages) { |
0f15a8fa | 1930 | /* this is a 32 byte descriptor */ |
581d708e | 1931 | rdlen = adapter->rx_ring[0].count * |
2d7edb92 MC |
1932 | sizeof(union e1000_rx_desc_packet_split); |
1933 | adapter->clean_rx = e1000_clean_rx_irq_ps; | |
1934 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; | |
1935 | } else { | |
581d708e MC |
1936 | rdlen = adapter->rx_ring[0].count * |
1937 | sizeof(struct e1000_rx_desc); | |
2d7edb92 MC |
1938 | adapter->clean_rx = e1000_clean_rx_irq; |
1939 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers; | |
1940 | } | |
1da177e4 LT |
1941 | |
1942 | /* disable receives while setting up the descriptors */ | |
581d708e MC |
1943 | rctl = E1000_READ_REG(hw, RCTL); |
1944 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
1da177e4 LT |
1945 | |
1946 | /* set the Receive Delay Timer Register */ | |
581d708e | 1947 | E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay); |
1da177e4 | 1948 | |
581d708e MC |
1949 | if (hw->mac_type >= e1000_82540) { |
1950 | E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay); | |
835bb129 | 1951 | if (adapter->itr_setting != 0) |
581d708e | 1952 | E1000_WRITE_REG(hw, ITR, |
1da177e4 LT |
1953 | 1000000000 / (adapter->itr * 256)); |
1954 | } | |
1955 | ||
2ae76d98 | 1956 | if (hw->mac_type >= e1000_82571) { |
2ae76d98 | 1957 | ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); |
1e613fd9 | 1958 | /* Reset delay timers after every interrupt */ |
6fc7a7ec | 1959 | ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR; |
1e613fd9 | 1960 | #ifdef CONFIG_E1000_NAPI |
835bb129 | 1961 | /* Auto-Mask interrupts upon ICR access */ |
1e613fd9 | 1962 | ctrl_ext |= E1000_CTRL_EXT_IAME; |
835bb129 | 1963 | E1000_WRITE_REG(hw, IAM, 0xffffffff); |
1e613fd9 | 1964 | #endif |
2ae76d98 MC |
1965 | E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext); |
1966 | E1000_WRITE_FLUSH(hw); | |
1967 | } | |
1968 | ||
581d708e MC |
1969 | /* Setup the HW Rx Head and Tail Descriptor Pointers and |
1970 | * the Base and Length of the Rx Descriptor Ring */ | |
f56799ea | 1971 | switch (adapter->num_rx_queues) { |
24025e4e MC |
1972 | case 1: |
1973 | default: | |
581d708e | 1974 | rdba = adapter->rx_ring[0].dma; |
581d708e | 1975 | E1000_WRITE_REG(hw, RDLEN, rdlen); |
4ca213a6 AK |
1976 | E1000_WRITE_REG(hw, RDBAH, (rdba >> 32)); |
1977 | E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL)); | |
581d708e | 1978 | E1000_WRITE_REG(hw, RDT, 0); |
4ca213a6 | 1979 | E1000_WRITE_REG(hw, RDH, 0); |
6a951698 AK |
1980 | adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH); |
1981 | adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT); | |
581d708e | 1982 | break; |
24025e4e MC |
1983 | } |
1984 | ||
1da177e4 | 1985 | /* Enable 82543 Receive Checksum Offload for TCP and UDP */ |
581d708e MC |
1986 | if (hw->mac_type >= e1000_82543) { |
1987 | rxcsum = E1000_READ_REG(hw, RXCSUM); | |
96838a40 | 1988 | if (adapter->rx_csum == TRUE) { |
2d7edb92 MC |
1989 | rxcsum |= E1000_RXCSUM_TUOFL; |
1990 | ||
868d5309 | 1991 | /* Enable 82571 IPv4 payload checksum for UDP fragments |
2d7edb92 | 1992 | * Must be used in conjunction with packet-split. */ |
96838a40 JB |
1993 | if ((hw->mac_type >= e1000_82571) && |
1994 | (adapter->rx_ps_pages)) { | |
2d7edb92 MC |
1995 | rxcsum |= E1000_RXCSUM_IPPCSE; |
1996 | } | |
1997 | } else { | |
1998 | rxcsum &= ~E1000_RXCSUM_TUOFL; | |
1999 | /* don't need to clear IPPCSE as it defaults to 0 */ | |
2000 | } | |
581d708e | 2001 | E1000_WRITE_REG(hw, RXCSUM, rxcsum); |
1da177e4 LT |
2002 | } |
2003 | ||
21c4d5e0 AK |
2004 | /* enable early receives on 82573, only takes effect if using > 2048 |
2005 | * byte total frame size. for example only for jumbo frames */ | |
2006 | #define E1000_ERT_2048 0x100 | |
2007 | if (hw->mac_type == e1000_82573) | |
2008 | E1000_WRITE_REG(hw, ERT, E1000_ERT_2048); | |
2009 | ||
1da177e4 | 2010 | /* Enable Receives */ |
581d708e | 2011 | E1000_WRITE_REG(hw, RCTL, rctl); |
1da177e4 LT |
2012 | } |
2013 | ||
2014 | /** | |
581d708e | 2015 | * e1000_free_tx_resources - Free Tx Resources per Queue |
1da177e4 | 2016 | * @adapter: board private structure |
581d708e | 2017 | * @tx_ring: Tx descriptor ring for a specific queue |
1da177e4 LT |
2018 | * |
2019 | * Free all transmit software resources | |
2020 | **/ | |
2021 | ||
3ad2cc67 | 2022 | static void |
581d708e MC |
2023 | e1000_free_tx_resources(struct e1000_adapter *adapter, |
2024 | struct e1000_tx_ring *tx_ring) | |
1da177e4 LT |
2025 | { |
2026 | struct pci_dev *pdev = adapter->pdev; | |
2027 | ||
581d708e | 2028 | e1000_clean_tx_ring(adapter, tx_ring); |
1da177e4 | 2029 | |
581d708e MC |
2030 | vfree(tx_ring->buffer_info); |
2031 | tx_ring->buffer_info = NULL; | |
1da177e4 | 2032 | |
581d708e | 2033 | pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma); |
1da177e4 | 2034 | |
581d708e MC |
2035 | tx_ring->desc = NULL; |
2036 | } | |
2037 | ||
2038 | /** | |
2039 | * e1000_free_all_tx_resources - Free Tx Resources for All Queues | |
2040 | * @adapter: board private structure | |
2041 | * | |
2042 | * Free all transmit software resources | |
2043 | **/ | |
2044 | ||
2045 | void | |
2046 | e1000_free_all_tx_resources(struct e1000_adapter *adapter) | |
2047 | { | |
2048 | int i; | |
2049 | ||
f56799ea | 2050 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 2051 | e1000_free_tx_resources(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
2052 | } |
2053 | ||
e619d523 | 2054 | static void |
1da177e4 LT |
2055 | e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter, |
2056 | struct e1000_buffer *buffer_info) | |
2057 | { | |
96838a40 | 2058 | if (buffer_info->dma) { |
2648345f MC |
2059 | pci_unmap_page(adapter->pdev, |
2060 | buffer_info->dma, | |
2061 | buffer_info->length, | |
2062 | PCI_DMA_TODEVICE); | |
a9ebadd6 | 2063 | buffer_info->dma = 0; |
1da177e4 | 2064 | } |
a9ebadd6 | 2065 | if (buffer_info->skb) { |
1da177e4 | 2066 | dev_kfree_skb_any(buffer_info->skb); |
a9ebadd6 JB |
2067 | buffer_info->skb = NULL; |
2068 | } | |
2069 | /* buffer_info must be completely set up in the transmit path */ | |
1da177e4 LT |
2070 | } |
2071 | ||
2072 | /** | |
2073 | * e1000_clean_tx_ring - Free Tx Buffers | |
2074 | * @adapter: board private structure | |
581d708e | 2075 | * @tx_ring: ring to be cleaned |
1da177e4 LT |
2076 | **/ |
2077 | ||
2078 | static void | |
581d708e MC |
2079 | e1000_clean_tx_ring(struct e1000_adapter *adapter, |
2080 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 2081 | { |
1da177e4 LT |
2082 | struct e1000_buffer *buffer_info; |
2083 | unsigned long size; | |
2084 | unsigned int i; | |
2085 | ||
2086 | /* Free all the Tx ring sk_buffs */ | |
2087 | ||
96838a40 | 2088 | for (i = 0; i < tx_ring->count; i++) { |
1da177e4 LT |
2089 | buffer_info = &tx_ring->buffer_info[i]; |
2090 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); | |
2091 | } | |
2092 | ||
2093 | size = sizeof(struct e1000_buffer) * tx_ring->count; | |
2094 | memset(tx_ring->buffer_info, 0, size); | |
2095 | ||
2096 | /* Zero out the descriptor ring */ | |
2097 | ||
2098 | memset(tx_ring->desc, 0, tx_ring->size); | |
2099 | ||
2100 | tx_ring->next_to_use = 0; | |
2101 | tx_ring->next_to_clean = 0; | |
fd803241 | 2102 | tx_ring->last_tx_tso = 0; |
1da177e4 | 2103 | |
581d708e MC |
2104 | writel(0, adapter->hw.hw_addr + tx_ring->tdh); |
2105 | writel(0, adapter->hw.hw_addr + tx_ring->tdt); | |
2106 | } | |
2107 | ||
2108 | /** | |
2109 | * e1000_clean_all_tx_rings - Free Tx Buffers for all queues | |
2110 | * @adapter: board private structure | |
2111 | **/ | |
2112 | ||
2113 | static void | |
2114 | e1000_clean_all_tx_rings(struct e1000_adapter *adapter) | |
2115 | { | |
2116 | int i; | |
2117 | ||
f56799ea | 2118 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 2119 | e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
2120 | } |
2121 | ||
2122 | /** | |
2123 | * e1000_free_rx_resources - Free Rx Resources | |
2124 | * @adapter: board private structure | |
581d708e | 2125 | * @rx_ring: ring to clean the resources from |
1da177e4 LT |
2126 | * |
2127 | * Free all receive software resources | |
2128 | **/ | |
2129 | ||
3ad2cc67 | 2130 | static void |
581d708e MC |
2131 | e1000_free_rx_resources(struct e1000_adapter *adapter, |
2132 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 2133 | { |
1da177e4 LT |
2134 | struct pci_dev *pdev = adapter->pdev; |
2135 | ||
581d708e | 2136 | e1000_clean_rx_ring(adapter, rx_ring); |
1da177e4 LT |
2137 | |
2138 | vfree(rx_ring->buffer_info); | |
2139 | rx_ring->buffer_info = NULL; | |
2d7edb92 MC |
2140 | kfree(rx_ring->ps_page); |
2141 | rx_ring->ps_page = NULL; | |
2142 | kfree(rx_ring->ps_page_dma); | |
2143 | rx_ring->ps_page_dma = NULL; | |
1da177e4 LT |
2144 | |
2145 | pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma); | |
2146 | ||
2147 | rx_ring->desc = NULL; | |
2148 | } | |
2149 | ||
2150 | /** | |
581d708e | 2151 | * e1000_free_all_rx_resources - Free Rx Resources for All Queues |
1da177e4 | 2152 | * @adapter: board private structure |
581d708e MC |
2153 | * |
2154 | * Free all receive software resources | |
2155 | **/ | |
2156 | ||
2157 | void | |
2158 | e1000_free_all_rx_resources(struct e1000_adapter *adapter) | |
2159 | { | |
2160 | int i; | |
2161 | ||
f56799ea | 2162 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e MC |
2163 | e1000_free_rx_resources(adapter, &adapter->rx_ring[i]); |
2164 | } | |
2165 | ||
2166 | /** | |
2167 | * e1000_clean_rx_ring - Free Rx Buffers per Queue | |
2168 | * @adapter: board private structure | |
2169 | * @rx_ring: ring to free buffers from | |
1da177e4 LT |
2170 | **/ |
2171 | ||
2172 | static void | |
581d708e MC |
2173 | e1000_clean_rx_ring(struct e1000_adapter *adapter, |
2174 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 2175 | { |
1da177e4 | 2176 | struct e1000_buffer *buffer_info; |
2d7edb92 MC |
2177 | struct e1000_ps_page *ps_page; |
2178 | struct e1000_ps_page_dma *ps_page_dma; | |
1da177e4 LT |
2179 | struct pci_dev *pdev = adapter->pdev; |
2180 | unsigned long size; | |
2d7edb92 | 2181 | unsigned int i, j; |
1da177e4 LT |
2182 | |
2183 | /* Free all the Rx ring sk_buffs */ | |
96838a40 | 2184 | for (i = 0; i < rx_ring->count; i++) { |
1da177e4 | 2185 | buffer_info = &rx_ring->buffer_info[i]; |
96838a40 | 2186 | if (buffer_info->skb) { |
1da177e4 LT |
2187 | pci_unmap_single(pdev, |
2188 | buffer_info->dma, | |
2189 | buffer_info->length, | |
2190 | PCI_DMA_FROMDEVICE); | |
2191 | ||
2192 | dev_kfree_skb(buffer_info->skb); | |
2193 | buffer_info->skb = NULL; | |
997f5cbd JK |
2194 | } |
2195 | ps_page = &rx_ring->ps_page[i]; | |
2196 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
2197 | for (j = 0; j < adapter->rx_ps_pages; j++) { | |
2198 | if (!ps_page->ps_page[j]) break; | |
2199 | pci_unmap_page(pdev, | |
2200 | ps_page_dma->ps_page_dma[j], | |
2201 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
2202 | ps_page_dma->ps_page_dma[j] = 0; | |
2203 | put_page(ps_page->ps_page[j]); | |
2204 | ps_page->ps_page[j] = NULL; | |
1da177e4 LT |
2205 | } |
2206 | } | |
2207 | ||
2208 | size = sizeof(struct e1000_buffer) * rx_ring->count; | |
2209 | memset(rx_ring->buffer_info, 0, size); | |
2d7edb92 MC |
2210 | size = sizeof(struct e1000_ps_page) * rx_ring->count; |
2211 | memset(rx_ring->ps_page, 0, size); | |
2212 | size = sizeof(struct e1000_ps_page_dma) * rx_ring->count; | |
2213 | memset(rx_ring->ps_page_dma, 0, size); | |
1da177e4 LT |
2214 | |
2215 | /* Zero out the descriptor ring */ | |
2216 | ||
2217 | memset(rx_ring->desc, 0, rx_ring->size); | |
2218 | ||
2219 | rx_ring->next_to_clean = 0; | |
2220 | rx_ring->next_to_use = 0; | |
2221 | ||
581d708e MC |
2222 | writel(0, adapter->hw.hw_addr + rx_ring->rdh); |
2223 | writel(0, adapter->hw.hw_addr + rx_ring->rdt); | |
2224 | } | |
2225 | ||
2226 | /** | |
2227 | * e1000_clean_all_rx_rings - Free Rx Buffers for all queues | |
2228 | * @adapter: board private structure | |
2229 | **/ | |
2230 | ||
2231 | static void | |
2232 | e1000_clean_all_rx_rings(struct e1000_adapter *adapter) | |
2233 | { | |
2234 | int i; | |
2235 | ||
f56799ea | 2236 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e | 2237 | e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]); |
1da177e4 LT |
2238 | } |
2239 | ||
2240 | /* The 82542 2.0 (revision 2) needs to have the receive unit in reset | |
2241 | * and memory write and invalidate disabled for certain operations | |
2242 | */ | |
2243 | static void | |
2244 | e1000_enter_82542_rst(struct e1000_adapter *adapter) | |
2245 | { | |
2246 | struct net_device *netdev = adapter->netdev; | |
2247 | uint32_t rctl; | |
2248 | ||
2249 | e1000_pci_clear_mwi(&adapter->hw); | |
2250 | ||
2251 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
2252 | rctl |= E1000_RCTL_RST; | |
2253 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2254 | E1000_WRITE_FLUSH(&adapter->hw); | |
2255 | mdelay(5); | |
2256 | ||
96838a40 | 2257 | if (netif_running(netdev)) |
581d708e | 2258 | e1000_clean_all_rx_rings(adapter); |
1da177e4 LT |
2259 | } |
2260 | ||
2261 | static void | |
2262 | e1000_leave_82542_rst(struct e1000_adapter *adapter) | |
2263 | { | |
2264 | struct net_device *netdev = adapter->netdev; | |
2265 | uint32_t rctl; | |
2266 | ||
2267 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
2268 | rctl &= ~E1000_RCTL_RST; | |
2269 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2270 | E1000_WRITE_FLUSH(&adapter->hw); | |
2271 | mdelay(5); | |
2272 | ||
96838a40 | 2273 | if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE) |
1da177e4 LT |
2274 | e1000_pci_set_mwi(&adapter->hw); |
2275 | ||
96838a40 | 2276 | if (netif_running(netdev)) { |
72d64a43 JK |
2277 | /* No need to loop, because 82542 supports only 1 queue */ |
2278 | struct e1000_rx_ring *ring = &adapter->rx_ring[0]; | |
7c4d3367 | 2279 | e1000_configure_rx(adapter); |
72d64a43 | 2280 | adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring)); |
1da177e4 LT |
2281 | } |
2282 | } | |
2283 | ||
2284 | /** | |
2285 | * e1000_set_mac - Change the Ethernet Address of the NIC | |
2286 | * @netdev: network interface device structure | |
2287 | * @p: pointer to an address structure | |
2288 | * | |
2289 | * Returns 0 on success, negative on failure | |
2290 | **/ | |
2291 | ||
2292 | static int | |
2293 | e1000_set_mac(struct net_device *netdev, void *p) | |
2294 | { | |
60490fe0 | 2295 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2296 | struct sockaddr *addr = p; |
2297 | ||
96838a40 | 2298 | if (!is_valid_ether_addr(addr->sa_data)) |
1da177e4 LT |
2299 | return -EADDRNOTAVAIL; |
2300 | ||
2301 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2302 | ||
96838a40 | 2303 | if (adapter->hw.mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2304 | e1000_enter_82542_rst(adapter); |
2305 | ||
2306 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
2307 | memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); | |
2308 | ||
2309 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2310 | ||
868d5309 MC |
2311 | /* With 82571 controllers, LAA may be overwritten (with the default) |
2312 | * due to controller reset from the other port. */ | |
2313 | if (adapter->hw.mac_type == e1000_82571) { | |
2314 | /* activate the work around */ | |
2315 | adapter->hw.laa_is_present = 1; | |
2316 | ||
96838a40 JB |
2317 | /* Hold a copy of the LAA in RAR[14] This is done so that |
2318 | * between the time RAR[0] gets clobbered and the time it | |
2319 | * gets fixed (in e1000_watchdog), the actual LAA is in one | |
868d5309 | 2320 | * of the RARs and no incoming packets directed to this port |
96838a40 | 2321 | * are dropped. Eventaully the LAA will be in RAR[0] and |
868d5309 | 2322 | * RAR[14] */ |
96838a40 | 2323 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, |
868d5309 MC |
2324 | E1000_RAR_ENTRIES - 1); |
2325 | } | |
2326 | ||
96838a40 | 2327 | if (adapter->hw.mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2328 | e1000_leave_82542_rst(adapter); |
2329 | ||
2330 | return 0; | |
2331 | } | |
2332 | ||
2333 | /** | |
2334 | * e1000_set_multi - Multicast and Promiscuous mode set | |
2335 | * @netdev: network interface device structure | |
2336 | * | |
2337 | * The set_multi entry point is called whenever the multicast address | |
2338 | * list or the network interface flags are updated. This routine is | |
2339 | * responsible for configuring the hardware for proper multicast, | |
2340 | * promiscuous mode, and all-multi behavior. | |
2341 | **/ | |
2342 | ||
2343 | static void | |
2344 | e1000_set_multi(struct net_device *netdev) | |
2345 | { | |
60490fe0 | 2346 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2347 | struct e1000_hw *hw = &adapter->hw; |
2348 | struct dev_mc_list *mc_ptr; | |
2349 | uint32_t rctl; | |
2350 | uint32_t hash_value; | |
868d5309 | 2351 | int i, rar_entries = E1000_RAR_ENTRIES; |
cd94dd0b AK |
2352 | int mta_reg_count = (hw->mac_type == e1000_ich8lan) ? |
2353 | E1000_NUM_MTA_REGISTERS_ICH8LAN : | |
2354 | E1000_NUM_MTA_REGISTERS; | |
2355 | ||
2356 | if (adapter->hw.mac_type == e1000_ich8lan) | |
2357 | rar_entries = E1000_RAR_ENTRIES_ICH8LAN; | |
1da177e4 | 2358 | |
868d5309 MC |
2359 | /* reserve RAR[14] for LAA over-write work-around */ |
2360 | if (adapter->hw.mac_type == e1000_82571) | |
2361 | rar_entries--; | |
1da177e4 | 2362 | |
2648345f MC |
2363 | /* Check for Promiscuous and All Multicast modes */ |
2364 | ||
1da177e4 LT |
2365 | rctl = E1000_READ_REG(hw, RCTL); |
2366 | ||
96838a40 | 2367 | if (netdev->flags & IFF_PROMISC) { |
1da177e4 | 2368 | rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); |
96838a40 | 2369 | } else if (netdev->flags & IFF_ALLMULTI) { |
1da177e4 LT |
2370 | rctl |= E1000_RCTL_MPE; |
2371 | rctl &= ~E1000_RCTL_UPE; | |
2372 | } else { | |
2373 | rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); | |
2374 | } | |
2375 | ||
2376 | E1000_WRITE_REG(hw, RCTL, rctl); | |
2377 | ||
2378 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2379 | ||
96838a40 | 2380 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2381 | e1000_enter_82542_rst(adapter); |
2382 | ||
2383 | /* load the first 14 multicast address into the exact filters 1-14 | |
2384 | * RAR 0 is used for the station MAC adddress | |
2385 | * if there are not 14 addresses, go ahead and clear the filters | |
868d5309 | 2386 | * -- with 82571 controllers only 0-13 entries are filled here |
1da177e4 LT |
2387 | */ |
2388 | mc_ptr = netdev->mc_list; | |
2389 | ||
96838a40 | 2390 | for (i = 1; i < rar_entries; i++) { |
868d5309 | 2391 | if (mc_ptr) { |
1da177e4 LT |
2392 | e1000_rar_set(hw, mc_ptr->dmi_addr, i); |
2393 | mc_ptr = mc_ptr->next; | |
2394 | } else { | |
2395 | E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0); | |
4ca213a6 | 2396 | E1000_WRITE_FLUSH(hw); |
1da177e4 | 2397 | E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0); |
4ca213a6 | 2398 | E1000_WRITE_FLUSH(hw); |
1da177e4 LT |
2399 | } |
2400 | } | |
2401 | ||
2402 | /* clear the old settings from the multicast hash table */ | |
2403 | ||
cd94dd0b | 2404 | for (i = 0; i < mta_reg_count; i++) { |
1da177e4 | 2405 | E1000_WRITE_REG_ARRAY(hw, MTA, i, 0); |
4ca213a6 AK |
2406 | E1000_WRITE_FLUSH(hw); |
2407 | } | |
1da177e4 LT |
2408 | |
2409 | /* load any remaining addresses into the hash table */ | |
2410 | ||
96838a40 | 2411 | for (; mc_ptr; mc_ptr = mc_ptr->next) { |
1da177e4 LT |
2412 | hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr); |
2413 | e1000_mta_set(hw, hash_value); | |
2414 | } | |
2415 | ||
96838a40 | 2416 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 | 2417 | e1000_leave_82542_rst(adapter); |
1da177e4 LT |
2418 | } |
2419 | ||
2420 | /* Need to wait a few seconds after link up to get diagnostic information from | |
2421 | * the phy */ | |
2422 | ||
2423 | static void | |
2424 | e1000_update_phy_info(unsigned long data) | |
2425 | { | |
2426 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2427 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
2428 | } | |
2429 | ||
2430 | /** | |
2431 | * e1000_82547_tx_fifo_stall - Timer Call-back | |
2432 | * @data: pointer to adapter cast into an unsigned long | |
2433 | **/ | |
2434 | ||
2435 | static void | |
2436 | e1000_82547_tx_fifo_stall(unsigned long data) | |
2437 | { | |
2438 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2439 | struct net_device *netdev = adapter->netdev; | |
2440 | uint32_t tctl; | |
2441 | ||
96838a40 JB |
2442 | if (atomic_read(&adapter->tx_fifo_stall)) { |
2443 | if ((E1000_READ_REG(&adapter->hw, TDT) == | |
1da177e4 LT |
2444 | E1000_READ_REG(&adapter->hw, TDH)) && |
2445 | (E1000_READ_REG(&adapter->hw, TDFT) == | |
2446 | E1000_READ_REG(&adapter->hw, TDFH)) && | |
2447 | (E1000_READ_REG(&adapter->hw, TDFTS) == | |
2448 | E1000_READ_REG(&adapter->hw, TDFHS))) { | |
2449 | tctl = E1000_READ_REG(&adapter->hw, TCTL); | |
2450 | E1000_WRITE_REG(&adapter->hw, TCTL, | |
2451 | tctl & ~E1000_TCTL_EN); | |
2452 | E1000_WRITE_REG(&adapter->hw, TDFT, | |
2453 | adapter->tx_head_addr); | |
2454 | E1000_WRITE_REG(&adapter->hw, TDFH, | |
2455 | adapter->tx_head_addr); | |
2456 | E1000_WRITE_REG(&adapter->hw, TDFTS, | |
2457 | adapter->tx_head_addr); | |
2458 | E1000_WRITE_REG(&adapter->hw, TDFHS, | |
2459 | adapter->tx_head_addr); | |
2460 | E1000_WRITE_REG(&adapter->hw, TCTL, tctl); | |
2461 | E1000_WRITE_FLUSH(&adapter->hw); | |
2462 | ||
2463 | adapter->tx_fifo_head = 0; | |
2464 | atomic_set(&adapter->tx_fifo_stall, 0); | |
2465 | netif_wake_queue(netdev); | |
2466 | } else { | |
2467 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); | |
2468 | } | |
2469 | } | |
2470 | } | |
2471 | ||
2472 | /** | |
2473 | * e1000_watchdog - Timer Call-back | |
2474 | * @data: pointer to adapter cast into an unsigned long | |
2475 | **/ | |
2476 | static void | |
2477 | e1000_watchdog(unsigned long data) | |
2478 | { | |
2479 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
1da177e4 | 2480 | struct net_device *netdev = adapter->netdev; |
545c67c0 | 2481 | struct e1000_tx_ring *txdr = adapter->tx_ring; |
7e6c9861 | 2482 | uint32_t link, tctl; |
cd94dd0b AK |
2483 | int32_t ret_val; |
2484 | ||
2485 | ret_val = e1000_check_for_link(&adapter->hw); | |
2486 | if ((ret_val == E1000_ERR_PHY) && | |
2487 | (adapter->hw.phy_type == e1000_phy_igp_3) && | |
2488 | (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { | |
2489 | /* See e1000_kumeran_lock_loss_workaround() */ | |
2490 | DPRINTK(LINK, INFO, | |
2491 | "Gigabit has been disabled, downgrading speed\n"); | |
2492 | } | |
90fb5135 | 2493 | |
2d7edb92 MC |
2494 | if (adapter->hw.mac_type == e1000_82573) { |
2495 | e1000_enable_tx_pkt_filtering(&adapter->hw); | |
96838a40 | 2496 | if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id) |
2d7edb92 | 2497 | e1000_update_mng_vlan(adapter); |
96838a40 | 2498 | } |
1da177e4 | 2499 | |
96838a40 | 2500 | if ((adapter->hw.media_type == e1000_media_type_internal_serdes) && |
1da177e4 LT |
2501 | !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE)) |
2502 | link = !adapter->hw.serdes_link_down; | |
2503 | else | |
2504 | link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU; | |
2505 | ||
96838a40 JB |
2506 | if (link) { |
2507 | if (!netif_carrier_ok(netdev)) { | |
fe7fe28e | 2508 | boolean_t txb2b = 1; |
1da177e4 LT |
2509 | e1000_get_speed_and_duplex(&adapter->hw, |
2510 | &adapter->link_speed, | |
2511 | &adapter->link_duplex); | |
2512 | ||
2513 | DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n", | |
2514 | adapter->link_speed, | |
2515 | adapter->link_duplex == FULL_DUPLEX ? | |
2516 | "Full Duplex" : "Half Duplex"); | |
2517 | ||
7e6c9861 JK |
2518 | /* tweak tx_queue_len according to speed/duplex |
2519 | * and adjust the timeout factor */ | |
66a2b0a3 JK |
2520 | netdev->tx_queue_len = adapter->tx_queue_len; |
2521 | adapter->tx_timeout_factor = 1; | |
7e6c9861 JK |
2522 | switch (adapter->link_speed) { |
2523 | case SPEED_10: | |
fe7fe28e | 2524 | txb2b = 0; |
7e6c9861 JK |
2525 | netdev->tx_queue_len = 10; |
2526 | adapter->tx_timeout_factor = 8; | |
2527 | break; | |
2528 | case SPEED_100: | |
fe7fe28e | 2529 | txb2b = 0; |
7e6c9861 JK |
2530 | netdev->tx_queue_len = 100; |
2531 | /* maybe add some timeout factor ? */ | |
2532 | break; | |
2533 | } | |
2534 | ||
fe7fe28e | 2535 | if ((adapter->hw.mac_type == e1000_82571 || |
7e6c9861 | 2536 | adapter->hw.mac_type == e1000_82572) && |
fe7fe28e | 2537 | txb2b == 0) { |
7e6c9861 JK |
2538 | uint32_t tarc0; |
2539 | tarc0 = E1000_READ_REG(&adapter->hw, TARC0); | |
90fb5135 | 2540 | tarc0 &= ~(1 << 21); |
7e6c9861 JK |
2541 | E1000_WRITE_REG(&adapter->hw, TARC0, tarc0); |
2542 | } | |
90fb5135 | 2543 | |
7e6c9861 JK |
2544 | #ifdef NETIF_F_TSO |
2545 | /* disable TSO for pcie and 10/100 speeds, to avoid | |
2546 | * some hardware issues */ | |
2547 | if (!adapter->tso_force && | |
2548 | adapter->hw.bus_type == e1000_bus_type_pci_express){ | |
66a2b0a3 JK |
2549 | switch (adapter->link_speed) { |
2550 | case SPEED_10: | |
66a2b0a3 | 2551 | case SPEED_100: |
7e6c9861 JK |
2552 | DPRINTK(PROBE,INFO, |
2553 | "10/100 speed: disabling TSO\n"); | |
2554 | netdev->features &= ~NETIF_F_TSO; | |
87ca4e5b AK |
2555 | #ifdef NETIF_F_TSO6 |
2556 | netdev->features &= ~NETIF_F_TSO6; | |
2557 | #endif | |
7e6c9861 JK |
2558 | break; |
2559 | case SPEED_1000: | |
2560 | netdev->features |= NETIF_F_TSO; | |
87ca4e5b AK |
2561 | #ifdef NETIF_F_TSO6 |
2562 | netdev->features |= NETIF_F_TSO6; | |
2563 | #endif | |
7e6c9861 JK |
2564 | break; |
2565 | default: | |
2566 | /* oops */ | |
66a2b0a3 JK |
2567 | break; |
2568 | } | |
2569 | } | |
7e6c9861 JK |
2570 | #endif |
2571 | ||
2572 | /* enable transmits in the hardware, need to do this | |
2573 | * after setting TARC0 */ | |
2574 | tctl = E1000_READ_REG(&adapter->hw, TCTL); | |
2575 | tctl |= E1000_TCTL_EN; | |
2576 | E1000_WRITE_REG(&adapter->hw, TCTL, tctl); | |
66a2b0a3 | 2577 | |
1da177e4 LT |
2578 | netif_carrier_on(netdev); |
2579 | netif_wake_queue(netdev); | |
2580 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
2581 | adapter->smartspeed = 0; | |
bb8e3311 JG |
2582 | } else { |
2583 | /* make sure the receive unit is started */ | |
2584 | if (adapter->hw.rx_needs_kicking) { | |
2585 | struct e1000_hw *hw = &adapter->hw; | |
2586 | uint32_t rctl = E1000_READ_REG(hw, RCTL); | |
2587 | E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN); | |
2588 | } | |
1da177e4 LT |
2589 | } |
2590 | } else { | |
96838a40 | 2591 | if (netif_carrier_ok(netdev)) { |
1da177e4 LT |
2592 | adapter->link_speed = 0; |
2593 | adapter->link_duplex = 0; | |
2594 | DPRINTK(LINK, INFO, "NIC Link is Down\n"); | |
2595 | netif_carrier_off(netdev); | |
2596 | netif_stop_queue(netdev); | |
2597 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
87041639 JK |
2598 | |
2599 | /* 80003ES2LAN workaround-- | |
2600 | * For packet buffer work-around on link down event; | |
2601 | * disable receives in the ISR and | |
2602 | * reset device here in the watchdog | |
2603 | */ | |
8fc897b0 | 2604 | if (adapter->hw.mac_type == e1000_80003es2lan) |
87041639 JK |
2605 | /* reset device */ |
2606 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
2607 | } |
2608 | ||
2609 | e1000_smartspeed(adapter); | |
2610 | } | |
2611 | ||
2612 | e1000_update_stats(adapter); | |
2613 | ||
2614 | adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; | |
2615 | adapter->tpt_old = adapter->stats.tpt; | |
2616 | adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old; | |
2617 | adapter->colc_old = adapter->stats.colc; | |
2618 | ||
2619 | adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old; | |
2620 | adapter->gorcl_old = adapter->stats.gorcl; | |
2621 | adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old; | |
2622 | adapter->gotcl_old = adapter->stats.gotcl; | |
2623 | ||
2624 | e1000_update_adaptive(&adapter->hw); | |
2625 | ||
f56799ea | 2626 | if (!netif_carrier_ok(netdev)) { |
581d708e | 2627 | if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) { |
1da177e4 LT |
2628 | /* We've lost link, so the controller stops DMA, |
2629 | * but we've got queued Tx work that's never going | |
2630 | * to get done, so reset controller to flush Tx. | |
2631 | * (Do the reset outside of interrupt context). */ | |
87041639 JK |
2632 | adapter->tx_timeout_count++; |
2633 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
2634 | } |
2635 | } | |
2636 | ||
1da177e4 LT |
2637 | /* Cause software interrupt to ensure rx ring is cleaned */ |
2638 | E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0); | |
2639 | ||
2648345f | 2640 | /* Force detection of hung controller every watchdog period */ |
1da177e4 LT |
2641 | adapter->detect_tx_hung = TRUE; |
2642 | ||
96838a40 | 2643 | /* With 82571 controllers, LAA may be overwritten due to controller |
868d5309 MC |
2644 | * reset from the other port. Set the appropriate LAA in RAR[0] */ |
2645 | if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present) | |
2646 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2647 | ||
1da177e4 LT |
2648 | /* Reset the timer */ |
2649 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | |
2650 | } | |
2651 | ||
835bb129 JB |
2652 | enum latency_range { |
2653 | lowest_latency = 0, | |
2654 | low_latency = 1, | |
2655 | bulk_latency = 2, | |
2656 | latency_invalid = 255 | |
2657 | }; | |
2658 | ||
2659 | /** | |
2660 | * e1000_update_itr - update the dynamic ITR value based on statistics | |
2661 | * Stores a new ITR value based on packets and byte | |
2662 | * counts during the last interrupt. The advantage of per interrupt | |
2663 | * computation is faster updates and more accurate ITR for the current | |
2664 | * traffic pattern. Constants in this function were computed | |
2665 | * based on theoretical maximum wire speed and thresholds were set based | |
2666 | * on testing data as well as attempting to minimize response time | |
2667 | * while increasing bulk throughput. | |
2668 | * this functionality is controlled by the InterruptThrottleRate module | |
2669 | * parameter (see e1000_param.c) | |
2670 | * @adapter: pointer to adapter | |
2671 | * @itr_setting: current adapter->itr | |
2672 | * @packets: the number of packets during this measurement interval | |
2673 | * @bytes: the number of bytes during this measurement interval | |
2674 | **/ | |
2675 | static unsigned int e1000_update_itr(struct e1000_adapter *adapter, | |
2676 | uint16_t itr_setting, | |
2677 | int packets, | |
2678 | int bytes) | |
2679 | { | |
2680 | unsigned int retval = itr_setting; | |
2681 | struct e1000_hw *hw = &adapter->hw; | |
2682 | ||
2683 | if (unlikely(hw->mac_type < e1000_82540)) | |
2684 | goto update_itr_done; | |
2685 | ||
2686 | if (packets == 0) | |
2687 | goto update_itr_done; | |
2688 | ||
835bb129 JB |
2689 | switch (itr_setting) { |
2690 | case lowest_latency: | |
2b65326e JB |
2691 | /* jumbo frames get bulk treatment*/ |
2692 | if (bytes/packets > 8000) | |
2693 | retval = bulk_latency; | |
2694 | else if ((packets < 5) && (bytes > 512)) | |
835bb129 JB |
2695 | retval = low_latency; |
2696 | break; | |
2697 | case low_latency: /* 50 usec aka 20000 ints/s */ | |
2698 | if (bytes > 10000) { | |
2b65326e JB |
2699 | /* jumbo frames need bulk latency setting */ |
2700 | if (bytes/packets > 8000) | |
2701 | retval = bulk_latency; | |
2702 | else if ((packets < 10) || ((bytes/packets) > 1200)) | |
835bb129 JB |
2703 | retval = bulk_latency; |
2704 | else if ((packets > 35)) | |
2705 | retval = lowest_latency; | |
2b65326e JB |
2706 | } else if (bytes/packets > 2000) |
2707 | retval = bulk_latency; | |
2708 | else if (packets <= 2 && bytes < 512) | |
835bb129 JB |
2709 | retval = lowest_latency; |
2710 | break; | |
2711 | case bulk_latency: /* 250 usec aka 4000 ints/s */ | |
2712 | if (bytes > 25000) { | |
2713 | if (packets > 35) | |
2714 | retval = low_latency; | |
2b65326e JB |
2715 | } else if (bytes < 6000) { |
2716 | retval = low_latency; | |
835bb129 JB |
2717 | } |
2718 | break; | |
2719 | } | |
2720 | ||
2721 | update_itr_done: | |
2722 | return retval; | |
2723 | } | |
2724 | ||
2725 | static void e1000_set_itr(struct e1000_adapter *adapter) | |
2726 | { | |
2727 | struct e1000_hw *hw = &adapter->hw; | |
2728 | uint16_t current_itr; | |
2729 | uint32_t new_itr = adapter->itr; | |
2730 | ||
2731 | if (unlikely(hw->mac_type < e1000_82540)) | |
2732 | return; | |
2733 | ||
2734 | /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ | |
2735 | if (unlikely(adapter->link_speed != SPEED_1000)) { | |
2736 | current_itr = 0; | |
2737 | new_itr = 4000; | |
2738 | goto set_itr_now; | |
2739 | } | |
2740 | ||
2741 | adapter->tx_itr = e1000_update_itr(adapter, | |
2742 | adapter->tx_itr, | |
2743 | adapter->total_tx_packets, | |
2744 | adapter->total_tx_bytes); | |
2b65326e JB |
2745 | /* conservative mode (itr 3) eliminates the lowest_latency setting */ |
2746 | if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) | |
2747 | adapter->tx_itr = low_latency; | |
2748 | ||
835bb129 JB |
2749 | adapter->rx_itr = e1000_update_itr(adapter, |
2750 | adapter->rx_itr, | |
2751 | adapter->total_rx_packets, | |
2752 | adapter->total_rx_bytes); | |
2b65326e JB |
2753 | /* conservative mode (itr 3) eliminates the lowest_latency setting */ |
2754 | if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) | |
2755 | adapter->rx_itr = low_latency; | |
835bb129 JB |
2756 | |
2757 | current_itr = max(adapter->rx_itr, adapter->tx_itr); | |
2758 | ||
835bb129 JB |
2759 | switch (current_itr) { |
2760 | /* counts and packets in update_itr are dependent on these numbers */ | |
2761 | case lowest_latency: | |
2762 | new_itr = 70000; | |
2763 | break; | |
2764 | case low_latency: | |
2765 | new_itr = 20000; /* aka hwitr = ~200 */ | |
2766 | break; | |
2767 | case bulk_latency: | |
2768 | new_itr = 4000; | |
2769 | break; | |
2770 | default: | |
2771 | break; | |
2772 | } | |
2773 | ||
2774 | set_itr_now: | |
2775 | if (new_itr != adapter->itr) { | |
2776 | /* this attempts to bias the interrupt rate towards Bulk | |
2777 | * by adding intermediate steps when interrupt rate is | |
2778 | * increasing */ | |
2779 | new_itr = new_itr > adapter->itr ? | |
2780 | min(adapter->itr + (new_itr >> 2), new_itr) : | |
2781 | new_itr; | |
2782 | adapter->itr = new_itr; | |
2783 | E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256)); | |
2784 | } | |
2785 | ||
2786 | return; | |
2787 | } | |
2788 | ||
1da177e4 LT |
2789 | #define E1000_TX_FLAGS_CSUM 0x00000001 |
2790 | #define E1000_TX_FLAGS_VLAN 0x00000002 | |
2791 | #define E1000_TX_FLAGS_TSO 0x00000004 | |
2d7edb92 | 2792 | #define E1000_TX_FLAGS_IPV4 0x00000008 |
1da177e4 LT |
2793 | #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 |
2794 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 | |
2795 | ||
e619d523 | 2796 | static int |
581d708e MC |
2797 | e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2798 | struct sk_buff *skb) | |
1da177e4 LT |
2799 | { |
2800 | #ifdef NETIF_F_TSO | |
2801 | struct e1000_context_desc *context_desc; | |
545c67c0 | 2802 | struct e1000_buffer *buffer_info; |
1da177e4 LT |
2803 | unsigned int i; |
2804 | uint32_t cmd_length = 0; | |
2d7edb92 | 2805 | uint16_t ipcse = 0, tucse, mss; |
1da177e4 LT |
2806 | uint8_t ipcss, ipcso, tucss, tucso, hdr_len; |
2807 | int err; | |
2808 | ||
89114afd | 2809 | if (skb_is_gso(skb)) { |
1da177e4 LT |
2810 | if (skb_header_cloned(skb)) { |
2811 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); | |
2812 | if (err) | |
2813 | return err; | |
2814 | } | |
2815 | ||
2816 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | |
7967168c | 2817 | mss = skb_shinfo(skb)->gso_size; |
60828236 | 2818 | if (skb->protocol == htons(ETH_P_IP)) { |
2d7edb92 MC |
2819 | skb->nh.iph->tot_len = 0; |
2820 | skb->nh.iph->check = 0; | |
2821 | skb->h.th->check = | |
2822 | ~csum_tcpudp_magic(skb->nh.iph->saddr, | |
2823 | skb->nh.iph->daddr, | |
2824 | 0, | |
2825 | IPPROTO_TCP, | |
2826 | 0); | |
2827 | cmd_length = E1000_TXD_CMD_IP; | |
2828 | ipcse = skb->h.raw - skb->data - 1; | |
87ca4e5b | 2829 | #ifdef NETIF_F_TSO6 |
e15fdd03 | 2830 | } else if (skb->protocol == htons(ETH_P_IPV6)) { |
2d7edb92 MC |
2831 | skb->nh.ipv6h->payload_len = 0; |
2832 | skb->h.th->check = | |
2833 | ~csum_ipv6_magic(&skb->nh.ipv6h->saddr, | |
2834 | &skb->nh.ipv6h->daddr, | |
2835 | 0, | |
2836 | IPPROTO_TCP, | |
2837 | 0); | |
2838 | ipcse = 0; | |
2839 | #endif | |
2840 | } | |
1da177e4 LT |
2841 | ipcss = skb->nh.raw - skb->data; |
2842 | ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data; | |
1da177e4 LT |
2843 | tucss = skb->h.raw - skb->data; |
2844 | tucso = (void *)&(skb->h.th->check) - (void *)skb->data; | |
2845 | tucse = 0; | |
2846 | ||
2847 | cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | | |
2d7edb92 | 2848 | E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); |
1da177e4 | 2849 | |
581d708e MC |
2850 | i = tx_ring->next_to_use; |
2851 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); | |
545c67c0 | 2852 | buffer_info = &tx_ring->buffer_info[i]; |
1da177e4 LT |
2853 | |
2854 | context_desc->lower_setup.ip_fields.ipcss = ipcss; | |
2855 | context_desc->lower_setup.ip_fields.ipcso = ipcso; | |
2856 | context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); | |
2857 | context_desc->upper_setup.tcp_fields.tucss = tucss; | |
2858 | context_desc->upper_setup.tcp_fields.tucso = tucso; | |
2859 | context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); | |
2860 | context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); | |
2861 | context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; | |
2862 | context_desc->cmd_and_length = cpu_to_le32(cmd_length); | |
2863 | ||
545c67c0 | 2864 | buffer_info->time_stamp = jiffies; |
a9ebadd6 | 2865 | buffer_info->next_to_watch = i; |
545c67c0 | 2866 | |
581d708e MC |
2867 | if (++i == tx_ring->count) i = 0; |
2868 | tx_ring->next_to_use = i; | |
1da177e4 | 2869 | |
8241e35e | 2870 | return TRUE; |
1da177e4 LT |
2871 | } |
2872 | #endif | |
2873 | ||
8241e35e | 2874 | return FALSE; |
1da177e4 LT |
2875 | } |
2876 | ||
e619d523 | 2877 | static boolean_t |
581d708e MC |
2878 | e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2879 | struct sk_buff *skb) | |
1da177e4 LT |
2880 | { |
2881 | struct e1000_context_desc *context_desc; | |
545c67c0 | 2882 | struct e1000_buffer *buffer_info; |
1da177e4 LT |
2883 | unsigned int i; |
2884 | uint8_t css; | |
2885 | ||
84fa7933 | 2886 | if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { |
1da177e4 LT |
2887 | css = skb->h.raw - skb->data; |
2888 | ||
581d708e | 2889 | i = tx_ring->next_to_use; |
545c67c0 | 2890 | buffer_info = &tx_ring->buffer_info[i]; |
581d708e | 2891 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); |
1da177e4 LT |
2892 | |
2893 | context_desc->upper_setup.tcp_fields.tucss = css; | |
ff1dcadb | 2894 | context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset; |
1da177e4 LT |
2895 | context_desc->upper_setup.tcp_fields.tucse = 0; |
2896 | context_desc->tcp_seg_setup.data = 0; | |
2897 | context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT); | |
2898 | ||
545c67c0 | 2899 | buffer_info->time_stamp = jiffies; |
a9ebadd6 | 2900 | buffer_info->next_to_watch = i; |
545c67c0 | 2901 | |
581d708e MC |
2902 | if (unlikely(++i == tx_ring->count)) i = 0; |
2903 | tx_ring->next_to_use = i; | |
1da177e4 LT |
2904 | |
2905 | return TRUE; | |
2906 | } | |
2907 | ||
2908 | return FALSE; | |
2909 | } | |
2910 | ||
2911 | #define E1000_MAX_TXD_PWR 12 | |
2912 | #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR) | |
2913 | ||
e619d523 | 2914 | static int |
581d708e MC |
2915 | e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2916 | struct sk_buff *skb, unsigned int first, unsigned int max_per_txd, | |
2917 | unsigned int nr_frags, unsigned int mss) | |
1da177e4 | 2918 | { |
1da177e4 LT |
2919 | struct e1000_buffer *buffer_info; |
2920 | unsigned int len = skb->len; | |
2921 | unsigned int offset = 0, size, count = 0, i; | |
2922 | unsigned int f; | |
2923 | len -= skb->data_len; | |
2924 | ||
2925 | i = tx_ring->next_to_use; | |
2926 | ||
96838a40 | 2927 | while (len) { |
1da177e4 LT |
2928 | buffer_info = &tx_ring->buffer_info[i]; |
2929 | size = min(len, max_per_txd); | |
2930 | #ifdef NETIF_F_TSO | |
fd803241 JK |
2931 | /* Workaround for Controller erratum -- |
2932 | * descriptor for non-tso packet in a linear SKB that follows a | |
2933 | * tso gets written back prematurely before the data is fully | |
0f15a8fa | 2934 | * DMA'd to the controller */ |
fd803241 | 2935 | if (!skb->data_len && tx_ring->last_tx_tso && |
89114afd | 2936 | !skb_is_gso(skb)) { |
fd803241 JK |
2937 | tx_ring->last_tx_tso = 0; |
2938 | size -= 4; | |
2939 | } | |
2940 | ||
1da177e4 LT |
2941 | /* Workaround for premature desc write-backs |
2942 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 2943 | if (unlikely(mss && !nr_frags && size == len && size > 8)) |
1da177e4 LT |
2944 | size -= 4; |
2945 | #endif | |
97338bde MC |
2946 | /* work-around for errata 10 and it applies |
2947 | * to all controllers in PCI-X mode | |
2948 | * The fix is to make sure that the first descriptor of a | |
2949 | * packet is smaller than 2048 - 16 - 16 (or 2016) bytes | |
2950 | */ | |
96838a40 | 2951 | if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && |
97338bde MC |
2952 | (size > 2015) && count == 0)) |
2953 | size = 2015; | |
96838a40 | 2954 | |
1da177e4 LT |
2955 | /* Workaround for potential 82544 hang in PCI-X. Avoid |
2956 | * terminating buffers within evenly-aligned dwords. */ | |
96838a40 | 2957 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
2958 | !((unsigned long)(skb->data + offset + size - 1) & 4) && |
2959 | size > 4)) | |
2960 | size -= 4; | |
2961 | ||
2962 | buffer_info->length = size; | |
2963 | buffer_info->dma = | |
2964 | pci_map_single(adapter->pdev, | |
2965 | skb->data + offset, | |
2966 | size, | |
2967 | PCI_DMA_TODEVICE); | |
2968 | buffer_info->time_stamp = jiffies; | |
a9ebadd6 | 2969 | buffer_info->next_to_watch = i; |
1da177e4 LT |
2970 | |
2971 | len -= size; | |
2972 | offset += size; | |
2973 | count++; | |
96838a40 | 2974 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2975 | } |
2976 | ||
96838a40 | 2977 | for (f = 0; f < nr_frags; f++) { |
1da177e4 LT |
2978 | struct skb_frag_struct *frag; |
2979 | ||
2980 | frag = &skb_shinfo(skb)->frags[f]; | |
2981 | len = frag->size; | |
2982 | offset = frag->page_offset; | |
2983 | ||
96838a40 | 2984 | while (len) { |
1da177e4 LT |
2985 | buffer_info = &tx_ring->buffer_info[i]; |
2986 | size = min(len, max_per_txd); | |
2987 | #ifdef NETIF_F_TSO | |
2988 | /* Workaround for premature desc write-backs | |
2989 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 2990 | if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8)) |
1da177e4 LT |
2991 | size -= 4; |
2992 | #endif | |
2993 | /* Workaround for potential 82544 hang in PCI-X. | |
2994 | * Avoid terminating buffers within evenly-aligned | |
2995 | * dwords. */ | |
96838a40 | 2996 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
2997 | !((unsigned long)(frag->page+offset+size-1) & 4) && |
2998 | size > 4)) | |
2999 | size -= 4; | |
3000 | ||
3001 | buffer_info->length = size; | |
3002 | buffer_info->dma = | |
3003 | pci_map_page(adapter->pdev, | |
3004 | frag->page, | |
3005 | offset, | |
3006 | size, | |
3007 | PCI_DMA_TODEVICE); | |
3008 | buffer_info->time_stamp = jiffies; | |
a9ebadd6 | 3009 | buffer_info->next_to_watch = i; |
1da177e4 LT |
3010 | |
3011 | len -= size; | |
3012 | offset += size; | |
3013 | count++; | |
96838a40 | 3014 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
3015 | } |
3016 | } | |
3017 | ||
3018 | i = (i == 0) ? tx_ring->count - 1 : i - 1; | |
3019 | tx_ring->buffer_info[i].skb = skb; | |
3020 | tx_ring->buffer_info[first].next_to_watch = i; | |
3021 | ||
3022 | return count; | |
3023 | } | |
3024 | ||
e619d523 | 3025 | static void |
581d708e MC |
3026 | e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
3027 | int tx_flags, int count) | |
1da177e4 | 3028 | { |
1da177e4 LT |
3029 | struct e1000_tx_desc *tx_desc = NULL; |
3030 | struct e1000_buffer *buffer_info; | |
3031 | uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; | |
3032 | unsigned int i; | |
3033 | ||
96838a40 | 3034 | if (likely(tx_flags & E1000_TX_FLAGS_TSO)) { |
1da177e4 LT |
3035 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | |
3036 | E1000_TXD_CMD_TSE; | |
2d7edb92 MC |
3037 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; |
3038 | ||
96838a40 | 3039 | if (likely(tx_flags & E1000_TX_FLAGS_IPV4)) |
2d7edb92 | 3040 | txd_upper |= E1000_TXD_POPTS_IXSM << 8; |
1da177e4 LT |
3041 | } |
3042 | ||
96838a40 | 3043 | if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) { |
1da177e4 LT |
3044 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; |
3045 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; | |
3046 | } | |
3047 | ||
96838a40 | 3048 | if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) { |
1da177e4 LT |
3049 | txd_lower |= E1000_TXD_CMD_VLE; |
3050 | txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); | |
3051 | } | |
3052 | ||
3053 | i = tx_ring->next_to_use; | |
3054 | ||
96838a40 | 3055 | while (count--) { |
1da177e4 LT |
3056 | buffer_info = &tx_ring->buffer_info[i]; |
3057 | tx_desc = E1000_TX_DESC(*tx_ring, i); | |
3058 | tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
3059 | tx_desc->lower.data = | |
3060 | cpu_to_le32(txd_lower | buffer_info->length); | |
3061 | tx_desc->upper.data = cpu_to_le32(txd_upper); | |
96838a40 | 3062 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
3063 | } |
3064 | ||
3065 | tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); | |
3066 | ||
3067 | /* Force memory writes to complete before letting h/w | |
3068 | * know there are new descriptors to fetch. (Only | |
3069 | * applicable for weak-ordered memory model archs, | |
3070 | * such as IA-64). */ | |
3071 | wmb(); | |
3072 | ||
3073 | tx_ring->next_to_use = i; | |
581d708e | 3074 | writel(i, adapter->hw.hw_addr + tx_ring->tdt); |
2ce9047f JB |
3075 | /* we need this if more than one processor can write to our tail |
3076 | * at a time, it syncronizes IO on IA64/Altix systems */ | |
3077 | mmiowb(); | |
1da177e4 LT |
3078 | } |
3079 | ||
3080 | /** | |
3081 | * 82547 workaround to avoid controller hang in half-duplex environment. | |
3082 | * The workaround is to avoid queuing a large packet that would span | |
3083 | * the internal Tx FIFO ring boundary by notifying the stack to resend | |
3084 | * the packet at a later time. This gives the Tx FIFO an opportunity to | |
3085 | * flush all packets. When that occurs, we reset the Tx FIFO pointers | |
3086 | * to the beginning of the Tx FIFO. | |
3087 | **/ | |
3088 | ||
3089 | #define E1000_FIFO_HDR 0x10 | |
3090 | #define E1000_82547_PAD_LEN 0x3E0 | |
3091 | ||
e619d523 | 3092 | static int |
1da177e4 LT |
3093 | e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb) |
3094 | { | |
3095 | uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; | |
3096 | uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR; | |
3097 | ||
3098 | E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR); | |
3099 | ||
96838a40 | 3100 | if (adapter->link_duplex != HALF_DUPLEX) |
1da177e4 LT |
3101 | goto no_fifo_stall_required; |
3102 | ||
96838a40 | 3103 | if (atomic_read(&adapter->tx_fifo_stall)) |
1da177e4 LT |
3104 | return 1; |
3105 | ||
96838a40 | 3106 | if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) { |
1da177e4 LT |
3107 | atomic_set(&adapter->tx_fifo_stall, 1); |
3108 | return 1; | |
3109 | } | |
3110 | ||
3111 | no_fifo_stall_required: | |
3112 | adapter->tx_fifo_head += skb_fifo_len; | |
96838a40 | 3113 | if (adapter->tx_fifo_head >= adapter->tx_fifo_size) |
1da177e4 LT |
3114 | adapter->tx_fifo_head -= adapter->tx_fifo_size; |
3115 | return 0; | |
3116 | } | |
3117 | ||
2d7edb92 | 3118 | #define MINIMUM_DHCP_PACKET_SIZE 282 |
e619d523 | 3119 | static int |
2d7edb92 MC |
3120 | e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb) |
3121 | { | |
3122 | struct e1000_hw *hw = &adapter->hw; | |
3123 | uint16_t length, offset; | |
96838a40 JB |
3124 | if (vlan_tx_tag_present(skb)) { |
3125 | if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && | |
2d7edb92 MC |
3126 | ( adapter->hw.mng_cookie.status & |
3127 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) ) | |
3128 | return 0; | |
3129 | } | |
20a44028 | 3130 | if (skb->len > MINIMUM_DHCP_PACKET_SIZE) { |
2d7edb92 | 3131 | struct ethhdr *eth = (struct ethhdr *) skb->data; |
96838a40 JB |
3132 | if ((htons(ETH_P_IP) == eth->h_proto)) { |
3133 | const struct iphdr *ip = | |
2d7edb92 | 3134 | (struct iphdr *)((uint8_t *)skb->data+14); |
96838a40 JB |
3135 | if (IPPROTO_UDP == ip->protocol) { |
3136 | struct udphdr *udp = | |
3137 | (struct udphdr *)((uint8_t *)ip + | |
2d7edb92 | 3138 | (ip->ihl << 2)); |
96838a40 | 3139 | if (ntohs(udp->dest) == 67) { |
2d7edb92 MC |
3140 | offset = (uint8_t *)udp + 8 - skb->data; |
3141 | length = skb->len - offset; | |
3142 | ||
3143 | return e1000_mng_write_dhcp_info(hw, | |
96838a40 | 3144 | (uint8_t *)udp + 8, |
2d7edb92 MC |
3145 | length); |
3146 | } | |
3147 | } | |
3148 | } | |
3149 | } | |
3150 | return 0; | |
3151 | } | |
3152 | ||
65c7973f JB |
3153 | static int __e1000_maybe_stop_tx(struct net_device *netdev, int size) |
3154 | { | |
3155 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
3156 | struct e1000_tx_ring *tx_ring = adapter->tx_ring; | |
3157 | ||
3158 | netif_stop_queue(netdev); | |
3159 | /* Herbert's original patch had: | |
3160 | * smp_mb__after_netif_stop_queue(); | |
3161 | * but since that doesn't exist yet, just open code it. */ | |
3162 | smp_mb(); | |
3163 | ||
3164 | /* We need to check again in a case another CPU has just | |
3165 | * made room available. */ | |
3166 | if (likely(E1000_DESC_UNUSED(tx_ring) < size)) | |
3167 | return -EBUSY; | |
3168 | ||
3169 | /* A reprieve! */ | |
3170 | netif_start_queue(netdev); | |
fcfb1224 | 3171 | ++adapter->restart_queue; |
65c7973f JB |
3172 | return 0; |
3173 | } | |
3174 | ||
3175 | static int e1000_maybe_stop_tx(struct net_device *netdev, | |
3176 | struct e1000_tx_ring *tx_ring, int size) | |
3177 | { | |
3178 | if (likely(E1000_DESC_UNUSED(tx_ring) >= size)) | |
3179 | return 0; | |
3180 | return __e1000_maybe_stop_tx(netdev, size); | |
3181 | } | |
3182 | ||
1da177e4 LT |
3183 | #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) |
3184 | static int | |
3185 | e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |
3186 | { | |
60490fe0 | 3187 | struct e1000_adapter *adapter = netdev_priv(netdev); |
581d708e | 3188 | struct e1000_tx_ring *tx_ring; |
1da177e4 LT |
3189 | unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD; |
3190 | unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; | |
3191 | unsigned int tx_flags = 0; | |
3192 | unsigned int len = skb->len; | |
3193 | unsigned long flags; | |
3194 | unsigned int nr_frags = 0; | |
3195 | unsigned int mss = 0; | |
3196 | int count = 0; | |
76c224bc | 3197 | int tso; |
1da177e4 LT |
3198 | unsigned int f; |
3199 | len -= skb->data_len; | |
3200 | ||
65c7973f JB |
3201 | /* This goes back to the question of how to logically map a tx queue |
3202 | * to a flow. Right now, performance is impacted slightly negatively | |
3203 | * if using multiple tx queues. If the stack breaks away from a | |
3204 | * single qdisc implementation, we can look at this again. */ | |
581d708e | 3205 | tx_ring = adapter->tx_ring; |
24025e4e | 3206 | |
581d708e | 3207 | if (unlikely(skb->len <= 0)) { |
1da177e4 LT |
3208 | dev_kfree_skb_any(skb); |
3209 | return NETDEV_TX_OK; | |
3210 | } | |
3211 | ||
032fe6e9 JB |
3212 | /* 82571 and newer doesn't need the workaround that limited descriptor |
3213 | * length to 4kB */ | |
3214 | if (adapter->hw.mac_type >= e1000_82571) | |
3215 | max_per_txd = 8192; | |
3216 | ||
1da177e4 | 3217 | #ifdef NETIF_F_TSO |
7967168c | 3218 | mss = skb_shinfo(skb)->gso_size; |
76c224bc | 3219 | /* The controller does a simple calculation to |
1da177e4 LT |
3220 | * make sure there is enough room in the FIFO before |
3221 | * initiating the DMA for each buffer. The calc is: | |
3222 | * 4 = ceil(buffer len/mss). To make sure we don't | |
3223 | * overrun the FIFO, adjust the max buffer len if mss | |
3224 | * drops. */ | |
96838a40 | 3225 | if (mss) { |
9a3056da | 3226 | uint8_t hdr_len; |
1da177e4 LT |
3227 | max_per_txd = min(mss << 2, max_per_txd); |
3228 | max_txd_pwr = fls(max_per_txd) - 1; | |
9a3056da | 3229 | |
90fb5135 AK |
3230 | /* TSO Workaround for 82571/2/3 Controllers -- if skb->data |
3231 | * points to just header, pull a few bytes of payload from | |
3232 | * frags into skb->data */ | |
9a3056da | 3233 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); |
9f687888 JK |
3234 | if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) { |
3235 | switch (adapter->hw.mac_type) { | |
3236 | unsigned int pull_size; | |
3237 | case e1000_82571: | |
3238 | case e1000_82572: | |
3239 | case e1000_82573: | |
cd94dd0b | 3240 | case e1000_ich8lan: |
9f687888 JK |
3241 | pull_size = min((unsigned int)4, skb->data_len); |
3242 | if (!__pskb_pull_tail(skb, pull_size)) { | |
a5eafce2 | 3243 | DPRINTK(DRV, ERR, |
9f687888 JK |
3244 | "__pskb_pull_tail failed.\n"); |
3245 | dev_kfree_skb_any(skb); | |
749dfc70 | 3246 | return NETDEV_TX_OK; |
9f687888 JK |
3247 | } |
3248 | len = skb->len - skb->data_len; | |
3249 | break; | |
3250 | default: | |
3251 | /* do nothing */ | |
3252 | break; | |
d74bbd3b | 3253 | } |
9a3056da | 3254 | } |
1da177e4 LT |
3255 | } |
3256 | ||
9a3056da | 3257 | /* reserve a descriptor for the offload context */ |
84fa7933 | 3258 | if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) |
1da177e4 | 3259 | count++; |
2648345f | 3260 | count++; |
1da177e4 | 3261 | #else |
84fa7933 | 3262 | if (skb->ip_summed == CHECKSUM_PARTIAL) |
1da177e4 LT |
3263 | count++; |
3264 | #endif | |
fd803241 JK |
3265 | |
3266 | #ifdef NETIF_F_TSO | |
3267 | /* Controller Erratum workaround */ | |
89114afd | 3268 | if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb)) |
fd803241 JK |
3269 | count++; |
3270 | #endif | |
3271 | ||
1da177e4 LT |
3272 | count += TXD_USE_COUNT(len, max_txd_pwr); |
3273 | ||
96838a40 | 3274 | if (adapter->pcix_82544) |
1da177e4 LT |
3275 | count++; |
3276 | ||
96838a40 | 3277 | /* work-around for errata 10 and it applies to all controllers |
97338bde MC |
3278 | * in PCI-X mode, so add one more descriptor to the count |
3279 | */ | |
96838a40 | 3280 | if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && |
97338bde MC |
3281 | (len > 2015))) |
3282 | count++; | |
3283 | ||
1da177e4 | 3284 | nr_frags = skb_shinfo(skb)->nr_frags; |
96838a40 | 3285 | for (f = 0; f < nr_frags; f++) |
1da177e4 LT |
3286 | count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size, |
3287 | max_txd_pwr); | |
96838a40 | 3288 | if (adapter->pcix_82544) |
1da177e4 LT |
3289 | count += nr_frags; |
3290 | ||
0f15a8fa JK |
3291 | |
3292 | if (adapter->hw.tx_pkt_filtering && | |
3293 | (adapter->hw.mac_type == e1000_82573)) | |
2d7edb92 MC |
3294 | e1000_transfer_dhcp_info(adapter, skb); |
3295 | ||
581d708e MC |
3296 | local_irq_save(flags); |
3297 | if (!spin_trylock(&tx_ring->tx_lock)) { | |
3298 | /* Collision - tell upper layer to requeue */ | |
3299 | local_irq_restore(flags); | |
3300 | return NETDEV_TX_LOCKED; | |
3301 | } | |
1da177e4 LT |
3302 | |
3303 | /* need: count + 2 desc gap to keep tail from touching | |
3304 | * head, otherwise try next time */ | |
65c7973f | 3305 | if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) { |
581d708e | 3306 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3307 | return NETDEV_TX_BUSY; |
3308 | } | |
3309 | ||
96838a40 JB |
3310 | if (unlikely(adapter->hw.mac_type == e1000_82547)) { |
3311 | if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) { | |
1da177e4 | 3312 | netif_stop_queue(netdev); |
1314bbf3 | 3313 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); |
581d708e | 3314 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3315 | return NETDEV_TX_BUSY; |
3316 | } | |
3317 | } | |
3318 | ||
96838a40 | 3319 | if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) { |
1da177e4 LT |
3320 | tx_flags |= E1000_TX_FLAGS_VLAN; |
3321 | tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); | |
3322 | } | |
3323 | ||
581d708e | 3324 | first = tx_ring->next_to_use; |
96838a40 | 3325 | |
581d708e | 3326 | tso = e1000_tso(adapter, tx_ring, skb); |
1da177e4 LT |
3327 | if (tso < 0) { |
3328 | dev_kfree_skb_any(skb); | |
581d708e | 3329 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3330 | return NETDEV_TX_OK; |
3331 | } | |
3332 | ||
fd803241 JK |
3333 | if (likely(tso)) { |
3334 | tx_ring->last_tx_tso = 1; | |
1da177e4 | 3335 | tx_flags |= E1000_TX_FLAGS_TSO; |
fd803241 | 3336 | } else if (likely(e1000_tx_csum(adapter, tx_ring, skb))) |
1da177e4 LT |
3337 | tx_flags |= E1000_TX_FLAGS_CSUM; |
3338 | ||
2d7edb92 | 3339 | /* Old method was to assume IPv4 packet by default if TSO was enabled. |
868d5309 | 3340 | * 82571 hardware supports TSO capabilities for IPv6 as well... |
2d7edb92 | 3341 | * no longer assume, we must. */ |
60828236 | 3342 | if (likely(skb->protocol == htons(ETH_P_IP))) |
2d7edb92 MC |
3343 | tx_flags |= E1000_TX_FLAGS_IPV4; |
3344 | ||
581d708e MC |
3345 | e1000_tx_queue(adapter, tx_ring, tx_flags, |
3346 | e1000_tx_map(adapter, tx_ring, skb, first, | |
3347 | max_per_txd, nr_frags, mss)); | |
1da177e4 LT |
3348 | |
3349 | netdev->trans_start = jiffies; | |
3350 | ||
3351 | /* Make sure there is space in the ring for the next send. */ | |
65c7973f | 3352 | e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2); |
1da177e4 | 3353 | |
581d708e | 3354 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3355 | return NETDEV_TX_OK; |
3356 | } | |
3357 | ||
3358 | /** | |
3359 | * e1000_tx_timeout - Respond to a Tx Hang | |
3360 | * @netdev: network interface device structure | |
3361 | **/ | |
3362 | ||
3363 | static void | |
3364 | e1000_tx_timeout(struct net_device *netdev) | |
3365 | { | |
60490fe0 | 3366 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
3367 | |
3368 | /* Do the reset outside of interrupt context */ | |
87041639 JK |
3369 | adapter->tx_timeout_count++; |
3370 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
3371 | } |
3372 | ||
3373 | static void | |
65f27f38 | 3374 | e1000_reset_task(struct work_struct *work) |
1da177e4 | 3375 | { |
65f27f38 DH |
3376 | struct e1000_adapter *adapter = |
3377 | container_of(work, struct e1000_adapter, reset_task); | |
1da177e4 | 3378 | |
2db10a08 | 3379 | e1000_reinit_locked(adapter); |
1da177e4 LT |
3380 | } |
3381 | ||
3382 | /** | |
3383 | * e1000_get_stats - Get System Network Statistics | |
3384 | * @netdev: network interface device structure | |
3385 | * | |
3386 | * Returns the address of the device statistics structure. | |
3387 | * The statistics are actually updated from the timer callback. | |
3388 | **/ | |
3389 | ||
3390 | static struct net_device_stats * | |
3391 | e1000_get_stats(struct net_device *netdev) | |
3392 | { | |
60490fe0 | 3393 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3394 | |
6b7660cd | 3395 | /* only return the current stats */ |
1da177e4 LT |
3396 | return &adapter->net_stats; |
3397 | } | |
3398 | ||
3399 | /** | |
3400 | * e1000_change_mtu - Change the Maximum Transfer Unit | |
3401 | * @netdev: network interface device structure | |
3402 | * @new_mtu: new value for maximum frame size | |
3403 | * | |
3404 | * Returns 0 on success, negative on failure | |
3405 | **/ | |
3406 | ||
3407 | static int | |
3408 | e1000_change_mtu(struct net_device *netdev, int new_mtu) | |
3409 | { | |
60490fe0 | 3410 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3411 | int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; |
85b22eb6 | 3412 | uint16_t eeprom_data = 0; |
1da177e4 | 3413 | |
96838a40 JB |
3414 | if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) || |
3415 | (max_frame > MAX_JUMBO_FRAME_SIZE)) { | |
3416 | DPRINTK(PROBE, ERR, "Invalid MTU setting\n"); | |
1da177e4 | 3417 | return -EINVAL; |
2d7edb92 | 3418 | } |
1da177e4 | 3419 | |
997f5cbd JK |
3420 | /* Adapter-specific max frame size limits. */ |
3421 | switch (adapter->hw.mac_type) { | |
9e2feace | 3422 | case e1000_undefined ... e1000_82542_rev2_1: |
cd94dd0b | 3423 | case e1000_ich8lan: |
997f5cbd JK |
3424 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { |
3425 | DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n"); | |
2d7edb92 | 3426 | return -EINVAL; |
2d7edb92 | 3427 | } |
997f5cbd | 3428 | break; |
85b22eb6 | 3429 | case e1000_82573: |
249d71d6 BA |
3430 | /* Jumbo Frames not supported if: |
3431 | * - this is not an 82573L device | |
3432 | * - ASPM is enabled in any way (0x1A bits 3:2) */ | |
85b22eb6 JK |
3433 | e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1, |
3434 | &eeprom_data); | |
249d71d6 BA |
3435 | if ((adapter->hw.device_id != E1000_DEV_ID_82573L) || |
3436 | (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) { | |
85b22eb6 JK |
3437 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { |
3438 | DPRINTK(PROBE, ERR, | |
3439 | "Jumbo Frames not supported.\n"); | |
3440 | return -EINVAL; | |
3441 | } | |
3442 | break; | |
3443 | } | |
249d71d6 BA |
3444 | /* ERT will be enabled later to enable wire speed receives */ |
3445 | ||
85b22eb6 | 3446 | /* fall through to get support */ |
997f5cbd JK |
3447 | case e1000_82571: |
3448 | case e1000_82572: | |
87041639 | 3449 | case e1000_80003es2lan: |
997f5cbd JK |
3450 | #define MAX_STD_JUMBO_FRAME_SIZE 9234 |
3451 | if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) { | |
3452 | DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n"); | |
3453 | return -EINVAL; | |
3454 | } | |
3455 | break; | |
3456 | default: | |
3457 | /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */ | |
3458 | break; | |
1da177e4 LT |
3459 | } |
3460 | ||
87f5032e | 3461 | /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN |
9e2feace AK |
3462 | * means we reserve 2 more, this pushes us to allocate from the next |
3463 | * larger slab size | |
3464 | * i.e. RXBUFFER_2048 --> size-4096 slab */ | |
3465 | ||
3466 | if (max_frame <= E1000_RXBUFFER_256) | |
3467 | adapter->rx_buffer_len = E1000_RXBUFFER_256; | |
3468 | else if (max_frame <= E1000_RXBUFFER_512) | |
3469 | adapter->rx_buffer_len = E1000_RXBUFFER_512; | |
3470 | else if (max_frame <= E1000_RXBUFFER_1024) | |
3471 | adapter->rx_buffer_len = E1000_RXBUFFER_1024; | |
3472 | else if (max_frame <= E1000_RXBUFFER_2048) | |
3473 | adapter->rx_buffer_len = E1000_RXBUFFER_2048; | |
3474 | else if (max_frame <= E1000_RXBUFFER_4096) | |
3475 | adapter->rx_buffer_len = E1000_RXBUFFER_4096; | |
3476 | else if (max_frame <= E1000_RXBUFFER_8192) | |
3477 | adapter->rx_buffer_len = E1000_RXBUFFER_8192; | |
3478 | else if (max_frame <= E1000_RXBUFFER_16384) | |
3479 | adapter->rx_buffer_len = E1000_RXBUFFER_16384; | |
3480 | ||
3481 | /* adjust allocation if LPE protects us, and we aren't using SBP */ | |
9e2feace AK |
3482 | if (!adapter->hw.tbi_compatibility_on && |
3483 | ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) || | |
3484 | (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))) | |
3485 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; | |
997f5cbd | 3486 | |
2d7edb92 MC |
3487 | netdev->mtu = new_mtu; |
3488 | ||
2db10a08 AK |
3489 | if (netif_running(netdev)) |
3490 | e1000_reinit_locked(adapter); | |
1da177e4 | 3491 | |
1da177e4 LT |
3492 | adapter->hw.max_frame_size = max_frame; |
3493 | ||
3494 | return 0; | |
3495 | } | |
3496 | ||
3497 | /** | |
3498 | * e1000_update_stats - Update the board statistics counters | |
3499 | * @adapter: board private structure | |
3500 | **/ | |
3501 | ||
3502 | void | |
3503 | e1000_update_stats(struct e1000_adapter *adapter) | |
3504 | { | |
3505 | struct e1000_hw *hw = &adapter->hw; | |
282f33c9 | 3506 | struct pci_dev *pdev = adapter->pdev; |
1da177e4 LT |
3507 | unsigned long flags; |
3508 | uint16_t phy_tmp; | |
3509 | ||
3510 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF | |
3511 | ||
282f33c9 LV |
3512 | /* |
3513 | * Prevent stats update while adapter is being reset, or if the pci | |
3514 | * connection is down. | |
3515 | */ | |
9026729b | 3516 | if (adapter->link_speed == 0) |
282f33c9 LV |
3517 | return; |
3518 | if (pdev->error_state && pdev->error_state != pci_channel_io_normal) | |
9026729b AK |
3519 | return; |
3520 | ||
1da177e4 LT |
3521 | spin_lock_irqsave(&adapter->stats_lock, flags); |
3522 | ||
3523 | /* these counters are modified from e1000_adjust_tbi_stats, | |
3524 | * called from the interrupt context, so they must only | |
3525 | * be written while holding adapter->stats_lock | |
3526 | */ | |
3527 | ||
3528 | adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS); | |
3529 | adapter->stats.gprc += E1000_READ_REG(hw, GPRC); | |
3530 | adapter->stats.gorcl += E1000_READ_REG(hw, GORCL); | |
3531 | adapter->stats.gorch += E1000_READ_REG(hw, GORCH); | |
3532 | adapter->stats.bprc += E1000_READ_REG(hw, BPRC); | |
3533 | adapter->stats.mprc += E1000_READ_REG(hw, MPRC); | |
3534 | adapter->stats.roc += E1000_READ_REG(hw, ROC); | |
cd94dd0b AK |
3535 | |
3536 | if (adapter->hw.mac_type != e1000_ich8lan) { | |
90fb5135 AK |
3537 | adapter->stats.prc64 += E1000_READ_REG(hw, PRC64); |
3538 | adapter->stats.prc127 += E1000_READ_REG(hw, PRC127); | |
3539 | adapter->stats.prc255 += E1000_READ_REG(hw, PRC255); | |
3540 | adapter->stats.prc511 += E1000_READ_REG(hw, PRC511); | |
3541 | adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023); | |
3542 | adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522); | |
cd94dd0b | 3543 | } |
1da177e4 LT |
3544 | |
3545 | adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS); | |
3546 | adapter->stats.mpc += E1000_READ_REG(hw, MPC); | |
3547 | adapter->stats.scc += E1000_READ_REG(hw, SCC); | |
3548 | adapter->stats.ecol += E1000_READ_REG(hw, ECOL); | |
3549 | adapter->stats.mcc += E1000_READ_REG(hw, MCC); | |
3550 | adapter->stats.latecol += E1000_READ_REG(hw, LATECOL); | |
3551 | adapter->stats.dc += E1000_READ_REG(hw, DC); | |
3552 | adapter->stats.sec += E1000_READ_REG(hw, SEC); | |
3553 | adapter->stats.rlec += E1000_READ_REG(hw, RLEC); | |
3554 | adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC); | |
3555 | adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC); | |
3556 | adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC); | |
3557 | adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC); | |
3558 | adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC); | |
3559 | adapter->stats.gptc += E1000_READ_REG(hw, GPTC); | |
3560 | adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL); | |
3561 | adapter->stats.gotch += E1000_READ_REG(hw, GOTCH); | |
3562 | adapter->stats.rnbc += E1000_READ_REG(hw, RNBC); | |
3563 | adapter->stats.ruc += E1000_READ_REG(hw, RUC); | |
3564 | adapter->stats.rfc += E1000_READ_REG(hw, RFC); | |
3565 | adapter->stats.rjc += E1000_READ_REG(hw, RJC); | |
3566 | adapter->stats.torl += E1000_READ_REG(hw, TORL); | |
3567 | adapter->stats.torh += E1000_READ_REG(hw, TORH); | |
3568 | adapter->stats.totl += E1000_READ_REG(hw, TOTL); | |
3569 | adapter->stats.toth += E1000_READ_REG(hw, TOTH); | |
3570 | adapter->stats.tpr += E1000_READ_REG(hw, TPR); | |
cd94dd0b AK |
3571 | |
3572 | if (adapter->hw.mac_type != e1000_ich8lan) { | |
90fb5135 AK |
3573 | adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64); |
3574 | adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127); | |
3575 | adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255); | |
3576 | adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511); | |
3577 | adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023); | |
3578 | adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522); | |
cd94dd0b AK |
3579 | } |
3580 | ||
1da177e4 LT |
3581 | adapter->stats.mptc += E1000_READ_REG(hw, MPTC); |
3582 | adapter->stats.bptc += E1000_READ_REG(hw, BPTC); | |
3583 | ||
3584 | /* used for adaptive IFS */ | |
3585 | ||
3586 | hw->tx_packet_delta = E1000_READ_REG(hw, TPT); | |
3587 | adapter->stats.tpt += hw->tx_packet_delta; | |
3588 | hw->collision_delta = E1000_READ_REG(hw, COLC); | |
3589 | adapter->stats.colc += hw->collision_delta; | |
3590 | ||
96838a40 | 3591 | if (hw->mac_type >= e1000_82543) { |
1da177e4 LT |
3592 | adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC); |
3593 | adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC); | |
3594 | adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS); | |
3595 | adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR); | |
3596 | adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC); | |
3597 | adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC); | |
3598 | } | |
96838a40 | 3599 | if (hw->mac_type > e1000_82547_rev_2) { |
2d7edb92 MC |
3600 | adapter->stats.iac += E1000_READ_REG(hw, IAC); |
3601 | adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC); | |
cd94dd0b AK |
3602 | |
3603 | if (adapter->hw.mac_type != e1000_ich8lan) { | |
90fb5135 AK |
3604 | adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC); |
3605 | adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC); | |
3606 | adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC); | |
3607 | adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC); | |
3608 | adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC); | |
3609 | adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC); | |
3610 | adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC); | |
cd94dd0b | 3611 | } |
2d7edb92 | 3612 | } |
1da177e4 LT |
3613 | |
3614 | /* Fill out the OS statistics structure */ | |
1da177e4 LT |
3615 | adapter->net_stats.rx_packets = adapter->stats.gprc; |
3616 | adapter->net_stats.tx_packets = adapter->stats.gptc; | |
3617 | adapter->net_stats.rx_bytes = adapter->stats.gorcl; | |
3618 | adapter->net_stats.tx_bytes = adapter->stats.gotcl; | |
3619 | adapter->net_stats.multicast = adapter->stats.mprc; | |
3620 | adapter->net_stats.collisions = adapter->stats.colc; | |
3621 | ||
3622 | /* Rx Errors */ | |
3623 | ||
87041639 JK |
3624 | /* RLEC on some newer hardware can be incorrect so build |
3625 | * our own version based on RUC and ROC */ | |
1da177e4 LT |
3626 | adapter->net_stats.rx_errors = adapter->stats.rxerrc + |
3627 | adapter->stats.crcerrs + adapter->stats.algnerrc + | |
87041639 JK |
3628 | adapter->stats.ruc + adapter->stats.roc + |
3629 | adapter->stats.cexterr; | |
49559854 MW |
3630 | adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc; |
3631 | adapter->net_stats.rx_length_errors = adapter->stats.rlerrc; | |
1da177e4 LT |
3632 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; |
3633 | adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc; | |
1da177e4 LT |
3634 | adapter->net_stats.rx_missed_errors = adapter->stats.mpc; |
3635 | ||
3636 | /* Tx Errors */ | |
49559854 MW |
3637 | adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol; |
3638 | adapter->net_stats.tx_errors = adapter->stats.txerrc; | |
1da177e4 LT |
3639 | adapter->net_stats.tx_aborted_errors = adapter->stats.ecol; |
3640 | adapter->net_stats.tx_window_errors = adapter->stats.latecol; | |
3641 | adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs; | |
167fb284 JG |
3642 | if (adapter->hw.bad_tx_carr_stats_fd && |
3643 | adapter->link_duplex == FULL_DUPLEX) { | |
3644 | adapter->net_stats.tx_carrier_errors = 0; | |
3645 | adapter->stats.tncrs = 0; | |
3646 | } | |
1da177e4 LT |
3647 | |
3648 | /* Tx Dropped needs to be maintained elsewhere */ | |
3649 | ||
3650 | /* Phy Stats */ | |
96838a40 JB |
3651 | if (hw->media_type == e1000_media_type_copper) { |
3652 | if ((adapter->link_speed == SPEED_1000) && | |
1da177e4 LT |
3653 | (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) { |
3654 | phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK; | |
3655 | adapter->phy_stats.idle_errors += phy_tmp; | |
3656 | } | |
3657 | ||
96838a40 | 3658 | if ((hw->mac_type <= e1000_82546) && |
1da177e4 LT |
3659 | (hw->phy_type == e1000_phy_m88) && |
3660 | !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp)) | |
3661 | adapter->phy_stats.receive_errors += phy_tmp; | |
3662 | } | |
3663 | ||
3664 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
3665 | } | |
9ac98284 JB |
3666 | #ifdef CONFIG_PCI_MSI |
3667 | ||
3668 | /** | |
3669 | * e1000_intr_msi - Interrupt Handler | |
3670 | * @irq: interrupt number | |
3671 | * @data: pointer to a network interface device structure | |
3672 | **/ | |
3673 | ||
3674 | static | |
3675 | irqreturn_t e1000_intr_msi(int irq, void *data) | |
3676 | { | |
3677 | struct net_device *netdev = data; | |
3678 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
3679 | struct e1000_hw *hw = &adapter->hw; | |
3680 | #ifndef CONFIG_E1000_NAPI | |
3681 | int i; | |
3682 | #endif | |
3683 | ||
3684 | /* this code avoids the read of ICR but has to get 1000 interrupts | |
3685 | * at every link change event before it will notice the change */ | |
3686 | if (++adapter->detect_link >= 1000) { | |
3687 | uint32_t icr = E1000_READ_REG(hw, ICR); | |
3688 | #ifdef CONFIG_E1000_NAPI | |
3689 | /* read ICR disables interrupts using IAM, so keep up with our | |
3690 | * enable/disable accounting */ | |
3691 | atomic_inc(&adapter->irq_sem); | |
3692 | #endif | |
3693 | adapter->detect_link = 0; | |
3694 | if ((icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) && | |
3695 | (icr & E1000_ICR_INT_ASSERTED)) { | |
3696 | hw->get_link_status = 1; | |
3697 | /* 80003ES2LAN workaround-- | |
3698 | * For packet buffer work-around on link down event; | |
3699 | * disable receives here in the ISR and | |
3700 | * reset adapter in watchdog | |
3701 | */ | |
3702 | if (netif_carrier_ok(netdev) && | |
3703 | (adapter->hw.mac_type == e1000_80003es2lan)) { | |
3704 | /* disable receives */ | |
3705 | uint32_t rctl = E1000_READ_REG(hw, RCTL); | |
3706 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
3707 | } | |
3708 | /* guard against interrupt when we're going down */ | |
3709 | if (!test_bit(__E1000_DOWN, &adapter->flags)) | |
3710 | mod_timer(&adapter->watchdog_timer, | |
3711 | jiffies + 1); | |
3712 | } | |
3713 | } else { | |
3714 | E1000_WRITE_REG(hw, ICR, (0xffffffff & ~(E1000_ICR_RXSEQ | | |
3715 | E1000_ICR_LSC))); | |
3716 | /* bummer we have to flush here, but things break otherwise as | |
3717 | * some event appears to be lost or delayed and throughput | |
3718 | * drops. In almost all tests this flush is un-necessary */ | |
3719 | E1000_WRITE_FLUSH(hw); | |
3720 | #ifdef CONFIG_E1000_NAPI | |
3721 | /* Interrupt Auto-Mask (IAM)...upon writing ICR, interrupts are | |
3722 | * masked. No need for the IMC write, but it does mean we | |
3723 | * should account for it ASAP. */ | |
3724 | atomic_inc(&adapter->irq_sem); | |
3725 | #endif | |
3726 | } | |
3727 | ||
3728 | #ifdef CONFIG_E1000_NAPI | |
835bb129 JB |
3729 | if (likely(netif_rx_schedule_prep(netdev))) { |
3730 | adapter->total_tx_bytes = 0; | |
3731 | adapter->total_tx_packets = 0; | |
3732 | adapter->total_rx_bytes = 0; | |
3733 | adapter->total_rx_packets = 0; | |
9ac98284 | 3734 | __netif_rx_schedule(netdev); |
835bb129 | 3735 | } else |
9ac98284 JB |
3736 | e1000_irq_enable(adapter); |
3737 | #else | |
835bb129 JB |
3738 | adapter->total_tx_bytes = 0; |
3739 | adapter->total_rx_bytes = 0; | |
3740 | adapter->total_tx_packets = 0; | |
3741 | adapter->total_rx_packets = 0; | |
3742 | ||
9ac98284 JB |
3743 | for (i = 0; i < E1000_MAX_INTR; i++) |
3744 | if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & | |
3745 | !e1000_clean_tx_irq(adapter, adapter->tx_ring))) | |
3746 | break; | |
835bb129 JB |
3747 | |
3748 | if (likely(adapter->itr_setting & 3)) | |
3749 | e1000_set_itr(adapter); | |
9ac98284 JB |
3750 | #endif |
3751 | ||
3752 | return IRQ_HANDLED; | |
3753 | } | |
3754 | #endif | |
1da177e4 LT |
3755 | |
3756 | /** | |
3757 | * e1000_intr - Interrupt Handler | |
3758 | * @irq: interrupt number | |
3759 | * @data: pointer to a network interface device structure | |
1da177e4 LT |
3760 | **/ |
3761 | ||
3762 | static irqreturn_t | |
7d12e780 | 3763 | e1000_intr(int irq, void *data) |
1da177e4 LT |
3764 | { |
3765 | struct net_device *netdev = data; | |
60490fe0 | 3766 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3767 | struct e1000_hw *hw = &adapter->hw; |
87041639 | 3768 | uint32_t rctl, icr = E1000_READ_REG(hw, ICR); |
1e613fd9 | 3769 | #ifndef CONFIG_E1000_NAPI |
581d708e | 3770 | int i; |
835bb129 JB |
3771 | #endif |
3772 | if (unlikely(!icr)) | |
3773 | return IRQ_NONE; /* Not our interrupt */ | |
3774 | ||
3775 | #ifdef CONFIG_E1000_NAPI | |
3776 | /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is | |
3777 | * not set, then the adapter didn't send an interrupt */ | |
3778 | if (unlikely(hw->mac_type >= e1000_82571 && | |
3779 | !(icr & E1000_ICR_INT_ASSERTED))) | |
3780 | return IRQ_NONE; | |
3781 | ||
1e613fd9 JK |
3782 | /* Interrupt Auto-Mask...upon reading ICR, |
3783 | * interrupts are masked. No need for the | |
3784 | * IMC write, but it does mean we should | |
3785 | * account for it ASAP. */ | |
3786 | if (likely(hw->mac_type >= e1000_82571)) | |
3787 | atomic_inc(&adapter->irq_sem); | |
be2b28ed | 3788 | #endif |
1da177e4 | 3789 | |
96838a40 | 3790 | if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { |
1da177e4 | 3791 | hw->get_link_status = 1; |
87041639 JK |
3792 | /* 80003ES2LAN workaround-- |
3793 | * For packet buffer work-around on link down event; | |
3794 | * disable receives here in the ISR and | |
3795 | * reset adapter in watchdog | |
3796 | */ | |
3797 | if (netif_carrier_ok(netdev) && | |
3798 | (adapter->hw.mac_type == e1000_80003es2lan)) { | |
3799 | /* disable receives */ | |
3800 | rctl = E1000_READ_REG(hw, RCTL); | |
3801 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
3802 | } | |
1314bbf3 AK |
3803 | /* guard against interrupt when we're going down */ |
3804 | if (!test_bit(__E1000_DOWN, &adapter->flags)) | |
3805 | mod_timer(&adapter->watchdog_timer, jiffies + 1); | |
1da177e4 LT |
3806 | } |
3807 | ||
3808 | #ifdef CONFIG_E1000_NAPI | |
1e613fd9 | 3809 | if (unlikely(hw->mac_type < e1000_82571)) { |
835bb129 | 3810 | /* disable interrupts, without the synchronize_irq bit */ |
1e613fd9 JK |
3811 | atomic_inc(&adapter->irq_sem); |
3812 | E1000_WRITE_REG(hw, IMC, ~0); | |
3813 | E1000_WRITE_FLUSH(hw); | |
3814 | } | |
835bb129 JB |
3815 | if (likely(netif_rx_schedule_prep(netdev))) { |
3816 | adapter->total_tx_bytes = 0; | |
3817 | adapter->total_tx_packets = 0; | |
3818 | adapter->total_rx_bytes = 0; | |
3819 | adapter->total_rx_packets = 0; | |
d3d9e484 | 3820 | __netif_rx_schedule(netdev); |
835bb129 | 3821 | } else |
90fb5135 AK |
3822 | /* this really should not happen! if it does it is basically a |
3823 | * bug, but not a hard error, so enable ints and continue */ | |
581d708e | 3824 | e1000_irq_enable(adapter); |
c1605eb3 | 3825 | #else |
1da177e4 | 3826 | /* Writing IMC and IMS is needed for 82547. |
96838a40 JB |
3827 | * Due to Hub Link bus being occupied, an interrupt |
3828 | * de-assertion message is not able to be sent. | |
3829 | * When an interrupt assertion message is generated later, | |
3830 | * two messages are re-ordered and sent out. | |
3831 | * That causes APIC to think 82547 is in de-assertion | |
3832 | * state, while 82547 is in assertion state, resulting | |
3833 | * in dead lock. Writing IMC forces 82547 into | |
3834 | * de-assertion state. | |
3835 | */ | |
3836 | if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) { | |
1da177e4 | 3837 | atomic_inc(&adapter->irq_sem); |
2648345f | 3838 | E1000_WRITE_REG(hw, IMC, ~0); |
1da177e4 LT |
3839 | } |
3840 | ||
835bb129 JB |
3841 | adapter->total_tx_bytes = 0; |
3842 | adapter->total_rx_bytes = 0; | |
3843 | adapter->total_tx_packets = 0; | |
3844 | adapter->total_rx_packets = 0; | |
3845 | ||
96838a40 JB |
3846 | for (i = 0; i < E1000_MAX_INTR; i++) |
3847 | if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & | |
581d708e | 3848 | !e1000_clean_tx_irq(adapter, adapter->tx_ring))) |
1da177e4 LT |
3849 | break; |
3850 | ||
835bb129 JB |
3851 | if (likely(adapter->itr_setting & 3)) |
3852 | e1000_set_itr(adapter); | |
3853 | ||
96838a40 | 3854 | if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) |
1da177e4 | 3855 | e1000_irq_enable(adapter); |
581d708e | 3856 | |
c1605eb3 | 3857 | #endif |
1da177e4 LT |
3858 | return IRQ_HANDLED; |
3859 | } | |
3860 | ||
3861 | #ifdef CONFIG_E1000_NAPI | |
3862 | /** | |
3863 | * e1000_clean - NAPI Rx polling callback | |
3864 | * @adapter: board private structure | |
3865 | **/ | |
3866 | ||
3867 | static int | |
581d708e | 3868 | e1000_clean(struct net_device *poll_dev, int *budget) |
1da177e4 | 3869 | { |
581d708e MC |
3870 | struct e1000_adapter *adapter; |
3871 | int work_to_do = min(*budget, poll_dev->quota); | |
d3d9e484 | 3872 | int tx_cleaned = 0, work_done = 0; |
581d708e MC |
3873 | |
3874 | /* Must NOT use netdev_priv macro here. */ | |
3875 | adapter = poll_dev->priv; | |
3876 | ||
3877 | /* Keep link state information with original netdev */ | |
d3d9e484 | 3878 | if (!netif_carrier_ok(poll_dev)) |
581d708e | 3879 | goto quit_polling; |
2648345f | 3880 | |
d3d9e484 AK |
3881 | /* e1000_clean is called per-cpu. This lock protects |
3882 | * tx_ring[0] from being cleaned by multiple cpus | |
3883 | * simultaneously. A failure obtaining the lock means | |
3884 | * tx_ring[0] is currently being cleaned anyway. */ | |
3885 | if (spin_trylock(&adapter->tx_queue_lock)) { | |
3886 | tx_cleaned = e1000_clean_tx_irq(adapter, | |
3887 | &adapter->tx_ring[0]); | |
3888 | spin_unlock(&adapter->tx_queue_lock); | |
581d708e MC |
3889 | } |
3890 | ||
d3d9e484 | 3891 | adapter->clean_rx(adapter, &adapter->rx_ring[0], |
581d708e | 3892 | &work_done, work_to_do); |
1da177e4 LT |
3893 | |
3894 | *budget -= work_done; | |
581d708e | 3895 | poll_dev->quota -= work_done; |
96838a40 | 3896 | |
2b02893e | 3897 | /* If no Tx and not enough Rx work done, exit the polling mode */ |
96838a40 | 3898 | if ((!tx_cleaned && (work_done == 0)) || |
d3d9e484 | 3899 | !netif_running(poll_dev)) { |
581d708e | 3900 | quit_polling: |
835bb129 JB |
3901 | if (likely(adapter->itr_setting & 3)) |
3902 | e1000_set_itr(adapter); | |
581d708e | 3903 | netif_rx_complete(poll_dev); |
1da177e4 LT |
3904 | e1000_irq_enable(adapter); |
3905 | return 0; | |
3906 | } | |
3907 | ||
3908 | return 1; | |
3909 | } | |
3910 | ||
3911 | #endif | |
3912 | /** | |
3913 | * e1000_clean_tx_irq - Reclaim resources after transmit completes | |
3914 | * @adapter: board private structure | |
3915 | **/ | |
3916 | ||
3917 | static boolean_t | |
581d708e MC |
3918 | e1000_clean_tx_irq(struct e1000_adapter *adapter, |
3919 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 3920 | { |
1da177e4 LT |
3921 | struct net_device *netdev = adapter->netdev; |
3922 | struct e1000_tx_desc *tx_desc, *eop_desc; | |
3923 | struct e1000_buffer *buffer_info; | |
3924 | unsigned int i, eop; | |
2a1af5d7 JK |
3925 | #ifdef CONFIG_E1000_NAPI |
3926 | unsigned int count = 0; | |
3927 | #endif | |
1da177e4 | 3928 | boolean_t cleaned = FALSE; |
835bb129 | 3929 | unsigned int total_tx_bytes=0, total_tx_packets=0; |
1da177e4 LT |
3930 | |
3931 | i = tx_ring->next_to_clean; | |
3932 | eop = tx_ring->buffer_info[i].next_to_watch; | |
3933 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
3934 | ||
581d708e | 3935 | while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) { |
96838a40 | 3936 | for (cleaned = FALSE; !cleaned; ) { |
1da177e4 LT |
3937 | tx_desc = E1000_TX_DESC(*tx_ring, i); |
3938 | buffer_info = &tx_ring->buffer_info[i]; | |
3939 | cleaned = (i == eop); | |
3940 | ||
835bb129 | 3941 | if (cleaned) { |
2b65326e JB |
3942 | struct sk_buff *skb = buffer_info->skb; |
3943 | unsigned int segs = skb_shinfo(skb)->gso_segs; | |
3944 | total_tx_packets += segs; | |
835bb129 | 3945 | total_tx_packets++; |
2b65326e | 3946 | total_tx_bytes += skb->len; |
835bb129 | 3947 | } |
fd803241 | 3948 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); |
a9ebadd6 | 3949 | tx_desc->upper.data = 0; |
1da177e4 | 3950 | |
96838a40 | 3951 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 | 3952 | } |
581d708e | 3953 | |
1da177e4 LT |
3954 | eop = tx_ring->buffer_info[i].next_to_watch; |
3955 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
2a1af5d7 JK |
3956 | #ifdef CONFIG_E1000_NAPI |
3957 | #define E1000_TX_WEIGHT 64 | |
3958 | /* weight of a sort for tx, to avoid endless transmit cleanup */ | |
3959 | if (count++ == E1000_TX_WEIGHT) break; | |
3960 | #endif | |
1da177e4 LT |
3961 | } |
3962 | ||
3963 | tx_ring->next_to_clean = i; | |
3964 | ||
77b2aad5 | 3965 | #define TX_WAKE_THRESHOLD 32 |
65c7973f JB |
3966 | if (unlikely(cleaned && netif_carrier_ok(netdev) && |
3967 | E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) { | |
3968 | /* Make sure that anybody stopping the queue after this | |
3969 | * sees the new next_to_clean. | |
3970 | */ | |
3971 | smp_mb(); | |
fcfb1224 | 3972 | if (netif_queue_stopped(netdev)) { |
77b2aad5 | 3973 | netif_wake_queue(netdev); |
fcfb1224 JB |
3974 | ++adapter->restart_queue; |
3975 | } | |
77b2aad5 | 3976 | } |
2648345f | 3977 | |
581d708e | 3978 | if (adapter->detect_tx_hung) { |
2648345f | 3979 | /* Detect a transmit hang in hardware, this serializes the |
1da177e4 LT |
3980 | * check with the clearing of time_stamp and movement of i */ |
3981 | adapter->detect_tx_hung = FALSE; | |
392137fa JK |
3982 | if (tx_ring->buffer_info[eop].dma && |
3983 | time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + | |
7e6c9861 | 3984 | (adapter->tx_timeout_factor * HZ)) |
70b8f1e1 | 3985 | && !(E1000_READ_REG(&adapter->hw, STATUS) & |
392137fa | 3986 | E1000_STATUS_TXOFF)) { |
70b8f1e1 MC |
3987 | |
3988 | /* detected Tx unit hang */ | |
c6963ef5 | 3989 | DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n" |
7bfa4816 | 3990 | " Tx Queue <%lu>\n" |
70b8f1e1 MC |
3991 | " TDH <%x>\n" |
3992 | " TDT <%x>\n" | |
3993 | " next_to_use <%x>\n" | |
3994 | " next_to_clean <%x>\n" | |
3995 | "buffer_info[next_to_clean]\n" | |
70b8f1e1 MC |
3996 | " time_stamp <%lx>\n" |
3997 | " next_to_watch <%x>\n" | |
3998 | " jiffies <%lx>\n" | |
3999 | " next_to_watch.status <%x>\n", | |
7bfa4816 JK |
4000 | (unsigned long)((tx_ring - adapter->tx_ring) / |
4001 | sizeof(struct e1000_tx_ring)), | |
581d708e MC |
4002 | readl(adapter->hw.hw_addr + tx_ring->tdh), |
4003 | readl(adapter->hw.hw_addr + tx_ring->tdt), | |
70b8f1e1 | 4004 | tx_ring->next_to_use, |
392137fa JK |
4005 | tx_ring->next_to_clean, |
4006 | tx_ring->buffer_info[eop].time_stamp, | |
70b8f1e1 MC |
4007 | eop, |
4008 | jiffies, | |
4009 | eop_desc->upper.fields.status); | |
1da177e4 | 4010 | netif_stop_queue(netdev); |
70b8f1e1 | 4011 | } |
1da177e4 | 4012 | } |
835bb129 JB |
4013 | adapter->total_tx_bytes += total_tx_bytes; |
4014 | adapter->total_tx_packets += total_tx_packets; | |
1da177e4 LT |
4015 | return cleaned; |
4016 | } | |
4017 | ||
4018 | /** | |
4019 | * e1000_rx_checksum - Receive Checksum Offload for 82543 | |
2d7edb92 MC |
4020 | * @adapter: board private structure |
4021 | * @status_err: receive descriptor status and error fields | |
4022 | * @csum: receive descriptor csum field | |
4023 | * @sk_buff: socket buffer with received data | |
1da177e4 LT |
4024 | **/ |
4025 | ||
e619d523 | 4026 | static void |
1da177e4 | 4027 | e1000_rx_checksum(struct e1000_adapter *adapter, |
2d7edb92 MC |
4028 | uint32_t status_err, uint32_t csum, |
4029 | struct sk_buff *skb) | |
1da177e4 | 4030 | { |
2d7edb92 MC |
4031 | uint16_t status = (uint16_t)status_err; |
4032 | uint8_t errors = (uint8_t)(status_err >> 24); | |
4033 | skb->ip_summed = CHECKSUM_NONE; | |
4034 | ||
1da177e4 | 4035 | /* 82543 or newer only */ |
96838a40 | 4036 | if (unlikely(adapter->hw.mac_type < e1000_82543)) return; |
1da177e4 | 4037 | /* Ignore Checksum bit is set */ |
96838a40 | 4038 | if (unlikely(status & E1000_RXD_STAT_IXSM)) return; |
2d7edb92 | 4039 | /* TCP/UDP checksum error bit is set */ |
96838a40 | 4040 | if (unlikely(errors & E1000_RXD_ERR_TCPE)) { |
1da177e4 | 4041 | /* let the stack verify checksum errors */ |
1da177e4 | 4042 | adapter->hw_csum_err++; |
2d7edb92 MC |
4043 | return; |
4044 | } | |
4045 | /* TCP/UDP Checksum has not been calculated */ | |
96838a40 JB |
4046 | if (adapter->hw.mac_type <= e1000_82547_rev_2) { |
4047 | if (!(status & E1000_RXD_STAT_TCPCS)) | |
2d7edb92 | 4048 | return; |
1da177e4 | 4049 | } else { |
96838a40 | 4050 | if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) |
2d7edb92 MC |
4051 | return; |
4052 | } | |
4053 | /* It must be a TCP or UDP packet with a valid checksum */ | |
4054 | if (likely(status & E1000_RXD_STAT_TCPCS)) { | |
1da177e4 LT |
4055 | /* TCP checksum is good */ |
4056 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
2d7edb92 MC |
4057 | } else if (adapter->hw.mac_type > e1000_82547_rev_2) { |
4058 | /* IP fragment with UDP payload */ | |
4059 | /* Hardware complements the payload checksum, so we undo it | |
4060 | * and then put the value in host order for further stack use. | |
4061 | */ | |
4062 | csum = ntohl(csum ^ 0xFFFF); | |
4063 | skb->csum = csum; | |
84fa7933 | 4064 | skb->ip_summed = CHECKSUM_COMPLETE; |
1da177e4 | 4065 | } |
2d7edb92 | 4066 | adapter->hw_csum_good++; |
1da177e4 LT |
4067 | } |
4068 | ||
4069 | /** | |
2d7edb92 | 4070 | * e1000_clean_rx_irq - Send received data up the network stack; legacy |
1da177e4 LT |
4071 | * @adapter: board private structure |
4072 | **/ | |
4073 | ||
4074 | static boolean_t | |
4075 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
4076 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
4077 | struct e1000_rx_ring *rx_ring, | |
4078 | int *work_done, int work_to_do) | |
1da177e4 | 4079 | #else |
581d708e MC |
4080 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
4081 | struct e1000_rx_ring *rx_ring) | |
1da177e4 LT |
4082 | #endif |
4083 | { | |
1da177e4 LT |
4084 | struct net_device *netdev = adapter->netdev; |
4085 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f JB |
4086 | struct e1000_rx_desc *rx_desc, *next_rxd; |
4087 | struct e1000_buffer *buffer_info, *next_buffer; | |
1da177e4 LT |
4088 | unsigned long flags; |
4089 | uint32_t length; | |
4090 | uint8_t last_byte; | |
4091 | unsigned int i; | |
72d64a43 | 4092 | int cleaned_count = 0; |
a1415ee6 | 4093 | boolean_t cleaned = FALSE; |
835bb129 | 4094 | unsigned int total_rx_bytes=0, total_rx_packets=0; |
1da177e4 LT |
4095 | |
4096 | i = rx_ring->next_to_clean; | |
4097 | rx_desc = E1000_RX_DESC(*rx_ring, i); | |
b92ff8ee | 4098 | buffer_info = &rx_ring->buffer_info[i]; |
1da177e4 | 4099 | |
b92ff8ee | 4100 | while (rx_desc->status & E1000_RXD_STAT_DD) { |
24f476ee | 4101 | struct sk_buff *skb; |
a292ca6e | 4102 | u8 status; |
90fb5135 | 4103 | |
1da177e4 | 4104 | #ifdef CONFIG_E1000_NAPI |
96838a40 | 4105 | if (*work_done >= work_to_do) |
1da177e4 LT |
4106 | break; |
4107 | (*work_done)++; | |
4108 | #endif | |
a292ca6e | 4109 | status = rx_desc->status; |
b92ff8ee | 4110 | skb = buffer_info->skb; |
86c3d59f JB |
4111 | buffer_info->skb = NULL; |
4112 | ||
30320be8 JK |
4113 | prefetch(skb->data - NET_IP_ALIGN); |
4114 | ||
86c3d59f JB |
4115 | if (++i == rx_ring->count) i = 0; |
4116 | next_rxd = E1000_RX_DESC(*rx_ring, i); | |
30320be8 JK |
4117 | prefetch(next_rxd); |
4118 | ||
86c3d59f | 4119 | next_buffer = &rx_ring->buffer_info[i]; |
86c3d59f | 4120 | |
72d64a43 JK |
4121 | cleaned = TRUE; |
4122 | cleaned_count++; | |
a292ca6e JK |
4123 | pci_unmap_single(pdev, |
4124 | buffer_info->dma, | |
4125 | buffer_info->length, | |
1da177e4 LT |
4126 | PCI_DMA_FROMDEVICE); |
4127 | ||
1da177e4 LT |
4128 | length = le16_to_cpu(rx_desc->length); |
4129 | ||
a1415ee6 JK |
4130 | if (unlikely(!(status & E1000_RXD_STAT_EOP))) { |
4131 | /* All receives must fit into a single buffer */ | |
4132 | E1000_DBG("%s: Receive packet consumed multiple" | |
4133 | " buffers\n", netdev->name); | |
864c4e45 | 4134 | /* recycle */ |
8fc897b0 | 4135 | buffer_info->skb = skb; |
1da177e4 LT |
4136 | goto next_desc; |
4137 | } | |
4138 | ||
96838a40 | 4139 | if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) { |
1da177e4 | 4140 | last_byte = *(skb->data + length - 1); |
b92ff8ee | 4141 | if (TBI_ACCEPT(&adapter->hw, status, |
1da177e4 LT |
4142 | rx_desc->errors, length, last_byte)) { |
4143 | spin_lock_irqsave(&adapter->stats_lock, flags); | |
a292ca6e JK |
4144 | e1000_tbi_adjust_stats(&adapter->hw, |
4145 | &adapter->stats, | |
1da177e4 LT |
4146 | length, skb->data); |
4147 | spin_unlock_irqrestore(&adapter->stats_lock, | |
4148 | flags); | |
4149 | length--; | |
4150 | } else { | |
9e2feace AK |
4151 | /* recycle */ |
4152 | buffer_info->skb = skb; | |
1da177e4 LT |
4153 | goto next_desc; |
4154 | } | |
1cb5821f | 4155 | } |
1da177e4 | 4156 | |
d2a1e213 JB |
4157 | /* adjust length to remove Ethernet CRC, this must be |
4158 | * done after the TBI_ACCEPT workaround above */ | |
4159 | length -= 4; | |
4160 | ||
835bb129 JB |
4161 | /* probably a little skewed due to removing CRC */ |
4162 | total_rx_bytes += length; | |
4163 | total_rx_packets++; | |
4164 | ||
a292ca6e JK |
4165 | /* code added for copybreak, this should improve |
4166 | * performance for small packets with large amounts | |
4167 | * of reassembly being done in the stack */ | |
4168 | #define E1000_CB_LENGTH 256 | |
a1415ee6 | 4169 | if (length < E1000_CB_LENGTH) { |
a292ca6e | 4170 | struct sk_buff *new_skb = |
87f5032e | 4171 | netdev_alloc_skb(netdev, length + NET_IP_ALIGN); |
a292ca6e JK |
4172 | if (new_skb) { |
4173 | skb_reserve(new_skb, NET_IP_ALIGN); | |
a292ca6e JK |
4174 | memcpy(new_skb->data - NET_IP_ALIGN, |
4175 | skb->data - NET_IP_ALIGN, | |
4176 | length + NET_IP_ALIGN); | |
4177 | /* save the skb in buffer_info as good */ | |
4178 | buffer_info->skb = skb; | |
4179 | skb = new_skb; | |
a292ca6e | 4180 | } |
996695de AK |
4181 | /* else just continue with the old one */ |
4182 | } | |
a292ca6e | 4183 | /* end copybreak code */ |
996695de | 4184 | skb_put(skb, length); |
1da177e4 LT |
4185 | |
4186 | /* Receive Checksum Offload */ | |
a292ca6e JK |
4187 | e1000_rx_checksum(adapter, |
4188 | (uint32_t)(status) | | |
2d7edb92 | 4189 | ((uint32_t)(rx_desc->errors) << 24), |
c3d7a3a4 | 4190 | le16_to_cpu(rx_desc->csum), skb); |
96838a40 | 4191 | |
1da177e4 LT |
4192 | skb->protocol = eth_type_trans(skb, netdev); |
4193 | #ifdef CONFIG_E1000_NAPI | |
96838a40 | 4194 | if (unlikely(adapter->vlgrp && |
a292ca6e | 4195 | (status & E1000_RXD_STAT_VP))) { |
1da177e4 | 4196 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
2d7edb92 MC |
4197 | le16_to_cpu(rx_desc->special) & |
4198 | E1000_RXD_SPC_VLAN_MASK); | |
1da177e4 LT |
4199 | } else { |
4200 | netif_receive_skb(skb); | |
4201 | } | |
4202 | #else /* CONFIG_E1000_NAPI */ | |
96838a40 | 4203 | if (unlikely(adapter->vlgrp && |
b92ff8ee | 4204 | (status & E1000_RXD_STAT_VP))) { |
1da177e4 LT |
4205 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
4206 | le16_to_cpu(rx_desc->special) & | |
4207 | E1000_RXD_SPC_VLAN_MASK); | |
4208 | } else { | |
4209 | netif_rx(skb); | |
4210 | } | |
4211 | #endif /* CONFIG_E1000_NAPI */ | |
4212 | netdev->last_rx = jiffies; | |
4213 | ||
4214 | next_desc: | |
4215 | rx_desc->status = 0; | |
1da177e4 | 4216 | |
72d64a43 JK |
4217 | /* return some buffers to hardware, one at a time is too slow */ |
4218 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
4219 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
4220 | cleaned_count = 0; | |
4221 | } | |
4222 | ||
30320be8 | 4223 | /* use prefetched values */ |
86c3d59f JB |
4224 | rx_desc = next_rxd; |
4225 | buffer_info = next_buffer; | |
1da177e4 | 4226 | } |
1da177e4 | 4227 | rx_ring->next_to_clean = i; |
72d64a43 JK |
4228 | |
4229 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
4230 | if (cleaned_count) | |
4231 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
2d7edb92 | 4232 | |
835bb129 JB |
4233 | adapter->total_rx_packets += total_rx_packets; |
4234 | adapter->total_rx_bytes += total_rx_bytes; | |
2d7edb92 MC |
4235 | return cleaned; |
4236 | } | |
4237 | ||
4238 | /** | |
4239 | * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split | |
4240 | * @adapter: board private structure | |
4241 | **/ | |
4242 | ||
4243 | static boolean_t | |
4244 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
4245 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
4246 | struct e1000_rx_ring *rx_ring, | |
4247 | int *work_done, int work_to_do) | |
2d7edb92 | 4248 | #else |
581d708e MC |
4249 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
4250 | struct e1000_rx_ring *rx_ring) | |
2d7edb92 MC |
4251 | #endif |
4252 | { | |
86c3d59f | 4253 | union e1000_rx_desc_packet_split *rx_desc, *next_rxd; |
2d7edb92 MC |
4254 | struct net_device *netdev = adapter->netdev; |
4255 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f | 4256 | struct e1000_buffer *buffer_info, *next_buffer; |
2d7edb92 MC |
4257 | struct e1000_ps_page *ps_page; |
4258 | struct e1000_ps_page_dma *ps_page_dma; | |
24f476ee | 4259 | struct sk_buff *skb; |
2d7edb92 MC |
4260 | unsigned int i, j; |
4261 | uint32_t length, staterr; | |
72d64a43 | 4262 | int cleaned_count = 0; |
2d7edb92 | 4263 | boolean_t cleaned = FALSE; |
835bb129 | 4264 | unsigned int total_rx_bytes=0, total_rx_packets=0; |
2d7edb92 MC |
4265 | |
4266 | i = rx_ring->next_to_clean; | |
4267 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); | |
683a38f3 | 4268 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
9e2feace | 4269 | buffer_info = &rx_ring->buffer_info[i]; |
2d7edb92 | 4270 | |
96838a40 | 4271 | while (staterr & E1000_RXD_STAT_DD) { |
2d7edb92 MC |
4272 | ps_page = &rx_ring->ps_page[i]; |
4273 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
4274 | #ifdef CONFIG_E1000_NAPI | |
96838a40 | 4275 | if (unlikely(*work_done >= work_to_do)) |
2d7edb92 MC |
4276 | break; |
4277 | (*work_done)++; | |
4278 | #endif | |
86c3d59f JB |
4279 | skb = buffer_info->skb; |
4280 | ||
30320be8 JK |
4281 | /* in the packet split case this is header only */ |
4282 | prefetch(skb->data - NET_IP_ALIGN); | |
4283 | ||
86c3d59f JB |
4284 | if (++i == rx_ring->count) i = 0; |
4285 | next_rxd = E1000_RX_DESC_PS(*rx_ring, i); | |
30320be8 JK |
4286 | prefetch(next_rxd); |
4287 | ||
86c3d59f | 4288 | next_buffer = &rx_ring->buffer_info[i]; |
86c3d59f | 4289 | |
2d7edb92 | 4290 | cleaned = TRUE; |
72d64a43 | 4291 | cleaned_count++; |
2d7edb92 MC |
4292 | pci_unmap_single(pdev, buffer_info->dma, |
4293 | buffer_info->length, | |
4294 | PCI_DMA_FROMDEVICE); | |
4295 | ||
96838a40 | 4296 | if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) { |
2d7edb92 MC |
4297 | E1000_DBG("%s: Packet Split buffers didn't pick up" |
4298 | " the full packet\n", netdev->name); | |
4299 | dev_kfree_skb_irq(skb); | |
4300 | goto next_desc; | |
4301 | } | |
1da177e4 | 4302 | |
96838a40 | 4303 | if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) { |
2d7edb92 MC |
4304 | dev_kfree_skb_irq(skb); |
4305 | goto next_desc; | |
4306 | } | |
4307 | ||
4308 | length = le16_to_cpu(rx_desc->wb.middle.length0); | |
4309 | ||
96838a40 | 4310 | if (unlikely(!length)) { |
2d7edb92 MC |
4311 | E1000_DBG("%s: Last part of the packet spanning" |
4312 | " multiple descriptors\n", netdev->name); | |
4313 | dev_kfree_skb_irq(skb); | |
4314 | goto next_desc; | |
4315 | } | |
4316 | ||
4317 | /* Good Receive */ | |
4318 | skb_put(skb, length); | |
4319 | ||
dc7c6add JK |
4320 | { |
4321 | /* this looks ugly, but it seems compiler issues make it | |
4322 | more efficient than reusing j */ | |
4323 | int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); | |
4324 | ||
4325 | /* page alloc/put takes too long and effects small packet | |
4326 | * throughput, so unsplit small packets and save the alloc/put*/ | |
9e2feace | 4327 | if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) { |
dc7c6add | 4328 | u8 *vaddr; |
76c224bc | 4329 | /* there is no documentation about how to call |
dc7c6add JK |
4330 | * kmap_atomic, so we can't hold the mapping |
4331 | * very long */ | |
4332 | pci_dma_sync_single_for_cpu(pdev, | |
4333 | ps_page_dma->ps_page_dma[0], | |
4334 | PAGE_SIZE, | |
4335 | PCI_DMA_FROMDEVICE); | |
4336 | vaddr = kmap_atomic(ps_page->ps_page[0], | |
4337 | KM_SKB_DATA_SOFTIRQ); | |
4338 | memcpy(skb->tail, vaddr, l1); | |
4339 | kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); | |
4340 | pci_dma_sync_single_for_device(pdev, | |
4341 | ps_page_dma->ps_page_dma[0], | |
4342 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
f235a2ab AK |
4343 | /* remove the CRC */ |
4344 | l1 -= 4; | |
dc7c6add | 4345 | skb_put(skb, l1); |
dc7c6add JK |
4346 | goto copydone; |
4347 | } /* if */ | |
4348 | } | |
90fb5135 | 4349 | |
96838a40 | 4350 | for (j = 0; j < adapter->rx_ps_pages; j++) { |
30320be8 | 4351 | if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j]))) |
2d7edb92 | 4352 | break; |
2d7edb92 MC |
4353 | pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j], |
4354 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
4355 | ps_page_dma->ps_page_dma[j] = 0; | |
329bfd0b JK |
4356 | skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0, |
4357 | length); | |
2d7edb92 | 4358 | ps_page->ps_page[j] = NULL; |
2d7edb92 MC |
4359 | skb->len += length; |
4360 | skb->data_len += length; | |
5d51b80f | 4361 | skb->truesize += length; |
2d7edb92 MC |
4362 | } |
4363 | ||
f235a2ab AK |
4364 | /* strip the ethernet crc, problem is we're using pages now so |
4365 | * this whole operation can get a little cpu intensive */ | |
4366 | pskb_trim(skb, skb->len - 4); | |
4367 | ||
dc7c6add | 4368 | copydone: |
835bb129 JB |
4369 | total_rx_bytes += skb->len; |
4370 | total_rx_packets++; | |
4371 | ||
2d7edb92 | 4372 | e1000_rx_checksum(adapter, staterr, |
c3d7a3a4 | 4373 | le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb); |
2d7edb92 MC |
4374 | skb->protocol = eth_type_trans(skb, netdev); |
4375 | ||
96838a40 | 4376 | if (likely(rx_desc->wb.upper.header_status & |
c3d7a3a4 | 4377 | cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))) |
e4c811c9 | 4378 | adapter->rx_hdr_split++; |
2d7edb92 | 4379 | #ifdef CONFIG_E1000_NAPI |
96838a40 | 4380 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
2d7edb92 | 4381 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
683a38f3 MC |
4382 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
4383 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
4384 | } else { |
4385 | netif_receive_skb(skb); | |
4386 | } | |
4387 | #else /* CONFIG_E1000_NAPI */ | |
96838a40 | 4388 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
2d7edb92 | 4389 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
683a38f3 MC |
4390 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
4391 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
4392 | } else { |
4393 | netif_rx(skb); | |
4394 | } | |
4395 | #endif /* CONFIG_E1000_NAPI */ | |
4396 | netdev->last_rx = jiffies; | |
4397 | ||
4398 | next_desc: | |
c3d7a3a4 | 4399 | rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); |
2d7edb92 | 4400 | buffer_info->skb = NULL; |
2d7edb92 | 4401 | |
72d64a43 JK |
4402 | /* return some buffers to hardware, one at a time is too slow */ |
4403 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
4404 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
4405 | cleaned_count = 0; | |
4406 | } | |
4407 | ||
30320be8 | 4408 | /* use prefetched values */ |
86c3d59f JB |
4409 | rx_desc = next_rxd; |
4410 | buffer_info = next_buffer; | |
4411 | ||
683a38f3 | 4412 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
2d7edb92 MC |
4413 | } |
4414 | rx_ring->next_to_clean = i; | |
72d64a43 JK |
4415 | |
4416 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
4417 | if (cleaned_count) | |
4418 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
1da177e4 | 4419 | |
835bb129 JB |
4420 | adapter->total_rx_packets += total_rx_packets; |
4421 | adapter->total_rx_bytes += total_rx_bytes; | |
1da177e4 LT |
4422 | return cleaned; |
4423 | } | |
4424 | ||
4425 | /** | |
2d7edb92 | 4426 | * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended |
1da177e4 LT |
4427 | * @adapter: address of board private structure |
4428 | **/ | |
4429 | ||
4430 | static void | |
581d708e | 4431 | e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
72d64a43 | 4432 | struct e1000_rx_ring *rx_ring, |
a292ca6e | 4433 | int cleaned_count) |
1da177e4 | 4434 | { |
1da177e4 LT |
4435 | struct net_device *netdev = adapter->netdev; |
4436 | struct pci_dev *pdev = adapter->pdev; | |
4437 | struct e1000_rx_desc *rx_desc; | |
4438 | struct e1000_buffer *buffer_info; | |
4439 | struct sk_buff *skb; | |
2648345f MC |
4440 | unsigned int i; |
4441 | unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN; | |
1da177e4 LT |
4442 | |
4443 | i = rx_ring->next_to_use; | |
4444 | buffer_info = &rx_ring->buffer_info[i]; | |
4445 | ||
a292ca6e | 4446 | while (cleaned_count--) { |
ca6f7224 CH |
4447 | skb = buffer_info->skb; |
4448 | if (skb) { | |
a292ca6e JK |
4449 | skb_trim(skb, 0); |
4450 | goto map_skb; | |
4451 | } | |
4452 | ||
ca6f7224 | 4453 | skb = netdev_alloc_skb(netdev, bufsz); |
96838a40 | 4454 | if (unlikely(!skb)) { |
1da177e4 | 4455 | /* Better luck next round */ |
72d64a43 | 4456 | adapter->alloc_rx_buff_failed++; |
1da177e4 LT |
4457 | break; |
4458 | } | |
4459 | ||
2648345f | 4460 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
4461 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
4462 | struct sk_buff *oldskb = skb; | |
2648345f MC |
4463 | DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes " |
4464 | "at %p\n", bufsz, skb->data); | |
4465 | /* Try again, without freeing the previous */ | |
87f5032e | 4466 | skb = netdev_alloc_skb(netdev, bufsz); |
2648345f | 4467 | /* Failed allocation, critical failure */ |
1da177e4 LT |
4468 | if (!skb) { |
4469 | dev_kfree_skb(oldskb); | |
4470 | break; | |
4471 | } | |
2648345f | 4472 | |
1da177e4 LT |
4473 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
4474 | /* give up */ | |
4475 | dev_kfree_skb(skb); | |
4476 | dev_kfree_skb(oldskb); | |
4477 | break; /* while !buffer_info->skb */ | |
1da177e4 | 4478 | } |
ca6f7224 CH |
4479 | |
4480 | /* Use new allocation */ | |
4481 | dev_kfree_skb(oldskb); | |
1da177e4 | 4482 | } |
1da177e4 LT |
4483 | /* Make buffer alignment 2 beyond a 16 byte boundary |
4484 | * this will result in a 16 byte aligned IP header after | |
4485 | * the 14 byte MAC header is removed | |
4486 | */ | |
4487 | skb_reserve(skb, NET_IP_ALIGN); | |
4488 | ||
1da177e4 LT |
4489 | buffer_info->skb = skb; |
4490 | buffer_info->length = adapter->rx_buffer_len; | |
a292ca6e | 4491 | map_skb: |
1da177e4 LT |
4492 | buffer_info->dma = pci_map_single(pdev, |
4493 | skb->data, | |
4494 | adapter->rx_buffer_len, | |
4495 | PCI_DMA_FROMDEVICE); | |
4496 | ||
2648345f MC |
4497 | /* Fix for errata 23, can't cross 64kB boundary */ |
4498 | if (!e1000_check_64k_bound(adapter, | |
4499 | (void *)(unsigned long)buffer_info->dma, | |
4500 | adapter->rx_buffer_len)) { | |
4501 | DPRINTK(RX_ERR, ERR, | |
4502 | "dma align check failed: %u bytes at %p\n", | |
4503 | adapter->rx_buffer_len, | |
4504 | (void *)(unsigned long)buffer_info->dma); | |
1da177e4 LT |
4505 | dev_kfree_skb(skb); |
4506 | buffer_info->skb = NULL; | |
4507 | ||
2648345f | 4508 | pci_unmap_single(pdev, buffer_info->dma, |
1da177e4 LT |
4509 | adapter->rx_buffer_len, |
4510 | PCI_DMA_FROMDEVICE); | |
4511 | ||
4512 | break; /* while !buffer_info->skb */ | |
4513 | } | |
1da177e4 LT |
4514 | rx_desc = E1000_RX_DESC(*rx_ring, i); |
4515 | rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
4516 | ||
96838a40 JB |
4517 | if (unlikely(++i == rx_ring->count)) |
4518 | i = 0; | |
1da177e4 LT |
4519 | buffer_info = &rx_ring->buffer_info[i]; |
4520 | } | |
4521 | ||
b92ff8ee JB |
4522 | if (likely(rx_ring->next_to_use != i)) { |
4523 | rx_ring->next_to_use = i; | |
4524 | if (unlikely(i-- == 0)) | |
4525 | i = (rx_ring->count - 1); | |
4526 | ||
4527 | /* Force memory writes to complete before letting h/w | |
4528 | * know there are new descriptors to fetch. (Only | |
4529 | * applicable for weak-ordered memory model archs, | |
4530 | * such as IA-64). */ | |
4531 | wmb(); | |
4532 | writel(i, adapter->hw.hw_addr + rx_ring->rdt); | |
4533 | } | |
1da177e4 LT |
4534 | } |
4535 | ||
2d7edb92 MC |
4536 | /** |
4537 | * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split | |
4538 | * @adapter: address of board private structure | |
4539 | **/ | |
4540 | ||
4541 | static void | |
581d708e | 4542 | e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, |
72d64a43 JK |
4543 | struct e1000_rx_ring *rx_ring, |
4544 | int cleaned_count) | |
2d7edb92 | 4545 | { |
2d7edb92 MC |
4546 | struct net_device *netdev = adapter->netdev; |
4547 | struct pci_dev *pdev = adapter->pdev; | |
4548 | union e1000_rx_desc_packet_split *rx_desc; | |
4549 | struct e1000_buffer *buffer_info; | |
4550 | struct e1000_ps_page *ps_page; | |
4551 | struct e1000_ps_page_dma *ps_page_dma; | |
4552 | struct sk_buff *skb; | |
4553 | unsigned int i, j; | |
4554 | ||
4555 | i = rx_ring->next_to_use; | |
4556 | buffer_info = &rx_ring->buffer_info[i]; | |
4557 | ps_page = &rx_ring->ps_page[i]; | |
4558 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
4559 | ||
72d64a43 | 4560 | while (cleaned_count--) { |
2d7edb92 MC |
4561 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); |
4562 | ||
96838a40 | 4563 | for (j = 0; j < PS_PAGE_BUFFERS; j++) { |
e4c811c9 MC |
4564 | if (j < adapter->rx_ps_pages) { |
4565 | if (likely(!ps_page->ps_page[j])) { | |
4566 | ps_page->ps_page[j] = | |
4567 | alloc_page(GFP_ATOMIC); | |
b92ff8ee JB |
4568 | if (unlikely(!ps_page->ps_page[j])) { |
4569 | adapter->alloc_rx_buff_failed++; | |
e4c811c9 | 4570 | goto no_buffers; |
b92ff8ee | 4571 | } |
e4c811c9 MC |
4572 | ps_page_dma->ps_page_dma[j] = |
4573 | pci_map_page(pdev, | |
4574 | ps_page->ps_page[j], | |
4575 | 0, PAGE_SIZE, | |
4576 | PCI_DMA_FROMDEVICE); | |
4577 | } | |
4578 | /* Refresh the desc even if buffer_addrs didn't | |
96838a40 | 4579 | * change because each write-back erases |
e4c811c9 MC |
4580 | * this info. |
4581 | */ | |
4582 | rx_desc->read.buffer_addr[j+1] = | |
4583 | cpu_to_le64(ps_page_dma->ps_page_dma[j]); | |
4584 | } else | |
4585 | rx_desc->read.buffer_addr[j+1] = ~0; | |
2d7edb92 MC |
4586 | } |
4587 | ||
87f5032e | 4588 | skb = netdev_alloc_skb(netdev, |
90fb5135 | 4589 | adapter->rx_ps_bsize0 + NET_IP_ALIGN); |
2d7edb92 | 4590 | |
b92ff8ee JB |
4591 | if (unlikely(!skb)) { |
4592 | adapter->alloc_rx_buff_failed++; | |
2d7edb92 | 4593 | break; |
b92ff8ee | 4594 | } |
2d7edb92 MC |
4595 | |
4596 | /* Make buffer alignment 2 beyond a 16 byte boundary | |
4597 | * this will result in a 16 byte aligned IP header after | |
4598 | * the 14 byte MAC header is removed | |
4599 | */ | |
4600 | skb_reserve(skb, NET_IP_ALIGN); | |
4601 | ||
2d7edb92 MC |
4602 | buffer_info->skb = skb; |
4603 | buffer_info->length = adapter->rx_ps_bsize0; | |
4604 | buffer_info->dma = pci_map_single(pdev, skb->data, | |
4605 | adapter->rx_ps_bsize0, | |
4606 | PCI_DMA_FROMDEVICE); | |
4607 | ||
4608 | rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); | |
4609 | ||
96838a40 | 4610 | if (unlikely(++i == rx_ring->count)) i = 0; |
2d7edb92 MC |
4611 | buffer_info = &rx_ring->buffer_info[i]; |
4612 | ps_page = &rx_ring->ps_page[i]; | |
4613 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
4614 | } | |
4615 | ||
4616 | no_buffers: | |
b92ff8ee JB |
4617 | if (likely(rx_ring->next_to_use != i)) { |
4618 | rx_ring->next_to_use = i; | |
4619 | if (unlikely(i-- == 0)) i = (rx_ring->count - 1); | |
4620 | ||
4621 | /* Force memory writes to complete before letting h/w | |
4622 | * know there are new descriptors to fetch. (Only | |
4623 | * applicable for weak-ordered memory model archs, | |
4624 | * such as IA-64). */ | |
4625 | wmb(); | |
4626 | /* Hardware increments by 16 bytes, but packet split | |
4627 | * descriptors are 32 bytes...so we increment tail | |
4628 | * twice as much. | |
4629 | */ | |
4630 | writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt); | |
4631 | } | |
2d7edb92 MC |
4632 | } |
4633 | ||
1da177e4 LT |
4634 | /** |
4635 | * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers. | |
4636 | * @adapter: | |
4637 | **/ | |
4638 | ||
4639 | static void | |
4640 | e1000_smartspeed(struct e1000_adapter *adapter) | |
4641 | { | |
4642 | uint16_t phy_status; | |
4643 | uint16_t phy_ctrl; | |
4644 | ||
96838a40 | 4645 | if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg || |
1da177e4 LT |
4646 | !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL)) |
4647 | return; | |
4648 | ||
96838a40 | 4649 | if (adapter->smartspeed == 0) { |
1da177e4 LT |
4650 | /* If Master/Slave config fault is asserted twice, |
4651 | * we assume back-to-back */ | |
4652 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); | |
96838a40 | 4653 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1da177e4 | 4654 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); |
96838a40 | 4655 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1da177e4 | 4656 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); |
96838a40 | 4657 | if (phy_ctrl & CR_1000T_MS_ENABLE) { |
1da177e4 LT |
4658 | phy_ctrl &= ~CR_1000T_MS_ENABLE; |
4659 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, | |
4660 | phy_ctrl); | |
4661 | adapter->smartspeed++; | |
96838a40 | 4662 | if (!e1000_phy_setup_autoneg(&adapter->hw) && |
1da177e4 LT |
4663 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, |
4664 | &phy_ctrl)) { | |
4665 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
4666 | MII_CR_RESTART_AUTO_NEG); | |
4667 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, | |
4668 | phy_ctrl); | |
4669 | } | |
4670 | } | |
4671 | return; | |
96838a40 | 4672 | } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) { |
1da177e4 LT |
4673 | /* If still no link, perhaps using 2/3 pair cable */ |
4674 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); | |
4675 | phy_ctrl |= CR_1000T_MS_ENABLE; | |
4676 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl); | |
96838a40 | 4677 | if (!e1000_phy_setup_autoneg(&adapter->hw) && |
1da177e4 LT |
4678 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) { |
4679 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
4680 | MII_CR_RESTART_AUTO_NEG); | |
4681 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl); | |
4682 | } | |
4683 | } | |
4684 | /* Restart process after E1000_SMARTSPEED_MAX iterations */ | |
96838a40 | 4685 | if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX) |
1da177e4 LT |
4686 | adapter->smartspeed = 0; |
4687 | } | |
4688 | ||
4689 | /** | |
4690 | * e1000_ioctl - | |
4691 | * @netdev: | |
4692 | * @ifreq: | |
4693 | * @cmd: | |
4694 | **/ | |
4695 | ||
4696 | static int | |
4697 | e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
4698 | { | |
4699 | switch (cmd) { | |
4700 | case SIOCGMIIPHY: | |
4701 | case SIOCGMIIREG: | |
4702 | case SIOCSMIIREG: | |
4703 | return e1000_mii_ioctl(netdev, ifr, cmd); | |
4704 | default: | |
4705 | return -EOPNOTSUPP; | |
4706 | } | |
4707 | } | |
4708 | ||
4709 | /** | |
4710 | * e1000_mii_ioctl - | |
4711 | * @netdev: | |
4712 | * @ifreq: | |
4713 | * @cmd: | |
4714 | **/ | |
4715 | ||
4716 | static int | |
4717 | e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
4718 | { | |
60490fe0 | 4719 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4720 | struct mii_ioctl_data *data = if_mii(ifr); |
4721 | int retval; | |
4722 | uint16_t mii_reg; | |
4723 | uint16_t spddplx; | |
97876fc6 | 4724 | unsigned long flags; |
1da177e4 | 4725 | |
96838a40 | 4726 | if (adapter->hw.media_type != e1000_media_type_copper) |
1da177e4 LT |
4727 | return -EOPNOTSUPP; |
4728 | ||
4729 | switch (cmd) { | |
4730 | case SIOCGMIIPHY: | |
4731 | data->phy_id = adapter->hw.phy_addr; | |
4732 | break; | |
4733 | case SIOCGMIIREG: | |
96838a40 | 4734 | if (!capable(CAP_NET_ADMIN)) |
1da177e4 | 4735 | return -EPERM; |
97876fc6 | 4736 | spin_lock_irqsave(&adapter->stats_lock, flags); |
96838a40 | 4737 | if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, |
97876fc6 MC |
4738 | &data->val_out)) { |
4739 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4740 | return -EIO; |
97876fc6 MC |
4741 | } |
4742 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 LT |
4743 | break; |
4744 | case SIOCSMIIREG: | |
96838a40 | 4745 | if (!capable(CAP_NET_ADMIN)) |
1da177e4 | 4746 | return -EPERM; |
96838a40 | 4747 | if (data->reg_num & ~(0x1F)) |
1da177e4 LT |
4748 | return -EFAULT; |
4749 | mii_reg = data->val_in; | |
97876fc6 | 4750 | spin_lock_irqsave(&adapter->stats_lock, flags); |
96838a40 | 4751 | if (e1000_write_phy_reg(&adapter->hw, data->reg_num, |
97876fc6 MC |
4752 | mii_reg)) { |
4753 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4754 | return -EIO; |
97876fc6 | 4755 | } |
dc86d32a | 4756 | if (adapter->hw.media_type == e1000_media_type_copper) { |
1da177e4 LT |
4757 | switch (data->reg_num) { |
4758 | case PHY_CTRL: | |
96838a40 | 4759 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4760 | break; |
96838a40 | 4761 | if (mii_reg & MII_CR_AUTO_NEG_EN) { |
1da177e4 LT |
4762 | adapter->hw.autoneg = 1; |
4763 | adapter->hw.autoneg_advertised = 0x2F; | |
4764 | } else { | |
4765 | if (mii_reg & 0x40) | |
4766 | spddplx = SPEED_1000; | |
4767 | else if (mii_reg & 0x2000) | |
4768 | spddplx = SPEED_100; | |
4769 | else | |
4770 | spddplx = SPEED_10; | |
4771 | spddplx += (mii_reg & 0x100) | |
cb764326 JK |
4772 | ? DUPLEX_FULL : |
4773 | DUPLEX_HALF; | |
1da177e4 LT |
4774 | retval = e1000_set_spd_dplx(adapter, |
4775 | spddplx); | |
96838a40 | 4776 | if (retval) { |
97876fc6 | 4777 | spin_unlock_irqrestore( |
96838a40 | 4778 | &adapter->stats_lock, |
97876fc6 | 4779 | flags); |
1da177e4 | 4780 | return retval; |
97876fc6 | 4781 | } |
1da177e4 | 4782 | } |
2db10a08 AK |
4783 | if (netif_running(adapter->netdev)) |
4784 | e1000_reinit_locked(adapter); | |
4785 | else | |
1da177e4 LT |
4786 | e1000_reset(adapter); |
4787 | break; | |
4788 | case M88E1000_PHY_SPEC_CTRL: | |
4789 | case M88E1000_EXT_PHY_SPEC_CTRL: | |
96838a40 | 4790 | if (e1000_phy_reset(&adapter->hw)) { |
97876fc6 MC |
4791 | spin_unlock_irqrestore( |
4792 | &adapter->stats_lock, flags); | |
1da177e4 | 4793 | return -EIO; |
97876fc6 | 4794 | } |
1da177e4 LT |
4795 | break; |
4796 | } | |
4797 | } else { | |
4798 | switch (data->reg_num) { | |
4799 | case PHY_CTRL: | |
96838a40 | 4800 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4801 | break; |
2db10a08 AK |
4802 | if (netif_running(adapter->netdev)) |
4803 | e1000_reinit_locked(adapter); | |
4804 | else | |
1da177e4 LT |
4805 | e1000_reset(adapter); |
4806 | break; | |
4807 | } | |
4808 | } | |
97876fc6 | 4809 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
1da177e4 LT |
4810 | break; |
4811 | default: | |
4812 | return -EOPNOTSUPP; | |
4813 | } | |
4814 | return E1000_SUCCESS; | |
4815 | } | |
4816 | ||
4817 | void | |
4818 | e1000_pci_set_mwi(struct e1000_hw *hw) | |
4819 | { | |
4820 | struct e1000_adapter *adapter = hw->back; | |
2648345f | 4821 | int ret_val = pci_set_mwi(adapter->pdev); |
1da177e4 | 4822 | |
96838a40 | 4823 | if (ret_val) |
2648345f | 4824 | DPRINTK(PROBE, ERR, "Error in setting MWI\n"); |
1da177e4 LT |
4825 | } |
4826 | ||
4827 | void | |
4828 | e1000_pci_clear_mwi(struct e1000_hw *hw) | |
4829 | { | |
4830 | struct e1000_adapter *adapter = hw->back; | |
4831 | ||
4832 | pci_clear_mwi(adapter->pdev); | |
4833 | } | |
4834 | ||
4835 | void | |
4836 | e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4837 | { | |
4838 | struct e1000_adapter *adapter = hw->back; | |
4839 | ||
4840 | pci_read_config_word(adapter->pdev, reg, value); | |
4841 | } | |
4842 | ||
4843 | void | |
4844 | e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4845 | { | |
4846 | struct e1000_adapter *adapter = hw->back; | |
4847 | ||
4848 | pci_write_config_word(adapter->pdev, reg, *value); | |
4849 | } | |
4850 | ||
caeccb68 JK |
4851 | int32_t |
4852 | e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4853 | { | |
4854 | struct e1000_adapter *adapter = hw->back; | |
4855 | uint16_t cap_offset; | |
4856 | ||
4857 | cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP); | |
4858 | if (!cap_offset) | |
4859 | return -E1000_ERR_CONFIG; | |
4860 | ||
4861 | pci_read_config_word(adapter->pdev, cap_offset + reg, value); | |
4862 | ||
4863 | return E1000_SUCCESS; | |
4864 | } | |
4865 | ||
1da177e4 LT |
4866 | void |
4867 | e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value) | |
4868 | { | |
4869 | outl(value, port); | |
4870 | } | |
4871 | ||
4872 | static void | |
4873 | e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
4874 | { | |
60490fe0 | 4875 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4876 | uint32_t ctrl, rctl; |
4877 | ||
4878 | e1000_irq_disable(adapter); | |
4879 | adapter->vlgrp = grp; | |
4880 | ||
96838a40 | 4881 | if (grp) { |
1da177e4 LT |
4882 | /* enable VLAN tag insert/strip */ |
4883 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4884 | ctrl |= E1000_CTRL_VME; | |
4885 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4886 | ||
cd94dd0b | 4887 | if (adapter->hw.mac_type != e1000_ich8lan) { |
90fb5135 AK |
4888 | /* enable VLAN receive filtering */ |
4889 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4890 | rctl |= E1000_RCTL_VFE; | |
4891 | rctl &= ~E1000_RCTL_CFIEN; | |
4892 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
4893 | e1000_update_mng_vlan(adapter); | |
cd94dd0b | 4894 | } |
1da177e4 LT |
4895 | } else { |
4896 | /* disable VLAN tag insert/strip */ | |
4897 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4898 | ctrl &= ~E1000_CTRL_VME; | |
4899 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4900 | ||
cd94dd0b | 4901 | if (adapter->hw.mac_type != e1000_ich8lan) { |
90fb5135 AK |
4902 | /* disable VLAN filtering */ |
4903 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4904 | rctl &= ~E1000_RCTL_VFE; | |
4905 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
4906 | if (adapter->mng_vlan_id != | |
4907 | (uint16_t)E1000_MNG_VLAN_NONE) { | |
4908 | e1000_vlan_rx_kill_vid(netdev, | |
4909 | adapter->mng_vlan_id); | |
4910 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
4911 | } | |
cd94dd0b | 4912 | } |
1da177e4 LT |
4913 | } |
4914 | ||
4915 | e1000_irq_enable(adapter); | |
4916 | } | |
4917 | ||
4918 | static void | |
4919 | e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid) | |
4920 | { | |
60490fe0 | 4921 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 4922 | uint32_t vfta, index; |
96838a40 JB |
4923 | |
4924 | if ((adapter->hw.mng_cookie.status & | |
4925 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
4926 | (vid == adapter->mng_vlan_id)) | |
2d7edb92 | 4927 | return; |
1da177e4 LT |
4928 | /* add VID to filter table */ |
4929 | index = (vid >> 5) & 0x7F; | |
4930 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
4931 | vfta |= (1 << (vid & 0x1F)); | |
4932 | e1000_write_vfta(&adapter->hw, index, vfta); | |
4933 | } | |
4934 | ||
4935 | static void | |
4936 | e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid) | |
4937 | { | |
60490fe0 | 4938 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4939 | uint32_t vfta, index; |
4940 | ||
4941 | e1000_irq_disable(adapter); | |
4942 | ||
96838a40 | 4943 | if (adapter->vlgrp) |
1da177e4 LT |
4944 | adapter->vlgrp->vlan_devices[vid] = NULL; |
4945 | ||
4946 | e1000_irq_enable(adapter); | |
4947 | ||
96838a40 JB |
4948 | if ((adapter->hw.mng_cookie.status & |
4949 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
ff147013 JK |
4950 | (vid == adapter->mng_vlan_id)) { |
4951 | /* release control to f/w */ | |
4952 | e1000_release_hw_control(adapter); | |
2d7edb92 | 4953 | return; |
ff147013 JK |
4954 | } |
4955 | ||
1da177e4 LT |
4956 | /* remove VID from filter table */ |
4957 | index = (vid >> 5) & 0x7F; | |
4958 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
4959 | vfta &= ~(1 << (vid & 0x1F)); | |
4960 | e1000_write_vfta(&adapter->hw, index, vfta); | |
4961 | } | |
4962 | ||
4963 | static void | |
4964 | e1000_restore_vlan(struct e1000_adapter *adapter) | |
4965 | { | |
4966 | e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp); | |
4967 | ||
96838a40 | 4968 | if (adapter->vlgrp) { |
1da177e4 | 4969 | uint16_t vid; |
96838a40 JB |
4970 | for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { |
4971 | if (!adapter->vlgrp->vlan_devices[vid]) | |
1da177e4 LT |
4972 | continue; |
4973 | e1000_vlan_rx_add_vid(adapter->netdev, vid); | |
4974 | } | |
4975 | } | |
4976 | } | |
4977 | ||
4978 | int | |
4979 | e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx) | |
4980 | { | |
4981 | adapter->hw.autoneg = 0; | |
4982 | ||
6921368f | 4983 | /* Fiber NICs only allow 1000 gbps Full duplex */ |
96838a40 | 4984 | if ((adapter->hw.media_type == e1000_media_type_fiber) && |
6921368f MC |
4985 | spddplx != (SPEED_1000 + DUPLEX_FULL)) { |
4986 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); | |
4987 | return -EINVAL; | |
4988 | } | |
4989 | ||
96838a40 | 4990 | switch (spddplx) { |
1da177e4 LT |
4991 | case SPEED_10 + DUPLEX_HALF: |
4992 | adapter->hw.forced_speed_duplex = e1000_10_half; | |
4993 | break; | |
4994 | case SPEED_10 + DUPLEX_FULL: | |
4995 | adapter->hw.forced_speed_duplex = e1000_10_full; | |
4996 | break; | |
4997 | case SPEED_100 + DUPLEX_HALF: | |
4998 | adapter->hw.forced_speed_duplex = e1000_100_half; | |
4999 | break; | |
5000 | case SPEED_100 + DUPLEX_FULL: | |
5001 | adapter->hw.forced_speed_duplex = e1000_100_full; | |
5002 | break; | |
5003 | case SPEED_1000 + DUPLEX_FULL: | |
5004 | adapter->hw.autoneg = 1; | |
5005 | adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL; | |
5006 | break; | |
5007 | case SPEED_1000 + DUPLEX_HALF: /* not supported */ | |
5008 | default: | |
2648345f | 5009 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); |
1da177e4 LT |
5010 | return -EINVAL; |
5011 | } | |
5012 | return 0; | |
5013 | } | |
5014 | ||
b6a1d5f8 | 5015 | #ifdef CONFIG_PM |
0f15a8fa JK |
5016 | /* Save/restore 16 or 64 dwords of PCI config space depending on which |
5017 | * bus we're on (PCI(X) vs. PCI-E) | |
2f82665f JB |
5018 | */ |
5019 | #define PCIE_CONFIG_SPACE_LEN 256 | |
5020 | #define PCI_CONFIG_SPACE_LEN 64 | |
5021 | static int | |
5022 | e1000_pci_save_state(struct e1000_adapter *adapter) | |
5023 | { | |
5024 | struct pci_dev *dev = adapter->pdev; | |
5025 | int size; | |
5026 | int i; | |
0f15a8fa | 5027 | |
2f82665f JB |
5028 | if (adapter->hw.mac_type >= e1000_82571) |
5029 | size = PCIE_CONFIG_SPACE_LEN; | |
5030 | else | |
5031 | size = PCI_CONFIG_SPACE_LEN; | |
5032 | ||
5033 | WARN_ON(adapter->config_space != NULL); | |
5034 | ||
5035 | adapter->config_space = kmalloc(size, GFP_KERNEL); | |
5036 | if (!adapter->config_space) { | |
5037 | DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size); | |
5038 | return -ENOMEM; | |
5039 | } | |
5040 | for (i = 0; i < (size / 4); i++) | |
5041 | pci_read_config_dword(dev, i * 4, &adapter->config_space[i]); | |
5042 | return 0; | |
5043 | } | |
5044 | ||
5045 | static void | |
5046 | e1000_pci_restore_state(struct e1000_adapter *adapter) | |
5047 | { | |
5048 | struct pci_dev *dev = adapter->pdev; | |
5049 | int size; | |
5050 | int i; | |
0f15a8fa | 5051 | |
2f82665f JB |
5052 | if (adapter->config_space == NULL) |
5053 | return; | |
0f15a8fa | 5054 | |
2f82665f JB |
5055 | if (adapter->hw.mac_type >= e1000_82571) |
5056 | size = PCIE_CONFIG_SPACE_LEN; | |
5057 | else | |
5058 | size = PCI_CONFIG_SPACE_LEN; | |
5059 | for (i = 0; i < (size / 4); i++) | |
5060 | pci_write_config_dword(dev, i * 4, adapter->config_space[i]); | |
5061 | kfree(adapter->config_space); | |
5062 | adapter->config_space = NULL; | |
5063 | return; | |
5064 | } | |
5065 | #endif /* CONFIG_PM */ | |
5066 | ||
1da177e4 | 5067 | static int |
829ca9a3 | 5068 | e1000_suspend(struct pci_dev *pdev, pm_message_t state) |
1da177e4 LT |
5069 | { |
5070 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 5071 | struct e1000_adapter *adapter = netdev_priv(netdev); |
0fccd0e9 | 5072 | uint32_t ctrl, ctrl_ext, rctl, status; |
1da177e4 | 5073 | uint32_t wufc = adapter->wol; |
6fdfef16 | 5074 | #ifdef CONFIG_PM |
240b1710 | 5075 | int retval = 0; |
6fdfef16 | 5076 | #endif |
1da177e4 LT |
5077 | |
5078 | netif_device_detach(netdev); | |
5079 | ||
2db10a08 AK |
5080 | if (netif_running(netdev)) { |
5081 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); | |
1da177e4 | 5082 | e1000_down(adapter); |
2db10a08 | 5083 | } |
1da177e4 | 5084 | |
2f82665f | 5085 | #ifdef CONFIG_PM |
0f15a8fa JK |
5086 | /* Implement our own version of pci_save_state(pdev) because pci- |
5087 | * express adapters have 256-byte config spaces. */ | |
2f82665f JB |
5088 | retval = e1000_pci_save_state(adapter); |
5089 | if (retval) | |
5090 | return retval; | |
5091 | #endif | |
5092 | ||
1da177e4 | 5093 | status = E1000_READ_REG(&adapter->hw, STATUS); |
96838a40 | 5094 | if (status & E1000_STATUS_LU) |
1da177e4 LT |
5095 | wufc &= ~E1000_WUFC_LNKC; |
5096 | ||
96838a40 | 5097 | if (wufc) { |
1da177e4 LT |
5098 | e1000_setup_rctl(adapter); |
5099 | e1000_set_multi(netdev); | |
5100 | ||
5101 | /* turn on all-multi mode if wake on multicast is enabled */ | |
120cd576 | 5102 | if (wufc & E1000_WUFC_MC) { |
1da177e4 LT |
5103 | rctl = E1000_READ_REG(&adapter->hw, RCTL); |
5104 | rctl |= E1000_RCTL_MPE; | |
5105 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
5106 | } | |
5107 | ||
96838a40 | 5108 | if (adapter->hw.mac_type >= e1000_82540) { |
1da177e4 LT |
5109 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); |
5110 | /* advertise wake from D3Cold */ | |
5111 | #define E1000_CTRL_ADVD3WUC 0x00100000 | |
5112 | /* phy power management enable */ | |
5113 | #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 | |
5114 | ctrl |= E1000_CTRL_ADVD3WUC | | |
5115 | E1000_CTRL_EN_PHY_PWR_MGMT; | |
5116 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
5117 | } | |
5118 | ||
96838a40 | 5119 | if (adapter->hw.media_type == e1000_media_type_fiber || |
1da177e4 LT |
5120 | adapter->hw.media_type == e1000_media_type_internal_serdes) { |
5121 | /* keep the laser running in D3 */ | |
5122 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
5123 | ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA; | |
5124 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext); | |
5125 | } | |
5126 | ||
2d7edb92 MC |
5127 | /* Allow time for pending master requests to run */ |
5128 | e1000_disable_pciex_master(&adapter->hw); | |
5129 | ||
1da177e4 LT |
5130 | E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN); |
5131 | E1000_WRITE_REG(&adapter->hw, WUFC, wufc); | |
d0e027db AK |
5132 | pci_enable_wake(pdev, PCI_D3hot, 1); |
5133 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1da177e4 LT |
5134 | } else { |
5135 | E1000_WRITE_REG(&adapter->hw, WUC, 0); | |
5136 | E1000_WRITE_REG(&adapter->hw, WUFC, 0); | |
d0e027db AK |
5137 | pci_enable_wake(pdev, PCI_D3hot, 0); |
5138 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 LT |
5139 | } |
5140 | ||
0fccd0e9 JG |
5141 | e1000_release_manageability(adapter); |
5142 | ||
5143 | /* make sure adapter isn't asleep if manageability is enabled */ | |
5144 | if (adapter->en_mng_pt) { | |
5145 | pci_enable_wake(pdev, PCI_D3hot, 1); | |
5146 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1da177e4 LT |
5147 | } |
5148 | ||
cd94dd0b AK |
5149 | if (adapter->hw.phy_type == e1000_phy_igp_3) |
5150 | e1000_phy_powerdown_workaround(&adapter->hw); | |
5151 | ||
edd106fc AK |
5152 | if (netif_running(netdev)) |
5153 | e1000_free_irq(adapter); | |
5154 | ||
b55ccb35 JK |
5155 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
5156 | * would have already happened in close and is redundant. */ | |
5157 | e1000_release_hw_control(adapter); | |
2d7edb92 | 5158 | |
1da177e4 | 5159 | pci_disable_device(pdev); |
240b1710 | 5160 | |
d0e027db | 5161 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
1da177e4 LT |
5162 | |
5163 | return 0; | |
5164 | } | |
5165 | ||
2f82665f | 5166 | #ifdef CONFIG_PM |
1da177e4 LT |
5167 | static int |
5168 | e1000_resume(struct pci_dev *pdev) | |
5169 | { | |
5170 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 5171 | struct e1000_adapter *adapter = netdev_priv(netdev); |
0fccd0e9 | 5172 | uint32_t err; |
1da177e4 | 5173 | |
d0e027db | 5174 | pci_set_power_state(pdev, PCI_D0); |
2f82665f | 5175 | e1000_pci_restore_state(adapter); |
3d1dd8cb AK |
5176 | if ((err = pci_enable_device(pdev))) { |
5177 | printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n"); | |
5178 | return err; | |
5179 | } | |
a4cb847d | 5180 | pci_set_master(pdev); |
1da177e4 | 5181 | |
d0e027db AK |
5182 | pci_enable_wake(pdev, PCI_D3hot, 0); |
5183 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 | 5184 | |
edd106fc AK |
5185 | if (netif_running(netdev) && (err = e1000_request_irq(adapter))) |
5186 | return err; | |
5187 | ||
5188 | e1000_power_up_phy(adapter); | |
1da177e4 LT |
5189 | e1000_reset(adapter); |
5190 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | |
5191 | ||
0fccd0e9 JG |
5192 | e1000_init_manageability(adapter); |
5193 | ||
96838a40 | 5194 | if (netif_running(netdev)) |
1da177e4 LT |
5195 | e1000_up(adapter); |
5196 | ||
5197 | netif_device_attach(netdev); | |
5198 | ||
b55ccb35 JK |
5199 | /* If the controller is 82573 and f/w is AMT, do not set |
5200 | * DRV_LOAD until the interface is up. For all other cases, | |
5201 | * let the f/w know that the h/w is now under the control | |
5202 | * of the driver. */ | |
5203 | if (adapter->hw.mac_type != e1000_82573 || | |
5204 | !e1000_check_mng_mode(&adapter->hw)) | |
5205 | e1000_get_hw_control(adapter); | |
2d7edb92 | 5206 | |
1da177e4 LT |
5207 | return 0; |
5208 | } | |
5209 | #endif | |
c653e635 AK |
5210 | |
5211 | static void e1000_shutdown(struct pci_dev *pdev) | |
5212 | { | |
5213 | e1000_suspend(pdev, PMSG_SUSPEND); | |
5214 | } | |
5215 | ||
1da177e4 LT |
5216 | #ifdef CONFIG_NET_POLL_CONTROLLER |
5217 | /* | |
5218 | * Polling 'interrupt' - used by things like netconsole to send skbs | |
5219 | * without having to re-enable interrupts. It's not called while | |
5220 | * the interrupt routine is executing. | |
5221 | */ | |
5222 | static void | |
2648345f | 5223 | e1000_netpoll(struct net_device *netdev) |
1da177e4 | 5224 | { |
60490fe0 | 5225 | struct e1000_adapter *adapter = netdev_priv(netdev); |
d3d9e484 | 5226 | |
1da177e4 | 5227 | disable_irq(adapter->pdev->irq); |
7d12e780 | 5228 | e1000_intr(adapter->pdev->irq, netdev); |
c4cfe567 | 5229 | e1000_clean_tx_irq(adapter, adapter->tx_ring); |
e8da8be1 JK |
5230 | #ifndef CONFIG_E1000_NAPI |
5231 | adapter->clean_rx(adapter, adapter->rx_ring); | |
5232 | #endif | |
1da177e4 LT |
5233 | enable_irq(adapter->pdev->irq); |
5234 | } | |
5235 | #endif | |
5236 | ||
9026729b AK |
5237 | /** |
5238 | * e1000_io_error_detected - called when PCI error is detected | |
5239 | * @pdev: Pointer to PCI device | |
5240 | * @state: The current pci conneection state | |
5241 | * | |
5242 | * This function is called after a PCI bus error affecting | |
5243 | * this device has been detected. | |
5244 | */ | |
5245 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) | |
5246 | { | |
5247 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5248 | struct e1000_adapter *adapter = netdev->priv; | |
5249 | ||
5250 | netif_device_detach(netdev); | |
5251 | ||
5252 | if (netif_running(netdev)) | |
5253 | e1000_down(adapter); | |
72e8d6bb | 5254 | pci_disable_device(pdev); |
9026729b AK |
5255 | |
5256 | /* Request a slot slot reset. */ | |
5257 | return PCI_ERS_RESULT_NEED_RESET; | |
5258 | } | |
5259 | ||
5260 | /** | |
5261 | * e1000_io_slot_reset - called after the pci bus has been reset. | |
5262 | * @pdev: Pointer to PCI device | |
5263 | * | |
5264 | * Restart the card from scratch, as if from a cold-boot. Implementation | |
5265 | * resembles the first-half of the e1000_resume routine. | |
5266 | */ | |
5267 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) | |
5268 | { | |
5269 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5270 | struct e1000_adapter *adapter = netdev->priv; | |
5271 | ||
5272 | if (pci_enable_device(pdev)) { | |
5273 | printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n"); | |
5274 | return PCI_ERS_RESULT_DISCONNECT; | |
5275 | } | |
5276 | pci_set_master(pdev); | |
5277 | ||
dbf38c94 LV |
5278 | pci_enable_wake(pdev, PCI_D3hot, 0); |
5279 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
9026729b | 5280 | |
9026729b AK |
5281 | e1000_reset(adapter); |
5282 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | |
5283 | ||
5284 | return PCI_ERS_RESULT_RECOVERED; | |
5285 | } | |
5286 | ||
5287 | /** | |
5288 | * e1000_io_resume - called when traffic can start flowing again. | |
5289 | * @pdev: Pointer to PCI device | |
5290 | * | |
5291 | * This callback is called when the error recovery driver tells us that | |
5292 | * its OK to resume normal operation. Implementation resembles the | |
5293 | * second-half of the e1000_resume routine. | |
5294 | */ | |
5295 | static void e1000_io_resume(struct pci_dev *pdev) | |
5296 | { | |
5297 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5298 | struct e1000_adapter *adapter = netdev->priv; | |
0fccd0e9 JG |
5299 | |
5300 | e1000_init_manageability(adapter); | |
9026729b AK |
5301 | |
5302 | if (netif_running(netdev)) { | |
5303 | if (e1000_up(adapter)) { | |
5304 | printk("e1000: can't bring device back up after reset\n"); | |
5305 | return; | |
5306 | } | |
5307 | } | |
5308 | ||
5309 | netif_device_attach(netdev); | |
5310 | ||
0fccd0e9 JG |
5311 | /* If the controller is 82573 and f/w is AMT, do not set |
5312 | * DRV_LOAD until the interface is up. For all other cases, | |
5313 | * let the f/w know that the h/w is now under the control | |
5314 | * of the driver. */ | |
5315 | if (adapter->hw.mac_type != e1000_82573 || | |
5316 | !e1000_check_mng_mode(&adapter->hw)) | |
5317 | e1000_get_hw_control(adapter); | |
9026729b | 5318 | |
9026729b AK |
5319 | } |
5320 | ||
1da177e4 | 5321 | /* e1000_main.c */ |