Merge branch 'for-davem' of git://git.kernel.org/pub/scm/linux/kernel/git/linville...
[linux-block.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2
0abb6eb1
AK
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
eab2abf5 34#define DRV_VERSION "7.3.21-k6-NAPI"
abec42a4
SH
35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT
37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
a3aa1884 45static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
1da177e4
LT
46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT
66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT
82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN
88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN
93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN
104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT
106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT
112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC
118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT
125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4 127static void e1000_82547_tx_fifo_stall(unsigned long data);
3b29a56d
SH
128static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
129 struct net_device *netdev);
1da177e4
LT
130static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
131static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
132static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 133static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP
134static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
bea3348e 136static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP
137static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
edbbb3ca
JB
140static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
141 struct e1000_rx_ring *rx_ring,
142 int *work_done, int work_to_do);
581d708e 143static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 144 struct e1000_rx_ring *rx_ring,
72d64a43 145 int cleaned_count);
edbbb3ca
JB
146static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring,
148 int cleaned_count);
1da177e4
LT
149static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
150static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
151 int cmd);
1da177e4
LT
152static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
153static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
154static void e1000_tx_timeout(struct net_device *dev);
65f27f38 155static void e1000_reset_task(struct work_struct *work);
1da177e4 156static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK
157static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
158 struct sk_buff *skb);
1da177e4
LT
159
160static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP
161static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
162static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT
163static void e1000_restore_vlan(struct e1000_adapter *adapter);
164
6fdfef16 165#ifdef CONFIG_PM
b43fcd7d 166static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT
167static int e1000_resume(struct pci_dev *pdev);
168#endif
c653e635 169static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT
170
171#ifdef CONFIG_NET_POLL_CONTROLLER
172/* for netdump / net console */
173static void e1000_netpoll (struct net_device *netdev);
174#endif
175
1f753861
JB
176#define COPYBREAK_DEFAULT 256
177static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
178module_param(copybreak, uint, 0644);
179MODULE_PARM_DESC(copybreak,
180 "Maximum size of packet that is copied to a new buffer on receive");
181
9026729b
AK
182static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
183 pci_channel_state_t state);
184static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
185static void e1000_io_resume(struct pci_dev *pdev);
186
187static struct pci_error_handlers e1000_err_handler = {
188 .error_detected = e1000_io_error_detected,
189 .slot_reset = e1000_io_slot_reset,
190 .resume = e1000_io_resume,
191};
24025e4e 192
1da177e4
LT
193static struct pci_driver e1000_driver = {
194 .name = e1000_driver_name,
195 .id_table = e1000_pci_tbl,
196 .probe = e1000_probe,
197 .remove = __devexit_p(e1000_remove),
c4e24f01 198#ifdef CONFIG_PM
1da177e4 199 /* Power Managment Hooks */
1da177e4 200 .suspend = e1000_suspend,
c653e635 201 .resume = e1000_resume,
1da177e4 202#endif
9026729b
AK
203 .shutdown = e1000_shutdown,
204 .err_handler = &e1000_err_handler
1da177e4
LT
205};
206
207MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
208MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
209MODULE_LICENSE("GPL");
210MODULE_VERSION(DRV_VERSION);
211
212static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
213module_param(debug, int, 0);
214MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
215
675ad473
ET
216/**
217 * e1000_get_hw_dev - return device
218 * used by hardware layer to print debugging information
219 *
220 **/
221struct net_device *e1000_get_hw_dev(struct e1000_hw *hw)
222{
223 struct e1000_adapter *adapter = hw->back;
224 return adapter->netdev;
225}
226
1da177e4
LT
227/**
228 * e1000_init_module - Driver Registration Routine
229 *
230 * e1000_init_module is the first routine called when the driver is
231 * loaded. All it does is register with the PCI subsystem.
232 **/
233
64798845 234static int __init e1000_init_module(void)
1da177e4
LT
235{
236 int ret;
675ad473 237 pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version);
1da177e4 238
675ad473 239 pr_info("%s\n", e1000_copyright);
1da177e4 240
29917620 241 ret = pci_register_driver(&e1000_driver);
1f753861
JB
242 if (copybreak != COPYBREAK_DEFAULT) {
243 if (copybreak == 0)
675ad473 244 pr_info("copybreak disabled\n");
1f753861 245 else
675ad473
ET
246 pr_info("copybreak enabled for "
247 "packets <= %u bytes\n", copybreak);
1f753861 248 }
1da177e4
LT
249 return ret;
250}
251
252module_init(e1000_init_module);
253
254/**
255 * e1000_exit_module - Driver Exit Cleanup Routine
256 *
257 * e1000_exit_module is called just before the driver is removed
258 * from memory.
259 **/
260
64798845 261static void __exit e1000_exit_module(void)
1da177e4 262{
1da177e4
LT
263 pci_unregister_driver(&e1000_driver);
264}
265
266module_exit(e1000_exit_module);
267
2db10a08
AK
268static int e1000_request_irq(struct e1000_adapter *adapter)
269{
270 struct net_device *netdev = adapter->netdev;
3e18826c 271 irq_handler_t handler = e1000_intr;
e94bd23f
AK
272 int irq_flags = IRQF_SHARED;
273 int err;
2db10a08 274
e94bd23f
AK
275 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
276 netdev);
277 if (err) {
feb8f478 278 e_err(probe, "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 279 }
2db10a08
AK
280
281 return err;
282}
283
284static void e1000_free_irq(struct e1000_adapter *adapter)
285{
286 struct net_device *netdev = adapter->netdev;
287
288 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK
289}
290
1da177e4
LT
291/**
292 * e1000_irq_disable - Mask off interrupt generation on the NIC
293 * @adapter: board private structure
294 **/
295
64798845 296static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 297{
1dc32918
JP
298 struct e1000_hw *hw = &adapter->hw;
299
300 ew32(IMC, ~0);
301 E1000_WRITE_FLUSH();
1da177e4
LT
302 synchronize_irq(adapter->pdev->irq);
303}
304
305/**
306 * e1000_irq_enable - Enable default interrupt generation settings
307 * @adapter: board private structure
308 **/
309
64798845 310static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 311{
1dc32918
JP
312 struct e1000_hw *hw = &adapter->hw;
313
314 ew32(IMS, IMS_ENABLE_MASK);
315 E1000_WRITE_FLUSH();
1da177e4 316}
3ad2cc67 317
64798845 318static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 319{
1dc32918 320 struct e1000_hw *hw = &adapter->hw;
2d7edb92 321 struct net_device *netdev = adapter->netdev;
1dc32918 322 u16 vid = hw->mng_cookie.vlan_id;
406874a7 323 u16 old_vid = adapter->mng_vlan_id;
96838a40 324 if (adapter->vlgrp) {
5c15bdec 325 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 326 if (hw->mng_cookie.status &
2d7edb92
MC
327 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
328 e1000_vlan_rx_add_vid(netdev, vid);
329 adapter->mng_vlan_id = vid;
330 } else
331 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 332
406874a7 333 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 334 (vid != old_vid) &&
5c15bdec 335 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 336 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK
337 } else
338 adapter->mng_vlan_id = vid;
2d7edb92
MC
339 }
340}
b55ccb35 341
64798845 342static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 343{
1dc32918
JP
344 struct e1000_hw *hw = &adapter->hw;
345
0fccd0e9 346 if (adapter->en_mng_pt) {
1dc32918 347 u32 manc = er32(MANC);
0fccd0e9
JG
348
349 /* disable hardware interception of ARP */
350 manc &= ~(E1000_MANC_ARP_EN);
351
1dc32918 352 ew32(MANC, manc);
0fccd0e9
JG
353 }
354}
355
64798845 356static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 357{
1dc32918
JP
358 struct e1000_hw *hw = &adapter->hw;
359
0fccd0e9 360 if (adapter->en_mng_pt) {
1dc32918 361 u32 manc = er32(MANC);
0fccd0e9
JG
362
363 /* re-enable hardware interception of ARP */
364 manc |= E1000_MANC_ARP_EN;
365
1dc32918 366 ew32(MANC, manc);
0fccd0e9
JG
367 }
368}
369
e0aac5a2
AK
370/**
371 * e1000_configure - configure the hardware for RX and TX
372 * @adapter = private board structure
373 **/
374static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT
375{
376 struct net_device *netdev = adapter->netdev;
2db10a08 377 int i;
1da177e4 378
db0ce50d 379 e1000_set_rx_mode(netdev);
1da177e4
LT
380
381 e1000_restore_vlan(adapter);
0fccd0e9 382 e1000_init_manageability(adapter);
1da177e4
LT
383
384 e1000_configure_tx(adapter);
385 e1000_setup_rctl(adapter);
386 e1000_configure_rx(adapter);
72d64a43
JK
387 /* call E1000_DESC_UNUSED which always leaves
388 * at least 1 descriptor unused to make sure
389 * next_to_use != next_to_clean */
f56799ea 390 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 391 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK
392 adapter->alloc_rx_buf(adapter, ring,
393 E1000_DESC_UNUSED(ring));
f56799ea 394 }
e0aac5a2
AK
395}
396
397int e1000_up(struct e1000_adapter *adapter)
398{
1dc32918
JP
399 struct e1000_hw *hw = &adapter->hw;
400
e0aac5a2
AK
401 /* hardware has been reset, we need to reload some things */
402 e1000_configure(adapter);
403
404 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 405
bea3348e 406 napi_enable(&adapter->napi);
c3570acb 407
5de55624
MC
408 e1000_irq_enable(adapter);
409
4cb9be7a
JB
410 netif_wake_queue(adapter->netdev);
411
79f3d399 412 /* fire a link change interrupt to start the watchdog */
1dc32918 413 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT
414 return 0;
415}
416
79f05bf0
AK
417/**
418 * e1000_power_up_phy - restore link in case the phy was powered down
419 * @adapter: address of board private structure
420 *
421 * The phy may be powered down to save power and turn off link when the
422 * driver is unloaded and wake on lan is not enabled (among others)
423 * *** this routine MUST be followed by a call to e1000_reset ***
424 *
425 **/
426
d658266e 427void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 428{
1dc32918 429 struct e1000_hw *hw = &adapter->hw;
406874a7 430 u16 mii_reg = 0;
79f05bf0
AK
431
432 /* Just clear the power down bit to wake the phy back up */
1dc32918 433 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK
434 /* according to the manual, the phy will retain its
435 * settings across a power-down/up cycle */
1dc32918 436 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 437 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 438 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK
439 }
440}
441
442static void e1000_power_down_phy(struct e1000_adapter *adapter)
443{
1dc32918
JP
444 struct e1000_hw *hw = &adapter->hw;
445
61c2505f 446 /* Power down the PHY so no link is implied when interface is down *
c3033b01 447 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK
448 * (a) WoL is enabled
449 * (b) AMT is active
450 * (c) SoL/IDER session is active */
1dc32918
JP
451 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
452 hw->media_type == e1000_media_type_copper) {
406874a7 453 u16 mii_reg = 0;
61c2505f 454
1dc32918 455 switch (hw->mac_type) {
61c2505f
BA
456 case e1000_82540:
457 case e1000_82545:
458 case e1000_82545_rev_3:
459 case e1000_82546:
460 case e1000_82546_rev_3:
461 case e1000_82541:
462 case e1000_82541_rev_2:
463 case e1000_82547:
464 case e1000_82547_rev_2:
1dc32918 465 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA
466 goto out;
467 break;
61c2505f
BA
468 default:
469 goto out;
470 }
1dc32918 471 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 472 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 473 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK
474 mdelay(1);
475 }
61c2505f
BA
476out:
477 return;
79f05bf0
AK
478}
479
64798845 480void e1000_down(struct e1000_adapter *adapter)
1da177e4 481{
a6c42322 482 struct e1000_hw *hw = &adapter->hw;
1da177e4 483 struct net_device *netdev = adapter->netdev;
a6c42322 484 u32 rctl, tctl;
1da177e4 485
1314bbf3
AK
486 /* signal that we're down so the interrupt handler does not
487 * reschedule our watchdog timer */
488 set_bit(__E1000_DOWN, &adapter->flags);
489
a6c42322
JB
490 /* disable receives in the hardware */
491 rctl = er32(RCTL);
492 ew32(RCTL, rctl & ~E1000_RCTL_EN);
493 /* flush and sleep below */
494
51851073 495 netif_tx_disable(netdev);
a6c42322
JB
496
497 /* disable transmits in the hardware */
498 tctl = er32(TCTL);
499 tctl &= ~E1000_TCTL_EN;
500 ew32(TCTL, tctl);
501 /* flush both disables and wait for them to finish */
502 E1000_WRITE_FLUSH();
503 msleep(10);
504
bea3348e 505 napi_disable(&adapter->napi);
c3570acb 506
1da177e4 507 e1000_irq_disable(adapter);
c1605eb3 508
1da177e4
LT
509 del_timer_sync(&adapter->tx_fifo_stall_timer);
510 del_timer_sync(&adapter->watchdog_timer);
511 del_timer_sync(&adapter->phy_info_timer);
512
1da177e4
LT
513 adapter->link_speed = 0;
514 adapter->link_duplex = 0;
515 netif_carrier_off(netdev);
1da177e4
LT
516
517 e1000_reset(adapter);
581d708e
MC
518 e1000_clean_all_tx_rings(adapter);
519 e1000_clean_all_rx_rings(adapter);
1da177e4 520}
1da177e4 521
64798845 522void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK
523{
524 WARN_ON(in_interrupt());
525 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
526 msleep(1);
527 e1000_down(adapter);
528 e1000_up(adapter);
529 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
530}
531
64798845 532void e1000_reset(struct e1000_adapter *adapter)
1da177e4 533{
1dc32918 534 struct e1000_hw *hw = &adapter->hw;
406874a7 535 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 536 bool legacy_pba_adjust = false;
b7cb8c2c 537 u16 hwm;
1da177e4
LT
538
539 /* Repartition Pba for greater than 9k mtu
540 * To take effect CTRL.RST is required.
541 */
542
1dc32918 543 switch (hw->mac_type) {
018ea44e
BA
544 case e1000_82542_rev2_0:
545 case e1000_82542_rev2_1:
546 case e1000_82543:
547 case e1000_82544:
548 case e1000_82540:
549 case e1000_82541:
550 case e1000_82541_rev_2:
c3033b01 551 legacy_pba_adjust = true;
018ea44e
BA
552 pba = E1000_PBA_48K;
553 break;
554 case e1000_82545:
555 case e1000_82545_rev_3:
556 case e1000_82546:
557 case e1000_82546_rev_3:
558 pba = E1000_PBA_48K;
559 break;
2d7edb92 560 case e1000_82547:
0e6ef3e0 561 case e1000_82547_rev_2:
c3033b01 562 legacy_pba_adjust = true;
2d7edb92
MC
563 pba = E1000_PBA_30K;
564 break;
018ea44e
BA
565 case e1000_undefined:
566 case e1000_num_macs:
2d7edb92
MC
567 break;
568 }
569
c3033b01 570 if (legacy_pba_adjust) {
b7cb8c2c 571 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 572 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 573
1dc32918 574 if (hw->mac_type == e1000_82547) {
018ea44e
BA
575 adapter->tx_fifo_head = 0;
576 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
577 adapter->tx_fifo_size =
578 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
579 atomic_set(&adapter->tx_fifo_stall, 0);
580 }
b7cb8c2c 581 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 582 /* adjust PBA for jumbo frames */
1dc32918 583 ew32(PBA, pba);
018ea44e
BA
584
585 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 586 * large enough to accommodate two full transmit packets,
018ea44e 587 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 588 * the Rx FIFO should be large enough to accommodate at least
018ea44e
BA
589 * one full receive packet and is similarly rounded up and
590 * expressed in KB. */
1dc32918 591 pba = er32(PBA);
018ea44e
BA
592 /* upper 16 bits has Tx packet buffer allocation size in KB */
593 tx_space = pba >> 16;
594 /* lower 16 bits has Rx packet buffer allocation size in KB */
595 pba &= 0xffff;
b7cb8c2c
JB
596 /*
597 * the tx fifo also stores 16 bytes of information about the tx
598 * but don't include ethernet FCS because hardware appends it
599 */
600 min_tx_space = (hw->max_frame_size +
601 sizeof(struct e1000_tx_desc) -
602 ETH_FCS_LEN) * 2;
9099cfb9 603 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 604 min_tx_space >>= 10;
b7cb8c2c
JB
605 /* software strips receive CRC, so leave room for it */
606 min_rx_space = hw->max_frame_size;
9099cfb9 607 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA
608 min_rx_space >>= 10;
609
610 /* If current Tx allocation is less than the min Tx FIFO size,
611 * and the min Tx FIFO size is less than the current Rx FIFO
612 * allocation, take space away from current Rx allocation */
613 if (tx_space < min_tx_space &&
614 ((min_tx_space - tx_space) < pba)) {
615 pba = pba - (min_tx_space - tx_space);
616
617 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 618 switch (hw->mac_type) {
018ea44e
BA
619 case e1000_82545 ... e1000_82546_rev_3:
620 pba &= ~(E1000_PBA_8K - 1);
621 break;
622 default:
623 break;
624 }
625
626 /* if short on rx space, rx wins and must trump tx
627 * adjustment or use Early Receive if available */
1532ecea
JB
628 if (pba < min_rx_space)
629 pba = min_rx_space;
018ea44e 630 }
1da177e4 631 }
2d7edb92 632
1dc32918 633 ew32(PBA, pba);
1da177e4 634
b7cb8c2c
JB
635 /*
636 * flow control settings:
637 * The high water mark must be low enough to fit one full frame
638 * (or the size used for early receive) above it in the Rx FIFO.
639 * Set it to the lower of:
640 * - 90% of the Rx FIFO size, and
641 * - the full Rx FIFO size minus the early receive size (for parts
642 * with ERT support assuming ERT set to E1000_ERT_2048), or
643 * - the full Rx FIFO size minus one full frame
644 */
645 hwm = min(((pba << 10) * 9 / 10),
646 ((pba << 10) - hw->max_frame_size));
647
648 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
649 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 650 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP
651 hw->fc_send_xon = 1;
652 hw->fc = hw->original_fc;
1da177e4 653
2d7edb92 654 /* Allow time for pending master requests to run */
1dc32918
JP
655 e1000_reset_hw(hw);
656 if (hw->mac_type >= e1000_82544)
657 ew32(WUC, 0);
09ae3e88 658
1dc32918 659 if (e1000_init_hw(hw))
feb8f478 660 e_dev_err("Hardware Error\n");
2d7edb92 661 e1000_update_mng_vlan(adapter);
3d5460a0
JB
662
663 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 664 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP
665 hw->autoneg == 1 &&
666 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
667 u32 ctrl = er32(CTRL);
3d5460a0
JB
668 /* clear phy power management bit if we are in gig only mode,
669 * which if enabled will attempt negotiation to 100Mb, which
670 * can cause a loss of link at power off or driver unload */
671 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 672 ew32(CTRL, ctrl);
3d5460a0
JB
673 }
674
1da177e4 675 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 676 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 677
1dc32918
JP
678 e1000_reset_adaptive(hw);
679 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 680
0fccd0e9 681 e1000_release_manageability(adapter);
1da177e4
LT
682}
683
67b3c27c
AK
684/**
685 * Dump the eeprom for users having checksum issues
686 **/
b4ea895d 687static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK
688{
689 struct net_device *netdev = adapter->netdev;
690 struct ethtool_eeprom eeprom;
691 const struct ethtool_ops *ops = netdev->ethtool_ops;
692 u8 *data;
693 int i;
694 u16 csum_old, csum_new = 0;
695
696 eeprom.len = ops->get_eeprom_len(netdev);
697 eeprom.offset = 0;
698
699 data = kmalloc(eeprom.len, GFP_KERNEL);
700 if (!data) {
675ad473 701 pr_err("Unable to allocate memory to dump EEPROM data\n");
67b3c27c
AK
702 return;
703 }
704
705 ops->get_eeprom(netdev, &eeprom, data);
706
707 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
708 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
709 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
710 csum_new += data[i] + (data[i + 1] << 8);
711 csum_new = EEPROM_SUM - csum_new;
712
675ad473
ET
713 pr_err("/*********************/\n");
714 pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old);
715 pr_err("Calculated : 0x%04x\n", csum_new);
67b3c27c 716
675ad473
ET
717 pr_err("Offset Values\n");
718 pr_err("======== ======\n");
67b3c27c
AK
719 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
720
675ad473
ET
721 pr_err("Include this output when contacting your support provider.\n");
722 pr_err("This is not a software error! Something bad happened to\n");
723 pr_err("your hardware or EEPROM image. Ignoring this problem could\n");
724 pr_err("result in further problems, possibly loss of data,\n");
725 pr_err("corruption or system hangs!\n");
726 pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n");
727 pr_err("which is invalid and requires you to set the proper MAC\n");
728 pr_err("address manually before continuing to enable this network\n");
729 pr_err("device. Please inspect the EEPROM dump and report the\n");
730 pr_err("issue to your hardware vendor or Intel Customer Support.\n");
731 pr_err("/*********************/\n");
67b3c27c
AK
732
733 kfree(data);
734}
735
81250297
TI
736/**
737 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
738 * @pdev: PCI device information struct
739 *
740 * Return true if an adapter needs ioport resources
741 **/
742static int e1000_is_need_ioport(struct pci_dev *pdev)
743{
744 switch (pdev->device) {
745 case E1000_DEV_ID_82540EM:
746 case E1000_DEV_ID_82540EM_LOM:
747 case E1000_DEV_ID_82540EP:
748 case E1000_DEV_ID_82540EP_LOM:
749 case E1000_DEV_ID_82540EP_LP:
750 case E1000_DEV_ID_82541EI:
751 case E1000_DEV_ID_82541EI_MOBILE:
752 case E1000_DEV_ID_82541ER:
753 case E1000_DEV_ID_82541ER_LOM:
754 case E1000_DEV_ID_82541GI:
755 case E1000_DEV_ID_82541GI_LF:
756 case E1000_DEV_ID_82541GI_MOBILE:
757 case E1000_DEV_ID_82544EI_COPPER:
758 case E1000_DEV_ID_82544EI_FIBER:
759 case E1000_DEV_ID_82544GC_COPPER:
760 case E1000_DEV_ID_82544GC_LOM:
761 case E1000_DEV_ID_82545EM_COPPER:
762 case E1000_DEV_ID_82545EM_FIBER:
763 case E1000_DEV_ID_82546EB_COPPER:
764 case E1000_DEV_ID_82546EB_FIBER:
765 case E1000_DEV_ID_82546EB_QUAD_COPPER:
766 return true;
767 default:
768 return false;
769 }
770}
771
0e7614bc
SH
772static const struct net_device_ops e1000_netdev_ops = {
773 .ndo_open = e1000_open,
774 .ndo_stop = e1000_close,
00829823 775 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH
776 .ndo_get_stats = e1000_get_stats,
777 .ndo_set_rx_mode = e1000_set_rx_mode,
778 .ndo_set_mac_address = e1000_set_mac,
779 .ndo_tx_timeout = e1000_tx_timeout,
780 .ndo_change_mtu = e1000_change_mtu,
781 .ndo_do_ioctl = e1000_ioctl,
782 .ndo_validate_addr = eth_validate_addr,
783
784 .ndo_vlan_rx_register = e1000_vlan_rx_register,
785 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
786 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
787#ifdef CONFIG_NET_POLL_CONTROLLER
788 .ndo_poll_controller = e1000_netpoll,
789#endif
790};
791
1da177e4
LT
792/**
793 * e1000_probe - Device Initialization Routine
794 * @pdev: PCI device information struct
795 * @ent: entry in e1000_pci_tbl
796 *
797 * Returns 0 on success, negative on failure
798 *
799 * e1000_probe initializes an adapter identified by a pci_dev structure.
800 * The OS initialization, configuring of the adapter private structure,
801 * and a hardware reset occur.
802 **/
1dc32918
JP
803static int __devinit e1000_probe(struct pci_dev *pdev,
804 const struct pci_device_id *ent)
1da177e4
LT
805{
806 struct net_device *netdev;
807 struct e1000_adapter *adapter;
1dc32918 808 struct e1000_hw *hw;
2d7edb92 809
1da177e4 810 static int cards_found = 0;
120cd576 811 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 812 int i, err, pci_using_dac;
406874a7
JP
813 u16 eeprom_data = 0;
814 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 815 int bars, need_ioport;
0795af57 816
81250297
TI
817 /* do not allocate ioport bars when not needed */
818 need_ioport = e1000_is_need_ioport(pdev);
819 if (need_ioport) {
820 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
821 err = pci_enable_device(pdev);
822 } else {
823 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 824 err = pci_enable_device_mem(pdev);
81250297 825 }
c7be73bc 826 if (err)
1da177e4
LT
827 return err;
828
b16f53be
NN
829 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
830 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
1da177e4
LT
831 pci_using_dac = 1;
832 } else {
b16f53be 833 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
c7be73bc 834 if (err) {
b16f53be
NN
835 err = dma_set_coherent_mask(&pdev->dev,
836 DMA_BIT_MASK(32));
c7be73bc 837 if (err) {
675ad473 838 pr_err("No usable DMA config, aborting\n");
c7be73bc
JP
839 goto err_dma;
840 }
1da177e4
LT
841 }
842 pci_using_dac = 0;
843 }
844
81250297 845 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 846 if (err)
6dd62ab0 847 goto err_pci_reg;
1da177e4
LT
848
849 pci_set_master(pdev);
dbb5aaeb
NN
850 err = pci_save_state(pdev);
851 if (err)
852 goto err_alloc_etherdev;
1da177e4 853
6dd62ab0 854 err = -ENOMEM;
1da177e4 855 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 856 if (!netdev)
1da177e4 857 goto err_alloc_etherdev;
1da177e4 858
1da177e4
LT
859 SET_NETDEV_DEV(netdev, &pdev->dev);
860
861 pci_set_drvdata(pdev, netdev);
60490fe0 862 adapter = netdev_priv(netdev);
1da177e4
LT
863 adapter->netdev = netdev;
864 adapter->pdev = pdev;
1da177e4 865 adapter->msg_enable = (1 << debug) - 1;
81250297
TI
866 adapter->bars = bars;
867 adapter->need_ioport = need_ioport;
1da177e4 868
1dc32918
JP
869 hw = &adapter->hw;
870 hw->back = adapter;
871
6dd62ab0 872 err = -EIO;
275f165f 873 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 874 if (!hw->hw_addr)
1da177e4 875 goto err_ioremap;
1da177e4 876
81250297
TI
877 if (adapter->need_ioport) {
878 for (i = BAR_1; i <= BAR_5; i++) {
879 if (pci_resource_len(pdev, i) == 0)
880 continue;
881 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
882 hw->io_base = pci_resource_start(pdev, i);
883 break;
884 }
1da177e4
LT
885 }
886 }
887
0e7614bc 888 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 889 e1000_set_ethtool_ops(netdev);
1da177e4 890 netdev->watchdog_timeo = 5 * HZ;
bea3348e 891 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 892
0eb5a34c 893 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 894
1da177e4
LT
895 adapter->bd_number = cards_found;
896
897 /* setup the private structure */
898
c7be73bc
JP
899 err = e1000_sw_init(adapter);
900 if (err)
1da177e4
LT
901 goto err_sw_init;
902
6dd62ab0 903 err = -EIO;
2d7edb92 904
1dc32918 905 if (hw->mac_type >= e1000_82543) {
1da177e4
LT
906 netdev->features = NETIF_F_SG |
907 NETIF_F_HW_CSUM |
908 NETIF_F_HW_VLAN_TX |
909 NETIF_F_HW_VLAN_RX |
910 NETIF_F_HW_VLAN_FILTER;
911 }
912
1dc32918
JP
913 if ((hw->mac_type >= e1000_82544) &&
914 (hw->mac_type != e1000_82547))
1da177e4 915 netdev->features |= NETIF_F_TSO;
2d7edb92 916
96838a40 917 if (pci_using_dac)
1da177e4
LT
918 netdev->features |= NETIF_F_HIGHDMA;
919
20501a69 920 netdev->vlan_features |= NETIF_F_TSO;
20501a69
PM
921 netdev->vlan_features |= NETIF_F_HW_CSUM;
922 netdev->vlan_features |= NETIF_F_SG;
923
1dc32918 924 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 925
cd94dd0b 926 /* initialize eeprom parameters */
1dc32918 927 if (e1000_init_eeprom_params(hw)) {
feb8f478 928 e_err(probe, "EEPROM initialization failed\n");
6dd62ab0 929 goto err_eeprom;
cd94dd0b
AK
930 }
931
96838a40 932 /* before reading the EEPROM, reset the controller to
1da177e4 933 * put the device in a known good starting state */
96838a40 934
1dc32918 935 e1000_reset_hw(hw);
1da177e4
LT
936
937 /* make sure the EEPROM is good */
1dc32918 938 if (e1000_validate_eeprom_checksum(hw) < 0) {
feb8f478 939 e_err(probe, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK
940 e1000_dump_eeprom(adapter);
941 /*
942 * set MAC address to all zeroes to invalidate and temporary
943 * disable this device for the user. This blocks regular
944 * traffic while still permitting ethtool ioctls from reaching
945 * the hardware as well as allowing the user to run the
946 * interface after manually setting a hw addr using
947 * `ip set address`
948 */
1dc32918 949 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK
950 } else {
951 /* copy the MAC address out of the EEPROM */
1dc32918 952 if (e1000_read_mac_addr(hw))
feb8f478 953 e_err(probe, "EEPROM Read Error\n");
1da177e4 954 }
67b3c27c 955 /* don't block initalization here due to bad MAC address */
1dc32918
JP
956 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
957 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 958
67b3c27c 959 if (!is_valid_ether_addr(netdev->perm_addr))
feb8f478 960 e_err(probe, "Invalid MAC Address\n");
1da177e4 961
1dc32918 962 e1000_get_bus_info(hw);
1da177e4
LT
963
964 init_timer(&adapter->tx_fifo_stall_timer);
c061b18d 965 adapter->tx_fifo_stall_timer.function = e1000_82547_tx_fifo_stall;
e982f17c 966 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT
967
968 init_timer(&adapter->watchdog_timer);
c061b18d 969 adapter->watchdog_timer.function = e1000_watchdog;
1da177e4
LT
970 adapter->watchdog_timer.data = (unsigned long) adapter;
971
1da177e4 972 init_timer(&adapter->phy_info_timer);
c061b18d 973 adapter->phy_info_timer.function = e1000_update_phy_info;
e982f17c 974 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 975
65f27f38 976 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 977
1da177e4
LT
978 e1000_check_options(adapter);
979
980 /* Initial Wake on LAN setting
981 * If APM wake is enabled in the EEPROM,
982 * enable the ACPI Magic Packet filter
983 */
984
1dc32918 985 switch (hw->mac_type) {
1da177e4
LT
986 case e1000_82542_rev2_0:
987 case e1000_82542_rev2_1:
988 case e1000_82543:
989 break;
990 case e1000_82544:
1dc32918 991 e1000_read_eeprom(hw,
1da177e4
LT
992 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
993 eeprom_apme_mask = E1000_EEPROM_82544_APM;
994 break;
995 case e1000_82546:
996 case e1000_82546_rev_3:
1dc32918
JP
997 if (er32(STATUS) & E1000_STATUS_FUNC_1){
998 e1000_read_eeprom(hw,
1da177e4
LT
999 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1000 break;
1001 }
1002 /* Fall Through */
1003 default:
1dc32918 1004 e1000_read_eeprom(hw,
1da177e4
LT
1005 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1006 break;
1007 }
96838a40 1008 if (eeprom_data & eeprom_apme_mask)
120cd576
JB
1009 adapter->eeprom_wol |= E1000_WUFC_MAG;
1010
1011 /* now that we have the eeprom settings, apply the special cases
1012 * where the eeprom may be wrong or the board simply won't support
1013 * wake on lan on a particular port */
1014 switch (pdev->device) {
1015 case E1000_DEV_ID_82546GB_PCIE:
1016 adapter->eeprom_wol = 0;
1017 break;
1018 case E1000_DEV_ID_82546EB_FIBER:
1019 case E1000_DEV_ID_82546GB_FIBER:
120cd576
JB
1020 /* Wake events only supported on port A for dual fiber
1021 * regardless of eeprom setting */
1dc32918 1022 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB
1023 adapter->eeprom_wol = 0;
1024 break;
1025 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1026 /* if quad port adapter, disable WoL on all but port A */
1027 if (global_quad_port_a != 0)
1028 adapter->eeprom_wol = 0;
1029 else
1030 adapter->quad_port_a = 1;
1031 /* Reset for multiple quad port adapters */
1032 if (++global_quad_port_a == 4)
1033 global_quad_port_a = 0;
1034 break;
1035 }
1036
1037 /* initialize the wol settings based on the eeprom settings */
1038 adapter->wol = adapter->eeprom_wol;
de126489 1039 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1040
675ad473
ET
1041 /* reset the hardware with the new settings */
1042 e1000_reset(adapter);
1043
1044 strcpy(netdev->name, "eth%d");
1045 err = register_netdev(netdev);
1046 if (err)
1047 goto err_register;
1048
fb3d47d4 1049 /* print bus type/speed/width info */
feb8f478 1050 e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n",
7837e58c
JP
1051 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1052 ((hw->bus_speed == e1000_bus_speed_133) ? 133 :
1053 (hw->bus_speed == e1000_bus_speed_120) ? 120 :
1054 (hw->bus_speed == e1000_bus_speed_100) ? 100 :
1055 (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33),
1056 ((hw->bus_width == e1000_bus_width_64) ? 64 : 32),
1057 netdev->dev_addr);
1314bbf3 1058
eb62efd2
JB
1059 /* carrier off reporting is important to ethtool even BEFORE open */
1060 netif_carrier_off(netdev);
1061
feb8f478 1062 e_info(probe, "Intel(R) PRO/1000 Network Connection\n");
1da177e4
LT
1063
1064 cards_found++;
1065 return 0;
1066
1067err_register:
6dd62ab0 1068err_eeprom:
1532ecea 1069 e1000_phy_hw_reset(hw);
6dd62ab0 1070
1dc32918
JP
1071 if (hw->flash_address)
1072 iounmap(hw->flash_address);
6dd62ab0
VA
1073 kfree(adapter->tx_ring);
1074 kfree(adapter->rx_ring);
1da177e4 1075err_sw_init:
1dc32918 1076 iounmap(hw->hw_addr);
1da177e4
LT
1077err_ioremap:
1078 free_netdev(netdev);
1079err_alloc_etherdev:
81250297 1080 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA
1081err_pci_reg:
1082err_dma:
1083 pci_disable_device(pdev);
1da177e4
LT
1084 return err;
1085}
1086
1087/**
1088 * e1000_remove - Device Removal Routine
1089 * @pdev: PCI device information struct
1090 *
1091 * e1000_remove is called by the PCI subsystem to alert the driver
1092 * that it should release a PCI device. The could be caused by a
1093 * Hot-Plug event, or because the driver is going to be removed from
1094 * memory.
1095 **/
1096
64798845 1097static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT
1098{
1099 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1100 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1101 struct e1000_hw *hw = &adapter->hw;
1da177e4 1102
baa34745
JB
1103 set_bit(__E1000_DOWN, &adapter->flags);
1104 del_timer_sync(&adapter->tx_fifo_stall_timer);
1105 del_timer_sync(&adapter->watchdog_timer);
1106 del_timer_sync(&adapter->phy_info_timer);
1107
28e53bdd 1108 cancel_work_sync(&adapter->reset_task);
be2b28ed 1109
0fccd0e9 1110 e1000_release_manageability(adapter);
1da177e4 1111
bea3348e
SH
1112 unregister_netdev(netdev);
1113
1532ecea 1114 e1000_phy_hw_reset(hw);
1da177e4 1115
24025e4e
MC
1116 kfree(adapter->tx_ring);
1117 kfree(adapter->rx_ring);
24025e4e 1118
1dc32918
JP
1119 iounmap(hw->hw_addr);
1120 if (hw->flash_address)
1121 iounmap(hw->flash_address);
81250297 1122 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT
1123
1124 free_netdev(netdev);
1125
1126 pci_disable_device(pdev);
1127}
1128
1129/**
1130 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1131 * @adapter: board private structure to initialize
1132 *
1133 * e1000_sw_init initializes the Adapter private data structure.
1134 * Fields are initialized based on PCI device information and
1135 * OS network device settings (MTU size).
1136 **/
1137
64798845 1138static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT
1139{
1140 struct e1000_hw *hw = &adapter->hw;
1141 struct net_device *netdev = adapter->netdev;
1142 struct pci_dev *pdev = adapter->pdev;
1143
1144 /* PCI config space info */
1145
1146 hw->vendor_id = pdev->vendor;
1147 hw->device_id = pdev->device;
1148 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1149 hw->subsystem_id = pdev->subsystem_device;
44c10138 1150 hw->revision_id = pdev->revision;
1da177e4
LT
1151
1152 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1153
eb0f8054 1154 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT
1155 hw->max_frame_size = netdev->mtu +
1156 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1157 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1158
1159 /* identify the MAC */
1160
96838a40 1161 if (e1000_set_mac_type(hw)) {
feb8f478 1162 e_err(probe, "Unknown MAC Type\n");
1da177e4
LT
1163 return -EIO;
1164 }
1165
96838a40 1166 switch (hw->mac_type) {
1da177e4
LT
1167 default:
1168 break;
1169 case e1000_82541:
1170 case e1000_82547:
1171 case e1000_82541_rev_2:
1172 case e1000_82547_rev_2:
1173 hw->phy_init_script = 1;
1174 break;
1175 }
1176
1177 e1000_set_media_type(hw);
1178
c3033b01
JP
1179 hw->wait_autoneg_complete = false;
1180 hw->tbi_compatibility_en = true;
1181 hw->adaptive_ifs = true;
1da177e4
LT
1182
1183 /* Copper options */
1184
96838a40 1185 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1186 hw->mdix = AUTO_ALL_MODES;
c3033b01 1187 hw->disable_polarity_correction = false;
1da177e4
LT
1188 hw->master_slave = E1000_MASTER_SLAVE;
1189 }
1190
f56799ea
JK
1191 adapter->num_tx_queues = 1;
1192 adapter->num_rx_queues = 1;
581d708e
MC
1193
1194 if (e1000_alloc_queues(adapter)) {
feb8f478 1195 e_err(probe, "Unable to allocate memory for queues\n");
581d708e
MC
1196 return -ENOMEM;
1197 }
1198
47313054 1199 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX
1200 e1000_irq_disable(adapter);
1201
1da177e4 1202 spin_lock_init(&adapter->stats_lock);
1da177e4 1203
1314bbf3
AK
1204 set_bit(__E1000_DOWN, &adapter->flags);
1205
1da177e4
LT
1206 return 0;
1207}
1208
581d708e
MC
1209/**
1210 * e1000_alloc_queues - Allocate memory for all rings
1211 * @adapter: board private structure to initialize
1212 *
1213 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1214 * number of queues at compile-time.
581d708e
MC
1215 **/
1216
64798845 1217static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1218{
1c7e5b12
YB
1219 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1220 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC
1221 if (!adapter->tx_ring)
1222 return -ENOMEM;
581d708e 1223
1c7e5b12
YB
1224 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1225 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC
1226 if (!adapter->rx_ring) {
1227 kfree(adapter->tx_ring);
1228 return -ENOMEM;
1229 }
581d708e 1230
581d708e
MC
1231 return E1000_SUCCESS;
1232}
1233
1da177e4
LT
1234/**
1235 * e1000_open - Called when a network interface is made active
1236 * @netdev: network interface device structure
1237 *
1238 * Returns 0 on success, negative value on failure
1239 *
1240 * The open entry point is called when a network interface is made
1241 * active by the system (IFF_UP). At this point all resources needed
1242 * for transmit and receive operations are allocated, the interrupt
1243 * handler is registered with the OS, the watchdog timer is started,
1244 * and the stack is notified that the interface is ready.
1245 **/
1246
64798845 1247static int e1000_open(struct net_device *netdev)
1da177e4 1248{
60490fe0 1249 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1250 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
1251 int err;
1252
2db10a08 1253 /* disallow open during test */
1314bbf3 1254 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK
1255 return -EBUSY;
1256
eb62efd2
JB
1257 netif_carrier_off(netdev);
1258
1da177e4 1259 /* allocate transmit descriptors */
e0aac5a2
AK
1260 err = e1000_setup_all_tx_resources(adapter);
1261 if (err)
1da177e4
LT
1262 goto err_setup_tx;
1263
1264 /* allocate receive descriptors */
e0aac5a2 1265 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1266 if (err)
e0aac5a2 1267 goto err_setup_rx;
b5bf28cd 1268
79f05bf0
AK
1269 e1000_power_up_phy(adapter);
1270
2d7edb92 1271 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1272 if ((hw->mng_cookie.status &
2d7edb92
MC
1273 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1274 e1000_update_mng_vlan(adapter);
1275 }
1da177e4 1276
e0aac5a2
AK
1277 /* before we allocate an interrupt, we must be ready to handle it.
1278 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1279 * as soon as we call pci_request_irq, so we have to setup our
1280 * clean_rx handler before we do so. */
1281 e1000_configure(adapter);
1282
1283 err = e1000_request_irq(adapter);
1284 if (err)
1285 goto err_req_irq;
1286
1287 /* From here on the code is the same as e1000_up() */
1288 clear_bit(__E1000_DOWN, &adapter->flags);
1289
bea3348e 1290 napi_enable(&adapter->napi);
47313054 1291
e0aac5a2
AK
1292 e1000_irq_enable(adapter);
1293
076152d5
BH
1294 netif_start_queue(netdev);
1295
e0aac5a2 1296 /* fire a link status change interrupt to start the watchdog */
1dc32918 1297 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1298
1da177e4
LT
1299 return E1000_SUCCESS;
1300
b5bf28cd 1301err_req_irq:
e0aac5a2 1302 e1000_power_down_phy(adapter);
581d708e 1303 e1000_free_all_rx_resources(adapter);
1da177e4 1304err_setup_rx:
581d708e 1305 e1000_free_all_tx_resources(adapter);
1da177e4
LT
1306err_setup_tx:
1307 e1000_reset(adapter);
1308
1309 return err;
1310}
1311
1312/**
1313 * e1000_close - Disables a network interface
1314 * @netdev: network interface device structure
1315 *
1316 * Returns 0, this is not allowed to fail
1317 *
1318 * The close entry point is called when an interface is de-activated
1319 * by the OS. The hardware is still under the drivers control, but
1320 * needs to be disabled. A global MAC reset is issued to stop the
1321 * hardware, and all transmit and receive resources are freed.
1322 **/
1323
64798845 1324static int e1000_close(struct net_device *netdev)
1da177e4 1325{
60490fe0 1326 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1327 struct e1000_hw *hw = &adapter->hw;
1da177e4 1328
2db10a08 1329 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1330 e1000_down(adapter);
79f05bf0 1331 e1000_power_down_phy(adapter);
2db10a08 1332 e1000_free_irq(adapter);
1da177e4 1333
581d708e
MC
1334 e1000_free_all_tx_resources(adapter);
1335 e1000_free_all_rx_resources(adapter);
1da177e4 1336
4666560a
BA
1337 /* kill manageability vlan ID if supported, but not if a vlan with
1338 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1339 if ((hw->mng_cookie.status &
4666560a
BA
1340 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1341 !(adapter->vlgrp &&
5c15bdec 1342 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC
1343 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1344 }
b55ccb35 1345
1da177e4
LT
1346 return 0;
1347}
1348
1349/**
1350 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1351 * @adapter: address of board private structure
2d7edb92
MC
1352 * @start: address of beginning of memory
1353 * @len: length of memory
1da177e4 1354 **/
64798845
JP
1355static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1356 unsigned long len)
1da177e4 1357{
1dc32918 1358 struct e1000_hw *hw = &adapter->hw;
e982f17c 1359 unsigned long begin = (unsigned long)start;
1da177e4
LT
1360 unsigned long end = begin + len;
1361
2648345f
MC
1362 /* First rev 82545 and 82546 need to not allow any memory
1363 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP
1364 if (hw->mac_type == e1000_82545 ||
1365 hw->mac_type == e1000_82546) {
c3033b01 1366 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT
1367 }
1368
c3033b01 1369 return true;
1da177e4
LT
1370}
1371
1372/**
1373 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1374 * @adapter: board private structure
581d708e 1375 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT
1376 *
1377 * Return 0 on success, negative on failure
1378 **/
1379
64798845
JP
1380static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1381 struct e1000_tx_ring *txdr)
1da177e4 1382{
1da177e4
LT
1383 struct pci_dev *pdev = adapter->pdev;
1384 int size;
1385
1386 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1387 txdr->buffer_info = vmalloc(size);
96838a40 1388 if (!txdr->buffer_info) {
feb8f478
ET
1389 e_err(probe, "Unable to allocate memory for the Tx descriptor "
1390 "ring\n");
1da177e4
LT
1391 return -ENOMEM;
1392 }
1393 memset(txdr->buffer_info, 0, size);
1394
1395 /* round up to nearest 4K */
1396
1397 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1398 txdr->size = ALIGN(txdr->size, 4096);
1da177e4 1399
b16f53be
NN
1400 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1401 GFP_KERNEL);
96838a40 1402 if (!txdr->desc) {
1da177e4 1403setup_tx_desc_die:
1da177e4 1404 vfree(txdr->buffer_info);
feb8f478
ET
1405 e_err(probe, "Unable to allocate memory for the Tx descriptor "
1406 "ring\n");
1da177e4
LT
1407 return -ENOMEM;
1408 }
1409
2648345f 1410 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT
1411 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1412 void *olddesc = txdr->desc;
1413 dma_addr_t olddma = txdr->dma;
feb8f478 1414 e_err(tx_err, "txdr align check failed: %u bytes at %p\n",
675ad473 1415 txdr->size, txdr->desc);
2648345f 1416 /* Try again, without freeing the previous */
b16f53be
NN
1417 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
1418 &txdr->dma, GFP_KERNEL);
2648345f 1419 /* Failed allocation, critical failure */
96838a40 1420 if (!txdr->desc) {
b16f53be
NN
1421 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1422 olddma);
1da177e4
LT
1423 goto setup_tx_desc_die;
1424 }
1425
1426 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1427 /* give up */
b16f53be
NN
1428 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
1429 txdr->dma);
1430 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1431 olddma);
feb8f478 1432 e_err(probe, "Unable to allocate aligned memory "
675ad473 1433 "for the transmit descriptor ring\n");
1da177e4
LT
1434 vfree(txdr->buffer_info);
1435 return -ENOMEM;
1436 } else {
2648345f 1437 /* Free old allocation, new allocation was successful */
b16f53be
NN
1438 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1439 olddma);
1da177e4
LT
1440 }
1441 }
1442 memset(txdr->desc, 0, txdr->size);
1443
1444 txdr->next_to_use = 0;
1445 txdr->next_to_clean = 0;
1446
1447 return 0;
1448}
1449
581d708e
MC
1450/**
1451 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1452 * (Descriptors) for all queues
1453 * @adapter: board private structure
1454 *
581d708e
MC
1455 * Return 0 on success, negative on failure
1456 **/
1457
64798845 1458int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC
1459{
1460 int i, err = 0;
1461
f56799ea 1462 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC
1463 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1464 if (err) {
feb8f478 1465 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA
1466 for (i-- ; i >= 0; i--)
1467 e1000_free_tx_resources(adapter,
1468 &adapter->tx_ring[i]);
581d708e
MC
1469 break;
1470 }
1471 }
1472
1473 return err;
1474}
1475
1da177e4
LT
1476/**
1477 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1478 * @adapter: board private structure
1479 *
1480 * Configure the Tx unit of the MAC after a reset.
1481 **/
1482
64798845 1483static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1484{
406874a7 1485 u64 tdba;
581d708e 1486 struct e1000_hw *hw = &adapter->hw;
1532ecea 1487 u32 tdlen, tctl, tipg;
406874a7 1488 u32 ipgr1, ipgr2;
1da177e4
LT
1489
1490 /* Setup the HW Tx Head and Tail descriptor pointers */
1491
f56799ea 1492 switch (adapter->num_tx_queues) {
24025e4e
MC
1493 case 1:
1494 default:
581d708e
MC
1495 tdba = adapter->tx_ring[0].dma;
1496 tdlen = adapter->tx_ring[0].count *
1497 sizeof(struct e1000_tx_desc);
1dc32918
JP
1498 ew32(TDLEN, tdlen);
1499 ew32(TDBAH, (tdba >> 32));
1500 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1501 ew32(TDT, 0);
1502 ew32(TDH, 0);
6a951698
AK
1503 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1504 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC
1505 break;
1506 }
1da177e4
LT
1507
1508 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1509 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1510 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK
1511 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1512 else
1513 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1514
581d708e 1515 switch (hw->mac_type) {
1da177e4
LT
1516 case e1000_82542_rev2_0:
1517 case e1000_82542_rev2_1:
1518 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK
1519 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1520 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT
1521 break;
1522 default:
0fadb059
JK
1523 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1524 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1525 break;
1da177e4 1526 }
0fadb059
JK
1527 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1528 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1529 ew32(TIPG, tipg);
1da177e4
LT
1530
1531 /* Set the Tx Interrupt Delay register */
1532
1dc32918 1533 ew32(TIDV, adapter->tx_int_delay);
581d708e 1534 if (hw->mac_type >= e1000_82540)
1dc32918 1535 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT
1536
1537 /* Program the Transmit Control Register */
1538
1dc32918 1539 tctl = er32(TCTL);
1da177e4 1540 tctl &= ~E1000_TCTL_CT;
7e6c9861 1541 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT
1542 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1543
581d708e 1544 e1000_config_collision_dist(hw);
1da177e4
LT
1545
1546 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB
1547 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1548
1549 /* only set IDE if we are delaying interrupts using the timers */
1550 if (adapter->tx_int_delay)
1551 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1552
581d708e 1553 if (hw->mac_type < e1000_82543)
1da177e4
LT
1554 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1555 else
1556 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1557
1558 /* Cache if we're 82544 running in PCI-X because we'll
1559 * need this to apply a workaround later in the send path. */
581d708e
MC
1560 if (hw->mac_type == e1000_82544 &&
1561 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1562 adapter->pcix_82544 = 1;
7e6c9861 1563
1dc32918 1564 ew32(TCTL, tctl);
7e6c9861 1565
1da177e4
LT
1566}
1567
1568/**
1569 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1570 * @adapter: board private structure
581d708e 1571 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT
1572 *
1573 * Returns 0 on success, negative on failure
1574 **/
1575
64798845
JP
1576static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1577 struct e1000_rx_ring *rxdr)
1da177e4 1578{
1da177e4 1579 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1580 int size, desc_len;
1da177e4
LT
1581
1582 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1583 rxdr->buffer_info = vmalloc(size);
581d708e 1584 if (!rxdr->buffer_info) {
feb8f478
ET
1585 e_err(probe, "Unable to allocate memory for the Rx descriptor "
1586 "ring\n");
1da177e4
LT
1587 return -ENOMEM;
1588 }
1589 memset(rxdr->buffer_info, 0, size);
1590
1532ecea 1591 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1592
1da177e4
LT
1593 /* Round up to nearest 4K */
1594
2d7edb92 1595 rxdr->size = rxdr->count * desc_len;
9099cfb9 1596 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4 1597
b16f53be
NN
1598 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1599 GFP_KERNEL);
1da177e4 1600
581d708e 1601 if (!rxdr->desc) {
feb8f478
ET
1602 e_err(probe, "Unable to allocate memory for the Rx descriptor "
1603 "ring\n");
1da177e4 1604setup_rx_desc_die:
1da177e4
LT
1605 vfree(rxdr->buffer_info);
1606 return -ENOMEM;
1607 }
1608
2648345f 1609 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT
1610 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1611 void *olddesc = rxdr->desc;
1612 dma_addr_t olddma = rxdr->dma;
feb8f478 1613 e_err(rx_err, "rxdr align check failed: %u bytes at %p\n",
675ad473 1614 rxdr->size, rxdr->desc);
2648345f 1615 /* Try again, without freeing the previous */
b16f53be
NN
1616 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size,
1617 &rxdr->dma, GFP_KERNEL);
2648345f 1618 /* Failed allocation, critical failure */
581d708e 1619 if (!rxdr->desc) {
b16f53be
NN
1620 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1621 olddma);
feb8f478
ET
1622 e_err(probe, "Unable to allocate memory for the Rx "
1623 "descriptor ring\n");
1da177e4
LT
1624 goto setup_rx_desc_die;
1625 }
1626
1627 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1628 /* give up */
b16f53be
NN
1629 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
1630 rxdr->dma);
1631 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1632 olddma);
feb8f478
ET
1633 e_err(probe, "Unable to allocate aligned memory for "
1634 "the Rx descriptor ring\n");
581d708e 1635 goto setup_rx_desc_die;
1da177e4 1636 } else {
2648345f 1637 /* Free old allocation, new allocation was successful */
b16f53be
NN
1638 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1639 olddma);
1da177e4
LT
1640 }
1641 }
1642 memset(rxdr->desc, 0, rxdr->size);
1643
1644 rxdr->next_to_clean = 0;
1645 rxdr->next_to_use = 0;
edbbb3ca 1646 rxdr->rx_skb_top = NULL;
1da177e4
LT
1647
1648 return 0;
1649}
1650
581d708e
MC
1651/**
1652 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1653 * (Descriptors) for all queues
1654 * @adapter: board private structure
1655 *
581d708e
MC
1656 * Return 0 on success, negative on failure
1657 **/
1658
64798845 1659int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC
1660{
1661 int i, err = 0;
1662
f56799ea 1663 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC
1664 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1665 if (err) {
feb8f478 1666 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA
1667 for (i-- ; i >= 0; i--)
1668 e1000_free_rx_resources(adapter,
1669 &adapter->rx_ring[i]);
581d708e
MC
1670 break;
1671 }
1672 }
1673
1674 return err;
1675}
1676
1da177e4 1677/**
2648345f 1678 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT
1679 * @adapter: Board private structure
1680 **/
64798845 1681static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1682{
1dc32918 1683 struct e1000_hw *hw = &adapter->hw;
630b25cd 1684 u32 rctl;
1da177e4 1685
1dc32918 1686 rctl = er32(RCTL);
1da177e4
LT
1687
1688 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1689
1690 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1691 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1692 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1693
1dc32918 1694 if (hw->tbi_compatibility_on == 1)
1da177e4
LT
1695 rctl |= E1000_RCTL_SBP;
1696 else
1697 rctl &= ~E1000_RCTL_SBP;
1698
2d7edb92
MC
1699 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1700 rctl &= ~E1000_RCTL_LPE;
1701 else
1702 rctl |= E1000_RCTL_LPE;
1703
1da177e4 1704 /* Setup buffer sizes */
9e2feace
AK
1705 rctl &= ~E1000_RCTL_SZ_4096;
1706 rctl |= E1000_RCTL_BSEX;
1707 switch (adapter->rx_buffer_len) {
a1415ee6
JK
1708 case E1000_RXBUFFER_2048:
1709 default:
1710 rctl |= E1000_RCTL_SZ_2048;
1711 rctl &= ~E1000_RCTL_BSEX;
1712 break;
1713 case E1000_RXBUFFER_4096:
1714 rctl |= E1000_RCTL_SZ_4096;
1715 break;
1716 case E1000_RXBUFFER_8192:
1717 rctl |= E1000_RCTL_SZ_8192;
1718 break;
1719 case E1000_RXBUFFER_16384:
1720 rctl |= E1000_RCTL_SZ_16384;
1721 break;
2d7edb92
MC
1722 }
1723
1dc32918 1724 ew32(RCTL, rctl);
1da177e4
LT
1725}
1726
1727/**
1728 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1729 * @adapter: board private structure
1730 *
1731 * Configure the Rx unit of the MAC after a reset.
1732 **/
1733
64798845 1734static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1735{
406874a7 1736 u64 rdba;
581d708e 1737 struct e1000_hw *hw = &adapter->hw;
1532ecea 1738 u32 rdlen, rctl, rxcsum;
2d7edb92 1739
edbbb3ca
JB
1740 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1741 rdlen = adapter->rx_ring[0].count *
1742 sizeof(struct e1000_rx_desc);
1743 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1744 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1745 } else {
1746 rdlen = adapter->rx_ring[0].count *
1747 sizeof(struct e1000_rx_desc);
1748 adapter->clean_rx = e1000_clean_rx_irq;
1749 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1750 }
1da177e4
LT
1751
1752 /* disable receives while setting up the descriptors */
1dc32918
JP
1753 rctl = er32(RCTL);
1754 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT
1755
1756 /* set the Receive Delay Timer Register */
1dc32918 1757 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1758
581d708e 1759 if (hw->mac_type >= e1000_82540) {
1dc32918 1760 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1761 if (adapter->itr_setting != 0)
1dc32918 1762 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT
1763 }
1764
581d708e
MC
1765 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1766 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1767 switch (adapter->num_rx_queues) {
24025e4e
MC
1768 case 1:
1769 default:
581d708e 1770 rdba = adapter->rx_ring[0].dma;
1dc32918
JP
1771 ew32(RDLEN, rdlen);
1772 ew32(RDBAH, (rdba >> 32));
1773 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1774 ew32(RDT, 0);
1775 ew32(RDH, 0);
6a951698
AK
1776 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1777 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1778 break;
24025e4e
MC
1779 }
1780
1da177e4 1781 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1782 if (hw->mac_type >= e1000_82543) {
1dc32918 1783 rxcsum = er32(RXCSUM);
630b25cd 1784 if (adapter->rx_csum)
2d7edb92 1785 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1786 else
2d7edb92 1787 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1788 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1789 ew32(RXCSUM, rxcsum);
1da177e4
LT
1790 }
1791
1792 /* Enable Receives */
1dc32918 1793 ew32(RCTL, rctl);
1da177e4
LT
1794}
1795
1796/**
581d708e 1797 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1798 * @adapter: board private structure
581d708e 1799 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT
1800 *
1801 * Free all transmit software resources
1802 **/
1803
64798845
JP
1804static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1805 struct e1000_tx_ring *tx_ring)
1da177e4
LT
1806{
1807 struct pci_dev *pdev = adapter->pdev;
1808
581d708e 1809 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1810
581d708e
MC
1811 vfree(tx_ring->buffer_info);
1812 tx_ring->buffer_info = NULL;
1da177e4 1813
b16f53be
NN
1814 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1815 tx_ring->dma);
1da177e4 1816
581d708e
MC
1817 tx_ring->desc = NULL;
1818}
1819
1820/**
1821 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1822 * @adapter: board private structure
1823 *
1824 * Free all transmit software resources
1825 **/
1826
64798845 1827void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC
1828{
1829 int i;
1830
f56799ea 1831 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1832 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT
1833}
1834
64798845
JP
1835static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1836 struct e1000_buffer *buffer_info)
1da177e4 1837{
602c0554
AD
1838 if (buffer_info->dma) {
1839 if (buffer_info->mapped_as_page)
b16f53be
NN
1840 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1841 buffer_info->length, DMA_TO_DEVICE);
602c0554 1842 else
b16f53be 1843 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
602c0554 1844 buffer_info->length,
b16f53be 1845 DMA_TO_DEVICE);
602c0554
AD
1846 buffer_info->dma = 0;
1847 }
a9ebadd6 1848 if (buffer_info->skb) {
1da177e4 1849 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB
1850 buffer_info->skb = NULL;
1851 }
37e73df8 1852 buffer_info->time_stamp = 0;
a9ebadd6 1853 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT
1854}
1855
1856/**
1857 * e1000_clean_tx_ring - Free Tx Buffers
1858 * @adapter: board private structure
581d708e 1859 * @tx_ring: ring to be cleaned
1da177e4
LT
1860 **/
1861
64798845
JP
1862static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1863 struct e1000_tx_ring *tx_ring)
1da177e4 1864{
1dc32918 1865 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
1866 struct e1000_buffer *buffer_info;
1867 unsigned long size;
1868 unsigned int i;
1869
1870 /* Free all the Tx ring sk_buffs */
1871
96838a40 1872 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT
1873 buffer_info = &tx_ring->buffer_info[i];
1874 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1875 }
1876
1877 size = sizeof(struct e1000_buffer) * tx_ring->count;
1878 memset(tx_ring->buffer_info, 0, size);
1879
1880 /* Zero out the descriptor ring */
1881
1882 memset(tx_ring->desc, 0, tx_ring->size);
1883
1884 tx_ring->next_to_use = 0;
1885 tx_ring->next_to_clean = 0;
fd803241 1886 tx_ring->last_tx_tso = 0;
1da177e4 1887
1dc32918
JP
1888 writel(0, hw->hw_addr + tx_ring->tdh);
1889 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC
1890}
1891
1892/**
1893 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1894 * @adapter: board private structure
1895 **/
1896
64798845 1897static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC
1898{
1899 int i;
1900
f56799ea 1901 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1902 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT
1903}
1904
1905/**
1906 * e1000_free_rx_resources - Free Rx Resources
1907 * @adapter: board private structure
581d708e 1908 * @rx_ring: ring to clean the resources from
1da177e4
LT
1909 *
1910 * Free all receive software resources
1911 **/
1912
64798845
JP
1913static void e1000_free_rx_resources(struct e1000_adapter *adapter,
1914 struct e1000_rx_ring *rx_ring)
1da177e4 1915{
1da177e4
LT
1916 struct pci_dev *pdev = adapter->pdev;
1917
581d708e 1918 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT
1919
1920 vfree(rx_ring->buffer_info);
1921 rx_ring->buffer_info = NULL;
1922
b16f53be
NN
1923 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1924 rx_ring->dma);
1da177e4
LT
1925
1926 rx_ring->desc = NULL;
1927}
1928
1929/**
581d708e 1930 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1931 * @adapter: board private structure
581d708e
MC
1932 *
1933 * Free all receive software resources
1934 **/
1935
64798845 1936void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC
1937{
1938 int i;
1939
f56799ea 1940 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC
1941 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1942}
1943
1944/**
1945 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1946 * @adapter: board private structure
1947 * @rx_ring: ring to free buffers from
1da177e4
LT
1948 **/
1949
64798845
JP
1950static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
1951 struct e1000_rx_ring *rx_ring)
1da177e4 1952{
1dc32918 1953 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
1954 struct e1000_buffer *buffer_info;
1955 struct pci_dev *pdev = adapter->pdev;
1956 unsigned long size;
630b25cd 1957 unsigned int i;
1da177e4
LT
1958
1959 /* Free all the Rx ring sk_buffs */
96838a40 1960 for (i = 0; i < rx_ring->count; i++) {
1da177e4 1961 buffer_info = &rx_ring->buffer_info[i];
edbbb3ca
JB
1962 if (buffer_info->dma &&
1963 adapter->clean_rx == e1000_clean_rx_irq) {
b16f53be 1964 dma_unmap_single(&pdev->dev, buffer_info->dma,
edbbb3ca 1965 buffer_info->length,
b16f53be 1966 DMA_FROM_DEVICE);
edbbb3ca
JB
1967 } else if (buffer_info->dma &&
1968 adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
b16f53be
NN
1969 dma_unmap_page(&pdev->dev, buffer_info->dma,
1970 buffer_info->length,
1971 DMA_FROM_DEVICE);
679be3ba 1972 }
1da177e4 1973
679be3ba 1974 buffer_info->dma = 0;
edbbb3ca
JB
1975 if (buffer_info->page) {
1976 put_page(buffer_info->page);
1977 buffer_info->page = NULL;
1978 }
679be3ba 1979 if (buffer_info->skb) {
1da177e4
LT
1980 dev_kfree_skb(buffer_info->skb);
1981 buffer_info->skb = NULL;
997f5cbd 1982 }
1da177e4
LT
1983 }
1984
edbbb3ca
JB
1985 /* there also may be some cached data from a chained receive */
1986 if (rx_ring->rx_skb_top) {
1987 dev_kfree_skb(rx_ring->rx_skb_top);
1988 rx_ring->rx_skb_top = NULL;
1989 }
1990
1da177e4
LT
1991 size = sizeof(struct e1000_buffer) * rx_ring->count;
1992 memset(rx_ring->buffer_info, 0, size);
1993
1994 /* Zero out the descriptor ring */
1da177e4
LT
1995 memset(rx_ring->desc, 0, rx_ring->size);
1996
1997 rx_ring->next_to_clean = 0;
1998 rx_ring->next_to_use = 0;
1999
1dc32918
JP
2000 writel(0, hw->hw_addr + rx_ring->rdh);
2001 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC
2002}
2003
2004/**
2005 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2006 * @adapter: board private structure
2007 **/
2008
64798845 2009static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC
2010{
2011 int i;
2012
f56799ea 2013 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2014 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT
2015}
2016
2017/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2018 * and memory write and invalidate disabled for certain operations
2019 */
64798845 2020static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2021{
1dc32918 2022 struct e1000_hw *hw = &adapter->hw;
1da177e4 2023 struct net_device *netdev = adapter->netdev;
406874a7 2024 u32 rctl;
1da177e4 2025
1dc32918 2026 e1000_pci_clear_mwi(hw);
1da177e4 2027
1dc32918 2028 rctl = er32(RCTL);
1da177e4 2029 rctl |= E1000_RCTL_RST;
1dc32918
JP
2030 ew32(RCTL, rctl);
2031 E1000_WRITE_FLUSH();
1da177e4
LT
2032 mdelay(5);
2033
96838a40 2034 if (netif_running(netdev))
581d708e 2035 e1000_clean_all_rx_rings(adapter);
1da177e4
LT
2036}
2037
64798845 2038static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2039{
1dc32918 2040 struct e1000_hw *hw = &adapter->hw;
1da177e4 2041 struct net_device *netdev = adapter->netdev;
406874a7 2042 u32 rctl;
1da177e4 2043
1dc32918 2044 rctl = er32(RCTL);
1da177e4 2045 rctl &= ~E1000_RCTL_RST;
1dc32918
JP
2046 ew32(RCTL, rctl);
2047 E1000_WRITE_FLUSH();
1da177e4
LT
2048 mdelay(5);
2049
1dc32918
JP
2050 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2051 e1000_pci_set_mwi(hw);
1da177e4 2052
96838a40 2053 if (netif_running(netdev)) {
72d64a43
JK
2054 /* No need to loop, because 82542 supports only 1 queue */
2055 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2056 e1000_configure_rx(adapter);
72d64a43 2057 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT
2058 }
2059}
2060
2061/**
2062 * e1000_set_mac - Change the Ethernet Address of the NIC
2063 * @netdev: network interface device structure
2064 * @p: pointer to an address structure
2065 *
2066 * Returns 0 on success, negative on failure
2067 **/
2068
64798845 2069static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2070{
60490fe0 2071 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2072 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
2073 struct sockaddr *addr = p;
2074
96838a40 2075 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT
2076 return -EADDRNOTAVAIL;
2077
2078 /* 82542 2.0 needs to be in reset to write receive address registers */
2079
1dc32918 2080 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT
2081 e1000_enter_82542_rst(adapter);
2082
2083 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2084 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2085
1dc32918 2086 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2087
1dc32918 2088 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT
2089 e1000_leave_82542_rst(adapter);
2090
2091 return 0;
2092}
2093
2094/**
db0ce50d 2095 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT
2096 * @netdev: network interface device structure
2097 *
db0ce50d
PM
2098 * The set_rx_mode entry point is called whenever the unicast or multicast
2099 * address lists or the network interface flags are updated. This routine is
2100 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT
2101 * promiscuous mode, and all-multi behavior.
2102 **/
2103
64798845 2104static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2105{
60490fe0 2106 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2107 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP
2108 struct netdev_hw_addr *ha;
2109 bool use_uc = false;
406874a7
JP
2110 u32 rctl;
2111 u32 hash_value;
868d5309 2112 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2113 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB
2114 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2115
2116 if (!mcarray) {
feb8f478 2117 e_err(probe, "memory allocation failed\n");
81c52285
JB
2118 return;
2119 }
cd94dd0b 2120
2648345f
MC
2121 /* Check for Promiscuous and All Multicast modes */
2122
1dc32918 2123 rctl = er32(RCTL);
1da177e4 2124
96838a40 2125 if (netdev->flags & IFF_PROMISC) {
1da177e4 2126 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2127 rctl &= ~E1000_RCTL_VFE;
1da177e4 2128 } else {
1532ecea 2129 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2130 rctl |= E1000_RCTL_MPE;
1532ecea 2131 else
746b9f02 2132 rctl &= ~E1000_RCTL_MPE;
1532ecea
JB
2133 /* Enable VLAN filter if there is a VLAN */
2134 if (adapter->vlgrp)
2135 rctl |= E1000_RCTL_VFE;
db0ce50d
PM
2136 }
2137
32e7bfc4 2138 if (netdev_uc_count(netdev) > rar_entries - 1) {
db0ce50d
PM
2139 rctl |= E1000_RCTL_UPE;
2140 } else if (!(netdev->flags & IFF_PROMISC)) {
2141 rctl &= ~E1000_RCTL_UPE;
ccffad25 2142 use_uc = true;
1da177e4
LT
2143 }
2144
1dc32918 2145 ew32(RCTL, rctl);
1da177e4
LT
2146
2147 /* 82542 2.0 needs to be in reset to write receive address registers */
2148
96838a40 2149 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT
2150 e1000_enter_82542_rst(adapter);
2151
db0ce50d
PM
2152 /* load the first 14 addresses into the exact filters 1-14. Unicast
2153 * addresses take precedence to avoid disabling unicast filtering
2154 * when possible.
2155 *
1da177e4
LT
2156 * RAR 0 is used for the station MAC adddress
2157 * if there are not 14 addresses, go ahead and clear the filters
2158 */
ccffad25
JP
2159 i = 1;
2160 if (use_uc)
32e7bfc4 2161 netdev_for_each_uc_addr(ha, netdev) {
ccffad25
JP
2162 if (i == rar_entries)
2163 break;
2164 e1000_rar_set(hw, ha->addr, i++);
2165 }
2166
22bedad3 2167 netdev_for_each_mc_addr(ha, netdev) {
7a81e9f3
JP
2168 if (i == rar_entries) {
2169 /* load any remaining addresses into the hash table */
2170 u32 hash_reg, hash_bit, mta;
22bedad3 2171 hash_value = e1000_hash_mc_addr(hw, ha->addr);
7a81e9f3
JP
2172 hash_reg = (hash_value >> 5) & 0x7F;
2173 hash_bit = hash_value & 0x1F;
2174 mta = (1 << hash_bit);
2175 mcarray[hash_reg] |= mta;
10886af5 2176 } else {
22bedad3 2177 e1000_rar_set(hw, ha->addr, i++);
1da177e4
LT
2178 }
2179 }
2180
7a81e9f3
JP
2181 for (; i < rar_entries; i++) {
2182 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2183 E1000_WRITE_FLUSH();
2184 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2185 E1000_WRITE_FLUSH();
1da177e4
LT
2186 }
2187
81c52285
JB
2188 /* write the hash table completely, write from bottom to avoid
2189 * both stupid write combining chipsets, and flushing each write */
2190 for (i = mta_reg_count - 1; i >= 0 ; i--) {
2191 /*
2192 * If we are on an 82544 has an errata where writing odd
2193 * offsets overwrites the previous even offset, but writing
2194 * backwards over the range solves the issue by always
2195 * writing the odd offset first
2196 */
2197 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2198 }
2199 E1000_WRITE_FLUSH();
2200
96838a40 2201 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2202 e1000_leave_82542_rst(adapter);
81c52285
JB
2203
2204 kfree(mcarray);
1da177e4
LT
2205}
2206
2207/* Need to wait a few seconds after link up to get diagnostic information from
2208 * the phy */
2209
64798845 2210static void e1000_update_phy_info(unsigned long data)
1da177e4 2211{
e982f17c 2212 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP
2213 struct e1000_hw *hw = &adapter->hw;
2214 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT
2215}
2216
2217/**
2218 * e1000_82547_tx_fifo_stall - Timer Call-back
2219 * @data: pointer to adapter cast into an unsigned long
2220 **/
2221
64798845 2222static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2223{
e982f17c 2224 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2225 struct e1000_hw *hw = &adapter->hw;
1da177e4 2226 struct net_device *netdev = adapter->netdev;
406874a7 2227 u32 tctl;
1da177e4 2228
96838a40 2229 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP
2230 if ((er32(TDT) == er32(TDH)) &&
2231 (er32(TDFT) == er32(TDFH)) &&
2232 (er32(TDFTS) == er32(TDFHS))) {
2233 tctl = er32(TCTL);
2234 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2235 ew32(TDFT, adapter->tx_head_addr);
2236 ew32(TDFH, adapter->tx_head_addr);
2237 ew32(TDFTS, adapter->tx_head_addr);
2238 ew32(TDFHS, adapter->tx_head_addr);
2239 ew32(TCTL, tctl);
2240 E1000_WRITE_FLUSH();
1da177e4
LT
2241
2242 adapter->tx_fifo_head = 0;
2243 atomic_set(&adapter->tx_fifo_stall, 0);
2244 netif_wake_queue(netdev);
baa34745 2245 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
1da177e4
LT
2246 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2247 }
2248 }
2249}
2250
b548192a 2251bool e1000_has_link(struct e1000_adapter *adapter)
be0f0719
JB
2252{
2253 struct e1000_hw *hw = &adapter->hw;
2254 bool link_active = false;
be0f0719
JB
2255
2256 /* get_link_status is set on LSC (link status) interrupt or
2257 * rx sequence error interrupt. get_link_status will stay
2258 * false until the e1000_check_for_link establishes link
2259 * for copper adapters ONLY
2260 */
2261 switch (hw->media_type) {
2262 case e1000_media_type_copper:
2263 if (hw->get_link_status) {
120a5d0d 2264 e1000_check_for_link(hw);
be0f0719
JB
2265 link_active = !hw->get_link_status;
2266 } else {
2267 link_active = true;
2268 }
2269 break;
2270 case e1000_media_type_fiber:
120a5d0d 2271 e1000_check_for_link(hw);
be0f0719
JB
2272 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2273 break;
2274 case e1000_media_type_internal_serdes:
120a5d0d 2275 e1000_check_for_link(hw);
be0f0719
JB
2276 link_active = hw->serdes_has_link;
2277 break;
2278 default:
2279 break;
2280 }
2281
2282 return link_active;
2283}
2284
1da177e4
LT
2285/**
2286 * e1000_watchdog - Timer Call-back
2287 * @data: pointer to adapter cast into an unsigned long
2288 **/
64798845 2289static void e1000_watchdog(unsigned long data)
1da177e4 2290{
e982f17c 2291 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2292 struct e1000_hw *hw = &adapter->hw;
1da177e4 2293 struct net_device *netdev = adapter->netdev;
545c67c0 2294 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2295 u32 link, tctl;
90fb5135 2296
be0f0719
JB
2297 link = e1000_has_link(adapter);
2298 if ((netif_carrier_ok(netdev)) && link)
2299 goto link_up;
1da177e4 2300
96838a40
JB
2301 if (link) {
2302 if (!netif_carrier_ok(netdev)) {
406874a7 2303 u32 ctrl;
c3033b01 2304 bool txb2b = true;
be0f0719 2305 /* update snapshot of PHY registers on LSC */
1dc32918 2306 e1000_get_speed_and_duplex(hw,
1da177e4
LT
2307 &adapter->link_speed,
2308 &adapter->link_duplex);
2309
1dc32918 2310 ctrl = er32(CTRL);
675ad473
ET
2311 pr_info("%s NIC Link is Up %d Mbps %s, "
2312 "Flow Control: %s\n",
2313 netdev->name,
2314 adapter->link_speed,
2315 adapter->link_duplex == FULL_DUPLEX ?
2316 "Full Duplex" : "Half Duplex",
2317 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2318 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2319 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2320 E1000_CTRL_TFCE) ? "TX" : "None")));
1da177e4 2321
39ca5f03 2322 /* adjust timeout factor according to speed/duplex */
66a2b0a3 2323 adapter->tx_timeout_factor = 1;
7e6c9861
JK
2324 switch (adapter->link_speed) {
2325 case SPEED_10:
c3033b01 2326 txb2b = false;
be0f0719 2327 adapter->tx_timeout_factor = 16;
7e6c9861
JK
2328 break;
2329 case SPEED_100:
c3033b01 2330 txb2b = false;
7e6c9861
JK
2331 /* maybe add some timeout factor ? */
2332 break;
2333 }
2334
1532ecea 2335 /* enable transmits in the hardware */
1dc32918 2336 tctl = er32(TCTL);
7e6c9861 2337 tctl |= E1000_TCTL_EN;
1dc32918 2338 ew32(TCTL, tctl);
66a2b0a3 2339
1da177e4 2340 netif_carrier_on(netdev);
baa34745
JB
2341 if (!test_bit(__E1000_DOWN, &adapter->flags))
2342 mod_timer(&adapter->phy_info_timer,
2343 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT
2344 adapter->smartspeed = 0;
2345 }
2346 } else {
96838a40 2347 if (netif_carrier_ok(netdev)) {
1da177e4
LT
2348 adapter->link_speed = 0;
2349 adapter->link_duplex = 0;
675ad473
ET
2350 pr_info("%s NIC Link is Down\n",
2351 netdev->name);
1da177e4 2352 netif_carrier_off(netdev);
baa34745
JB
2353
2354 if (!test_bit(__E1000_DOWN, &adapter->flags))
2355 mod_timer(&adapter->phy_info_timer,
2356 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT
2357 }
2358
2359 e1000_smartspeed(adapter);
2360 }
2361
be0f0719 2362link_up:
1da177e4
LT
2363 e1000_update_stats(adapter);
2364
1dc32918 2365 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2366 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2367 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT
2368 adapter->colc_old = adapter->stats.colc;
2369
2370 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2371 adapter->gorcl_old = adapter->stats.gorcl;
2372 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2373 adapter->gotcl_old = adapter->stats.gotcl;
2374
1dc32918 2375 e1000_update_adaptive(hw);
1da177e4 2376
f56799ea 2377 if (!netif_carrier_ok(netdev)) {
581d708e 2378 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT
2379 /* We've lost link, so the controller stops DMA,
2380 * but we've got queued Tx work that's never going
2381 * to get done, so reset controller to flush Tx.
2382 * (Do the reset outside of interrupt context). */
87041639
JK
2383 adapter->tx_timeout_count++;
2384 schedule_work(&adapter->reset_task);
c2d5ab49
JB
2385 /* return immediately since reset is imminent */
2386 return;
1da177e4
LT
2387 }
2388 }
2389
eab2abf5
JB
2390 /* Simple mode for Interrupt Throttle Rate (ITR) */
2391 if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) {
2392 /*
2393 * Symmetric Tx/Rx gets a reduced ITR=2000;
2394 * Total asymmetrical Tx or Rx gets ITR=8000;
2395 * everyone else is between 2000-8000.
2396 */
2397 u32 goc = (adapter->gotcl + adapter->gorcl) / 10000;
2398 u32 dif = (adapter->gotcl > adapter->gorcl ?
2399 adapter->gotcl - adapter->gorcl :
2400 adapter->gorcl - adapter->gotcl) / 10000;
2401 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2402
2403 ew32(ITR, 1000000000 / (itr * 256));
2404 }
2405
1da177e4 2406 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2407 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2408
2648345f 2409 /* Force detection of hung controller every watchdog period */
c3033b01 2410 adapter->detect_tx_hung = true;
1da177e4
LT
2411
2412 /* Reset the timer */
baa34745
JB
2413 if (!test_bit(__E1000_DOWN, &adapter->flags))
2414 mod_timer(&adapter->watchdog_timer,
2415 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT
2416}
2417
835bb129
JB
2418enum latency_range {
2419 lowest_latency = 0,
2420 low_latency = 1,
2421 bulk_latency = 2,
2422 latency_invalid = 255
2423};
2424
2425/**
2426 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB
2427 * @adapter: pointer to adapter
2428 * @itr_setting: current adapter->itr
2429 * @packets: the number of packets during this measurement interval
2430 * @bytes: the number of bytes during this measurement interval
2431 *
835bb129
JB
2432 * Stores a new ITR value based on packets and byte
2433 * counts during the last interrupt. The advantage of per interrupt
2434 * computation is faster updates and more accurate ITR for the current
2435 * traffic pattern. Constants in this function were computed
2436 * based on theoretical maximum wire speed and thresholds were set based
2437 * on testing data as well as attempting to minimize response time
2438 * while increasing bulk throughput.
2439 * this functionality is controlled by the InterruptThrottleRate module
2440 * parameter (see e1000_param.c)
835bb129
JB
2441 **/
2442static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2443 u16 itr_setting, int packets, int bytes)
835bb129
JB
2444{
2445 unsigned int retval = itr_setting;
2446 struct e1000_hw *hw = &adapter->hw;
2447
2448 if (unlikely(hw->mac_type < e1000_82540))
2449 goto update_itr_done;
2450
2451 if (packets == 0)
2452 goto update_itr_done;
2453
835bb129
JB
2454 switch (itr_setting) {
2455 case lowest_latency:
2b65326e
JB
2456 /* jumbo frames get bulk treatment*/
2457 if (bytes/packets > 8000)
2458 retval = bulk_latency;
2459 else if ((packets < 5) && (bytes > 512))
835bb129
JB
2460 retval = low_latency;
2461 break;
2462 case low_latency: /* 50 usec aka 20000 ints/s */
2463 if (bytes > 10000) {
2b65326e
JB
2464 /* jumbo frames need bulk latency setting */
2465 if (bytes/packets > 8000)
2466 retval = bulk_latency;
2467 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB
2468 retval = bulk_latency;
2469 else if ((packets > 35))
2470 retval = lowest_latency;
2b65326e
JB
2471 } else if (bytes/packets > 2000)
2472 retval = bulk_latency;
2473 else if (packets <= 2 && bytes < 512)
835bb129
JB
2474 retval = lowest_latency;
2475 break;
2476 case bulk_latency: /* 250 usec aka 4000 ints/s */
2477 if (bytes > 25000) {
2478 if (packets > 35)
2479 retval = low_latency;
2b65326e
JB
2480 } else if (bytes < 6000) {
2481 retval = low_latency;
835bb129
JB
2482 }
2483 break;
2484 }
2485
2486update_itr_done:
2487 return retval;
2488}
2489
2490static void e1000_set_itr(struct e1000_adapter *adapter)
2491{
2492 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
2493 u16 current_itr;
2494 u32 new_itr = adapter->itr;
835bb129
JB
2495
2496 if (unlikely(hw->mac_type < e1000_82540))
2497 return;
2498
2499 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2500 if (unlikely(adapter->link_speed != SPEED_1000)) {
2501 current_itr = 0;
2502 new_itr = 4000;
2503 goto set_itr_now;
2504 }
2505
2506 adapter->tx_itr = e1000_update_itr(adapter,
2507 adapter->tx_itr,
2508 adapter->total_tx_packets,
2509 adapter->total_tx_bytes);
2b65326e
JB
2510 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2511 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2512 adapter->tx_itr = low_latency;
2513
835bb129
JB
2514 adapter->rx_itr = e1000_update_itr(adapter,
2515 adapter->rx_itr,
2516 adapter->total_rx_packets,
2517 adapter->total_rx_bytes);
2b65326e
JB
2518 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2519 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2520 adapter->rx_itr = low_latency;
835bb129
JB
2521
2522 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2523
835bb129
JB
2524 switch (current_itr) {
2525 /* counts and packets in update_itr are dependent on these numbers */
2526 case lowest_latency:
2527 new_itr = 70000;
2528 break;
2529 case low_latency:
2530 new_itr = 20000; /* aka hwitr = ~200 */
2531 break;
2532 case bulk_latency:
2533 new_itr = 4000;
2534 break;
2535 default:
2536 break;
2537 }
2538
2539set_itr_now:
2540 if (new_itr != adapter->itr) {
2541 /* this attempts to bias the interrupt rate towards Bulk
2542 * by adding intermediate steps when interrupt rate is
2543 * increasing */
2544 new_itr = new_itr > adapter->itr ?
2545 min(adapter->itr + (new_itr >> 2), new_itr) :
2546 new_itr;
2547 adapter->itr = new_itr;
1dc32918 2548 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129 2549 }
835bb129
JB
2550}
2551
1da177e4
LT
2552#define E1000_TX_FLAGS_CSUM 0x00000001
2553#define E1000_TX_FLAGS_VLAN 0x00000002
2554#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2555#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT
2556#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2557#define E1000_TX_FLAGS_VLAN_SHIFT 16
2558
64798845
JP
2559static int e1000_tso(struct e1000_adapter *adapter,
2560 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2561{
1da177e4 2562 struct e1000_context_desc *context_desc;
545c67c0 2563 struct e1000_buffer *buffer_info;
1da177e4 2564 unsigned int i;
406874a7
JP
2565 u32 cmd_length = 0;
2566 u16 ipcse = 0, tucse, mss;
2567 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT
2568 int err;
2569
89114afd 2570 if (skb_is_gso(skb)) {
1da177e4
LT
2571 if (skb_header_cloned(skb)) {
2572 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2573 if (err)
2574 return err;
2575 }
2576
ab6a5bb6 2577 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2578 mss = skb_shinfo(skb)->gso_size;
60828236 2579 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM
2580 struct iphdr *iph = ip_hdr(skb);
2581 iph->tot_len = 0;
2582 iph->check = 0;
aa8223c7
ACM
2583 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2584 iph->daddr, 0,
2585 IPPROTO_TCP,
2586 0);
2d7edb92 2587 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2588 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2589 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2590 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2591 tcp_hdr(skb)->check =
0660e03f
ACM
2592 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2593 &ipv6_hdr(skb)->daddr,
2594 0, IPPROTO_TCP, 0);
2d7edb92 2595 ipcse = 0;
2d7edb92 2596 }
bbe735e4 2597 ipcss = skb_network_offset(skb);
eddc9ec5 2598 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2599 tucss = skb_transport_offset(skb);
aa8223c7 2600 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT
2601 tucse = 0;
2602
2603 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2604 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2605
581d708e
MC
2606 i = tx_ring->next_to_use;
2607 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2608 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT
2609
2610 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2611 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2612 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2613 context_desc->upper_setup.tcp_fields.tucss = tucss;
2614 context_desc->upper_setup.tcp_fields.tucso = tucso;
2615 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2616 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2617 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2618 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2619
545c67c0 2620 buffer_info->time_stamp = jiffies;
a9ebadd6 2621 buffer_info->next_to_watch = i;
545c67c0 2622
581d708e
MC
2623 if (++i == tx_ring->count) i = 0;
2624 tx_ring->next_to_use = i;
1da177e4 2625
c3033b01 2626 return true;
1da177e4 2627 }
c3033b01 2628 return false;
1da177e4
LT
2629}
2630
64798845
JP
2631static bool e1000_tx_csum(struct e1000_adapter *adapter,
2632 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT
2633{
2634 struct e1000_context_desc *context_desc;
545c67c0 2635 struct e1000_buffer *buffer_info;
1da177e4 2636 unsigned int i;
406874a7 2637 u8 css;
3ed30676 2638 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2639
3ed30676
DG
2640 if (skb->ip_summed != CHECKSUM_PARTIAL)
2641 return false;
1da177e4 2642
3ed30676 2643 switch (skb->protocol) {
09640e63 2644 case cpu_to_be16(ETH_P_IP):
3ed30676
DG
2645 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2646 cmd_len |= E1000_TXD_CMD_TCP;
2647 break;
09640e63 2648 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG
2649 /* XXX not handling all IPV6 headers */
2650 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2651 cmd_len |= E1000_TXD_CMD_TCP;
2652 break;
2653 default:
2654 if (unlikely(net_ratelimit()))
feb8f478
ET
2655 e_warn(drv, "checksum_partial proto=%x!\n",
2656 skb->protocol);
3ed30676
DG
2657 break;
2658 }
1da177e4 2659
3ed30676 2660 css = skb_transport_offset(skb);
1da177e4 2661
3ed30676
DG
2662 i = tx_ring->next_to_use;
2663 buffer_info = &tx_ring->buffer_info[i];
2664 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2665
3ed30676
DG
2666 context_desc->lower_setup.ip_config = 0;
2667 context_desc->upper_setup.tcp_fields.tucss = css;
2668 context_desc->upper_setup.tcp_fields.tucso =
2669 css + skb->csum_offset;
2670 context_desc->upper_setup.tcp_fields.tucse = 0;
2671 context_desc->tcp_seg_setup.data = 0;
2672 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2673
3ed30676
DG
2674 buffer_info->time_stamp = jiffies;
2675 buffer_info->next_to_watch = i;
1da177e4 2676
3ed30676
DG
2677 if (unlikely(++i == tx_ring->count)) i = 0;
2678 tx_ring->next_to_use = i;
2679
2680 return true;
1da177e4
LT
2681}
2682
2683#define E1000_MAX_TXD_PWR 12
2684#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2685
64798845
JP
2686static int e1000_tx_map(struct e1000_adapter *adapter,
2687 struct e1000_tx_ring *tx_ring,
2688 struct sk_buff *skb, unsigned int first,
2689 unsigned int max_per_txd, unsigned int nr_frags,
2690 unsigned int mss)
1da177e4 2691{
1dc32918 2692 struct e1000_hw *hw = &adapter->hw;
602c0554 2693 struct pci_dev *pdev = adapter->pdev;
37e73df8 2694 struct e1000_buffer *buffer_info;
d20b606c 2695 unsigned int len = skb_headlen(skb);
602c0554 2696 unsigned int offset = 0, size, count = 0, i;
1da177e4 2697 unsigned int f;
1da177e4
LT
2698
2699 i = tx_ring->next_to_use;
2700
96838a40 2701 while (len) {
37e73df8 2702 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2703 size = min(len, max_per_txd);
fd803241
JK
2704 /* Workaround for Controller erratum --
2705 * descriptor for non-tso packet in a linear SKB that follows a
2706 * tso gets written back prematurely before the data is fully
0f15a8fa 2707 * DMA'd to the controller */
fd803241 2708 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2709 !skb_is_gso(skb)) {
fd803241
JK
2710 tx_ring->last_tx_tso = 0;
2711 size -= 4;
2712 }
2713
1da177e4
LT
2714 /* Workaround for premature desc write-backs
2715 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2716 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2717 size -= 4;
97338bde
MC
2718 /* work-around for errata 10 and it applies
2719 * to all controllers in PCI-X mode
2720 * The fix is to make sure that the first descriptor of a
2721 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2722 */
1dc32918 2723 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC
2724 (size > 2015) && count == 0))
2725 size = 2015;
96838a40 2726
1da177e4
LT
2727 /* Workaround for potential 82544 hang in PCI-X. Avoid
2728 * terminating buffers within evenly-aligned dwords. */
96838a40 2729 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT
2730 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2731 size > 4))
2732 size -= 4;
2733
2734 buffer_info->length = size;
cdd7549e 2735 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2736 buffer_info->time_stamp = jiffies;
602c0554 2737 buffer_info->mapped_as_page = false;
b16f53be
NN
2738 buffer_info->dma = dma_map_single(&pdev->dev,
2739 skb->data + offset,
2740 size, DMA_TO_DEVICE);
2741 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2742 goto dma_error;
a9ebadd6 2743 buffer_info->next_to_watch = i;
1da177e4
LT
2744
2745 len -= size;
2746 offset += size;
2747 count++;
37e73df8
AD
2748 if (len) {
2749 i++;
2750 if (unlikely(i == tx_ring->count))
2751 i = 0;
2752 }
1da177e4
LT
2753 }
2754
96838a40 2755 for (f = 0; f < nr_frags; f++) {
1da177e4
LT
2756 struct skb_frag_struct *frag;
2757
2758 frag = &skb_shinfo(skb)->frags[f];
2759 len = frag->size;
602c0554 2760 offset = frag->page_offset;
1da177e4 2761
96838a40 2762 while (len) {
37e73df8
AD
2763 i++;
2764 if (unlikely(i == tx_ring->count))
2765 i = 0;
2766
1da177e4
LT
2767 buffer_info = &tx_ring->buffer_info[i];
2768 size = min(len, max_per_txd);
1da177e4
LT
2769 /* Workaround for premature desc write-backs
2770 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2771 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 2772 size -= 4;
1da177e4
LT
2773 /* Workaround for potential 82544 hang in PCI-X.
2774 * Avoid terminating buffers within evenly-aligned
2775 * dwords. */
96838a40 2776 if (unlikely(adapter->pcix_82544 &&
8fce4731
JB
2777 !((unsigned long)(page_to_phys(frag->page) + offset
2778 + size - 1) & 4) &&
2779 size > 4))
1da177e4
LT
2780 size -= 4;
2781
2782 buffer_info->length = size;
1da177e4 2783 buffer_info->time_stamp = jiffies;
602c0554 2784 buffer_info->mapped_as_page = true;
b16f53be 2785 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
602c0554 2786 offset, size,
b16f53be
NN
2787 DMA_TO_DEVICE);
2788 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2789 goto dma_error;
a9ebadd6 2790 buffer_info->next_to_watch = i;
1da177e4
LT
2791
2792 len -= size;
2793 offset += size;
2794 count++;
1da177e4
LT
2795 }
2796 }
2797
1da177e4
LT
2798 tx_ring->buffer_info[i].skb = skb;
2799 tx_ring->buffer_info[first].next_to_watch = i;
2800
2801 return count;
602c0554
AD
2802
2803dma_error:
2804 dev_err(&pdev->dev, "TX DMA map failed\n");
2805 buffer_info->dma = 0;
c1fa347f 2806 if (count)
602c0554 2807 count--;
c1fa347f
RK
2808
2809 while (count--) {
2810 if (i==0)
602c0554 2811 i += tx_ring->count;
c1fa347f 2812 i--;
602c0554
AD
2813 buffer_info = &tx_ring->buffer_info[i];
2814 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2815 }
2816
2817 return 0;
1da177e4
LT
2818}
2819
64798845
JP
2820static void e1000_tx_queue(struct e1000_adapter *adapter,
2821 struct e1000_tx_ring *tx_ring, int tx_flags,
2822 int count)
1da177e4 2823{
1dc32918 2824 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
2825 struct e1000_tx_desc *tx_desc = NULL;
2826 struct e1000_buffer *buffer_info;
406874a7 2827 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT
2828 unsigned int i;
2829
96838a40 2830 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT
2831 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2832 E1000_TXD_CMD_TSE;
2d7edb92
MC
2833 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2834
96838a40 2835 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2836 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT
2837 }
2838
96838a40 2839 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT
2840 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2841 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2842 }
2843
96838a40 2844 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT
2845 txd_lower |= E1000_TXD_CMD_VLE;
2846 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2847 }
2848
2849 i = tx_ring->next_to_use;
2850
96838a40 2851 while (count--) {
1da177e4
LT
2852 buffer_info = &tx_ring->buffer_info[i];
2853 tx_desc = E1000_TX_DESC(*tx_ring, i);
2854 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2855 tx_desc->lower.data =
2856 cpu_to_le32(txd_lower | buffer_info->length);
2857 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2858 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT
2859 }
2860
2861 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2862
2863 /* Force memory writes to complete before letting h/w
2864 * know there are new descriptors to fetch. (Only
2865 * applicable for weak-ordered memory model archs,
2866 * such as IA-64). */
2867 wmb();
2868
2869 tx_ring->next_to_use = i;
1dc32918 2870 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB
2871 /* we need this if more than one processor can write to our tail
2872 * at a time, it syncronizes IO on IA64/Altix systems */
2873 mmiowb();
1da177e4
LT
2874}
2875
2876/**
2877 * 82547 workaround to avoid controller hang in half-duplex environment.
2878 * The workaround is to avoid queuing a large packet that would span
2879 * the internal Tx FIFO ring boundary by notifying the stack to resend
2880 * the packet at a later time. This gives the Tx FIFO an opportunity to
2881 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2882 * to the beginning of the Tx FIFO.
2883 **/
2884
2885#define E1000_FIFO_HDR 0x10
2886#define E1000_82547_PAD_LEN 0x3E0
2887
64798845
JP
2888static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
2889 struct sk_buff *skb)
1da177e4 2890{
406874a7
JP
2891 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2892 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 2893
9099cfb9 2894 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 2895
96838a40 2896 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT
2897 goto no_fifo_stall_required;
2898
96838a40 2899 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT
2900 return 1;
2901
96838a40 2902 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT
2903 atomic_set(&adapter->tx_fifo_stall, 1);
2904 return 1;
2905 }
2906
2907no_fifo_stall_required:
2908 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2909 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT
2910 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2911 return 0;
2912}
2913
65c7973f
JB
2914static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
2915{
2916 struct e1000_adapter *adapter = netdev_priv(netdev);
2917 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
2918
2919 netif_stop_queue(netdev);
2920 /* Herbert's original patch had:
2921 * smp_mb__after_netif_stop_queue();
2922 * but since that doesn't exist yet, just open code it. */
2923 smp_mb();
2924
2925 /* We need to check again in a case another CPU has just
2926 * made room available. */
2927 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
2928 return -EBUSY;
2929
2930 /* A reprieve! */
2931 netif_start_queue(netdev);
fcfb1224 2932 ++adapter->restart_queue;
65c7973f
JB
2933 return 0;
2934}
2935
2936static int e1000_maybe_stop_tx(struct net_device *netdev,
2937 struct e1000_tx_ring *tx_ring, int size)
2938{
2939 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
2940 return 0;
2941 return __e1000_maybe_stop_tx(netdev, size);
2942}
2943
1da177e4 2944#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH
2945static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
2946 struct net_device *netdev)
1da177e4 2947{
60490fe0 2948 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2949 struct e1000_hw *hw = &adapter->hw;
581d708e 2950 struct e1000_tx_ring *tx_ring;
1da177e4
LT
2951 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2952 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2953 unsigned int tx_flags = 0;
e743d313 2954 unsigned int len = skb_headlen(skb);
6d1e3aa7
KK
2955 unsigned int nr_frags;
2956 unsigned int mss;
1da177e4 2957 int count = 0;
76c224bc 2958 int tso;
1da177e4 2959 unsigned int f;
1da177e4 2960
65c7973f
JB
2961 /* This goes back to the question of how to logically map a tx queue
2962 * to a flow. Right now, performance is impacted slightly negatively
2963 * if using multiple tx queues. If the stack breaks away from a
2964 * single qdisc implementation, we can look at this again. */
581d708e 2965 tx_ring = adapter->tx_ring;
24025e4e 2966
581d708e 2967 if (unlikely(skb->len <= 0)) {
1da177e4
LT
2968 dev_kfree_skb_any(skb);
2969 return NETDEV_TX_OK;
2970 }
2971
7967168c 2972 mss = skb_shinfo(skb)->gso_size;
76c224bc 2973 /* The controller does a simple calculation to
1da177e4
LT
2974 * make sure there is enough room in the FIFO before
2975 * initiating the DMA for each buffer. The calc is:
2976 * 4 = ceil(buffer len/mss). To make sure we don't
2977 * overrun the FIFO, adjust the max buffer len if mss
2978 * drops. */
96838a40 2979 if (mss) {
406874a7 2980 u8 hdr_len;
1da177e4
LT
2981 max_per_txd = min(mss << 2, max_per_txd);
2982 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2983
ab6a5bb6 2984 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 2985 if (skb->data_len && hdr_len == len) {
1dc32918 2986 switch (hw->mac_type) {
9f687888 2987 unsigned int pull_size;
683a2aa3
HX
2988 case e1000_82544:
2989 /* Make sure we have room to chop off 4 bytes,
2990 * and that the end alignment will work out to
2991 * this hardware's requirements
2992 * NOTE: this is a TSO only workaround
2993 * if end byte alignment not correct move us
2994 * into the next dword */
27a884dc 2995 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX
2996 break;
2997 /* fall through */
9f687888
JK
2998 pull_size = min((unsigned int)4, skb->data_len);
2999 if (!__pskb_pull_tail(skb, pull_size)) {
feb8f478
ET
3000 e_err(drv, "__pskb_pull_tail "
3001 "failed.\n");
9f687888 3002 dev_kfree_skb_any(skb);
749dfc70 3003 return NETDEV_TX_OK;
9f687888 3004 }
e743d313 3005 len = skb_headlen(skb);
9f687888
JK
3006 break;
3007 default:
3008 /* do nothing */
3009 break;
d74bbd3b 3010 }
9a3056da 3011 }
1da177e4
LT
3012 }
3013
9a3056da 3014 /* reserve a descriptor for the offload context */
84fa7933 3015 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3016 count++;
2648345f 3017 count++;
fd803241 3018
fd803241 3019 /* Controller Erratum workaround */
89114afd 3020 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3021 count++;
fd803241 3022
1da177e4
LT
3023 count += TXD_USE_COUNT(len, max_txd_pwr);
3024
96838a40 3025 if (adapter->pcix_82544)
1da177e4
LT
3026 count++;
3027
96838a40 3028 /* work-around for errata 10 and it applies to all controllers
97338bde
MC
3029 * in PCI-X mode, so add one more descriptor to the count
3030 */
1dc32918 3031 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC
3032 (len > 2015)))
3033 count++;
3034
1da177e4 3035 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3036 for (f = 0; f < nr_frags; f++)
1da177e4
LT
3037 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3038 max_txd_pwr);
96838a40 3039 if (adapter->pcix_82544)
1da177e4
LT
3040 count += nr_frags;
3041
1da177e4
LT
3042 /* need: count + 2 desc gap to keep tail from touching
3043 * head, otherwise try next time */
8017943e 3044 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3045 return NETDEV_TX_BUSY;
1da177e4 3046
1dc32918 3047 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3048 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3049 netif_stop_queue(netdev);
baa34745
JB
3050 if (!test_bit(__E1000_DOWN, &adapter->flags))
3051 mod_timer(&adapter->tx_fifo_stall_timer,
3052 jiffies + 1);
1da177e4
LT
3053 return NETDEV_TX_BUSY;
3054 }
3055 }
3056
96838a40 3057 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT
3058 tx_flags |= E1000_TX_FLAGS_VLAN;
3059 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3060 }
3061
581d708e 3062 first = tx_ring->next_to_use;
96838a40 3063
581d708e 3064 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT
3065 if (tso < 0) {
3066 dev_kfree_skb_any(skb);
3067 return NETDEV_TX_OK;
3068 }
3069
fd803241 3070 if (likely(tso)) {
8fce4731
JB
3071 if (likely(hw->mac_type != e1000_82544))
3072 tx_ring->last_tx_tso = 1;
1da177e4 3073 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3074 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT
3075 tx_flags |= E1000_TX_FLAGS_CSUM;
3076
60828236 3077 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC
3078 tx_flags |= E1000_TX_FLAGS_IPV4;
3079
37e73df8
AD
3080 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
3081 nr_frags, mss);
1da177e4 3082
37e73df8
AD
3083 if (count) {
3084 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD
3085 /* Make sure there is space in the ring for the next send. */
3086 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3087
37e73df8
AD
3088 } else {
3089 dev_kfree_skb_any(skb);
3090 tx_ring->buffer_info[first].time_stamp = 0;
3091 tx_ring->next_to_use = first;
3092 }
1da177e4 3093
1da177e4
LT
3094 return NETDEV_TX_OK;
3095}
3096
3097/**
3098 * e1000_tx_timeout - Respond to a Tx Hang
3099 * @netdev: network interface device structure
3100 **/
3101
64798845 3102static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3103{
60490fe0 3104 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
3105
3106 /* Do the reset outside of interrupt context */
87041639
JK
3107 adapter->tx_timeout_count++;
3108 schedule_work(&adapter->reset_task);
1da177e4
LT
3109}
3110
64798845 3111static void e1000_reset_task(struct work_struct *work)
1da177e4 3112{
65f27f38
DH
3113 struct e1000_adapter *adapter =
3114 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3115
2db10a08 3116 e1000_reinit_locked(adapter);
1da177e4
LT
3117}
3118
3119/**
3120 * e1000_get_stats - Get System Network Statistics
3121 * @netdev: network interface device structure
3122 *
3123 * Returns the address of the device statistics structure.
3124 * The statistics are actually updated from the timer callback.
3125 **/
3126
64798845 3127static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3128{
6b7660cd 3129 /* only return the current stats */
5fe31def 3130 return &netdev->stats;
1da177e4
LT
3131}
3132
3133/**
3134 * e1000_change_mtu - Change the Maximum Transfer Unit
3135 * @netdev: network interface device structure
3136 * @new_mtu: new value for maximum frame size
3137 *
3138 * Returns 0 on success, negative on failure
3139 **/
3140
64798845 3141static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3142{
60490fe0 3143 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3144 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
3145 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3146
96838a40
JB
3147 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3148 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
feb8f478 3149 e_err(probe, "Invalid MTU setting\n");
1da177e4 3150 return -EINVAL;
2d7edb92 3151 }
1da177e4 3152
997f5cbd 3153 /* Adapter-specific max frame size limits. */
1dc32918 3154 switch (hw->mac_type) {
9e2feace 3155 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3156 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
feb8f478 3157 e_err(probe, "Jumbo Frames not supported.\n");
2d7edb92 3158 return -EINVAL;
2d7edb92 3159 }
997f5cbd 3160 break;
997f5cbd
JK
3161 default:
3162 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3163 break;
1da177e4
LT
3164 }
3165
3d6114e7
JB
3166 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3167 msleep(1);
3168 /* e1000_down has a dependency on max_frame_size */
3169 hw->max_frame_size = max_frame;
3170 if (netif_running(netdev))
3171 e1000_down(adapter);
3172
87f5032e 3173 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3174 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB
3175 * larger slab size.
3176 * i.e. RXBUFFER_2048 --> size-4096 slab
3177 * however with the new *_jumbo_rx* routines, jumbo receives will use
3178 * fragmented skbs */
9e2feace 3179
9926146b 3180 if (max_frame <= E1000_RXBUFFER_2048)
9e2feace 3181 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB
3182 else
3183#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3184 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB
3185#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3186 adapter->rx_buffer_len = PAGE_SIZE;
3187#endif
9e2feace
AK
3188
3189 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3190 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3191 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK
3192 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3193 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3194
675ad473
ET
3195 pr_info("%s changing MTU from %d to %d\n",
3196 netdev->name, netdev->mtu, new_mtu);
2d7edb92
MC
3197 netdev->mtu = new_mtu;
3198
2db10a08 3199 if (netif_running(netdev))
3d6114e7
JB
3200 e1000_up(adapter);
3201 else
3202 e1000_reset(adapter);
3203
3204 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3205
1da177e4
LT
3206 return 0;
3207}
3208
3209/**
3210 * e1000_update_stats - Update the board statistics counters
3211 * @adapter: board private structure
3212 **/
3213
64798845 3214void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3215{
5fe31def 3216 struct net_device *netdev = adapter->netdev;
1da177e4 3217 struct e1000_hw *hw = &adapter->hw;
282f33c9 3218 struct pci_dev *pdev = adapter->pdev;
1da177e4 3219 unsigned long flags;
406874a7 3220 u16 phy_tmp;
1da177e4
LT
3221
3222#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3223
282f33c9
LV
3224 /*
3225 * Prevent stats update while adapter is being reset, or if the pci
3226 * connection is down.
3227 */
9026729b 3228 if (adapter->link_speed == 0)
282f33c9 3229 return;
81b1955e 3230 if (pci_channel_offline(pdev))
9026729b
AK
3231 return;
3232
1da177e4
LT
3233 spin_lock_irqsave(&adapter->stats_lock, flags);
3234
828d055f 3235 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT
3236 * called from the interrupt context, so they must only
3237 * be written while holding adapter->stats_lock
3238 */
3239
1dc32918
JP
3240 adapter->stats.crcerrs += er32(CRCERRS);
3241 adapter->stats.gprc += er32(GPRC);
3242 adapter->stats.gorcl += er32(GORCL);
3243 adapter->stats.gorch += er32(GORCH);
3244 adapter->stats.bprc += er32(BPRC);
3245 adapter->stats.mprc += er32(MPRC);
3246 adapter->stats.roc += er32(ROC);
3247
1532ecea
JB
3248 adapter->stats.prc64 += er32(PRC64);
3249 adapter->stats.prc127 += er32(PRC127);
3250 adapter->stats.prc255 += er32(PRC255);
3251 adapter->stats.prc511 += er32(PRC511);
3252 adapter->stats.prc1023 += er32(PRC1023);
3253 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP
3254
3255 adapter->stats.symerrs += er32(SYMERRS);
3256 adapter->stats.mpc += er32(MPC);
3257 adapter->stats.scc += er32(SCC);
3258 adapter->stats.ecol += er32(ECOL);
3259 adapter->stats.mcc += er32(MCC);
3260 adapter->stats.latecol += er32(LATECOL);
3261 adapter->stats.dc += er32(DC);
3262 adapter->stats.sec += er32(SEC);
3263 adapter->stats.rlec += er32(RLEC);
3264 adapter->stats.xonrxc += er32(XONRXC);
3265 adapter->stats.xontxc += er32(XONTXC);
3266 adapter->stats.xoffrxc += er32(XOFFRXC);
3267 adapter->stats.xofftxc += er32(XOFFTXC);
3268 adapter->stats.fcruc += er32(FCRUC);
3269 adapter->stats.gptc += er32(GPTC);
3270 adapter->stats.gotcl += er32(GOTCL);
3271 adapter->stats.gotch += er32(GOTCH);
3272 adapter->stats.rnbc += er32(RNBC);
3273 adapter->stats.ruc += er32(RUC);
3274 adapter->stats.rfc += er32(RFC);
3275 adapter->stats.rjc += er32(RJC);
3276 adapter->stats.torl += er32(TORL);
3277 adapter->stats.torh += er32(TORH);
3278 adapter->stats.totl += er32(TOTL);
3279 adapter->stats.toth += er32(TOTH);
3280 adapter->stats.tpr += er32(TPR);
3281
1532ecea
JB
3282 adapter->stats.ptc64 += er32(PTC64);
3283 adapter->stats.ptc127 += er32(PTC127);
3284 adapter->stats.ptc255 += er32(PTC255);
3285 adapter->stats.ptc511 += er32(PTC511);
3286 adapter->stats.ptc1023 += er32(PTC1023);
3287 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP
3288
3289 adapter->stats.mptc += er32(MPTC);
3290 adapter->stats.bptc += er32(BPTC);
1da177e4
LT
3291
3292 /* used for adaptive IFS */
3293
1dc32918 3294 hw->tx_packet_delta = er32(TPT);
1da177e4 3295 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3296 hw->collision_delta = er32(COLC);
1da177e4
LT
3297 adapter->stats.colc += hw->collision_delta;
3298
96838a40 3299 if (hw->mac_type >= e1000_82543) {
1dc32918
JP
3300 adapter->stats.algnerrc += er32(ALGNERRC);
3301 adapter->stats.rxerrc += er32(RXERRC);
3302 adapter->stats.tncrs += er32(TNCRS);
3303 adapter->stats.cexterr += er32(CEXTERR);
3304 adapter->stats.tsctc += er32(TSCTC);
3305 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT
3306 }
3307
3308 /* Fill out the OS statistics structure */
5fe31def
AK
3309 netdev->stats.multicast = adapter->stats.mprc;
3310 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT
3311
3312 /* Rx Errors */
3313
87041639
JK
3314 /* RLEC on some newer hardware can be incorrect so build
3315 * our own version based on RUC and ROC */
5fe31def 3316 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3317 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK
3318 adapter->stats.ruc + adapter->stats.roc +
3319 adapter->stats.cexterr;
49559854 3320 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK
3321 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3322 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3323 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3324 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT
3325
3326 /* Tx Errors */
49559854 3327 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK
3328 netdev->stats.tx_errors = adapter->stats.txerrc;
3329 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3330 netdev->stats.tx_window_errors = adapter->stats.latecol;
3331 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3332 if (hw->bad_tx_carr_stats_fd &&
167fb284 3333 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3334 netdev->stats.tx_carrier_errors = 0;
167fb284
JG
3335 adapter->stats.tncrs = 0;
3336 }
1da177e4
LT
3337
3338 /* Tx Dropped needs to be maintained elsewhere */
3339
3340 /* Phy Stats */
96838a40
JB
3341 if (hw->media_type == e1000_media_type_copper) {
3342 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT
3343 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3344 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3345 adapter->phy_stats.idle_errors += phy_tmp;
3346 }
3347
96838a40 3348 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT
3349 (hw->phy_type == e1000_phy_m88) &&
3350 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3351 adapter->phy_stats.receive_errors += phy_tmp;
3352 }
3353
15e376b4 3354 /* Management Stats */
1dc32918
JP
3355 if (hw->has_smbus) {
3356 adapter->stats.mgptc += er32(MGTPTC);
3357 adapter->stats.mgprc += er32(MGTPRC);
3358 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG
3359 }
3360
1da177e4
LT
3361 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3362}
9ac98284 3363
1da177e4
LT
3364/**
3365 * e1000_intr - Interrupt Handler
3366 * @irq: interrupt number
3367 * @data: pointer to a network interface device structure
1da177e4
LT
3368 **/
3369
64798845 3370static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT
3371{
3372 struct net_device *netdev = data;
60490fe0 3373 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3374 struct e1000_hw *hw = &adapter->hw;
1532ecea 3375 u32 icr = er32(ICR);
c3570acb 3376
e151a60a 3377 if (unlikely((!icr) || test_bit(__E1000_DOWN, &adapter->flags)))
835bb129
JB
3378 return IRQ_NONE; /* Not our interrupt */
3379
96838a40 3380 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3381 hw->get_link_status = 1;
1314bbf3
AK
3382 /* guard against interrupt when we're going down */
3383 if (!test_bit(__E1000_DOWN, &adapter->flags))
3384 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT
3385 }
3386
1532ecea
JB
3387 /* disable interrupts, without the synchronize_irq bit */
3388 ew32(IMC, ~0);
3389 E1000_WRITE_FLUSH();
3390
288379f0 3391 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB
3392 adapter->total_tx_bytes = 0;
3393 adapter->total_tx_packets = 0;
3394 adapter->total_rx_bytes = 0;
3395 adapter->total_rx_packets = 0;
288379f0 3396 __napi_schedule(&adapter->napi);
a6c42322 3397 } else {
90fb5135
AK
3398 /* this really should not happen! if it does it is basically a
3399 * bug, but not a hard error, so enable ints and continue */
a6c42322
JB
3400 if (!test_bit(__E1000_DOWN, &adapter->flags))
3401 e1000_irq_enable(adapter);
3402 }
1da177e4 3403
1da177e4
LT
3404 return IRQ_HANDLED;
3405}
3406
1da177e4
LT
3407/**
3408 * e1000_clean - NAPI Rx polling callback
3409 * @adapter: board private structure
3410 **/
64798845 3411static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3412{
bea3348e 3413 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
650b5a5c 3414 int tx_clean_complete = 0, work_done = 0;
581d708e 3415
650b5a5c 3416 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3417
650b5a5c 3418 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3419
650b5a5c 3420 if (!tx_clean_complete)
d2c7ddd6
DM
3421 work_done = budget;
3422
53e52c72
DM
3423 /* If budget not fully consumed, exit the polling mode */
3424 if (work_done < budget) {
835bb129
JB
3425 if (likely(adapter->itr_setting & 3))
3426 e1000_set_itr(adapter);
288379f0 3427 napi_complete(napi);
a6c42322
JB
3428 if (!test_bit(__E1000_DOWN, &adapter->flags))
3429 e1000_irq_enable(adapter);
1da177e4
LT
3430 }
3431
bea3348e 3432 return work_done;
1da177e4
LT
3433}
3434
1da177e4
LT
3435/**
3436 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3437 * @adapter: board private structure
3438 **/
64798845
JP
3439static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3440 struct e1000_tx_ring *tx_ring)
1da177e4 3441{
1dc32918 3442 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
3443 struct net_device *netdev = adapter->netdev;
3444 struct e1000_tx_desc *tx_desc, *eop_desc;
3445 struct e1000_buffer *buffer_info;
3446 unsigned int i, eop;
2a1af5d7 3447 unsigned int count = 0;
835bb129 3448 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT
3449
3450 i = tx_ring->next_to_clean;
3451 eop = tx_ring->buffer_info[i].next_to_watch;
3452 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3453
ccfb342c
AD
3454 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3455 (count < tx_ring->count)) {
843f4267 3456 bool cleaned = false;
2d0bb1c1 3457 rmb(); /* read buffer_info after eop_desc */
843f4267 3458 for ( ; !cleaned; count++) {
1da177e4
LT
3459 tx_desc = E1000_TX_DESC(*tx_ring, i);
3460 buffer_info = &tx_ring->buffer_info[i];
3461 cleaned = (i == eop);
3462
835bb129 3463 if (cleaned) {
2b65326e 3464 struct sk_buff *skb = buffer_info->skb;
7753b171
JB
3465 unsigned int segs, bytecount;
3466 segs = skb_shinfo(skb)->gso_segs ?: 1;
3467 /* multiply data chunks by size of headers */
3468 bytecount = ((segs - 1) * skb_headlen(skb)) +
3469 skb->len;
2b65326e 3470 total_tx_packets += segs;
7753b171 3471 total_tx_bytes += bytecount;
835bb129 3472 }
fd803241 3473 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3474 tx_desc->upper.data = 0;
1da177e4 3475
96838a40 3476 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3477 }
581d708e 3478
1da177e4
LT
3479 eop = tx_ring->buffer_info[i].next_to_watch;
3480 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3481 }
3482
3483 tx_ring->next_to_clean = i;
3484
77b2aad5 3485#define TX_WAKE_THRESHOLD 32
843f4267 3486 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB
3487 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3488 /* Make sure that anybody stopping the queue after this
3489 * sees the new next_to_clean.
3490 */
3491 smp_mb();
cdd7549e
JB
3492
3493 if (netif_queue_stopped(netdev) &&
3494 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3495 netif_wake_queue(netdev);
fcfb1224
JB
3496 ++adapter->restart_queue;
3497 }
77b2aad5 3498 }
2648345f 3499
581d708e 3500 if (adapter->detect_tx_hung) {
2648345f 3501 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3502 * check with the clearing of time_stamp and movement of i */
c3033b01 3503 adapter->detect_tx_hung = false;
cdd7549e
JB
3504 if (tx_ring->buffer_info[eop].time_stamp &&
3505 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
8e95a202
JP
3506 (adapter->tx_timeout_factor * HZ)) &&
3507 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC
3508
3509 /* detected Tx unit hang */
feb8f478 3510 e_err(drv, "Detected Tx Unit Hang\n"
675ad473
ET
3511 " Tx Queue <%lu>\n"
3512 " TDH <%x>\n"
3513 " TDT <%x>\n"
3514 " next_to_use <%x>\n"
3515 " next_to_clean <%x>\n"
3516 "buffer_info[next_to_clean]\n"
3517 " time_stamp <%lx>\n"
3518 " next_to_watch <%x>\n"
3519 " jiffies <%lx>\n"
3520 " next_to_watch.status <%x>\n",
7bfa4816
JK
3521 (unsigned long)((tx_ring - adapter->tx_ring) /
3522 sizeof(struct e1000_tx_ring)),
1dc32918
JP
3523 readl(hw->hw_addr + tx_ring->tdh),
3524 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3525 tx_ring->next_to_use,
392137fa 3526 tx_ring->next_to_clean,
cdd7549e 3527 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC
3528 eop,
3529 jiffies,
3530 eop_desc->upper.fields.status);
1da177e4 3531 netif_stop_queue(netdev);
70b8f1e1 3532 }
1da177e4 3533 }
835bb129
JB
3534 adapter->total_tx_bytes += total_tx_bytes;
3535 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK
3536 netdev->stats.tx_bytes += total_tx_bytes;
3537 netdev->stats.tx_packets += total_tx_packets;
ccfb342c 3538 return (count < tx_ring->count);
1da177e4
LT
3539}
3540
3541/**
3542 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC
3543 * @adapter: board private structure
3544 * @status_err: receive descriptor status and error fields
3545 * @csum: receive descriptor csum field
3546 * @sk_buff: socket buffer with received data
1da177e4
LT
3547 **/
3548
64798845
JP
3549static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3550 u32 csum, struct sk_buff *skb)
1da177e4 3551{
1dc32918 3552 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
3553 u16 status = (u16)status_err;
3554 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC
3555 skb->ip_summed = CHECKSUM_NONE;
3556
1da177e4 3557 /* 82543 or newer only */
1dc32918 3558 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3559 /* Ignore Checksum bit is set */
96838a40 3560 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3561 /* TCP/UDP checksum error bit is set */
96838a40 3562 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3563 /* let the stack verify checksum errors */
1da177e4 3564 adapter->hw_csum_err++;
2d7edb92
MC
3565 return;
3566 }
3567 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB
3568 if (!(status & E1000_RXD_STAT_TCPCS))
3569 return;
3570
2d7edb92
MC
3571 /* It must be a TCP or UDP packet with a valid checksum */
3572 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT
3573 /* TCP checksum is good */
3574 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3575 }
2d7edb92 3576 adapter->hw_csum_good++;
1da177e4
LT
3577}
3578
edbbb3ca
JB
3579/**
3580 * e1000_consume_page - helper function
3581 **/
3582static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
3583 u16 length)
3584{
3585 bi->page = NULL;
3586 skb->len += length;
3587 skb->data_len += length;
3588 skb->truesize += length;
3589}
3590
3591/**
3592 * e1000_receive_skb - helper function to handle rx indications
3593 * @adapter: board private structure
3594 * @status: descriptor status field as written by hardware
3595 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3596 * @skb: pointer to sk_buff to be indicated to stack
3597 */
3598static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3599 __le16 vlan, struct sk_buff *skb)
3600{
3601 if (unlikely(adapter->vlgrp && (status & E1000_RXD_STAT_VP))) {
3602 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3603 le16_to_cpu(vlan) &
3604 E1000_RXD_SPC_VLAN_MASK);
3605 } else {
3606 netif_receive_skb(skb);
3607 }
3608}
3609
3610/**
3611 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
3612 * @adapter: board private structure
3613 * @rx_ring: ring to clean
3614 * @work_done: amount of napi work completed this call
3615 * @work_to_do: max amount of work allowed for this call to do
3616 *
3617 * the return value indicates whether actual cleaning was done, there
3618 * is no guarantee that everything was cleaned
3619 */
3620static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
3621 struct e1000_rx_ring *rx_ring,
3622 int *work_done, int work_to_do)
3623{
3624 struct e1000_hw *hw = &adapter->hw;
3625 struct net_device *netdev = adapter->netdev;
3626 struct pci_dev *pdev = adapter->pdev;
3627 struct e1000_rx_desc *rx_desc, *next_rxd;
3628 struct e1000_buffer *buffer_info, *next_buffer;
3629 unsigned long irq_flags;
3630 u32 length;
3631 unsigned int i;
3632 int cleaned_count = 0;
3633 bool cleaned = false;
3634 unsigned int total_rx_bytes=0, total_rx_packets=0;
3635
3636 i = rx_ring->next_to_clean;
3637 rx_desc = E1000_RX_DESC(*rx_ring, i);
3638 buffer_info = &rx_ring->buffer_info[i];
3639
3640 while (rx_desc->status & E1000_RXD_STAT_DD) {
3641 struct sk_buff *skb;
3642 u8 status;
3643
3644 if (*work_done >= work_to_do)
3645 break;
3646 (*work_done)++;
2d0bb1c1 3647 rmb(); /* read descriptor and rx_buffer_info after status DD */
edbbb3ca
JB
3648
3649 status = rx_desc->status;
3650 skb = buffer_info->skb;
3651 buffer_info->skb = NULL;
3652
3653 if (++i == rx_ring->count) i = 0;
3654 next_rxd = E1000_RX_DESC(*rx_ring, i);
3655 prefetch(next_rxd);
3656
3657 next_buffer = &rx_ring->buffer_info[i];
3658
3659 cleaned = true;
3660 cleaned_count++;
b16f53be
NN
3661 dma_unmap_page(&pdev->dev, buffer_info->dma,
3662 buffer_info->length, DMA_FROM_DEVICE);
edbbb3ca
JB
3663 buffer_info->dma = 0;
3664
3665 length = le16_to_cpu(rx_desc->length);
3666
3667 /* errors is only valid for DD + EOP descriptors */
3668 if (unlikely((status & E1000_RXD_STAT_EOP) &&
3669 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
3670 u8 last_byte = *(skb->data + length - 1);
3671 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3672 last_byte)) {
3673 spin_lock_irqsave(&adapter->stats_lock,
3674 irq_flags);
3675 e1000_tbi_adjust_stats(hw, &adapter->stats,
3676 length, skb->data);
3677 spin_unlock_irqrestore(&adapter->stats_lock,
3678 irq_flags);
3679 length--;
3680 } else {
3681 /* recycle both page and skb */
3682 buffer_info->skb = skb;
3683 /* an error means any chain goes out the window
3684 * too */
3685 if (rx_ring->rx_skb_top)
3686 dev_kfree_skb(rx_ring->rx_skb_top);
3687 rx_ring->rx_skb_top = NULL;
3688 goto next_desc;
3689 }
3690 }
3691
3692#define rxtop rx_ring->rx_skb_top
3693 if (!(status & E1000_RXD_STAT_EOP)) {
3694 /* this descriptor is only the beginning (or middle) */
3695 if (!rxtop) {
3696 /* this is the beginning of a chain */
3697 rxtop = skb;
3698 skb_fill_page_desc(rxtop, 0, buffer_info->page,
3699 0, length);
3700 } else {
3701 /* this is the middle of a chain */
3702 skb_fill_page_desc(rxtop,
3703 skb_shinfo(rxtop)->nr_frags,
3704 buffer_info->page, 0, length);
3705 /* re-use the skb, only consumed the page */
3706 buffer_info->skb = skb;
3707 }
3708 e1000_consume_page(buffer_info, rxtop, length);
3709 goto next_desc;
3710 } else {
3711 if (rxtop) {
3712 /* end of the chain */
3713 skb_fill_page_desc(rxtop,
3714 skb_shinfo(rxtop)->nr_frags,
3715 buffer_info->page, 0, length);
3716 /* re-use the current skb, we only consumed the
3717 * page */
3718 buffer_info->skb = skb;
3719 skb = rxtop;
3720 rxtop = NULL;
3721 e1000_consume_page(buffer_info, skb, length);
3722 } else {
3723 /* no chain, got EOP, this buf is the packet
3724 * copybreak to save the put_page/alloc_page */
3725 if (length <= copybreak &&
3726 skb_tailroom(skb) >= length) {
3727 u8 *vaddr;
3728 vaddr = kmap_atomic(buffer_info->page,
3729 KM_SKB_DATA_SOFTIRQ);
3730 memcpy(skb_tail_pointer(skb), vaddr, length);
3731 kunmap_atomic(vaddr,
3732 KM_SKB_DATA_SOFTIRQ);
3733 /* re-use the page, so don't erase
3734 * buffer_info->page */
3735 skb_put(skb, length);
3736 } else {
3737 skb_fill_page_desc(skb, 0,
3738 buffer_info->page, 0,
3739 length);
3740 e1000_consume_page(buffer_info, skb,
3741 length);
3742 }
3743 }
3744 }
3745
3746 /* Receive Checksum Offload XXX recompute due to CRC strip? */
3747 e1000_rx_checksum(adapter,
3748 (u32)(status) |
3749 ((u32)(rx_desc->errors) << 24),
3750 le16_to_cpu(rx_desc->csum), skb);
3751
3752 pskb_trim(skb, skb->len - 4);
3753
3754 /* probably a little skewed due to removing CRC */
3755 total_rx_bytes += skb->len;
3756 total_rx_packets++;
3757
3758 /* eth type trans needs skb->data to point to something */
3759 if (!pskb_may_pull(skb, ETH_HLEN)) {
feb8f478 3760 e_err(drv, "pskb_may_pull failed.\n");
edbbb3ca
JB
3761 dev_kfree_skb(skb);
3762 goto next_desc;
3763 }
3764
3765 skb->protocol = eth_type_trans(skb, netdev);
3766
3767 e1000_receive_skb(adapter, status, rx_desc->special, skb);
3768
3769next_desc:
3770 rx_desc->status = 0;
3771
3772 /* return some buffers to hardware, one at a time is too slow */
3773 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3774 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3775 cleaned_count = 0;
3776 }
3777
3778 /* use prefetched values */
3779 rx_desc = next_rxd;
3780 buffer_info = next_buffer;
3781 }
3782 rx_ring->next_to_clean = i;
3783
3784 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3785 if (cleaned_count)
3786 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3787
3788 adapter->total_rx_packets += total_rx_packets;
3789 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK
3790 netdev->stats.rx_bytes += total_rx_bytes;
3791 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB
3792 return cleaned;
3793}
3794
57bf6eef
JP
3795/*
3796 * this should improve performance for small packets with large amounts
3797 * of reassembly being done in the stack
3798 */
3799static void e1000_check_copybreak(struct net_device *netdev,
3800 struct e1000_buffer *buffer_info,
3801 u32 length, struct sk_buff **skb)
3802{
3803 struct sk_buff *new_skb;
3804
3805 if (length > copybreak)
3806 return;
3807
3808 new_skb = netdev_alloc_skb_ip_align(netdev, length);
3809 if (!new_skb)
3810 return;
3811
3812 skb_copy_to_linear_data_offset(new_skb, -NET_IP_ALIGN,
3813 (*skb)->data - NET_IP_ALIGN,
3814 length + NET_IP_ALIGN);
3815 /* save the skb in buffer_info as good */
3816 buffer_info->skb = *skb;
3817 *skb = new_skb;
3818}
3819
1da177e4 3820/**
2d7edb92 3821 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 3822 * @adapter: board private structure
edbbb3ca
JB
3823 * @rx_ring: ring to clean
3824 * @work_done: amount of napi work completed this call
3825 * @work_to_do: max amount of work allowed for this call to do
3826 */
64798845
JP
3827static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3828 struct e1000_rx_ring *rx_ring,
3829 int *work_done, int work_to_do)
1da177e4 3830{
1dc32918 3831 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
3832 struct net_device *netdev = adapter->netdev;
3833 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB
3834 struct e1000_rx_desc *rx_desc, *next_rxd;
3835 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3836 unsigned long flags;
406874a7 3837 u32 length;
1da177e4 3838 unsigned int i;
72d64a43 3839 int cleaned_count = 0;
c3033b01 3840 bool cleaned = false;
835bb129 3841 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT
3842
3843 i = rx_ring->next_to_clean;
3844 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3845 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3846
b92ff8ee 3847 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3848 struct sk_buff *skb;
a292ca6e 3849 u8 status;
90fb5135 3850
96838a40 3851 if (*work_done >= work_to_do)
1da177e4
LT
3852 break;
3853 (*work_done)++;
2d0bb1c1 3854 rmb(); /* read descriptor and rx_buffer_info after status DD */
c3570acb 3855
a292ca6e 3856 status = rx_desc->status;
b92ff8ee 3857 skb = buffer_info->skb;
86c3d59f
JB
3858 buffer_info->skb = NULL;
3859
30320be8
JK
3860 prefetch(skb->data - NET_IP_ALIGN);
3861
86c3d59f
JB
3862 if (++i == rx_ring->count) i = 0;
3863 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK
3864 prefetch(next_rxd);
3865
86c3d59f 3866 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3867
c3033b01 3868 cleaned = true;
72d64a43 3869 cleaned_count++;
b16f53be
NN
3870 dma_unmap_single(&pdev->dev, buffer_info->dma,
3871 buffer_info->length, DMA_FROM_DEVICE);
679be3ba 3872 buffer_info->dma = 0;
1da177e4 3873
1da177e4 3874 length = le16_to_cpu(rx_desc->length);
ea30e119 3875 /* !EOP means multiple descriptors were used to store a single
40a14dea
JB
3876 * packet, if thats the case we need to toss it. In fact, we
3877 * to toss every packet with the EOP bit clear and the next
3878 * frame that _does_ have the EOP bit set, as it is by
3879 * definition only a frame fragment
3880 */
3881 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
3882 adapter->discarding = true;
3883
3884 if (adapter->discarding) {
a1415ee6 3885 /* All receives must fit into a single buffer */
feb8f478 3886 e_dbg("Receive packet consumed multiple buffers\n");
864c4e45 3887 /* recycle */
8fc897b0 3888 buffer_info->skb = skb;
40a14dea
JB
3889 if (status & E1000_RXD_STAT_EOP)
3890 adapter->discarding = false;
1da177e4
LT
3891 goto next_desc;
3892 }
3893
96838a40 3894 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
edbbb3ca 3895 u8 last_byte = *(skb->data + length - 1);
1dc32918
JP
3896 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3897 last_byte)) {
1da177e4 3898 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 3899 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT
3900 length, skb->data);
3901 spin_unlock_irqrestore(&adapter->stats_lock,
3902 flags);
3903 length--;
3904 } else {
9e2feace
AK
3905 /* recycle */
3906 buffer_info->skb = skb;
1da177e4
LT
3907 goto next_desc;
3908 }
1cb5821f 3909 }
1da177e4 3910
d2a1e213
JB
3911 /* adjust length to remove Ethernet CRC, this must be
3912 * done after the TBI_ACCEPT workaround above */
3913 length -= 4;
3914
835bb129
JB
3915 /* probably a little skewed due to removing CRC */
3916 total_rx_bytes += length;
3917 total_rx_packets++;
3918
57bf6eef
JP
3919 e1000_check_copybreak(netdev, buffer_info, length, &skb);
3920
996695de 3921 skb_put(skb, length);
1da177e4
LT
3922
3923 /* Receive Checksum Offload */
a292ca6e 3924 e1000_rx_checksum(adapter,
406874a7
JP
3925 (u32)(status) |
3926 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 3927 le16_to_cpu(rx_desc->csum), skb);
96838a40 3928
1da177e4 3929 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 3930
edbbb3ca 3931 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 3932
1da177e4
LT
3933next_desc:
3934 rx_desc->status = 0;
1da177e4 3935
72d64a43
JK
3936 /* return some buffers to hardware, one at a time is too slow */
3937 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3938 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3939 cleaned_count = 0;
3940 }
3941
30320be8 3942 /* use prefetched values */
86c3d59f
JB
3943 rx_desc = next_rxd;
3944 buffer_info = next_buffer;
1da177e4 3945 }
1da177e4 3946 rx_ring->next_to_clean = i;
72d64a43
JK
3947
3948 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3949 if (cleaned_count)
3950 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 3951
835bb129
JB
3952 adapter->total_rx_packets += total_rx_packets;
3953 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK
3954 netdev->stats.rx_bytes += total_rx_bytes;
3955 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC
3956 return cleaned;
3957}
3958
edbbb3ca
JB
3959/**
3960 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
3961 * @adapter: address of board private structure
3962 * @rx_ring: pointer to receive ring structure
3963 * @cleaned_count: number of buffers to allocate this pass
3964 **/
3965
3966static void
3967e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
3968 struct e1000_rx_ring *rx_ring, int cleaned_count)
3969{
3970 struct net_device *netdev = adapter->netdev;
3971 struct pci_dev *pdev = adapter->pdev;
3972 struct e1000_rx_desc *rx_desc;
3973 struct e1000_buffer *buffer_info;
3974 struct sk_buff *skb;
3975 unsigned int i;
89d71a66 3976 unsigned int bufsz = 256 - 16 /*for skb_reserve */ ;
edbbb3ca
JB
3977
3978 i = rx_ring->next_to_use;
3979 buffer_info = &rx_ring->buffer_info[i];
3980
3981 while (cleaned_count--) {
3982 skb = buffer_info->skb;
3983 if (skb) {
3984 skb_trim(skb, 0);
3985 goto check_page;
3986 }
3987
89d71a66 3988 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB
3989 if (unlikely(!skb)) {
3990 /* Better luck next round */
3991 adapter->alloc_rx_buff_failed++;
3992 break;
3993 }
3994
3995 /* Fix for errata 23, can't cross 64kB boundary */
3996 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3997 struct sk_buff *oldskb = skb;
feb8f478
ET
3998 e_err(rx_err, "skb align check failed: %u bytes at "
3999 "%p\n", bufsz, skb->data);
edbbb3ca 4000 /* Try again, without freeing the previous */
89d71a66 4001 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB
4002 /* Failed allocation, critical failure */
4003 if (!skb) {
4004 dev_kfree_skb(oldskb);
4005 adapter->alloc_rx_buff_failed++;
4006 break;
4007 }
4008
4009 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4010 /* give up */
4011 dev_kfree_skb(skb);
4012 dev_kfree_skb(oldskb);
4013 break; /* while (cleaned_count--) */
4014 }
4015
4016 /* Use new allocation */
4017 dev_kfree_skb(oldskb);
4018 }
edbbb3ca
JB
4019 buffer_info->skb = skb;
4020 buffer_info->length = adapter->rx_buffer_len;
4021check_page:
4022 /* allocate a new page if necessary */
4023 if (!buffer_info->page) {
4024 buffer_info->page = alloc_page(GFP_ATOMIC);
4025 if (unlikely(!buffer_info->page)) {
4026 adapter->alloc_rx_buff_failed++;
4027 break;
4028 }
4029 }
4030
b5abb028 4031 if (!buffer_info->dma) {
b16f53be 4032 buffer_info->dma = dma_map_page(&pdev->dev,
edbbb3ca 4033 buffer_info->page, 0,
b16f53be
NN
4034 buffer_info->length,
4035 DMA_FROM_DEVICE);
4036 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB
4037 put_page(buffer_info->page);
4038 dev_kfree_skb(skb);
4039 buffer_info->page = NULL;
4040 buffer_info->skb = NULL;
4041 buffer_info->dma = 0;
4042 adapter->alloc_rx_buff_failed++;
4043 break; /* while !buffer_info->skb */
4044 }
4045 }
edbbb3ca
JB
4046
4047 rx_desc = E1000_RX_DESC(*rx_ring, i);
4048 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4049
4050 if (unlikely(++i == rx_ring->count))
4051 i = 0;
4052 buffer_info = &rx_ring->buffer_info[i];
4053 }
4054
4055 if (likely(rx_ring->next_to_use != i)) {
4056 rx_ring->next_to_use = i;
4057 if (unlikely(i-- == 0))
4058 i = (rx_ring->count - 1);
4059
4060 /* Force memory writes to complete before letting h/w
4061 * know there are new descriptors to fetch. (Only
4062 * applicable for weak-ordered memory model archs,
4063 * such as IA-64). */
4064 wmb();
4065 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4066 }
4067}
4068
1da177e4 4069/**
2d7edb92 4070 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT
4071 * @adapter: address of board private structure
4072 **/
4073
64798845
JP
4074static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4075 struct e1000_rx_ring *rx_ring,
4076 int cleaned_count)
1da177e4 4077{
1dc32918 4078 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
4079 struct net_device *netdev = adapter->netdev;
4080 struct pci_dev *pdev = adapter->pdev;
4081 struct e1000_rx_desc *rx_desc;
4082 struct e1000_buffer *buffer_info;
4083 struct sk_buff *skb;
2648345f 4084 unsigned int i;
89d71a66 4085 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT
4086
4087 i = rx_ring->next_to_use;
4088 buffer_info = &rx_ring->buffer_info[i];
4089
a292ca6e 4090 while (cleaned_count--) {
ca6f7224
CH
4091 skb = buffer_info->skb;
4092 if (skb) {
a292ca6e
JK
4093 skb_trim(skb, 0);
4094 goto map_skb;
4095 }
4096
89d71a66 4097 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
96838a40 4098 if (unlikely(!skb)) {
1da177e4 4099 /* Better luck next round */
72d64a43 4100 adapter->alloc_rx_buff_failed++;
1da177e4
LT
4101 break;
4102 }
4103
2648345f 4104 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT
4105 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4106 struct sk_buff *oldskb = skb;
feb8f478
ET
4107 e_err(rx_err, "skb align check failed: %u bytes at "
4108 "%p\n", bufsz, skb->data);
2648345f 4109 /* Try again, without freeing the previous */
89d71a66 4110 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
2648345f 4111 /* Failed allocation, critical failure */
1da177e4
LT
4112 if (!skb) {
4113 dev_kfree_skb(oldskb);
edbbb3ca 4114 adapter->alloc_rx_buff_failed++;
1da177e4
LT
4115 break;
4116 }
2648345f 4117
1da177e4
LT
4118 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4119 /* give up */
4120 dev_kfree_skb(skb);
4121 dev_kfree_skb(oldskb);
edbbb3ca 4122 adapter->alloc_rx_buff_failed++;
1da177e4 4123 break; /* while !buffer_info->skb */
1da177e4 4124 }
ca6f7224
CH
4125
4126 /* Use new allocation */
4127 dev_kfree_skb(oldskb);
1da177e4 4128 }
1da177e4
LT
4129 buffer_info->skb = skb;
4130 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4131map_skb:
b16f53be 4132 buffer_info->dma = dma_map_single(&pdev->dev,
1da177e4 4133 skb->data,
edbbb3ca 4134 buffer_info->length,
b16f53be
NN
4135 DMA_FROM_DEVICE);
4136 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB
4137 dev_kfree_skb(skb);
4138 buffer_info->skb = NULL;
4139 buffer_info->dma = 0;
4140 adapter->alloc_rx_buff_failed++;
4141 break; /* while !buffer_info->skb */
4142 }
1da177e4 4143
edbbb3ca
JB
4144 /*
4145 * XXX if it was allocated cleanly it will never map to a
4146 * boundary crossing
4147 */
4148
2648345f
MC
4149 /* Fix for errata 23, can't cross 64kB boundary */
4150 if (!e1000_check_64k_bound(adapter,
4151 (void *)(unsigned long)buffer_info->dma,
4152 adapter->rx_buffer_len)) {
feb8f478
ET
4153 e_err(rx_err, "dma align check failed: %u bytes at "
4154 "%p\n", adapter->rx_buffer_len,
675ad473 4155 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT
4156 dev_kfree_skb(skb);
4157 buffer_info->skb = NULL;
4158
b16f53be 4159 dma_unmap_single(&pdev->dev, buffer_info->dma,
1da177e4 4160 adapter->rx_buffer_len,
b16f53be 4161 DMA_FROM_DEVICE);
679be3ba 4162 buffer_info->dma = 0;
1da177e4 4163
edbbb3ca 4164 adapter->alloc_rx_buff_failed++;
1da177e4
LT
4165 break; /* while !buffer_info->skb */
4166 }
1da177e4
LT
4167 rx_desc = E1000_RX_DESC(*rx_ring, i);
4168 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4169
96838a40
JB
4170 if (unlikely(++i == rx_ring->count))
4171 i = 0;
1da177e4
LT
4172 buffer_info = &rx_ring->buffer_info[i];
4173 }
4174
b92ff8ee
JB
4175 if (likely(rx_ring->next_to_use != i)) {
4176 rx_ring->next_to_use = i;
4177 if (unlikely(i-- == 0))
4178 i = (rx_ring->count - 1);
4179
4180 /* Force memory writes to complete before letting h/w
4181 * know there are new descriptors to fetch. (Only
4182 * applicable for weak-ordered memory model archs,
4183 * such as IA-64). */
4184 wmb();
1dc32918 4185 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4186 }
1da177e4
LT
4187}
4188
4189/**
4190 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4191 * @adapter:
4192 **/
4193
64798845 4194static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4195{
1dc32918 4196 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
4197 u16 phy_status;
4198 u16 phy_ctrl;
1da177e4 4199
1dc32918
JP
4200 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4201 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT
4202 return;
4203
96838a40 4204 if (adapter->smartspeed == 0) {
1da177e4
LT
4205 /* If Master/Slave config fault is asserted twice,
4206 * we assume back-to-back */
1dc32918 4207 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4208 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4209 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4210 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4211 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4212 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4213 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4214 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT
4215 phy_ctrl);
4216 adapter->smartspeed++;
1dc32918
JP
4217 if (!e1000_phy_setup_autoneg(hw) &&
4218 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT
4219 &phy_ctrl)) {
4220 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4221 MII_CR_RESTART_AUTO_NEG);
1dc32918 4222 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT
4223 phy_ctrl);
4224 }
4225 }
4226 return;
96838a40 4227 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4228 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4229 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4230 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP
4231 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4232 if (!e1000_phy_setup_autoneg(hw) &&
4233 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT
4234 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4235 MII_CR_RESTART_AUTO_NEG);
1dc32918 4236 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT
4237 }
4238 }
4239 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4240 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT
4241 adapter->smartspeed = 0;
4242}
4243
4244/**
4245 * e1000_ioctl -
4246 * @netdev:
4247 * @ifreq:
4248 * @cmd:
4249 **/
4250
64798845 4251static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT
4252{
4253 switch (cmd) {
4254 case SIOCGMIIPHY:
4255 case SIOCGMIIREG:
4256 case SIOCSMIIREG:
4257 return e1000_mii_ioctl(netdev, ifr, cmd);
4258 default:
4259 return -EOPNOTSUPP;
4260 }
4261}
4262
4263/**
4264 * e1000_mii_ioctl -
4265 * @netdev:
4266 * @ifreq:
4267 * @cmd:
4268 **/
4269
64798845
JP
4270static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4271 int cmd)
1da177e4 4272{
60490fe0 4273 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4274 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
4275 struct mii_ioctl_data *data = if_mii(ifr);
4276 int retval;
406874a7
JP
4277 u16 mii_reg;
4278 u16 spddplx;
97876fc6 4279 unsigned long flags;
1da177e4 4280
1dc32918 4281 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT
4282 return -EOPNOTSUPP;
4283
4284 switch (cmd) {
4285 case SIOCGMIIPHY:
1dc32918 4286 data->phy_id = hw->phy_addr;
1da177e4
LT
4287 break;
4288 case SIOCGMIIREG:
97876fc6 4289 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4290 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC
4291 &data->val_out)) {
4292 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4293 return -EIO;
97876fc6
MC
4294 }
4295 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT
4296 break;
4297 case SIOCSMIIREG:
96838a40 4298 if (data->reg_num & ~(0x1F))
1da177e4
LT
4299 return -EFAULT;
4300 mii_reg = data->val_in;
97876fc6 4301 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4302 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC
4303 mii_reg)) {
4304 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4305 return -EIO;
97876fc6 4306 }
f0163ac4 4307 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4308 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT
4309 switch (data->reg_num) {
4310 case PHY_CTRL:
96838a40 4311 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4312 break;
96838a40 4313 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP
4314 hw->autoneg = 1;
4315 hw->autoneg_advertised = 0x2F;
1da177e4
LT
4316 } else {
4317 if (mii_reg & 0x40)
4318 spddplx = SPEED_1000;
4319 else if (mii_reg & 0x2000)
4320 spddplx = SPEED_100;
4321 else
4322 spddplx = SPEED_10;
4323 spddplx += (mii_reg & 0x100)
cb764326
JK
4324 ? DUPLEX_FULL :
4325 DUPLEX_HALF;
1da177e4
LT
4326 retval = e1000_set_spd_dplx(adapter,
4327 spddplx);
f0163ac4 4328 if (retval)
1da177e4
LT
4329 return retval;
4330 }
2db10a08
AK
4331 if (netif_running(adapter->netdev))
4332 e1000_reinit_locked(adapter);
4333 else
1da177e4
LT
4334 e1000_reset(adapter);
4335 break;
4336 case M88E1000_PHY_SPEC_CTRL:
4337 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4338 if (e1000_phy_reset(hw))
1da177e4
LT
4339 return -EIO;
4340 break;
4341 }
4342 } else {
4343 switch (data->reg_num) {
4344 case PHY_CTRL:
96838a40 4345 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4346 break;
2db10a08
AK
4347 if (netif_running(adapter->netdev))
4348 e1000_reinit_locked(adapter);
4349 else
1da177e4
LT
4350 e1000_reset(adapter);
4351 break;
4352 }
4353 }
4354 break;
4355 default:
4356 return -EOPNOTSUPP;
4357 }
4358 return E1000_SUCCESS;
4359}
4360
64798845 4361void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT
4362{
4363 struct e1000_adapter *adapter = hw->back;
2648345f 4364 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4365
96838a40 4366 if (ret_val)
feb8f478 4367 e_err(probe, "Error in setting MWI\n");
1da177e4
LT
4368}
4369
64798845 4370void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT
4371{
4372 struct e1000_adapter *adapter = hw->back;
4373
4374 pci_clear_mwi(adapter->pdev);
4375}
4376
64798845 4377int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO
4378{
4379 struct e1000_adapter *adapter = hw->back;
4380 return pcix_get_mmrbc(adapter->pdev);
4381}
4382
64798845 4383void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO
4384{
4385 struct e1000_adapter *adapter = hw->back;
4386 pcix_set_mmrbc(adapter->pdev, mmrbc);
4387}
4388
64798845 4389void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT
4390{
4391 outl(value, port);
4392}
4393
64798845
JP
4394static void e1000_vlan_rx_register(struct net_device *netdev,
4395 struct vlan_group *grp)
1da177e4 4396{
60490fe0 4397 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4398 struct e1000_hw *hw = &adapter->hw;
406874a7 4399 u32 ctrl, rctl;
1da177e4 4400
9150b76a
JB
4401 if (!test_bit(__E1000_DOWN, &adapter->flags))
4402 e1000_irq_disable(adapter);
1da177e4
LT
4403 adapter->vlgrp = grp;
4404
96838a40 4405 if (grp) {
1da177e4 4406 /* enable VLAN tag insert/strip */
1dc32918 4407 ctrl = er32(CTRL);
1da177e4 4408 ctrl |= E1000_CTRL_VME;
1dc32918 4409 ew32(CTRL, ctrl);
1da177e4 4410
1532ecea
JB
4411 /* enable VLAN receive filtering */
4412 rctl = er32(RCTL);
4413 rctl &= ~E1000_RCTL_CFIEN;
4414 if (!(netdev->flags & IFF_PROMISC))
4415 rctl |= E1000_RCTL_VFE;
4416 ew32(RCTL, rctl);
4417 e1000_update_mng_vlan(adapter);
1da177e4
LT
4418 } else {
4419 /* disable VLAN tag insert/strip */
1dc32918 4420 ctrl = er32(CTRL);
1da177e4 4421 ctrl &= ~E1000_CTRL_VME;
1dc32918 4422 ew32(CTRL, ctrl);
1da177e4 4423
1532ecea
JB
4424 /* disable VLAN receive filtering */
4425 rctl = er32(RCTL);
4426 rctl &= ~E1000_RCTL_VFE;
4427 ew32(RCTL, rctl);
fd38d7a0 4428
1532ecea 4429 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
120a5d0d 4430 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1532ecea 4431 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
cd94dd0b 4432 }
1da177e4
LT
4433 }
4434
9150b76a
JB
4435 if (!test_bit(__E1000_DOWN, &adapter->flags))
4436 e1000_irq_enable(adapter);
1da177e4
LT
4437}
4438
64798845 4439static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4440{
60490fe0 4441 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4442 struct e1000_hw *hw = &adapter->hw;
406874a7 4443 u32 vfta, index;
96838a40 4444
1dc32918 4445 if ((hw->mng_cookie.status &
96838a40
JB
4446 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4447 (vid == adapter->mng_vlan_id))
2d7edb92 4448 return;
1da177e4
LT
4449 /* add VID to filter table */
4450 index = (vid >> 5) & 0x7F;
1dc32918 4451 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4452 vfta |= (1 << (vid & 0x1F));
1dc32918 4453 e1000_write_vfta(hw, index, vfta);
1da177e4
LT
4454}
4455
64798845 4456static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4457{
60490fe0 4458 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4459 struct e1000_hw *hw = &adapter->hw;
406874a7 4460 u32 vfta, index;
1da177e4 4461
9150b76a
JB
4462 if (!test_bit(__E1000_DOWN, &adapter->flags))
4463 e1000_irq_disable(adapter);
5c15bdec 4464 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB
4465 if (!test_bit(__E1000_DOWN, &adapter->flags))
4466 e1000_irq_enable(adapter);
1da177e4
LT
4467
4468 /* remove VID from filter table */
4469 index = (vid >> 5) & 0x7F;
1dc32918 4470 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4471 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4472 e1000_write_vfta(hw, index, vfta);
1da177e4
LT
4473}
4474
64798845 4475static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT
4476{
4477 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4478
96838a40 4479 if (adapter->vlgrp) {
406874a7 4480 u16 vid;
96838a40 4481 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4482 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT
4483 continue;
4484 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4485 }
4486 }
4487}
4488
64798845 4489int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4490{
1dc32918
JP
4491 struct e1000_hw *hw = &adapter->hw;
4492
4493 hw->autoneg = 0;
1da177e4 4494
6921368f 4495 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4496 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f 4497 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
feb8f478 4498 e_err(probe, "Unsupported Speed/Duplex configuration\n");
6921368f
MC
4499 return -EINVAL;
4500 }
4501
96838a40 4502 switch (spddplx) {
1da177e4 4503 case SPEED_10 + DUPLEX_HALF:
1dc32918 4504 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT
4505 break;
4506 case SPEED_10 + DUPLEX_FULL:
1dc32918 4507 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT
4508 break;
4509 case SPEED_100 + DUPLEX_HALF:
1dc32918 4510 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT
4511 break;
4512 case SPEED_100 + DUPLEX_FULL:
1dc32918 4513 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT
4514 break;
4515 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP
4516 hw->autoneg = 1;
4517 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT
4518 break;
4519 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4520 default:
feb8f478 4521 e_err(probe, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT
4522 return -EINVAL;
4523 }
4524 return 0;
4525}
4526
b43fcd7d 4527static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT
4528{
4529 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4530 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4531 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
4532 u32 ctrl, ctrl_ext, rctl, status;
4533 u32 wufc = adapter->wol;
6fdfef16 4534#ifdef CONFIG_PM
240b1710 4535 int retval = 0;
6fdfef16 4536#endif
1da177e4
LT
4537
4538 netif_device_detach(netdev);
4539
2db10a08
AK
4540 if (netif_running(netdev)) {
4541 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4542 e1000_down(adapter);
2db10a08 4543 }
1da177e4 4544
2f82665f 4545#ifdef CONFIG_PM
1d33e9c6 4546 retval = pci_save_state(pdev);
2f82665f
JB
4547 if (retval)
4548 return retval;
4549#endif
4550
1dc32918 4551 status = er32(STATUS);
96838a40 4552 if (status & E1000_STATUS_LU)
1da177e4
LT
4553 wufc &= ~E1000_WUFC_LNKC;
4554
96838a40 4555 if (wufc) {
1da177e4 4556 e1000_setup_rctl(adapter);
db0ce50d 4557 e1000_set_rx_mode(netdev);
1da177e4
LT
4558
4559 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4560 if (wufc & E1000_WUFC_MC) {
1dc32918 4561 rctl = er32(RCTL);
1da177e4 4562 rctl |= E1000_RCTL_MPE;
1dc32918 4563 ew32(RCTL, rctl);
1da177e4
LT
4564 }
4565
1dc32918
JP
4566 if (hw->mac_type >= e1000_82540) {
4567 ctrl = er32(CTRL);
1da177e4
LT
4568 /* advertise wake from D3Cold */
4569 #define E1000_CTRL_ADVD3WUC 0x00100000
4570 /* phy power management enable */
4571 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4572 ctrl |= E1000_CTRL_ADVD3WUC |
4573 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4574 ew32(CTRL, ctrl);
1da177e4
LT
4575 }
4576
1dc32918 4577 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 4578 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4579 /* keep the laser running in D3 */
1dc32918 4580 ctrl_ext = er32(CTRL_EXT);
1da177e4 4581 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4582 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT
4583 }
4584
1dc32918
JP
4585 ew32(WUC, E1000_WUC_PME_EN);
4586 ew32(WUFC, wufc);
1da177e4 4587 } else {
1dc32918
JP
4588 ew32(WUC, 0);
4589 ew32(WUFC, 0);
1da177e4
LT
4590 }
4591
0fccd0e9
JG
4592 e1000_release_manageability(adapter);
4593
b43fcd7d
RW
4594 *enable_wake = !!wufc;
4595
0fccd0e9 4596 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW
4597 if (adapter->en_mng_pt)
4598 *enable_wake = true;
1da177e4 4599
edd106fc
AK
4600 if (netif_running(netdev))
4601 e1000_free_irq(adapter);
4602
1da177e4 4603 pci_disable_device(pdev);
240b1710 4604
1da177e4
LT
4605 return 0;
4606}
4607
2f82665f 4608#ifdef CONFIG_PM
b43fcd7d
RW
4609static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4610{
4611 int retval;
4612 bool wake;
4613
4614 retval = __e1000_shutdown(pdev, &wake);
4615 if (retval)
4616 return retval;
4617
4618 if (wake) {
4619 pci_prepare_to_sleep(pdev);
4620 } else {
4621 pci_wake_from_d3(pdev, false);
4622 pci_set_power_state(pdev, PCI_D3hot);
4623 }
4624
4625 return 0;
4626}
4627
64798845 4628static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT
4629{
4630 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4631 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4632 struct e1000_hw *hw = &adapter->hw;
406874a7 4633 u32 err;
1da177e4 4634
d0e027db 4635 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4636 pci_restore_state(pdev);
dbb5aaeb 4637 pci_save_state(pdev);
81250297
TI
4638
4639 if (adapter->need_ioport)
4640 err = pci_enable_device(pdev);
4641 else
4642 err = pci_enable_device_mem(pdev);
c7be73bc 4643 if (err) {
675ad473 4644 pr_err("Cannot enable PCI device from suspend\n");
3d1dd8cb
AK
4645 return err;
4646 }
a4cb847d 4647 pci_set_master(pdev);
1da177e4 4648
d0e027db
AK
4649 pci_enable_wake(pdev, PCI_D3hot, 0);
4650 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4651
c7be73bc
JP
4652 if (netif_running(netdev)) {
4653 err = e1000_request_irq(adapter);
4654 if (err)
4655 return err;
4656 }
edd106fc
AK
4657
4658 e1000_power_up_phy(adapter);
1da177e4 4659 e1000_reset(adapter);
1dc32918 4660 ew32(WUS, ~0);
1da177e4 4661
0fccd0e9
JG
4662 e1000_init_manageability(adapter);
4663
96838a40 4664 if (netif_running(netdev))
1da177e4
LT
4665 e1000_up(adapter);
4666
4667 netif_device_attach(netdev);
4668
1da177e4
LT
4669 return 0;
4670}
4671#endif
c653e635
AK
4672
4673static void e1000_shutdown(struct pci_dev *pdev)
4674{
b43fcd7d
RW
4675 bool wake;
4676
4677 __e1000_shutdown(pdev, &wake);
4678
4679 if (system_state == SYSTEM_POWER_OFF) {
4680 pci_wake_from_d3(pdev, wake);
4681 pci_set_power_state(pdev, PCI_D3hot);
4682 }
c653e635
AK
4683}
4684
1da177e4
LT
4685#ifdef CONFIG_NET_POLL_CONTROLLER
4686/*
4687 * Polling 'interrupt' - used by things like netconsole to send skbs
4688 * without having to re-enable interrupts. It's not called while
4689 * the interrupt routine is executing.
4690 */
64798845 4691static void e1000_netpoll(struct net_device *netdev)
1da177e4 4692{
60490fe0 4693 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4694
1da177e4 4695 disable_irq(adapter->pdev->irq);
7d12e780 4696 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT
4697 enable_irq(adapter->pdev->irq);
4698}
4699#endif
4700
9026729b
AK
4701/**
4702 * e1000_io_error_detected - called when PCI error is detected
4703 * @pdev: Pointer to PCI device
120a5d0d 4704 * @state: The current pci connection state
9026729b
AK
4705 *
4706 * This function is called after a PCI bus error affecting
4707 * this device has been detected.
4708 */
64798845
JP
4709static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4710 pci_channel_state_t state)
9026729b
AK
4711{
4712 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4713 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK
4714
4715 netif_device_detach(netdev);
4716
eab63302
AD
4717 if (state == pci_channel_io_perm_failure)
4718 return PCI_ERS_RESULT_DISCONNECT;
4719
9026729b
AK
4720 if (netif_running(netdev))
4721 e1000_down(adapter);
72e8d6bb 4722 pci_disable_device(pdev);
9026729b
AK
4723
4724 /* Request a slot slot reset. */
4725 return PCI_ERS_RESULT_NEED_RESET;
4726}
4727
4728/**
4729 * e1000_io_slot_reset - called after the pci bus has been reset.
4730 * @pdev: Pointer to PCI device
4731 *
4732 * Restart the card from scratch, as if from a cold-boot. Implementation
4733 * resembles the first-half of the e1000_resume routine.
4734 */
4735static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4736{
4737 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4738 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4739 struct e1000_hw *hw = &adapter->hw;
81250297 4740 int err;
9026729b 4741
81250297
TI
4742 if (adapter->need_ioport)
4743 err = pci_enable_device(pdev);
4744 else
4745 err = pci_enable_device_mem(pdev);
4746 if (err) {
675ad473 4747 pr_err("Cannot re-enable PCI device after reset.\n");
9026729b
AK
4748 return PCI_ERS_RESULT_DISCONNECT;
4749 }
4750 pci_set_master(pdev);
4751
dbf38c94
LV
4752 pci_enable_wake(pdev, PCI_D3hot, 0);
4753 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4754
9026729b 4755 e1000_reset(adapter);
1dc32918 4756 ew32(WUS, ~0);
9026729b
AK
4757
4758 return PCI_ERS_RESULT_RECOVERED;
4759}
4760
4761/**
4762 * e1000_io_resume - called when traffic can start flowing again.
4763 * @pdev: Pointer to PCI device
4764 *
4765 * This callback is called when the error recovery driver tells us that
4766 * its OK to resume normal operation. Implementation resembles the
4767 * second-half of the e1000_resume routine.
4768 */
4769static void e1000_io_resume(struct pci_dev *pdev)
4770{
4771 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4772 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG
4773
4774 e1000_init_manageability(adapter);
9026729b
AK
4775
4776 if (netif_running(netdev)) {
4777 if (e1000_up(adapter)) {
675ad473 4778 pr_info("can't bring device back up after reset\n");
9026729b
AK
4779 return;
4780 }
4781 }
4782
4783 netif_device_attach(netdev);
9026729b
AK
4784}
4785
1da177e4 4786/* e1000_main.c */