Commit | Line | Data |
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1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
0abb6eb1 AK |
3 | Intel PRO/1000 Linux driver |
4 | Copyright(c) 1999 - 2006 Intel Corporation. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
1da177e4 | 13 | more details. |
0abb6eb1 | 14 | |
1da177e4 | 15 | You should have received a copy of the GNU General Public License along with |
0abb6eb1 AK |
16 | this program; if not, write to the Free Software Foundation, Inc., |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
1da177e4 LT |
22 | Contact Information: |
23 | Linux NICS <linux.nics@intel.com> | |
3d41e30a | 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
1da177e4 LT |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | #include "e1000.h" | |
30 | ||
1da177e4 | 31 | char e1000_driver_name[] = "e1000"; |
3ad2cc67 | 32 | static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; |
1da177e4 LT |
33 | #ifndef CONFIG_E1000_NAPI |
34 | #define DRIVERNAPI | |
35 | #else | |
36 | #define DRIVERNAPI "-NAPI" | |
37 | #endif | |
7cc33234 | 38 | #define DRV_VERSION "7.2.7-k2"DRIVERNAPI |
1da177e4 | 39 | char e1000_driver_version[] = DRV_VERSION; |
3d41e30a | 40 | static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; |
1da177e4 LT |
41 | |
42 | /* e1000_pci_tbl - PCI Device ID Table | |
43 | * | |
44 | * Last entry must be all 0s | |
45 | * | |
46 | * Macro expands to... | |
47 | * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)} | |
48 | */ | |
49 | static struct pci_device_id e1000_pci_tbl[] = { | |
50 | INTEL_E1000_ETHERNET_DEVICE(0x1000), | |
51 | INTEL_E1000_ETHERNET_DEVICE(0x1001), | |
52 | INTEL_E1000_ETHERNET_DEVICE(0x1004), | |
53 | INTEL_E1000_ETHERNET_DEVICE(0x1008), | |
54 | INTEL_E1000_ETHERNET_DEVICE(0x1009), | |
55 | INTEL_E1000_ETHERNET_DEVICE(0x100C), | |
56 | INTEL_E1000_ETHERNET_DEVICE(0x100D), | |
57 | INTEL_E1000_ETHERNET_DEVICE(0x100E), | |
58 | INTEL_E1000_ETHERNET_DEVICE(0x100F), | |
59 | INTEL_E1000_ETHERNET_DEVICE(0x1010), | |
60 | INTEL_E1000_ETHERNET_DEVICE(0x1011), | |
61 | INTEL_E1000_ETHERNET_DEVICE(0x1012), | |
62 | INTEL_E1000_ETHERNET_DEVICE(0x1013), | |
63 | INTEL_E1000_ETHERNET_DEVICE(0x1014), | |
64 | INTEL_E1000_ETHERNET_DEVICE(0x1015), | |
65 | INTEL_E1000_ETHERNET_DEVICE(0x1016), | |
66 | INTEL_E1000_ETHERNET_DEVICE(0x1017), | |
67 | INTEL_E1000_ETHERNET_DEVICE(0x1018), | |
68 | INTEL_E1000_ETHERNET_DEVICE(0x1019), | |
2648345f | 69 | INTEL_E1000_ETHERNET_DEVICE(0x101A), |
1da177e4 LT |
70 | INTEL_E1000_ETHERNET_DEVICE(0x101D), |
71 | INTEL_E1000_ETHERNET_DEVICE(0x101E), | |
72 | INTEL_E1000_ETHERNET_DEVICE(0x1026), | |
73 | INTEL_E1000_ETHERNET_DEVICE(0x1027), | |
74 | INTEL_E1000_ETHERNET_DEVICE(0x1028), | |
ae2c3860 AK |
75 | INTEL_E1000_ETHERNET_DEVICE(0x1049), |
76 | INTEL_E1000_ETHERNET_DEVICE(0x104A), | |
77 | INTEL_E1000_ETHERNET_DEVICE(0x104B), | |
78 | INTEL_E1000_ETHERNET_DEVICE(0x104C), | |
79 | INTEL_E1000_ETHERNET_DEVICE(0x104D), | |
07b8fede MC |
80 | INTEL_E1000_ETHERNET_DEVICE(0x105E), |
81 | INTEL_E1000_ETHERNET_DEVICE(0x105F), | |
82 | INTEL_E1000_ETHERNET_DEVICE(0x1060), | |
1da177e4 LT |
83 | INTEL_E1000_ETHERNET_DEVICE(0x1075), |
84 | INTEL_E1000_ETHERNET_DEVICE(0x1076), | |
85 | INTEL_E1000_ETHERNET_DEVICE(0x1077), | |
86 | INTEL_E1000_ETHERNET_DEVICE(0x1078), | |
87 | INTEL_E1000_ETHERNET_DEVICE(0x1079), | |
88 | INTEL_E1000_ETHERNET_DEVICE(0x107A), | |
89 | INTEL_E1000_ETHERNET_DEVICE(0x107B), | |
90 | INTEL_E1000_ETHERNET_DEVICE(0x107C), | |
07b8fede MC |
91 | INTEL_E1000_ETHERNET_DEVICE(0x107D), |
92 | INTEL_E1000_ETHERNET_DEVICE(0x107E), | |
93 | INTEL_E1000_ETHERNET_DEVICE(0x107F), | |
1da177e4 | 94 | INTEL_E1000_ETHERNET_DEVICE(0x108A), |
2648345f MC |
95 | INTEL_E1000_ETHERNET_DEVICE(0x108B), |
96 | INTEL_E1000_ETHERNET_DEVICE(0x108C), | |
6418ecc6 JK |
97 | INTEL_E1000_ETHERNET_DEVICE(0x1096), |
98 | INTEL_E1000_ETHERNET_DEVICE(0x1098), | |
b7ee49db | 99 | INTEL_E1000_ETHERNET_DEVICE(0x1099), |
07b8fede | 100 | INTEL_E1000_ETHERNET_DEVICE(0x109A), |
5881cde8 | 101 | INTEL_E1000_ETHERNET_DEVICE(0x10A4), |
b7ee49db | 102 | INTEL_E1000_ETHERNET_DEVICE(0x10B5), |
6418ecc6 | 103 | INTEL_E1000_ETHERNET_DEVICE(0x10B9), |
ae2c3860 AK |
104 | INTEL_E1000_ETHERNET_DEVICE(0x10BA), |
105 | INTEL_E1000_ETHERNET_DEVICE(0x10BB), | |
1da177e4 LT |
106 | /* required last entry */ |
107 | {0,} | |
108 | }; | |
109 | ||
110 | MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); | |
111 | ||
35574764 NN |
112 | int e1000_up(struct e1000_adapter *adapter); |
113 | void e1000_down(struct e1000_adapter *adapter); | |
114 | void e1000_reinit_locked(struct e1000_adapter *adapter); | |
115 | void e1000_reset(struct e1000_adapter *adapter); | |
116 | int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx); | |
117 | int e1000_setup_all_tx_resources(struct e1000_adapter *adapter); | |
118 | int e1000_setup_all_rx_resources(struct e1000_adapter *adapter); | |
119 | void e1000_free_all_tx_resources(struct e1000_adapter *adapter); | |
120 | void e1000_free_all_rx_resources(struct e1000_adapter *adapter); | |
3ad2cc67 | 121 | static int e1000_setup_tx_resources(struct e1000_adapter *adapter, |
35574764 | 122 | struct e1000_tx_ring *txdr); |
3ad2cc67 | 123 | static int e1000_setup_rx_resources(struct e1000_adapter *adapter, |
35574764 | 124 | struct e1000_rx_ring *rxdr); |
3ad2cc67 | 125 | static void e1000_free_tx_resources(struct e1000_adapter *adapter, |
35574764 | 126 | struct e1000_tx_ring *tx_ring); |
3ad2cc67 | 127 | static void e1000_free_rx_resources(struct e1000_adapter *adapter, |
35574764 NN |
128 | struct e1000_rx_ring *rx_ring); |
129 | void e1000_update_stats(struct e1000_adapter *adapter); | |
1da177e4 LT |
130 | |
131 | static int e1000_init_module(void); | |
132 | static void e1000_exit_module(void); | |
133 | static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent); | |
134 | static void __devexit e1000_remove(struct pci_dev *pdev); | |
581d708e | 135 | static int e1000_alloc_queues(struct e1000_adapter *adapter); |
1da177e4 LT |
136 | static int e1000_sw_init(struct e1000_adapter *adapter); |
137 | static int e1000_open(struct net_device *netdev); | |
138 | static int e1000_close(struct net_device *netdev); | |
139 | static void e1000_configure_tx(struct e1000_adapter *adapter); | |
140 | static void e1000_configure_rx(struct e1000_adapter *adapter); | |
141 | static void e1000_setup_rctl(struct e1000_adapter *adapter); | |
581d708e MC |
142 | static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter); |
143 | static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter); | |
144 | static void e1000_clean_tx_ring(struct e1000_adapter *adapter, | |
145 | struct e1000_tx_ring *tx_ring); | |
146 | static void e1000_clean_rx_ring(struct e1000_adapter *adapter, | |
147 | struct e1000_rx_ring *rx_ring); | |
1da177e4 LT |
148 | static void e1000_set_multi(struct net_device *netdev); |
149 | static void e1000_update_phy_info(unsigned long data); | |
150 | static void e1000_watchdog(unsigned long data); | |
1da177e4 LT |
151 | static void e1000_82547_tx_fifo_stall(unsigned long data); |
152 | static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev); | |
153 | static struct net_device_stats * e1000_get_stats(struct net_device *netdev); | |
154 | static int e1000_change_mtu(struct net_device *netdev, int new_mtu); | |
155 | static int e1000_set_mac(struct net_device *netdev, void *p); | |
156 | static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs); | |
581d708e MC |
157 | static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter, |
158 | struct e1000_tx_ring *tx_ring); | |
1da177e4 | 159 | #ifdef CONFIG_E1000_NAPI |
581d708e | 160 | static int e1000_clean(struct net_device *poll_dev, int *budget); |
1da177e4 | 161 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
581d708e | 162 | struct e1000_rx_ring *rx_ring, |
1da177e4 | 163 | int *work_done, int work_to_do); |
2d7edb92 | 164 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
581d708e | 165 | struct e1000_rx_ring *rx_ring, |
2d7edb92 | 166 | int *work_done, int work_to_do); |
1da177e4 | 167 | #else |
581d708e MC |
168 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
169 | struct e1000_rx_ring *rx_ring); | |
170 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | |
171 | struct e1000_rx_ring *rx_ring); | |
1da177e4 | 172 | #endif |
581d708e | 173 | static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
72d64a43 JK |
174 | struct e1000_rx_ring *rx_ring, |
175 | int cleaned_count); | |
581d708e | 176 | static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, |
72d64a43 JK |
177 | struct e1000_rx_ring *rx_ring, |
178 | int cleaned_count); | |
1da177e4 LT |
179 | static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); |
180 | static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, | |
181 | int cmd); | |
35574764 | 182 | void e1000_set_ethtool_ops(struct net_device *netdev); |
1da177e4 LT |
183 | static void e1000_enter_82542_rst(struct e1000_adapter *adapter); |
184 | static void e1000_leave_82542_rst(struct e1000_adapter *adapter); | |
185 | static void e1000_tx_timeout(struct net_device *dev); | |
87041639 | 186 | static void e1000_reset_task(struct net_device *dev); |
1da177e4 | 187 | static void e1000_smartspeed(struct e1000_adapter *adapter); |
e619d523 AK |
188 | static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, |
189 | struct sk_buff *skb); | |
1da177e4 LT |
190 | |
191 | static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp); | |
192 | static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid); | |
193 | static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); | |
194 | static void e1000_restore_vlan(struct e1000_adapter *adapter); | |
195 | ||
977e74b5 | 196 | static int e1000_suspend(struct pci_dev *pdev, pm_message_t state); |
6fdfef16 | 197 | #ifdef CONFIG_PM |
1da177e4 LT |
198 | static int e1000_resume(struct pci_dev *pdev); |
199 | #endif | |
c653e635 | 200 | static void e1000_shutdown(struct pci_dev *pdev); |
1da177e4 LT |
201 | |
202 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
203 | /* for netdump / net console */ | |
204 | static void e1000_netpoll (struct net_device *netdev); | |
205 | #endif | |
206 | ||
35574764 NN |
207 | extern void e1000_check_options(struct e1000_adapter *adapter); |
208 | ||
9026729b AK |
209 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, |
210 | pci_channel_state_t state); | |
211 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev); | |
212 | static void e1000_io_resume(struct pci_dev *pdev); | |
213 | ||
214 | static struct pci_error_handlers e1000_err_handler = { | |
215 | .error_detected = e1000_io_error_detected, | |
216 | .slot_reset = e1000_io_slot_reset, | |
217 | .resume = e1000_io_resume, | |
218 | }; | |
24025e4e | 219 | |
1da177e4 LT |
220 | static struct pci_driver e1000_driver = { |
221 | .name = e1000_driver_name, | |
222 | .id_table = e1000_pci_tbl, | |
223 | .probe = e1000_probe, | |
224 | .remove = __devexit_p(e1000_remove), | |
c4e24f01 | 225 | #ifdef CONFIG_PM |
1da177e4 | 226 | /* Power Managment Hooks */ |
1da177e4 | 227 | .suspend = e1000_suspend, |
c653e635 | 228 | .resume = e1000_resume, |
1da177e4 | 229 | #endif |
9026729b AK |
230 | .shutdown = e1000_shutdown, |
231 | .err_handler = &e1000_err_handler | |
1da177e4 LT |
232 | }; |
233 | ||
234 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); | |
235 | MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); | |
236 | MODULE_LICENSE("GPL"); | |
237 | MODULE_VERSION(DRV_VERSION); | |
238 | ||
239 | static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE; | |
240 | module_param(debug, int, 0); | |
241 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | |
242 | ||
243 | /** | |
244 | * e1000_init_module - Driver Registration Routine | |
245 | * | |
246 | * e1000_init_module is the first routine called when the driver is | |
247 | * loaded. All it does is register with the PCI subsystem. | |
248 | **/ | |
249 | ||
250 | static int __init | |
251 | e1000_init_module(void) | |
252 | { | |
253 | int ret; | |
254 | printk(KERN_INFO "%s - version %s\n", | |
255 | e1000_driver_string, e1000_driver_version); | |
256 | ||
257 | printk(KERN_INFO "%s\n", e1000_copyright); | |
258 | ||
29917620 | 259 | ret = pci_register_driver(&e1000_driver); |
8b378def | 260 | |
1da177e4 LT |
261 | return ret; |
262 | } | |
263 | ||
264 | module_init(e1000_init_module); | |
265 | ||
266 | /** | |
267 | * e1000_exit_module - Driver Exit Cleanup Routine | |
268 | * | |
269 | * e1000_exit_module is called just before the driver is removed | |
270 | * from memory. | |
271 | **/ | |
272 | ||
273 | static void __exit | |
274 | e1000_exit_module(void) | |
275 | { | |
1da177e4 LT |
276 | pci_unregister_driver(&e1000_driver); |
277 | } | |
278 | ||
279 | module_exit(e1000_exit_module); | |
280 | ||
2db10a08 AK |
281 | static int e1000_request_irq(struct e1000_adapter *adapter) |
282 | { | |
283 | struct net_device *netdev = adapter->netdev; | |
284 | int flags, err = 0; | |
285 | ||
c0bc8721 | 286 | flags = IRQF_SHARED; |
2db10a08 AK |
287 | #ifdef CONFIG_PCI_MSI |
288 | if (adapter->hw.mac_type > e1000_82547_rev_2) { | |
289 | adapter->have_msi = TRUE; | |
290 | if ((err = pci_enable_msi(adapter->pdev))) { | |
291 | DPRINTK(PROBE, ERR, | |
292 | "Unable to allocate MSI interrupt Error: %d\n", err); | |
293 | adapter->have_msi = FALSE; | |
294 | } | |
295 | } | |
296 | if (adapter->have_msi) | |
61ef5c00 | 297 | flags &= ~IRQF_SHARED; |
2db10a08 AK |
298 | #endif |
299 | if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags, | |
300 | netdev->name, netdev))) | |
301 | DPRINTK(PROBE, ERR, | |
302 | "Unable to allocate interrupt Error: %d\n", err); | |
303 | ||
304 | return err; | |
305 | } | |
306 | ||
307 | static void e1000_free_irq(struct e1000_adapter *adapter) | |
308 | { | |
309 | struct net_device *netdev = adapter->netdev; | |
310 | ||
311 | free_irq(adapter->pdev->irq, netdev); | |
312 | ||
313 | #ifdef CONFIG_PCI_MSI | |
314 | if (adapter->have_msi) | |
315 | pci_disable_msi(adapter->pdev); | |
316 | #endif | |
317 | } | |
318 | ||
1da177e4 LT |
319 | /** |
320 | * e1000_irq_disable - Mask off interrupt generation on the NIC | |
321 | * @adapter: board private structure | |
322 | **/ | |
323 | ||
e619d523 | 324 | static void |
1da177e4 LT |
325 | e1000_irq_disable(struct e1000_adapter *adapter) |
326 | { | |
327 | atomic_inc(&adapter->irq_sem); | |
328 | E1000_WRITE_REG(&adapter->hw, IMC, ~0); | |
329 | E1000_WRITE_FLUSH(&adapter->hw); | |
330 | synchronize_irq(adapter->pdev->irq); | |
331 | } | |
332 | ||
333 | /** | |
334 | * e1000_irq_enable - Enable default interrupt generation settings | |
335 | * @adapter: board private structure | |
336 | **/ | |
337 | ||
e619d523 | 338 | static void |
1da177e4 LT |
339 | e1000_irq_enable(struct e1000_adapter *adapter) |
340 | { | |
96838a40 | 341 | if (likely(atomic_dec_and_test(&adapter->irq_sem))) { |
1da177e4 LT |
342 | E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK); |
343 | E1000_WRITE_FLUSH(&adapter->hw); | |
344 | } | |
345 | } | |
3ad2cc67 AB |
346 | |
347 | static void | |
2d7edb92 MC |
348 | e1000_update_mng_vlan(struct e1000_adapter *adapter) |
349 | { | |
350 | struct net_device *netdev = adapter->netdev; | |
351 | uint16_t vid = adapter->hw.mng_cookie.vlan_id; | |
352 | uint16_t old_vid = adapter->mng_vlan_id; | |
96838a40 JB |
353 | if (adapter->vlgrp) { |
354 | if (!adapter->vlgrp->vlan_devices[vid]) { | |
355 | if (adapter->hw.mng_cookie.status & | |
2d7edb92 MC |
356 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) { |
357 | e1000_vlan_rx_add_vid(netdev, vid); | |
358 | adapter->mng_vlan_id = vid; | |
359 | } else | |
360 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
96838a40 JB |
361 | |
362 | if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) && | |
363 | (vid != old_vid) && | |
2d7edb92 MC |
364 | !adapter->vlgrp->vlan_devices[old_vid]) |
365 | e1000_vlan_rx_kill_vid(netdev, old_vid); | |
c5f226fe JK |
366 | } else |
367 | adapter->mng_vlan_id = vid; | |
2d7edb92 MC |
368 | } |
369 | } | |
b55ccb35 JK |
370 | |
371 | /** | |
372 | * e1000_release_hw_control - release control of the h/w to f/w | |
373 | * @adapter: address of board private structure | |
374 | * | |
375 | * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit. | |
376 | * For ASF and Pass Through versions of f/w this means that the | |
377 | * driver is no longer loaded. For AMT version (only with 82573) i | |
378 | * of the f/w this means that the netowrk i/f is closed. | |
76c224bc | 379 | * |
b55ccb35 JK |
380 | **/ |
381 | ||
e619d523 | 382 | static void |
b55ccb35 JK |
383 | e1000_release_hw_control(struct e1000_adapter *adapter) |
384 | { | |
385 | uint32_t ctrl_ext; | |
386 | uint32_t swsm; | |
cd94dd0b | 387 | uint32_t extcnf; |
b55ccb35 JK |
388 | |
389 | /* Let firmware taken over control of h/w */ | |
390 | switch (adapter->hw.mac_type) { | |
391 | case e1000_82571: | |
392 | case e1000_82572: | |
4cc15f54 | 393 | case e1000_80003es2lan: |
b55ccb35 JK |
394 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
395 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
396 | ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); | |
397 | break; | |
398 | case e1000_82573: | |
399 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
400 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
401 | swsm & ~E1000_SWSM_DRV_LOAD); | |
cd94dd0b AK |
402 | case e1000_ich8lan: |
403 | extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
404 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
405 | extcnf & ~E1000_CTRL_EXT_DRV_LOAD); | |
406 | break; | |
b55ccb35 JK |
407 | default: |
408 | break; | |
409 | } | |
410 | } | |
411 | ||
412 | /** | |
413 | * e1000_get_hw_control - get control of the h/w from f/w | |
414 | * @adapter: address of board private structure | |
415 | * | |
416 | * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit. | |
76c224bc AK |
417 | * For ASF and Pass Through versions of f/w this means that |
418 | * the driver is loaded. For AMT version (only with 82573) | |
b55ccb35 | 419 | * of the f/w this means that the netowrk i/f is open. |
76c224bc | 420 | * |
b55ccb35 JK |
421 | **/ |
422 | ||
e619d523 | 423 | static void |
b55ccb35 JK |
424 | e1000_get_hw_control(struct e1000_adapter *adapter) |
425 | { | |
426 | uint32_t ctrl_ext; | |
427 | uint32_t swsm; | |
cd94dd0b | 428 | uint32_t extcnf; |
b55ccb35 JK |
429 | /* Let firmware know the driver has taken over */ |
430 | switch (adapter->hw.mac_type) { | |
431 | case e1000_82571: | |
432 | case e1000_82572: | |
4cc15f54 | 433 | case e1000_80003es2lan: |
b55ccb35 JK |
434 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
435 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
436 | ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); | |
437 | break; | |
438 | case e1000_82573: | |
439 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
440 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
441 | swsm | E1000_SWSM_DRV_LOAD); | |
442 | break; | |
cd94dd0b AK |
443 | case e1000_ich8lan: |
444 | extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL); | |
445 | E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL, | |
446 | extcnf | E1000_EXTCNF_CTRL_SWFLAG); | |
447 | break; | |
b55ccb35 JK |
448 | default: |
449 | break; | |
450 | } | |
451 | } | |
452 | ||
1da177e4 LT |
453 | int |
454 | e1000_up(struct e1000_adapter *adapter) | |
455 | { | |
456 | struct net_device *netdev = adapter->netdev; | |
2db10a08 | 457 | int i; |
1da177e4 LT |
458 | |
459 | /* hardware has been reset, we need to reload some things */ | |
460 | ||
1da177e4 LT |
461 | e1000_set_multi(netdev); |
462 | ||
463 | e1000_restore_vlan(adapter); | |
464 | ||
465 | e1000_configure_tx(adapter); | |
466 | e1000_setup_rctl(adapter); | |
467 | e1000_configure_rx(adapter); | |
72d64a43 JK |
468 | /* call E1000_DESC_UNUSED which always leaves |
469 | * at least 1 descriptor unused to make sure | |
470 | * next_to_use != next_to_clean */ | |
f56799ea | 471 | for (i = 0; i < adapter->num_rx_queues; i++) { |
72d64a43 | 472 | struct e1000_rx_ring *ring = &adapter->rx_ring[i]; |
a292ca6e JK |
473 | adapter->alloc_rx_buf(adapter, ring, |
474 | E1000_DESC_UNUSED(ring)); | |
f56799ea | 475 | } |
1da177e4 | 476 | |
7bfa4816 JK |
477 | adapter->tx_queue_len = netdev->tx_queue_len; |
478 | ||
1da177e4 | 479 | mod_timer(&adapter->watchdog_timer, jiffies); |
1da177e4 LT |
480 | |
481 | #ifdef CONFIG_E1000_NAPI | |
482 | netif_poll_enable(netdev); | |
483 | #endif | |
5de55624 MC |
484 | e1000_irq_enable(adapter); |
485 | ||
1da177e4 LT |
486 | return 0; |
487 | } | |
488 | ||
79f05bf0 AK |
489 | /** |
490 | * e1000_power_up_phy - restore link in case the phy was powered down | |
491 | * @adapter: address of board private structure | |
492 | * | |
493 | * The phy may be powered down to save power and turn off link when the | |
494 | * driver is unloaded and wake on lan is not enabled (among others) | |
495 | * *** this routine MUST be followed by a call to e1000_reset *** | |
496 | * | |
497 | **/ | |
498 | ||
d658266e | 499 | void e1000_power_up_phy(struct e1000_adapter *adapter) |
79f05bf0 AK |
500 | { |
501 | uint16_t mii_reg = 0; | |
502 | ||
503 | /* Just clear the power down bit to wake the phy back up */ | |
504 | if (adapter->hw.media_type == e1000_media_type_copper) { | |
505 | /* according to the manual, the phy will retain its | |
506 | * settings across a power-down/up cycle */ | |
507 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | |
508 | mii_reg &= ~MII_CR_POWER_DOWN; | |
509 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); | |
510 | } | |
511 | } | |
512 | ||
513 | static void e1000_power_down_phy(struct e1000_adapter *adapter) | |
514 | { | |
515 | boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) && | |
516 | e1000_check_mng_mode(&adapter->hw); | |
517 | /* Power down the PHY so no link is implied when interface is down | |
518 | * The PHY cannot be powered down if any of the following is TRUE | |
519 | * (a) WoL is enabled | |
520 | * (b) AMT is active | |
521 | * (c) SoL/IDER session is active */ | |
522 | if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 && | |
cd94dd0b | 523 | adapter->hw.mac_type != e1000_ich8lan && |
79f05bf0 AK |
524 | adapter->hw.media_type == e1000_media_type_copper && |
525 | !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) && | |
526 | !mng_mode_enabled && | |
527 | !e1000_check_phy_reset_block(&adapter->hw)) { | |
528 | uint16_t mii_reg = 0; | |
529 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | |
530 | mii_reg |= MII_CR_POWER_DOWN; | |
531 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); | |
532 | mdelay(1); | |
533 | } | |
534 | } | |
535 | ||
1da177e4 LT |
536 | void |
537 | e1000_down(struct e1000_adapter *adapter) | |
538 | { | |
539 | struct net_device *netdev = adapter->netdev; | |
540 | ||
541 | e1000_irq_disable(adapter); | |
c1605eb3 | 542 | |
1da177e4 LT |
543 | del_timer_sync(&adapter->tx_fifo_stall_timer); |
544 | del_timer_sync(&adapter->watchdog_timer); | |
545 | del_timer_sync(&adapter->phy_info_timer); | |
546 | ||
547 | #ifdef CONFIG_E1000_NAPI | |
548 | netif_poll_disable(netdev); | |
549 | #endif | |
7bfa4816 | 550 | netdev->tx_queue_len = adapter->tx_queue_len; |
1da177e4 LT |
551 | adapter->link_speed = 0; |
552 | adapter->link_duplex = 0; | |
553 | netif_carrier_off(netdev); | |
554 | netif_stop_queue(netdev); | |
555 | ||
556 | e1000_reset(adapter); | |
581d708e MC |
557 | e1000_clean_all_tx_rings(adapter); |
558 | e1000_clean_all_rx_rings(adapter); | |
1da177e4 | 559 | } |
1da177e4 | 560 | |
2db10a08 AK |
561 | void |
562 | e1000_reinit_locked(struct e1000_adapter *adapter) | |
563 | { | |
564 | WARN_ON(in_interrupt()); | |
565 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) | |
566 | msleep(1); | |
567 | e1000_down(adapter); | |
568 | e1000_up(adapter); | |
569 | clear_bit(__E1000_RESETTING, &adapter->flags); | |
1da177e4 LT |
570 | } |
571 | ||
572 | void | |
573 | e1000_reset(struct e1000_adapter *adapter) | |
574 | { | |
2d7edb92 | 575 | uint32_t pba, manc; |
1125ecbc | 576 | uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF; |
1da177e4 LT |
577 | |
578 | /* Repartition Pba for greater than 9k mtu | |
579 | * To take effect CTRL.RST is required. | |
580 | */ | |
581 | ||
2d7edb92 MC |
582 | switch (adapter->hw.mac_type) { |
583 | case e1000_82547: | |
0e6ef3e0 | 584 | case e1000_82547_rev_2: |
2d7edb92 MC |
585 | pba = E1000_PBA_30K; |
586 | break; | |
868d5309 MC |
587 | case e1000_82571: |
588 | case e1000_82572: | |
6418ecc6 | 589 | case e1000_80003es2lan: |
868d5309 MC |
590 | pba = E1000_PBA_38K; |
591 | break; | |
2d7edb92 MC |
592 | case e1000_82573: |
593 | pba = E1000_PBA_12K; | |
594 | break; | |
cd94dd0b AK |
595 | case e1000_ich8lan: |
596 | pba = E1000_PBA_8K; | |
597 | break; | |
2d7edb92 MC |
598 | default: |
599 | pba = E1000_PBA_48K; | |
600 | break; | |
601 | } | |
602 | ||
96838a40 | 603 | if ((adapter->hw.mac_type != e1000_82573) && |
f11b7f85 | 604 | (adapter->netdev->mtu > E1000_RXBUFFER_8192)) |
1125ecbc | 605 | pba -= 8; /* allocate more FIFO for Tx */ |
2d7edb92 MC |
606 | |
607 | ||
96838a40 | 608 | if (adapter->hw.mac_type == e1000_82547) { |
1da177e4 LT |
609 | adapter->tx_fifo_head = 0; |
610 | adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT; | |
611 | adapter->tx_fifo_size = | |
612 | (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT; | |
613 | atomic_set(&adapter->tx_fifo_stall, 0); | |
614 | } | |
2d7edb92 | 615 | |
1da177e4 LT |
616 | E1000_WRITE_REG(&adapter->hw, PBA, pba); |
617 | ||
618 | /* flow control settings */ | |
f11b7f85 JK |
619 | /* Set the FC high water mark to 90% of the FIFO size. |
620 | * Required to clear last 3 LSB */ | |
621 | fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8; | |
cd94dd0b AK |
622 | /* We can't use 90% on small FIFOs because the remainder |
623 | * would be less than 1 full frame. In this case, we size | |
624 | * it to allow at least a full frame above the high water | |
625 | * mark. */ | |
626 | if (pba < E1000_PBA_16K) | |
627 | fc_high_water_mark = (pba * 1024) - 1600; | |
f11b7f85 JK |
628 | |
629 | adapter->hw.fc_high_water = fc_high_water_mark; | |
630 | adapter->hw.fc_low_water = fc_high_water_mark - 8; | |
87041639 JK |
631 | if (adapter->hw.mac_type == e1000_80003es2lan) |
632 | adapter->hw.fc_pause_time = 0xFFFF; | |
633 | else | |
634 | adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME; | |
1da177e4 LT |
635 | adapter->hw.fc_send_xon = 1; |
636 | adapter->hw.fc = adapter->hw.original_fc; | |
637 | ||
2d7edb92 | 638 | /* Allow time for pending master requests to run */ |
1da177e4 | 639 | e1000_reset_hw(&adapter->hw); |
96838a40 | 640 | if (adapter->hw.mac_type >= e1000_82544) |
1da177e4 | 641 | E1000_WRITE_REG(&adapter->hw, WUC, 0); |
96838a40 | 642 | if (e1000_init_hw(&adapter->hw)) |
1da177e4 | 643 | DPRINTK(PROBE, ERR, "Hardware Error\n"); |
2d7edb92 | 644 | e1000_update_mng_vlan(adapter); |
1da177e4 LT |
645 | /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ |
646 | E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE); | |
647 | ||
648 | e1000_reset_adaptive(&adapter->hw); | |
649 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
9a53a202 AK |
650 | |
651 | if (!adapter->smart_power_down && | |
652 | (adapter->hw.mac_type == e1000_82571 || | |
653 | adapter->hw.mac_type == e1000_82572)) { | |
654 | uint16_t phy_data = 0; | |
655 | /* speed up time to link by disabling smart power down, ignore | |
656 | * the return value of this function because there is nothing | |
657 | * different we would do if it failed */ | |
658 | e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT, | |
659 | &phy_data); | |
660 | phy_data &= ~IGP02E1000_PM_SPD; | |
661 | e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT, | |
662 | phy_data); | |
663 | } | |
664 | ||
5f01607a | 665 | if ((adapter->en_mng_pt) && (adapter->hw.mac_type < e1000_82571)) { |
2d7edb92 MC |
666 | manc = E1000_READ_REG(&adapter->hw, MANC); |
667 | manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST); | |
668 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
669 | } | |
1da177e4 LT |
670 | } |
671 | ||
672 | /** | |
673 | * e1000_probe - Device Initialization Routine | |
674 | * @pdev: PCI device information struct | |
675 | * @ent: entry in e1000_pci_tbl | |
676 | * | |
677 | * Returns 0 on success, negative on failure | |
678 | * | |
679 | * e1000_probe initializes an adapter identified by a pci_dev structure. | |
680 | * The OS initialization, configuring of the adapter private structure, | |
681 | * and a hardware reset occur. | |
682 | **/ | |
683 | ||
684 | static int __devinit | |
685 | e1000_probe(struct pci_dev *pdev, | |
686 | const struct pci_device_id *ent) | |
687 | { | |
688 | struct net_device *netdev; | |
689 | struct e1000_adapter *adapter; | |
2d7edb92 | 690 | unsigned long mmio_start, mmio_len; |
cd94dd0b | 691 | unsigned long flash_start, flash_len; |
2d7edb92 | 692 | |
1da177e4 | 693 | static int cards_found = 0; |
120cd576 | 694 | static int global_quad_port_a = 0; /* global ksp3 port a indication */ |
2d7edb92 | 695 | int i, err, pci_using_dac; |
120cd576 | 696 | uint16_t eeprom_data = 0; |
1da177e4 | 697 | uint16_t eeprom_apme_mask = E1000_EEPROM_APME; |
96838a40 | 698 | if ((err = pci_enable_device(pdev))) |
1da177e4 LT |
699 | return err; |
700 | ||
cd94dd0b AK |
701 | if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) && |
702 | !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) { | |
1da177e4 LT |
703 | pci_using_dac = 1; |
704 | } else { | |
cd94dd0b AK |
705 | if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) && |
706 | (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) { | |
1da177e4 | 707 | E1000_ERR("No usable DMA configuration, aborting\n"); |
6dd62ab0 | 708 | goto err_dma; |
1da177e4 LT |
709 | } |
710 | pci_using_dac = 0; | |
711 | } | |
712 | ||
96838a40 | 713 | if ((err = pci_request_regions(pdev, e1000_driver_name))) |
6dd62ab0 | 714 | goto err_pci_reg; |
1da177e4 LT |
715 | |
716 | pci_set_master(pdev); | |
717 | ||
6dd62ab0 | 718 | err = -ENOMEM; |
1da177e4 | 719 | netdev = alloc_etherdev(sizeof(struct e1000_adapter)); |
6dd62ab0 | 720 | if (!netdev) |
1da177e4 | 721 | goto err_alloc_etherdev; |
1da177e4 LT |
722 | |
723 | SET_MODULE_OWNER(netdev); | |
724 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
725 | ||
726 | pci_set_drvdata(pdev, netdev); | |
60490fe0 | 727 | adapter = netdev_priv(netdev); |
1da177e4 LT |
728 | adapter->netdev = netdev; |
729 | adapter->pdev = pdev; | |
730 | adapter->hw.back = adapter; | |
731 | adapter->msg_enable = (1 << debug) - 1; | |
732 | ||
733 | mmio_start = pci_resource_start(pdev, BAR_0); | |
734 | mmio_len = pci_resource_len(pdev, BAR_0); | |
735 | ||
6dd62ab0 | 736 | err = -EIO; |
1da177e4 | 737 | adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); |
6dd62ab0 | 738 | if (!adapter->hw.hw_addr) |
1da177e4 | 739 | goto err_ioremap; |
1da177e4 | 740 | |
96838a40 JB |
741 | for (i = BAR_1; i <= BAR_5; i++) { |
742 | if (pci_resource_len(pdev, i) == 0) | |
1da177e4 | 743 | continue; |
96838a40 | 744 | if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { |
1da177e4 LT |
745 | adapter->hw.io_base = pci_resource_start(pdev, i); |
746 | break; | |
747 | } | |
748 | } | |
749 | ||
750 | netdev->open = &e1000_open; | |
751 | netdev->stop = &e1000_close; | |
752 | netdev->hard_start_xmit = &e1000_xmit_frame; | |
753 | netdev->get_stats = &e1000_get_stats; | |
754 | netdev->set_multicast_list = &e1000_set_multi; | |
755 | netdev->set_mac_address = &e1000_set_mac; | |
756 | netdev->change_mtu = &e1000_change_mtu; | |
757 | netdev->do_ioctl = &e1000_ioctl; | |
758 | e1000_set_ethtool_ops(netdev); | |
759 | netdev->tx_timeout = &e1000_tx_timeout; | |
760 | netdev->watchdog_timeo = 5 * HZ; | |
761 | #ifdef CONFIG_E1000_NAPI | |
762 | netdev->poll = &e1000_clean; | |
763 | netdev->weight = 64; | |
764 | #endif | |
765 | netdev->vlan_rx_register = e1000_vlan_rx_register; | |
766 | netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid; | |
767 | netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid; | |
768 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
769 | netdev->poll_controller = e1000_netpoll; | |
770 | #endif | |
0eb5a34c | 771 | strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); |
1da177e4 LT |
772 | |
773 | netdev->mem_start = mmio_start; | |
774 | netdev->mem_end = mmio_start + mmio_len; | |
775 | netdev->base_addr = adapter->hw.io_base; | |
776 | ||
777 | adapter->bd_number = cards_found; | |
778 | ||
779 | /* setup the private structure */ | |
780 | ||
96838a40 | 781 | if ((err = e1000_sw_init(adapter))) |
1da177e4 LT |
782 | goto err_sw_init; |
783 | ||
6dd62ab0 | 784 | err = -EIO; |
cd94dd0b AK |
785 | /* Flash BAR mapping must happen after e1000_sw_init |
786 | * because it depends on mac_type */ | |
787 | if ((adapter->hw.mac_type == e1000_ich8lan) && | |
788 | (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { | |
789 | flash_start = pci_resource_start(pdev, 1); | |
790 | flash_len = pci_resource_len(pdev, 1); | |
791 | adapter->hw.flash_address = ioremap(flash_start, flash_len); | |
6dd62ab0 | 792 | if (!adapter->hw.flash_address) |
cd94dd0b | 793 | goto err_flashmap; |
cd94dd0b AK |
794 | } |
795 | ||
6dd62ab0 | 796 | if (e1000_check_phy_reset_block(&adapter->hw)) |
2d7edb92 MC |
797 | DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n"); |
798 | ||
96838a40 | 799 | if (adapter->hw.mac_type >= e1000_82543) { |
1da177e4 LT |
800 | netdev->features = NETIF_F_SG | |
801 | NETIF_F_HW_CSUM | | |
802 | NETIF_F_HW_VLAN_TX | | |
803 | NETIF_F_HW_VLAN_RX | | |
804 | NETIF_F_HW_VLAN_FILTER; | |
cd94dd0b AK |
805 | if (adapter->hw.mac_type == e1000_ich8lan) |
806 | netdev->features &= ~NETIF_F_HW_VLAN_FILTER; | |
1da177e4 LT |
807 | } |
808 | ||
809 | #ifdef NETIF_F_TSO | |
96838a40 | 810 | if ((adapter->hw.mac_type >= e1000_82544) && |
1da177e4 LT |
811 | (adapter->hw.mac_type != e1000_82547)) |
812 | netdev->features |= NETIF_F_TSO; | |
2d7edb92 MC |
813 | |
814 | #ifdef NETIF_F_TSO_IPV6 | |
96838a40 | 815 | if (adapter->hw.mac_type > e1000_82547_rev_2) |
2d7edb92 MC |
816 | netdev->features |= NETIF_F_TSO_IPV6; |
817 | #endif | |
1da177e4 | 818 | #endif |
96838a40 | 819 | if (pci_using_dac) |
1da177e4 LT |
820 | netdev->features |= NETIF_F_HIGHDMA; |
821 | ||
76c224bc AK |
822 | netdev->features |= NETIF_F_LLTX; |
823 | ||
2d7edb92 MC |
824 | adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw); |
825 | ||
cd94dd0b AK |
826 | /* initialize eeprom parameters */ |
827 | ||
828 | if (e1000_init_eeprom_params(&adapter->hw)) { | |
829 | E1000_ERR("EEPROM initialization failed\n"); | |
6dd62ab0 | 830 | goto err_eeprom; |
cd94dd0b AK |
831 | } |
832 | ||
96838a40 | 833 | /* before reading the EEPROM, reset the controller to |
1da177e4 | 834 | * put the device in a known good starting state */ |
96838a40 | 835 | |
1da177e4 LT |
836 | e1000_reset_hw(&adapter->hw); |
837 | ||
838 | /* make sure the EEPROM is good */ | |
839 | ||
96838a40 | 840 | if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) { |
1da177e4 | 841 | DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n"); |
1da177e4 LT |
842 | goto err_eeprom; |
843 | } | |
844 | ||
845 | /* copy the MAC address out of the EEPROM */ | |
846 | ||
96838a40 | 847 | if (e1000_read_mac_addr(&adapter->hw)) |
1da177e4 LT |
848 | DPRINTK(PROBE, ERR, "EEPROM Read Error\n"); |
849 | memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); | |
9beb0ac1 | 850 | memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); |
1da177e4 | 851 | |
96838a40 | 852 | if (!is_valid_ether_addr(netdev->perm_addr)) { |
1da177e4 | 853 | DPRINTK(PROBE, ERR, "Invalid MAC Address\n"); |
1da177e4 LT |
854 | goto err_eeprom; |
855 | } | |
856 | ||
1da177e4 LT |
857 | e1000_get_bus_info(&adapter->hw); |
858 | ||
859 | init_timer(&adapter->tx_fifo_stall_timer); | |
860 | adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall; | |
861 | adapter->tx_fifo_stall_timer.data = (unsigned long) adapter; | |
862 | ||
863 | init_timer(&adapter->watchdog_timer); | |
864 | adapter->watchdog_timer.function = &e1000_watchdog; | |
865 | adapter->watchdog_timer.data = (unsigned long) adapter; | |
866 | ||
1da177e4 LT |
867 | init_timer(&adapter->phy_info_timer); |
868 | adapter->phy_info_timer.function = &e1000_update_phy_info; | |
869 | adapter->phy_info_timer.data = (unsigned long) adapter; | |
870 | ||
87041639 JK |
871 | INIT_WORK(&adapter->reset_task, |
872 | (void (*)(void *))e1000_reset_task, netdev); | |
1da177e4 LT |
873 | |
874 | /* we're going to reset, so assume we have no link for now */ | |
875 | ||
876 | netif_carrier_off(netdev); | |
877 | netif_stop_queue(netdev); | |
878 | ||
879 | e1000_check_options(adapter); | |
880 | ||
881 | /* Initial Wake on LAN setting | |
882 | * If APM wake is enabled in the EEPROM, | |
883 | * enable the ACPI Magic Packet filter | |
884 | */ | |
885 | ||
96838a40 | 886 | switch (adapter->hw.mac_type) { |
1da177e4 LT |
887 | case e1000_82542_rev2_0: |
888 | case e1000_82542_rev2_1: | |
889 | case e1000_82543: | |
890 | break; | |
891 | case e1000_82544: | |
892 | e1000_read_eeprom(&adapter->hw, | |
893 | EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data); | |
894 | eeprom_apme_mask = E1000_EEPROM_82544_APM; | |
895 | break; | |
cd94dd0b AK |
896 | case e1000_ich8lan: |
897 | e1000_read_eeprom(&adapter->hw, | |
898 | EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data); | |
899 | eeprom_apme_mask = E1000_EEPROM_ICH8_APME; | |
900 | break; | |
1da177e4 LT |
901 | case e1000_82546: |
902 | case e1000_82546_rev_3: | |
fd803241 | 903 | case e1000_82571: |
6418ecc6 | 904 | case e1000_80003es2lan: |
96838a40 | 905 | if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){ |
1da177e4 LT |
906 | e1000_read_eeprom(&adapter->hw, |
907 | EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); | |
908 | break; | |
909 | } | |
910 | /* Fall Through */ | |
911 | default: | |
912 | e1000_read_eeprom(&adapter->hw, | |
913 | EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); | |
914 | break; | |
915 | } | |
96838a40 | 916 | if (eeprom_data & eeprom_apme_mask) |
120cd576 JB |
917 | adapter->eeprom_wol |= E1000_WUFC_MAG; |
918 | ||
919 | /* now that we have the eeprom settings, apply the special cases | |
920 | * where the eeprom may be wrong or the board simply won't support | |
921 | * wake on lan on a particular port */ | |
922 | switch (pdev->device) { | |
923 | case E1000_DEV_ID_82546GB_PCIE: | |
924 | adapter->eeprom_wol = 0; | |
925 | break; | |
926 | case E1000_DEV_ID_82546EB_FIBER: | |
927 | case E1000_DEV_ID_82546GB_FIBER: | |
928 | case E1000_DEV_ID_82571EB_FIBER: | |
929 | /* Wake events only supported on port A for dual fiber | |
930 | * regardless of eeprom setting */ | |
931 | if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1) | |
932 | adapter->eeprom_wol = 0; | |
933 | break; | |
934 | case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: | |
5881cde8 | 935 | case E1000_DEV_ID_82571EB_QUAD_COPPER: |
120cd576 JB |
936 | /* if quad port adapter, disable WoL on all but port A */ |
937 | if (global_quad_port_a != 0) | |
938 | adapter->eeprom_wol = 0; | |
939 | else | |
940 | adapter->quad_port_a = 1; | |
941 | /* Reset for multiple quad port adapters */ | |
942 | if (++global_quad_port_a == 4) | |
943 | global_quad_port_a = 0; | |
944 | break; | |
945 | } | |
946 | ||
947 | /* initialize the wol settings based on the eeprom settings */ | |
948 | adapter->wol = adapter->eeprom_wol; | |
1da177e4 | 949 | |
fb3d47d4 JK |
950 | /* print bus type/speed/width info */ |
951 | { | |
952 | struct e1000_hw *hw = &adapter->hw; | |
953 | DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ", | |
954 | ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : | |
955 | (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")), | |
956 | ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" : | |
957 | (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" : | |
958 | (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" : | |
959 | (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" : | |
960 | (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"), | |
961 | ((hw->bus_width == e1000_bus_width_64) ? "64-bit" : | |
962 | (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" : | |
963 | (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" : | |
964 | "32-bit")); | |
965 | } | |
966 | ||
967 | for (i = 0; i < 6; i++) | |
968 | printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':'); | |
969 | ||
1da177e4 LT |
970 | /* reset the hardware with the new settings */ |
971 | e1000_reset(adapter); | |
972 | ||
b55ccb35 JK |
973 | /* If the controller is 82573 and f/w is AMT, do not set |
974 | * DRV_LOAD until the interface is up. For all other cases, | |
975 | * let the f/w know that the h/w is now under the control | |
976 | * of the driver. */ | |
977 | if (adapter->hw.mac_type != e1000_82573 || | |
978 | !e1000_check_mng_mode(&adapter->hw)) | |
979 | e1000_get_hw_control(adapter); | |
2d7edb92 | 980 | |
1da177e4 | 981 | strcpy(netdev->name, "eth%d"); |
96838a40 | 982 | if ((err = register_netdev(netdev))) |
1da177e4 LT |
983 | goto err_register; |
984 | ||
985 | DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n"); | |
986 | ||
987 | cards_found++; | |
988 | return 0; | |
989 | ||
990 | err_register: | |
6dd62ab0 VA |
991 | e1000_release_hw_control(adapter); |
992 | err_eeprom: | |
993 | if (!e1000_check_phy_reset_block(&adapter->hw)) | |
994 | e1000_phy_hw_reset(&adapter->hw); | |
995 | ||
cd94dd0b AK |
996 | if (adapter->hw.flash_address) |
997 | iounmap(adapter->hw.flash_address); | |
998 | err_flashmap: | |
6dd62ab0 VA |
999 | #ifdef CONFIG_E1000_NAPI |
1000 | for (i = 0; i < adapter->num_rx_queues; i++) | |
1001 | dev_put(&adapter->polling_netdev[i]); | |
1002 | #endif | |
1003 | ||
1004 | kfree(adapter->tx_ring); | |
1005 | kfree(adapter->rx_ring); | |
1006 | #ifdef CONFIG_E1000_NAPI | |
1007 | kfree(adapter->polling_netdev); | |
1008 | #endif | |
1da177e4 | 1009 | err_sw_init: |
1da177e4 LT |
1010 | iounmap(adapter->hw.hw_addr); |
1011 | err_ioremap: | |
1012 | free_netdev(netdev); | |
1013 | err_alloc_etherdev: | |
1014 | pci_release_regions(pdev); | |
6dd62ab0 VA |
1015 | err_pci_reg: |
1016 | err_dma: | |
1017 | pci_disable_device(pdev); | |
1da177e4 LT |
1018 | return err; |
1019 | } | |
1020 | ||
1021 | /** | |
1022 | * e1000_remove - Device Removal Routine | |
1023 | * @pdev: PCI device information struct | |
1024 | * | |
1025 | * e1000_remove is called by the PCI subsystem to alert the driver | |
1026 | * that it should release a PCI device. The could be caused by a | |
1027 | * Hot-Plug event, or because the driver is going to be removed from | |
1028 | * memory. | |
1029 | **/ | |
1030 | ||
1031 | static void __devexit | |
1032 | e1000_remove(struct pci_dev *pdev) | |
1033 | { | |
1034 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 1035 | struct e1000_adapter *adapter = netdev_priv(netdev); |
b55ccb35 | 1036 | uint32_t manc; |
581d708e MC |
1037 | #ifdef CONFIG_E1000_NAPI |
1038 | int i; | |
1039 | #endif | |
1da177e4 | 1040 | |
be2b28ed JG |
1041 | flush_scheduled_work(); |
1042 | ||
5f01607a | 1043 | if (adapter->hw.mac_type < e1000_82571 && |
1da177e4 LT |
1044 | adapter->hw.media_type == e1000_media_type_copper) { |
1045 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
96838a40 | 1046 | if (manc & E1000_MANC_SMBUS_EN) { |
1da177e4 LT |
1047 | manc |= E1000_MANC_ARP_EN; |
1048 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
1049 | } | |
1050 | } | |
1051 | ||
b55ccb35 JK |
1052 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
1053 | * would have already happened in close and is redundant. */ | |
1054 | e1000_release_hw_control(adapter); | |
2d7edb92 | 1055 | |
1da177e4 | 1056 | unregister_netdev(netdev); |
581d708e | 1057 | #ifdef CONFIG_E1000_NAPI |
f56799ea | 1058 | for (i = 0; i < adapter->num_rx_queues; i++) |
15333061 | 1059 | dev_put(&adapter->polling_netdev[i]); |
581d708e | 1060 | #endif |
1da177e4 | 1061 | |
96838a40 | 1062 | if (!e1000_check_phy_reset_block(&adapter->hw)) |
2d7edb92 | 1063 | e1000_phy_hw_reset(&adapter->hw); |
1da177e4 | 1064 | |
24025e4e MC |
1065 | kfree(adapter->tx_ring); |
1066 | kfree(adapter->rx_ring); | |
1067 | #ifdef CONFIG_E1000_NAPI | |
1068 | kfree(adapter->polling_netdev); | |
1069 | #endif | |
1070 | ||
1da177e4 | 1071 | iounmap(adapter->hw.hw_addr); |
cd94dd0b AK |
1072 | if (adapter->hw.flash_address) |
1073 | iounmap(adapter->hw.flash_address); | |
1da177e4 LT |
1074 | pci_release_regions(pdev); |
1075 | ||
1076 | free_netdev(netdev); | |
1077 | ||
1078 | pci_disable_device(pdev); | |
1079 | } | |
1080 | ||
1081 | /** | |
1082 | * e1000_sw_init - Initialize general software structures (struct e1000_adapter) | |
1083 | * @adapter: board private structure to initialize | |
1084 | * | |
1085 | * e1000_sw_init initializes the Adapter private data structure. | |
1086 | * Fields are initialized based on PCI device information and | |
1087 | * OS network device settings (MTU size). | |
1088 | **/ | |
1089 | ||
1090 | static int __devinit | |
1091 | e1000_sw_init(struct e1000_adapter *adapter) | |
1092 | { | |
1093 | struct e1000_hw *hw = &adapter->hw; | |
1094 | struct net_device *netdev = adapter->netdev; | |
1095 | struct pci_dev *pdev = adapter->pdev; | |
581d708e MC |
1096 | #ifdef CONFIG_E1000_NAPI |
1097 | int i; | |
1098 | #endif | |
1da177e4 LT |
1099 | |
1100 | /* PCI config space info */ | |
1101 | ||
1102 | hw->vendor_id = pdev->vendor; | |
1103 | hw->device_id = pdev->device; | |
1104 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
1105 | hw->subsystem_id = pdev->subsystem_device; | |
1106 | ||
1107 | pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); | |
1108 | ||
1109 | pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); | |
1110 | ||
eb0f8054 | 1111 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; |
9e2feace | 1112 | adapter->rx_ps_bsize0 = E1000_RXBUFFER_128; |
1da177e4 LT |
1113 | hw->max_frame_size = netdev->mtu + |
1114 | ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; | |
1115 | hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE; | |
1116 | ||
1117 | /* identify the MAC */ | |
1118 | ||
96838a40 | 1119 | if (e1000_set_mac_type(hw)) { |
1da177e4 LT |
1120 | DPRINTK(PROBE, ERR, "Unknown MAC Type\n"); |
1121 | return -EIO; | |
1122 | } | |
1123 | ||
96838a40 | 1124 | switch (hw->mac_type) { |
1da177e4 LT |
1125 | default: |
1126 | break; | |
1127 | case e1000_82541: | |
1128 | case e1000_82547: | |
1129 | case e1000_82541_rev_2: | |
1130 | case e1000_82547_rev_2: | |
1131 | hw->phy_init_script = 1; | |
1132 | break; | |
1133 | } | |
1134 | ||
1135 | e1000_set_media_type(hw); | |
1136 | ||
1137 | hw->wait_autoneg_complete = FALSE; | |
1138 | hw->tbi_compatibility_en = TRUE; | |
1139 | hw->adaptive_ifs = TRUE; | |
1140 | ||
1141 | /* Copper options */ | |
1142 | ||
96838a40 | 1143 | if (hw->media_type == e1000_media_type_copper) { |
1da177e4 LT |
1144 | hw->mdix = AUTO_ALL_MODES; |
1145 | hw->disable_polarity_correction = FALSE; | |
1146 | hw->master_slave = E1000_MASTER_SLAVE; | |
1147 | } | |
1148 | ||
f56799ea JK |
1149 | adapter->num_tx_queues = 1; |
1150 | adapter->num_rx_queues = 1; | |
581d708e MC |
1151 | |
1152 | if (e1000_alloc_queues(adapter)) { | |
1153 | DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n"); | |
1154 | return -ENOMEM; | |
1155 | } | |
1156 | ||
1157 | #ifdef CONFIG_E1000_NAPI | |
f56799ea | 1158 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
1159 | adapter->polling_netdev[i].priv = adapter; |
1160 | adapter->polling_netdev[i].poll = &e1000_clean; | |
1161 | adapter->polling_netdev[i].weight = 64; | |
1162 | dev_hold(&adapter->polling_netdev[i]); | |
1163 | set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state); | |
1164 | } | |
7bfa4816 | 1165 | spin_lock_init(&adapter->tx_queue_lock); |
24025e4e MC |
1166 | #endif |
1167 | ||
1da177e4 LT |
1168 | atomic_set(&adapter->irq_sem, 1); |
1169 | spin_lock_init(&adapter->stats_lock); | |
1da177e4 LT |
1170 | |
1171 | return 0; | |
1172 | } | |
1173 | ||
581d708e MC |
1174 | /** |
1175 | * e1000_alloc_queues - Allocate memory for all rings | |
1176 | * @adapter: board private structure to initialize | |
1177 | * | |
1178 | * We allocate one ring per queue at run-time since we don't know the | |
1179 | * number of queues at compile-time. The polling_netdev array is | |
1180 | * intended for Multiqueue, but should work fine with a single queue. | |
1181 | **/ | |
1182 | ||
1183 | static int __devinit | |
1184 | e1000_alloc_queues(struct e1000_adapter *adapter) | |
1185 | { | |
1186 | int size; | |
1187 | ||
f56799ea | 1188 | size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues; |
581d708e MC |
1189 | adapter->tx_ring = kmalloc(size, GFP_KERNEL); |
1190 | if (!adapter->tx_ring) | |
1191 | return -ENOMEM; | |
1192 | memset(adapter->tx_ring, 0, size); | |
1193 | ||
f56799ea | 1194 | size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues; |
581d708e MC |
1195 | adapter->rx_ring = kmalloc(size, GFP_KERNEL); |
1196 | if (!adapter->rx_ring) { | |
1197 | kfree(adapter->tx_ring); | |
1198 | return -ENOMEM; | |
1199 | } | |
1200 | memset(adapter->rx_ring, 0, size); | |
1201 | ||
1202 | #ifdef CONFIG_E1000_NAPI | |
f56799ea | 1203 | size = sizeof(struct net_device) * adapter->num_rx_queues; |
581d708e MC |
1204 | adapter->polling_netdev = kmalloc(size, GFP_KERNEL); |
1205 | if (!adapter->polling_netdev) { | |
1206 | kfree(adapter->tx_ring); | |
1207 | kfree(adapter->rx_ring); | |
1208 | return -ENOMEM; | |
1209 | } | |
1210 | memset(adapter->polling_netdev, 0, size); | |
1211 | #endif | |
1212 | ||
1213 | return E1000_SUCCESS; | |
1214 | } | |
1215 | ||
1da177e4 LT |
1216 | /** |
1217 | * e1000_open - Called when a network interface is made active | |
1218 | * @netdev: network interface device structure | |
1219 | * | |
1220 | * Returns 0 on success, negative value on failure | |
1221 | * | |
1222 | * The open entry point is called when a network interface is made | |
1223 | * active by the system (IFF_UP). At this point all resources needed | |
1224 | * for transmit and receive operations are allocated, the interrupt | |
1225 | * handler is registered with the OS, the watchdog timer is started, | |
1226 | * and the stack is notified that the interface is ready. | |
1227 | **/ | |
1228 | ||
1229 | static int | |
1230 | e1000_open(struct net_device *netdev) | |
1231 | { | |
60490fe0 | 1232 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1233 | int err; |
1234 | ||
2db10a08 AK |
1235 | /* disallow open during test */ |
1236 | if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags)) | |
1237 | return -EBUSY; | |
1238 | ||
1da177e4 LT |
1239 | /* allocate transmit descriptors */ |
1240 | ||
581d708e | 1241 | if ((err = e1000_setup_all_tx_resources(adapter))) |
1da177e4 LT |
1242 | goto err_setup_tx; |
1243 | ||
1244 | /* allocate receive descriptors */ | |
1245 | ||
581d708e | 1246 | if ((err = e1000_setup_all_rx_resources(adapter))) |
1da177e4 LT |
1247 | goto err_setup_rx; |
1248 | ||
2db10a08 AK |
1249 | err = e1000_request_irq(adapter); |
1250 | if (err) | |
401a552b | 1251 | goto err_req_irq; |
2db10a08 | 1252 | |
79f05bf0 AK |
1253 | e1000_power_up_phy(adapter); |
1254 | ||
96838a40 | 1255 | if ((err = e1000_up(adapter))) |
1da177e4 | 1256 | goto err_up; |
2d7edb92 | 1257 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; |
96838a40 | 1258 | if ((adapter->hw.mng_cookie.status & |
2d7edb92 MC |
1259 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { |
1260 | e1000_update_mng_vlan(adapter); | |
1261 | } | |
1da177e4 | 1262 | |
b55ccb35 JK |
1263 | /* If AMT is enabled, let the firmware know that the network |
1264 | * interface is now open */ | |
1265 | if (adapter->hw.mac_type == e1000_82573 && | |
1266 | e1000_check_mng_mode(&adapter->hw)) | |
1267 | e1000_get_hw_control(adapter); | |
1268 | ||
1da177e4 LT |
1269 | return E1000_SUCCESS; |
1270 | ||
1271 | err_up: | |
401a552b VA |
1272 | e1000_power_down_phy(adapter); |
1273 | e1000_free_irq(adapter); | |
1274 | err_req_irq: | |
581d708e | 1275 | e1000_free_all_rx_resources(adapter); |
1da177e4 | 1276 | err_setup_rx: |
581d708e | 1277 | e1000_free_all_tx_resources(adapter); |
1da177e4 LT |
1278 | err_setup_tx: |
1279 | e1000_reset(adapter); | |
1280 | ||
1281 | return err; | |
1282 | } | |
1283 | ||
1284 | /** | |
1285 | * e1000_close - Disables a network interface | |
1286 | * @netdev: network interface device structure | |
1287 | * | |
1288 | * Returns 0, this is not allowed to fail | |
1289 | * | |
1290 | * The close entry point is called when an interface is de-activated | |
1291 | * by the OS. The hardware is still under the drivers control, but | |
1292 | * needs to be disabled. A global MAC reset is issued to stop the | |
1293 | * hardware, and all transmit and receive resources are freed. | |
1294 | **/ | |
1295 | ||
1296 | static int | |
1297 | e1000_close(struct net_device *netdev) | |
1298 | { | |
60490fe0 | 1299 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 1300 | |
2db10a08 | 1301 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); |
1da177e4 | 1302 | e1000_down(adapter); |
79f05bf0 | 1303 | e1000_power_down_phy(adapter); |
2db10a08 | 1304 | e1000_free_irq(adapter); |
1da177e4 | 1305 | |
581d708e MC |
1306 | e1000_free_all_tx_resources(adapter); |
1307 | e1000_free_all_rx_resources(adapter); | |
1da177e4 | 1308 | |
96838a40 | 1309 | if ((adapter->hw.mng_cookie.status & |
2d7edb92 MC |
1310 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { |
1311 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); | |
1312 | } | |
b55ccb35 JK |
1313 | |
1314 | /* If AMT is enabled, let the firmware know that the network | |
1315 | * interface is now closed */ | |
1316 | if (adapter->hw.mac_type == e1000_82573 && | |
1317 | e1000_check_mng_mode(&adapter->hw)) | |
1318 | e1000_release_hw_control(adapter); | |
1319 | ||
1da177e4 LT |
1320 | return 0; |
1321 | } | |
1322 | ||
1323 | /** | |
1324 | * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary | |
1325 | * @adapter: address of board private structure | |
2d7edb92 MC |
1326 | * @start: address of beginning of memory |
1327 | * @len: length of memory | |
1da177e4 | 1328 | **/ |
e619d523 | 1329 | static boolean_t |
1da177e4 LT |
1330 | e1000_check_64k_bound(struct e1000_adapter *adapter, |
1331 | void *start, unsigned long len) | |
1332 | { | |
1333 | unsigned long begin = (unsigned long) start; | |
1334 | unsigned long end = begin + len; | |
1335 | ||
2648345f MC |
1336 | /* First rev 82545 and 82546 need to not allow any memory |
1337 | * write location to cross 64k boundary due to errata 23 */ | |
1da177e4 | 1338 | if (adapter->hw.mac_type == e1000_82545 || |
2648345f | 1339 | adapter->hw.mac_type == e1000_82546) { |
1da177e4 LT |
1340 | return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE; |
1341 | } | |
1342 | ||
1343 | return TRUE; | |
1344 | } | |
1345 | ||
1346 | /** | |
1347 | * e1000_setup_tx_resources - allocate Tx resources (Descriptors) | |
1348 | * @adapter: board private structure | |
581d708e | 1349 | * @txdr: tx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1350 | * |
1351 | * Return 0 on success, negative on failure | |
1352 | **/ | |
1353 | ||
3ad2cc67 | 1354 | static int |
581d708e MC |
1355 | e1000_setup_tx_resources(struct e1000_adapter *adapter, |
1356 | struct e1000_tx_ring *txdr) | |
1da177e4 | 1357 | { |
1da177e4 LT |
1358 | struct pci_dev *pdev = adapter->pdev; |
1359 | int size; | |
1360 | ||
1361 | size = sizeof(struct e1000_buffer) * txdr->count; | |
cd94dd0b | 1362 | txdr->buffer_info = vmalloc(size); |
96838a40 | 1363 | if (!txdr->buffer_info) { |
2648345f MC |
1364 | DPRINTK(PROBE, ERR, |
1365 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1366 | return -ENOMEM; |
1367 | } | |
1368 | memset(txdr->buffer_info, 0, size); | |
1369 | ||
1370 | /* round up to nearest 4K */ | |
1371 | ||
1372 | txdr->size = txdr->count * sizeof(struct e1000_tx_desc); | |
1373 | E1000_ROUNDUP(txdr->size, 4096); | |
1374 | ||
1375 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); | |
96838a40 | 1376 | if (!txdr->desc) { |
1da177e4 | 1377 | setup_tx_desc_die: |
1da177e4 | 1378 | vfree(txdr->buffer_info); |
2648345f MC |
1379 | DPRINTK(PROBE, ERR, |
1380 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1381 | return -ENOMEM; |
1382 | } | |
1383 | ||
2648345f | 1384 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1385 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { |
1386 | void *olddesc = txdr->desc; | |
1387 | dma_addr_t olddma = txdr->dma; | |
2648345f MC |
1388 | DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes " |
1389 | "at %p\n", txdr->size, txdr->desc); | |
1390 | /* Try again, without freeing the previous */ | |
1da177e4 | 1391 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); |
2648345f | 1392 | /* Failed allocation, critical failure */ |
96838a40 | 1393 | if (!txdr->desc) { |
1da177e4 LT |
1394 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1395 | goto setup_tx_desc_die; | |
1396 | } | |
1397 | ||
1398 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { | |
1399 | /* give up */ | |
2648345f MC |
1400 | pci_free_consistent(pdev, txdr->size, txdr->desc, |
1401 | txdr->dma); | |
1da177e4 LT |
1402 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1403 | DPRINTK(PROBE, ERR, | |
2648345f MC |
1404 | "Unable to allocate aligned memory " |
1405 | "for the transmit descriptor ring\n"); | |
1da177e4 LT |
1406 | vfree(txdr->buffer_info); |
1407 | return -ENOMEM; | |
1408 | } else { | |
2648345f | 1409 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1410 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1411 | } | |
1412 | } | |
1413 | memset(txdr->desc, 0, txdr->size); | |
1414 | ||
1415 | txdr->next_to_use = 0; | |
1416 | txdr->next_to_clean = 0; | |
2ae76d98 | 1417 | spin_lock_init(&txdr->tx_lock); |
1da177e4 LT |
1418 | |
1419 | return 0; | |
1420 | } | |
1421 | ||
581d708e MC |
1422 | /** |
1423 | * e1000_setup_all_tx_resources - wrapper to allocate Tx resources | |
1424 | * (Descriptors) for all queues | |
1425 | * @adapter: board private structure | |
1426 | * | |
581d708e MC |
1427 | * Return 0 on success, negative on failure |
1428 | **/ | |
1429 | ||
1430 | int | |
1431 | e1000_setup_all_tx_resources(struct e1000_adapter *adapter) | |
1432 | { | |
1433 | int i, err = 0; | |
1434 | ||
f56799ea | 1435 | for (i = 0; i < adapter->num_tx_queues; i++) { |
581d708e MC |
1436 | err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]); |
1437 | if (err) { | |
1438 | DPRINTK(PROBE, ERR, | |
1439 | "Allocation for Tx Queue %u failed\n", i); | |
3fbbc72e VA |
1440 | for (i-- ; i >= 0; i--) |
1441 | e1000_free_tx_resources(adapter, | |
1442 | &adapter->tx_ring[i]); | |
581d708e MC |
1443 | break; |
1444 | } | |
1445 | } | |
1446 | ||
1447 | return err; | |
1448 | } | |
1449 | ||
1da177e4 LT |
1450 | /** |
1451 | * e1000_configure_tx - Configure 8254x Transmit Unit after Reset | |
1452 | * @adapter: board private structure | |
1453 | * | |
1454 | * Configure the Tx unit of the MAC after a reset. | |
1455 | **/ | |
1456 | ||
1457 | static void | |
1458 | e1000_configure_tx(struct e1000_adapter *adapter) | |
1459 | { | |
581d708e MC |
1460 | uint64_t tdba; |
1461 | struct e1000_hw *hw = &adapter->hw; | |
1462 | uint32_t tdlen, tctl, tipg, tarc; | |
0fadb059 | 1463 | uint32_t ipgr1, ipgr2; |
1da177e4 LT |
1464 | |
1465 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
1466 | ||
f56799ea | 1467 | switch (adapter->num_tx_queues) { |
24025e4e MC |
1468 | case 1: |
1469 | default: | |
581d708e MC |
1470 | tdba = adapter->tx_ring[0].dma; |
1471 | tdlen = adapter->tx_ring[0].count * | |
1472 | sizeof(struct e1000_tx_desc); | |
581d708e | 1473 | E1000_WRITE_REG(hw, TDLEN, tdlen); |
4ca213a6 AK |
1474 | E1000_WRITE_REG(hw, TDBAH, (tdba >> 32)); |
1475 | E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL)); | |
581d708e | 1476 | E1000_WRITE_REG(hw, TDT, 0); |
4ca213a6 | 1477 | E1000_WRITE_REG(hw, TDH, 0); |
6a951698 AK |
1478 | adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH); |
1479 | adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT); | |
24025e4e MC |
1480 | break; |
1481 | } | |
1da177e4 LT |
1482 | |
1483 | /* Set the default values for the Tx Inter Packet Gap timer */ | |
1484 | ||
0fadb059 JK |
1485 | if (hw->media_type == e1000_media_type_fiber || |
1486 | hw->media_type == e1000_media_type_internal_serdes) | |
1487 | tipg = DEFAULT_82543_TIPG_IPGT_FIBER; | |
1488 | else | |
1489 | tipg = DEFAULT_82543_TIPG_IPGT_COPPER; | |
1490 | ||
581d708e | 1491 | switch (hw->mac_type) { |
1da177e4 LT |
1492 | case e1000_82542_rev2_0: |
1493 | case e1000_82542_rev2_1: | |
1494 | tipg = DEFAULT_82542_TIPG_IPGT; | |
0fadb059 JK |
1495 | ipgr1 = DEFAULT_82542_TIPG_IPGR1; |
1496 | ipgr2 = DEFAULT_82542_TIPG_IPGR2; | |
1da177e4 | 1497 | break; |
87041639 JK |
1498 | case e1000_80003es2lan: |
1499 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; | |
1500 | ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; | |
1501 | break; | |
1da177e4 | 1502 | default: |
0fadb059 JK |
1503 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; |
1504 | ipgr2 = DEFAULT_82543_TIPG_IPGR2; | |
1505 | break; | |
1da177e4 | 1506 | } |
0fadb059 JK |
1507 | tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT; |
1508 | tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT; | |
581d708e | 1509 | E1000_WRITE_REG(hw, TIPG, tipg); |
1da177e4 LT |
1510 | |
1511 | /* Set the Tx Interrupt Delay register */ | |
1512 | ||
581d708e MC |
1513 | E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay); |
1514 | if (hw->mac_type >= e1000_82540) | |
1515 | E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay); | |
1da177e4 LT |
1516 | |
1517 | /* Program the Transmit Control Register */ | |
1518 | ||
581d708e | 1519 | tctl = E1000_READ_REG(hw, TCTL); |
1da177e4 LT |
1520 | |
1521 | tctl &= ~E1000_TCTL_CT; | |
7e6c9861 | 1522 | tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | |
1da177e4 LT |
1523 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); |
1524 | ||
7e6c9861 JK |
1525 | #ifdef DISABLE_MULR |
1526 | /* disable Multiple Reads for debugging */ | |
1527 | tctl &= ~E1000_TCTL_MULR; | |
1528 | #endif | |
1da177e4 | 1529 | |
2ae76d98 MC |
1530 | if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) { |
1531 | tarc = E1000_READ_REG(hw, TARC0); | |
1532 | tarc |= ((1 << 25) | (1 << 21)); | |
1533 | E1000_WRITE_REG(hw, TARC0, tarc); | |
1534 | tarc = E1000_READ_REG(hw, TARC1); | |
1535 | tarc |= (1 << 25); | |
1536 | if (tctl & E1000_TCTL_MULR) | |
1537 | tarc &= ~(1 << 28); | |
1538 | else | |
1539 | tarc |= (1 << 28); | |
1540 | E1000_WRITE_REG(hw, TARC1, tarc); | |
87041639 JK |
1541 | } else if (hw->mac_type == e1000_80003es2lan) { |
1542 | tarc = E1000_READ_REG(hw, TARC0); | |
1543 | tarc |= 1; | |
87041639 JK |
1544 | E1000_WRITE_REG(hw, TARC0, tarc); |
1545 | tarc = E1000_READ_REG(hw, TARC1); | |
1546 | tarc |= 1; | |
1547 | E1000_WRITE_REG(hw, TARC1, tarc); | |
2ae76d98 MC |
1548 | } |
1549 | ||
581d708e | 1550 | e1000_config_collision_dist(hw); |
1da177e4 LT |
1551 | |
1552 | /* Setup Transmit Descriptor Settings for eop descriptor */ | |
1553 | adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP | | |
1554 | E1000_TXD_CMD_IFCS; | |
1555 | ||
581d708e | 1556 | if (hw->mac_type < e1000_82543) |
1da177e4 LT |
1557 | adapter->txd_cmd |= E1000_TXD_CMD_RPS; |
1558 | else | |
1559 | adapter->txd_cmd |= E1000_TXD_CMD_RS; | |
1560 | ||
1561 | /* Cache if we're 82544 running in PCI-X because we'll | |
1562 | * need this to apply a workaround later in the send path. */ | |
581d708e MC |
1563 | if (hw->mac_type == e1000_82544 && |
1564 | hw->bus_type == e1000_bus_type_pcix) | |
1da177e4 | 1565 | adapter->pcix_82544 = 1; |
7e6c9861 JK |
1566 | |
1567 | E1000_WRITE_REG(hw, TCTL, tctl); | |
1568 | ||
1da177e4 LT |
1569 | } |
1570 | ||
1571 | /** | |
1572 | * e1000_setup_rx_resources - allocate Rx resources (Descriptors) | |
1573 | * @adapter: board private structure | |
581d708e | 1574 | * @rxdr: rx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1575 | * |
1576 | * Returns 0 on success, negative on failure | |
1577 | **/ | |
1578 | ||
3ad2cc67 | 1579 | static int |
581d708e MC |
1580 | e1000_setup_rx_resources(struct e1000_adapter *adapter, |
1581 | struct e1000_rx_ring *rxdr) | |
1da177e4 | 1582 | { |
1da177e4 | 1583 | struct pci_dev *pdev = adapter->pdev; |
2d7edb92 | 1584 | int size, desc_len; |
1da177e4 LT |
1585 | |
1586 | size = sizeof(struct e1000_buffer) * rxdr->count; | |
cd94dd0b | 1587 | rxdr->buffer_info = vmalloc(size); |
581d708e | 1588 | if (!rxdr->buffer_info) { |
2648345f MC |
1589 | DPRINTK(PROBE, ERR, |
1590 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 LT |
1591 | return -ENOMEM; |
1592 | } | |
1593 | memset(rxdr->buffer_info, 0, size); | |
1594 | ||
2d7edb92 MC |
1595 | size = sizeof(struct e1000_ps_page) * rxdr->count; |
1596 | rxdr->ps_page = kmalloc(size, GFP_KERNEL); | |
96838a40 | 1597 | if (!rxdr->ps_page) { |
2d7edb92 MC |
1598 | vfree(rxdr->buffer_info); |
1599 | DPRINTK(PROBE, ERR, | |
1600 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1601 | return -ENOMEM; | |
1602 | } | |
1603 | memset(rxdr->ps_page, 0, size); | |
1604 | ||
1605 | size = sizeof(struct e1000_ps_page_dma) * rxdr->count; | |
1606 | rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL); | |
96838a40 | 1607 | if (!rxdr->ps_page_dma) { |
2d7edb92 MC |
1608 | vfree(rxdr->buffer_info); |
1609 | kfree(rxdr->ps_page); | |
1610 | DPRINTK(PROBE, ERR, | |
1611 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1612 | return -ENOMEM; | |
1613 | } | |
1614 | memset(rxdr->ps_page_dma, 0, size); | |
1615 | ||
96838a40 | 1616 | if (adapter->hw.mac_type <= e1000_82547_rev_2) |
2d7edb92 MC |
1617 | desc_len = sizeof(struct e1000_rx_desc); |
1618 | else | |
1619 | desc_len = sizeof(union e1000_rx_desc_packet_split); | |
1620 | ||
1da177e4 LT |
1621 | /* Round up to nearest 4K */ |
1622 | ||
2d7edb92 | 1623 | rxdr->size = rxdr->count * desc_len; |
1da177e4 LT |
1624 | E1000_ROUNDUP(rxdr->size, 4096); |
1625 | ||
1626 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); | |
1627 | ||
581d708e MC |
1628 | if (!rxdr->desc) { |
1629 | DPRINTK(PROBE, ERR, | |
1630 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 | 1631 | setup_rx_desc_die: |
1da177e4 | 1632 | vfree(rxdr->buffer_info); |
2d7edb92 MC |
1633 | kfree(rxdr->ps_page); |
1634 | kfree(rxdr->ps_page_dma); | |
1da177e4 LT |
1635 | return -ENOMEM; |
1636 | } | |
1637 | ||
2648345f | 1638 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1639 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { |
1640 | void *olddesc = rxdr->desc; | |
1641 | dma_addr_t olddma = rxdr->dma; | |
2648345f MC |
1642 | DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes " |
1643 | "at %p\n", rxdr->size, rxdr->desc); | |
1644 | /* Try again, without freeing the previous */ | |
1da177e4 | 1645 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); |
2648345f | 1646 | /* Failed allocation, critical failure */ |
581d708e | 1647 | if (!rxdr->desc) { |
1da177e4 | 1648 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
581d708e MC |
1649 | DPRINTK(PROBE, ERR, |
1650 | "Unable to allocate memory " | |
1651 | "for the receive descriptor ring\n"); | |
1da177e4 LT |
1652 | goto setup_rx_desc_die; |
1653 | } | |
1654 | ||
1655 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { | |
1656 | /* give up */ | |
2648345f MC |
1657 | pci_free_consistent(pdev, rxdr->size, rxdr->desc, |
1658 | rxdr->dma); | |
1da177e4 | 1659 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
2648345f MC |
1660 | DPRINTK(PROBE, ERR, |
1661 | "Unable to allocate aligned memory " | |
1662 | "for the receive descriptor ring\n"); | |
581d708e | 1663 | goto setup_rx_desc_die; |
1da177e4 | 1664 | } else { |
2648345f | 1665 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1666 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
1667 | } | |
1668 | } | |
1669 | memset(rxdr->desc, 0, rxdr->size); | |
1670 | ||
1671 | rxdr->next_to_clean = 0; | |
1672 | rxdr->next_to_use = 0; | |
1673 | ||
1674 | return 0; | |
1675 | } | |
1676 | ||
581d708e MC |
1677 | /** |
1678 | * e1000_setup_all_rx_resources - wrapper to allocate Rx resources | |
1679 | * (Descriptors) for all queues | |
1680 | * @adapter: board private structure | |
1681 | * | |
581d708e MC |
1682 | * Return 0 on success, negative on failure |
1683 | **/ | |
1684 | ||
1685 | int | |
1686 | e1000_setup_all_rx_resources(struct e1000_adapter *adapter) | |
1687 | { | |
1688 | int i, err = 0; | |
1689 | ||
f56799ea | 1690 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
1691 | err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]); |
1692 | if (err) { | |
1693 | DPRINTK(PROBE, ERR, | |
1694 | "Allocation for Rx Queue %u failed\n", i); | |
3fbbc72e VA |
1695 | for (i-- ; i >= 0; i--) |
1696 | e1000_free_rx_resources(adapter, | |
1697 | &adapter->rx_ring[i]); | |
581d708e MC |
1698 | break; |
1699 | } | |
1700 | } | |
1701 | ||
1702 | return err; | |
1703 | } | |
1704 | ||
1da177e4 | 1705 | /** |
2648345f | 1706 | * e1000_setup_rctl - configure the receive control registers |
1da177e4 LT |
1707 | * @adapter: Board private structure |
1708 | **/ | |
e4c811c9 MC |
1709 | #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ |
1710 | (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) | |
1da177e4 LT |
1711 | static void |
1712 | e1000_setup_rctl(struct e1000_adapter *adapter) | |
1713 | { | |
2d7edb92 MC |
1714 | uint32_t rctl, rfctl; |
1715 | uint32_t psrctl = 0; | |
35ec56bb | 1716 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT |
e4c811c9 MC |
1717 | uint32_t pages = 0; |
1718 | #endif | |
1da177e4 LT |
1719 | |
1720 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
1721 | ||
1722 | rctl &= ~(3 << E1000_RCTL_MO_SHIFT); | |
1723 | ||
1724 | rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | | |
1725 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | |
1726 | (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); | |
1727 | ||
0fadb059 | 1728 | if (adapter->hw.tbi_compatibility_on == 1) |
1da177e4 LT |
1729 | rctl |= E1000_RCTL_SBP; |
1730 | else | |
1731 | rctl &= ~E1000_RCTL_SBP; | |
1732 | ||
2d7edb92 MC |
1733 | if (adapter->netdev->mtu <= ETH_DATA_LEN) |
1734 | rctl &= ~E1000_RCTL_LPE; | |
1735 | else | |
1736 | rctl |= E1000_RCTL_LPE; | |
1737 | ||
1da177e4 | 1738 | /* Setup buffer sizes */ |
9e2feace AK |
1739 | rctl &= ~E1000_RCTL_SZ_4096; |
1740 | rctl |= E1000_RCTL_BSEX; | |
1741 | switch (adapter->rx_buffer_len) { | |
1742 | case E1000_RXBUFFER_256: | |
1743 | rctl |= E1000_RCTL_SZ_256; | |
1744 | rctl &= ~E1000_RCTL_BSEX; | |
1745 | break; | |
1746 | case E1000_RXBUFFER_512: | |
1747 | rctl |= E1000_RCTL_SZ_512; | |
1748 | rctl &= ~E1000_RCTL_BSEX; | |
1749 | break; | |
1750 | case E1000_RXBUFFER_1024: | |
1751 | rctl |= E1000_RCTL_SZ_1024; | |
1752 | rctl &= ~E1000_RCTL_BSEX; | |
1753 | break; | |
a1415ee6 JK |
1754 | case E1000_RXBUFFER_2048: |
1755 | default: | |
1756 | rctl |= E1000_RCTL_SZ_2048; | |
1757 | rctl &= ~E1000_RCTL_BSEX; | |
1758 | break; | |
1759 | case E1000_RXBUFFER_4096: | |
1760 | rctl |= E1000_RCTL_SZ_4096; | |
1761 | break; | |
1762 | case E1000_RXBUFFER_8192: | |
1763 | rctl |= E1000_RCTL_SZ_8192; | |
1764 | break; | |
1765 | case E1000_RXBUFFER_16384: | |
1766 | rctl |= E1000_RCTL_SZ_16384; | |
1767 | break; | |
2d7edb92 MC |
1768 | } |
1769 | ||
35ec56bb | 1770 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT |
2d7edb92 MC |
1771 | /* 82571 and greater support packet-split where the protocol |
1772 | * header is placed in skb->data and the packet data is | |
1773 | * placed in pages hanging off of skb_shinfo(skb)->nr_frags. | |
1774 | * In the case of a non-split, skb->data is linearly filled, | |
1775 | * followed by the page buffers. Therefore, skb->data is | |
1776 | * sized to hold the largest protocol header. | |
1777 | */ | |
e4c811c9 MC |
1778 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); |
1779 | if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) && | |
1780 | PAGE_SIZE <= 16384) | |
1781 | adapter->rx_ps_pages = pages; | |
1782 | else | |
1783 | adapter->rx_ps_pages = 0; | |
2d7edb92 | 1784 | #endif |
e4c811c9 | 1785 | if (adapter->rx_ps_pages) { |
2d7edb92 MC |
1786 | /* Configure extra packet-split registers */ |
1787 | rfctl = E1000_READ_REG(&adapter->hw, RFCTL); | |
1788 | rfctl |= E1000_RFCTL_EXTEN; | |
1789 | /* disable IPv6 packet split support */ | |
1790 | rfctl |= E1000_RFCTL_IPV6_DIS; | |
1791 | E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl); | |
1792 | ||
7dfee0cb | 1793 | rctl |= E1000_RCTL_DTYP_PS; |
96838a40 | 1794 | |
2d7edb92 MC |
1795 | psrctl |= adapter->rx_ps_bsize0 >> |
1796 | E1000_PSRCTL_BSIZE0_SHIFT; | |
e4c811c9 MC |
1797 | |
1798 | switch (adapter->rx_ps_pages) { | |
1799 | case 3: | |
1800 | psrctl |= PAGE_SIZE << | |
1801 | E1000_PSRCTL_BSIZE3_SHIFT; | |
1802 | case 2: | |
1803 | psrctl |= PAGE_SIZE << | |
1804 | E1000_PSRCTL_BSIZE2_SHIFT; | |
1805 | case 1: | |
1806 | psrctl |= PAGE_SIZE >> | |
1807 | E1000_PSRCTL_BSIZE1_SHIFT; | |
1808 | break; | |
1809 | } | |
2d7edb92 MC |
1810 | |
1811 | E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl); | |
1da177e4 LT |
1812 | } |
1813 | ||
1814 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
1815 | } | |
1816 | ||
1817 | /** | |
1818 | * e1000_configure_rx - Configure 8254x Receive Unit after Reset | |
1819 | * @adapter: board private structure | |
1820 | * | |
1821 | * Configure the Rx unit of the MAC after a reset. | |
1822 | **/ | |
1823 | ||
1824 | static void | |
1825 | e1000_configure_rx(struct e1000_adapter *adapter) | |
1826 | { | |
581d708e MC |
1827 | uint64_t rdba; |
1828 | struct e1000_hw *hw = &adapter->hw; | |
1829 | uint32_t rdlen, rctl, rxcsum, ctrl_ext; | |
2d7edb92 | 1830 | |
e4c811c9 | 1831 | if (adapter->rx_ps_pages) { |
0f15a8fa | 1832 | /* this is a 32 byte descriptor */ |
581d708e | 1833 | rdlen = adapter->rx_ring[0].count * |
2d7edb92 MC |
1834 | sizeof(union e1000_rx_desc_packet_split); |
1835 | adapter->clean_rx = e1000_clean_rx_irq_ps; | |
1836 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; | |
1837 | } else { | |
581d708e MC |
1838 | rdlen = adapter->rx_ring[0].count * |
1839 | sizeof(struct e1000_rx_desc); | |
2d7edb92 MC |
1840 | adapter->clean_rx = e1000_clean_rx_irq; |
1841 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers; | |
1842 | } | |
1da177e4 LT |
1843 | |
1844 | /* disable receives while setting up the descriptors */ | |
581d708e MC |
1845 | rctl = E1000_READ_REG(hw, RCTL); |
1846 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
1da177e4 LT |
1847 | |
1848 | /* set the Receive Delay Timer Register */ | |
581d708e | 1849 | E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay); |
1da177e4 | 1850 | |
581d708e MC |
1851 | if (hw->mac_type >= e1000_82540) { |
1852 | E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay); | |
96838a40 | 1853 | if (adapter->itr > 1) |
581d708e | 1854 | E1000_WRITE_REG(hw, ITR, |
1da177e4 LT |
1855 | 1000000000 / (adapter->itr * 256)); |
1856 | } | |
1857 | ||
2ae76d98 | 1858 | if (hw->mac_type >= e1000_82571) { |
2ae76d98 | 1859 | ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); |
1e613fd9 | 1860 | /* Reset delay timers after every interrupt */ |
6fc7a7ec | 1861 | ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR; |
1e613fd9 JK |
1862 | #ifdef CONFIG_E1000_NAPI |
1863 | /* Auto-Mask interrupts upon ICR read. */ | |
1864 | ctrl_ext |= E1000_CTRL_EXT_IAME; | |
1865 | #endif | |
2ae76d98 | 1866 | E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext); |
1e613fd9 | 1867 | E1000_WRITE_REG(hw, IAM, ~0); |
2ae76d98 MC |
1868 | E1000_WRITE_FLUSH(hw); |
1869 | } | |
1870 | ||
581d708e MC |
1871 | /* Setup the HW Rx Head and Tail Descriptor Pointers and |
1872 | * the Base and Length of the Rx Descriptor Ring */ | |
f56799ea | 1873 | switch (adapter->num_rx_queues) { |
24025e4e MC |
1874 | case 1: |
1875 | default: | |
581d708e | 1876 | rdba = adapter->rx_ring[0].dma; |
581d708e | 1877 | E1000_WRITE_REG(hw, RDLEN, rdlen); |
4ca213a6 AK |
1878 | E1000_WRITE_REG(hw, RDBAH, (rdba >> 32)); |
1879 | E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL)); | |
581d708e | 1880 | E1000_WRITE_REG(hw, RDT, 0); |
4ca213a6 | 1881 | E1000_WRITE_REG(hw, RDH, 0); |
6a951698 AK |
1882 | adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH); |
1883 | adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT); | |
581d708e | 1884 | break; |
24025e4e MC |
1885 | } |
1886 | ||
1da177e4 | 1887 | /* Enable 82543 Receive Checksum Offload for TCP and UDP */ |
581d708e MC |
1888 | if (hw->mac_type >= e1000_82543) { |
1889 | rxcsum = E1000_READ_REG(hw, RXCSUM); | |
96838a40 | 1890 | if (adapter->rx_csum == TRUE) { |
2d7edb92 MC |
1891 | rxcsum |= E1000_RXCSUM_TUOFL; |
1892 | ||
868d5309 | 1893 | /* Enable 82571 IPv4 payload checksum for UDP fragments |
2d7edb92 | 1894 | * Must be used in conjunction with packet-split. */ |
96838a40 JB |
1895 | if ((hw->mac_type >= e1000_82571) && |
1896 | (adapter->rx_ps_pages)) { | |
2d7edb92 MC |
1897 | rxcsum |= E1000_RXCSUM_IPPCSE; |
1898 | } | |
1899 | } else { | |
1900 | rxcsum &= ~E1000_RXCSUM_TUOFL; | |
1901 | /* don't need to clear IPPCSE as it defaults to 0 */ | |
1902 | } | |
581d708e | 1903 | E1000_WRITE_REG(hw, RXCSUM, rxcsum); |
1da177e4 LT |
1904 | } |
1905 | ||
1906 | /* Enable Receives */ | |
581d708e | 1907 | E1000_WRITE_REG(hw, RCTL, rctl); |
1da177e4 LT |
1908 | } |
1909 | ||
1910 | /** | |
581d708e | 1911 | * e1000_free_tx_resources - Free Tx Resources per Queue |
1da177e4 | 1912 | * @adapter: board private structure |
581d708e | 1913 | * @tx_ring: Tx descriptor ring for a specific queue |
1da177e4 LT |
1914 | * |
1915 | * Free all transmit software resources | |
1916 | **/ | |
1917 | ||
3ad2cc67 | 1918 | static void |
581d708e MC |
1919 | e1000_free_tx_resources(struct e1000_adapter *adapter, |
1920 | struct e1000_tx_ring *tx_ring) | |
1da177e4 LT |
1921 | { |
1922 | struct pci_dev *pdev = adapter->pdev; | |
1923 | ||
581d708e | 1924 | e1000_clean_tx_ring(adapter, tx_ring); |
1da177e4 | 1925 | |
581d708e MC |
1926 | vfree(tx_ring->buffer_info); |
1927 | tx_ring->buffer_info = NULL; | |
1da177e4 | 1928 | |
581d708e | 1929 | pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma); |
1da177e4 | 1930 | |
581d708e MC |
1931 | tx_ring->desc = NULL; |
1932 | } | |
1933 | ||
1934 | /** | |
1935 | * e1000_free_all_tx_resources - Free Tx Resources for All Queues | |
1936 | * @adapter: board private structure | |
1937 | * | |
1938 | * Free all transmit software resources | |
1939 | **/ | |
1940 | ||
1941 | void | |
1942 | e1000_free_all_tx_resources(struct e1000_adapter *adapter) | |
1943 | { | |
1944 | int i; | |
1945 | ||
f56799ea | 1946 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 1947 | e1000_free_tx_resources(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
1948 | } |
1949 | ||
e619d523 | 1950 | static void |
1da177e4 LT |
1951 | e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter, |
1952 | struct e1000_buffer *buffer_info) | |
1953 | { | |
96838a40 | 1954 | if (buffer_info->dma) { |
2648345f MC |
1955 | pci_unmap_page(adapter->pdev, |
1956 | buffer_info->dma, | |
1957 | buffer_info->length, | |
1958 | PCI_DMA_TODEVICE); | |
1da177e4 | 1959 | } |
8241e35e | 1960 | if (buffer_info->skb) |
1da177e4 | 1961 | dev_kfree_skb_any(buffer_info->skb); |
8241e35e | 1962 | memset(buffer_info, 0, sizeof(struct e1000_buffer)); |
1da177e4 LT |
1963 | } |
1964 | ||
1965 | /** | |
1966 | * e1000_clean_tx_ring - Free Tx Buffers | |
1967 | * @adapter: board private structure | |
581d708e | 1968 | * @tx_ring: ring to be cleaned |
1da177e4 LT |
1969 | **/ |
1970 | ||
1971 | static void | |
581d708e MC |
1972 | e1000_clean_tx_ring(struct e1000_adapter *adapter, |
1973 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 1974 | { |
1da177e4 LT |
1975 | struct e1000_buffer *buffer_info; |
1976 | unsigned long size; | |
1977 | unsigned int i; | |
1978 | ||
1979 | /* Free all the Tx ring sk_buffs */ | |
1980 | ||
96838a40 | 1981 | for (i = 0; i < tx_ring->count; i++) { |
1da177e4 LT |
1982 | buffer_info = &tx_ring->buffer_info[i]; |
1983 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); | |
1984 | } | |
1985 | ||
1986 | size = sizeof(struct e1000_buffer) * tx_ring->count; | |
1987 | memset(tx_ring->buffer_info, 0, size); | |
1988 | ||
1989 | /* Zero out the descriptor ring */ | |
1990 | ||
1991 | memset(tx_ring->desc, 0, tx_ring->size); | |
1992 | ||
1993 | tx_ring->next_to_use = 0; | |
1994 | tx_ring->next_to_clean = 0; | |
fd803241 | 1995 | tx_ring->last_tx_tso = 0; |
1da177e4 | 1996 | |
581d708e MC |
1997 | writel(0, adapter->hw.hw_addr + tx_ring->tdh); |
1998 | writel(0, adapter->hw.hw_addr + tx_ring->tdt); | |
1999 | } | |
2000 | ||
2001 | /** | |
2002 | * e1000_clean_all_tx_rings - Free Tx Buffers for all queues | |
2003 | * @adapter: board private structure | |
2004 | **/ | |
2005 | ||
2006 | static void | |
2007 | e1000_clean_all_tx_rings(struct e1000_adapter *adapter) | |
2008 | { | |
2009 | int i; | |
2010 | ||
f56799ea | 2011 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 2012 | e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
2013 | } |
2014 | ||
2015 | /** | |
2016 | * e1000_free_rx_resources - Free Rx Resources | |
2017 | * @adapter: board private structure | |
581d708e | 2018 | * @rx_ring: ring to clean the resources from |
1da177e4 LT |
2019 | * |
2020 | * Free all receive software resources | |
2021 | **/ | |
2022 | ||
3ad2cc67 | 2023 | static void |
581d708e MC |
2024 | e1000_free_rx_resources(struct e1000_adapter *adapter, |
2025 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 2026 | { |
1da177e4 LT |
2027 | struct pci_dev *pdev = adapter->pdev; |
2028 | ||
581d708e | 2029 | e1000_clean_rx_ring(adapter, rx_ring); |
1da177e4 LT |
2030 | |
2031 | vfree(rx_ring->buffer_info); | |
2032 | rx_ring->buffer_info = NULL; | |
2d7edb92 MC |
2033 | kfree(rx_ring->ps_page); |
2034 | rx_ring->ps_page = NULL; | |
2035 | kfree(rx_ring->ps_page_dma); | |
2036 | rx_ring->ps_page_dma = NULL; | |
1da177e4 LT |
2037 | |
2038 | pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma); | |
2039 | ||
2040 | rx_ring->desc = NULL; | |
2041 | } | |
2042 | ||
2043 | /** | |
581d708e | 2044 | * e1000_free_all_rx_resources - Free Rx Resources for All Queues |
1da177e4 | 2045 | * @adapter: board private structure |
581d708e MC |
2046 | * |
2047 | * Free all receive software resources | |
2048 | **/ | |
2049 | ||
2050 | void | |
2051 | e1000_free_all_rx_resources(struct e1000_adapter *adapter) | |
2052 | { | |
2053 | int i; | |
2054 | ||
f56799ea | 2055 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e MC |
2056 | e1000_free_rx_resources(adapter, &adapter->rx_ring[i]); |
2057 | } | |
2058 | ||
2059 | /** | |
2060 | * e1000_clean_rx_ring - Free Rx Buffers per Queue | |
2061 | * @adapter: board private structure | |
2062 | * @rx_ring: ring to free buffers from | |
1da177e4 LT |
2063 | **/ |
2064 | ||
2065 | static void | |
581d708e MC |
2066 | e1000_clean_rx_ring(struct e1000_adapter *adapter, |
2067 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 2068 | { |
1da177e4 | 2069 | struct e1000_buffer *buffer_info; |
2d7edb92 MC |
2070 | struct e1000_ps_page *ps_page; |
2071 | struct e1000_ps_page_dma *ps_page_dma; | |
1da177e4 LT |
2072 | struct pci_dev *pdev = adapter->pdev; |
2073 | unsigned long size; | |
2d7edb92 | 2074 | unsigned int i, j; |
1da177e4 LT |
2075 | |
2076 | /* Free all the Rx ring sk_buffs */ | |
96838a40 | 2077 | for (i = 0; i < rx_ring->count; i++) { |
1da177e4 | 2078 | buffer_info = &rx_ring->buffer_info[i]; |
96838a40 | 2079 | if (buffer_info->skb) { |
1da177e4 LT |
2080 | pci_unmap_single(pdev, |
2081 | buffer_info->dma, | |
2082 | buffer_info->length, | |
2083 | PCI_DMA_FROMDEVICE); | |
2084 | ||
2085 | dev_kfree_skb(buffer_info->skb); | |
2086 | buffer_info->skb = NULL; | |
997f5cbd JK |
2087 | } |
2088 | ps_page = &rx_ring->ps_page[i]; | |
2089 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
2090 | for (j = 0; j < adapter->rx_ps_pages; j++) { | |
2091 | if (!ps_page->ps_page[j]) break; | |
2092 | pci_unmap_page(pdev, | |
2093 | ps_page_dma->ps_page_dma[j], | |
2094 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
2095 | ps_page_dma->ps_page_dma[j] = 0; | |
2096 | put_page(ps_page->ps_page[j]); | |
2097 | ps_page->ps_page[j] = NULL; | |
1da177e4 LT |
2098 | } |
2099 | } | |
2100 | ||
2101 | size = sizeof(struct e1000_buffer) * rx_ring->count; | |
2102 | memset(rx_ring->buffer_info, 0, size); | |
2d7edb92 MC |
2103 | size = sizeof(struct e1000_ps_page) * rx_ring->count; |
2104 | memset(rx_ring->ps_page, 0, size); | |
2105 | size = sizeof(struct e1000_ps_page_dma) * rx_ring->count; | |
2106 | memset(rx_ring->ps_page_dma, 0, size); | |
1da177e4 LT |
2107 | |
2108 | /* Zero out the descriptor ring */ | |
2109 | ||
2110 | memset(rx_ring->desc, 0, rx_ring->size); | |
2111 | ||
2112 | rx_ring->next_to_clean = 0; | |
2113 | rx_ring->next_to_use = 0; | |
2114 | ||
581d708e MC |
2115 | writel(0, adapter->hw.hw_addr + rx_ring->rdh); |
2116 | writel(0, adapter->hw.hw_addr + rx_ring->rdt); | |
2117 | } | |
2118 | ||
2119 | /** | |
2120 | * e1000_clean_all_rx_rings - Free Rx Buffers for all queues | |
2121 | * @adapter: board private structure | |
2122 | **/ | |
2123 | ||
2124 | static void | |
2125 | e1000_clean_all_rx_rings(struct e1000_adapter *adapter) | |
2126 | { | |
2127 | int i; | |
2128 | ||
f56799ea | 2129 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e | 2130 | e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]); |
1da177e4 LT |
2131 | } |
2132 | ||
2133 | /* The 82542 2.0 (revision 2) needs to have the receive unit in reset | |
2134 | * and memory write and invalidate disabled for certain operations | |
2135 | */ | |
2136 | static void | |
2137 | e1000_enter_82542_rst(struct e1000_adapter *adapter) | |
2138 | { | |
2139 | struct net_device *netdev = adapter->netdev; | |
2140 | uint32_t rctl; | |
2141 | ||
2142 | e1000_pci_clear_mwi(&adapter->hw); | |
2143 | ||
2144 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
2145 | rctl |= E1000_RCTL_RST; | |
2146 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2147 | E1000_WRITE_FLUSH(&adapter->hw); | |
2148 | mdelay(5); | |
2149 | ||
96838a40 | 2150 | if (netif_running(netdev)) |
581d708e | 2151 | e1000_clean_all_rx_rings(adapter); |
1da177e4 LT |
2152 | } |
2153 | ||
2154 | static void | |
2155 | e1000_leave_82542_rst(struct e1000_adapter *adapter) | |
2156 | { | |
2157 | struct net_device *netdev = adapter->netdev; | |
2158 | uint32_t rctl; | |
2159 | ||
2160 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
2161 | rctl &= ~E1000_RCTL_RST; | |
2162 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2163 | E1000_WRITE_FLUSH(&adapter->hw); | |
2164 | mdelay(5); | |
2165 | ||
96838a40 | 2166 | if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE) |
1da177e4 LT |
2167 | e1000_pci_set_mwi(&adapter->hw); |
2168 | ||
96838a40 | 2169 | if (netif_running(netdev)) { |
72d64a43 JK |
2170 | /* No need to loop, because 82542 supports only 1 queue */ |
2171 | struct e1000_rx_ring *ring = &adapter->rx_ring[0]; | |
7c4d3367 | 2172 | e1000_configure_rx(adapter); |
72d64a43 | 2173 | adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring)); |
1da177e4 LT |
2174 | } |
2175 | } | |
2176 | ||
2177 | /** | |
2178 | * e1000_set_mac - Change the Ethernet Address of the NIC | |
2179 | * @netdev: network interface device structure | |
2180 | * @p: pointer to an address structure | |
2181 | * | |
2182 | * Returns 0 on success, negative on failure | |
2183 | **/ | |
2184 | ||
2185 | static int | |
2186 | e1000_set_mac(struct net_device *netdev, void *p) | |
2187 | { | |
60490fe0 | 2188 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2189 | struct sockaddr *addr = p; |
2190 | ||
96838a40 | 2191 | if (!is_valid_ether_addr(addr->sa_data)) |
1da177e4 LT |
2192 | return -EADDRNOTAVAIL; |
2193 | ||
2194 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2195 | ||
96838a40 | 2196 | if (adapter->hw.mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2197 | e1000_enter_82542_rst(adapter); |
2198 | ||
2199 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
2200 | memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); | |
2201 | ||
2202 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2203 | ||
868d5309 MC |
2204 | /* With 82571 controllers, LAA may be overwritten (with the default) |
2205 | * due to controller reset from the other port. */ | |
2206 | if (adapter->hw.mac_type == e1000_82571) { | |
2207 | /* activate the work around */ | |
2208 | adapter->hw.laa_is_present = 1; | |
2209 | ||
96838a40 JB |
2210 | /* Hold a copy of the LAA in RAR[14] This is done so that |
2211 | * between the time RAR[0] gets clobbered and the time it | |
2212 | * gets fixed (in e1000_watchdog), the actual LAA is in one | |
868d5309 | 2213 | * of the RARs and no incoming packets directed to this port |
96838a40 | 2214 | * are dropped. Eventaully the LAA will be in RAR[0] and |
868d5309 | 2215 | * RAR[14] */ |
96838a40 | 2216 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, |
868d5309 MC |
2217 | E1000_RAR_ENTRIES - 1); |
2218 | } | |
2219 | ||
96838a40 | 2220 | if (adapter->hw.mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2221 | e1000_leave_82542_rst(adapter); |
2222 | ||
2223 | return 0; | |
2224 | } | |
2225 | ||
2226 | /** | |
2227 | * e1000_set_multi - Multicast and Promiscuous mode set | |
2228 | * @netdev: network interface device structure | |
2229 | * | |
2230 | * The set_multi entry point is called whenever the multicast address | |
2231 | * list or the network interface flags are updated. This routine is | |
2232 | * responsible for configuring the hardware for proper multicast, | |
2233 | * promiscuous mode, and all-multi behavior. | |
2234 | **/ | |
2235 | ||
2236 | static void | |
2237 | e1000_set_multi(struct net_device *netdev) | |
2238 | { | |
60490fe0 | 2239 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2240 | struct e1000_hw *hw = &adapter->hw; |
2241 | struct dev_mc_list *mc_ptr; | |
2242 | uint32_t rctl; | |
2243 | uint32_t hash_value; | |
868d5309 | 2244 | int i, rar_entries = E1000_RAR_ENTRIES; |
cd94dd0b AK |
2245 | int mta_reg_count = (hw->mac_type == e1000_ich8lan) ? |
2246 | E1000_NUM_MTA_REGISTERS_ICH8LAN : | |
2247 | E1000_NUM_MTA_REGISTERS; | |
2248 | ||
2249 | if (adapter->hw.mac_type == e1000_ich8lan) | |
2250 | rar_entries = E1000_RAR_ENTRIES_ICH8LAN; | |
1da177e4 | 2251 | |
868d5309 MC |
2252 | /* reserve RAR[14] for LAA over-write work-around */ |
2253 | if (adapter->hw.mac_type == e1000_82571) | |
2254 | rar_entries--; | |
1da177e4 | 2255 | |
2648345f MC |
2256 | /* Check for Promiscuous and All Multicast modes */ |
2257 | ||
1da177e4 LT |
2258 | rctl = E1000_READ_REG(hw, RCTL); |
2259 | ||
96838a40 | 2260 | if (netdev->flags & IFF_PROMISC) { |
1da177e4 | 2261 | rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); |
96838a40 | 2262 | } else if (netdev->flags & IFF_ALLMULTI) { |
1da177e4 LT |
2263 | rctl |= E1000_RCTL_MPE; |
2264 | rctl &= ~E1000_RCTL_UPE; | |
2265 | } else { | |
2266 | rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); | |
2267 | } | |
2268 | ||
2269 | E1000_WRITE_REG(hw, RCTL, rctl); | |
2270 | ||
2271 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2272 | ||
96838a40 | 2273 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2274 | e1000_enter_82542_rst(adapter); |
2275 | ||
2276 | /* load the first 14 multicast address into the exact filters 1-14 | |
2277 | * RAR 0 is used for the station MAC adddress | |
2278 | * if there are not 14 addresses, go ahead and clear the filters | |
868d5309 | 2279 | * -- with 82571 controllers only 0-13 entries are filled here |
1da177e4 LT |
2280 | */ |
2281 | mc_ptr = netdev->mc_list; | |
2282 | ||
96838a40 | 2283 | for (i = 1; i < rar_entries; i++) { |
868d5309 | 2284 | if (mc_ptr) { |
1da177e4 LT |
2285 | e1000_rar_set(hw, mc_ptr->dmi_addr, i); |
2286 | mc_ptr = mc_ptr->next; | |
2287 | } else { | |
2288 | E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0); | |
4ca213a6 | 2289 | E1000_WRITE_FLUSH(hw); |
1da177e4 | 2290 | E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0); |
4ca213a6 | 2291 | E1000_WRITE_FLUSH(hw); |
1da177e4 LT |
2292 | } |
2293 | } | |
2294 | ||
2295 | /* clear the old settings from the multicast hash table */ | |
2296 | ||
cd94dd0b | 2297 | for (i = 0; i < mta_reg_count; i++) { |
1da177e4 | 2298 | E1000_WRITE_REG_ARRAY(hw, MTA, i, 0); |
4ca213a6 AK |
2299 | E1000_WRITE_FLUSH(hw); |
2300 | } | |
1da177e4 LT |
2301 | |
2302 | /* load any remaining addresses into the hash table */ | |
2303 | ||
96838a40 | 2304 | for (; mc_ptr; mc_ptr = mc_ptr->next) { |
1da177e4 LT |
2305 | hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr); |
2306 | e1000_mta_set(hw, hash_value); | |
2307 | } | |
2308 | ||
96838a40 | 2309 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 | 2310 | e1000_leave_82542_rst(adapter); |
1da177e4 LT |
2311 | } |
2312 | ||
2313 | /* Need to wait a few seconds after link up to get diagnostic information from | |
2314 | * the phy */ | |
2315 | ||
2316 | static void | |
2317 | e1000_update_phy_info(unsigned long data) | |
2318 | { | |
2319 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2320 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
2321 | } | |
2322 | ||
2323 | /** | |
2324 | * e1000_82547_tx_fifo_stall - Timer Call-back | |
2325 | * @data: pointer to adapter cast into an unsigned long | |
2326 | **/ | |
2327 | ||
2328 | static void | |
2329 | e1000_82547_tx_fifo_stall(unsigned long data) | |
2330 | { | |
2331 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2332 | struct net_device *netdev = adapter->netdev; | |
2333 | uint32_t tctl; | |
2334 | ||
96838a40 JB |
2335 | if (atomic_read(&adapter->tx_fifo_stall)) { |
2336 | if ((E1000_READ_REG(&adapter->hw, TDT) == | |
1da177e4 LT |
2337 | E1000_READ_REG(&adapter->hw, TDH)) && |
2338 | (E1000_READ_REG(&adapter->hw, TDFT) == | |
2339 | E1000_READ_REG(&adapter->hw, TDFH)) && | |
2340 | (E1000_READ_REG(&adapter->hw, TDFTS) == | |
2341 | E1000_READ_REG(&adapter->hw, TDFHS))) { | |
2342 | tctl = E1000_READ_REG(&adapter->hw, TCTL); | |
2343 | E1000_WRITE_REG(&adapter->hw, TCTL, | |
2344 | tctl & ~E1000_TCTL_EN); | |
2345 | E1000_WRITE_REG(&adapter->hw, TDFT, | |
2346 | adapter->tx_head_addr); | |
2347 | E1000_WRITE_REG(&adapter->hw, TDFH, | |
2348 | adapter->tx_head_addr); | |
2349 | E1000_WRITE_REG(&adapter->hw, TDFTS, | |
2350 | adapter->tx_head_addr); | |
2351 | E1000_WRITE_REG(&adapter->hw, TDFHS, | |
2352 | adapter->tx_head_addr); | |
2353 | E1000_WRITE_REG(&adapter->hw, TCTL, tctl); | |
2354 | E1000_WRITE_FLUSH(&adapter->hw); | |
2355 | ||
2356 | adapter->tx_fifo_head = 0; | |
2357 | atomic_set(&adapter->tx_fifo_stall, 0); | |
2358 | netif_wake_queue(netdev); | |
2359 | } else { | |
2360 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); | |
2361 | } | |
2362 | } | |
2363 | } | |
2364 | ||
2365 | /** | |
2366 | * e1000_watchdog - Timer Call-back | |
2367 | * @data: pointer to adapter cast into an unsigned long | |
2368 | **/ | |
2369 | static void | |
2370 | e1000_watchdog(unsigned long data) | |
2371 | { | |
2372 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
1da177e4 | 2373 | struct net_device *netdev = adapter->netdev; |
545c67c0 | 2374 | struct e1000_tx_ring *txdr = adapter->tx_ring; |
7e6c9861 | 2375 | uint32_t link, tctl; |
cd94dd0b AK |
2376 | int32_t ret_val; |
2377 | ||
2378 | ret_val = e1000_check_for_link(&adapter->hw); | |
2379 | if ((ret_val == E1000_ERR_PHY) && | |
2380 | (adapter->hw.phy_type == e1000_phy_igp_3) && | |
2381 | (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { | |
2382 | /* See e1000_kumeran_lock_loss_workaround() */ | |
2383 | DPRINTK(LINK, INFO, | |
2384 | "Gigabit has been disabled, downgrading speed\n"); | |
2385 | } | |
2d7edb92 MC |
2386 | if (adapter->hw.mac_type == e1000_82573) { |
2387 | e1000_enable_tx_pkt_filtering(&adapter->hw); | |
96838a40 | 2388 | if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id) |
2d7edb92 | 2389 | e1000_update_mng_vlan(adapter); |
96838a40 | 2390 | } |
1da177e4 | 2391 | |
96838a40 | 2392 | if ((adapter->hw.media_type == e1000_media_type_internal_serdes) && |
1da177e4 LT |
2393 | !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE)) |
2394 | link = !adapter->hw.serdes_link_down; | |
2395 | else | |
2396 | link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU; | |
2397 | ||
96838a40 JB |
2398 | if (link) { |
2399 | if (!netif_carrier_ok(netdev)) { | |
fe7fe28e | 2400 | boolean_t txb2b = 1; |
1da177e4 LT |
2401 | e1000_get_speed_and_duplex(&adapter->hw, |
2402 | &adapter->link_speed, | |
2403 | &adapter->link_duplex); | |
2404 | ||
2405 | DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n", | |
2406 | adapter->link_speed, | |
2407 | adapter->link_duplex == FULL_DUPLEX ? | |
2408 | "Full Duplex" : "Half Duplex"); | |
2409 | ||
7e6c9861 JK |
2410 | /* tweak tx_queue_len according to speed/duplex |
2411 | * and adjust the timeout factor */ | |
66a2b0a3 JK |
2412 | netdev->tx_queue_len = adapter->tx_queue_len; |
2413 | adapter->tx_timeout_factor = 1; | |
7e6c9861 JK |
2414 | switch (adapter->link_speed) { |
2415 | case SPEED_10: | |
fe7fe28e | 2416 | txb2b = 0; |
7e6c9861 JK |
2417 | netdev->tx_queue_len = 10; |
2418 | adapter->tx_timeout_factor = 8; | |
2419 | break; | |
2420 | case SPEED_100: | |
fe7fe28e | 2421 | txb2b = 0; |
7e6c9861 JK |
2422 | netdev->tx_queue_len = 100; |
2423 | /* maybe add some timeout factor ? */ | |
2424 | break; | |
2425 | } | |
2426 | ||
fe7fe28e | 2427 | if ((adapter->hw.mac_type == e1000_82571 || |
7e6c9861 | 2428 | adapter->hw.mac_type == e1000_82572) && |
fe7fe28e | 2429 | txb2b == 0) { |
7e6c9861 JK |
2430 | #define SPEED_MODE_BIT (1 << 21) |
2431 | uint32_t tarc0; | |
2432 | tarc0 = E1000_READ_REG(&adapter->hw, TARC0); | |
2433 | tarc0 &= ~SPEED_MODE_BIT; | |
2434 | E1000_WRITE_REG(&adapter->hw, TARC0, tarc0); | |
2435 | } | |
2436 | ||
2437 | #ifdef NETIF_F_TSO | |
2438 | /* disable TSO for pcie and 10/100 speeds, to avoid | |
2439 | * some hardware issues */ | |
2440 | if (!adapter->tso_force && | |
2441 | adapter->hw.bus_type == e1000_bus_type_pci_express){ | |
66a2b0a3 JK |
2442 | switch (adapter->link_speed) { |
2443 | case SPEED_10: | |
66a2b0a3 | 2444 | case SPEED_100: |
7e6c9861 JK |
2445 | DPRINTK(PROBE,INFO, |
2446 | "10/100 speed: disabling TSO\n"); | |
2447 | netdev->features &= ~NETIF_F_TSO; | |
2448 | break; | |
2449 | case SPEED_1000: | |
2450 | netdev->features |= NETIF_F_TSO; | |
2451 | break; | |
2452 | default: | |
2453 | /* oops */ | |
66a2b0a3 JK |
2454 | break; |
2455 | } | |
2456 | } | |
7e6c9861 JK |
2457 | #endif |
2458 | ||
2459 | /* enable transmits in the hardware, need to do this | |
2460 | * after setting TARC0 */ | |
2461 | tctl = E1000_READ_REG(&adapter->hw, TCTL); | |
2462 | tctl |= E1000_TCTL_EN; | |
2463 | E1000_WRITE_REG(&adapter->hw, TCTL, tctl); | |
66a2b0a3 | 2464 | |
1da177e4 LT |
2465 | netif_carrier_on(netdev); |
2466 | netif_wake_queue(netdev); | |
2467 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
2468 | adapter->smartspeed = 0; | |
2469 | } | |
2470 | } else { | |
96838a40 | 2471 | if (netif_carrier_ok(netdev)) { |
1da177e4 LT |
2472 | adapter->link_speed = 0; |
2473 | adapter->link_duplex = 0; | |
2474 | DPRINTK(LINK, INFO, "NIC Link is Down\n"); | |
2475 | netif_carrier_off(netdev); | |
2476 | netif_stop_queue(netdev); | |
2477 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
87041639 JK |
2478 | |
2479 | /* 80003ES2LAN workaround-- | |
2480 | * For packet buffer work-around on link down event; | |
2481 | * disable receives in the ISR and | |
2482 | * reset device here in the watchdog | |
2483 | */ | |
8fc897b0 | 2484 | if (adapter->hw.mac_type == e1000_80003es2lan) |
87041639 JK |
2485 | /* reset device */ |
2486 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
2487 | } |
2488 | ||
2489 | e1000_smartspeed(adapter); | |
2490 | } | |
2491 | ||
2492 | e1000_update_stats(adapter); | |
2493 | ||
2494 | adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; | |
2495 | adapter->tpt_old = adapter->stats.tpt; | |
2496 | adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old; | |
2497 | adapter->colc_old = adapter->stats.colc; | |
2498 | ||
2499 | adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old; | |
2500 | adapter->gorcl_old = adapter->stats.gorcl; | |
2501 | adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old; | |
2502 | adapter->gotcl_old = adapter->stats.gotcl; | |
2503 | ||
2504 | e1000_update_adaptive(&adapter->hw); | |
2505 | ||
f56799ea | 2506 | if (!netif_carrier_ok(netdev)) { |
581d708e | 2507 | if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) { |
1da177e4 LT |
2508 | /* We've lost link, so the controller stops DMA, |
2509 | * but we've got queued Tx work that's never going | |
2510 | * to get done, so reset controller to flush Tx. | |
2511 | * (Do the reset outside of interrupt context). */ | |
87041639 JK |
2512 | adapter->tx_timeout_count++; |
2513 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
2514 | } |
2515 | } | |
2516 | ||
2517 | /* Dynamic mode for Interrupt Throttle Rate (ITR) */ | |
96838a40 | 2518 | if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) { |
1da177e4 LT |
2519 | /* Symmetric Tx/Rx gets a reduced ITR=2000; Total |
2520 | * asymmetrical Tx or Rx gets ITR=8000; everyone | |
2521 | * else is between 2000-8000. */ | |
2522 | uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000; | |
96838a40 | 2523 | uint32_t dif = (adapter->gotcl > adapter->gorcl ? |
1da177e4 LT |
2524 | adapter->gotcl - adapter->gorcl : |
2525 | adapter->gorcl - adapter->gotcl) / 10000; | |
2526 | uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; | |
2527 | E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256)); | |
2528 | } | |
2529 | ||
2530 | /* Cause software interrupt to ensure rx ring is cleaned */ | |
2531 | E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0); | |
2532 | ||
2648345f | 2533 | /* Force detection of hung controller every watchdog period */ |
1da177e4 LT |
2534 | adapter->detect_tx_hung = TRUE; |
2535 | ||
96838a40 | 2536 | /* With 82571 controllers, LAA may be overwritten due to controller |
868d5309 MC |
2537 | * reset from the other port. Set the appropriate LAA in RAR[0] */ |
2538 | if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present) | |
2539 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2540 | ||
1da177e4 LT |
2541 | /* Reset the timer */ |
2542 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | |
2543 | } | |
2544 | ||
2545 | #define E1000_TX_FLAGS_CSUM 0x00000001 | |
2546 | #define E1000_TX_FLAGS_VLAN 0x00000002 | |
2547 | #define E1000_TX_FLAGS_TSO 0x00000004 | |
2d7edb92 | 2548 | #define E1000_TX_FLAGS_IPV4 0x00000008 |
1da177e4 LT |
2549 | #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 |
2550 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 | |
2551 | ||
e619d523 | 2552 | static int |
581d708e MC |
2553 | e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2554 | struct sk_buff *skb) | |
1da177e4 LT |
2555 | { |
2556 | #ifdef NETIF_F_TSO | |
2557 | struct e1000_context_desc *context_desc; | |
545c67c0 | 2558 | struct e1000_buffer *buffer_info; |
1da177e4 LT |
2559 | unsigned int i; |
2560 | uint32_t cmd_length = 0; | |
2d7edb92 | 2561 | uint16_t ipcse = 0, tucse, mss; |
1da177e4 LT |
2562 | uint8_t ipcss, ipcso, tucss, tucso, hdr_len; |
2563 | int err; | |
2564 | ||
89114afd | 2565 | if (skb_is_gso(skb)) { |
1da177e4 LT |
2566 | if (skb_header_cloned(skb)) { |
2567 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); | |
2568 | if (err) | |
2569 | return err; | |
2570 | } | |
2571 | ||
2572 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | |
7967168c | 2573 | mss = skb_shinfo(skb)->gso_size; |
60828236 | 2574 | if (skb->protocol == htons(ETH_P_IP)) { |
2d7edb92 MC |
2575 | skb->nh.iph->tot_len = 0; |
2576 | skb->nh.iph->check = 0; | |
2577 | skb->h.th->check = | |
2578 | ~csum_tcpudp_magic(skb->nh.iph->saddr, | |
2579 | skb->nh.iph->daddr, | |
2580 | 0, | |
2581 | IPPROTO_TCP, | |
2582 | 0); | |
2583 | cmd_length = E1000_TXD_CMD_IP; | |
2584 | ipcse = skb->h.raw - skb->data - 1; | |
2585 | #ifdef NETIF_F_TSO_IPV6 | |
e15fdd03 | 2586 | } else if (skb->protocol == htons(ETH_P_IPV6)) { |
2d7edb92 MC |
2587 | skb->nh.ipv6h->payload_len = 0; |
2588 | skb->h.th->check = | |
2589 | ~csum_ipv6_magic(&skb->nh.ipv6h->saddr, | |
2590 | &skb->nh.ipv6h->daddr, | |
2591 | 0, | |
2592 | IPPROTO_TCP, | |
2593 | 0); | |
2594 | ipcse = 0; | |
2595 | #endif | |
2596 | } | |
1da177e4 LT |
2597 | ipcss = skb->nh.raw - skb->data; |
2598 | ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data; | |
1da177e4 LT |
2599 | tucss = skb->h.raw - skb->data; |
2600 | tucso = (void *)&(skb->h.th->check) - (void *)skb->data; | |
2601 | tucse = 0; | |
2602 | ||
2603 | cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | | |
2d7edb92 | 2604 | E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); |
1da177e4 | 2605 | |
581d708e MC |
2606 | i = tx_ring->next_to_use; |
2607 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); | |
545c67c0 | 2608 | buffer_info = &tx_ring->buffer_info[i]; |
1da177e4 LT |
2609 | |
2610 | context_desc->lower_setup.ip_fields.ipcss = ipcss; | |
2611 | context_desc->lower_setup.ip_fields.ipcso = ipcso; | |
2612 | context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); | |
2613 | context_desc->upper_setup.tcp_fields.tucss = tucss; | |
2614 | context_desc->upper_setup.tcp_fields.tucso = tucso; | |
2615 | context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); | |
2616 | context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); | |
2617 | context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; | |
2618 | context_desc->cmd_and_length = cpu_to_le32(cmd_length); | |
2619 | ||
545c67c0 JK |
2620 | buffer_info->time_stamp = jiffies; |
2621 | ||
581d708e MC |
2622 | if (++i == tx_ring->count) i = 0; |
2623 | tx_ring->next_to_use = i; | |
1da177e4 | 2624 | |
8241e35e | 2625 | return TRUE; |
1da177e4 LT |
2626 | } |
2627 | #endif | |
2628 | ||
8241e35e | 2629 | return FALSE; |
1da177e4 LT |
2630 | } |
2631 | ||
e619d523 | 2632 | static boolean_t |
581d708e MC |
2633 | e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2634 | struct sk_buff *skb) | |
1da177e4 LT |
2635 | { |
2636 | struct e1000_context_desc *context_desc; | |
545c67c0 | 2637 | struct e1000_buffer *buffer_info; |
1da177e4 LT |
2638 | unsigned int i; |
2639 | uint8_t css; | |
2640 | ||
84fa7933 | 2641 | if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { |
1da177e4 LT |
2642 | css = skb->h.raw - skb->data; |
2643 | ||
581d708e | 2644 | i = tx_ring->next_to_use; |
545c67c0 | 2645 | buffer_info = &tx_ring->buffer_info[i]; |
581d708e | 2646 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); |
1da177e4 LT |
2647 | |
2648 | context_desc->upper_setup.tcp_fields.tucss = css; | |
2649 | context_desc->upper_setup.tcp_fields.tucso = css + skb->csum; | |
2650 | context_desc->upper_setup.tcp_fields.tucse = 0; | |
2651 | context_desc->tcp_seg_setup.data = 0; | |
2652 | context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT); | |
2653 | ||
545c67c0 JK |
2654 | buffer_info->time_stamp = jiffies; |
2655 | ||
581d708e MC |
2656 | if (unlikely(++i == tx_ring->count)) i = 0; |
2657 | tx_ring->next_to_use = i; | |
1da177e4 LT |
2658 | |
2659 | return TRUE; | |
2660 | } | |
2661 | ||
2662 | return FALSE; | |
2663 | } | |
2664 | ||
2665 | #define E1000_MAX_TXD_PWR 12 | |
2666 | #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR) | |
2667 | ||
e619d523 | 2668 | static int |
581d708e MC |
2669 | e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2670 | struct sk_buff *skb, unsigned int first, unsigned int max_per_txd, | |
2671 | unsigned int nr_frags, unsigned int mss) | |
1da177e4 | 2672 | { |
1da177e4 LT |
2673 | struct e1000_buffer *buffer_info; |
2674 | unsigned int len = skb->len; | |
2675 | unsigned int offset = 0, size, count = 0, i; | |
2676 | unsigned int f; | |
2677 | len -= skb->data_len; | |
2678 | ||
2679 | i = tx_ring->next_to_use; | |
2680 | ||
96838a40 | 2681 | while (len) { |
1da177e4 LT |
2682 | buffer_info = &tx_ring->buffer_info[i]; |
2683 | size = min(len, max_per_txd); | |
2684 | #ifdef NETIF_F_TSO | |
fd803241 JK |
2685 | /* Workaround for Controller erratum -- |
2686 | * descriptor for non-tso packet in a linear SKB that follows a | |
2687 | * tso gets written back prematurely before the data is fully | |
0f15a8fa | 2688 | * DMA'd to the controller */ |
fd803241 | 2689 | if (!skb->data_len && tx_ring->last_tx_tso && |
89114afd | 2690 | !skb_is_gso(skb)) { |
fd803241 JK |
2691 | tx_ring->last_tx_tso = 0; |
2692 | size -= 4; | |
2693 | } | |
2694 | ||
1da177e4 LT |
2695 | /* Workaround for premature desc write-backs |
2696 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 2697 | if (unlikely(mss && !nr_frags && size == len && size > 8)) |
1da177e4 LT |
2698 | size -= 4; |
2699 | #endif | |
97338bde MC |
2700 | /* work-around for errata 10 and it applies |
2701 | * to all controllers in PCI-X mode | |
2702 | * The fix is to make sure that the first descriptor of a | |
2703 | * packet is smaller than 2048 - 16 - 16 (or 2016) bytes | |
2704 | */ | |
96838a40 | 2705 | if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && |
97338bde MC |
2706 | (size > 2015) && count == 0)) |
2707 | size = 2015; | |
96838a40 | 2708 | |
1da177e4 LT |
2709 | /* Workaround for potential 82544 hang in PCI-X. Avoid |
2710 | * terminating buffers within evenly-aligned dwords. */ | |
96838a40 | 2711 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
2712 | !((unsigned long)(skb->data + offset + size - 1) & 4) && |
2713 | size > 4)) | |
2714 | size -= 4; | |
2715 | ||
2716 | buffer_info->length = size; | |
2717 | buffer_info->dma = | |
2718 | pci_map_single(adapter->pdev, | |
2719 | skb->data + offset, | |
2720 | size, | |
2721 | PCI_DMA_TODEVICE); | |
2722 | buffer_info->time_stamp = jiffies; | |
2723 | ||
2724 | len -= size; | |
2725 | offset += size; | |
2726 | count++; | |
96838a40 | 2727 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2728 | } |
2729 | ||
96838a40 | 2730 | for (f = 0; f < nr_frags; f++) { |
1da177e4 LT |
2731 | struct skb_frag_struct *frag; |
2732 | ||
2733 | frag = &skb_shinfo(skb)->frags[f]; | |
2734 | len = frag->size; | |
2735 | offset = frag->page_offset; | |
2736 | ||
96838a40 | 2737 | while (len) { |
1da177e4 LT |
2738 | buffer_info = &tx_ring->buffer_info[i]; |
2739 | size = min(len, max_per_txd); | |
2740 | #ifdef NETIF_F_TSO | |
2741 | /* Workaround for premature desc write-backs | |
2742 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 2743 | if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8)) |
1da177e4 LT |
2744 | size -= 4; |
2745 | #endif | |
2746 | /* Workaround for potential 82544 hang in PCI-X. | |
2747 | * Avoid terminating buffers within evenly-aligned | |
2748 | * dwords. */ | |
96838a40 | 2749 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
2750 | !((unsigned long)(frag->page+offset+size-1) & 4) && |
2751 | size > 4)) | |
2752 | size -= 4; | |
2753 | ||
2754 | buffer_info->length = size; | |
2755 | buffer_info->dma = | |
2756 | pci_map_page(adapter->pdev, | |
2757 | frag->page, | |
2758 | offset, | |
2759 | size, | |
2760 | PCI_DMA_TODEVICE); | |
2761 | buffer_info->time_stamp = jiffies; | |
2762 | ||
2763 | len -= size; | |
2764 | offset += size; | |
2765 | count++; | |
96838a40 | 2766 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2767 | } |
2768 | } | |
2769 | ||
2770 | i = (i == 0) ? tx_ring->count - 1 : i - 1; | |
2771 | tx_ring->buffer_info[i].skb = skb; | |
2772 | tx_ring->buffer_info[first].next_to_watch = i; | |
2773 | ||
2774 | return count; | |
2775 | } | |
2776 | ||
e619d523 | 2777 | static void |
581d708e MC |
2778 | e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2779 | int tx_flags, int count) | |
1da177e4 | 2780 | { |
1da177e4 LT |
2781 | struct e1000_tx_desc *tx_desc = NULL; |
2782 | struct e1000_buffer *buffer_info; | |
2783 | uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; | |
2784 | unsigned int i; | |
2785 | ||
96838a40 | 2786 | if (likely(tx_flags & E1000_TX_FLAGS_TSO)) { |
1da177e4 LT |
2787 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | |
2788 | E1000_TXD_CMD_TSE; | |
2d7edb92 MC |
2789 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; |
2790 | ||
96838a40 | 2791 | if (likely(tx_flags & E1000_TX_FLAGS_IPV4)) |
2d7edb92 | 2792 | txd_upper |= E1000_TXD_POPTS_IXSM << 8; |
1da177e4 LT |
2793 | } |
2794 | ||
96838a40 | 2795 | if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) { |
1da177e4 LT |
2796 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; |
2797 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; | |
2798 | } | |
2799 | ||
96838a40 | 2800 | if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) { |
1da177e4 LT |
2801 | txd_lower |= E1000_TXD_CMD_VLE; |
2802 | txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); | |
2803 | } | |
2804 | ||
2805 | i = tx_ring->next_to_use; | |
2806 | ||
96838a40 | 2807 | while (count--) { |
1da177e4 LT |
2808 | buffer_info = &tx_ring->buffer_info[i]; |
2809 | tx_desc = E1000_TX_DESC(*tx_ring, i); | |
2810 | tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
2811 | tx_desc->lower.data = | |
2812 | cpu_to_le32(txd_lower | buffer_info->length); | |
2813 | tx_desc->upper.data = cpu_to_le32(txd_upper); | |
96838a40 | 2814 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2815 | } |
2816 | ||
2817 | tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); | |
2818 | ||
2819 | /* Force memory writes to complete before letting h/w | |
2820 | * know there are new descriptors to fetch. (Only | |
2821 | * applicable for weak-ordered memory model archs, | |
2822 | * such as IA-64). */ | |
2823 | wmb(); | |
2824 | ||
2825 | tx_ring->next_to_use = i; | |
581d708e | 2826 | writel(i, adapter->hw.hw_addr + tx_ring->tdt); |
1da177e4 LT |
2827 | } |
2828 | ||
2829 | /** | |
2830 | * 82547 workaround to avoid controller hang in half-duplex environment. | |
2831 | * The workaround is to avoid queuing a large packet that would span | |
2832 | * the internal Tx FIFO ring boundary by notifying the stack to resend | |
2833 | * the packet at a later time. This gives the Tx FIFO an opportunity to | |
2834 | * flush all packets. When that occurs, we reset the Tx FIFO pointers | |
2835 | * to the beginning of the Tx FIFO. | |
2836 | **/ | |
2837 | ||
2838 | #define E1000_FIFO_HDR 0x10 | |
2839 | #define E1000_82547_PAD_LEN 0x3E0 | |
2840 | ||
e619d523 | 2841 | static int |
1da177e4 LT |
2842 | e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb) |
2843 | { | |
2844 | uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; | |
2845 | uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR; | |
2846 | ||
2847 | E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR); | |
2848 | ||
96838a40 | 2849 | if (adapter->link_duplex != HALF_DUPLEX) |
1da177e4 LT |
2850 | goto no_fifo_stall_required; |
2851 | ||
96838a40 | 2852 | if (atomic_read(&adapter->tx_fifo_stall)) |
1da177e4 LT |
2853 | return 1; |
2854 | ||
96838a40 | 2855 | if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) { |
1da177e4 LT |
2856 | atomic_set(&adapter->tx_fifo_stall, 1); |
2857 | return 1; | |
2858 | } | |
2859 | ||
2860 | no_fifo_stall_required: | |
2861 | adapter->tx_fifo_head += skb_fifo_len; | |
96838a40 | 2862 | if (adapter->tx_fifo_head >= adapter->tx_fifo_size) |
1da177e4 LT |
2863 | adapter->tx_fifo_head -= adapter->tx_fifo_size; |
2864 | return 0; | |
2865 | } | |
2866 | ||
2d7edb92 | 2867 | #define MINIMUM_DHCP_PACKET_SIZE 282 |
e619d523 | 2868 | static int |
2d7edb92 MC |
2869 | e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb) |
2870 | { | |
2871 | struct e1000_hw *hw = &adapter->hw; | |
2872 | uint16_t length, offset; | |
96838a40 JB |
2873 | if (vlan_tx_tag_present(skb)) { |
2874 | if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && | |
2d7edb92 MC |
2875 | ( adapter->hw.mng_cookie.status & |
2876 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) ) | |
2877 | return 0; | |
2878 | } | |
20a44028 | 2879 | if (skb->len > MINIMUM_DHCP_PACKET_SIZE) { |
2d7edb92 | 2880 | struct ethhdr *eth = (struct ethhdr *) skb->data; |
96838a40 JB |
2881 | if ((htons(ETH_P_IP) == eth->h_proto)) { |
2882 | const struct iphdr *ip = | |
2d7edb92 | 2883 | (struct iphdr *)((uint8_t *)skb->data+14); |
96838a40 JB |
2884 | if (IPPROTO_UDP == ip->protocol) { |
2885 | struct udphdr *udp = | |
2886 | (struct udphdr *)((uint8_t *)ip + | |
2d7edb92 | 2887 | (ip->ihl << 2)); |
96838a40 | 2888 | if (ntohs(udp->dest) == 67) { |
2d7edb92 MC |
2889 | offset = (uint8_t *)udp + 8 - skb->data; |
2890 | length = skb->len - offset; | |
2891 | ||
2892 | return e1000_mng_write_dhcp_info(hw, | |
96838a40 | 2893 | (uint8_t *)udp + 8, |
2d7edb92 MC |
2894 | length); |
2895 | } | |
2896 | } | |
2897 | } | |
2898 | } | |
2899 | return 0; | |
2900 | } | |
2901 | ||
1da177e4 LT |
2902 | #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) |
2903 | static int | |
2904 | e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |
2905 | { | |
60490fe0 | 2906 | struct e1000_adapter *adapter = netdev_priv(netdev); |
581d708e | 2907 | struct e1000_tx_ring *tx_ring; |
1da177e4 LT |
2908 | unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD; |
2909 | unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; | |
2910 | unsigned int tx_flags = 0; | |
2911 | unsigned int len = skb->len; | |
2912 | unsigned long flags; | |
2913 | unsigned int nr_frags = 0; | |
2914 | unsigned int mss = 0; | |
2915 | int count = 0; | |
76c224bc | 2916 | int tso; |
1da177e4 LT |
2917 | unsigned int f; |
2918 | len -= skb->data_len; | |
2919 | ||
581d708e | 2920 | tx_ring = adapter->tx_ring; |
24025e4e | 2921 | |
581d708e | 2922 | if (unlikely(skb->len <= 0)) { |
1da177e4 LT |
2923 | dev_kfree_skb_any(skb); |
2924 | return NETDEV_TX_OK; | |
2925 | } | |
2926 | ||
2927 | #ifdef NETIF_F_TSO | |
7967168c | 2928 | mss = skb_shinfo(skb)->gso_size; |
76c224bc | 2929 | /* The controller does a simple calculation to |
1da177e4 LT |
2930 | * make sure there is enough room in the FIFO before |
2931 | * initiating the DMA for each buffer. The calc is: | |
2932 | * 4 = ceil(buffer len/mss). To make sure we don't | |
2933 | * overrun the FIFO, adjust the max buffer len if mss | |
2934 | * drops. */ | |
96838a40 | 2935 | if (mss) { |
9a3056da | 2936 | uint8_t hdr_len; |
1da177e4 LT |
2937 | max_per_txd = min(mss << 2, max_per_txd); |
2938 | max_txd_pwr = fls(max_per_txd) - 1; | |
9a3056da | 2939 | |
9f687888 | 2940 | /* TSO Workaround for 82571/2/3 Controllers -- if skb->data |
9a3056da JK |
2941 | * points to just header, pull a few bytes of payload from |
2942 | * frags into skb->data */ | |
2943 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | |
9f687888 JK |
2944 | if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) { |
2945 | switch (adapter->hw.mac_type) { | |
2946 | unsigned int pull_size; | |
2947 | case e1000_82571: | |
2948 | case e1000_82572: | |
2949 | case e1000_82573: | |
cd94dd0b | 2950 | case e1000_ich8lan: |
9f687888 JK |
2951 | pull_size = min((unsigned int)4, skb->data_len); |
2952 | if (!__pskb_pull_tail(skb, pull_size)) { | |
a5eafce2 | 2953 | DPRINTK(DRV, ERR, |
9f687888 JK |
2954 | "__pskb_pull_tail failed.\n"); |
2955 | dev_kfree_skb_any(skb); | |
749dfc70 | 2956 | return NETDEV_TX_OK; |
9f687888 JK |
2957 | } |
2958 | len = skb->len - skb->data_len; | |
2959 | break; | |
2960 | default: | |
2961 | /* do nothing */ | |
2962 | break; | |
d74bbd3b | 2963 | } |
9a3056da | 2964 | } |
1da177e4 LT |
2965 | } |
2966 | ||
9a3056da | 2967 | /* reserve a descriptor for the offload context */ |
84fa7933 | 2968 | if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) |
1da177e4 | 2969 | count++; |
2648345f | 2970 | count++; |
1da177e4 | 2971 | #else |
84fa7933 | 2972 | if (skb->ip_summed == CHECKSUM_PARTIAL) |
1da177e4 LT |
2973 | count++; |
2974 | #endif | |
fd803241 JK |
2975 | |
2976 | #ifdef NETIF_F_TSO | |
2977 | /* Controller Erratum workaround */ | |
89114afd | 2978 | if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb)) |
fd803241 JK |
2979 | count++; |
2980 | #endif | |
2981 | ||
1da177e4 LT |
2982 | count += TXD_USE_COUNT(len, max_txd_pwr); |
2983 | ||
96838a40 | 2984 | if (adapter->pcix_82544) |
1da177e4 LT |
2985 | count++; |
2986 | ||
96838a40 | 2987 | /* work-around for errata 10 and it applies to all controllers |
97338bde MC |
2988 | * in PCI-X mode, so add one more descriptor to the count |
2989 | */ | |
96838a40 | 2990 | if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && |
97338bde MC |
2991 | (len > 2015))) |
2992 | count++; | |
2993 | ||
1da177e4 | 2994 | nr_frags = skb_shinfo(skb)->nr_frags; |
96838a40 | 2995 | for (f = 0; f < nr_frags; f++) |
1da177e4 LT |
2996 | count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size, |
2997 | max_txd_pwr); | |
96838a40 | 2998 | if (adapter->pcix_82544) |
1da177e4 LT |
2999 | count += nr_frags; |
3000 | ||
0f15a8fa JK |
3001 | |
3002 | if (adapter->hw.tx_pkt_filtering && | |
3003 | (adapter->hw.mac_type == e1000_82573)) | |
2d7edb92 MC |
3004 | e1000_transfer_dhcp_info(adapter, skb); |
3005 | ||
581d708e MC |
3006 | local_irq_save(flags); |
3007 | if (!spin_trylock(&tx_ring->tx_lock)) { | |
3008 | /* Collision - tell upper layer to requeue */ | |
3009 | local_irq_restore(flags); | |
3010 | return NETDEV_TX_LOCKED; | |
3011 | } | |
1da177e4 LT |
3012 | |
3013 | /* need: count + 2 desc gap to keep tail from touching | |
3014 | * head, otherwise try next time */ | |
581d708e | 3015 | if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) { |
1da177e4 | 3016 | netif_stop_queue(netdev); |
581d708e | 3017 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3018 | return NETDEV_TX_BUSY; |
3019 | } | |
3020 | ||
96838a40 JB |
3021 | if (unlikely(adapter->hw.mac_type == e1000_82547)) { |
3022 | if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) { | |
1da177e4 LT |
3023 | netif_stop_queue(netdev); |
3024 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies); | |
581d708e | 3025 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3026 | return NETDEV_TX_BUSY; |
3027 | } | |
3028 | } | |
3029 | ||
96838a40 | 3030 | if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) { |
1da177e4 LT |
3031 | tx_flags |= E1000_TX_FLAGS_VLAN; |
3032 | tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); | |
3033 | } | |
3034 | ||
581d708e | 3035 | first = tx_ring->next_to_use; |
96838a40 | 3036 | |
581d708e | 3037 | tso = e1000_tso(adapter, tx_ring, skb); |
1da177e4 LT |
3038 | if (tso < 0) { |
3039 | dev_kfree_skb_any(skb); | |
581d708e | 3040 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3041 | return NETDEV_TX_OK; |
3042 | } | |
3043 | ||
fd803241 JK |
3044 | if (likely(tso)) { |
3045 | tx_ring->last_tx_tso = 1; | |
1da177e4 | 3046 | tx_flags |= E1000_TX_FLAGS_TSO; |
fd803241 | 3047 | } else if (likely(e1000_tx_csum(adapter, tx_ring, skb))) |
1da177e4 LT |
3048 | tx_flags |= E1000_TX_FLAGS_CSUM; |
3049 | ||
2d7edb92 | 3050 | /* Old method was to assume IPv4 packet by default if TSO was enabled. |
868d5309 | 3051 | * 82571 hardware supports TSO capabilities for IPv6 as well... |
2d7edb92 | 3052 | * no longer assume, we must. */ |
60828236 | 3053 | if (likely(skb->protocol == htons(ETH_P_IP))) |
2d7edb92 MC |
3054 | tx_flags |= E1000_TX_FLAGS_IPV4; |
3055 | ||
581d708e MC |
3056 | e1000_tx_queue(adapter, tx_ring, tx_flags, |
3057 | e1000_tx_map(adapter, tx_ring, skb, first, | |
3058 | max_per_txd, nr_frags, mss)); | |
1da177e4 LT |
3059 | |
3060 | netdev->trans_start = jiffies; | |
3061 | ||
3062 | /* Make sure there is space in the ring for the next send. */ | |
581d708e | 3063 | if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2)) |
1da177e4 LT |
3064 | netif_stop_queue(netdev); |
3065 | ||
581d708e | 3066 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3067 | return NETDEV_TX_OK; |
3068 | } | |
3069 | ||
3070 | /** | |
3071 | * e1000_tx_timeout - Respond to a Tx Hang | |
3072 | * @netdev: network interface device structure | |
3073 | **/ | |
3074 | ||
3075 | static void | |
3076 | e1000_tx_timeout(struct net_device *netdev) | |
3077 | { | |
60490fe0 | 3078 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
3079 | |
3080 | /* Do the reset outside of interrupt context */ | |
87041639 JK |
3081 | adapter->tx_timeout_count++; |
3082 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
3083 | } |
3084 | ||
3085 | static void | |
87041639 | 3086 | e1000_reset_task(struct net_device *netdev) |
1da177e4 | 3087 | { |
60490fe0 | 3088 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3089 | |
2db10a08 | 3090 | e1000_reinit_locked(adapter); |
1da177e4 LT |
3091 | } |
3092 | ||
3093 | /** | |
3094 | * e1000_get_stats - Get System Network Statistics | |
3095 | * @netdev: network interface device structure | |
3096 | * | |
3097 | * Returns the address of the device statistics structure. | |
3098 | * The statistics are actually updated from the timer callback. | |
3099 | **/ | |
3100 | ||
3101 | static struct net_device_stats * | |
3102 | e1000_get_stats(struct net_device *netdev) | |
3103 | { | |
60490fe0 | 3104 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3105 | |
6b7660cd | 3106 | /* only return the current stats */ |
1da177e4 LT |
3107 | return &adapter->net_stats; |
3108 | } | |
3109 | ||
3110 | /** | |
3111 | * e1000_change_mtu - Change the Maximum Transfer Unit | |
3112 | * @netdev: network interface device structure | |
3113 | * @new_mtu: new value for maximum frame size | |
3114 | * | |
3115 | * Returns 0 on success, negative on failure | |
3116 | **/ | |
3117 | ||
3118 | static int | |
3119 | e1000_change_mtu(struct net_device *netdev, int new_mtu) | |
3120 | { | |
60490fe0 | 3121 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3122 | int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; |
85b22eb6 | 3123 | uint16_t eeprom_data = 0; |
1da177e4 | 3124 | |
96838a40 JB |
3125 | if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) || |
3126 | (max_frame > MAX_JUMBO_FRAME_SIZE)) { | |
3127 | DPRINTK(PROBE, ERR, "Invalid MTU setting\n"); | |
1da177e4 | 3128 | return -EINVAL; |
2d7edb92 | 3129 | } |
1da177e4 | 3130 | |
997f5cbd JK |
3131 | /* Adapter-specific max frame size limits. */ |
3132 | switch (adapter->hw.mac_type) { | |
9e2feace | 3133 | case e1000_undefined ... e1000_82542_rev2_1: |
cd94dd0b | 3134 | case e1000_ich8lan: |
997f5cbd JK |
3135 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { |
3136 | DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n"); | |
2d7edb92 | 3137 | return -EINVAL; |
2d7edb92 | 3138 | } |
997f5cbd | 3139 | break; |
85b22eb6 JK |
3140 | case e1000_82573: |
3141 | /* only enable jumbo frames if ASPM is disabled completely | |
3142 | * this means both bits must be zero in 0x1A bits 3:2 */ | |
3143 | e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1, | |
3144 | &eeprom_data); | |
3145 | if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) { | |
3146 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { | |
3147 | DPRINTK(PROBE, ERR, | |
3148 | "Jumbo Frames not supported.\n"); | |
3149 | return -EINVAL; | |
3150 | } | |
3151 | break; | |
3152 | } | |
3153 | /* fall through to get support */ | |
997f5cbd JK |
3154 | case e1000_82571: |
3155 | case e1000_82572: | |
87041639 | 3156 | case e1000_80003es2lan: |
997f5cbd JK |
3157 | #define MAX_STD_JUMBO_FRAME_SIZE 9234 |
3158 | if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) { | |
3159 | DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n"); | |
3160 | return -EINVAL; | |
3161 | } | |
3162 | break; | |
3163 | default: | |
3164 | /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */ | |
3165 | break; | |
1da177e4 LT |
3166 | } |
3167 | ||
87f5032e | 3168 | /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN |
9e2feace AK |
3169 | * means we reserve 2 more, this pushes us to allocate from the next |
3170 | * larger slab size | |
3171 | * i.e. RXBUFFER_2048 --> size-4096 slab */ | |
3172 | ||
3173 | if (max_frame <= E1000_RXBUFFER_256) | |
3174 | adapter->rx_buffer_len = E1000_RXBUFFER_256; | |
3175 | else if (max_frame <= E1000_RXBUFFER_512) | |
3176 | adapter->rx_buffer_len = E1000_RXBUFFER_512; | |
3177 | else if (max_frame <= E1000_RXBUFFER_1024) | |
3178 | adapter->rx_buffer_len = E1000_RXBUFFER_1024; | |
3179 | else if (max_frame <= E1000_RXBUFFER_2048) | |
3180 | adapter->rx_buffer_len = E1000_RXBUFFER_2048; | |
3181 | else if (max_frame <= E1000_RXBUFFER_4096) | |
3182 | adapter->rx_buffer_len = E1000_RXBUFFER_4096; | |
3183 | else if (max_frame <= E1000_RXBUFFER_8192) | |
3184 | adapter->rx_buffer_len = E1000_RXBUFFER_8192; | |
3185 | else if (max_frame <= E1000_RXBUFFER_16384) | |
3186 | adapter->rx_buffer_len = E1000_RXBUFFER_16384; | |
3187 | ||
3188 | /* adjust allocation if LPE protects us, and we aren't using SBP */ | |
9e2feace AK |
3189 | if (!adapter->hw.tbi_compatibility_on && |
3190 | ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) || | |
3191 | (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))) | |
3192 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; | |
997f5cbd | 3193 | |
2d7edb92 MC |
3194 | netdev->mtu = new_mtu; |
3195 | ||
2db10a08 AK |
3196 | if (netif_running(netdev)) |
3197 | e1000_reinit_locked(adapter); | |
1da177e4 | 3198 | |
1da177e4 LT |
3199 | adapter->hw.max_frame_size = max_frame; |
3200 | ||
3201 | return 0; | |
3202 | } | |
3203 | ||
3204 | /** | |
3205 | * e1000_update_stats - Update the board statistics counters | |
3206 | * @adapter: board private structure | |
3207 | **/ | |
3208 | ||
3209 | void | |
3210 | e1000_update_stats(struct e1000_adapter *adapter) | |
3211 | { | |
3212 | struct e1000_hw *hw = &adapter->hw; | |
282f33c9 | 3213 | struct pci_dev *pdev = adapter->pdev; |
1da177e4 LT |
3214 | unsigned long flags; |
3215 | uint16_t phy_tmp; | |
3216 | ||
3217 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF | |
3218 | ||
282f33c9 LV |
3219 | /* |
3220 | * Prevent stats update while adapter is being reset, or if the pci | |
3221 | * connection is down. | |
3222 | */ | |
9026729b | 3223 | if (adapter->link_speed == 0) |
282f33c9 LV |
3224 | return; |
3225 | if (pdev->error_state && pdev->error_state != pci_channel_io_normal) | |
9026729b AK |
3226 | return; |
3227 | ||
1da177e4 LT |
3228 | spin_lock_irqsave(&adapter->stats_lock, flags); |
3229 | ||
3230 | /* these counters are modified from e1000_adjust_tbi_stats, | |
3231 | * called from the interrupt context, so they must only | |
3232 | * be written while holding adapter->stats_lock | |
3233 | */ | |
3234 | ||
3235 | adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS); | |
3236 | adapter->stats.gprc += E1000_READ_REG(hw, GPRC); | |
3237 | adapter->stats.gorcl += E1000_READ_REG(hw, GORCL); | |
3238 | adapter->stats.gorch += E1000_READ_REG(hw, GORCH); | |
3239 | adapter->stats.bprc += E1000_READ_REG(hw, BPRC); | |
3240 | adapter->stats.mprc += E1000_READ_REG(hw, MPRC); | |
3241 | adapter->stats.roc += E1000_READ_REG(hw, ROC); | |
cd94dd0b AK |
3242 | |
3243 | if (adapter->hw.mac_type != e1000_ich8lan) { | |
1da177e4 LT |
3244 | adapter->stats.prc64 += E1000_READ_REG(hw, PRC64); |
3245 | adapter->stats.prc127 += E1000_READ_REG(hw, PRC127); | |
3246 | adapter->stats.prc255 += E1000_READ_REG(hw, PRC255); | |
3247 | adapter->stats.prc511 += E1000_READ_REG(hw, PRC511); | |
3248 | adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023); | |
3249 | adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522); | |
cd94dd0b | 3250 | } |
1da177e4 LT |
3251 | |
3252 | adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS); | |
3253 | adapter->stats.mpc += E1000_READ_REG(hw, MPC); | |
3254 | adapter->stats.scc += E1000_READ_REG(hw, SCC); | |
3255 | adapter->stats.ecol += E1000_READ_REG(hw, ECOL); | |
3256 | adapter->stats.mcc += E1000_READ_REG(hw, MCC); | |
3257 | adapter->stats.latecol += E1000_READ_REG(hw, LATECOL); | |
3258 | adapter->stats.dc += E1000_READ_REG(hw, DC); | |
3259 | adapter->stats.sec += E1000_READ_REG(hw, SEC); | |
3260 | adapter->stats.rlec += E1000_READ_REG(hw, RLEC); | |
3261 | adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC); | |
3262 | adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC); | |
3263 | adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC); | |
3264 | adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC); | |
3265 | adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC); | |
3266 | adapter->stats.gptc += E1000_READ_REG(hw, GPTC); | |
3267 | adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL); | |
3268 | adapter->stats.gotch += E1000_READ_REG(hw, GOTCH); | |
3269 | adapter->stats.rnbc += E1000_READ_REG(hw, RNBC); | |
3270 | adapter->stats.ruc += E1000_READ_REG(hw, RUC); | |
3271 | adapter->stats.rfc += E1000_READ_REG(hw, RFC); | |
3272 | adapter->stats.rjc += E1000_READ_REG(hw, RJC); | |
3273 | adapter->stats.torl += E1000_READ_REG(hw, TORL); | |
3274 | adapter->stats.torh += E1000_READ_REG(hw, TORH); | |
3275 | adapter->stats.totl += E1000_READ_REG(hw, TOTL); | |
3276 | adapter->stats.toth += E1000_READ_REG(hw, TOTH); | |
3277 | adapter->stats.tpr += E1000_READ_REG(hw, TPR); | |
cd94dd0b AK |
3278 | |
3279 | if (adapter->hw.mac_type != e1000_ich8lan) { | |
1da177e4 LT |
3280 | adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64); |
3281 | adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127); | |
3282 | adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255); | |
3283 | adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511); | |
3284 | adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023); | |
3285 | adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522); | |
cd94dd0b AK |
3286 | } |
3287 | ||
1da177e4 LT |
3288 | adapter->stats.mptc += E1000_READ_REG(hw, MPTC); |
3289 | adapter->stats.bptc += E1000_READ_REG(hw, BPTC); | |
3290 | ||
3291 | /* used for adaptive IFS */ | |
3292 | ||
3293 | hw->tx_packet_delta = E1000_READ_REG(hw, TPT); | |
3294 | adapter->stats.tpt += hw->tx_packet_delta; | |
3295 | hw->collision_delta = E1000_READ_REG(hw, COLC); | |
3296 | adapter->stats.colc += hw->collision_delta; | |
3297 | ||
96838a40 | 3298 | if (hw->mac_type >= e1000_82543) { |
1da177e4 LT |
3299 | adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC); |
3300 | adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC); | |
3301 | adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS); | |
3302 | adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR); | |
3303 | adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC); | |
3304 | adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC); | |
3305 | } | |
96838a40 | 3306 | if (hw->mac_type > e1000_82547_rev_2) { |
2d7edb92 MC |
3307 | adapter->stats.iac += E1000_READ_REG(hw, IAC); |
3308 | adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC); | |
cd94dd0b AK |
3309 | |
3310 | if (adapter->hw.mac_type != e1000_ich8lan) { | |
2d7edb92 MC |
3311 | adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC); |
3312 | adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC); | |
3313 | adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC); | |
3314 | adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC); | |
3315 | adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC); | |
3316 | adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC); | |
3317 | adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC); | |
cd94dd0b | 3318 | } |
2d7edb92 | 3319 | } |
1da177e4 LT |
3320 | |
3321 | /* Fill out the OS statistics structure */ | |
3322 | ||
3323 | adapter->net_stats.rx_packets = adapter->stats.gprc; | |
3324 | adapter->net_stats.tx_packets = adapter->stats.gptc; | |
3325 | adapter->net_stats.rx_bytes = adapter->stats.gorcl; | |
3326 | adapter->net_stats.tx_bytes = adapter->stats.gotcl; | |
3327 | adapter->net_stats.multicast = adapter->stats.mprc; | |
3328 | adapter->net_stats.collisions = adapter->stats.colc; | |
3329 | ||
3330 | /* Rx Errors */ | |
3331 | ||
87041639 JK |
3332 | /* RLEC on some newer hardware can be incorrect so build |
3333 | * our own version based on RUC and ROC */ | |
1da177e4 LT |
3334 | adapter->net_stats.rx_errors = adapter->stats.rxerrc + |
3335 | adapter->stats.crcerrs + adapter->stats.algnerrc + | |
87041639 JK |
3336 | adapter->stats.ruc + adapter->stats.roc + |
3337 | adapter->stats.cexterr; | |
49559854 MW |
3338 | adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc; |
3339 | adapter->net_stats.rx_length_errors = adapter->stats.rlerrc; | |
1da177e4 LT |
3340 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; |
3341 | adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc; | |
1da177e4 LT |
3342 | adapter->net_stats.rx_missed_errors = adapter->stats.mpc; |
3343 | ||
3344 | /* Tx Errors */ | |
49559854 MW |
3345 | adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol; |
3346 | adapter->net_stats.tx_errors = adapter->stats.txerrc; | |
1da177e4 LT |
3347 | adapter->net_stats.tx_aborted_errors = adapter->stats.ecol; |
3348 | adapter->net_stats.tx_window_errors = adapter->stats.latecol; | |
3349 | adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs; | |
3350 | ||
3351 | /* Tx Dropped needs to be maintained elsewhere */ | |
3352 | ||
3353 | /* Phy Stats */ | |
3354 | ||
96838a40 JB |
3355 | if (hw->media_type == e1000_media_type_copper) { |
3356 | if ((adapter->link_speed == SPEED_1000) && | |
1da177e4 LT |
3357 | (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) { |
3358 | phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK; | |
3359 | adapter->phy_stats.idle_errors += phy_tmp; | |
3360 | } | |
3361 | ||
96838a40 | 3362 | if ((hw->mac_type <= e1000_82546) && |
1da177e4 LT |
3363 | (hw->phy_type == e1000_phy_m88) && |
3364 | !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp)) | |
3365 | adapter->phy_stats.receive_errors += phy_tmp; | |
3366 | } | |
3367 | ||
3368 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
3369 | } | |
3370 | ||
3371 | /** | |
3372 | * e1000_intr - Interrupt Handler | |
3373 | * @irq: interrupt number | |
3374 | * @data: pointer to a network interface device structure | |
3375 | * @pt_regs: CPU registers structure | |
3376 | **/ | |
3377 | ||
3378 | static irqreturn_t | |
3379 | e1000_intr(int irq, void *data, struct pt_regs *regs) | |
3380 | { | |
3381 | struct net_device *netdev = data; | |
60490fe0 | 3382 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3383 | struct e1000_hw *hw = &adapter->hw; |
87041639 | 3384 | uint32_t rctl, icr = E1000_READ_REG(hw, ICR); |
1e613fd9 | 3385 | #ifndef CONFIG_E1000_NAPI |
581d708e | 3386 | int i; |
1e613fd9 JK |
3387 | #else |
3388 | /* Interrupt Auto-Mask...upon reading ICR, | |
3389 | * interrupts are masked. No need for the | |
3390 | * IMC write, but it does mean we should | |
3391 | * account for it ASAP. */ | |
3392 | if (likely(hw->mac_type >= e1000_82571)) | |
3393 | atomic_inc(&adapter->irq_sem); | |
be2b28ed | 3394 | #endif |
1da177e4 | 3395 | |
1e613fd9 JK |
3396 | if (unlikely(!icr)) { |
3397 | #ifdef CONFIG_E1000_NAPI | |
3398 | if (hw->mac_type >= e1000_82571) | |
3399 | e1000_irq_enable(adapter); | |
3400 | #endif | |
1da177e4 | 3401 | return IRQ_NONE; /* Not our interrupt */ |
1e613fd9 | 3402 | } |
1da177e4 | 3403 | |
96838a40 | 3404 | if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { |
1da177e4 | 3405 | hw->get_link_status = 1; |
87041639 JK |
3406 | /* 80003ES2LAN workaround-- |
3407 | * For packet buffer work-around on link down event; | |
3408 | * disable receives here in the ISR and | |
3409 | * reset adapter in watchdog | |
3410 | */ | |
3411 | if (netif_carrier_ok(netdev) && | |
3412 | (adapter->hw.mac_type == e1000_80003es2lan)) { | |
3413 | /* disable receives */ | |
3414 | rctl = E1000_READ_REG(hw, RCTL); | |
3415 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
3416 | } | |
1da177e4 LT |
3417 | mod_timer(&adapter->watchdog_timer, jiffies); |
3418 | } | |
3419 | ||
3420 | #ifdef CONFIG_E1000_NAPI | |
1e613fd9 JK |
3421 | if (unlikely(hw->mac_type < e1000_82571)) { |
3422 | atomic_inc(&adapter->irq_sem); | |
3423 | E1000_WRITE_REG(hw, IMC, ~0); | |
3424 | E1000_WRITE_FLUSH(hw); | |
3425 | } | |
d3d9e484 AK |
3426 | if (likely(netif_rx_schedule_prep(netdev))) |
3427 | __netif_rx_schedule(netdev); | |
581d708e MC |
3428 | else |
3429 | e1000_irq_enable(adapter); | |
c1605eb3 | 3430 | #else |
1da177e4 | 3431 | /* Writing IMC and IMS is needed for 82547. |
96838a40 JB |
3432 | * Due to Hub Link bus being occupied, an interrupt |
3433 | * de-assertion message is not able to be sent. | |
3434 | * When an interrupt assertion message is generated later, | |
3435 | * two messages are re-ordered and sent out. | |
3436 | * That causes APIC to think 82547 is in de-assertion | |
3437 | * state, while 82547 is in assertion state, resulting | |
3438 | * in dead lock. Writing IMC forces 82547 into | |
3439 | * de-assertion state. | |
3440 | */ | |
3441 | if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) { | |
1da177e4 | 3442 | atomic_inc(&adapter->irq_sem); |
2648345f | 3443 | E1000_WRITE_REG(hw, IMC, ~0); |
1da177e4 LT |
3444 | } |
3445 | ||
96838a40 JB |
3446 | for (i = 0; i < E1000_MAX_INTR; i++) |
3447 | if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & | |
581d708e | 3448 | !e1000_clean_tx_irq(adapter, adapter->tx_ring))) |
1da177e4 LT |
3449 | break; |
3450 | ||
96838a40 | 3451 | if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) |
1da177e4 | 3452 | e1000_irq_enable(adapter); |
581d708e | 3453 | |
c1605eb3 | 3454 | #endif |
1da177e4 LT |
3455 | |
3456 | return IRQ_HANDLED; | |
3457 | } | |
3458 | ||
3459 | #ifdef CONFIG_E1000_NAPI | |
3460 | /** | |
3461 | * e1000_clean - NAPI Rx polling callback | |
3462 | * @adapter: board private structure | |
3463 | **/ | |
3464 | ||
3465 | static int | |
581d708e | 3466 | e1000_clean(struct net_device *poll_dev, int *budget) |
1da177e4 | 3467 | { |
581d708e MC |
3468 | struct e1000_adapter *adapter; |
3469 | int work_to_do = min(*budget, poll_dev->quota); | |
d3d9e484 | 3470 | int tx_cleaned = 0, work_done = 0; |
581d708e MC |
3471 | |
3472 | /* Must NOT use netdev_priv macro here. */ | |
3473 | adapter = poll_dev->priv; | |
3474 | ||
3475 | /* Keep link state information with original netdev */ | |
d3d9e484 | 3476 | if (!netif_carrier_ok(poll_dev)) |
581d708e | 3477 | goto quit_polling; |
2648345f | 3478 | |
d3d9e484 AK |
3479 | /* e1000_clean is called per-cpu. This lock protects |
3480 | * tx_ring[0] from being cleaned by multiple cpus | |
3481 | * simultaneously. A failure obtaining the lock means | |
3482 | * tx_ring[0] is currently being cleaned anyway. */ | |
3483 | if (spin_trylock(&adapter->tx_queue_lock)) { | |
3484 | tx_cleaned = e1000_clean_tx_irq(adapter, | |
3485 | &adapter->tx_ring[0]); | |
3486 | spin_unlock(&adapter->tx_queue_lock); | |
581d708e MC |
3487 | } |
3488 | ||
d3d9e484 | 3489 | adapter->clean_rx(adapter, &adapter->rx_ring[0], |
581d708e | 3490 | &work_done, work_to_do); |
1da177e4 LT |
3491 | |
3492 | *budget -= work_done; | |
581d708e | 3493 | poll_dev->quota -= work_done; |
96838a40 | 3494 | |
2b02893e | 3495 | /* If no Tx and not enough Rx work done, exit the polling mode */ |
96838a40 | 3496 | if ((!tx_cleaned && (work_done == 0)) || |
d3d9e484 | 3497 | !netif_running(poll_dev)) { |
581d708e MC |
3498 | quit_polling: |
3499 | netif_rx_complete(poll_dev); | |
1da177e4 LT |
3500 | e1000_irq_enable(adapter); |
3501 | return 0; | |
3502 | } | |
3503 | ||
3504 | return 1; | |
3505 | } | |
3506 | ||
3507 | #endif | |
3508 | /** | |
3509 | * e1000_clean_tx_irq - Reclaim resources after transmit completes | |
3510 | * @adapter: board private structure | |
3511 | **/ | |
3512 | ||
3513 | static boolean_t | |
581d708e MC |
3514 | e1000_clean_tx_irq(struct e1000_adapter *adapter, |
3515 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 3516 | { |
1da177e4 LT |
3517 | struct net_device *netdev = adapter->netdev; |
3518 | struct e1000_tx_desc *tx_desc, *eop_desc; | |
3519 | struct e1000_buffer *buffer_info; | |
3520 | unsigned int i, eop; | |
2a1af5d7 JK |
3521 | #ifdef CONFIG_E1000_NAPI |
3522 | unsigned int count = 0; | |
3523 | #endif | |
1da177e4 LT |
3524 | boolean_t cleaned = FALSE; |
3525 | ||
3526 | i = tx_ring->next_to_clean; | |
3527 | eop = tx_ring->buffer_info[i].next_to_watch; | |
3528 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
3529 | ||
581d708e | 3530 | while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) { |
96838a40 | 3531 | for (cleaned = FALSE; !cleaned; ) { |
1da177e4 LT |
3532 | tx_desc = E1000_TX_DESC(*tx_ring, i); |
3533 | buffer_info = &tx_ring->buffer_info[i]; | |
3534 | cleaned = (i == eop); | |
3535 | ||
fd803241 | 3536 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); |
8241e35e | 3537 | memset(tx_desc, 0, sizeof(struct e1000_tx_desc)); |
1da177e4 | 3538 | |
96838a40 | 3539 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 | 3540 | } |
581d708e | 3541 | |
7bfa4816 | 3542 | |
1da177e4 LT |
3543 | eop = tx_ring->buffer_info[i].next_to_watch; |
3544 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
2a1af5d7 JK |
3545 | #ifdef CONFIG_E1000_NAPI |
3546 | #define E1000_TX_WEIGHT 64 | |
3547 | /* weight of a sort for tx, to avoid endless transmit cleanup */ | |
3548 | if (count++ == E1000_TX_WEIGHT) break; | |
3549 | #endif | |
1da177e4 LT |
3550 | } |
3551 | ||
3552 | tx_ring->next_to_clean = i; | |
3553 | ||
77b2aad5 | 3554 | #define TX_WAKE_THRESHOLD 32 |
96838a40 | 3555 | if (unlikely(cleaned && netif_queue_stopped(netdev) && |
77b2aad5 AK |
3556 | netif_carrier_ok(netdev))) { |
3557 | spin_lock(&tx_ring->tx_lock); | |
3558 | if (netif_queue_stopped(netdev) && | |
3559 | (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) | |
3560 | netif_wake_queue(netdev); | |
3561 | spin_unlock(&tx_ring->tx_lock); | |
3562 | } | |
2648345f | 3563 | |
581d708e | 3564 | if (adapter->detect_tx_hung) { |
2648345f | 3565 | /* Detect a transmit hang in hardware, this serializes the |
1da177e4 LT |
3566 | * check with the clearing of time_stamp and movement of i */ |
3567 | adapter->detect_tx_hung = FALSE; | |
392137fa JK |
3568 | if (tx_ring->buffer_info[eop].dma && |
3569 | time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + | |
7e6c9861 | 3570 | (adapter->tx_timeout_factor * HZ)) |
70b8f1e1 | 3571 | && !(E1000_READ_REG(&adapter->hw, STATUS) & |
392137fa | 3572 | E1000_STATUS_TXOFF)) { |
70b8f1e1 MC |
3573 | |
3574 | /* detected Tx unit hang */ | |
c6963ef5 | 3575 | DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n" |
7bfa4816 | 3576 | " Tx Queue <%lu>\n" |
70b8f1e1 MC |
3577 | " TDH <%x>\n" |
3578 | " TDT <%x>\n" | |
3579 | " next_to_use <%x>\n" | |
3580 | " next_to_clean <%x>\n" | |
3581 | "buffer_info[next_to_clean]\n" | |
70b8f1e1 MC |
3582 | " time_stamp <%lx>\n" |
3583 | " next_to_watch <%x>\n" | |
3584 | " jiffies <%lx>\n" | |
3585 | " next_to_watch.status <%x>\n", | |
7bfa4816 JK |
3586 | (unsigned long)((tx_ring - adapter->tx_ring) / |
3587 | sizeof(struct e1000_tx_ring)), | |
581d708e MC |
3588 | readl(adapter->hw.hw_addr + tx_ring->tdh), |
3589 | readl(adapter->hw.hw_addr + tx_ring->tdt), | |
70b8f1e1 | 3590 | tx_ring->next_to_use, |
392137fa JK |
3591 | tx_ring->next_to_clean, |
3592 | tx_ring->buffer_info[eop].time_stamp, | |
70b8f1e1 MC |
3593 | eop, |
3594 | jiffies, | |
3595 | eop_desc->upper.fields.status); | |
1da177e4 | 3596 | netif_stop_queue(netdev); |
70b8f1e1 | 3597 | } |
1da177e4 | 3598 | } |
1da177e4 LT |
3599 | return cleaned; |
3600 | } | |
3601 | ||
3602 | /** | |
3603 | * e1000_rx_checksum - Receive Checksum Offload for 82543 | |
2d7edb92 MC |
3604 | * @adapter: board private structure |
3605 | * @status_err: receive descriptor status and error fields | |
3606 | * @csum: receive descriptor csum field | |
3607 | * @sk_buff: socket buffer with received data | |
1da177e4 LT |
3608 | **/ |
3609 | ||
e619d523 | 3610 | static void |
1da177e4 | 3611 | e1000_rx_checksum(struct e1000_adapter *adapter, |
2d7edb92 MC |
3612 | uint32_t status_err, uint32_t csum, |
3613 | struct sk_buff *skb) | |
1da177e4 | 3614 | { |
2d7edb92 MC |
3615 | uint16_t status = (uint16_t)status_err; |
3616 | uint8_t errors = (uint8_t)(status_err >> 24); | |
3617 | skb->ip_summed = CHECKSUM_NONE; | |
3618 | ||
1da177e4 | 3619 | /* 82543 or newer only */ |
96838a40 | 3620 | if (unlikely(adapter->hw.mac_type < e1000_82543)) return; |
1da177e4 | 3621 | /* Ignore Checksum bit is set */ |
96838a40 | 3622 | if (unlikely(status & E1000_RXD_STAT_IXSM)) return; |
2d7edb92 | 3623 | /* TCP/UDP checksum error bit is set */ |
96838a40 | 3624 | if (unlikely(errors & E1000_RXD_ERR_TCPE)) { |
1da177e4 | 3625 | /* let the stack verify checksum errors */ |
1da177e4 | 3626 | adapter->hw_csum_err++; |
2d7edb92 MC |
3627 | return; |
3628 | } | |
3629 | /* TCP/UDP Checksum has not been calculated */ | |
96838a40 JB |
3630 | if (adapter->hw.mac_type <= e1000_82547_rev_2) { |
3631 | if (!(status & E1000_RXD_STAT_TCPCS)) | |
2d7edb92 | 3632 | return; |
1da177e4 | 3633 | } else { |
96838a40 | 3634 | if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) |
2d7edb92 MC |
3635 | return; |
3636 | } | |
3637 | /* It must be a TCP or UDP packet with a valid checksum */ | |
3638 | if (likely(status & E1000_RXD_STAT_TCPCS)) { | |
1da177e4 LT |
3639 | /* TCP checksum is good */ |
3640 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
2d7edb92 MC |
3641 | } else if (adapter->hw.mac_type > e1000_82547_rev_2) { |
3642 | /* IP fragment with UDP payload */ | |
3643 | /* Hardware complements the payload checksum, so we undo it | |
3644 | * and then put the value in host order for further stack use. | |
3645 | */ | |
3646 | csum = ntohl(csum ^ 0xFFFF); | |
3647 | skb->csum = csum; | |
84fa7933 | 3648 | skb->ip_summed = CHECKSUM_COMPLETE; |
1da177e4 | 3649 | } |
2d7edb92 | 3650 | adapter->hw_csum_good++; |
1da177e4 LT |
3651 | } |
3652 | ||
3653 | /** | |
2d7edb92 | 3654 | * e1000_clean_rx_irq - Send received data up the network stack; legacy |
1da177e4 LT |
3655 | * @adapter: board private structure |
3656 | **/ | |
3657 | ||
3658 | static boolean_t | |
3659 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
3660 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
3661 | struct e1000_rx_ring *rx_ring, | |
3662 | int *work_done, int work_to_do) | |
1da177e4 | 3663 | #else |
581d708e MC |
3664 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
3665 | struct e1000_rx_ring *rx_ring) | |
1da177e4 LT |
3666 | #endif |
3667 | { | |
1da177e4 LT |
3668 | struct net_device *netdev = adapter->netdev; |
3669 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f JB |
3670 | struct e1000_rx_desc *rx_desc, *next_rxd; |
3671 | struct e1000_buffer *buffer_info, *next_buffer; | |
1da177e4 LT |
3672 | unsigned long flags; |
3673 | uint32_t length; | |
3674 | uint8_t last_byte; | |
3675 | unsigned int i; | |
72d64a43 | 3676 | int cleaned_count = 0; |
a1415ee6 | 3677 | boolean_t cleaned = FALSE; |
1da177e4 LT |
3678 | |
3679 | i = rx_ring->next_to_clean; | |
3680 | rx_desc = E1000_RX_DESC(*rx_ring, i); | |
b92ff8ee | 3681 | buffer_info = &rx_ring->buffer_info[i]; |
1da177e4 | 3682 | |
b92ff8ee | 3683 | while (rx_desc->status & E1000_RXD_STAT_DD) { |
24f476ee | 3684 | struct sk_buff *skb; |
a292ca6e | 3685 | u8 status; |
1da177e4 | 3686 | #ifdef CONFIG_E1000_NAPI |
96838a40 | 3687 | if (*work_done >= work_to_do) |
1da177e4 LT |
3688 | break; |
3689 | (*work_done)++; | |
3690 | #endif | |
a292ca6e | 3691 | status = rx_desc->status; |
b92ff8ee | 3692 | skb = buffer_info->skb; |
86c3d59f JB |
3693 | buffer_info->skb = NULL; |
3694 | ||
30320be8 JK |
3695 | prefetch(skb->data - NET_IP_ALIGN); |
3696 | ||
86c3d59f JB |
3697 | if (++i == rx_ring->count) i = 0; |
3698 | next_rxd = E1000_RX_DESC(*rx_ring, i); | |
30320be8 JK |
3699 | prefetch(next_rxd); |
3700 | ||
86c3d59f | 3701 | next_buffer = &rx_ring->buffer_info[i]; |
86c3d59f | 3702 | |
72d64a43 JK |
3703 | cleaned = TRUE; |
3704 | cleaned_count++; | |
a292ca6e JK |
3705 | pci_unmap_single(pdev, |
3706 | buffer_info->dma, | |
3707 | buffer_info->length, | |
1da177e4 LT |
3708 | PCI_DMA_FROMDEVICE); |
3709 | ||
1da177e4 LT |
3710 | length = le16_to_cpu(rx_desc->length); |
3711 | ||
f235a2ab AK |
3712 | /* adjust length to remove Ethernet CRC */ |
3713 | length -= 4; | |
3714 | ||
a1415ee6 JK |
3715 | if (unlikely(!(status & E1000_RXD_STAT_EOP))) { |
3716 | /* All receives must fit into a single buffer */ | |
3717 | E1000_DBG("%s: Receive packet consumed multiple" | |
3718 | " buffers\n", netdev->name); | |
864c4e45 | 3719 | /* recycle */ |
8fc897b0 | 3720 | buffer_info->skb = skb; |
1da177e4 LT |
3721 | goto next_desc; |
3722 | } | |
3723 | ||
96838a40 | 3724 | if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) { |
1da177e4 | 3725 | last_byte = *(skb->data + length - 1); |
b92ff8ee | 3726 | if (TBI_ACCEPT(&adapter->hw, status, |
1da177e4 LT |
3727 | rx_desc->errors, length, last_byte)) { |
3728 | spin_lock_irqsave(&adapter->stats_lock, flags); | |
a292ca6e JK |
3729 | e1000_tbi_adjust_stats(&adapter->hw, |
3730 | &adapter->stats, | |
1da177e4 LT |
3731 | length, skb->data); |
3732 | spin_unlock_irqrestore(&adapter->stats_lock, | |
3733 | flags); | |
3734 | length--; | |
3735 | } else { | |
9e2feace AK |
3736 | /* recycle */ |
3737 | buffer_info->skb = skb; | |
1da177e4 LT |
3738 | goto next_desc; |
3739 | } | |
1cb5821f | 3740 | } |
1da177e4 | 3741 | |
a292ca6e JK |
3742 | /* code added for copybreak, this should improve |
3743 | * performance for small packets with large amounts | |
3744 | * of reassembly being done in the stack */ | |
3745 | #define E1000_CB_LENGTH 256 | |
a1415ee6 | 3746 | if (length < E1000_CB_LENGTH) { |
a292ca6e | 3747 | struct sk_buff *new_skb = |
87f5032e | 3748 | netdev_alloc_skb(netdev, length + NET_IP_ALIGN); |
a292ca6e JK |
3749 | if (new_skb) { |
3750 | skb_reserve(new_skb, NET_IP_ALIGN); | |
a292ca6e JK |
3751 | memcpy(new_skb->data - NET_IP_ALIGN, |
3752 | skb->data - NET_IP_ALIGN, | |
3753 | length + NET_IP_ALIGN); | |
3754 | /* save the skb in buffer_info as good */ | |
3755 | buffer_info->skb = skb; | |
3756 | skb = new_skb; | |
3757 | skb_put(skb, length); | |
3758 | } | |
a1415ee6 JK |
3759 | } else |
3760 | skb_put(skb, length); | |
a292ca6e JK |
3761 | |
3762 | /* end copybreak code */ | |
1da177e4 LT |
3763 | |
3764 | /* Receive Checksum Offload */ | |
a292ca6e JK |
3765 | e1000_rx_checksum(adapter, |
3766 | (uint32_t)(status) | | |
2d7edb92 | 3767 | ((uint32_t)(rx_desc->errors) << 24), |
c3d7a3a4 | 3768 | le16_to_cpu(rx_desc->csum), skb); |
96838a40 | 3769 | |
1da177e4 LT |
3770 | skb->protocol = eth_type_trans(skb, netdev); |
3771 | #ifdef CONFIG_E1000_NAPI | |
96838a40 | 3772 | if (unlikely(adapter->vlgrp && |
a292ca6e | 3773 | (status & E1000_RXD_STAT_VP))) { |
1da177e4 | 3774 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
2d7edb92 MC |
3775 | le16_to_cpu(rx_desc->special) & |
3776 | E1000_RXD_SPC_VLAN_MASK); | |
1da177e4 LT |
3777 | } else { |
3778 | netif_receive_skb(skb); | |
3779 | } | |
3780 | #else /* CONFIG_E1000_NAPI */ | |
96838a40 | 3781 | if (unlikely(adapter->vlgrp && |
b92ff8ee | 3782 | (status & E1000_RXD_STAT_VP))) { |
1da177e4 LT |
3783 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
3784 | le16_to_cpu(rx_desc->special) & | |
3785 | E1000_RXD_SPC_VLAN_MASK); | |
3786 | } else { | |
3787 | netif_rx(skb); | |
3788 | } | |
3789 | #endif /* CONFIG_E1000_NAPI */ | |
3790 | netdev->last_rx = jiffies; | |
3791 | ||
3792 | next_desc: | |
3793 | rx_desc->status = 0; | |
1da177e4 | 3794 | |
72d64a43 JK |
3795 | /* return some buffers to hardware, one at a time is too slow */ |
3796 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
3797 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
3798 | cleaned_count = 0; | |
3799 | } | |
3800 | ||
30320be8 | 3801 | /* use prefetched values */ |
86c3d59f JB |
3802 | rx_desc = next_rxd; |
3803 | buffer_info = next_buffer; | |
1da177e4 | 3804 | } |
1da177e4 | 3805 | rx_ring->next_to_clean = i; |
72d64a43 JK |
3806 | |
3807 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
3808 | if (cleaned_count) | |
3809 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
2d7edb92 MC |
3810 | |
3811 | return cleaned; | |
3812 | } | |
3813 | ||
3814 | /** | |
3815 | * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split | |
3816 | * @adapter: board private structure | |
3817 | **/ | |
3818 | ||
3819 | static boolean_t | |
3820 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
3821 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
3822 | struct e1000_rx_ring *rx_ring, | |
3823 | int *work_done, int work_to_do) | |
2d7edb92 | 3824 | #else |
581d708e MC |
3825 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
3826 | struct e1000_rx_ring *rx_ring) | |
2d7edb92 MC |
3827 | #endif |
3828 | { | |
86c3d59f | 3829 | union e1000_rx_desc_packet_split *rx_desc, *next_rxd; |
2d7edb92 MC |
3830 | struct net_device *netdev = adapter->netdev; |
3831 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f | 3832 | struct e1000_buffer *buffer_info, *next_buffer; |
2d7edb92 MC |
3833 | struct e1000_ps_page *ps_page; |
3834 | struct e1000_ps_page_dma *ps_page_dma; | |
24f476ee | 3835 | struct sk_buff *skb; |
2d7edb92 MC |
3836 | unsigned int i, j; |
3837 | uint32_t length, staterr; | |
72d64a43 | 3838 | int cleaned_count = 0; |
2d7edb92 MC |
3839 | boolean_t cleaned = FALSE; |
3840 | ||
3841 | i = rx_ring->next_to_clean; | |
3842 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); | |
683a38f3 | 3843 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
9e2feace | 3844 | buffer_info = &rx_ring->buffer_info[i]; |
2d7edb92 | 3845 | |
96838a40 | 3846 | while (staterr & E1000_RXD_STAT_DD) { |
2d7edb92 MC |
3847 | ps_page = &rx_ring->ps_page[i]; |
3848 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
3849 | #ifdef CONFIG_E1000_NAPI | |
96838a40 | 3850 | if (unlikely(*work_done >= work_to_do)) |
2d7edb92 MC |
3851 | break; |
3852 | (*work_done)++; | |
3853 | #endif | |
86c3d59f JB |
3854 | skb = buffer_info->skb; |
3855 | ||
30320be8 JK |
3856 | /* in the packet split case this is header only */ |
3857 | prefetch(skb->data - NET_IP_ALIGN); | |
3858 | ||
86c3d59f JB |
3859 | if (++i == rx_ring->count) i = 0; |
3860 | next_rxd = E1000_RX_DESC_PS(*rx_ring, i); | |
30320be8 JK |
3861 | prefetch(next_rxd); |
3862 | ||
86c3d59f | 3863 | next_buffer = &rx_ring->buffer_info[i]; |
86c3d59f | 3864 | |
2d7edb92 | 3865 | cleaned = TRUE; |
72d64a43 | 3866 | cleaned_count++; |
2d7edb92 MC |
3867 | pci_unmap_single(pdev, buffer_info->dma, |
3868 | buffer_info->length, | |
3869 | PCI_DMA_FROMDEVICE); | |
3870 | ||
96838a40 | 3871 | if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) { |
2d7edb92 MC |
3872 | E1000_DBG("%s: Packet Split buffers didn't pick up" |
3873 | " the full packet\n", netdev->name); | |
3874 | dev_kfree_skb_irq(skb); | |
3875 | goto next_desc; | |
3876 | } | |
1da177e4 | 3877 | |
96838a40 | 3878 | if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) { |
2d7edb92 MC |
3879 | dev_kfree_skb_irq(skb); |
3880 | goto next_desc; | |
3881 | } | |
3882 | ||
3883 | length = le16_to_cpu(rx_desc->wb.middle.length0); | |
3884 | ||
96838a40 | 3885 | if (unlikely(!length)) { |
2d7edb92 MC |
3886 | E1000_DBG("%s: Last part of the packet spanning" |
3887 | " multiple descriptors\n", netdev->name); | |
3888 | dev_kfree_skb_irq(skb); | |
3889 | goto next_desc; | |
3890 | } | |
3891 | ||
3892 | /* Good Receive */ | |
3893 | skb_put(skb, length); | |
3894 | ||
dc7c6add JK |
3895 | { |
3896 | /* this looks ugly, but it seems compiler issues make it | |
3897 | more efficient than reusing j */ | |
3898 | int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); | |
3899 | ||
3900 | /* page alloc/put takes too long and effects small packet | |
3901 | * throughput, so unsplit small packets and save the alloc/put*/ | |
9e2feace | 3902 | if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) { |
dc7c6add | 3903 | u8 *vaddr; |
76c224bc | 3904 | /* there is no documentation about how to call |
dc7c6add JK |
3905 | * kmap_atomic, so we can't hold the mapping |
3906 | * very long */ | |
3907 | pci_dma_sync_single_for_cpu(pdev, | |
3908 | ps_page_dma->ps_page_dma[0], | |
3909 | PAGE_SIZE, | |
3910 | PCI_DMA_FROMDEVICE); | |
3911 | vaddr = kmap_atomic(ps_page->ps_page[0], | |
3912 | KM_SKB_DATA_SOFTIRQ); | |
3913 | memcpy(skb->tail, vaddr, l1); | |
3914 | kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); | |
3915 | pci_dma_sync_single_for_device(pdev, | |
3916 | ps_page_dma->ps_page_dma[0], | |
3917 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
f235a2ab AK |
3918 | /* remove the CRC */ |
3919 | l1 -= 4; | |
dc7c6add | 3920 | skb_put(skb, l1); |
dc7c6add JK |
3921 | goto copydone; |
3922 | } /* if */ | |
3923 | } | |
3924 | ||
96838a40 | 3925 | for (j = 0; j < adapter->rx_ps_pages; j++) { |
30320be8 | 3926 | if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j]))) |
2d7edb92 | 3927 | break; |
2d7edb92 MC |
3928 | pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j], |
3929 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
3930 | ps_page_dma->ps_page_dma[j] = 0; | |
329bfd0b JK |
3931 | skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0, |
3932 | length); | |
2d7edb92 | 3933 | ps_page->ps_page[j] = NULL; |
2d7edb92 MC |
3934 | skb->len += length; |
3935 | skb->data_len += length; | |
5d51b80f | 3936 | skb->truesize += length; |
2d7edb92 MC |
3937 | } |
3938 | ||
f235a2ab AK |
3939 | /* strip the ethernet crc, problem is we're using pages now so |
3940 | * this whole operation can get a little cpu intensive */ | |
3941 | pskb_trim(skb, skb->len - 4); | |
3942 | ||
dc7c6add | 3943 | copydone: |
2d7edb92 | 3944 | e1000_rx_checksum(adapter, staterr, |
c3d7a3a4 | 3945 | le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb); |
2d7edb92 MC |
3946 | skb->protocol = eth_type_trans(skb, netdev); |
3947 | ||
96838a40 | 3948 | if (likely(rx_desc->wb.upper.header_status & |
c3d7a3a4 | 3949 | cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))) |
e4c811c9 | 3950 | adapter->rx_hdr_split++; |
2d7edb92 | 3951 | #ifdef CONFIG_E1000_NAPI |
96838a40 | 3952 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
2d7edb92 | 3953 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
683a38f3 MC |
3954 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
3955 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
3956 | } else { |
3957 | netif_receive_skb(skb); | |
3958 | } | |
3959 | #else /* CONFIG_E1000_NAPI */ | |
96838a40 | 3960 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
2d7edb92 | 3961 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
683a38f3 MC |
3962 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
3963 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
3964 | } else { |
3965 | netif_rx(skb); | |
3966 | } | |
3967 | #endif /* CONFIG_E1000_NAPI */ | |
3968 | netdev->last_rx = jiffies; | |
3969 | ||
3970 | next_desc: | |
c3d7a3a4 | 3971 | rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); |
2d7edb92 | 3972 | buffer_info->skb = NULL; |
2d7edb92 | 3973 | |
72d64a43 JK |
3974 | /* return some buffers to hardware, one at a time is too slow */ |
3975 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
3976 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
3977 | cleaned_count = 0; | |
3978 | } | |
3979 | ||
30320be8 | 3980 | /* use prefetched values */ |
86c3d59f JB |
3981 | rx_desc = next_rxd; |
3982 | buffer_info = next_buffer; | |
3983 | ||
683a38f3 | 3984 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
2d7edb92 MC |
3985 | } |
3986 | rx_ring->next_to_clean = i; | |
72d64a43 JK |
3987 | |
3988 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
3989 | if (cleaned_count) | |
3990 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
1da177e4 LT |
3991 | |
3992 | return cleaned; | |
3993 | } | |
3994 | ||
3995 | /** | |
2d7edb92 | 3996 | * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended |
1da177e4 LT |
3997 | * @adapter: address of board private structure |
3998 | **/ | |
3999 | ||
4000 | static void | |
581d708e | 4001 | e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
72d64a43 | 4002 | struct e1000_rx_ring *rx_ring, |
a292ca6e | 4003 | int cleaned_count) |
1da177e4 | 4004 | { |
1da177e4 LT |
4005 | struct net_device *netdev = adapter->netdev; |
4006 | struct pci_dev *pdev = adapter->pdev; | |
4007 | struct e1000_rx_desc *rx_desc; | |
4008 | struct e1000_buffer *buffer_info; | |
4009 | struct sk_buff *skb; | |
2648345f MC |
4010 | unsigned int i; |
4011 | unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN; | |
1da177e4 LT |
4012 | |
4013 | i = rx_ring->next_to_use; | |
4014 | buffer_info = &rx_ring->buffer_info[i]; | |
4015 | ||
a292ca6e | 4016 | while (cleaned_count--) { |
ca6f7224 CH |
4017 | skb = buffer_info->skb; |
4018 | if (skb) { | |
a292ca6e JK |
4019 | skb_trim(skb, 0); |
4020 | goto map_skb; | |
4021 | } | |
4022 | ||
ca6f7224 | 4023 | skb = netdev_alloc_skb(netdev, bufsz); |
96838a40 | 4024 | if (unlikely(!skb)) { |
1da177e4 | 4025 | /* Better luck next round */ |
72d64a43 | 4026 | adapter->alloc_rx_buff_failed++; |
1da177e4 LT |
4027 | break; |
4028 | } | |
4029 | ||
2648345f | 4030 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
4031 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
4032 | struct sk_buff *oldskb = skb; | |
2648345f MC |
4033 | DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes " |
4034 | "at %p\n", bufsz, skb->data); | |
4035 | /* Try again, without freeing the previous */ | |
87f5032e | 4036 | skb = netdev_alloc_skb(netdev, bufsz); |
2648345f | 4037 | /* Failed allocation, critical failure */ |
1da177e4 LT |
4038 | if (!skb) { |
4039 | dev_kfree_skb(oldskb); | |
4040 | break; | |
4041 | } | |
2648345f | 4042 | |
1da177e4 LT |
4043 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
4044 | /* give up */ | |
4045 | dev_kfree_skb(skb); | |
4046 | dev_kfree_skb(oldskb); | |
4047 | break; /* while !buffer_info->skb */ | |
1da177e4 | 4048 | } |
ca6f7224 CH |
4049 | |
4050 | /* Use new allocation */ | |
4051 | dev_kfree_skb(oldskb); | |
1da177e4 | 4052 | } |
1da177e4 LT |
4053 | /* Make buffer alignment 2 beyond a 16 byte boundary |
4054 | * this will result in a 16 byte aligned IP header after | |
4055 | * the 14 byte MAC header is removed | |
4056 | */ | |
4057 | skb_reserve(skb, NET_IP_ALIGN); | |
4058 | ||
1da177e4 LT |
4059 | buffer_info->skb = skb; |
4060 | buffer_info->length = adapter->rx_buffer_len; | |
a292ca6e | 4061 | map_skb: |
1da177e4 LT |
4062 | buffer_info->dma = pci_map_single(pdev, |
4063 | skb->data, | |
4064 | adapter->rx_buffer_len, | |
4065 | PCI_DMA_FROMDEVICE); | |
4066 | ||
2648345f MC |
4067 | /* Fix for errata 23, can't cross 64kB boundary */ |
4068 | if (!e1000_check_64k_bound(adapter, | |
4069 | (void *)(unsigned long)buffer_info->dma, | |
4070 | adapter->rx_buffer_len)) { | |
4071 | DPRINTK(RX_ERR, ERR, | |
4072 | "dma align check failed: %u bytes at %p\n", | |
4073 | adapter->rx_buffer_len, | |
4074 | (void *)(unsigned long)buffer_info->dma); | |
1da177e4 LT |
4075 | dev_kfree_skb(skb); |
4076 | buffer_info->skb = NULL; | |
4077 | ||
2648345f | 4078 | pci_unmap_single(pdev, buffer_info->dma, |
1da177e4 LT |
4079 | adapter->rx_buffer_len, |
4080 | PCI_DMA_FROMDEVICE); | |
4081 | ||
4082 | break; /* while !buffer_info->skb */ | |
4083 | } | |
1da177e4 LT |
4084 | rx_desc = E1000_RX_DESC(*rx_ring, i); |
4085 | rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
4086 | ||
96838a40 JB |
4087 | if (unlikely(++i == rx_ring->count)) |
4088 | i = 0; | |
1da177e4 LT |
4089 | buffer_info = &rx_ring->buffer_info[i]; |
4090 | } | |
4091 | ||
b92ff8ee JB |
4092 | if (likely(rx_ring->next_to_use != i)) { |
4093 | rx_ring->next_to_use = i; | |
4094 | if (unlikely(i-- == 0)) | |
4095 | i = (rx_ring->count - 1); | |
4096 | ||
4097 | /* Force memory writes to complete before letting h/w | |
4098 | * know there are new descriptors to fetch. (Only | |
4099 | * applicable for weak-ordered memory model archs, | |
4100 | * such as IA-64). */ | |
4101 | wmb(); | |
4102 | writel(i, adapter->hw.hw_addr + rx_ring->rdt); | |
4103 | } | |
1da177e4 LT |
4104 | } |
4105 | ||
2d7edb92 MC |
4106 | /** |
4107 | * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split | |
4108 | * @adapter: address of board private structure | |
4109 | **/ | |
4110 | ||
4111 | static void | |
581d708e | 4112 | e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, |
72d64a43 JK |
4113 | struct e1000_rx_ring *rx_ring, |
4114 | int cleaned_count) | |
2d7edb92 | 4115 | { |
2d7edb92 MC |
4116 | struct net_device *netdev = adapter->netdev; |
4117 | struct pci_dev *pdev = adapter->pdev; | |
4118 | union e1000_rx_desc_packet_split *rx_desc; | |
4119 | struct e1000_buffer *buffer_info; | |
4120 | struct e1000_ps_page *ps_page; | |
4121 | struct e1000_ps_page_dma *ps_page_dma; | |
4122 | struct sk_buff *skb; | |
4123 | unsigned int i, j; | |
4124 | ||
4125 | i = rx_ring->next_to_use; | |
4126 | buffer_info = &rx_ring->buffer_info[i]; | |
4127 | ps_page = &rx_ring->ps_page[i]; | |
4128 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
4129 | ||
72d64a43 | 4130 | while (cleaned_count--) { |
2d7edb92 MC |
4131 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); |
4132 | ||
96838a40 | 4133 | for (j = 0; j < PS_PAGE_BUFFERS; j++) { |
e4c811c9 MC |
4134 | if (j < adapter->rx_ps_pages) { |
4135 | if (likely(!ps_page->ps_page[j])) { | |
4136 | ps_page->ps_page[j] = | |
4137 | alloc_page(GFP_ATOMIC); | |
b92ff8ee JB |
4138 | if (unlikely(!ps_page->ps_page[j])) { |
4139 | adapter->alloc_rx_buff_failed++; | |
e4c811c9 | 4140 | goto no_buffers; |
b92ff8ee | 4141 | } |
e4c811c9 MC |
4142 | ps_page_dma->ps_page_dma[j] = |
4143 | pci_map_page(pdev, | |
4144 | ps_page->ps_page[j], | |
4145 | 0, PAGE_SIZE, | |
4146 | PCI_DMA_FROMDEVICE); | |
4147 | } | |
4148 | /* Refresh the desc even if buffer_addrs didn't | |
96838a40 | 4149 | * change because each write-back erases |
e4c811c9 MC |
4150 | * this info. |
4151 | */ | |
4152 | rx_desc->read.buffer_addr[j+1] = | |
4153 | cpu_to_le64(ps_page_dma->ps_page_dma[j]); | |
4154 | } else | |
4155 | rx_desc->read.buffer_addr[j+1] = ~0; | |
2d7edb92 MC |
4156 | } |
4157 | ||
87f5032e DM |
4158 | skb = netdev_alloc_skb(netdev, |
4159 | adapter->rx_ps_bsize0 + NET_IP_ALIGN); | |
2d7edb92 | 4160 | |
b92ff8ee JB |
4161 | if (unlikely(!skb)) { |
4162 | adapter->alloc_rx_buff_failed++; | |
2d7edb92 | 4163 | break; |
b92ff8ee | 4164 | } |
2d7edb92 MC |
4165 | |
4166 | /* Make buffer alignment 2 beyond a 16 byte boundary | |
4167 | * this will result in a 16 byte aligned IP header after | |
4168 | * the 14 byte MAC header is removed | |
4169 | */ | |
4170 | skb_reserve(skb, NET_IP_ALIGN); | |
4171 | ||
2d7edb92 MC |
4172 | buffer_info->skb = skb; |
4173 | buffer_info->length = adapter->rx_ps_bsize0; | |
4174 | buffer_info->dma = pci_map_single(pdev, skb->data, | |
4175 | adapter->rx_ps_bsize0, | |
4176 | PCI_DMA_FROMDEVICE); | |
4177 | ||
4178 | rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); | |
4179 | ||
96838a40 | 4180 | if (unlikely(++i == rx_ring->count)) i = 0; |
2d7edb92 MC |
4181 | buffer_info = &rx_ring->buffer_info[i]; |
4182 | ps_page = &rx_ring->ps_page[i]; | |
4183 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
4184 | } | |
4185 | ||
4186 | no_buffers: | |
b92ff8ee JB |
4187 | if (likely(rx_ring->next_to_use != i)) { |
4188 | rx_ring->next_to_use = i; | |
4189 | if (unlikely(i-- == 0)) i = (rx_ring->count - 1); | |
4190 | ||
4191 | /* Force memory writes to complete before letting h/w | |
4192 | * know there are new descriptors to fetch. (Only | |
4193 | * applicable for weak-ordered memory model archs, | |
4194 | * such as IA-64). */ | |
4195 | wmb(); | |
4196 | /* Hardware increments by 16 bytes, but packet split | |
4197 | * descriptors are 32 bytes...so we increment tail | |
4198 | * twice as much. | |
4199 | */ | |
4200 | writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt); | |
4201 | } | |
2d7edb92 MC |
4202 | } |
4203 | ||
1da177e4 LT |
4204 | /** |
4205 | * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers. | |
4206 | * @adapter: | |
4207 | **/ | |
4208 | ||
4209 | static void | |
4210 | e1000_smartspeed(struct e1000_adapter *adapter) | |
4211 | { | |
4212 | uint16_t phy_status; | |
4213 | uint16_t phy_ctrl; | |
4214 | ||
96838a40 | 4215 | if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg || |
1da177e4 LT |
4216 | !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL)) |
4217 | return; | |
4218 | ||
96838a40 | 4219 | if (adapter->smartspeed == 0) { |
1da177e4 LT |
4220 | /* If Master/Slave config fault is asserted twice, |
4221 | * we assume back-to-back */ | |
4222 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); | |
96838a40 | 4223 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1da177e4 | 4224 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); |
96838a40 | 4225 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1da177e4 | 4226 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); |
96838a40 | 4227 | if (phy_ctrl & CR_1000T_MS_ENABLE) { |
1da177e4 LT |
4228 | phy_ctrl &= ~CR_1000T_MS_ENABLE; |
4229 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, | |
4230 | phy_ctrl); | |
4231 | adapter->smartspeed++; | |
96838a40 | 4232 | if (!e1000_phy_setup_autoneg(&adapter->hw) && |
1da177e4 LT |
4233 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, |
4234 | &phy_ctrl)) { | |
4235 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
4236 | MII_CR_RESTART_AUTO_NEG); | |
4237 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, | |
4238 | phy_ctrl); | |
4239 | } | |
4240 | } | |
4241 | return; | |
96838a40 | 4242 | } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) { |
1da177e4 LT |
4243 | /* If still no link, perhaps using 2/3 pair cable */ |
4244 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); | |
4245 | phy_ctrl |= CR_1000T_MS_ENABLE; | |
4246 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl); | |
96838a40 | 4247 | if (!e1000_phy_setup_autoneg(&adapter->hw) && |
1da177e4 LT |
4248 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) { |
4249 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
4250 | MII_CR_RESTART_AUTO_NEG); | |
4251 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl); | |
4252 | } | |
4253 | } | |
4254 | /* Restart process after E1000_SMARTSPEED_MAX iterations */ | |
96838a40 | 4255 | if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX) |
1da177e4 LT |
4256 | adapter->smartspeed = 0; |
4257 | } | |
4258 | ||
4259 | /** | |
4260 | * e1000_ioctl - | |
4261 | * @netdev: | |
4262 | * @ifreq: | |
4263 | * @cmd: | |
4264 | **/ | |
4265 | ||
4266 | static int | |
4267 | e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
4268 | { | |
4269 | switch (cmd) { | |
4270 | case SIOCGMIIPHY: | |
4271 | case SIOCGMIIREG: | |
4272 | case SIOCSMIIREG: | |
4273 | return e1000_mii_ioctl(netdev, ifr, cmd); | |
4274 | default: | |
4275 | return -EOPNOTSUPP; | |
4276 | } | |
4277 | } | |
4278 | ||
4279 | /** | |
4280 | * e1000_mii_ioctl - | |
4281 | * @netdev: | |
4282 | * @ifreq: | |
4283 | * @cmd: | |
4284 | **/ | |
4285 | ||
4286 | static int | |
4287 | e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
4288 | { | |
60490fe0 | 4289 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4290 | struct mii_ioctl_data *data = if_mii(ifr); |
4291 | int retval; | |
4292 | uint16_t mii_reg; | |
4293 | uint16_t spddplx; | |
97876fc6 | 4294 | unsigned long flags; |
1da177e4 | 4295 | |
96838a40 | 4296 | if (adapter->hw.media_type != e1000_media_type_copper) |
1da177e4 LT |
4297 | return -EOPNOTSUPP; |
4298 | ||
4299 | switch (cmd) { | |
4300 | case SIOCGMIIPHY: | |
4301 | data->phy_id = adapter->hw.phy_addr; | |
4302 | break; | |
4303 | case SIOCGMIIREG: | |
96838a40 | 4304 | if (!capable(CAP_NET_ADMIN)) |
1da177e4 | 4305 | return -EPERM; |
97876fc6 | 4306 | spin_lock_irqsave(&adapter->stats_lock, flags); |
96838a40 | 4307 | if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, |
97876fc6 MC |
4308 | &data->val_out)) { |
4309 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4310 | return -EIO; |
97876fc6 MC |
4311 | } |
4312 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 LT |
4313 | break; |
4314 | case SIOCSMIIREG: | |
96838a40 | 4315 | if (!capable(CAP_NET_ADMIN)) |
1da177e4 | 4316 | return -EPERM; |
96838a40 | 4317 | if (data->reg_num & ~(0x1F)) |
1da177e4 LT |
4318 | return -EFAULT; |
4319 | mii_reg = data->val_in; | |
97876fc6 | 4320 | spin_lock_irqsave(&adapter->stats_lock, flags); |
96838a40 | 4321 | if (e1000_write_phy_reg(&adapter->hw, data->reg_num, |
97876fc6 MC |
4322 | mii_reg)) { |
4323 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4324 | return -EIO; |
97876fc6 | 4325 | } |
dc86d32a | 4326 | if (adapter->hw.media_type == e1000_media_type_copper) { |
1da177e4 LT |
4327 | switch (data->reg_num) { |
4328 | case PHY_CTRL: | |
96838a40 | 4329 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4330 | break; |
96838a40 | 4331 | if (mii_reg & MII_CR_AUTO_NEG_EN) { |
1da177e4 LT |
4332 | adapter->hw.autoneg = 1; |
4333 | adapter->hw.autoneg_advertised = 0x2F; | |
4334 | } else { | |
4335 | if (mii_reg & 0x40) | |
4336 | spddplx = SPEED_1000; | |
4337 | else if (mii_reg & 0x2000) | |
4338 | spddplx = SPEED_100; | |
4339 | else | |
4340 | spddplx = SPEED_10; | |
4341 | spddplx += (mii_reg & 0x100) | |
cb764326 JK |
4342 | ? DUPLEX_FULL : |
4343 | DUPLEX_HALF; | |
1da177e4 LT |
4344 | retval = e1000_set_spd_dplx(adapter, |
4345 | spddplx); | |
96838a40 | 4346 | if (retval) { |
97876fc6 | 4347 | spin_unlock_irqrestore( |
96838a40 | 4348 | &adapter->stats_lock, |
97876fc6 | 4349 | flags); |
1da177e4 | 4350 | return retval; |
97876fc6 | 4351 | } |
1da177e4 | 4352 | } |
2db10a08 AK |
4353 | if (netif_running(adapter->netdev)) |
4354 | e1000_reinit_locked(adapter); | |
4355 | else | |
1da177e4 LT |
4356 | e1000_reset(adapter); |
4357 | break; | |
4358 | case M88E1000_PHY_SPEC_CTRL: | |
4359 | case M88E1000_EXT_PHY_SPEC_CTRL: | |
96838a40 | 4360 | if (e1000_phy_reset(&adapter->hw)) { |
97876fc6 MC |
4361 | spin_unlock_irqrestore( |
4362 | &adapter->stats_lock, flags); | |
1da177e4 | 4363 | return -EIO; |
97876fc6 | 4364 | } |
1da177e4 LT |
4365 | break; |
4366 | } | |
4367 | } else { | |
4368 | switch (data->reg_num) { | |
4369 | case PHY_CTRL: | |
96838a40 | 4370 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4371 | break; |
2db10a08 AK |
4372 | if (netif_running(adapter->netdev)) |
4373 | e1000_reinit_locked(adapter); | |
4374 | else | |
1da177e4 LT |
4375 | e1000_reset(adapter); |
4376 | break; | |
4377 | } | |
4378 | } | |
97876fc6 | 4379 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
1da177e4 LT |
4380 | break; |
4381 | default: | |
4382 | return -EOPNOTSUPP; | |
4383 | } | |
4384 | return E1000_SUCCESS; | |
4385 | } | |
4386 | ||
4387 | void | |
4388 | e1000_pci_set_mwi(struct e1000_hw *hw) | |
4389 | { | |
4390 | struct e1000_adapter *adapter = hw->back; | |
2648345f | 4391 | int ret_val = pci_set_mwi(adapter->pdev); |
1da177e4 | 4392 | |
96838a40 | 4393 | if (ret_val) |
2648345f | 4394 | DPRINTK(PROBE, ERR, "Error in setting MWI\n"); |
1da177e4 LT |
4395 | } |
4396 | ||
4397 | void | |
4398 | e1000_pci_clear_mwi(struct e1000_hw *hw) | |
4399 | { | |
4400 | struct e1000_adapter *adapter = hw->back; | |
4401 | ||
4402 | pci_clear_mwi(adapter->pdev); | |
4403 | } | |
4404 | ||
4405 | void | |
4406 | e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4407 | { | |
4408 | struct e1000_adapter *adapter = hw->back; | |
4409 | ||
4410 | pci_read_config_word(adapter->pdev, reg, value); | |
4411 | } | |
4412 | ||
4413 | void | |
4414 | e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4415 | { | |
4416 | struct e1000_adapter *adapter = hw->back; | |
4417 | ||
4418 | pci_write_config_word(adapter->pdev, reg, *value); | |
4419 | } | |
4420 | ||
1da177e4 LT |
4421 | void |
4422 | e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value) | |
4423 | { | |
4424 | outl(value, port); | |
4425 | } | |
4426 | ||
4427 | static void | |
4428 | e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
4429 | { | |
60490fe0 | 4430 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4431 | uint32_t ctrl, rctl; |
4432 | ||
4433 | e1000_irq_disable(adapter); | |
4434 | adapter->vlgrp = grp; | |
4435 | ||
96838a40 | 4436 | if (grp) { |
1da177e4 LT |
4437 | /* enable VLAN tag insert/strip */ |
4438 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4439 | ctrl |= E1000_CTRL_VME; | |
4440 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4441 | ||
cd94dd0b | 4442 | if (adapter->hw.mac_type != e1000_ich8lan) { |
1da177e4 LT |
4443 | /* enable VLAN receive filtering */ |
4444 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4445 | rctl |= E1000_RCTL_VFE; | |
4446 | rctl &= ~E1000_RCTL_CFIEN; | |
4447 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2d7edb92 | 4448 | e1000_update_mng_vlan(adapter); |
cd94dd0b | 4449 | } |
1da177e4 LT |
4450 | } else { |
4451 | /* disable VLAN tag insert/strip */ | |
4452 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4453 | ctrl &= ~E1000_CTRL_VME; | |
4454 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4455 | ||
cd94dd0b | 4456 | if (adapter->hw.mac_type != e1000_ich8lan) { |
1da177e4 LT |
4457 | /* disable VLAN filtering */ |
4458 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4459 | rctl &= ~E1000_RCTL_VFE; | |
4460 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
96838a40 | 4461 | if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) { |
2d7edb92 MC |
4462 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); |
4463 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
4464 | } | |
cd94dd0b | 4465 | } |
1da177e4 LT |
4466 | } |
4467 | ||
4468 | e1000_irq_enable(adapter); | |
4469 | } | |
4470 | ||
4471 | static void | |
4472 | e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid) | |
4473 | { | |
60490fe0 | 4474 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 4475 | uint32_t vfta, index; |
96838a40 JB |
4476 | |
4477 | if ((adapter->hw.mng_cookie.status & | |
4478 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
4479 | (vid == adapter->mng_vlan_id)) | |
2d7edb92 | 4480 | return; |
1da177e4 LT |
4481 | /* add VID to filter table */ |
4482 | index = (vid >> 5) & 0x7F; | |
4483 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
4484 | vfta |= (1 << (vid & 0x1F)); | |
4485 | e1000_write_vfta(&adapter->hw, index, vfta); | |
4486 | } | |
4487 | ||
4488 | static void | |
4489 | e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid) | |
4490 | { | |
60490fe0 | 4491 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4492 | uint32_t vfta, index; |
4493 | ||
4494 | e1000_irq_disable(adapter); | |
4495 | ||
96838a40 | 4496 | if (adapter->vlgrp) |
1da177e4 LT |
4497 | adapter->vlgrp->vlan_devices[vid] = NULL; |
4498 | ||
4499 | e1000_irq_enable(adapter); | |
4500 | ||
96838a40 JB |
4501 | if ((adapter->hw.mng_cookie.status & |
4502 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
ff147013 JK |
4503 | (vid == adapter->mng_vlan_id)) { |
4504 | /* release control to f/w */ | |
4505 | e1000_release_hw_control(adapter); | |
2d7edb92 | 4506 | return; |
ff147013 JK |
4507 | } |
4508 | ||
1da177e4 LT |
4509 | /* remove VID from filter table */ |
4510 | index = (vid >> 5) & 0x7F; | |
4511 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
4512 | vfta &= ~(1 << (vid & 0x1F)); | |
4513 | e1000_write_vfta(&adapter->hw, index, vfta); | |
4514 | } | |
4515 | ||
4516 | static void | |
4517 | e1000_restore_vlan(struct e1000_adapter *adapter) | |
4518 | { | |
4519 | e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp); | |
4520 | ||
96838a40 | 4521 | if (adapter->vlgrp) { |
1da177e4 | 4522 | uint16_t vid; |
96838a40 JB |
4523 | for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { |
4524 | if (!adapter->vlgrp->vlan_devices[vid]) | |
1da177e4 LT |
4525 | continue; |
4526 | e1000_vlan_rx_add_vid(adapter->netdev, vid); | |
4527 | } | |
4528 | } | |
4529 | } | |
4530 | ||
4531 | int | |
4532 | e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx) | |
4533 | { | |
4534 | adapter->hw.autoneg = 0; | |
4535 | ||
6921368f | 4536 | /* Fiber NICs only allow 1000 gbps Full duplex */ |
96838a40 | 4537 | if ((adapter->hw.media_type == e1000_media_type_fiber) && |
6921368f MC |
4538 | spddplx != (SPEED_1000 + DUPLEX_FULL)) { |
4539 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); | |
4540 | return -EINVAL; | |
4541 | } | |
4542 | ||
96838a40 | 4543 | switch (spddplx) { |
1da177e4 LT |
4544 | case SPEED_10 + DUPLEX_HALF: |
4545 | adapter->hw.forced_speed_duplex = e1000_10_half; | |
4546 | break; | |
4547 | case SPEED_10 + DUPLEX_FULL: | |
4548 | adapter->hw.forced_speed_duplex = e1000_10_full; | |
4549 | break; | |
4550 | case SPEED_100 + DUPLEX_HALF: | |
4551 | adapter->hw.forced_speed_duplex = e1000_100_half; | |
4552 | break; | |
4553 | case SPEED_100 + DUPLEX_FULL: | |
4554 | adapter->hw.forced_speed_duplex = e1000_100_full; | |
4555 | break; | |
4556 | case SPEED_1000 + DUPLEX_FULL: | |
4557 | adapter->hw.autoneg = 1; | |
4558 | adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL; | |
4559 | break; | |
4560 | case SPEED_1000 + DUPLEX_HALF: /* not supported */ | |
4561 | default: | |
2648345f | 4562 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); |
1da177e4 LT |
4563 | return -EINVAL; |
4564 | } | |
4565 | return 0; | |
4566 | } | |
4567 | ||
b6a1d5f8 | 4568 | #ifdef CONFIG_PM |
0f15a8fa JK |
4569 | /* Save/restore 16 or 64 dwords of PCI config space depending on which |
4570 | * bus we're on (PCI(X) vs. PCI-E) | |
2f82665f JB |
4571 | */ |
4572 | #define PCIE_CONFIG_SPACE_LEN 256 | |
4573 | #define PCI_CONFIG_SPACE_LEN 64 | |
4574 | static int | |
4575 | e1000_pci_save_state(struct e1000_adapter *adapter) | |
4576 | { | |
4577 | struct pci_dev *dev = adapter->pdev; | |
4578 | int size; | |
4579 | int i; | |
0f15a8fa | 4580 | |
2f82665f JB |
4581 | if (adapter->hw.mac_type >= e1000_82571) |
4582 | size = PCIE_CONFIG_SPACE_LEN; | |
4583 | else | |
4584 | size = PCI_CONFIG_SPACE_LEN; | |
4585 | ||
4586 | WARN_ON(adapter->config_space != NULL); | |
4587 | ||
4588 | adapter->config_space = kmalloc(size, GFP_KERNEL); | |
4589 | if (!adapter->config_space) { | |
4590 | DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size); | |
4591 | return -ENOMEM; | |
4592 | } | |
4593 | for (i = 0; i < (size / 4); i++) | |
4594 | pci_read_config_dword(dev, i * 4, &adapter->config_space[i]); | |
4595 | return 0; | |
4596 | } | |
4597 | ||
4598 | static void | |
4599 | e1000_pci_restore_state(struct e1000_adapter *adapter) | |
4600 | { | |
4601 | struct pci_dev *dev = adapter->pdev; | |
4602 | int size; | |
4603 | int i; | |
0f15a8fa | 4604 | |
2f82665f JB |
4605 | if (adapter->config_space == NULL) |
4606 | return; | |
0f15a8fa | 4607 | |
2f82665f JB |
4608 | if (adapter->hw.mac_type >= e1000_82571) |
4609 | size = PCIE_CONFIG_SPACE_LEN; | |
4610 | else | |
4611 | size = PCI_CONFIG_SPACE_LEN; | |
4612 | for (i = 0; i < (size / 4); i++) | |
4613 | pci_write_config_dword(dev, i * 4, adapter->config_space[i]); | |
4614 | kfree(adapter->config_space); | |
4615 | adapter->config_space = NULL; | |
4616 | return; | |
4617 | } | |
4618 | #endif /* CONFIG_PM */ | |
4619 | ||
1da177e4 | 4620 | static int |
829ca9a3 | 4621 | e1000_suspend(struct pci_dev *pdev, pm_message_t state) |
1da177e4 LT |
4622 | { |
4623 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 4624 | struct e1000_adapter *adapter = netdev_priv(netdev); |
b55ccb35 | 4625 | uint32_t ctrl, ctrl_ext, rctl, manc, status; |
1da177e4 | 4626 | uint32_t wufc = adapter->wol; |
6fdfef16 | 4627 | #ifdef CONFIG_PM |
240b1710 | 4628 | int retval = 0; |
6fdfef16 | 4629 | #endif |
1da177e4 LT |
4630 | |
4631 | netif_device_detach(netdev); | |
4632 | ||
2db10a08 AK |
4633 | if (netif_running(netdev)) { |
4634 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); | |
1da177e4 | 4635 | e1000_down(adapter); |
2db10a08 | 4636 | } |
1da177e4 | 4637 | |
2f82665f | 4638 | #ifdef CONFIG_PM |
0f15a8fa JK |
4639 | /* Implement our own version of pci_save_state(pdev) because pci- |
4640 | * express adapters have 256-byte config spaces. */ | |
2f82665f JB |
4641 | retval = e1000_pci_save_state(adapter); |
4642 | if (retval) | |
4643 | return retval; | |
4644 | #endif | |
4645 | ||
1da177e4 | 4646 | status = E1000_READ_REG(&adapter->hw, STATUS); |
96838a40 | 4647 | if (status & E1000_STATUS_LU) |
1da177e4 LT |
4648 | wufc &= ~E1000_WUFC_LNKC; |
4649 | ||
96838a40 | 4650 | if (wufc) { |
1da177e4 LT |
4651 | e1000_setup_rctl(adapter); |
4652 | e1000_set_multi(netdev); | |
4653 | ||
4654 | /* turn on all-multi mode if wake on multicast is enabled */ | |
120cd576 | 4655 | if (wufc & E1000_WUFC_MC) { |
1da177e4 LT |
4656 | rctl = E1000_READ_REG(&adapter->hw, RCTL); |
4657 | rctl |= E1000_RCTL_MPE; | |
4658 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
4659 | } | |
4660 | ||
96838a40 | 4661 | if (adapter->hw.mac_type >= e1000_82540) { |
1da177e4 LT |
4662 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); |
4663 | /* advertise wake from D3Cold */ | |
4664 | #define E1000_CTRL_ADVD3WUC 0x00100000 | |
4665 | /* phy power management enable */ | |
4666 | #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 | |
4667 | ctrl |= E1000_CTRL_ADVD3WUC | | |
4668 | E1000_CTRL_EN_PHY_PWR_MGMT; | |
4669 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4670 | } | |
4671 | ||
96838a40 | 4672 | if (adapter->hw.media_type == e1000_media_type_fiber || |
1da177e4 LT |
4673 | adapter->hw.media_type == e1000_media_type_internal_serdes) { |
4674 | /* keep the laser running in D3 */ | |
4675 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
4676 | ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA; | |
4677 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext); | |
4678 | } | |
4679 | ||
2d7edb92 MC |
4680 | /* Allow time for pending master requests to run */ |
4681 | e1000_disable_pciex_master(&adapter->hw); | |
4682 | ||
1da177e4 LT |
4683 | E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN); |
4684 | E1000_WRITE_REG(&adapter->hw, WUFC, wufc); | |
d0e027db AK |
4685 | pci_enable_wake(pdev, PCI_D3hot, 1); |
4686 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1da177e4 LT |
4687 | } else { |
4688 | E1000_WRITE_REG(&adapter->hw, WUC, 0); | |
4689 | E1000_WRITE_REG(&adapter->hw, WUFC, 0); | |
d0e027db AK |
4690 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4691 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 LT |
4692 | } |
4693 | ||
5f01607a | 4694 | if (adapter->hw.mac_type < e1000_82571 && |
1da177e4 LT |
4695 | adapter->hw.media_type == e1000_media_type_copper) { |
4696 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
96838a40 | 4697 | if (manc & E1000_MANC_SMBUS_EN) { |
1da177e4 LT |
4698 | manc |= E1000_MANC_ARP_EN; |
4699 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
d0e027db AK |
4700 | pci_enable_wake(pdev, PCI_D3hot, 1); |
4701 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1da177e4 LT |
4702 | } |
4703 | } | |
4704 | ||
cd94dd0b AK |
4705 | if (adapter->hw.phy_type == e1000_phy_igp_3) |
4706 | e1000_phy_powerdown_workaround(&adapter->hw); | |
4707 | ||
b55ccb35 JK |
4708 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
4709 | * would have already happened in close and is redundant. */ | |
4710 | e1000_release_hw_control(adapter); | |
2d7edb92 | 4711 | |
1da177e4 | 4712 | pci_disable_device(pdev); |
240b1710 | 4713 | |
d0e027db | 4714 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
1da177e4 LT |
4715 | |
4716 | return 0; | |
4717 | } | |
4718 | ||
2f82665f | 4719 | #ifdef CONFIG_PM |
1da177e4 LT |
4720 | static int |
4721 | e1000_resume(struct pci_dev *pdev) | |
4722 | { | |
4723 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 4724 | struct e1000_adapter *adapter = netdev_priv(netdev); |
3d1dd8cb | 4725 | uint32_t manc, err; |
1da177e4 | 4726 | |
d0e027db | 4727 | pci_set_power_state(pdev, PCI_D0); |
2f82665f | 4728 | e1000_pci_restore_state(adapter); |
3d1dd8cb AK |
4729 | if ((err = pci_enable_device(pdev))) { |
4730 | printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n"); | |
4731 | return err; | |
4732 | } | |
a4cb847d | 4733 | pci_set_master(pdev); |
1da177e4 | 4734 | |
d0e027db AK |
4735 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4736 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 LT |
4737 | |
4738 | e1000_reset(adapter); | |
4739 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | |
4740 | ||
96838a40 | 4741 | if (netif_running(netdev)) |
1da177e4 LT |
4742 | e1000_up(adapter); |
4743 | ||
4744 | netif_device_attach(netdev); | |
4745 | ||
5f01607a | 4746 | if (adapter->hw.mac_type < e1000_82571 && |
1da177e4 LT |
4747 | adapter->hw.media_type == e1000_media_type_copper) { |
4748 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
4749 | manc &= ~(E1000_MANC_ARP_EN); | |
4750 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
4751 | } | |
4752 | ||
b55ccb35 JK |
4753 | /* If the controller is 82573 and f/w is AMT, do not set |
4754 | * DRV_LOAD until the interface is up. For all other cases, | |
4755 | * let the f/w know that the h/w is now under the control | |
4756 | * of the driver. */ | |
4757 | if (adapter->hw.mac_type != e1000_82573 || | |
4758 | !e1000_check_mng_mode(&adapter->hw)) | |
4759 | e1000_get_hw_control(adapter); | |
2d7edb92 | 4760 | |
1da177e4 LT |
4761 | return 0; |
4762 | } | |
4763 | #endif | |
c653e635 AK |
4764 | |
4765 | static void e1000_shutdown(struct pci_dev *pdev) | |
4766 | { | |
4767 | e1000_suspend(pdev, PMSG_SUSPEND); | |
4768 | } | |
4769 | ||
1da177e4 LT |
4770 | #ifdef CONFIG_NET_POLL_CONTROLLER |
4771 | /* | |
4772 | * Polling 'interrupt' - used by things like netconsole to send skbs | |
4773 | * without having to re-enable interrupts. It's not called while | |
4774 | * the interrupt routine is executing. | |
4775 | */ | |
4776 | static void | |
2648345f | 4777 | e1000_netpoll(struct net_device *netdev) |
1da177e4 | 4778 | { |
60490fe0 | 4779 | struct e1000_adapter *adapter = netdev_priv(netdev); |
d3d9e484 | 4780 | |
1da177e4 LT |
4781 | disable_irq(adapter->pdev->irq); |
4782 | e1000_intr(adapter->pdev->irq, netdev, NULL); | |
c4cfe567 | 4783 | e1000_clean_tx_irq(adapter, adapter->tx_ring); |
e8da8be1 JK |
4784 | #ifndef CONFIG_E1000_NAPI |
4785 | adapter->clean_rx(adapter, adapter->rx_ring); | |
4786 | #endif | |
1da177e4 LT |
4787 | enable_irq(adapter->pdev->irq); |
4788 | } | |
4789 | #endif | |
4790 | ||
9026729b AK |
4791 | /** |
4792 | * e1000_io_error_detected - called when PCI error is detected | |
4793 | * @pdev: Pointer to PCI device | |
4794 | * @state: The current pci conneection state | |
4795 | * | |
4796 | * This function is called after a PCI bus error affecting | |
4797 | * this device has been detected. | |
4798 | */ | |
4799 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) | |
4800 | { | |
4801 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4802 | struct e1000_adapter *adapter = netdev->priv; | |
4803 | ||
4804 | netif_device_detach(netdev); | |
4805 | ||
4806 | if (netif_running(netdev)) | |
4807 | e1000_down(adapter); | |
72e8d6bb | 4808 | pci_disable_device(pdev); |
9026729b AK |
4809 | |
4810 | /* Request a slot slot reset. */ | |
4811 | return PCI_ERS_RESULT_NEED_RESET; | |
4812 | } | |
4813 | ||
4814 | /** | |
4815 | * e1000_io_slot_reset - called after the pci bus has been reset. | |
4816 | * @pdev: Pointer to PCI device | |
4817 | * | |
4818 | * Restart the card from scratch, as if from a cold-boot. Implementation | |
4819 | * resembles the first-half of the e1000_resume routine. | |
4820 | */ | |
4821 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) | |
4822 | { | |
4823 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4824 | struct e1000_adapter *adapter = netdev->priv; | |
4825 | ||
4826 | if (pci_enable_device(pdev)) { | |
4827 | printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n"); | |
4828 | return PCI_ERS_RESULT_DISCONNECT; | |
4829 | } | |
4830 | pci_set_master(pdev); | |
4831 | ||
4832 | pci_enable_wake(pdev, 3, 0); | |
4833 | pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */ | |
4834 | ||
4835 | /* Perform card reset only on one instance of the card */ | |
4836 | if (PCI_FUNC (pdev->devfn) != 0) | |
4837 | return PCI_ERS_RESULT_RECOVERED; | |
4838 | ||
4839 | e1000_reset(adapter); | |
4840 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | |
4841 | ||
4842 | return PCI_ERS_RESULT_RECOVERED; | |
4843 | } | |
4844 | ||
4845 | /** | |
4846 | * e1000_io_resume - called when traffic can start flowing again. | |
4847 | * @pdev: Pointer to PCI device | |
4848 | * | |
4849 | * This callback is called when the error recovery driver tells us that | |
4850 | * its OK to resume normal operation. Implementation resembles the | |
4851 | * second-half of the e1000_resume routine. | |
4852 | */ | |
4853 | static void e1000_io_resume(struct pci_dev *pdev) | |
4854 | { | |
4855 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4856 | struct e1000_adapter *adapter = netdev->priv; | |
4857 | uint32_t manc, swsm; | |
4858 | ||
4859 | if (netif_running(netdev)) { | |
4860 | if (e1000_up(adapter)) { | |
4861 | printk("e1000: can't bring device back up after reset\n"); | |
4862 | return; | |
4863 | } | |
4864 | } | |
4865 | ||
4866 | netif_device_attach(netdev); | |
4867 | ||
4868 | if (adapter->hw.mac_type >= e1000_82540 && | |
4869 | adapter->hw.media_type == e1000_media_type_copper) { | |
4870 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
4871 | manc &= ~(E1000_MANC_ARP_EN); | |
4872 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
4873 | } | |
4874 | ||
4875 | switch (adapter->hw.mac_type) { | |
4876 | case e1000_82573: | |
4877 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
4878 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
4879 | swsm | E1000_SWSM_DRV_LOAD); | |
4880 | break; | |
4881 | default: | |
4882 | break; | |
4883 | } | |
4884 | ||
4885 | if (netif_running(netdev)) | |
4886 | mod_timer(&adapter->watchdog_timer, jiffies); | |
4887 | } | |
4888 | ||
1da177e4 | 4889 | /* e1000_main.c */ |