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[linux-2.6-block.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1532ecea 34#define DRV_VERSION "7.3.21-k5-NAPI"
abec42a4
SH		 35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
a3aa1884 45static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
1da177e4
LT		 46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN		 88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN		 93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT		 125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4 127static void e1000_82547_tx_fifo_stall(unsigned long data);
3b29a56d
SH		 128static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
129 struct net_device *netdev);
1da177e4
LT		 130static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
131static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
132static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 133static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP		 134static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
bea3348e 136static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 137static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
edbbb3ca
JB		 140static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
141 struct e1000_rx_ring *rx_ring,
142 int *work_done, int work_to_do);
581d708e 143static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 144 struct e1000_rx_ring *rx_ring,
72d64a43 145 int cleaned_count);
edbbb3ca
JB		 146static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring,
148 int cleaned_count);
1da177e4
LT		 149static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
150static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
151 int cmd);
1da177e4
LT		 152static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
153static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
154static void e1000_tx_timeout(struct net_device *dev);
65f27f38 155static void e1000_reset_task(struct work_struct *work);
1da177e4 156static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 157static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
158 struct sk_buff *skb);
1da177e4
LT		 159
160static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP		 161static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
162static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 163static void e1000_restore_vlan(struct e1000_adapter *adapter);
164
6fdfef16 165#ifdef CONFIG_PM
b43fcd7d 166static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 167static int e1000_resume(struct pci_dev *pdev);
168#endif
c653e635 169static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 170
171#ifdef CONFIG_NET_POLL_CONTROLLER
172/* for netdump / net console */
173static void e1000_netpoll (struct net_device *netdev);
174#endif
175
1f753861
JB		 176#define COPYBREAK_DEFAULT 256
177static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
178module_param(copybreak, uint, 0644);
179MODULE_PARM_DESC(copybreak,
180 "Maximum size of packet that is copied to a new buffer on receive");
181
9026729b
AK		 182static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
183 pci_channel_state_t state);
184static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
185static void e1000_io_resume(struct pci_dev *pdev);
186
187static struct pci_error_handlers e1000_err_handler = {
188 .error_detected = e1000_io_error_detected,
189 .slot_reset = e1000_io_slot_reset,
190 .resume = e1000_io_resume,
191};
24025e4e 192
1da177e4
LT		 193static struct pci_driver e1000_driver = {
194 .name = e1000_driver_name,
195 .id_table = e1000_pci_tbl,
196 .probe = e1000_probe,
197 .remove = __devexit_p(e1000_remove),
c4e24f01 198#ifdef CONFIG_PM
1da177e4 199 /* Power Managment Hooks */
1da177e4 200 .suspend = e1000_suspend,
c653e635 201 .resume = e1000_resume,
1da177e4 202#endif
9026729b
AK		 203 .shutdown = e1000_shutdown,
204 .err_handler = &e1000_err_handler
1da177e4
LT		 205};
206
207MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
208MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
209MODULE_LICENSE("GPL");
210MODULE_VERSION(DRV_VERSION);
211
212static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
213module_param(debug, int, 0);
214MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
215
216/**
217 * e1000_init_module - Driver Registration Routine
218 *
219 * e1000_init_module is the first routine called when the driver is
220 * loaded. All it does is register with the PCI subsystem.
221 **/
222
64798845 223static int __init e1000_init_module(void)
1da177e4
LT		 224{
225 int ret;
226 printk(KERN_INFO "%s - version %s\n",
227 e1000_driver_string, e1000_driver_version);
228
229 printk(KERN_INFO "%s\n", e1000_copyright);
230
29917620 231 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 232 if (copybreak != COPYBREAK_DEFAULT) {
233 if (copybreak == 0)
234 printk(KERN_INFO "e1000: copybreak disabled\n");
235 else
236 printk(KERN_INFO "e1000: copybreak enabled for "
237 "packets <= %u bytes\n", copybreak);
238 }
1da177e4
LT		 239 return ret;
240}
241
242module_init(e1000_init_module);
243
244/**
245 * e1000_exit_module - Driver Exit Cleanup Routine
246 *
247 * e1000_exit_module is called just before the driver is removed
248 * from memory.
249 **/
250
64798845 251static void __exit e1000_exit_module(void)
1da177e4 252{
1da177e4
LT		 253 pci_unregister_driver(&e1000_driver);
254}
255
256module_exit(e1000_exit_module);
257
2db10a08
AK		 258static int e1000_request_irq(struct e1000_adapter *adapter)
259{
260 struct net_device *netdev = adapter->netdev;
3e18826c 261 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 262 int irq_flags = IRQF_SHARED;
263 int err;
2db10a08 264
e94bd23f
AK		 265 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
266 netdev);
267 if (err) {
2db10a08
AK		 268 DPRINTK(PROBE, ERR,
269 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 270 }
2db10a08
AK		 271
272 return err;
273}
274
275static void e1000_free_irq(struct e1000_adapter *adapter)
276{
277 struct net_device *netdev = adapter->netdev;
278
279 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK		 280}
281
1da177e4
LT		 282/**
283 * e1000_irq_disable - Mask off interrupt generation on the NIC
284 * @adapter: board private structure
285 **/
286
64798845 287static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 288{
1dc32918
JP		 289 struct e1000_hw *hw = &adapter->hw;
290
291 ew32(IMC, ~0);
292 E1000_WRITE_FLUSH();
1da177e4
LT		 293 synchronize_irq(adapter->pdev->irq);
294}
295
296/**
297 * e1000_irq_enable - Enable default interrupt generation settings
298 * @adapter: board private structure
299 **/
300
64798845 301static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 302{
1dc32918
JP		 303 struct e1000_hw *hw = &adapter->hw;
304
305 ew32(IMS, IMS_ENABLE_MASK);
306 E1000_WRITE_FLUSH();
1da177e4 307}
3ad2cc67 308
64798845 309static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 310{
1dc32918 311 struct e1000_hw *hw = &adapter->hw;
2d7edb92 312 struct net_device *netdev = adapter->netdev;
1dc32918 313 u16 vid = hw->mng_cookie.vlan_id;
406874a7 314 u16 old_vid = adapter->mng_vlan_id;
96838a40 315 if (adapter->vlgrp) {
5c15bdec 316 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 317 if (hw->mng_cookie.status &
2d7edb92
MC		 318 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
319 e1000_vlan_rx_add_vid(netdev, vid);
320 adapter->mng_vlan_id = vid;
321 } else
322 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 323
406874a7 324 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 325 (vid != old_vid) &&
5c15bdec 326 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 327 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 328 } else
329 adapter->mng_vlan_id = vid;
2d7edb92
MC		 330 }
331}
b55ccb35 332
64798845 333static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 334{
1dc32918
JP		 335 struct e1000_hw *hw = &adapter->hw;
336
0fccd0e9 337 if (adapter->en_mng_pt) {
1dc32918 338 u32 manc = er32(MANC);
0fccd0e9
JG		 339
340 /* disable hardware interception of ARP */
341 manc &= ~(E1000_MANC_ARP_EN);
342
1dc32918 343 ew32(MANC, manc);
0fccd0e9
JG		 344 }
345}
346
64798845 347static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 348{
1dc32918
JP		 349 struct e1000_hw *hw = &adapter->hw;
350
0fccd0e9 351 if (adapter->en_mng_pt) {
1dc32918 352 u32 manc = er32(MANC);
0fccd0e9
JG		 353
354 /* re-enable hardware interception of ARP */
355 manc |= E1000_MANC_ARP_EN;
356
1dc32918 357 ew32(MANC, manc);
0fccd0e9
JG		 358 }
359}
360
e0aac5a2
AK		 361/**
362 * e1000_configure - configure the hardware for RX and TX
363 * @adapter = private board structure
364 **/
365static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 366{
367 struct net_device *netdev = adapter->netdev;
2db10a08 368 int i;
1da177e4 369
db0ce50d 370 e1000_set_rx_mode(netdev);
1da177e4
LT		 371
372 e1000_restore_vlan(adapter);
0fccd0e9 373 e1000_init_manageability(adapter);
1da177e4
LT		 374
375 e1000_configure_tx(adapter);
376 e1000_setup_rctl(adapter);
377 e1000_configure_rx(adapter);
72d64a43
JK		 378 /* call E1000_DESC_UNUSED which always leaves
379 * at least 1 descriptor unused to make sure
380 * next_to_use != next_to_clean */
f56799ea 381 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 382 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 383 adapter->alloc_rx_buf(adapter, ring,
384 E1000_DESC_UNUSED(ring));
f56799ea 385 }
1da177e4 386
7bfa4816 387 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 388}
389
390int e1000_up(struct e1000_adapter *adapter)
391{
1dc32918
JP		 392 struct e1000_hw *hw = &adapter->hw;
393
e0aac5a2
AK		 394 /* hardware has been reset, we need to reload some things */
395 e1000_configure(adapter);
396
397 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 398
bea3348e 399 napi_enable(&adapter->napi);
c3570acb 400
5de55624
MC		 401 e1000_irq_enable(adapter);
402
4cb9be7a
JB		 403 netif_wake_queue(adapter->netdev);
404
79f3d399 405 /* fire a link change interrupt to start the watchdog */
1dc32918 406 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 407 return 0;
408}
409
79f05bf0
AK		 410/**
411 * e1000_power_up_phy - restore link in case the phy was powered down
412 * @adapter: address of board private structure
413 *
414 * The phy may be powered down to save power and turn off link when the
415 * driver is unloaded and wake on lan is not enabled (among others)
416 * *** this routine MUST be followed by a call to e1000_reset ***
417 *
418 **/
419
d658266e 420void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 421{
1dc32918 422 struct e1000_hw *hw = &adapter->hw;
406874a7 423 u16 mii_reg = 0;
79f05bf0
AK		 424
425 /* Just clear the power down bit to wake the phy back up */
1dc32918 426 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 427 /* according to the manual, the phy will retain its
428 * settings across a power-down/up cycle */
1dc32918 429 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 430 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 431 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 432 }
433}
434
435static void e1000_power_down_phy(struct e1000_adapter *adapter)
436{
1dc32918
JP		 437 struct e1000_hw *hw = &adapter->hw;
438
61c2505f 439 /* Power down the PHY so no link is implied when interface is down *
c3033b01 440 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 441 * (a) WoL is enabled
442 * (b) AMT is active
443 * (c) SoL/IDER session is active */
1dc32918
JP		 444 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
445 hw->media_type == e1000_media_type_copper) {
406874a7 446 u16 mii_reg = 0;
61c2505f 447
1dc32918 448 switch (hw->mac_type) {
61c2505f
BA		 449 case e1000_82540:
450 case e1000_82545:
451 case e1000_82545_rev_3:
452 case e1000_82546:
453 case e1000_82546_rev_3:
454 case e1000_82541:
455 case e1000_82541_rev_2:
456 case e1000_82547:
457 case e1000_82547_rev_2:
1dc32918 458 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 459 goto out;
460 break;
61c2505f
BA		 461 default:
462 goto out;
463 }
1dc32918 464 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 465 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 466 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 467 mdelay(1);
468 }
61c2505f
BA		 469out:
470 return;
79f05bf0
AK		 471}
472
64798845 473void e1000_down(struct e1000_adapter *adapter)
1da177e4 474{
a6c42322 475 struct e1000_hw *hw = &adapter->hw;
1da177e4 476 struct net_device *netdev = adapter->netdev;
a6c42322 477 u32 rctl, tctl;
1da177e4 478
1314bbf3
AK		 479 /* signal that we're down so the interrupt handler does not
480 * reschedule our watchdog timer */
481 set_bit(__E1000_DOWN, &adapter->flags);
482
a6c42322
JB		 483 /* disable receives in the hardware */
484 rctl = er32(RCTL);
485 ew32(RCTL, rctl & ~E1000_RCTL_EN);
486 /* flush and sleep below */
487
51851073 488 netif_tx_disable(netdev);
a6c42322
JB		 489
490 /* disable transmits in the hardware */
491 tctl = er32(TCTL);
492 tctl &= ~E1000_TCTL_EN;
493 ew32(TCTL, tctl);
494 /* flush both disables and wait for them to finish */
495 E1000_WRITE_FLUSH();
496 msleep(10);
497
bea3348e 498 napi_disable(&adapter->napi);
c3570acb 499
1da177e4 500 e1000_irq_disable(adapter);
c1605eb3 501
1da177e4
LT		 502 del_timer_sync(&adapter->tx_fifo_stall_timer);
503 del_timer_sync(&adapter->watchdog_timer);
504 del_timer_sync(&adapter->phy_info_timer);
505
7bfa4816 506 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 507 adapter->link_speed = 0;
508 adapter->link_duplex = 0;
509 netif_carrier_off(netdev);
1da177e4
LT		 510
511 e1000_reset(adapter);
581d708e
MC		 512 e1000_clean_all_tx_rings(adapter);
513 e1000_clean_all_rx_rings(adapter);
1da177e4 514}
1da177e4 515
64798845 516void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 517{
518 WARN_ON(in_interrupt());
519 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
520 msleep(1);
521 e1000_down(adapter);
522 e1000_up(adapter);
523 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 524}
525
64798845 526void e1000_reset(struct e1000_adapter *adapter)
1da177e4 527{
1dc32918 528 struct e1000_hw *hw = &adapter->hw;
406874a7 529 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 530 bool legacy_pba_adjust = false;
b7cb8c2c 531 u16 hwm;
1da177e4
LT		 532
533 /* Repartition Pba for greater than 9k mtu
534 * To take effect CTRL.RST is required.
535 */
536
1dc32918 537 switch (hw->mac_type) {
018ea44e
BA		 538 case e1000_82542_rev2_0:
539 case e1000_82542_rev2_1:
540 case e1000_82543:
541 case e1000_82544:
542 case e1000_82540:
543 case e1000_82541:
544 case e1000_82541_rev_2:
c3033b01 545 legacy_pba_adjust = true;
018ea44e
BA		 546 pba = E1000_PBA_48K;
547 break;
548 case e1000_82545:
549 case e1000_82545_rev_3:
550 case e1000_82546:
551 case e1000_82546_rev_3:
552 pba = E1000_PBA_48K;
553 break;
2d7edb92 554 case e1000_82547:
0e6ef3e0 555 case e1000_82547_rev_2:
c3033b01 556 legacy_pba_adjust = true;
2d7edb92
MC		 557 pba = E1000_PBA_30K;
558 break;
018ea44e
BA		 559 case e1000_undefined:
560 case e1000_num_macs:
2d7edb92
MC		 561 break;
562 }
563
c3033b01 564 if (legacy_pba_adjust) {
b7cb8c2c 565 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 566 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 567
1dc32918 568 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 569 adapter->tx_fifo_head = 0;
570 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
571 adapter->tx_fifo_size =
572 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
573 atomic_set(&adapter->tx_fifo_stall, 0);
574 }
b7cb8c2c 575 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 576 /* adjust PBA for jumbo frames */
1dc32918 577 ew32(PBA, pba);
018ea44e
BA		 578
579 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 580 * large enough to accommodate two full transmit packets,
018ea44e 581 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 582 * the Rx FIFO should be large enough to accommodate at least
018ea44e
BA		 583 * one full receive packet and is similarly rounded up and
584 * expressed in KB. */
1dc32918 585 pba = er32(PBA);
018ea44e
BA		 586 /* upper 16 bits has Tx packet buffer allocation size in KB */
587 tx_space = pba >> 16;
588 /* lower 16 bits has Rx packet buffer allocation size in KB */
589 pba &= 0xffff;
b7cb8c2c
JB		 590 /*
591 * the tx fifo also stores 16 bytes of information about the tx
592 * but don't include ethernet FCS because hardware appends it
593 */
594 min_tx_space = (hw->max_frame_size +
595 sizeof(struct e1000_tx_desc) -
596 ETH_FCS_LEN) * 2;
9099cfb9 597 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 598 min_tx_space >>= 10;
b7cb8c2c
JB		 599 /* software strips receive CRC, so leave room for it */
600 min_rx_space = hw->max_frame_size;
9099cfb9 601 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 602 min_rx_space >>= 10;
603
604 /* If current Tx allocation is less than the min Tx FIFO size,
605 * and the min Tx FIFO size is less than the current Rx FIFO
606 * allocation, take space away from current Rx allocation */
607 if (tx_space < min_tx_space &&
608 ((min_tx_space - tx_space) < pba)) {
609 pba = pba - (min_tx_space - tx_space);
610
611 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 612 switch (hw->mac_type) {
018ea44e
BA		 613 case e1000_82545 ... e1000_82546_rev_3:
614 pba &= ~(E1000_PBA_8K - 1);
615 break;
616 default:
617 break;
618 }
619
620 /* if short on rx space, rx wins and must trump tx
621 * adjustment or use Early Receive if available */
1532ecea
JB		 622 if (pba < min_rx_space)
623 pba = min_rx_space;
018ea44e 624 }
1da177e4 625 }
2d7edb92 626
1dc32918 627 ew32(PBA, pba);
1da177e4 628
b7cb8c2c
JB		 629 /*
630 * flow control settings:
631 * The high water mark must be low enough to fit one full frame
632 * (or the size used for early receive) above it in the Rx FIFO.
633 * Set it to the lower of:
634 * - 90% of the Rx FIFO size, and
635 * - the full Rx FIFO size minus the early receive size (for parts
636 * with ERT support assuming ERT set to E1000_ERT_2048), or
637 * - the full Rx FIFO size minus one full frame
638 */
639 hwm = min(((pba << 10) * 9 / 10),
640 ((pba << 10) - hw->max_frame_size));
641
642 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
643 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 644 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 645 hw->fc_send_xon = 1;
646 hw->fc = hw->original_fc;
1da177e4 647
2d7edb92 648 /* Allow time for pending master requests to run */
1dc32918
JP		 649 e1000_reset_hw(hw);
650 if (hw->mac_type >= e1000_82544)
651 ew32(WUC, 0);
09ae3e88 652
1dc32918 653 if (e1000_init_hw(hw))
1da177e4 654 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 655 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 656
657 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 658 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP		 659 hw->autoneg == 1 &&
660 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
661 u32 ctrl = er32(CTRL);
3d5460a0
JB		 662 /* clear phy power management bit if we are in gig only mode,
663 * which if enabled will attempt negotiation to 100Mb, which
664 * can cause a loss of link at power off or driver unload */
665 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 666 ew32(CTRL, ctrl);
3d5460a0
JB		 667 }
668
1da177e4 669 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 670 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 671
1dc32918
JP		 672 e1000_reset_adaptive(hw);
673 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 674
0fccd0e9 675 e1000_release_manageability(adapter);
1da177e4
LT		 676}
677
67b3c27c
AK		 678/**
679 * Dump the eeprom for users having checksum issues
680 **/
b4ea895d 681static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 682{
683 struct net_device *netdev = adapter->netdev;
684 struct ethtool_eeprom eeprom;
685 const struct ethtool_ops *ops = netdev->ethtool_ops;
686 u8 *data;
687 int i;
688 u16 csum_old, csum_new = 0;
689
690 eeprom.len = ops->get_eeprom_len(netdev);
691 eeprom.offset = 0;
692
693 data = kmalloc(eeprom.len, GFP_KERNEL);
694 if (!data) {
695 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
696 " data\n");
697 return;
698 }
699
700 ops->get_eeprom(netdev, &eeprom, data);
701
702 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
703 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
704 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
705 csum_new += data[i] + (data[i + 1] << 8);
706 csum_new = EEPROM_SUM - csum_new;
707
708 printk(KERN_ERR "/*********************/\n");
709 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
710 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
711
712 printk(KERN_ERR "Offset Values\n");
713 printk(KERN_ERR "======== ======\n");
714 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
715
716 printk(KERN_ERR "Include this output when contacting your support "
717 "provider.\n");
718 printk(KERN_ERR "This is not a software error! Something bad "
719 "happened to your hardware or\n");
720 printk(KERN_ERR "EEPROM image. Ignoring this "
721 "problem could result in further problems,\n");
722 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
723 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
724 "which is invalid\n");
725 printk(KERN_ERR "and requires you to set the proper MAC "
726 "address manually before continuing\n");
727 printk(KERN_ERR "to enable this network device.\n");
728 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
729 "to your hardware vendor\n");
63cd31f6 730 printk(KERN_ERR "or Intel Customer Support.\n");
67b3c27c
AK		 731 printk(KERN_ERR "/*********************/\n");
732
733 kfree(data);
734}
735
81250297
TI		 736/**
737 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
738 * @pdev: PCI device information struct
739 *
740 * Return true if an adapter needs ioport resources
741 **/
742static int e1000_is_need_ioport(struct pci_dev *pdev)
743{
744 switch (pdev->device) {
745 case E1000_DEV_ID_82540EM:
746 case E1000_DEV_ID_82540EM_LOM:
747 case E1000_DEV_ID_82540EP:
748 case E1000_DEV_ID_82540EP_LOM:
749 case E1000_DEV_ID_82540EP_LP:
750 case E1000_DEV_ID_82541EI:
751 case E1000_DEV_ID_82541EI_MOBILE:
752 case E1000_DEV_ID_82541ER:
753 case E1000_DEV_ID_82541ER_LOM:
754 case E1000_DEV_ID_82541GI:
755 case E1000_DEV_ID_82541GI_LF:
756 case E1000_DEV_ID_82541GI_MOBILE:
757 case E1000_DEV_ID_82544EI_COPPER:
758 case E1000_DEV_ID_82544EI_FIBER:
759 case E1000_DEV_ID_82544GC_COPPER:
760 case E1000_DEV_ID_82544GC_LOM:
761 case E1000_DEV_ID_82545EM_COPPER:
762 case E1000_DEV_ID_82545EM_FIBER:
763 case E1000_DEV_ID_82546EB_COPPER:
764 case E1000_DEV_ID_82546EB_FIBER:
765 case E1000_DEV_ID_82546EB_QUAD_COPPER:
766 return true;
767 default:
768 return false;
769 }
770}
771
0e7614bc
SH		 772static const struct net_device_ops e1000_netdev_ops = {
773 .ndo_open = e1000_open,
774 .ndo_stop = e1000_close,
00829823 775 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 776 .ndo_get_stats = e1000_get_stats,
777 .ndo_set_rx_mode = e1000_set_rx_mode,
778 .ndo_set_mac_address = e1000_set_mac,
779 .ndo_tx_timeout = e1000_tx_timeout,
780 .ndo_change_mtu = e1000_change_mtu,
781 .ndo_do_ioctl = e1000_ioctl,
782 .ndo_validate_addr = eth_validate_addr,
783
784 .ndo_vlan_rx_register = e1000_vlan_rx_register,
785 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
786 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
787#ifdef CONFIG_NET_POLL_CONTROLLER
788 .ndo_poll_controller = e1000_netpoll,
789#endif
790};
791
1da177e4
LT		 792/**
793 * e1000_probe - Device Initialization Routine
794 * @pdev: PCI device information struct
795 * @ent: entry in e1000_pci_tbl
796 *
797 * Returns 0 on success, negative on failure
798 *
799 * e1000_probe initializes an adapter identified by a pci_dev structure.
800 * The OS initialization, configuring of the adapter private structure,
801 * and a hardware reset occur.
802 **/
1dc32918
JP		 803static int __devinit e1000_probe(struct pci_dev *pdev,
804 const struct pci_device_id *ent)
1da177e4
LT		 805{
806 struct net_device *netdev;
807 struct e1000_adapter *adapter;
1dc32918 808 struct e1000_hw *hw;
2d7edb92 809
1da177e4 810 static int cards_found = 0;
120cd576 811 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 812 int i, err, pci_using_dac;
406874a7
JP		 813 u16 eeprom_data = 0;
814 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 815 int bars, need_ioport;
0795af57 816
81250297
TI		 817 /* do not allocate ioport bars when not needed */
818 need_ioport = e1000_is_need_ioport(pdev);
819 if (need_ioport) {
820 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
821 err = pci_enable_device(pdev);
822 } else {
823 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 824 err = pci_enable_device_mem(pdev);
81250297 825 }
c7be73bc 826 if (err)
1da177e4
LT		 827 return err;
828
6a35528a
YH		 829 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
830 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
1da177e4
LT		 831 pci_using_dac = 1;
832 } else {
284901a9 833 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc 834 if (err) {
284901a9 835 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc
JP		 836 if (err) {
837 E1000_ERR("No usable DMA configuration, "
838 "aborting\n");
839 goto err_dma;
840 }
1da177e4
LT		 841 }
842 pci_using_dac = 0;
843 }
844
81250297 845 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 846 if (err)
6dd62ab0 847 goto err_pci_reg;
1da177e4
LT		 848
849 pci_set_master(pdev);
dbb5aaeb
NN		 850 err = pci_save_state(pdev);
851 if (err)
852 goto err_alloc_etherdev;
1da177e4 853
6dd62ab0 854 err = -ENOMEM;
1da177e4 855 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 856 if (!netdev)
1da177e4 857 goto err_alloc_etherdev;
1da177e4 858
1da177e4
LT		 859 SET_NETDEV_DEV(netdev, &pdev->dev);
860
861 pci_set_drvdata(pdev, netdev);
60490fe0 862 adapter = netdev_priv(netdev);
1da177e4
LT		 863 adapter->netdev = netdev;
864 adapter->pdev = pdev;
1da177e4 865 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 866 adapter->bars = bars;
867 adapter->need_ioport = need_ioport;
1da177e4 868
1dc32918
JP		 869 hw = &adapter->hw;
870 hw->back = adapter;
871
6dd62ab0 872 err = -EIO;
275f165f 873 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 874 if (!hw->hw_addr)
1da177e4 875 goto err_ioremap;
1da177e4 876
81250297
TI		 877 if (adapter->need_ioport) {
878 for (i = BAR_1; i <= BAR_5; i++) {
879 if (pci_resource_len(pdev, i) == 0)
880 continue;
881 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
882 hw->io_base = pci_resource_start(pdev, i);
883 break;
884 }
1da177e4
LT		 885 }
886 }
887
0e7614bc 888 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 889 e1000_set_ethtool_ops(netdev);
1da177e4 890 netdev->watchdog_timeo = 5 * HZ;
bea3348e 891 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 892
0eb5a34c 893 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 894
1da177e4
LT		 895 adapter->bd_number = cards_found;
896
897 /* setup the private structure */
898
c7be73bc
JP		 899 err = e1000_sw_init(adapter);
900 if (err)
1da177e4
LT		 901 goto err_sw_init;
902
6dd62ab0 903 err = -EIO;
2d7edb92 904
1dc32918 905 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 906 netdev->features = NETIF_F_SG |
907 NETIF_F_HW_CSUM |
908 NETIF_F_HW_VLAN_TX |
909 NETIF_F_HW_VLAN_RX |
910 NETIF_F_HW_VLAN_FILTER;
911 }
912
1dc32918
JP		 913 if ((hw->mac_type >= e1000_82544) &&
914 (hw->mac_type != e1000_82547))
1da177e4 915 netdev->features |= NETIF_F_TSO;
2d7edb92 916
96838a40 917 if (pci_using_dac)
1da177e4
LT		 918 netdev->features |= NETIF_F_HIGHDMA;
919
20501a69 920 netdev->vlan_features |= NETIF_F_TSO;
20501a69
PM		 921 netdev->vlan_features |= NETIF_F_HW_CSUM;
922 netdev->vlan_features |= NETIF_F_SG;
923
1dc32918 924 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 925
cd94dd0b 926 /* initialize eeprom parameters */
1dc32918 927 if (e1000_init_eeprom_params(hw)) {
cd94dd0b 928 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 929 goto err_eeprom;
cd94dd0b
AK		 930 }
931
96838a40 932 /* before reading the EEPROM, reset the controller to
1da177e4 933 * put the device in a known good starting state */
96838a40 934
1dc32918 935 e1000_reset_hw(hw);
1da177e4
LT		 936
937 /* make sure the EEPROM is good */
1dc32918 938 if (e1000_validate_eeprom_checksum(hw) < 0) {
1da177e4 939 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 940 e1000_dump_eeprom(adapter);
941 /*
942 * set MAC address to all zeroes to invalidate and temporary
943 * disable this device for the user. This blocks regular
944 * traffic while still permitting ethtool ioctls from reaching
945 * the hardware as well as allowing the user to run the
946 * interface after manually setting a hw addr using
947 * `ip set address`
948 */
1dc32918 949 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 950 } else {
951 /* copy the MAC address out of the EEPROM */
1dc32918 952 if (e1000_read_mac_addr(hw))
67b3c27c 953 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1da177e4 954 }
67b3c27c 955 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 956 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
957 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 958
67b3c27c 959 if (!is_valid_ether_addr(netdev->perm_addr))
1da177e4 960 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4 961
1dc32918 962 e1000_get_bus_info(hw);
1da177e4
LT		 963
964 init_timer(&adapter->tx_fifo_stall_timer);
965 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
e982f17c 966 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 967
968 init_timer(&adapter->watchdog_timer);
969 adapter->watchdog_timer.function = &e1000_watchdog;
970 adapter->watchdog_timer.data = (unsigned long) adapter;
971
1da177e4
LT		 972 init_timer(&adapter->phy_info_timer);
973 adapter->phy_info_timer.function = &e1000_update_phy_info;
e982f17c 974 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 975
65f27f38 976 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 977
1da177e4
LT		 978 e1000_check_options(adapter);
979
980 /* Initial Wake on LAN setting
981 * If APM wake is enabled in the EEPROM,
982 * enable the ACPI Magic Packet filter
983 */
984
1dc32918 985 switch (hw->mac_type) {
1da177e4
LT		 986 case e1000_82542_rev2_0:
987 case e1000_82542_rev2_1:
988 case e1000_82543:
989 break;
990 case e1000_82544:
1dc32918 991 e1000_read_eeprom(hw,
1da177e4
LT		 992 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
993 eeprom_apme_mask = E1000_EEPROM_82544_APM;
994 break;
995 case e1000_82546:
996 case e1000_82546_rev_3:
1dc32918
JP		 997 if (er32(STATUS) & E1000_STATUS_FUNC_1){
998 e1000_read_eeprom(hw,
1da177e4
LT		 999 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1000 break;
1001 }
1002 /* Fall Through */
1003 default:
1dc32918 1004 e1000_read_eeprom(hw,
1da177e4
LT		 1005 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1006 break;
1007 }
96838a40 1008 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1009 adapter->eeprom_wol |= E1000_WUFC_MAG;
1010
1011 /* now that we have the eeprom settings, apply the special cases
1012 * where the eeprom may be wrong or the board simply won't support
1013 * wake on lan on a particular port */
1014 switch (pdev->device) {
1015 case E1000_DEV_ID_82546GB_PCIE:
1016 adapter->eeprom_wol = 0;
1017 break;
1018 case E1000_DEV_ID_82546EB_FIBER:
1019 case E1000_DEV_ID_82546GB_FIBER:
120cd576
JB		 1020 /* Wake events only supported on port A for dual fiber
1021 * regardless of eeprom setting */
1dc32918 1022 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1023 adapter->eeprom_wol = 0;
1024 break;
1025 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1026 /* if quad port adapter, disable WoL on all but port A */
1027 if (global_quad_port_a != 0)
1028 adapter->eeprom_wol = 0;
1029 else
1030 adapter->quad_port_a = 1;
1031 /* Reset for multiple quad port adapters */
1032 if (++global_quad_port_a == 4)
1033 global_quad_port_a = 0;
1034 break;
1035 }
1036
1037 /* initialize the wol settings based on the eeprom settings */
1038 adapter->wol = adapter->eeprom_wol;
de126489 1039 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1040
fb3d47d4 1041 /* print bus type/speed/width info */
fb3d47d4 1042 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1532ecea
JB		 1043 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1044 ((hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
fb3d47d4
JK		 1045 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1046 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1047 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1532ecea 1048 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" : "32-bit"));
fb3d47d4 1049
e174961c 1050 printk("%pM\n", netdev->dev_addr);
fb3d47d4 1051
1da177e4
LT		 1052 /* reset the hardware with the new settings */
1053 e1000_reset(adapter);
1054
416b5d10 1055 strcpy(netdev->name, "eth%d");
c7be73bc
JP		 1056 err = register_netdev(netdev);
1057 if (err)
416b5d10 1058 goto err_register;
1314bbf3 1059
eb62efd2
JB		 1060 /* carrier off reporting is important to ethtool even BEFORE open */
1061 netif_carrier_off(netdev);
1062
1da177e4
LT		 1063 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1064
1065 cards_found++;
1066 return 0;
1067
1068err_register:
6dd62ab0 1069err_eeprom:
1532ecea 1070 e1000_phy_hw_reset(hw);
6dd62ab0 1071
1dc32918
JP		 1072 if (hw->flash_address)
1073 iounmap(hw->flash_address);
6dd62ab0
VA		 1074 kfree(adapter->tx_ring);
1075 kfree(adapter->rx_ring);
1da177e4 1076err_sw_init:
1dc32918 1077 iounmap(hw->hw_addr);
1da177e4
LT		 1078err_ioremap:
1079 free_netdev(netdev);
1080err_alloc_etherdev:
81250297 1081 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA		 1082err_pci_reg:
1083err_dma:
1084 pci_disable_device(pdev);
1da177e4
LT		 1085 return err;
1086}
1087
1088/**
1089 * e1000_remove - Device Removal Routine
1090 * @pdev: PCI device information struct
1091 *
1092 * e1000_remove is called by the PCI subsystem to alert the driver
1093 * that it should release a PCI device. The could be caused by a
1094 * Hot-Plug event, or because the driver is going to be removed from
1095 * memory.
1096 **/
1097
64798845 1098static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1099{
1100 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1101 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1102 struct e1000_hw *hw = &adapter->hw;
1da177e4 1103
baa34745
JB		 1104 set_bit(__E1000_DOWN, &adapter->flags);
1105 del_timer_sync(&adapter->tx_fifo_stall_timer);
1106 del_timer_sync(&adapter->watchdog_timer);
1107 del_timer_sync(&adapter->phy_info_timer);
1108
28e53bdd 1109 cancel_work_sync(&adapter->reset_task);
be2b28ed 1110
0fccd0e9 1111 e1000_release_manageability(adapter);
1da177e4 1112
bea3348e
SH		 1113 unregister_netdev(netdev);
1114
1532ecea 1115 e1000_phy_hw_reset(hw);
1da177e4 1116
24025e4e
MC		 1117 kfree(adapter->tx_ring);
1118 kfree(adapter->rx_ring);
24025e4e 1119
1dc32918
JP		 1120 iounmap(hw->hw_addr);
1121 if (hw->flash_address)
1122 iounmap(hw->flash_address);
81250297 1123 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1124
1125 free_netdev(netdev);
1126
1127 pci_disable_device(pdev);
1128}
1129
1130/**
1131 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1132 * @adapter: board private structure to initialize
1133 *
1134 * e1000_sw_init initializes the Adapter private data structure.
1135 * Fields are initialized based on PCI device information and
1136 * OS network device settings (MTU size).
1137 **/
1138
64798845 1139static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT		 1140{
1141 struct e1000_hw *hw = &adapter->hw;
1142 struct net_device *netdev = adapter->netdev;
1143 struct pci_dev *pdev = adapter->pdev;
1144
1145 /* PCI config space info */
1146
1147 hw->vendor_id = pdev->vendor;
1148 hw->device_id = pdev->device;
1149 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1150 hw->subsystem_id = pdev->subsystem_device;
44c10138 1151 hw->revision_id = pdev->revision;
1da177e4
LT		 1152
1153 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1154
eb0f8054 1155 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT		 1156 hw->max_frame_size = netdev->mtu +
1157 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1158 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1159
1160 /* identify the MAC */
1161
96838a40 1162 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1163 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1164 return -EIO;
1165 }
1166
96838a40 1167 switch (hw->mac_type) {
1da177e4
LT		 1168 default:
1169 break;
1170 case e1000_82541:
1171 case e1000_82547:
1172 case e1000_82541_rev_2:
1173 case e1000_82547_rev_2:
1174 hw->phy_init_script = 1;
1175 break;
1176 }
1177
1178 e1000_set_media_type(hw);
1179
c3033b01
JP		 1180 hw->wait_autoneg_complete = false;
1181 hw->tbi_compatibility_en = true;
1182 hw->adaptive_ifs = true;
1da177e4
LT		 1183
1184 /* Copper options */
1185
96838a40 1186 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1187 hw->mdix = AUTO_ALL_MODES;
c3033b01 1188 hw->disable_polarity_correction = false;
1da177e4
LT		 1189 hw->master_slave = E1000_MASTER_SLAVE;
1190 }
1191
f56799ea
JK		 1192 adapter->num_tx_queues = 1;
1193 adapter->num_rx_queues = 1;
581d708e
MC		 1194
1195 if (e1000_alloc_queues(adapter)) {
1196 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1197 return -ENOMEM;
1198 }
1199
47313054 1200 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1201 e1000_irq_disable(adapter);
1202
1da177e4 1203 spin_lock_init(&adapter->stats_lock);
1da177e4 1204
1314bbf3
AK		 1205 set_bit(__E1000_DOWN, &adapter->flags);
1206
1da177e4
LT		 1207 return 0;
1208}
1209
581d708e
MC		 1210/**
1211 * e1000_alloc_queues - Allocate memory for all rings
1212 * @adapter: board private structure to initialize
1213 *
1214 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1215 * number of queues at compile-time.
581d708e
MC		 1216 **/
1217
64798845 1218static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1219{
1c7e5b12
YB		 1220 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1221 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1222 if (!adapter->tx_ring)
1223 return -ENOMEM;
581d708e 1224
1c7e5b12
YB		 1225 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1226 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1227 if (!adapter->rx_ring) {
1228 kfree(adapter->tx_ring);
1229 return -ENOMEM;
1230 }
581d708e 1231
581d708e
MC		 1232 return E1000_SUCCESS;
1233}
1234
1da177e4
LT		 1235/**
1236 * e1000_open - Called when a network interface is made active
1237 * @netdev: network interface device structure
1238 *
1239 * Returns 0 on success, negative value on failure
1240 *
1241 * The open entry point is called when a network interface is made
1242 * active by the system (IFF_UP). At this point all resources needed
1243 * for transmit and receive operations are allocated, the interrupt
1244 * handler is registered with the OS, the watchdog timer is started,
1245 * and the stack is notified that the interface is ready.
1246 **/
1247
64798845 1248static int e1000_open(struct net_device *netdev)
1da177e4 1249{
60490fe0 1250 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1251 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1252 int err;
1253
2db10a08 1254 /* disallow open during test */
1314bbf3 1255 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1256 return -EBUSY;
1257
eb62efd2
JB		 1258 netif_carrier_off(netdev);
1259
1da177e4 1260 /* allocate transmit descriptors */
e0aac5a2
AK		 1261 err = e1000_setup_all_tx_resources(adapter);
1262 if (err)
1da177e4
LT		 1263 goto err_setup_tx;
1264
1265 /* allocate receive descriptors */
e0aac5a2 1266 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1267 if (err)
e0aac5a2 1268 goto err_setup_rx;
b5bf28cd 1269
79f05bf0
AK		 1270 e1000_power_up_phy(adapter);
1271
2d7edb92 1272 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1273 if ((hw->mng_cookie.status &
2d7edb92
MC		 1274 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1275 e1000_update_mng_vlan(adapter);
1276 }
1da177e4 1277
e0aac5a2
AK		 1278 /* before we allocate an interrupt, we must be ready to handle it.
1279 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1280 * as soon as we call pci_request_irq, so we have to setup our
1281 * clean_rx handler before we do so. */
1282 e1000_configure(adapter);
1283
1284 err = e1000_request_irq(adapter);
1285 if (err)
1286 goto err_req_irq;
1287
1288 /* From here on the code is the same as e1000_up() */
1289 clear_bit(__E1000_DOWN, &adapter->flags);
1290
bea3348e 1291 napi_enable(&adapter->napi);
47313054 1292
e0aac5a2
AK		 1293 e1000_irq_enable(adapter);
1294
076152d5
BH		 1295 netif_start_queue(netdev);
1296
e0aac5a2 1297 /* fire a link status change interrupt to start the watchdog */
1dc32918 1298 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1299
1da177e4
LT		 1300 return E1000_SUCCESS;
1301
b5bf28cd 1302err_req_irq:
e0aac5a2 1303 e1000_power_down_phy(adapter);
581d708e 1304 e1000_free_all_rx_resources(adapter);
1da177e4 1305err_setup_rx:
581d708e 1306 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1307err_setup_tx:
1308 e1000_reset(adapter);
1309
1310 return err;
1311}
1312
1313/**
1314 * e1000_close - Disables a network interface
1315 * @netdev: network interface device structure
1316 *
1317 * Returns 0, this is not allowed to fail
1318 *
1319 * The close entry point is called when an interface is de-activated
1320 * by the OS. The hardware is still under the drivers control, but
1321 * needs to be disabled. A global MAC reset is issued to stop the
1322 * hardware, and all transmit and receive resources are freed.
1323 **/
1324
64798845 1325static int e1000_close(struct net_device *netdev)
1da177e4 1326{
60490fe0 1327 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1328 struct e1000_hw *hw = &adapter->hw;
1da177e4 1329
2db10a08 1330 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1331 e1000_down(adapter);
79f05bf0 1332 e1000_power_down_phy(adapter);
2db10a08 1333 e1000_free_irq(adapter);
1da177e4 1334
581d708e
MC		 1335 e1000_free_all_tx_resources(adapter);
1336 e1000_free_all_rx_resources(adapter);
1da177e4 1337
4666560a
BA		 1338 /* kill manageability vlan ID if supported, but not if a vlan with
1339 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1340 if ((hw->mng_cookie.status &
4666560a
BA		 1341 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1342 !(adapter->vlgrp &&
5c15bdec 1343 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1344 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1345 }
b55ccb35 1346
1da177e4
LT		 1347 return 0;
1348}
1349
1350/**
1351 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1352 * @adapter: address of board private structure
2d7edb92
MC		 1353 * @start: address of beginning of memory
1354 * @len: length of memory
1da177e4 1355 **/
64798845
JP		 1356static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1357 unsigned long len)
1da177e4 1358{
1dc32918 1359 struct e1000_hw *hw = &adapter->hw;
e982f17c 1360 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1361 unsigned long end = begin + len;
1362
2648345f
MC		 1363 /* First rev 82545 and 82546 need to not allow any memory
1364 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP		 1365 if (hw->mac_type == e1000_82545 ||
1366 hw->mac_type == e1000_82546) {
c3033b01 1367 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1368 }
1369
c3033b01 1370 return true;
1da177e4
LT		 1371}
1372
1373/**
1374 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1375 * @adapter: board private structure
581d708e 1376 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1377 *
1378 * Return 0 on success, negative on failure
1379 **/
1380
64798845
JP		 1381static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1382 struct e1000_tx_ring *txdr)
1da177e4 1383{
1da177e4
LT		 1384 struct pci_dev *pdev = adapter->pdev;
1385 int size;
1386
1387 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1388 txdr->buffer_info = vmalloc(size);
96838a40 1389 if (!txdr->buffer_info) {
2648345f
MC		 1390 DPRINTK(PROBE, ERR,
1391 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1392 return -ENOMEM;
1393 }
1394 memset(txdr->buffer_info, 0, size);
1395
1396 /* round up to nearest 4K */
1397
1398 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1399 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1400
1401 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1402 if (!txdr->desc) {
1da177e4 1403setup_tx_desc_die:
1da177e4 1404 vfree(txdr->buffer_info);
2648345f
MC		 1405 DPRINTK(PROBE, ERR,
1406 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1407 return -ENOMEM;
1408 }
1409
2648345f 1410 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1411 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1412 void *olddesc = txdr->desc;
1413 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1414 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1415 "at %p\n", txdr->size, txdr->desc);
1416 /* Try again, without freeing the previous */
1da177e4 1417 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1418 /* Failed allocation, critical failure */
96838a40 1419 if (!txdr->desc) {
1da177e4
LT		 1420 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1421 goto setup_tx_desc_die;
1422 }
1423
1424 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1425 /* give up */
2648345f
MC		 1426 pci_free_consistent(pdev, txdr->size, txdr->desc,
1427 txdr->dma);
1da177e4
LT		 1428 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1429 DPRINTK(PROBE, ERR,
2648345f
MC		 1430 "Unable to allocate aligned memory "
1431 "for the transmit descriptor ring\n");
1da177e4
LT		 1432 vfree(txdr->buffer_info);
1433 return -ENOMEM;
1434 } else {
2648345f 1435 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1436 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1437 }
1438 }
1439 memset(txdr->desc, 0, txdr->size);
1440
1441 txdr->next_to_use = 0;
1442 txdr->next_to_clean = 0;
1443
1444 return 0;
1445}
1446
581d708e
MC		 1447/**
1448 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1449 * (Descriptors) for all queues
1450 * @adapter: board private structure
1451 *
581d708e
MC		 1452 * Return 0 on success, negative on failure
1453 **/
1454
64798845 1455int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1456{
1457 int i, err = 0;
1458
f56799ea 1459 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1460 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1461 if (err) {
1462 DPRINTK(PROBE, ERR,
1463 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1464 for (i-- ; i >= 0; i--)
1465 e1000_free_tx_resources(adapter,
1466 &adapter->tx_ring[i]);
581d708e
MC		 1467 break;
1468 }
1469 }
1470
1471 return err;
1472}
1473
1da177e4
LT		 1474/**
1475 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1476 * @adapter: board private structure
1477 *
1478 * Configure the Tx unit of the MAC after a reset.
1479 **/
1480
64798845 1481static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1482{
406874a7 1483 u64 tdba;
581d708e 1484 struct e1000_hw *hw = &adapter->hw;
1532ecea 1485 u32 tdlen, tctl, tipg;
406874a7 1486 u32 ipgr1, ipgr2;
1da177e4
LT		 1487
1488 /* Setup the HW Tx Head and Tail descriptor pointers */
1489
f56799ea 1490 switch (adapter->num_tx_queues) {
24025e4e
MC		 1491 case 1:
1492 default:
581d708e
MC		 1493 tdba = adapter->tx_ring[0].dma;
1494 tdlen = adapter->tx_ring[0].count *
1495 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1496 ew32(TDLEN, tdlen);
1497 ew32(TDBAH, (tdba >> 32));
1498 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1499 ew32(TDT, 0);
1500 ew32(TDH, 0);
6a951698
AK		 1501 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1502 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1503 break;
1504 }
1da177e4
LT		 1505
1506 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1507 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1508 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1509 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1510 else
1511 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1512
581d708e 1513 switch (hw->mac_type) {
1da177e4
LT		 1514 case e1000_82542_rev2_0:
1515 case e1000_82542_rev2_1:
1516 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1517 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1518 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1519 break;
1520 default:
0fadb059
JK		 1521 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1522 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1523 break;
1da177e4 1524 }
0fadb059
JK		 1525 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1526 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1527 ew32(TIPG, tipg);
1da177e4
LT		 1528
1529 /* Set the Tx Interrupt Delay register */
1530
1dc32918 1531 ew32(TIDV, adapter->tx_int_delay);
581d708e 1532 if (hw->mac_type >= e1000_82540)
1dc32918 1533 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1534
1535 /* Program the Transmit Control Register */
1536
1dc32918 1537 tctl = er32(TCTL);
1da177e4 1538 tctl &= ~E1000_TCTL_CT;
7e6c9861 1539 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1540 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1541
581d708e 1542 e1000_config_collision_dist(hw);
1da177e4
LT		 1543
1544 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1545 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1546
1547 /* only set IDE if we are delaying interrupts using the timers */
1548 if (adapter->tx_int_delay)
1549 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1550
581d708e 1551 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1552 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1553 else
1554 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1555
1556 /* Cache if we're 82544 running in PCI-X because we'll
1557 * need this to apply a workaround later in the send path. */
581d708e
MC		 1558 if (hw->mac_type == e1000_82544 &&
1559 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1560 adapter->pcix_82544 = 1;
7e6c9861 1561
1dc32918 1562 ew32(TCTL, tctl);
7e6c9861 1563
1da177e4
LT		 1564}
1565
1566/**
1567 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1568 * @adapter: board private structure
581d708e 1569 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1570 *
1571 * Returns 0 on success, negative on failure
1572 **/
1573
64798845
JP		 1574static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1575 struct e1000_rx_ring *rxdr)
1da177e4 1576{
1da177e4 1577 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1578 int size, desc_len;
1da177e4
LT		 1579
1580 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1581 rxdr->buffer_info = vmalloc(size);
581d708e 1582 if (!rxdr->buffer_info) {
2648345f
MC		 1583 DPRINTK(PROBE, ERR,
1584 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1585 return -ENOMEM;
1586 }
1587 memset(rxdr->buffer_info, 0, size);
1588
1532ecea 1589 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1590
1da177e4
LT		 1591 /* Round up to nearest 4K */
1592
2d7edb92 1593 rxdr->size = rxdr->count * desc_len;
9099cfb9 1594 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1595
1596 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1597
581d708e
MC		 1598 if (!rxdr->desc) {
1599 DPRINTK(PROBE, ERR,
1600 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1601setup_rx_desc_die:
1da177e4
LT		 1602 vfree(rxdr->buffer_info);
1603 return -ENOMEM;
1604 }
1605
2648345f 1606 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1607 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1608 void *olddesc = rxdr->desc;
1609 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1610 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1611 "at %p\n", rxdr->size, rxdr->desc);
1612 /* Try again, without freeing the previous */
1da177e4 1613 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1614 /* Failed allocation, critical failure */
581d708e 1615 if (!rxdr->desc) {
1da177e4 1616 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1617 DPRINTK(PROBE, ERR,
1618 "Unable to allocate memory "
1619 "for the receive descriptor ring\n");
1da177e4
LT		 1620 goto setup_rx_desc_die;
1621 }
1622
1623 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1624 /* give up */
2648345f
MC		 1625 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1626 rxdr->dma);
1da177e4 1627 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1628 DPRINTK(PROBE, ERR,
1629 "Unable to allocate aligned memory "
1630 "for the receive descriptor ring\n");
581d708e 1631 goto setup_rx_desc_die;
1da177e4 1632 } else {
2648345f 1633 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1634 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1635 }
1636 }
1637 memset(rxdr->desc, 0, rxdr->size);
1638
1639 rxdr->next_to_clean = 0;
1640 rxdr->next_to_use = 0;
edbbb3ca 1641 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1642
1643 return 0;
1644}
1645
581d708e
MC		 1646/**
1647 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1648 * (Descriptors) for all queues
1649 * @adapter: board private structure
1650 *
581d708e
MC		 1651 * Return 0 on success, negative on failure
1652 **/
1653
64798845 1654int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1655{
1656 int i, err = 0;
1657
f56799ea 1658 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1659 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1660 if (err) {
1661 DPRINTK(PROBE, ERR,
1662 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1663 for (i-- ; i >= 0; i--)
1664 e1000_free_rx_resources(adapter,
1665 &adapter->rx_ring[i]);
581d708e
MC		 1666 break;
1667 }
1668 }
1669
1670 return err;
1671}
1672
1da177e4 1673/**
2648345f 1674 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1675 * @adapter: Board private structure
1676 **/
64798845 1677static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1678{
1dc32918 1679 struct e1000_hw *hw = &adapter->hw;
630b25cd 1680 u32 rctl;
1da177e4 1681
1dc32918 1682 rctl = er32(RCTL);
1da177e4
LT		 1683
1684 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1685
1686 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1687 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1688 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1689
1dc32918 1690 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1691 rctl |= E1000_RCTL_SBP;
1692 else
1693 rctl &= ~E1000_RCTL_SBP;
1694
2d7edb92
MC		 1695 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1696 rctl &= ~E1000_RCTL_LPE;
1697 else
1698 rctl |= E1000_RCTL_LPE;
1699
1da177e4 1700 /* Setup buffer sizes */
9e2feace
AK		 1701 rctl &= ~E1000_RCTL_SZ_4096;
1702 rctl |= E1000_RCTL_BSEX;
1703 switch (adapter->rx_buffer_len) {
a1415ee6
JK		 1704 case E1000_RXBUFFER_2048:
1705 default:
1706 rctl |= E1000_RCTL_SZ_2048;
1707 rctl &= ~E1000_RCTL_BSEX;
1708 break;
1709 case E1000_RXBUFFER_4096:
1710 rctl |= E1000_RCTL_SZ_4096;
1711 break;
1712 case E1000_RXBUFFER_8192:
1713 rctl |= E1000_RCTL_SZ_8192;
1714 break;
1715 case E1000_RXBUFFER_16384:
1716 rctl |= E1000_RCTL_SZ_16384;
1717 break;
2d7edb92
MC		 1718 }
1719
1dc32918 1720 ew32(RCTL, rctl);
1da177e4
LT		 1721}
1722
1723/**
1724 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1725 * @adapter: board private structure
1726 *
1727 * Configure the Rx unit of the MAC after a reset.
1728 **/
1729
64798845 1730static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1731{
406874a7 1732 u64 rdba;
581d708e 1733 struct e1000_hw *hw = &adapter->hw;
1532ecea 1734 u32 rdlen, rctl, rxcsum;
2d7edb92 1735
edbbb3ca
JB		 1736 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1737 rdlen = adapter->rx_ring[0].count *
1738 sizeof(struct e1000_rx_desc);
1739 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1740 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1741 } else {
1742 rdlen = adapter->rx_ring[0].count *
1743 sizeof(struct e1000_rx_desc);
1744 adapter->clean_rx = e1000_clean_rx_irq;
1745 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1746 }
1da177e4
LT		 1747
1748 /* disable receives while setting up the descriptors */
1dc32918
JP		 1749 rctl = er32(RCTL);
1750 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1751
1752 /* set the Receive Delay Timer Register */
1dc32918 1753 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1754
581d708e 1755 if (hw->mac_type >= e1000_82540) {
1dc32918 1756 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1757 if (adapter->itr_setting != 0)
1dc32918 1758 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1759 }
1760
581d708e
MC		 1761 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1762 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1763 switch (adapter->num_rx_queues) {
24025e4e
MC		 1764 case 1:
1765 default:
581d708e 1766 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 1767 ew32(RDLEN, rdlen);
1768 ew32(RDBAH, (rdba >> 32));
1769 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1770 ew32(RDT, 0);
1771 ew32(RDH, 0);
6a951698
AK		 1772 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1773 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1774 break;
24025e4e
MC		 1775 }
1776
1da177e4 1777 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1778 if (hw->mac_type >= e1000_82543) {
1dc32918 1779 rxcsum = er32(RXCSUM);
630b25cd 1780 if (adapter->rx_csum)
2d7edb92 1781 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1782 else
2d7edb92 1783 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1784 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1785 ew32(RXCSUM, rxcsum);
1da177e4
LT		 1786 }
1787
1788 /* Enable Receives */
1dc32918 1789 ew32(RCTL, rctl);
1da177e4
LT		 1790}
1791
1792/**
581d708e 1793 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1794 * @adapter: board private structure
581d708e 1795 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1796 *
1797 * Free all transmit software resources
1798 **/
1799
64798845
JP		 1800static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1801 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1802{
1803 struct pci_dev *pdev = adapter->pdev;
1804
581d708e 1805 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1806
581d708e
MC		 1807 vfree(tx_ring->buffer_info);
1808 tx_ring->buffer_info = NULL;
1da177e4 1809
581d708e 1810 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1811
581d708e
MC		 1812 tx_ring->desc = NULL;
1813}
1814
1815/**
1816 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1817 * @adapter: board private structure
1818 *
1819 * Free all transmit software resources
1820 **/
1821
64798845 1822void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1823{
1824 int i;
1825
f56799ea 1826 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1827 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1828}
1829
64798845
JP		 1830static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1831 struct e1000_buffer *buffer_info)
1da177e4 1832{
602c0554
AD		 1833 if (buffer_info->dma) {
1834 if (buffer_info->mapped_as_page)
1835 pci_unmap_page(adapter->pdev, buffer_info->dma,
1836 buffer_info->length, PCI_DMA_TODEVICE);
1837 else
1838 pci_unmap_single(adapter->pdev, buffer_info->dma,
1839 buffer_info->length,
1840 PCI_DMA_TODEVICE);
1841 buffer_info->dma = 0;
1842 }
a9ebadd6 1843 if (buffer_info->skb) {
1da177e4 1844 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 1845 buffer_info->skb = NULL;
1846 }
37e73df8 1847 buffer_info->time_stamp = 0;
a9ebadd6 1848 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 1849}
1850
1851/**
1852 * e1000_clean_tx_ring - Free Tx Buffers
1853 * @adapter: board private structure
581d708e 1854 * @tx_ring: ring to be cleaned
1da177e4
LT		 1855 **/
1856
64798845
JP		 1857static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1858 struct e1000_tx_ring *tx_ring)
1da177e4 1859{
1dc32918 1860 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1861 struct e1000_buffer *buffer_info;
1862 unsigned long size;
1863 unsigned int i;
1864
1865 /* Free all the Tx ring sk_buffs */
1866
96838a40 1867 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1868 buffer_info = &tx_ring->buffer_info[i];
1869 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1870 }
1871
1872 size = sizeof(struct e1000_buffer) * tx_ring->count;
1873 memset(tx_ring->buffer_info, 0, size);
1874
1875 /* Zero out the descriptor ring */
1876
1877 memset(tx_ring->desc, 0, tx_ring->size);
1878
1879 tx_ring->next_to_use = 0;
1880 tx_ring->next_to_clean = 0;
fd803241 1881 tx_ring->last_tx_tso = 0;
1da177e4 1882
1dc32918
JP		 1883 writel(0, hw->hw_addr + tx_ring->tdh);
1884 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 1885}
1886
1887/**
1888 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1889 * @adapter: board private structure
1890 **/
1891
64798845 1892static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 1893{
1894 int i;
1895
f56799ea 1896 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1897 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1898}
1899
1900/**
1901 * e1000_free_rx_resources - Free Rx Resources
1902 * @adapter: board private structure
581d708e 1903 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1904 *
1905 * Free all receive software resources
1906 **/
1907
64798845
JP		 1908static void e1000_free_rx_resources(struct e1000_adapter *adapter,
1909 struct e1000_rx_ring *rx_ring)
1da177e4 1910{
1da177e4
LT		 1911 struct pci_dev *pdev = adapter->pdev;
1912
581d708e 1913 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1914
1915 vfree(rx_ring->buffer_info);
1916 rx_ring->buffer_info = NULL;
1917
1918 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1919
1920 rx_ring->desc = NULL;
1921}
1922
1923/**
581d708e 1924 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1925 * @adapter: board private structure
581d708e
MC		 1926 *
1927 * Free all receive software resources
1928 **/
1929
64798845 1930void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1931{
1932 int i;
1933
f56799ea 1934 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 1935 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1936}
1937
1938/**
1939 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1940 * @adapter: board private structure
1941 * @rx_ring: ring to free buffers from
1da177e4
LT		 1942 **/
1943
64798845
JP		 1944static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
1945 struct e1000_rx_ring *rx_ring)
1da177e4 1946{
1dc32918 1947 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1948 struct e1000_buffer *buffer_info;
1949 struct pci_dev *pdev = adapter->pdev;
1950 unsigned long size;
630b25cd 1951 unsigned int i;
1da177e4
LT		 1952
1953 /* Free all the Rx ring sk_buffs */
96838a40 1954 for (i = 0; i < rx_ring->count; i++) {
1da177e4 1955 buffer_info = &rx_ring->buffer_info[i];
edbbb3ca
JB		 1956 if (buffer_info->dma &&
1957 adapter->clean_rx == e1000_clean_rx_irq) {
1958 pci_unmap_single(pdev, buffer_info->dma,
1959 buffer_info->length,
1960 PCI_DMA_FROMDEVICE);
1961 } else if (buffer_info->dma &&
1962 adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
1963 pci_unmap_page(pdev, buffer_info->dma,
1964 buffer_info->length,
1965 PCI_DMA_FROMDEVICE);
679be3ba 1966 }
1da177e4 1967
679be3ba 1968 buffer_info->dma = 0;
edbbb3ca
JB		 1969 if (buffer_info->page) {
1970 put_page(buffer_info->page);
1971 buffer_info->page = NULL;
1972 }
679be3ba 1973 if (buffer_info->skb) {
1da177e4
LT		 1974 dev_kfree_skb(buffer_info->skb);
1975 buffer_info->skb = NULL;
997f5cbd 1976 }
1da177e4
LT		 1977 }
1978
edbbb3ca
JB		 1979 /* there also may be some cached data from a chained receive */
1980 if (rx_ring->rx_skb_top) {
1981 dev_kfree_skb(rx_ring->rx_skb_top);
1982 rx_ring->rx_skb_top = NULL;
1983 }
1984
1da177e4
LT		 1985 size = sizeof(struct e1000_buffer) * rx_ring->count;
1986 memset(rx_ring->buffer_info, 0, size);
1987
1988 /* Zero out the descriptor ring */
1da177e4
LT		 1989 memset(rx_ring->desc, 0, rx_ring->size);
1990
1991 rx_ring->next_to_clean = 0;
1992 rx_ring->next_to_use = 0;
1993
1dc32918
JP		 1994 writel(0, hw->hw_addr + rx_ring->rdh);
1995 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 1996}
1997
1998/**
1999 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2000 * @adapter: board private structure
2001 **/
2002
64798845 2003static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2004{
2005 int i;
2006
f56799ea 2007 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2008 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2009}
2010
2011/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2012 * and memory write and invalidate disabled for certain operations
2013 */
64798845 2014static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2015{
1dc32918 2016 struct e1000_hw *hw = &adapter->hw;
1da177e4 2017 struct net_device *netdev = adapter->netdev;
406874a7 2018 u32 rctl;
1da177e4 2019
1dc32918 2020 e1000_pci_clear_mwi(hw);
1da177e4 2021
1dc32918 2022 rctl = er32(RCTL);
1da177e4 2023 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2024 ew32(RCTL, rctl);
2025 E1000_WRITE_FLUSH();
1da177e4
LT		 2026 mdelay(5);
2027
96838a40 2028 if (netif_running(netdev))
581d708e 2029 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2030}
2031
64798845 2032static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2033{
1dc32918 2034 struct e1000_hw *hw = &adapter->hw;
1da177e4 2035 struct net_device *netdev = adapter->netdev;
406874a7 2036 u32 rctl;
1da177e4 2037
1dc32918 2038 rctl = er32(RCTL);
1da177e4 2039 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2040 ew32(RCTL, rctl);
2041 E1000_WRITE_FLUSH();
1da177e4
LT		 2042 mdelay(5);
2043
1dc32918
JP		 2044 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2045 e1000_pci_set_mwi(hw);
1da177e4 2046
96838a40 2047 if (netif_running(netdev)) {
72d64a43
JK		 2048 /* No need to loop, because 82542 supports only 1 queue */
2049 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2050 e1000_configure_rx(adapter);
72d64a43 2051 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2052 }
2053}
2054
2055/**
2056 * e1000_set_mac - Change the Ethernet Address of the NIC
2057 * @netdev: network interface device structure
2058 * @p: pointer to an address structure
2059 *
2060 * Returns 0 on success, negative on failure
2061 **/
2062
64798845 2063static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2064{
60490fe0 2065 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2066 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2067 struct sockaddr *addr = p;
2068
96838a40 2069 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2070 return -EADDRNOTAVAIL;
2071
2072 /* 82542 2.0 needs to be in reset to write receive address registers */
2073
1dc32918 2074 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2075 e1000_enter_82542_rst(adapter);
2076
2077 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2078 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2079
1dc32918 2080 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2081
1dc32918 2082 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2083 e1000_leave_82542_rst(adapter);
2084
2085 return 0;
2086}
2087
2088/**
db0ce50d 2089 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2090 * @netdev: network interface device structure
2091 *
db0ce50d
PM		 2092 * The set_rx_mode entry point is called whenever the unicast or multicast
2093 * address lists or the network interface flags are updated. This routine is
2094 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2095 * promiscuous mode, and all-multi behavior.
2096 **/
2097
64798845 2098static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2099{
60490fe0 2100 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2101 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2102 struct netdev_hw_addr *ha;
2103 bool use_uc = false;
db0ce50d 2104 struct dev_addr_list *mc_ptr;
406874a7
JP		 2105 u32 rctl;
2106 u32 hash_value;
868d5309 2107 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2108 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2109 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2110
2111 if (!mcarray) {
2112 DPRINTK(PROBE, ERR, "memory allocation failed\n");
2113 return;
2114 }
cd94dd0b 2115
2648345f
MC		 2116 /* Check for Promiscuous and All Multicast modes */
2117
1dc32918 2118 rctl = er32(RCTL);
1da177e4 2119
96838a40 2120 if (netdev->flags & IFF_PROMISC) {
1da177e4 2121 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2122 rctl &= ~E1000_RCTL_VFE;
1da177e4 2123 } else {
1532ecea 2124 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2125 rctl |= E1000_RCTL_MPE;
1532ecea 2126 else
746b9f02 2127 rctl &= ~E1000_RCTL_MPE;
1532ecea
JB		 2128 /* Enable VLAN filter if there is a VLAN */
2129 if (adapter->vlgrp)
2130 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2131 }
2132
32e7bfc4 2133 if (netdev_uc_count(netdev) > rar_entries - 1) {
db0ce50d
PM		 2134 rctl |= E1000_RCTL_UPE;
2135 } else if (!(netdev->flags & IFF_PROMISC)) {
2136 rctl &= ~E1000_RCTL_UPE;
ccffad25 2137 use_uc = true;
1da177e4
LT		 2138 }
2139
1dc32918 2140 ew32(RCTL, rctl);
1da177e4
LT		 2141
2142 /* 82542 2.0 needs to be in reset to write receive address registers */
2143
96838a40 2144 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2145 e1000_enter_82542_rst(adapter);
2146
db0ce50d
PM		 2147 /* load the first 14 addresses into the exact filters 1-14. Unicast
2148 * addresses take precedence to avoid disabling unicast filtering
2149 * when possible.
2150 *
1da177e4
LT		 2151 * RAR 0 is used for the station MAC adddress
2152 * if there are not 14 addresses, go ahead and clear the filters
2153 */
ccffad25
JP		 2154 i = 1;
2155 if (use_uc)
32e7bfc4 2156 netdev_for_each_uc_addr(ha, netdev) {
ccffad25
JP		 2157 if (i == rar_entries)
2158 break;
2159 e1000_rar_set(hw, ha->addr, i++);
2160 }
2161
2162 WARN_ON(i == rar_entries);
2163
7a81e9f3
JP		 2164 netdev_for_each_mc_addr(mc_ptr, netdev) {
2165 if (i == rar_entries) {
2166 /* load any remaining addresses into the hash table */
2167 u32 hash_reg, hash_bit, mta;
2168 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
2169 hash_reg = (hash_value >> 5) & 0x7F;
2170 hash_bit = hash_value & 0x1F;
2171 mta = (1 << hash_bit);
2172 mcarray[hash_reg] |= mta;
2173 }
2174 else {
2175 e1000_rar_set(hw, mc_ptr->da_addr, i++);
1da177e4
LT		 2176 }
2177 }
2178
7a81e9f3
JP		 2179 for (; i < rar_entries; i++) {
2180 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2181 E1000_WRITE_FLUSH();
2182 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2183 E1000_WRITE_FLUSH();
1da177e4
LT		 2184 }
2185
81c52285
JB		 2186 /* write the hash table completely, write from bottom to avoid
2187 * both stupid write combining chipsets, and flushing each write */
2188 for (i = mta_reg_count - 1; i >= 0 ; i--) {
2189 /*
2190 * If we are on an 82544 has an errata where writing odd
2191 * offsets overwrites the previous even offset, but writing
2192 * backwards over the range solves the issue by always
2193 * writing the odd offset first
2194 */
2195 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2196 }
2197 E1000_WRITE_FLUSH();
2198
96838a40 2199 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2200 e1000_leave_82542_rst(adapter);
81c52285
JB		 2201
2202 kfree(mcarray);
1da177e4
LT		 2203}
2204
2205/* Need to wait a few seconds after link up to get diagnostic information from
2206 * the phy */
2207
64798845 2208static void e1000_update_phy_info(unsigned long data)
1da177e4 2209{
e982f17c 2210 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP		 2211 struct e1000_hw *hw = &adapter->hw;
2212 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT		 2213}
2214
2215/**
2216 * e1000_82547_tx_fifo_stall - Timer Call-back
2217 * @data: pointer to adapter cast into an unsigned long
2218 **/
2219
64798845 2220static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2221{
e982f17c 2222 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2223 struct e1000_hw *hw = &adapter->hw;
1da177e4 2224 struct net_device *netdev = adapter->netdev;
406874a7 2225 u32 tctl;
1da177e4 2226
96838a40 2227 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2228 if ((er32(TDT) == er32(TDH)) &&
2229 (er32(TDFT) == er32(TDFH)) &&
2230 (er32(TDFTS) == er32(TDFHS))) {
2231 tctl = er32(TCTL);
2232 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2233 ew32(TDFT, adapter->tx_head_addr);
2234 ew32(TDFH, adapter->tx_head_addr);
2235 ew32(TDFTS, adapter->tx_head_addr);
2236 ew32(TDFHS, adapter->tx_head_addr);
2237 ew32(TCTL, tctl);
2238 E1000_WRITE_FLUSH();
1da177e4
LT		 2239
2240 adapter->tx_fifo_head = 0;
2241 atomic_set(&adapter->tx_fifo_stall, 0);
2242 netif_wake_queue(netdev);
baa34745 2243 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
1da177e4
LT		 2244 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2245 }
2246 }
2247}
2248
b548192a 2249bool e1000_has_link(struct e1000_adapter *adapter)
be0f0719
JB		 2250{
2251 struct e1000_hw *hw = &adapter->hw;
2252 bool link_active = false;
be0f0719
JB		 2253
2254 /* get_link_status is set on LSC (link status) interrupt or
2255 * rx sequence error interrupt. get_link_status will stay
2256 * false until the e1000_check_for_link establishes link
2257 * for copper adapters ONLY
2258 */
2259 switch (hw->media_type) {
2260 case e1000_media_type_copper:
2261 if (hw->get_link_status) {
120a5d0d 2262 e1000_check_for_link(hw);
be0f0719
JB		 2263 link_active = !hw->get_link_status;
2264 } else {
2265 link_active = true;
2266 }
2267 break;
2268 case e1000_media_type_fiber:
120a5d0d 2269 e1000_check_for_link(hw);
be0f0719
JB		 2270 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2271 break;
2272 case e1000_media_type_internal_serdes:
120a5d0d 2273 e1000_check_for_link(hw);
be0f0719
JB		 2274 link_active = hw->serdes_has_link;
2275 break;
2276 default:
2277 break;
2278 }
2279
2280 return link_active;
2281}
2282
1da177e4
LT		 2283/**
2284 * e1000_watchdog - Timer Call-back
2285 * @data: pointer to adapter cast into an unsigned long
2286 **/
64798845 2287static void e1000_watchdog(unsigned long data)
1da177e4 2288{
e982f17c 2289 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2290 struct e1000_hw *hw = &adapter->hw;
1da177e4 2291 struct net_device *netdev = adapter->netdev;
545c67c0 2292 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2293 u32 link, tctl;
90fb5135 2294
be0f0719
JB		 2295 link = e1000_has_link(adapter);
2296 if ((netif_carrier_ok(netdev)) && link)
2297 goto link_up;
1da177e4 2298
96838a40
JB		 2299 if (link) {
2300 if (!netif_carrier_ok(netdev)) {
406874a7 2301 u32 ctrl;
c3033b01 2302 bool txb2b = true;
be0f0719 2303 /* update snapshot of PHY registers on LSC */
1dc32918 2304 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2305 &adapter->link_speed,
2306 &adapter->link_duplex);
2307
1dc32918 2308 ctrl = er32(CTRL);
b30c4d8f
JK		 2309 printk(KERN_INFO "e1000: %s NIC Link is Up %d Mbps %s, "
2310 "Flow Control: %s\n",
2311 netdev->name,
2312 adapter->link_speed,
2313 adapter->link_duplex == FULL_DUPLEX ?
9669f53b
AK		 2314 "Full Duplex" : "Half Duplex",
2315 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2316 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2317 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2318 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2319
7e6c9861
JK		 2320 /* tweak tx_queue_len according to speed/duplex
2321 * and adjust the timeout factor */
66a2b0a3
JK		 2322 netdev->tx_queue_len = adapter->tx_queue_len;
2323 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2324 switch (adapter->link_speed) {
2325 case SPEED_10:
c3033b01 2326 txb2b = false;
7e6c9861 2327 netdev->tx_queue_len = 10;
be0f0719 2328 adapter->tx_timeout_factor = 16;
7e6c9861
JK		 2329 break;
2330 case SPEED_100:
c3033b01 2331 txb2b = false;
7e6c9861
JK		 2332 netdev->tx_queue_len = 100;
2333 /* maybe add some timeout factor ? */
2334 break;
2335 }
2336
1532ecea 2337 /* enable transmits in the hardware */
1dc32918 2338 tctl = er32(TCTL);
7e6c9861 2339 tctl |= E1000_TCTL_EN;
1dc32918 2340 ew32(TCTL, tctl);
66a2b0a3 2341
1da177e4 2342 netif_carrier_on(netdev);
baa34745
JB		 2343 if (!test_bit(__E1000_DOWN, &adapter->flags))
2344 mod_timer(&adapter->phy_info_timer,
2345 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2346 adapter->smartspeed = 0;
2347 }
2348 } else {
96838a40 2349 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2350 adapter->link_speed = 0;
2351 adapter->link_duplex = 0;
b30c4d8f
JK		 2352 printk(KERN_INFO "e1000: %s NIC Link is Down\n",
2353 netdev->name);
1da177e4 2354 netif_carrier_off(netdev);
baa34745
JB		 2355
2356 if (!test_bit(__E1000_DOWN, &adapter->flags))
2357 mod_timer(&adapter->phy_info_timer,
2358 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2359 }
2360
2361 e1000_smartspeed(adapter);
2362 }
2363
be0f0719 2364link_up:
1da177e4
LT		 2365 e1000_update_stats(adapter);
2366
1dc32918 2367 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2368 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2369 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2370 adapter->colc_old = adapter->stats.colc;
2371
2372 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2373 adapter->gorcl_old = adapter->stats.gorcl;
2374 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2375 adapter->gotcl_old = adapter->stats.gotcl;
2376
1dc32918 2377 e1000_update_adaptive(hw);
1da177e4 2378
f56799ea 2379 if (!netif_carrier_ok(netdev)) {
581d708e 2380 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2381 /* We've lost link, so the controller stops DMA,
2382 * but we've got queued Tx work that's never going
2383 * to get done, so reset controller to flush Tx.
2384 * (Do the reset outside of interrupt context). */
87041639
JK		 2385 adapter->tx_timeout_count++;
2386 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 2387 /* return immediately since reset is imminent */
2388 return;
1da177e4
LT		 2389 }
2390 }
2391
1da177e4 2392 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2393 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2394
2648345f 2395 /* Force detection of hung controller every watchdog period */
c3033b01 2396 adapter->detect_tx_hung = true;
1da177e4
LT		 2397
2398 /* Reset the timer */
baa34745
JB		 2399 if (!test_bit(__E1000_DOWN, &adapter->flags))
2400 mod_timer(&adapter->watchdog_timer,
2401 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2402}
2403
835bb129
JB		 2404enum latency_range {
2405 lowest_latency = 0,
2406 low_latency = 1,
2407 bulk_latency = 2,
2408 latency_invalid = 255
2409};
2410
2411/**
2412 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB		 2413 * @adapter: pointer to adapter
2414 * @itr_setting: current adapter->itr
2415 * @packets: the number of packets during this measurement interval
2416 * @bytes: the number of bytes during this measurement interval
2417 *
835bb129
JB		 2418 * Stores a new ITR value based on packets and byte
2419 * counts during the last interrupt. The advantage of per interrupt
2420 * computation is faster updates and more accurate ITR for the current
2421 * traffic pattern. Constants in this function were computed
2422 * based on theoretical maximum wire speed and thresholds were set based
2423 * on testing data as well as attempting to minimize response time
2424 * while increasing bulk throughput.
2425 * this functionality is controlled by the InterruptThrottleRate module
2426 * parameter (see e1000_param.c)
835bb129
JB		 2427 **/
2428static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2429 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2430{
2431 unsigned int retval = itr_setting;
2432 struct e1000_hw *hw = &adapter->hw;
2433
2434 if (unlikely(hw->mac_type < e1000_82540))
2435 goto update_itr_done;
2436
2437 if (packets == 0)
2438 goto update_itr_done;
2439
835bb129
JB		 2440 switch (itr_setting) {
2441 case lowest_latency:
2b65326e
JB		 2442 /* jumbo frames get bulk treatment*/
2443 if (bytes/packets > 8000)
2444 retval = bulk_latency;
2445 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2446 retval = low_latency;
2447 break;
2448 case low_latency: /* 50 usec aka 20000 ints/s */
2449 if (bytes > 10000) {
2b65326e
JB		 2450 /* jumbo frames need bulk latency setting */
2451 if (bytes/packets > 8000)
2452 retval = bulk_latency;
2453 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2454 retval = bulk_latency;
2455 else if ((packets > 35))
2456 retval = lowest_latency;
2b65326e
JB		 2457 } else if (bytes/packets > 2000)
2458 retval = bulk_latency;
2459 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2460 retval = lowest_latency;
2461 break;
2462 case bulk_latency: /* 250 usec aka 4000 ints/s */
2463 if (bytes > 25000) {
2464 if (packets > 35)
2465 retval = low_latency;
2b65326e
JB		 2466 } else if (bytes < 6000) {
2467 retval = low_latency;
835bb129
JB		 2468 }
2469 break;
2470 }
2471
2472update_itr_done:
2473 return retval;
2474}
2475
2476static void e1000_set_itr(struct e1000_adapter *adapter)
2477{
2478 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2479 u16 current_itr;
2480 u32 new_itr = adapter->itr;
835bb129
JB		 2481
2482 if (unlikely(hw->mac_type < e1000_82540))
2483 return;
2484
2485 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2486 if (unlikely(adapter->link_speed != SPEED_1000)) {
2487 current_itr = 0;
2488 new_itr = 4000;
2489 goto set_itr_now;
2490 }
2491
2492 adapter->tx_itr = e1000_update_itr(adapter,
2493 adapter->tx_itr,
2494 adapter->total_tx_packets,
2495 adapter->total_tx_bytes);
2b65326e
JB		 2496 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2497 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2498 adapter->tx_itr = low_latency;
2499
835bb129
JB		 2500 adapter->rx_itr = e1000_update_itr(adapter,
2501 adapter->rx_itr,
2502 adapter->total_rx_packets,
2503 adapter->total_rx_bytes);
2b65326e
JB		 2504 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2505 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2506 adapter->rx_itr = low_latency;
835bb129
JB		 2507
2508 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2509
835bb129
JB		 2510 switch (current_itr) {
2511 /* counts and packets in update_itr are dependent on these numbers */
2512 case lowest_latency:
2513 new_itr = 70000;
2514 break;
2515 case low_latency:
2516 new_itr = 20000; /* aka hwitr = ~200 */
2517 break;
2518 case bulk_latency:
2519 new_itr = 4000;
2520 break;
2521 default:
2522 break;
2523 }
2524
2525set_itr_now:
2526 if (new_itr != adapter->itr) {
2527 /* this attempts to bias the interrupt rate towards Bulk
2528 * by adding intermediate steps when interrupt rate is
2529 * increasing */
2530 new_itr = new_itr > adapter->itr ?
2531 min(adapter->itr + (new_itr >> 2), new_itr) :
2532 new_itr;
2533 adapter->itr = new_itr;
1dc32918 2534 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129
JB		 2535 }
2536
2537 return;
2538}
2539
1da177e4
LT		 2540#define E1000_TX_FLAGS_CSUM 0x00000001
2541#define E1000_TX_FLAGS_VLAN 0x00000002
2542#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2543#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2544#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2545#define E1000_TX_FLAGS_VLAN_SHIFT 16
2546
64798845
JP		 2547static int e1000_tso(struct e1000_adapter *adapter,
2548 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2549{
1da177e4 2550 struct e1000_context_desc *context_desc;
545c67c0 2551 struct e1000_buffer *buffer_info;
1da177e4 2552 unsigned int i;
406874a7
JP		 2553 u32 cmd_length = 0;
2554 u16 ipcse = 0, tucse, mss;
2555 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2556 int err;
2557
89114afd 2558 if (skb_is_gso(skb)) {
1da177e4
LT		 2559 if (skb_header_cloned(skb)) {
2560 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2561 if (err)
2562 return err;
2563 }
2564
ab6a5bb6 2565 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2566 mss = skb_shinfo(skb)->gso_size;
60828236 2567 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2568 struct iphdr *iph = ip_hdr(skb);
2569 iph->tot_len = 0;
2570 iph->check = 0;
aa8223c7
ACM		 2571 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2572 iph->daddr, 0,
2573 IPPROTO_TCP,
2574 0);
2d7edb92 2575 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2576 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2577 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2578 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2579 tcp_hdr(skb)->check =
0660e03f
ACM		 2580 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2581 &ipv6_hdr(skb)->daddr,
2582 0, IPPROTO_TCP, 0);
2d7edb92 2583 ipcse = 0;
2d7edb92 2584 }
bbe735e4 2585 ipcss = skb_network_offset(skb);
eddc9ec5 2586 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2587 tucss = skb_transport_offset(skb);
aa8223c7 2588 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2589 tucse = 0;
2590
2591 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2592 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2593
581d708e
MC		 2594 i = tx_ring->next_to_use;
2595 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2596 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2597
2598 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2599 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2600 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2601 context_desc->upper_setup.tcp_fields.tucss = tucss;
2602 context_desc->upper_setup.tcp_fields.tucso = tucso;
2603 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2604 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2605 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2606 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2607
545c67c0 2608 buffer_info->time_stamp = jiffies;
a9ebadd6 2609 buffer_info->next_to_watch = i;
545c67c0 2610
581d708e
MC		 2611 if (++i == tx_ring->count) i = 0;
2612 tx_ring->next_to_use = i;
1da177e4 2613
c3033b01 2614 return true;
1da177e4 2615 }
c3033b01 2616 return false;
1da177e4
LT		 2617}
2618
64798845
JP		 2619static bool e1000_tx_csum(struct e1000_adapter *adapter,
2620 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2621{
2622 struct e1000_context_desc *context_desc;
545c67c0 2623 struct e1000_buffer *buffer_info;
1da177e4 2624 unsigned int i;
406874a7 2625 u8 css;
3ed30676 2626 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2627
3ed30676
DG		 2628 if (skb->ip_summed != CHECKSUM_PARTIAL)
2629 return false;
1da177e4 2630
3ed30676 2631 switch (skb->protocol) {
09640e63 2632 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2633 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2634 cmd_len |= E1000_TXD_CMD_TCP;
2635 break;
09640e63 2636 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2637 /* XXX not handling all IPV6 headers */
2638 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2639 cmd_len |= E1000_TXD_CMD_TCP;
2640 break;
2641 default:
2642 if (unlikely(net_ratelimit()))
2643 DPRINTK(DRV, WARNING,
2644 "checksum_partial proto=%x!\n", skb->protocol);
2645 break;
2646 }
1da177e4 2647
3ed30676 2648 css = skb_transport_offset(skb);
1da177e4 2649
3ed30676
DG		 2650 i = tx_ring->next_to_use;
2651 buffer_info = &tx_ring->buffer_info[i];
2652 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2653
3ed30676
DG		 2654 context_desc->lower_setup.ip_config = 0;
2655 context_desc->upper_setup.tcp_fields.tucss = css;
2656 context_desc->upper_setup.tcp_fields.tucso =
2657 css + skb->csum_offset;
2658 context_desc->upper_setup.tcp_fields.tucse = 0;
2659 context_desc->tcp_seg_setup.data = 0;
2660 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2661
3ed30676
DG		 2662 buffer_info->time_stamp = jiffies;
2663 buffer_info->next_to_watch = i;
1da177e4 2664
3ed30676
DG		 2665 if (unlikely(++i == tx_ring->count)) i = 0;
2666 tx_ring->next_to_use = i;
2667
2668 return true;
1da177e4
LT		 2669}
2670
2671#define E1000_MAX_TXD_PWR 12
2672#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2673
64798845
JP		 2674static int e1000_tx_map(struct e1000_adapter *adapter,
2675 struct e1000_tx_ring *tx_ring,
2676 struct sk_buff *skb, unsigned int first,
2677 unsigned int max_per_txd, unsigned int nr_frags,
2678 unsigned int mss)
1da177e4 2679{
1dc32918 2680 struct e1000_hw *hw = &adapter->hw;
602c0554 2681 struct pci_dev *pdev = adapter->pdev;
37e73df8 2682 struct e1000_buffer *buffer_info;
d20b606c 2683 unsigned int len = skb_headlen(skb);
602c0554 2684 unsigned int offset = 0, size, count = 0, i;
1da177e4 2685 unsigned int f;
1da177e4
LT		 2686
2687 i = tx_ring->next_to_use;
2688
96838a40 2689 while (len) {
37e73df8 2690 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2691 size = min(len, max_per_txd);
fd803241
JK		 2692 /* Workaround for Controller erratum --
2693 * descriptor for non-tso packet in a linear SKB that follows a
2694 * tso gets written back prematurely before the data is fully
0f15a8fa 2695 * DMA'd to the controller */
fd803241 2696 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2697 !skb_is_gso(skb)) {
fd803241
JK		 2698 tx_ring->last_tx_tso = 0;
2699 size -= 4;
2700 }
2701
1da177e4
LT		 2702 /* Workaround for premature desc write-backs
2703 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2704 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2705 size -= 4;
97338bde
MC		 2706 /* work-around for errata 10 and it applies
2707 * to all controllers in PCI-X mode
2708 * The fix is to make sure that the first descriptor of a
2709 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2710 */
1dc32918 2711 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2712 (size > 2015) && count == 0))
2713 size = 2015;
96838a40 2714
1da177e4
LT		 2715 /* Workaround for potential 82544 hang in PCI-X. Avoid
2716 * terminating buffers within evenly-aligned dwords. */
96838a40 2717 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2718 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2719 size > 4))
2720 size -= 4;
2721
2722 buffer_info->length = size;
cdd7549e 2723 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2724 buffer_info->time_stamp = jiffies;
602c0554
AD		 2725 buffer_info->mapped_as_page = false;
2726 buffer_info->dma = pci_map_single(pdev, skb->data + offset,
2727 size, PCI_DMA_TODEVICE);
2728 if (pci_dma_mapping_error(pdev, buffer_info->dma))
2729 goto dma_error;
a9ebadd6 2730 buffer_info->next_to_watch = i;
1da177e4
LT		 2731
2732 len -= size;
2733 offset += size;
2734 count++;
37e73df8
AD		 2735 if (len) {
2736 i++;
2737 if (unlikely(i == tx_ring->count))
2738 i = 0;
2739 }
1da177e4
LT		 2740 }
2741
96838a40 2742 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2743 struct skb_frag_struct *frag;
2744
2745 frag = &skb_shinfo(skb)->frags[f];
2746 len = frag->size;
602c0554 2747 offset = frag->page_offset;
1da177e4 2748
96838a40 2749 while (len) {
37e73df8
AD		 2750 i++;
2751 if (unlikely(i == tx_ring->count))
2752 i = 0;
2753
1da177e4
LT		 2754 buffer_info = &tx_ring->buffer_info[i];
2755 size = min(len, max_per_txd);
1da177e4
LT		 2756 /* Workaround for premature desc write-backs
2757 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2758 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 2759 size -= 4;
1da177e4
LT		 2760 /* Workaround for potential 82544 hang in PCI-X.
2761 * Avoid terminating buffers within evenly-aligned
2762 * dwords. */
96838a40 2763 if (unlikely(adapter->pcix_82544 &&
8fce4731
JB		 2764 !((unsigned long)(page_to_phys(frag->page) + offset
2765 + size - 1) & 4) &&
2766 size > 4))
1da177e4
LT		 2767 size -= 4;
2768
2769 buffer_info->length = size;
1da177e4 2770 buffer_info->time_stamp = jiffies;
602c0554
AD		 2771 buffer_info->mapped_as_page = true;
2772 buffer_info->dma = pci_map_page(pdev, frag->page,
2773 offset, size,
2774 PCI_DMA_TODEVICE);
2775 if (pci_dma_mapping_error(pdev, buffer_info->dma))
2776 goto dma_error;
a9ebadd6 2777 buffer_info->next_to_watch = i;
1da177e4
LT		 2778
2779 len -= size;
2780 offset += size;
2781 count++;
1da177e4
LT		 2782 }
2783 }
2784
1da177e4
LT		 2785 tx_ring->buffer_info[i].skb = skb;
2786 tx_ring->buffer_info[first].next_to_watch = i;
2787
2788 return count;
602c0554
AD		 2789
2790dma_error:
2791 dev_err(&pdev->dev, "TX DMA map failed\n");
2792 buffer_info->dma = 0;
c1fa347f 2793 if (count)
602c0554 2794 count--;
c1fa347f
RK		 2795
2796 while (count--) {
2797 if (i==0)
602c0554 2798 i += tx_ring->count;
c1fa347f 2799 i--;
602c0554
AD		 2800 buffer_info = &tx_ring->buffer_info[i];
2801 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2802 }
2803
2804 return 0;
1da177e4
LT		 2805}
2806
64798845
JP		 2807static void e1000_tx_queue(struct e1000_adapter *adapter,
2808 struct e1000_tx_ring *tx_ring, int tx_flags,
2809 int count)
1da177e4 2810{
1dc32918 2811 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2812 struct e1000_tx_desc *tx_desc = NULL;
2813 struct e1000_buffer *buffer_info;
406874a7 2814 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 2815 unsigned int i;
2816
96838a40 2817 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2818 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2819 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2820 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2821
96838a40 2822 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2823 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2824 }
2825
96838a40 2826 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2827 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2828 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2829 }
2830
96838a40 2831 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2832 txd_lower |= E1000_TXD_CMD_VLE;
2833 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2834 }
2835
2836 i = tx_ring->next_to_use;
2837
96838a40 2838 while (count--) {
1da177e4
LT		 2839 buffer_info = &tx_ring->buffer_info[i];
2840 tx_desc = E1000_TX_DESC(*tx_ring, i);
2841 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2842 tx_desc->lower.data =
2843 cpu_to_le32(txd_lower | buffer_info->length);
2844 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2845 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2846 }
2847
2848 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2849
2850 /* Force memory writes to complete before letting h/w
2851 * know there are new descriptors to fetch. (Only
2852 * applicable for weak-ordered memory model archs,
2853 * such as IA-64). */
2854 wmb();
2855
2856 tx_ring->next_to_use = i;
1dc32918 2857 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 2858 /* we need this if more than one processor can write to our tail
2859 * at a time, it syncronizes IO on IA64/Altix systems */
2860 mmiowb();
1da177e4
LT		 2861}
2862
2863/**
2864 * 82547 workaround to avoid controller hang in half-duplex environment.
2865 * The workaround is to avoid queuing a large packet that would span
2866 * the internal Tx FIFO ring boundary by notifying the stack to resend
2867 * the packet at a later time. This gives the Tx FIFO an opportunity to
2868 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2869 * to the beginning of the Tx FIFO.
2870 **/
2871
2872#define E1000_FIFO_HDR 0x10
2873#define E1000_82547_PAD_LEN 0x3E0
2874
64798845
JP		 2875static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
2876 struct sk_buff *skb)
1da177e4 2877{
406874a7
JP		 2878 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2879 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 2880
9099cfb9 2881 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 2882
96838a40 2883 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2884 goto no_fifo_stall_required;
2885
96838a40 2886 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2887 return 1;
2888
96838a40 2889 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2890 atomic_set(&adapter->tx_fifo_stall, 1);
2891 return 1;
2892 }
2893
2894no_fifo_stall_required:
2895 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2896 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2897 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2898 return 0;
2899}
2900
65c7973f
JB		 2901static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
2902{
2903 struct e1000_adapter *adapter = netdev_priv(netdev);
2904 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
2905
2906 netif_stop_queue(netdev);
2907 /* Herbert's original patch had:
2908 * smp_mb__after_netif_stop_queue();
2909 * but since that doesn't exist yet, just open code it. */
2910 smp_mb();
2911
2912 /* We need to check again in a case another CPU has just
2913 * made room available. */
2914 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
2915 return -EBUSY;
2916
2917 /* A reprieve! */
2918 netif_start_queue(netdev);
fcfb1224 2919 ++adapter->restart_queue;
65c7973f
JB		 2920 return 0;
2921}
2922
2923static int e1000_maybe_stop_tx(struct net_device *netdev,
2924 struct e1000_tx_ring *tx_ring, int size)
2925{
2926 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
2927 return 0;
2928 return __e1000_maybe_stop_tx(netdev, size);
2929}
2930
1da177e4 2931#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 2932static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
2933 struct net_device *netdev)
1da177e4 2934{
60490fe0 2935 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2936 struct e1000_hw *hw = &adapter->hw;
581d708e 2937 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2938 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2939 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2940 unsigned int tx_flags = 0;
6d1e3aa7 2941 unsigned int len = skb->len - skb->data_len;
6d1e3aa7
KK		 2942 unsigned int nr_frags;
2943 unsigned int mss;
1da177e4 2944 int count = 0;
76c224bc 2945 int tso;
1da177e4 2946 unsigned int f;
1da177e4 2947
65c7973f
JB		 2948 /* This goes back to the question of how to logically map a tx queue
2949 * to a flow. Right now, performance is impacted slightly negatively
2950 * if using multiple tx queues. If the stack breaks away from a
2951 * single qdisc implementation, we can look at this again. */
581d708e 2952 tx_ring = adapter->tx_ring;
24025e4e 2953
581d708e 2954 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2955 dev_kfree_skb_any(skb);
2956 return NETDEV_TX_OK;
2957 }
2958
7967168c 2959 mss = skb_shinfo(skb)->gso_size;
76c224bc 2960 /* The controller does a simple calculation to
1da177e4
LT		 2961 * make sure there is enough room in the FIFO before
2962 * initiating the DMA for each buffer. The calc is:
2963 * 4 = ceil(buffer len/mss). To make sure we don't
2964 * overrun the FIFO, adjust the max buffer len if mss
2965 * drops. */
96838a40 2966 if (mss) {
406874a7 2967 u8 hdr_len;
1da177e4
LT		 2968 max_per_txd = min(mss << 2, max_per_txd);
2969 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2970
ab6a5bb6 2971 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 2972 if (skb->data_len && hdr_len == len) {
1dc32918 2973 switch (hw->mac_type) {
9f687888 2974 unsigned int pull_size;
683a2aa3
HX		 2975 case e1000_82544:
2976 /* Make sure we have room to chop off 4 bytes,
2977 * and that the end alignment will work out to
2978 * this hardware's requirements
2979 * NOTE: this is a TSO only workaround
2980 * if end byte alignment not correct move us
2981 * into the next dword */
27a884dc 2982 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 2983 break;
2984 /* fall through */
9f687888
JK		 2985 pull_size = min((unsigned int)4, skb->data_len);
2986 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 2987 DPRINTK(DRV, ERR,
9f687888
JK		 2988 "__pskb_pull_tail failed.\n");
2989 dev_kfree_skb_any(skb);
749dfc70 2990 return NETDEV_TX_OK;
9f687888
JK		 2991 }
2992 len = skb->len - skb->data_len;
2993 break;
2994 default:
2995 /* do nothing */
2996 break;
d74bbd3b 2997 }
9a3056da 2998 }
1da177e4
LT		 2999 }
3000
9a3056da 3001 /* reserve a descriptor for the offload context */
84fa7933 3002 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3003 count++;
2648345f 3004 count++;
fd803241 3005
fd803241 3006 /* Controller Erratum workaround */
89114afd 3007 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3008 count++;
fd803241 3009
1da177e4
LT		 3010 count += TXD_USE_COUNT(len, max_txd_pwr);
3011
96838a40 3012 if (adapter->pcix_82544)
1da177e4
LT		 3013 count++;
3014
96838a40 3015 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3016 * in PCI-X mode, so add one more descriptor to the count
3017 */
1dc32918 3018 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3019 (len > 2015)))
3020 count++;
3021
1da177e4 3022 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3023 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3024 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3025 max_txd_pwr);
96838a40 3026 if (adapter->pcix_82544)
1da177e4
LT		 3027 count += nr_frags;
3028
1da177e4
LT		 3029 /* need: count + 2 desc gap to keep tail from touching
3030 * head, otherwise try next time */
8017943e 3031 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3032 return NETDEV_TX_BUSY;
1da177e4 3033
1dc32918 3034 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3035 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3036 netif_stop_queue(netdev);
baa34745
JB		 3037 if (!test_bit(__E1000_DOWN, &adapter->flags))
3038 mod_timer(&adapter->tx_fifo_stall_timer,
3039 jiffies + 1);
1da177e4
LT		 3040 return NETDEV_TX_BUSY;
3041 }
3042 }
3043
96838a40 3044 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3045 tx_flags |= E1000_TX_FLAGS_VLAN;
3046 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3047 }
3048
581d708e 3049 first = tx_ring->next_to_use;
96838a40 3050
581d708e 3051 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3052 if (tso < 0) {
3053 dev_kfree_skb_any(skb);
3054 return NETDEV_TX_OK;
3055 }
3056
fd803241 3057 if (likely(tso)) {
8fce4731
JB		 3058 if (likely(hw->mac_type != e1000_82544))
3059 tx_ring->last_tx_tso = 1;
1da177e4 3060 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3061 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3062 tx_flags |= E1000_TX_FLAGS_CSUM;
3063
60828236 3064 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3065 tx_flags |= E1000_TX_FLAGS_IPV4;
3066
37e73df8
AD		 3067 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
3068 nr_frags, mss);
1da177e4 3069
37e73df8
AD		 3070 if (count) {
3071 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD		 3072 /* Make sure there is space in the ring for the next send. */
3073 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3074
37e73df8
AD		 3075 } else {
3076 dev_kfree_skb_any(skb);
3077 tx_ring->buffer_info[first].time_stamp = 0;
3078 tx_ring->next_to_use = first;
3079 }
1da177e4 3080
1da177e4
LT		 3081 return NETDEV_TX_OK;
3082}
3083
3084/**
3085 * e1000_tx_timeout - Respond to a Tx Hang
3086 * @netdev: network interface device structure
3087 **/
3088
64798845 3089static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3090{
60490fe0 3091 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3092
3093 /* Do the reset outside of interrupt context */
87041639
JK		 3094 adapter->tx_timeout_count++;
3095 schedule_work(&adapter->reset_task);
1da177e4
LT		 3096}
3097
64798845 3098static void e1000_reset_task(struct work_struct *work)
1da177e4 3099{
65f27f38
DH		 3100 struct e1000_adapter *adapter =
3101 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3102
2db10a08 3103 e1000_reinit_locked(adapter);
1da177e4
LT		 3104}
3105
3106/**
3107 * e1000_get_stats - Get System Network Statistics
3108 * @netdev: network interface device structure
3109 *
3110 * Returns the address of the device statistics structure.
3111 * The statistics are actually updated from the timer callback.
3112 **/
3113
64798845 3114static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3115{
6b7660cd 3116 /* only return the current stats */
5fe31def 3117 return &netdev->stats;
1da177e4
LT		 3118}
3119
3120/**
3121 * e1000_change_mtu - Change the Maximum Transfer Unit
3122 * @netdev: network interface device structure
3123 * @new_mtu: new value for maximum frame size
3124 *
3125 * Returns 0 on success, negative on failure
3126 **/
3127
64798845 3128static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3129{
60490fe0 3130 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3131 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3132 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3133
96838a40
JB		 3134 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3135 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3136 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3137 return -EINVAL;
2d7edb92 3138 }
1da177e4 3139
997f5cbd 3140 /* Adapter-specific max frame size limits. */
1dc32918 3141 switch (hw->mac_type) {
9e2feace 3142 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3143 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
997f5cbd 3144 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3145 return -EINVAL;
2d7edb92 3146 }
997f5cbd 3147 break;
997f5cbd
JK		 3148 default:
3149 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3150 break;
1da177e4
LT		 3151 }
3152
3d6114e7
JB		 3153 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3154 msleep(1);
3155 /* e1000_down has a dependency on max_frame_size */
3156 hw->max_frame_size = max_frame;
3157 if (netif_running(netdev))
3158 e1000_down(adapter);
3159
87f5032e 3160 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3161 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3162 * larger slab size.
3163 * i.e. RXBUFFER_2048 --> size-4096 slab
3164 * however with the new *_jumbo_rx* routines, jumbo receives will use
3165 * fragmented skbs */
9e2feace 3166
9926146b 3167 if (max_frame <= E1000_RXBUFFER_2048)
9e2feace 3168 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3169 else
3170#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3171 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3172#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3173 adapter->rx_buffer_len = PAGE_SIZE;
3174#endif
9e2feace
AK		 3175
3176 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3177 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3178 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3179 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3180 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3181
3d6114e7
JB		 3182 printk(KERN_INFO "e1000: %s changing MTU from %d to %d\n",
3183 netdev->name, netdev->mtu, new_mtu);
2d7edb92
MC		 3184 netdev->mtu = new_mtu;
3185
2db10a08 3186 if (netif_running(netdev))
3d6114e7
JB		 3187 e1000_up(adapter);
3188 else
3189 e1000_reset(adapter);
3190
3191 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3192
1da177e4
LT		 3193 return 0;
3194}
3195
3196/**
3197 * e1000_update_stats - Update the board statistics counters
3198 * @adapter: board private structure
3199 **/
3200
64798845 3201void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3202{
5fe31def 3203 struct net_device *netdev = adapter->netdev;
1da177e4 3204 struct e1000_hw *hw = &adapter->hw;
282f33c9 3205 struct pci_dev *pdev = adapter->pdev;
1da177e4 3206 unsigned long flags;
406874a7 3207 u16 phy_tmp;
1da177e4
LT		 3208
3209#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3210
282f33c9
LV		 3211 /*
3212 * Prevent stats update while adapter is being reset, or if the pci
3213 * connection is down.
3214 */
9026729b 3215 if (adapter->link_speed == 0)
282f33c9 3216 return;
81b1955e 3217 if (pci_channel_offline(pdev))
9026729b
AK		 3218 return;
3219
1da177e4
LT		 3220 spin_lock_irqsave(&adapter->stats_lock, flags);
3221
828d055f 3222 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3223 * called from the interrupt context, so they must only
3224 * be written while holding adapter->stats_lock
3225 */
3226
1dc32918
JP		 3227 adapter->stats.crcerrs += er32(CRCERRS);
3228 adapter->stats.gprc += er32(GPRC);
3229 adapter->stats.gorcl += er32(GORCL);
3230 adapter->stats.gorch += er32(GORCH);
3231 adapter->stats.bprc += er32(BPRC);
3232 adapter->stats.mprc += er32(MPRC);
3233 adapter->stats.roc += er32(ROC);
3234
1532ecea
JB		 3235 adapter->stats.prc64 += er32(PRC64);
3236 adapter->stats.prc127 += er32(PRC127);
3237 adapter->stats.prc255 += er32(PRC255);
3238 adapter->stats.prc511 += er32(PRC511);
3239 adapter->stats.prc1023 += er32(PRC1023);
3240 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP		 3241
3242 adapter->stats.symerrs += er32(SYMERRS);
3243 adapter->stats.mpc += er32(MPC);
3244 adapter->stats.scc += er32(SCC);
3245 adapter->stats.ecol += er32(ECOL);
3246 adapter->stats.mcc += er32(MCC);
3247 adapter->stats.latecol += er32(LATECOL);
3248 adapter->stats.dc += er32(DC);
3249 adapter->stats.sec += er32(SEC);
3250 adapter->stats.rlec += er32(RLEC);
3251 adapter->stats.xonrxc += er32(XONRXC);
3252 adapter->stats.xontxc += er32(XONTXC);
3253 adapter->stats.xoffrxc += er32(XOFFRXC);
3254 adapter->stats.xofftxc += er32(XOFFTXC);
3255 adapter->stats.fcruc += er32(FCRUC);
3256 adapter->stats.gptc += er32(GPTC);
3257 adapter->stats.gotcl += er32(GOTCL);
3258 adapter->stats.gotch += er32(GOTCH);
3259 adapter->stats.rnbc += er32(RNBC);
3260 adapter->stats.ruc += er32(RUC);
3261 adapter->stats.rfc += er32(RFC);
3262 adapter->stats.rjc += er32(RJC);
3263 adapter->stats.torl += er32(TORL);
3264 adapter->stats.torh += er32(TORH);
3265 adapter->stats.totl += er32(TOTL);
3266 adapter->stats.toth += er32(TOTH);
3267 adapter->stats.tpr += er32(TPR);
3268
1532ecea
JB		 3269 adapter->stats.ptc64 += er32(PTC64);
3270 adapter->stats.ptc127 += er32(PTC127);
3271 adapter->stats.ptc255 += er32(PTC255);
3272 adapter->stats.ptc511 += er32(PTC511);
3273 adapter->stats.ptc1023 += er32(PTC1023);
3274 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP		 3275
3276 adapter->stats.mptc += er32(MPTC);
3277 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3278
3279 /* used for adaptive IFS */
3280
1dc32918 3281 hw->tx_packet_delta = er32(TPT);
1da177e4 3282 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3283 hw->collision_delta = er32(COLC);
1da177e4
LT		 3284 adapter->stats.colc += hw->collision_delta;
3285
96838a40 3286 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3287 adapter->stats.algnerrc += er32(ALGNERRC);
3288 adapter->stats.rxerrc += er32(RXERRC);
3289 adapter->stats.tncrs += er32(TNCRS);
3290 adapter->stats.cexterr += er32(CEXTERR);
3291 adapter->stats.tsctc += er32(TSCTC);
3292 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT		 3293 }
3294
3295 /* Fill out the OS statistics structure */
5fe31def
AK		 3296 netdev->stats.multicast = adapter->stats.mprc;
3297 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT		 3298
3299 /* Rx Errors */
3300
87041639
JK		 3301 /* RLEC on some newer hardware can be incorrect so build
3302 * our own version based on RUC and ROC */
5fe31def 3303 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3304 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3305 adapter->stats.ruc + adapter->stats.roc +
3306 adapter->stats.cexterr;
49559854 3307 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK		 3308 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3309 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3310 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3311 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT		 3312
3313 /* Tx Errors */
49559854 3314 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK		 3315 netdev->stats.tx_errors = adapter->stats.txerrc;
3316 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3317 netdev->stats.tx_window_errors = adapter->stats.latecol;
3318 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3319 if (hw->bad_tx_carr_stats_fd &&
167fb284 3320 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3321 netdev->stats.tx_carrier_errors = 0;
167fb284
JG		 3322 adapter->stats.tncrs = 0;
3323 }
1da177e4
LT		 3324
3325 /* Tx Dropped needs to be maintained elsewhere */
3326
3327 /* Phy Stats */
96838a40
JB		 3328 if (hw->media_type == e1000_media_type_copper) {
3329 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3330 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3331 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3332 adapter->phy_stats.idle_errors += phy_tmp;
3333 }
3334
96838a40 3335 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3336 (hw->phy_type == e1000_phy_m88) &&
3337 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3338 adapter->phy_stats.receive_errors += phy_tmp;
3339 }
3340
15e376b4 3341 /* Management Stats */
1dc32918
JP		 3342 if (hw->has_smbus) {
3343 adapter->stats.mgptc += er32(MGTPTC);
3344 adapter->stats.mgprc += er32(MGTPRC);
3345 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3346 }
3347
1da177e4
LT		 3348 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3349}
9ac98284 3350
1da177e4
LT		 3351/**
3352 * e1000_intr - Interrupt Handler
3353 * @irq: interrupt number
3354 * @data: pointer to a network interface device structure
1da177e4
LT		 3355 **/
3356
64798845 3357static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3358{
3359 struct net_device *netdev = data;
60490fe0 3360 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3361 struct e1000_hw *hw = &adapter->hw;
1532ecea 3362 u32 icr = er32(ICR);
c3570acb 3363
e151a60a 3364 if (unlikely((!icr) || test_bit(__E1000_DOWN, &adapter->flags)))
835bb129
JB		 3365 return IRQ_NONE; /* Not our interrupt */
3366
96838a40 3367 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3368 hw->get_link_status = 1;
1314bbf3
AK		 3369 /* guard against interrupt when we're going down */
3370 if (!test_bit(__E1000_DOWN, &adapter->flags))
3371 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3372 }
3373
1532ecea
JB		 3374 /* disable interrupts, without the synchronize_irq bit */
3375 ew32(IMC, ~0);
3376 E1000_WRITE_FLUSH();
3377
288379f0 3378 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3379 adapter->total_tx_bytes = 0;
3380 adapter->total_tx_packets = 0;
3381 adapter->total_rx_bytes = 0;
3382 adapter->total_rx_packets = 0;
288379f0 3383 __napi_schedule(&adapter->napi);
a6c42322 3384 } else {
90fb5135
AK		 3385 /* this really should not happen! if it does it is basically a
3386 * bug, but not a hard error, so enable ints and continue */
a6c42322
JB		 3387 if (!test_bit(__E1000_DOWN, &adapter->flags))
3388 e1000_irq_enable(adapter);
3389 }
1da177e4 3390
1da177e4
LT		 3391 return IRQ_HANDLED;
3392}
3393
1da177e4
LT		 3394/**
3395 * e1000_clean - NAPI Rx polling callback
3396 * @adapter: board private structure
3397 **/
64798845 3398static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3399{
bea3348e 3400 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
650b5a5c 3401 int tx_clean_complete = 0, work_done = 0;
581d708e 3402
650b5a5c 3403 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3404
650b5a5c 3405 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3406
650b5a5c 3407 if (!tx_clean_complete)
d2c7ddd6
DM		 3408 work_done = budget;
3409
53e52c72
DM		 3410 /* If budget not fully consumed, exit the polling mode */
3411 if (work_done < budget) {
835bb129
JB		 3412 if (likely(adapter->itr_setting & 3))
3413 e1000_set_itr(adapter);
288379f0 3414 napi_complete(napi);
a6c42322
JB		 3415 if (!test_bit(__E1000_DOWN, &adapter->flags))
3416 e1000_irq_enable(adapter);
1da177e4
LT		 3417 }
3418
bea3348e 3419 return work_done;
1da177e4
LT		 3420}
3421
1da177e4
LT		 3422/**
3423 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3424 * @adapter: board private structure
3425 **/
64798845
JP		 3426static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3427 struct e1000_tx_ring *tx_ring)
1da177e4 3428{
1dc32918 3429 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3430 struct net_device *netdev = adapter->netdev;
3431 struct e1000_tx_desc *tx_desc, *eop_desc;
3432 struct e1000_buffer *buffer_info;
3433 unsigned int i, eop;
2a1af5d7 3434 unsigned int count = 0;
835bb129 3435 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3436
3437 i = tx_ring->next_to_clean;
3438 eop = tx_ring->buffer_info[i].next_to_watch;
3439 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3440
ccfb342c
AD		 3441 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3442 (count < tx_ring->count)) {
843f4267
JB		 3443 bool cleaned = false;
3444 for ( ; !cleaned; count++) {
1da177e4
LT		 3445 tx_desc = E1000_TX_DESC(*tx_ring, i);
3446 buffer_info = &tx_ring->buffer_info[i];
3447 cleaned = (i == eop);
3448
835bb129 3449 if (cleaned) {
2b65326e 3450 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3451 unsigned int segs, bytecount;
3452 segs = skb_shinfo(skb)->gso_segs ?: 1;
3453 /* multiply data chunks by size of headers */
3454 bytecount = ((segs - 1) * skb_headlen(skb)) +
3455 skb->len;
2b65326e 3456 total_tx_packets += segs;
7753b171 3457 total_tx_bytes += bytecount;
835bb129 3458 }
fd803241 3459 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3460 tx_desc->upper.data = 0;
1da177e4 3461
96838a40 3462 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3463 }
581d708e 3464
1da177e4
LT		 3465 eop = tx_ring->buffer_info[i].next_to_watch;
3466 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3467 }
3468
3469 tx_ring->next_to_clean = i;
3470
77b2aad5 3471#define TX_WAKE_THRESHOLD 32
843f4267 3472 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3473 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3474 /* Make sure that anybody stopping the queue after this
3475 * sees the new next_to_clean.
3476 */
3477 smp_mb();
cdd7549e
JB		 3478
3479 if (netif_queue_stopped(netdev) &&
3480 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3481 netif_wake_queue(netdev);
fcfb1224
JB		 3482 ++adapter->restart_queue;
3483 }
77b2aad5 3484 }
2648345f 3485
581d708e 3486 if (adapter->detect_tx_hung) {
2648345f 3487 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3488 * check with the clearing of time_stamp and movement of i */
c3033b01 3489 adapter->detect_tx_hung = false;
cdd7549e
JB		 3490 if (tx_ring->buffer_info[eop].time_stamp &&
3491 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
8e95a202
JP		 3492 (adapter->tx_timeout_factor * HZ)) &&
3493 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3494
3495 /* detected Tx unit hang */
c6963ef5 3496 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3497 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3498 " TDH <%x>\n"
3499 " TDT <%x>\n"
3500 " next_to_use <%x>\n"
3501 " next_to_clean <%x>\n"
3502 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3503 " time_stamp <%lx>\n"
3504 " next_to_watch <%x>\n"
3505 " jiffies <%lx>\n"
3506 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3507 (unsigned long)((tx_ring - adapter->tx_ring) /
3508 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3509 readl(hw->hw_addr + tx_ring->tdh),
3510 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3511 tx_ring->next_to_use,
392137fa 3512 tx_ring->next_to_clean,
cdd7549e 3513 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3514 eop,
3515 jiffies,
3516 eop_desc->upper.fields.status);
1da177e4 3517 netif_stop_queue(netdev);
70b8f1e1 3518 }
1da177e4 3519 }
835bb129
JB		 3520 adapter->total_tx_bytes += total_tx_bytes;
3521 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK		 3522 netdev->stats.tx_bytes += total_tx_bytes;
3523 netdev->stats.tx_packets += total_tx_packets;
ccfb342c 3524 return (count < tx_ring->count);
1da177e4
LT		 3525}
3526
3527/**
3528 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3529 * @adapter: board private structure
3530 * @status_err: receive descriptor status and error fields
3531 * @csum: receive descriptor csum field
3532 * @sk_buff: socket buffer with received data
1da177e4
LT		 3533 **/
3534
64798845
JP		 3535static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3536 u32 csum, struct sk_buff *skb)
1da177e4 3537{
1dc32918 3538 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3539 u16 status = (u16)status_err;
3540 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC		 3541 skb->ip_summed = CHECKSUM_NONE;
3542
1da177e4 3543 /* 82543 or newer only */
1dc32918 3544 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3545 /* Ignore Checksum bit is set */
96838a40 3546 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3547 /* TCP/UDP checksum error bit is set */
96838a40 3548 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3549 /* let the stack verify checksum errors */
1da177e4 3550 adapter->hw_csum_err++;
2d7edb92
MC		 3551 return;
3552 }
3553 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB		 3554 if (!(status & E1000_RXD_STAT_TCPCS))
3555 return;
3556
2d7edb92
MC		 3557 /* It must be a TCP or UDP packet with a valid checksum */
3558 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3559 /* TCP checksum is good */
3560 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3561 }
2d7edb92 3562 adapter->hw_csum_good++;
1da177e4
LT		 3563}
3564
edbbb3ca
JB		 3565/**
3566 * e1000_consume_page - helper function
3567 **/
3568static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
3569 u16 length)
3570{
3571 bi->page = NULL;
3572 skb->len += length;
3573 skb->data_len += length;
3574 skb->truesize += length;
3575}
3576
3577/**
3578 * e1000_receive_skb - helper function to handle rx indications
3579 * @adapter: board private structure
3580 * @status: descriptor status field as written by hardware
3581 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3582 * @skb: pointer to sk_buff to be indicated to stack
3583 */
3584static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3585 __le16 vlan, struct sk_buff *skb)
3586{
3587 if (unlikely(adapter->vlgrp && (status & E1000_RXD_STAT_VP))) {
3588 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3589 le16_to_cpu(vlan) &
3590 E1000_RXD_SPC_VLAN_MASK);
3591 } else {
3592 netif_receive_skb(skb);
3593 }
3594}
3595
3596/**
3597 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
3598 * @adapter: board private structure
3599 * @rx_ring: ring to clean
3600 * @work_done: amount of napi work completed this call
3601 * @work_to_do: max amount of work allowed for this call to do
3602 *
3603 * the return value indicates whether actual cleaning was done, there
3604 * is no guarantee that everything was cleaned
3605 */
3606static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
3607 struct e1000_rx_ring *rx_ring,
3608 int *work_done, int work_to_do)
3609{
3610 struct e1000_hw *hw = &adapter->hw;
3611 struct net_device *netdev = adapter->netdev;
3612 struct pci_dev *pdev = adapter->pdev;
3613 struct e1000_rx_desc *rx_desc, *next_rxd;
3614 struct e1000_buffer *buffer_info, *next_buffer;
3615 unsigned long irq_flags;
3616 u32 length;
3617 unsigned int i;
3618 int cleaned_count = 0;
3619 bool cleaned = false;
3620 unsigned int total_rx_bytes=0, total_rx_packets=0;
3621
3622 i = rx_ring->next_to_clean;
3623 rx_desc = E1000_RX_DESC(*rx_ring, i);
3624 buffer_info = &rx_ring->buffer_info[i];
3625
3626 while (rx_desc->status & E1000_RXD_STAT_DD) {
3627 struct sk_buff *skb;
3628 u8 status;
3629
3630 if (*work_done >= work_to_do)
3631 break;
3632 (*work_done)++;
3633
3634 status = rx_desc->status;
3635 skb = buffer_info->skb;
3636 buffer_info->skb = NULL;
3637
3638 if (++i == rx_ring->count) i = 0;
3639 next_rxd = E1000_RX_DESC(*rx_ring, i);
3640 prefetch(next_rxd);
3641
3642 next_buffer = &rx_ring->buffer_info[i];
3643
3644 cleaned = true;
3645 cleaned_count++;
3646 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
3647 PCI_DMA_FROMDEVICE);
3648 buffer_info->dma = 0;
3649
3650 length = le16_to_cpu(rx_desc->length);
3651
3652 /* errors is only valid for DD + EOP descriptors */
3653 if (unlikely((status & E1000_RXD_STAT_EOP) &&
3654 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
3655 u8 last_byte = *(skb->data + length - 1);
3656 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3657 last_byte)) {
3658 spin_lock_irqsave(&adapter->stats_lock,
3659 irq_flags);
3660 e1000_tbi_adjust_stats(hw, &adapter->stats,
3661 length, skb->data);
3662 spin_unlock_irqrestore(&adapter->stats_lock,
3663 irq_flags);
3664 length--;
3665 } else {
3666 /* recycle both page and skb */
3667 buffer_info->skb = skb;
3668 /* an error means any chain goes out the window
3669 * too */
3670 if (rx_ring->rx_skb_top)
3671 dev_kfree_skb(rx_ring->rx_skb_top);
3672 rx_ring->rx_skb_top = NULL;
3673 goto next_desc;
3674 }
3675 }
3676
3677#define rxtop rx_ring->rx_skb_top
3678 if (!(status & E1000_RXD_STAT_EOP)) {
3679 /* this descriptor is only the beginning (or middle) */
3680 if (!rxtop) {
3681 /* this is the beginning of a chain */
3682 rxtop = skb;
3683 skb_fill_page_desc(rxtop, 0, buffer_info->page,
3684 0, length);
3685 } else {
3686 /* this is the middle of a chain */
3687 skb_fill_page_desc(rxtop,
3688 skb_shinfo(rxtop)->nr_frags,
3689 buffer_info->page, 0, length);
3690 /* re-use the skb, only consumed the page */
3691 buffer_info->skb = skb;
3692 }
3693 e1000_consume_page(buffer_info, rxtop, length);
3694 goto next_desc;
3695 } else {
3696 if (rxtop) {
3697 /* end of the chain */
3698 skb_fill_page_desc(rxtop,
3699 skb_shinfo(rxtop)->nr_frags,
3700 buffer_info->page, 0, length);
3701 /* re-use the current skb, we only consumed the
3702 * page */
3703 buffer_info->skb = skb;
3704 skb = rxtop;
3705 rxtop = NULL;
3706 e1000_consume_page(buffer_info, skb, length);
3707 } else {
3708 /* no chain, got EOP, this buf is the packet
3709 * copybreak to save the put_page/alloc_page */
3710 if (length <= copybreak &&
3711 skb_tailroom(skb) >= length) {
3712 u8 *vaddr;
3713 vaddr = kmap_atomic(buffer_info->page,
3714 KM_SKB_DATA_SOFTIRQ);
3715 memcpy(skb_tail_pointer(skb), vaddr, length);
3716 kunmap_atomic(vaddr,
3717 KM_SKB_DATA_SOFTIRQ);
3718 /* re-use the page, so don't erase
3719 * buffer_info->page */
3720 skb_put(skb, length);
3721 } else {
3722 skb_fill_page_desc(skb, 0,
3723 buffer_info->page, 0,
3724 length);
3725 e1000_consume_page(buffer_info, skb,
3726 length);
3727 }
3728 }
3729 }
3730
3731 /* Receive Checksum Offload XXX recompute due to CRC strip? */
3732 e1000_rx_checksum(adapter,
3733 (u32)(status) |
3734 ((u32)(rx_desc->errors) << 24),
3735 le16_to_cpu(rx_desc->csum), skb);
3736
3737 pskb_trim(skb, skb->len - 4);
3738
3739 /* probably a little skewed due to removing CRC */
3740 total_rx_bytes += skb->len;
3741 total_rx_packets++;
3742
3743 /* eth type trans needs skb->data to point to something */
3744 if (!pskb_may_pull(skb, ETH_HLEN)) {
3745 DPRINTK(DRV, ERR, "pskb_may_pull failed.\n");
3746 dev_kfree_skb(skb);
3747 goto next_desc;
3748 }
3749
3750 skb->protocol = eth_type_trans(skb, netdev);
3751
3752 e1000_receive_skb(adapter, status, rx_desc->special, skb);
3753
3754next_desc:
3755 rx_desc->status = 0;
3756
3757 /* return some buffers to hardware, one at a time is too slow */
3758 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3759 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3760 cleaned_count = 0;
3761 }
3762
3763 /* use prefetched values */
3764 rx_desc = next_rxd;
3765 buffer_info = next_buffer;
3766 }
3767 rx_ring->next_to_clean = i;
3768
3769 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3770 if (cleaned_count)
3771 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3772
3773 adapter->total_rx_packets += total_rx_packets;
3774 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 3775 netdev->stats.rx_bytes += total_rx_bytes;
3776 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB		 3777 return cleaned;
3778}
3779
1da177e4 3780/**
2d7edb92 3781 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 3782 * @adapter: board private structure
edbbb3ca
JB		 3783 * @rx_ring: ring to clean
3784 * @work_done: amount of napi work completed this call
3785 * @work_to_do: max amount of work allowed for this call to do
3786 */
64798845
JP		 3787static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3788 struct e1000_rx_ring *rx_ring,
3789 int *work_done, int work_to_do)
1da177e4 3790{
1dc32918 3791 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3792 struct net_device *netdev = adapter->netdev;
3793 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3794 struct e1000_rx_desc *rx_desc, *next_rxd;
3795 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3796 unsigned long flags;
406874a7 3797 u32 length;
1da177e4 3798 unsigned int i;
72d64a43 3799 int cleaned_count = 0;
c3033b01 3800 bool cleaned = false;
835bb129 3801 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 3802
3803 i = rx_ring->next_to_clean;
3804 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3805 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3806
b92ff8ee 3807 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3808 struct sk_buff *skb;
a292ca6e 3809 u8 status;
90fb5135 3810
96838a40 3811 if (*work_done >= work_to_do)
1da177e4
LT		 3812 break;
3813 (*work_done)++;
c3570acb 3814
a292ca6e 3815 status = rx_desc->status;
b92ff8ee 3816 skb = buffer_info->skb;
86c3d59f
JB		 3817 buffer_info->skb = NULL;
3818
30320be8
JK		 3819 prefetch(skb->data - NET_IP_ALIGN);
3820
86c3d59f
JB		 3821 if (++i == rx_ring->count) i = 0;
3822 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3823 prefetch(next_rxd);
3824
86c3d59f 3825 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3826
c3033b01 3827 cleaned = true;
72d64a43 3828 cleaned_count++;
edbbb3ca 3829 pci_unmap_single(pdev, buffer_info->dma, buffer_info->length,
1da177e4 3830 PCI_DMA_FROMDEVICE);
679be3ba 3831 buffer_info->dma = 0;
1da177e4 3832
1da177e4 3833 length = le16_to_cpu(rx_desc->length);
ea30e119 3834 /* !EOP means multiple descriptors were used to store a single
40a14dea
JB		 3835 * packet, if thats the case we need to toss it. In fact, we
3836 * to toss every packet with the EOP bit clear and the next
3837 * frame that _does_ have the EOP bit set, as it is by
3838 * definition only a frame fragment
3839 */
3840 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
3841 adapter->discarding = true;
3842
3843 if (adapter->discarding) {
a1415ee6
JK		 3844 /* All receives must fit into a single buffer */
3845 E1000_DBG("%s: Receive packet consumed multiple"
3846 " buffers\n", netdev->name);
864c4e45 3847 /* recycle */
8fc897b0 3848 buffer_info->skb = skb;
40a14dea
JB		 3849 if (status & E1000_RXD_STAT_EOP)
3850 adapter->discarding = false;
1da177e4
LT		 3851 goto next_desc;
3852 }
3853
96838a40 3854 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
edbbb3ca 3855 u8 last_byte = *(skb->data + length - 1);
1dc32918
JP		 3856 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3857 last_byte)) {
1da177e4 3858 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 3859 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 3860 length, skb->data);
3861 spin_unlock_irqrestore(&adapter->stats_lock,
3862 flags);
3863 length--;
3864 } else {
9e2feace
AK		 3865 /* recycle */
3866 buffer_info->skb = skb;
1da177e4
LT		 3867 goto next_desc;
3868 }
1cb5821f 3869 }
1da177e4 3870
d2a1e213
JB		 3871 /* adjust length to remove Ethernet CRC, this must be
3872 * done after the TBI_ACCEPT workaround above */
3873 length -= 4;
3874
835bb129
JB		 3875 /* probably a little skewed due to removing CRC */
3876 total_rx_bytes += length;
3877 total_rx_packets++;
3878
a292ca6e
JK		 3879 /* code added for copybreak, this should improve
3880 * performance for small packets with large amounts
3881 * of reassembly being done in the stack */
1f753861 3882 if (length < copybreak) {
a292ca6e 3883 struct sk_buff *new_skb =
89d71a66 3884 netdev_alloc_skb_ip_align(netdev, length);
a292ca6e 3885 if (new_skb) {
27d7ff46
ACM		 3886 skb_copy_to_linear_data_offset(new_skb,
3887 -NET_IP_ALIGN,
3888 (skb->data -
3889 NET_IP_ALIGN),
3890 (length +
3891 NET_IP_ALIGN));
a292ca6e
JK		 3892 /* save the skb in buffer_info as good */
3893 buffer_info->skb = skb;
3894 skb = new_skb;
a292ca6e 3895 }
996695de
AK		 3896 /* else just continue with the old one */
3897 }
a292ca6e 3898 /* end copybreak code */
996695de 3899 skb_put(skb, length);
1da177e4
LT		 3900
3901 /* Receive Checksum Offload */
a292ca6e 3902 e1000_rx_checksum(adapter,
406874a7
JP		 3903 (u32)(status) |
3904 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 3905 le16_to_cpu(rx_desc->csum), skb);
96838a40 3906
1da177e4 3907 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 3908
edbbb3ca 3909 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 3910
1da177e4
LT		 3911next_desc:
3912 rx_desc->status = 0;
1da177e4 3913
72d64a43
JK		 3914 /* return some buffers to hardware, one at a time is too slow */
3915 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3916 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3917 cleaned_count = 0;
3918 }
3919
30320be8 3920 /* use prefetched values */
86c3d59f
JB		 3921 rx_desc = next_rxd;
3922 buffer_info = next_buffer;
1da177e4 3923 }
1da177e4 3924 rx_ring->next_to_clean = i;
72d64a43
JK		 3925
3926 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3927 if (cleaned_count)
3928 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 3929
835bb129
JB		 3930 adapter->total_rx_packets += total_rx_packets;
3931 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 3932 netdev->stats.rx_bytes += total_rx_bytes;
3933 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC		 3934 return cleaned;
3935}
3936
edbbb3ca
JB		 3937/**
3938 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
3939 * @adapter: address of board private structure
3940 * @rx_ring: pointer to receive ring structure
3941 * @cleaned_count: number of buffers to allocate this pass
3942 **/
3943
3944static void
3945e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
3946 struct e1000_rx_ring *rx_ring, int cleaned_count)
3947{
3948 struct net_device *netdev = adapter->netdev;
3949 struct pci_dev *pdev = adapter->pdev;
3950 struct e1000_rx_desc *rx_desc;
3951 struct e1000_buffer *buffer_info;
3952 struct sk_buff *skb;
3953 unsigned int i;
89d71a66 3954 unsigned int bufsz = 256 - 16 /*for skb_reserve */ ;
edbbb3ca
JB		 3955
3956 i = rx_ring->next_to_use;
3957 buffer_info = &rx_ring->buffer_info[i];
3958
3959 while (cleaned_count--) {
3960 skb = buffer_info->skb;
3961 if (skb) {
3962 skb_trim(skb, 0);
3963 goto check_page;
3964 }
3965
89d71a66 3966 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 3967 if (unlikely(!skb)) {
3968 /* Better luck next round */
3969 adapter->alloc_rx_buff_failed++;
3970 break;
3971 }
3972
3973 /* Fix for errata 23, can't cross 64kB boundary */
3974 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3975 struct sk_buff *oldskb = skb;
3976 DPRINTK(PROBE, ERR, "skb align check failed: %u bytes "
3977 "at %p\n", bufsz, skb->data);
3978 /* Try again, without freeing the previous */
89d71a66 3979 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 3980 /* Failed allocation, critical failure */
3981 if (!skb) {
3982 dev_kfree_skb(oldskb);
3983 adapter->alloc_rx_buff_failed++;
3984 break;
3985 }
3986
3987 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3988 /* give up */
3989 dev_kfree_skb(skb);
3990 dev_kfree_skb(oldskb);
3991 break; /* while (cleaned_count--) */
3992 }
3993
3994 /* Use new allocation */
3995 dev_kfree_skb(oldskb);
3996 }
edbbb3ca
JB		 3997 buffer_info->skb = skb;
3998 buffer_info->length = adapter->rx_buffer_len;
3999check_page:
4000 /* allocate a new page if necessary */
4001 if (!buffer_info->page) {
4002 buffer_info->page = alloc_page(GFP_ATOMIC);
4003 if (unlikely(!buffer_info->page)) {
4004 adapter->alloc_rx_buff_failed++;
4005 break;
4006 }
4007 }
4008
4009 if (!buffer_info->dma)
4010 buffer_info->dma = pci_map_page(pdev,
4011 buffer_info->page, 0,
4012 buffer_info->length,
4013 PCI_DMA_FROMDEVICE);
4014
4015 rx_desc = E1000_RX_DESC(*rx_ring, i);
4016 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4017
4018 if (unlikely(++i == rx_ring->count))
4019 i = 0;
4020 buffer_info = &rx_ring->buffer_info[i];
4021 }
4022
4023 if (likely(rx_ring->next_to_use != i)) {
4024 rx_ring->next_to_use = i;
4025 if (unlikely(i-- == 0))
4026 i = (rx_ring->count - 1);
4027
4028 /* Force memory writes to complete before letting h/w
4029 * know there are new descriptors to fetch. (Only
4030 * applicable for weak-ordered memory model archs,
4031 * such as IA-64). */
4032 wmb();
4033 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4034 }
4035}
4036
1da177e4 4037/**
2d7edb92 4038 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4039 * @adapter: address of board private structure
4040 **/
4041
64798845
JP		 4042static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4043 struct e1000_rx_ring *rx_ring,
4044 int cleaned_count)
1da177e4 4045{
1dc32918 4046 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4047 struct net_device *netdev = adapter->netdev;
4048 struct pci_dev *pdev = adapter->pdev;
4049 struct e1000_rx_desc *rx_desc;
4050 struct e1000_buffer *buffer_info;
4051 struct sk_buff *skb;
2648345f 4052 unsigned int i;
89d71a66 4053 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT		 4054
4055 i = rx_ring->next_to_use;
4056 buffer_info = &rx_ring->buffer_info[i];
4057
a292ca6e 4058 while (cleaned_count--) {
ca6f7224
CH		 4059 skb = buffer_info->skb;
4060 if (skb) {
a292ca6e
JK		 4061 skb_trim(skb, 0);
4062 goto map_skb;
4063 }
4064
89d71a66 4065 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
96838a40 4066 if (unlikely(!skb)) {
1da177e4 4067 /* Better luck next round */
72d64a43 4068 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4069 break;
4070 }
4071
2648345f 4072 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4073 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4074 struct sk_buff *oldskb = skb;
2648345f
MC		 4075 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4076 "at %p\n", bufsz, skb->data);
4077 /* Try again, without freeing the previous */
89d71a66 4078 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
2648345f 4079 /* Failed allocation, critical failure */
1da177e4
LT		 4080 if (!skb) {
4081 dev_kfree_skb(oldskb);
edbbb3ca 4082 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4083 break;
4084 }
2648345f 4085
1da177e4
LT		 4086 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4087 /* give up */
4088 dev_kfree_skb(skb);
4089 dev_kfree_skb(oldskb);
edbbb3ca 4090 adapter->alloc_rx_buff_failed++;
1da177e4 4091 break; /* while !buffer_info->skb */
1da177e4 4092 }
ca6f7224
CH		 4093
4094 /* Use new allocation */
4095 dev_kfree_skb(oldskb);
1da177e4 4096 }
1da177e4
LT		 4097 buffer_info->skb = skb;
4098 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4099map_skb:
1da177e4
LT		 4100 buffer_info->dma = pci_map_single(pdev,
4101 skb->data,
edbbb3ca 4102 buffer_info->length,
1da177e4
LT		 4103 PCI_DMA_FROMDEVICE);
4104
edbbb3ca
JB		 4105 /*
4106 * XXX if it was allocated cleanly it will never map to a
4107 * boundary crossing
4108 */
4109
2648345f
MC		 4110 /* Fix for errata 23, can't cross 64kB boundary */
4111 if (!e1000_check_64k_bound(adapter,
4112 (void *)(unsigned long)buffer_info->dma,
4113 adapter->rx_buffer_len)) {
4114 DPRINTK(RX_ERR, ERR,
4115 "dma align check failed: %u bytes at %p\n",
4116 adapter->rx_buffer_len,
4117 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4118 dev_kfree_skb(skb);
4119 buffer_info->skb = NULL;
4120
2648345f 4121 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4122 adapter->rx_buffer_len,
4123 PCI_DMA_FROMDEVICE);
679be3ba 4124 buffer_info->dma = 0;
1da177e4 4125
edbbb3ca 4126 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4127 break; /* while !buffer_info->skb */
4128 }
1da177e4
LT		 4129 rx_desc = E1000_RX_DESC(*rx_ring, i);
4130 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4131
96838a40
JB		 4132 if (unlikely(++i == rx_ring->count))
4133 i = 0;
1da177e4
LT		 4134 buffer_info = &rx_ring->buffer_info[i];
4135 }
4136
b92ff8ee
JB		 4137 if (likely(rx_ring->next_to_use != i)) {
4138 rx_ring->next_to_use = i;
4139 if (unlikely(i-- == 0))
4140 i = (rx_ring->count - 1);
4141
4142 /* Force memory writes to complete before letting h/w
4143 * know there are new descriptors to fetch. (Only
4144 * applicable for weak-ordered memory model archs,
4145 * such as IA-64). */
4146 wmb();
1dc32918 4147 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4148 }
1da177e4
LT		 4149}
4150
4151/**
4152 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4153 * @adapter:
4154 **/
4155
64798845 4156static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4157{
1dc32918 4158 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4159 u16 phy_status;
4160 u16 phy_ctrl;
1da177e4 4161
1dc32918
JP		 4162 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4163 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4164 return;
4165
96838a40 4166 if (adapter->smartspeed == 0) {
1da177e4
LT		 4167 /* If Master/Slave config fault is asserted twice,
4168 * we assume back-to-back */
1dc32918 4169 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4170 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4171 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4172 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4173 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4174 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4175 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4176 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4177 phy_ctrl);
4178 adapter->smartspeed++;
1dc32918
JP		 4179 if (!e1000_phy_setup_autoneg(hw) &&
4180 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4181 &phy_ctrl)) {
4182 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4183 MII_CR_RESTART_AUTO_NEG);
1dc32918 4184 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4185 phy_ctrl);
4186 }
4187 }
4188 return;
96838a40 4189 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4190 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4191 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4192 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4193 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4194 if (!e1000_phy_setup_autoneg(hw) &&
4195 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4196 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4197 MII_CR_RESTART_AUTO_NEG);
1dc32918 4198 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4199 }
4200 }
4201 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4202 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4203 adapter->smartspeed = 0;
4204}
4205
4206/**
4207 * e1000_ioctl -
4208 * @netdev:
4209 * @ifreq:
4210 * @cmd:
4211 **/
4212
64798845 4213static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4214{
4215 switch (cmd) {
4216 case SIOCGMIIPHY:
4217 case SIOCGMIIREG:
4218 case SIOCSMIIREG:
4219 return e1000_mii_ioctl(netdev, ifr, cmd);
4220 default:
4221 return -EOPNOTSUPP;
4222 }
4223}
4224
4225/**
4226 * e1000_mii_ioctl -
4227 * @netdev:
4228 * @ifreq:
4229 * @cmd:
4230 **/
4231
64798845
JP		 4232static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4233 int cmd)
1da177e4 4234{
60490fe0 4235 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4236 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4237 struct mii_ioctl_data *data = if_mii(ifr);
4238 int retval;
406874a7
JP		 4239 u16 mii_reg;
4240 u16 spddplx;
97876fc6 4241 unsigned long flags;
1da177e4 4242
1dc32918 4243 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4244 return -EOPNOTSUPP;
4245
4246 switch (cmd) {
4247 case SIOCGMIIPHY:
1dc32918 4248 data->phy_id = hw->phy_addr;
1da177e4
LT		 4249 break;
4250 case SIOCGMIIREG:
97876fc6 4251 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4252 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4253 &data->val_out)) {
4254 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4255 return -EIO;
97876fc6
MC		 4256 }
4257 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4258 break;
4259 case SIOCSMIIREG:
96838a40 4260 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4261 return -EFAULT;
4262 mii_reg = data->val_in;
97876fc6 4263 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4264 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4265 mii_reg)) {
4266 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4267 return -EIO;
97876fc6 4268 }
f0163ac4 4269 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4270 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4271 switch (data->reg_num) {
4272 case PHY_CTRL:
96838a40 4273 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4274 break;
96838a40 4275 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4276 hw->autoneg = 1;
4277 hw->autoneg_advertised = 0x2F;
1da177e4
LT		 4278 } else {
4279 if (mii_reg & 0x40)
4280 spddplx = SPEED_1000;
4281 else if (mii_reg & 0x2000)
4282 spddplx = SPEED_100;
4283 else
4284 spddplx = SPEED_10;
4285 spddplx += (mii_reg & 0x100)
cb764326
JK		 4286 ? DUPLEX_FULL :
4287 DUPLEX_HALF;
1da177e4
LT		 4288 retval = e1000_set_spd_dplx(adapter,
4289 spddplx);
f0163ac4 4290 if (retval)
1da177e4
LT		 4291 return retval;
4292 }
2db10a08
AK		 4293 if (netif_running(adapter->netdev))
4294 e1000_reinit_locked(adapter);
4295 else
1da177e4
LT		 4296 e1000_reset(adapter);
4297 break;
4298 case M88E1000_PHY_SPEC_CTRL:
4299 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4300 if (e1000_phy_reset(hw))
1da177e4
LT		 4301 return -EIO;
4302 break;
4303 }
4304 } else {
4305 switch (data->reg_num) {
4306 case PHY_CTRL:
96838a40 4307 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4308 break;
2db10a08
AK		 4309 if (netif_running(adapter->netdev))
4310 e1000_reinit_locked(adapter);
4311 else
1da177e4
LT		 4312 e1000_reset(adapter);
4313 break;
4314 }
4315 }
4316 break;
4317 default:
4318 return -EOPNOTSUPP;
4319 }
4320 return E1000_SUCCESS;
4321}
4322
64798845 4323void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4324{
4325 struct e1000_adapter *adapter = hw->back;
2648345f 4326 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4327
96838a40 4328 if (ret_val)
2648345f 4329 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4330}
4331
64798845 4332void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4333{
4334 struct e1000_adapter *adapter = hw->back;
4335
4336 pci_clear_mwi(adapter->pdev);
4337}
4338
64798845 4339int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4340{
4341 struct e1000_adapter *adapter = hw->back;
4342 return pcix_get_mmrbc(adapter->pdev);
4343}
4344
64798845 4345void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4346{
4347 struct e1000_adapter *adapter = hw->back;
4348 pcix_set_mmrbc(adapter->pdev, mmrbc);
4349}
4350
64798845 4351void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4352{
4353 outl(value, port);
4354}
4355
64798845
JP		 4356static void e1000_vlan_rx_register(struct net_device *netdev,
4357 struct vlan_group *grp)
1da177e4 4358{
60490fe0 4359 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4360 struct e1000_hw *hw = &adapter->hw;
406874a7 4361 u32 ctrl, rctl;
1da177e4 4362
9150b76a
JB		 4363 if (!test_bit(__E1000_DOWN, &adapter->flags))
4364 e1000_irq_disable(adapter);
1da177e4
LT		 4365 adapter->vlgrp = grp;
4366
96838a40 4367 if (grp) {
1da177e4 4368 /* enable VLAN tag insert/strip */
1dc32918 4369 ctrl = er32(CTRL);
1da177e4 4370 ctrl |= E1000_CTRL_VME;
1dc32918 4371 ew32(CTRL, ctrl);
1da177e4 4372
1532ecea
JB		 4373 /* enable VLAN receive filtering */
4374 rctl = er32(RCTL);
4375 rctl &= ~E1000_RCTL_CFIEN;
4376 if (!(netdev->flags & IFF_PROMISC))
4377 rctl |= E1000_RCTL_VFE;
4378 ew32(RCTL, rctl);
4379 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4380 } else {
4381 /* disable VLAN tag insert/strip */
1dc32918 4382 ctrl = er32(CTRL);
1da177e4 4383 ctrl &= ~E1000_CTRL_VME;
1dc32918 4384 ew32(CTRL, ctrl);
1da177e4 4385
1532ecea
JB		 4386 /* disable VLAN receive filtering */
4387 rctl = er32(RCTL);
4388 rctl &= ~E1000_RCTL_VFE;
4389 ew32(RCTL, rctl);
fd38d7a0 4390
1532ecea 4391 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
120a5d0d 4392 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1532ecea 4393 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
cd94dd0b 4394 }
1da177e4
LT		 4395 }
4396
9150b76a
JB		 4397 if (!test_bit(__E1000_DOWN, &adapter->flags))
4398 e1000_irq_enable(adapter);
1da177e4
LT		 4399}
4400
64798845 4401static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4402{
60490fe0 4403 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4404 struct e1000_hw *hw = &adapter->hw;
406874a7 4405 u32 vfta, index;
96838a40 4406
1dc32918 4407 if ((hw->mng_cookie.status &
96838a40
JB		 4408 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4409 (vid == adapter->mng_vlan_id))
2d7edb92 4410 return;
1da177e4
LT		 4411 /* add VID to filter table */
4412 index = (vid >> 5) & 0x7F;
1dc32918 4413 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4414 vfta |= (1 << (vid & 0x1F));
1dc32918 4415 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4416}
4417
64798845 4418static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4419{
60490fe0 4420 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4421 struct e1000_hw *hw = &adapter->hw;
406874a7 4422 u32 vfta, index;
1da177e4 4423
9150b76a
JB		 4424 if (!test_bit(__E1000_DOWN, &adapter->flags))
4425 e1000_irq_disable(adapter);
5c15bdec 4426 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB		 4427 if (!test_bit(__E1000_DOWN, &adapter->flags))
4428 e1000_irq_enable(adapter);
1da177e4
LT		 4429
4430 /* remove VID from filter table */
4431 index = (vid >> 5) & 0x7F;
1dc32918 4432 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4433 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4434 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4435}
4436
64798845 4437static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT		 4438{
4439 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4440
96838a40 4441 if (adapter->vlgrp) {
406874a7 4442 u16 vid;
96838a40 4443 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4444 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 4445 continue;
4446 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4447 }
4448 }
4449}
4450
64798845 4451int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4452{
1dc32918
JP		 4453 struct e1000_hw *hw = &adapter->hw;
4454
4455 hw->autoneg = 0;
1da177e4 4456
6921368f 4457 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4458 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f
MC		 4459 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4460 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4461 return -EINVAL;
4462 }
4463
96838a40 4464 switch (spddplx) {
1da177e4 4465 case SPEED_10 + DUPLEX_HALF:
1dc32918 4466 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4467 break;
4468 case SPEED_10 + DUPLEX_FULL:
1dc32918 4469 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4470 break;
4471 case SPEED_100 + DUPLEX_HALF:
1dc32918 4472 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4473 break;
4474 case SPEED_100 + DUPLEX_FULL:
1dc32918 4475 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4476 break;
4477 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4478 hw->autoneg = 1;
4479 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4480 break;
4481 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4482 default:
2648345f 4483 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4484 return -EINVAL;
4485 }
4486 return 0;
4487}
4488
b43fcd7d 4489static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 4490{
4491 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4492 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4493 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4494 u32 ctrl, ctrl_ext, rctl, status;
4495 u32 wufc = adapter->wol;
6fdfef16 4496#ifdef CONFIG_PM
240b1710 4497 int retval = 0;
6fdfef16 4498#endif
1da177e4
LT		 4499
4500 netif_device_detach(netdev);
4501
2db10a08
AK		 4502 if (netif_running(netdev)) {
4503 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4504 e1000_down(adapter);
2db10a08 4505 }
1da177e4 4506
2f82665f 4507#ifdef CONFIG_PM
1d33e9c6 4508 retval = pci_save_state(pdev);
2f82665f
JB		 4509 if (retval)
4510 return retval;
4511#endif
4512
1dc32918 4513 status = er32(STATUS);
96838a40 4514 if (status & E1000_STATUS_LU)
1da177e4
LT		 4515 wufc &= ~E1000_WUFC_LNKC;
4516
96838a40 4517 if (wufc) {
1da177e4 4518 e1000_setup_rctl(adapter);
db0ce50d 4519 e1000_set_rx_mode(netdev);
1da177e4
LT		 4520
4521 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4522 if (wufc & E1000_WUFC_MC) {
1dc32918 4523 rctl = er32(RCTL);
1da177e4 4524 rctl |= E1000_RCTL_MPE;
1dc32918 4525 ew32(RCTL, rctl);
1da177e4
LT		 4526 }
4527
1dc32918
JP		 4528 if (hw->mac_type >= e1000_82540) {
4529 ctrl = er32(CTRL);
1da177e4
LT		 4530 /* advertise wake from D3Cold */
4531 #define E1000_CTRL_ADVD3WUC 0x00100000
4532 /* phy power management enable */
4533 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4534 ctrl |= E1000_CTRL_ADVD3WUC |
4535 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4536 ew32(CTRL, ctrl);
1da177e4
LT		 4537 }
4538
1dc32918 4539 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 4540 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4541 /* keep the laser running in D3 */
1dc32918 4542 ctrl_ext = er32(CTRL_EXT);
1da177e4 4543 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4544 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4545 }
4546
1dc32918
JP		 4547 ew32(WUC, E1000_WUC_PME_EN);
4548 ew32(WUFC, wufc);
1da177e4 4549 } else {
1dc32918
JP		 4550 ew32(WUC, 0);
4551 ew32(WUFC, 0);
1da177e4
LT		 4552 }
4553
0fccd0e9
JG		 4554 e1000_release_manageability(adapter);
4555
b43fcd7d
RW		 4556 *enable_wake = !!wufc;
4557
0fccd0e9 4558 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 4559 if (adapter->en_mng_pt)
4560 *enable_wake = true;
1da177e4 4561
edd106fc
AK		 4562 if (netif_running(netdev))
4563 e1000_free_irq(adapter);
4564
1da177e4 4565 pci_disable_device(pdev);
240b1710 4566
1da177e4
LT		 4567 return 0;
4568}
4569
2f82665f 4570#ifdef CONFIG_PM
b43fcd7d
RW		 4571static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4572{
4573 int retval;
4574 bool wake;
4575
4576 retval = __e1000_shutdown(pdev, &wake);
4577 if (retval)
4578 return retval;
4579
4580 if (wake) {
4581 pci_prepare_to_sleep(pdev);
4582 } else {
4583 pci_wake_from_d3(pdev, false);
4584 pci_set_power_state(pdev, PCI_D3hot);
4585 }
4586
4587 return 0;
4588}
4589
64798845 4590static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4591{
4592 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4593 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4594 struct e1000_hw *hw = &adapter->hw;
406874a7 4595 u32 err;
1da177e4 4596
d0e027db 4597 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4598 pci_restore_state(pdev);
dbb5aaeb 4599 pci_save_state(pdev);
81250297
TI		 4600
4601 if (adapter->need_ioport)
4602 err = pci_enable_device(pdev);
4603 else
4604 err = pci_enable_device_mem(pdev);
c7be73bc 4605 if (err) {
3d1dd8cb
AK		 4606 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4607 return err;
4608 }
a4cb847d 4609 pci_set_master(pdev);
1da177e4 4610
d0e027db
AK		 4611 pci_enable_wake(pdev, PCI_D3hot, 0);
4612 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4613
c7be73bc
JP		 4614 if (netif_running(netdev)) {
4615 err = e1000_request_irq(adapter);
4616 if (err)
4617 return err;
4618 }
edd106fc
AK		 4619
4620 e1000_power_up_phy(adapter);
1da177e4 4621 e1000_reset(adapter);
1dc32918 4622 ew32(WUS, ~0);
1da177e4 4623
0fccd0e9
JG		 4624 e1000_init_manageability(adapter);
4625
96838a40 4626 if (netif_running(netdev))
1da177e4
LT		 4627 e1000_up(adapter);
4628
4629 netif_device_attach(netdev);
4630
1da177e4
LT		 4631 return 0;
4632}
4633#endif
c653e635
AK		 4634
4635static void e1000_shutdown(struct pci_dev *pdev)
4636{
b43fcd7d
RW		 4637 bool wake;
4638
4639 __e1000_shutdown(pdev, &wake);
4640
4641 if (system_state == SYSTEM_POWER_OFF) {
4642 pci_wake_from_d3(pdev, wake);
4643 pci_set_power_state(pdev, PCI_D3hot);
4644 }
c653e635
AK		 4645}
4646
1da177e4
LT		 4647#ifdef CONFIG_NET_POLL_CONTROLLER
4648/*
4649 * Polling 'interrupt' - used by things like netconsole to send skbs
4650 * without having to re-enable interrupts. It's not called while
4651 * the interrupt routine is executing.
4652 */
64798845 4653static void e1000_netpoll(struct net_device *netdev)
1da177e4 4654{
60490fe0 4655 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4656
1da177e4 4657 disable_irq(adapter->pdev->irq);
7d12e780 4658 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4659 enable_irq(adapter->pdev->irq);
4660}
4661#endif
4662
9026729b
AK		 4663/**
4664 * e1000_io_error_detected - called when PCI error is detected
4665 * @pdev: Pointer to PCI device
120a5d0d 4666 * @state: The current pci connection state
9026729b
AK		 4667 *
4668 * This function is called after a PCI bus error affecting
4669 * this device has been detected.
4670 */
64798845
JP		 4671static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4672 pci_channel_state_t state)
9026729b
AK		 4673{
4674 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4675 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 4676
4677 netif_device_detach(netdev);
4678
eab63302
AD		 4679 if (state == pci_channel_io_perm_failure)
4680 return PCI_ERS_RESULT_DISCONNECT;
4681
9026729b
AK		 4682 if (netif_running(netdev))
4683 e1000_down(adapter);
72e8d6bb 4684 pci_disable_device(pdev);
9026729b
AK		 4685
4686 /* Request a slot slot reset. */
4687 return PCI_ERS_RESULT_NEED_RESET;
4688}
4689
4690/**
4691 * e1000_io_slot_reset - called after the pci bus has been reset.
4692 * @pdev: Pointer to PCI device
4693 *
4694 * Restart the card from scratch, as if from a cold-boot. Implementation
4695 * resembles the first-half of the e1000_resume routine.
4696 */
4697static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4698{
4699 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4700 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4701 struct e1000_hw *hw = &adapter->hw;
81250297 4702 int err;
9026729b 4703
81250297
TI		 4704 if (adapter->need_ioport)
4705 err = pci_enable_device(pdev);
4706 else
4707 err = pci_enable_device_mem(pdev);
4708 if (err) {
9026729b
AK		 4709 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4710 return PCI_ERS_RESULT_DISCONNECT;
4711 }
4712 pci_set_master(pdev);
4713
dbf38c94
LV		 4714 pci_enable_wake(pdev, PCI_D3hot, 0);
4715 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4716
9026729b 4717 e1000_reset(adapter);
1dc32918 4718 ew32(WUS, ~0);
9026729b
AK		 4719
4720 return PCI_ERS_RESULT_RECOVERED;
4721}
4722
4723/**
4724 * e1000_io_resume - called when traffic can start flowing again.
4725 * @pdev: Pointer to PCI device
4726 *
4727 * This callback is called when the error recovery driver tells us that
4728 * its OK to resume normal operation. Implementation resembles the
4729 * second-half of the e1000_resume routine.
4730 */
4731static void e1000_io_resume(struct pci_dev *pdev)
4732{
4733 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4734 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG		 4735
4736 e1000_init_manageability(adapter);
9026729b
AK		 4737
4738 if (netif_running(netdev)) {
4739 if (e1000_up(adapter)) {
4740 printk("e1000: can't bring device back up after reset\n");
4741 return;
4742 }
4743 }
4744
4745 netif_device_attach(netdev);
9026729b
AK		 4746}
4747
1da177e4 4748/* e1000_main.c */
Linux 6.x block layer and io_uring tree(s)