projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
e1000: FIX: fix wrong txdctl threshold bitmasks
[linux-2.6-block.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
1da177e4 31char e1000_driver_name[] = "e1000";
3ad2cc67 32static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 33#ifndef CONFIG_E1000_NAPI
34#define DRIVERNAPI
35#else
36#define DRIVERNAPI "-NAPI"
37#endif
76ddb3fd 38#define DRV_VERSION "7.2.9-k2"DRIVERNAPI
1da177e4 39char e1000_driver_version[] = DRV_VERSION;
3d41e30a 40static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 41
42/* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
49static struct pci_device_id e1000_pci_tbl[] = {
50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
ae2c3860
AK		 75 INTEL_E1000_ETHERNET_DEVICE(0x1049),
76 INTEL_E1000_ETHERNET_DEVICE(0x104A),
77 INTEL_E1000_ETHERNET_DEVICE(0x104B),
78 INTEL_E1000_ETHERNET_DEVICE(0x104C),
79 INTEL_E1000_ETHERNET_DEVICE(0x104D),
07b8fede
MC		 80 INTEL_E1000_ETHERNET_DEVICE(0x105E),
81 INTEL_E1000_ETHERNET_DEVICE(0x105F),
82 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 83 INTEL_E1000_ETHERNET_DEVICE(0x1075),
84 INTEL_E1000_ETHERNET_DEVICE(0x1076),
85 INTEL_E1000_ETHERNET_DEVICE(0x1077),
86 INTEL_E1000_ETHERNET_DEVICE(0x1078),
87 INTEL_E1000_ETHERNET_DEVICE(0x1079),
88 INTEL_E1000_ETHERNET_DEVICE(0x107A),
89 INTEL_E1000_ETHERNET_DEVICE(0x107B),
90 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 91 INTEL_E1000_ETHERNET_DEVICE(0x107D),
92 INTEL_E1000_ETHERNET_DEVICE(0x107E),
93 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 94 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 95 INTEL_E1000_ETHERNET_DEVICE(0x108B),
96 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 97 INTEL_E1000_ETHERNET_DEVICE(0x1096),
98 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 99 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
5881cde8 101 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
b7ee49db 102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 103 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
ae2c3860
AK		 104 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
1da177e4
LT		 106 /* required last entry */
107 {0,}
108};
109
110MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
111
35574764
NN		 112int e1000_up(struct e1000_adapter *adapter);
113void e1000_down(struct e1000_adapter *adapter);
114void e1000_reinit_locked(struct e1000_adapter *adapter);
115void e1000_reset(struct e1000_adapter *adapter);
116int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
117int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
118int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
119void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
120void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 121static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 122 struct e1000_tx_ring *txdr);
3ad2cc67 123static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 124 struct e1000_rx_ring *rxdr);
3ad2cc67 125static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 126 struct e1000_tx_ring *tx_ring);
3ad2cc67 127static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 128 struct e1000_rx_ring *rx_ring);
129void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 130
131static int e1000_init_module(void);
132static void e1000_exit_module(void);
133static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
134static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 135static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 136static int e1000_sw_init(struct e1000_adapter *adapter);
137static int e1000_open(struct net_device *netdev);
138static int e1000_close(struct net_device *netdev);
139static void e1000_configure_tx(struct e1000_adapter *adapter);
140static void e1000_configure_rx(struct e1000_adapter *adapter);
141static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 142static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
143static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
144static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
145 struct e1000_tx_ring *tx_ring);
146static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 148static void e1000_set_multi(struct net_device *netdev);
149static void e1000_update_phy_info(unsigned long data);
150static void e1000_watchdog(unsigned long data);
1da177e4
LT		 151static void e1000_82547_tx_fifo_stall(unsigned long data);
152static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
153static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
154static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
155static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 156static irqreturn_t e1000_intr(int irq, void *data);
581d708e
MC		 157static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
158 struct e1000_tx_ring *tx_ring);
1da177e4 159#ifdef CONFIG_E1000_NAPI
581d708e 160static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 161static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 162 struct e1000_rx_ring *rx_ring,
1da177e4 163 int *work_done, int work_to_do);
2d7edb92 164static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 165 struct e1000_rx_ring *rx_ring,
2d7edb92 166 int *work_done, int work_to_do);
1da177e4 167#else
581d708e
MC		 168static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring);
170static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
1da177e4 172#endif
581d708e 173static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 174 struct e1000_rx_ring *rx_ring,
175 int cleaned_count);
581d708e 176static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 177 struct e1000_rx_ring *rx_ring,
178 int cleaned_count);
1da177e4
LT		 179static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
180static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
181 int cmd);
35574764 182void e1000_set_ethtool_ops(struct net_device *netdev);
1da177e4
LT		 183static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
184static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
185static void e1000_tx_timeout(struct net_device *dev);
87041639 186static void e1000_reset_task(struct net_device *dev);
1da177e4 187static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 188static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
189 struct sk_buff *skb);
1da177e4
LT		 190
191static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
192static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
193static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
194static void e1000_restore_vlan(struct e1000_adapter *adapter);
195
977e74b5 196static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 197#ifdef CONFIG_PM
1da177e4
LT		 198static int e1000_resume(struct pci_dev *pdev);
199#endif
c653e635 200static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 201
202#ifdef CONFIG_NET_POLL_CONTROLLER
203/* for netdump / net console */
204static void e1000_netpoll (struct net_device *netdev);
205#endif
206
35574764
NN		 207extern void e1000_check_options(struct e1000_adapter *adapter);
208
9026729b
AK		 209static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
210 pci_channel_state_t state);
211static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
212static void e1000_io_resume(struct pci_dev *pdev);
213
214static struct pci_error_handlers e1000_err_handler = {
215 .error_detected = e1000_io_error_detected,
216 .slot_reset = e1000_io_slot_reset,
217 .resume = e1000_io_resume,
218};
24025e4e 219
1da177e4
LT		 220static struct pci_driver e1000_driver = {
221 .name = e1000_driver_name,
222 .id_table = e1000_pci_tbl,
223 .probe = e1000_probe,
224 .remove = __devexit_p(e1000_remove),
c4e24f01 225#ifdef CONFIG_PM
1da177e4 226 /* Power Managment Hooks */
1da177e4 227 .suspend = e1000_suspend,
c653e635 228 .resume = e1000_resume,
1da177e4 229#endif
9026729b
AK		 230 .shutdown = e1000_shutdown,
231 .err_handler = &e1000_err_handler
1da177e4
LT		 232};
233
234MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
235MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
236MODULE_LICENSE("GPL");
237MODULE_VERSION(DRV_VERSION);
238
239static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
240module_param(debug, int, 0);
241MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
242
243/**
244 * e1000_init_module - Driver Registration Routine
245 *
246 * e1000_init_module is the first routine called when the driver is
247 * loaded. All it does is register with the PCI subsystem.
248 **/
249
250static int __init
251e1000_init_module(void)
252{
253 int ret;
254 printk(KERN_INFO "%s - version %s\n",
255 e1000_driver_string, e1000_driver_version);
256
257 printk(KERN_INFO "%s\n", e1000_copyright);
258
29917620 259 ret = pci_register_driver(&e1000_driver);
8b378def 260
1da177e4
LT		 261 return ret;
262}
263
264module_init(e1000_init_module);
265
266/**
267 * e1000_exit_module - Driver Exit Cleanup Routine
268 *
269 * e1000_exit_module is called just before the driver is removed
270 * from memory.
271 **/
272
273static void __exit
274e1000_exit_module(void)
275{
1da177e4
LT		 276 pci_unregister_driver(&e1000_driver);
277}
278
279module_exit(e1000_exit_module);
280
2db10a08
AK		 281static int e1000_request_irq(struct e1000_adapter *adapter)
282{
283 struct net_device *netdev = adapter->netdev;
284 int flags, err = 0;
285
c0bc8721 286 flags = IRQF_SHARED;
2db10a08
AK		 287#ifdef CONFIG_PCI_MSI
288 if (adapter->hw.mac_type > e1000_82547_rev_2) {
289 adapter->have_msi = TRUE;
290 if ((err = pci_enable_msi(adapter->pdev))) {
291 DPRINTK(PROBE, ERR,
292 "Unable to allocate MSI interrupt Error: %d\n", err);
293 adapter->have_msi = FALSE;
294 }
295 }
296 if (adapter->have_msi)
61ef5c00 297 flags &= ~IRQF_SHARED;
2db10a08
AK		 298#endif
299 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
300 netdev->name, netdev)))
301 DPRINTK(PROBE, ERR,
302 "Unable to allocate interrupt Error: %d\n", err);
303
304 return err;
305}
306
307static void e1000_free_irq(struct e1000_adapter *adapter)
308{
309 struct net_device *netdev = adapter->netdev;
310
311 free_irq(adapter->pdev->irq, netdev);
312
313#ifdef CONFIG_PCI_MSI
314 if (adapter->have_msi)
315 pci_disable_msi(adapter->pdev);
316#endif
317}
318
1da177e4
LT		 319/**
320 * e1000_irq_disable - Mask off interrupt generation on the NIC
321 * @adapter: board private structure
322 **/
323
e619d523 324static void
1da177e4
LT		 325e1000_irq_disable(struct e1000_adapter *adapter)
326{
327 atomic_inc(&adapter->irq_sem);
328 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
329 E1000_WRITE_FLUSH(&adapter->hw);
330 synchronize_irq(adapter->pdev->irq);
331}
332
333/**
334 * e1000_irq_enable - Enable default interrupt generation settings
335 * @adapter: board private structure
336 **/
337
e619d523 338static void
1da177e4
LT		 339e1000_irq_enable(struct e1000_adapter *adapter)
340{
96838a40 341 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 342 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
343 E1000_WRITE_FLUSH(&adapter->hw);
344 }
345}
3ad2cc67
AB		 346
347static void
2d7edb92
MC		 348e1000_update_mng_vlan(struct e1000_adapter *adapter)
349{
350 struct net_device *netdev = adapter->netdev;
351 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
352 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 353 if (adapter->vlgrp) {
354 if (!adapter->vlgrp->vlan_devices[vid]) {
355 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 356 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
357 e1000_vlan_rx_add_vid(netdev, vid);
358 adapter->mng_vlan_id = vid;
359 } else
360 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 361
362 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
363 (vid != old_vid) &&
2d7edb92
MC		 364 !adapter->vlgrp->vlan_devices[old_vid])
365 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 366 } else
367 adapter->mng_vlan_id = vid;
2d7edb92
MC		 368 }
369}
b55ccb35
JK		 370
371/**
372 * e1000_release_hw_control - release control of the h/w to f/w
373 * @adapter: address of board private structure
374 *
375 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
376 * For ASF and Pass Through versions of f/w this means that the
377 * driver is no longer loaded. For AMT version (only with 82573) i
378 * of the f/w this means that the netowrk i/f is closed.
76c224bc 379 *
b55ccb35
JK		 380 **/
381
e619d523 382static void
b55ccb35
JK		 383e1000_release_hw_control(struct e1000_adapter *adapter)
384{
385 uint32_t ctrl_ext;
386 uint32_t swsm;
cd94dd0b 387 uint32_t extcnf;
b55ccb35
JK		 388
389 /* Let firmware taken over control of h/w */
390 switch (adapter->hw.mac_type) {
391 case e1000_82571:
392 case e1000_82572:
4cc15f54 393 case e1000_80003es2lan:
b55ccb35
JK		 394 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
395 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
396 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
397 break;
398 case e1000_82573:
399 swsm = E1000_READ_REG(&adapter->hw, SWSM);
400 E1000_WRITE_REG(&adapter->hw, SWSM,
401 swsm & ~E1000_SWSM_DRV_LOAD);
cd94dd0b
AK		 402 case e1000_ich8lan:
403 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
404 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
405 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
406 break;
b55ccb35
JK		 407 default:
408 break;
409 }
410}
411
412/**
413 * e1000_get_hw_control - get control of the h/w from f/w
414 * @adapter: address of board private structure
415 *
416 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 417 * For ASF and Pass Through versions of f/w this means that
418 * the driver is loaded. For AMT version (only with 82573)
b55ccb35 419 * of the f/w this means that the netowrk i/f is open.
76c224bc 420 *
b55ccb35
JK		 421 **/
422
e619d523 423static void
b55ccb35
JK		 424e1000_get_hw_control(struct e1000_adapter *adapter)
425{
426 uint32_t ctrl_ext;
427 uint32_t swsm;
cd94dd0b 428 uint32_t extcnf;
b55ccb35
JK		 429 /* Let firmware know the driver has taken over */
430 switch (adapter->hw.mac_type) {
431 case e1000_82571:
432 case e1000_82572:
4cc15f54 433 case e1000_80003es2lan:
b55ccb35
JK		 434 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
435 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
436 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
437 break;
438 case e1000_82573:
439 swsm = E1000_READ_REG(&adapter->hw, SWSM);
440 E1000_WRITE_REG(&adapter->hw, SWSM,
441 swsm | E1000_SWSM_DRV_LOAD);
442 break;
cd94dd0b
AK		 443 case e1000_ich8lan:
444 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
445 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
446 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
447 break;
b55ccb35
JK		 448 default:
449 break;
450 }
451}
452
1da177e4
LT		 453int
454e1000_up(struct e1000_adapter *adapter)
455{
456 struct net_device *netdev = adapter->netdev;
2db10a08 457 int i;
1da177e4
LT		 458
459 /* hardware has been reset, we need to reload some things */
460
1da177e4
LT		 461 e1000_set_multi(netdev);
462
463 e1000_restore_vlan(adapter);
464
465 e1000_configure_tx(adapter);
466 e1000_setup_rctl(adapter);
467 e1000_configure_rx(adapter);
72d64a43
JK		 468 /* call E1000_DESC_UNUSED which always leaves
469 * at least 1 descriptor unused to make sure
470 * next_to_use != next_to_clean */
f56799ea 471 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 472 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 473 adapter->alloc_rx_buf(adapter, ring,
474 E1000_DESC_UNUSED(ring));
f56799ea 475 }
1da177e4 476
7bfa4816
JK		 477 adapter->tx_queue_len = netdev->tx_queue_len;
478
1da177e4
LT		 479#ifdef CONFIG_E1000_NAPI
480 netif_poll_enable(netdev);
481#endif
5de55624
MC		 482 e1000_irq_enable(adapter);
483
1314bbf3
AK		 484 clear_bit(__E1000_DOWN, &adapter->flags);
485
486 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1da177e4
LT		 487 return 0;
488}
489
79f05bf0
AK		 490/**
491 * e1000_power_up_phy - restore link in case the phy was powered down
492 * @adapter: address of board private structure
493 *
494 * The phy may be powered down to save power and turn off link when the
495 * driver is unloaded and wake on lan is not enabled (among others)
496 * *** this routine MUST be followed by a call to e1000_reset ***
497 *
498 **/
499
d658266e 500void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0
AK		 501{
502 uint16_t mii_reg = 0;
503
504 /* Just clear the power down bit to wake the phy back up */
505 if (adapter->hw.media_type == e1000_media_type_copper) {
506 /* according to the manual, the phy will retain its
507 * settings across a power-down/up cycle */
508 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
509 mii_reg &= ~MII_CR_POWER_DOWN;
510 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
511 }
512}
513
514static void e1000_power_down_phy(struct e1000_adapter *adapter)
515{
61c2505f
BA		 516 /* Power down the PHY so no link is implied when interface is down *
517 * The PHY cannot be powered down if any of the following is TRUE *
79f05bf0
AK		 518 * (a) WoL is enabled
519 * (b) AMT is active
520 * (c) SoL/IDER session is active */
521 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
61c2505f 522 adapter->hw.media_type == e1000_media_type_copper) {
79f05bf0 523 uint16_t mii_reg = 0;
61c2505f
BA		 524
525 switch (adapter->hw.mac_type) {
526 case e1000_82540:
527 case e1000_82545:
528 case e1000_82545_rev_3:
529 case e1000_82546:
530 case e1000_82546_rev_3:
531 case e1000_82541:
532 case e1000_82541_rev_2:
533 case e1000_82547:
534 case e1000_82547_rev_2:
535 if (E1000_READ_REG(&adapter->hw, MANC) &
536 E1000_MANC_SMBUS_EN)
537 goto out;
538 break;
539 case e1000_82571:
540 case e1000_82572:
541 case e1000_82573:
542 case e1000_80003es2lan:
543 case e1000_ich8lan:
544 if (e1000_check_mng_mode(&adapter->hw) ||
545 e1000_check_phy_reset_block(&adapter->hw))
546 goto out;
547 break;
548 default:
549 goto out;
550 }
79f05bf0
AK		 551 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
552 mii_reg |= MII_CR_POWER_DOWN;
553 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
554 mdelay(1);
555 }
61c2505f
BA		 556out:
557 return;
79f05bf0
AK		 558}
559
1da177e4
LT		 560void
561e1000_down(struct e1000_adapter *adapter)
562{
563 struct net_device *netdev = adapter->netdev;
564
1314bbf3
AK		 565 /* signal that we're down so the interrupt handler does not
566 * reschedule our watchdog timer */
567 set_bit(__E1000_DOWN, &adapter->flags);
568
1da177e4 569 e1000_irq_disable(adapter);
c1605eb3 570
1da177e4
LT		 571 del_timer_sync(&adapter->tx_fifo_stall_timer);
572 del_timer_sync(&adapter->watchdog_timer);
573 del_timer_sync(&adapter->phy_info_timer);
574
575#ifdef CONFIG_E1000_NAPI
576 netif_poll_disable(netdev);
577#endif
7bfa4816 578 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 579 adapter->link_speed = 0;
580 adapter->link_duplex = 0;
581 netif_carrier_off(netdev);
582 netif_stop_queue(netdev);
583
584 e1000_reset(adapter);
581d708e
MC		 585 e1000_clean_all_tx_rings(adapter);
586 e1000_clean_all_rx_rings(adapter);
1da177e4 587}
1da177e4 588
2db10a08
AK		 589void
590e1000_reinit_locked(struct e1000_adapter *adapter)
591{
592 WARN_ON(in_interrupt());
593 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
594 msleep(1);
595 e1000_down(adapter);
596 e1000_up(adapter);
597 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 598}
599
600void
601e1000_reset(struct e1000_adapter *adapter)
602{
2d7edb92 603 uint32_t pba, manc;
09ae3e88
JK		 604#ifdef DISABLE_MULR
605 uint32_t tctl;
606#endif
1125ecbc 607 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 608
609 /* Repartition Pba for greater than 9k mtu
610 * To take effect CTRL.RST is required.
611 */
612
2d7edb92
MC		 613 switch (adapter->hw.mac_type) {
614 case e1000_82547:
0e6ef3e0 615 case e1000_82547_rev_2:
2d7edb92
MC		 616 pba = E1000_PBA_30K;
617 break;
868d5309
MC		 618 case e1000_82571:
619 case e1000_82572:
6418ecc6 620 case e1000_80003es2lan:
868d5309
MC		 621 pba = E1000_PBA_38K;
622 break;
2d7edb92
MC		 623 case e1000_82573:
624 pba = E1000_PBA_12K;
625 break;
cd94dd0b
AK		 626 case e1000_ich8lan:
627 pba = E1000_PBA_8K;
628 break;
2d7edb92
MC		 629 default:
630 pba = E1000_PBA_48K;
631 break;
632 }
633
96838a40 634 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 635 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 636 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 637
638
96838a40 639 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 640 adapter->tx_fifo_head = 0;
641 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
642 adapter->tx_fifo_size =
643 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
644 atomic_set(&adapter->tx_fifo_stall, 0);
645 }
2d7edb92 646
1da177e4
LT		 647 E1000_WRITE_REG(&adapter->hw, PBA, pba);
648
649 /* flow control settings */
f11b7f85
JK		 650 /* Set the FC high water mark to 90% of the FIFO size.
651 * Required to clear last 3 LSB */
652 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 653 /* We can't use 90% on small FIFOs because the remainder
654 * would be less than 1 full frame. In this case, we size
655 * it to allow at least a full frame above the high water
656 * mark. */
657 if (pba < E1000_PBA_16K)
658 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85
JK		 659
660 adapter->hw.fc_high_water = fc_high_water_mark;
661 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 662 if (adapter->hw.mac_type == e1000_80003es2lan)
663 adapter->hw.fc_pause_time = 0xFFFF;
664 else
665 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 666 adapter->hw.fc_send_xon = 1;
667 adapter->hw.fc = adapter->hw.original_fc;
668
2d7edb92 669 /* Allow time for pending master requests to run */
1da177e4 670 e1000_reset_hw(&adapter->hw);
96838a40 671 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 672 E1000_WRITE_REG(&adapter->hw, WUC, 0);
09ae3e88
JK		 673#ifdef DISABLE_MULR
674 /* disable Multiple Reads in Transmit Control Register for debugging */
675 tctl = E1000_READ_REG(hw, TCTL);
676 E1000_WRITE_REG(hw, TCTL, tctl & ~E1000_TCTL_MULR);
677
678#endif
96838a40 679 if (e1000_init_hw(&adapter->hw))
1da177e4 680 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 681 e1000_update_mng_vlan(adapter);
1da177e4
LT		 682 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
683 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
684
685 e1000_reset_adaptive(&adapter->hw);
686 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 687
688 if (!adapter->smart_power_down &&
689 (adapter->hw.mac_type == e1000_82571 ||
690 adapter->hw.mac_type == e1000_82572)) {
691 uint16_t phy_data = 0;
692 /* speed up time to link by disabling smart power down, ignore
693 * the return value of this function because there is nothing
694 * different we would do if it failed */
695 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
696 &phy_data);
697 phy_data &= ~IGP02E1000_PM_SPD;
698 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
699 phy_data);
700 }
701
4ccc12ae
JB		 702 if ((adapter->en_mng_pt) &&
703 (adapter->hw.mac_type >= e1000_82540) &&
704 (adapter->hw.mac_type < e1000_82571) &&
705 (adapter->hw.media_type == e1000_media_type_copper)) {
2d7edb92
MC		 706 manc = E1000_READ_REG(&adapter->hw, MANC);
707 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
708 E1000_WRITE_REG(&adapter->hw, MANC, manc);
709 }
1da177e4
LT		 710}
711
712/**
713 * e1000_probe - Device Initialization Routine
714 * @pdev: PCI device information struct
715 * @ent: entry in e1000_pci_tbl
716 *
717 * Returns 0 on success, negative on failure
718 *
719 * e1000_probe initializes an adapter identified by a pci_dev structure.
720 * The OS initialization, configuring of the adapter private structure,
721 * and a hardware reset occur.
722 **/
723
724static int __devinit
725e1000_probe(struct pci_dev *pdev,
726 const struct pci_device_id *ent)
727{
728 struct net_device *netdev;
729 struct e1000_adapter *adapter;
2d7edb92 730 unsigned long mmio_start, mmio_len;
cd94dd0b 731 unsigned long flash_start, flash_len;
2d7edb92 732
1da177e4 733 static int cards_found = 0;
120cd576 734 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 735 int i, err, pci_using_dac;
120cd576 736 uint16_t eeprom_data = 0;
1da177e4 737 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 738 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 739 return err;
740
cd94dd0b
AK		 741 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
742 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 743 pci_using_dac = 1;
744 } else {
cd94dd0b
AK		 745 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
746 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 747 E1000_ERR("No usable DMA configuration, aborting\n");
6dd62ab0 748 goto err_dma;
1da177e4
LT		 749 }
750 pci_using_dac = 0;
751 }
752
96838a40 753 if ((err = pci_request_regions(pdev, e1000_driver_name)))
6dd62ab0 754 goto err_pci_reg;
1da177e4
LT		 755
756 pci_set_master(pdev);
757
6dd62ab0 758 err = -ENOMEM;
1da177e4 759 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 760 if (!netdev)
1da177e4 761 goto err_alloc_etherdev;
1da177e4
LT		 762
763 SET_MODULE_OWNER(netdev);
764 SET_NETDEV_DEV(netdev, &pdev->dev);
765
766 pci_set_drvdata(pdev, netdev);
60490fe0 767 adapter = netdev_priv(netdev);
1da177e4
LT		 768 adapter->netdev = netdev;
769 adapter->pdev = pdev;
770 adapter->hw.back = adapter;
771 adapter->msg_enable = (1 << debug) - 1;
772
773 mmio_start = pci_resource_start(pdev, BAR_0);
774 mmio_len = pci_resource_len(pdev, BAR_0);
775
6dd62ab0 776 err = -EIO;
1da177e4 777 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6dd62ab0 778 if (!adapter->hw.hw_addr)
1da177e4 779 goto err_ioremap;
1da177e4 780
96838a40
JB		 781 for (i = BAR_1; i <= BAR_5; i++) {
782 if (pci_resource_len(pdev, i) == 0)
1da177e4 783 continue;
96838a40 784 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 785 adapter->hw.io_base = pci_resource_start(pdev, i);
786 break;
787 }
788 }
789
790 netdev->open = &e1000_open;
791 netdev->stop = &e1000_close;
792 netdev->hard_start_xmit = &e1000_xmit_frame;
793 netdev->get_stats = &e1000_get_stats;
794 netdev->set_multicast_list = &e1000_set_multi;
795 netdev->set_mac_address = &e1000_set_mac;
796 netdev->change_mtu = &e1000_change_mtu;
797 netdev->do_ioctl = &e1000_ioctl;
798 e1000_set_ethtool_ops(netdev);
799 netdev->tx_timeout = &e1000_tx_timeout;
800 netdev->watchdog_timeo = 5 * HZ;
801#ifdef CONFIG_E1000_NAPI
802 netdev->poll = &e1000_clean;
803 netdev->weight = 64;
804#endif
805 netdev->vlan_rx_register = e1000_vlan_rx_register;
806 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
807 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
808#ifdef CONFIG_NET_POLL_CONTROLLER
809 netdev->poll_controller = e1000_netpoll;
810#endif
0eb5a34c 811 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT		 812
813 netdev->mem_start = mmio_start;
814 netdev->mem_end = mmio_start + mmio_len;
815 netdev->base_addr = adapter->hw.io_base;
816
817 adapter->bd_number = cards_found;
818
819 /* setup the private structure */
820
96838a40 821 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 822 goto err_sw_init;
823
6dd62ab0 824 err = -EIO;
cd94dd0b
AK		 825 /* Flash BAR mapping must happen after e1000_sw_init
826 * because it depends on mac_type */
827 if ((adapter->hw.mac_type == e1000_ich8lan) &&
828 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
829 flash_start = pci_resource_start(pdev, 1);
830 flash_len = pci_resource_len(pdev, 1);
831 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6dd62ab0 832 if (!adapter->hw.flash_address)
cd94dd0b 833 goto err_flashmap;
cd94dd0b
AK		 834 }
835
6dd62ab0 836 if (e1000_check_phy_reset_block(&adapter->hw))
2d7edb92
MC		 837 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
838
96838a40 839 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 840 netdev->features = NETIF_F_SG |
841 NETIF_F_HW_CSUM |
842 NETIF_F_HW_VLAN_TX |
843 NETIF_F_HW_VLAN_RX |
844 NETIF_F_HW_VLAN_FILTER;
cd94dd0b
AK		 845 if (adapter->hw.mac_type == e1000_ich8lan)
846 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 847 }
848
849#ifdef NETIF_F_TSO
96838a40 850 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 851 (adapter->hw.mac_type != e1000_82547))
852 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 853
854#ifdef NETIF_F_TSO_IPV6
96838a40 855 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 856 netdev->features |= NETIF_F_TSO_IPV6;
857#endif
1da177e4 858#endif
96838a40 859 if (pci_using_dac)
1da177e4
LT		 860 netdev->features |= NETIF_F_HIGHDMA;
861
76c224bc
AK		 862 netdev->features |= NETIF_F_LLTX;
863
2d7edb92
MC		 864 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
865
cd94dd0b
AK		 866 /* initialize eeprom parameters */
867
868 if (e1000_init_eeprom_params(&adapter->hw)) {
869 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 870 goto err_eeprom;
cd94dd0b
AK		 871 }
872
96838a40 873 /* before reading the EEPROM, reset the controller to
1da177e4 874 * put the device in a known good starting state */
96838a40 875
1da177e4
LT		 876 e1000_reset_hw(&adapter->hw);
877
878 /* make sure the EEPROM is good */
879
96838a40 880 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4 881 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 882 goto err_eeprom;
883 }
884
885 /* copy the MAC address out of the EEPROM */
886
96838a40 887 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 888 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
889 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 890 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 891
96838a40 892 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4 893 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 894 goto err_eeprom;
895 }
896
1da177e4
LT		 897 e1000_get_bus_info(&adapter->hw);
898
899 init_timer(&adapter->tx_fifo_stall_timer);
900 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
901 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
902
903 init_timer(&adapter->watchdog_timer);
904 adapter->watchdog_timer.function = &e1000_watchdog;
905 adapter->watchdog_timer.data = (unsigned long) adapter;
906
1da177e4
LT		 907 init_timer(&adapter->phy_info_timer);
908 adapter->phy_info_timer.function = &e1000_update_phy_info;
909 adapter->phy_info_timer.data = (unsigned long) adapter;
910
87041639
JK		 911 INIT_WORK(&adapter->reset_task,
912 (void (*)(void *))e1000_reset_task, netdev);
1da177e4 913
1da177e4
LT		 914 e1000_check_options(adapter);
915
916 /* Initial Wake on LAN setting
917 * If APM wake is enabled in the EEPROM,
918 * enable the ACPI Magic Packet filter
919 */
920
96838a40 921 switch (adapter->hw.mac_type) {
1da177e4
LT		 922 case e1000_82542_rev2_0:
923 case e1000_82542_rev2_1:
924 case e1000_82543:
925 break;
926 case e1000_82544:
927 e1000_read_eeprom(&adapter->hw,
928 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
929 eeprom_apme_mask = E1000_EEPROM_82544_APM;
930 break;
cd94dd0b
AK		 931 case e1000_ich8lan:
932 e1000_read_eeprom(&adapter->hw,
933 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
934 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
935 break;
1da177e4
LT		 936 case e1000_82546:
937 case e1000_82546_rev_3:
fd803241 938 case e1000_82571:
6418ecc6 939 case e1000_80003es2lan:
96838a40 940 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 941 e1000_read_eeprom(&adapter->hw,
942 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
943 break;
944 }
945 /* Fall Through */
946 default:
947 e1000_read_eeprom(&adapter->hw,
948 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
949 break;
950 }
96838a40 951 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 952 adapter->eeprom_wol |= E1000_WUFC_MAG;
953
954 /* now that we have the eeprom settings, apply the special cases
955 * where the eeprom may be wrong or the board simply won't support
956 * wake on lan on a particular port */
957 switch (pdev->device) {
958 case E1000_DEV_ID_82546GB_PCIE:
959 adapter->eeprom_wol = 0;
960 break;
961 case E1000_DEV_ID_82546EB_FIBER:
962 case E1000_DEV_ID_82546GB_FIBER:
963 case E1000_DEV_ID_82571EB_FIBER:
964 /* Wake events only supported on port A for dual fiber
965 * regardless of eeprom setting */
966 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
967 adapter->eeprom_wol = 0;
968 break;
969 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 970 case E1000_DEV_ID_82571EB_QUAD_COPPER:
120cd576
JB		 971 /* if quad port adapter, disable WoL on all but port A */
972 if (global_quad_port_a != 0)
973 adapter->eeprom_wol = 0;
974 else
975 adapter->quad_port_a = 1;
976 /* Reset for multiple quad port adapters */
977 if (++global_quad_port_a == 4)
978 global_quad_port_a = 0;
979 break;
980 }
981
982 /* initialize the wol settings based on the eeprom settings */
983 adapter->wol = adapter->eeprom_wol;
1da177e4 984
fb3d47d4
JK		 985 /* print bus type/speed/width info */
986 {
987 struct e1000_hw *hw = &adapter->hw;
988 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
989 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
990 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
991 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
992 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
993 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
994 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
995 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
996 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
997 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
998 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
999 "32-bit"));
1000 }
1001
1002 for (i = 0; i < 6; i++)
1003 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1004
1da177e4
LT		 1005 /* reset the hardware with the new settings */
1006 e1000_reset(adapter);
1007
b55ccb35
JK		 1008 /* If the controller is 82573 and f/w is AMT, do not set
1009 * DRV_LOAD until the interface is up. For all other cases,
1010 * let the f/w know that the h/w is now under the control
1011 * of the driver. */
1012 if (adapter->hw.mac_type != e1000_82573 ||
1013 !e1000_check_mng_mode(&adapter->hw))
1014 e1000_get_hw_control(adapter);
2d7edb92 1015
1da177e4 1016 strcpy(netdev->name, "eth%d");
96838a40 1017 if ((err = register_netdev(netdev)))
1da177e4
LT		 1018 goto err_register;
1019
1314bbf3
AK		 1020 /* tell the stack to leave us alone until e1000_open() is called */
1021 netif_carrier_off(netdev);
1022 netif_stop_queue(netdev);
1023
1da177e4
LT		 1024 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1025
1026 cards_found++;
1027 return 0;
1028
1029err_register:
6dd62ab0
VA		 1030 e1000_release_hw_control(adapter);
1031err_eeprom:
1032 if (!e1000_check_phy_reset_block(&adapter->hw))
1033 e1000_phy_hw_reset(&adapter->hw);
1034
cd94dd0b
AK		 1035 if (adapter->hw.flash_address)
1036 iounmap(adapter->hw.flash_address);
1037err_flashmap:
6dd62ab0
VA		 1038#ifdef CONFIG_E1000_NAPI
1039 for (i = 0; i < adapter->num_rx_queues; i++)
1040 dev_put(&adapter->polling_netdev[i]);
1041#endif
1042
1043 kfree(adapter->tx_ring);
1044 kfree(adapter->rx_ring);
1045#ifdef CONFIG_E1000_NAPI
1046 kfree(adapter->polling_netdev);
1047#endif
1da177e4 1048err_sw_init:
1da177e4
LT		 1049 iounmap(adapter->hw.hw_addr);
1050err_ioremap:
1051 free_netdev(netdev);
1052err_alloc_etherdev:
1053 pci_release_regions(pdev);
6dd62ab0
VA		 1054err_pci_reg:
1055err_dma:
1056 pci_disable_device(pdev);
1da177e4
LT		 1057 return err;
1058}
1059
1060/**
1061 * e1000_remove - Device Removal Routine
1062 * @pdev: PCI device information struct
1063 *
1064 * e1000_remove is called by the PCI subsystem to alert the driver
1065 * that it should release a PCI device. The could be caused by a
1066 * Hot-Plug event, or because the driver is going to be removed from
1067 * memory.
1068 **/
1069
1070static void __devexit
1071e1000_remove(struct pci_dev *pdev)
1072{
1073 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1074 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 1075 uint32_t manc;
581d708e
MC		 1076#ifdef CONFIG_E1000_NAPI
1077 int i;
1078#endif
1da177e4 1079
be2b28ed
JG		 1080 flush_scheduled_work();
1081
4ccc12ae
JB		 1082 if (adapter->hw.mac_type >= e1000_82540 &&
1083 adapter->hw.mac_type < e1000_82571 &&
1084 adapter->hw.media_type == e1000_media_type_copper) {
1da177e4 1085 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 1086 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 1087 manc |= E1000_MANC_ARP_EN;
1088 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1089 }
1090 }
1091
b55ccb35
JK		 1092 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1093 * would have already happened in close and is redundant. */
1094 e1000_release_hw_control(adapter);
2d7edb92 1095
1da177e4 1096 unregister_netdev(netdev);
581d708e 1097#ifdef CONFIG_E1000_NAPI
f56799ea 1098 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1099 dev_put(&adapter->polling_netdev[i]);
581d708e 1100#endif
1da177e4 1101
96838a40 1102 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 1103 e1000_phy_hw_reset(&adapter->hw);
1da177e4 1104
24025e4e
MC		 1105 kfree(adapter->tx_ring);
1106 kfree(adapter->rx_ring);
1107#ifdef CONFIG_E1000_NAPI
1108 kfree(adapter->polling_netdev);
1109#endif
1110
1da177e4 1111 iounmap(adapter->hw.hw_addr);
cd94dd0b
AK		 1112 if (adapter->hw.flash_address)
1113 iounmap(adapter->hw.flash_address);
1da177e4
LT		 1114 pci_release_regions(pdev);
1115
1116 free_netdev(netdev);
1117
1118 pci_disable_device(pdev);
1119}
1120
1121/**
1122 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1123 * @adapter: board private structure to initialize
1124 *
1125 * e1000_sw_init initializes the Adapter private data structure.
1126 * Fields are initialized based on PCI device information and
1127 * OS network device settings (MTU size).
1128 **/
1129
1130static int __devinit
1131e1000_sw_init(struct e1000_adapter *adapter)
1132{
1133 struct e1000_hw *hw = &adapter->hw;
1134 struct net_device *netdev = adapter->netdev;
1135 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1136#ifdef CONFIG_E1000_NAPI
1137 int i;
1138#endif
1da177e4
LT		 1139
1140 /* PCI config space info */
1141
1142 hw->vendor_id = pdev->vendor;
1143 hw->device_id = pdev->device;
1144 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1145 hw->subsystem_id = pdev->subsystem_device;
1146
1147 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1148
1149 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1150
eb0f8054 1151 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
9e2feace 1152 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1153 hw->max_frame_size = netdev->mtu +
1154 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1155 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1156
1157 /* identify the MAC */
1158
96838a40 1159 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1160 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1161 return -EIO;
1162 }
1163
96838a40 1164 switch (hw->mac_type) {
1da177e4
LT		 1165 default:
1166 break;
1167 case e1000_82541:
1168 case e1000_82547:
1169 case e1000_82541_rev_2:
1170 case e1000_82547_rev_2:
1171 hw->phy_init_script = 1;
1172 break;
1173 }
1174
1175 e1000_set_media_type(hw);
1176
1177 hw->wait_autoneg_complete = FALSE;
1178 hw->tbi_compatibility_en = TRUE;
1179 hw->adaptive_ifs = TRUE;
1180
1181 /* Copper options */
1182
96838a40 1183 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1184 hw->mdix = AUTO_ALL_MODES;
1185 hw->disable_polarity_correction = FALSE;
1186 hw->master_slave = E1000_MASTER_SLAVE;
1187 }
1188
f56799ea
JK		 1189 adapter->num_tx_queues = 1;
1190 adapter->num_rx_queues = 1;
581d708e
MC		 1191
1192 if (e1000_alloc_queues(adapter)) {
1193 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1194 return -ENOMEM;
1195 }
1196
1197#ifdef CONFIG_E1000_NAPI
f56799ea 1198 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1199 adapter->polling_netdev[i].priv = adapter;
1200 adapter->polling_netdev[i].poll = &e1000_clean;
1201 adapter->polling_netdev[i].weight = 64;
1202 dev_hold(&adapter->polling_netdev[i]);
1203 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1204 }
7bfa4816 1205 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1206#endif
1207
1da177e4
LT		 1208 atomic_set(&adapter->irq_sem, 1);
1209 spin_lock_init(&adapter->stats_lock);
1da177e4 1210
1314bbf3
AK		 1211 set_bit(__E1000_DOWN, &adapter->flags);
1212
1da177e4
LT		 1213 return 0;
1214}
1215
581d708e
MC		 1216/**
1217 * e1000_alloc_queues - Allocate memory for all rings
1218 * @adapter: board private structure to initialize
1219 *
1220 * We allocate one ring per queue at run-time since we don't know the
1221 * number of queues at compile-time. The polling_netdev array is
1222 * intended for Multiqueue, but should work fine with a single queue.
1223 **/
1224
1225static int __devinit
1226e1000_alloc_queues(struct e1000_adapter *adapter)
1227{
1228 int size;
1229
f56799ea 1230 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1231 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1232 if (!adapter->tx_ring)
1233 return -ENOMEM;
1234 memset(adapter->tx_ring, 0, size);
1235
f56799ea 1236 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1237 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1238 if (!adapter->rx_ring) {
1239 kfree(adapter->tx_ring);
1240 return -ENOMEM;
1241 }
1242 memset(adapter->rx_ring, 0, size);
1243
1244#ifdef CONFIG_E1000_NAPI
f56799ea 1245 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1246 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1247 if (!adapter->polling_netdev) {
1248 kfree(adapter->tx_ring);
1249 kfree(adapter->rx_ring);
1250 return -ENOMEM;
1251 }
1252 memset(adapter->polling_netdev, 0, size);
1253#endif
1254
1255 return E1000_SUCCESS;
1256}
1257
1da177e4
LT		 1258/**
1259 * e1000_open - Called when a network interface is made active
1260 * @netdev: network interface device structure
1261 *
1262 * Returns 0 on success, negative value on failure
1263 *
1264 * The open entry point is called when a network interface is made
1265 * active by the system (IFF_UP). At this point all resources needed
1266 * for transmit and receive operations are allocated, the interrupt
1267 * handler is registered with the OS, the watchdog timer is started,
1268 * and the stack is notified that the interface is ready.
1269 **/
1270
1271static int
1272e1000_open(struct net_device *netdev)
1273{
60490fe0 1274 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1275 int err;
1276
2db10a08 1277 /* disallow open during test */
1314bbf3 1278 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1279 return -EBUSY;
1280
1da177e4
LT		 1281 /* allocate transmit descriptors */
1282
581d708e 1283 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1284 goto err_setup_tx;
1285
1286 /* allocate receive descriptors */
1287
581d708e 1288 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1289 goto err_setup_rx;
1290
2db10a08
AK		 1291 err = e1000_request_irq(adapter);
1292 if (err)
401a552b 1293 goto err_req_irq;
2db10a08 1294
79f05bf0
AK		 1295 e1000_power_up_phy(adapter);
1296
96838a40 1297 if ((err = e1000_up(adapter)))
1da177e4 1298 goto err_up;
2d7edb92 1299 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1300 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1301 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1302 e1000_update_mng_vlan(adapter);
1303 }
1da177e4 1304
b55ccb35
JK		 1305 /* If AMT is enabled, let the firmware know that the network
1306 * interface is now open */
1307 if (adapter->hw.mac_type == e1000_82573 &&
1308 e1000_check_mng_mode(&adapter->hw))
1309 e1000_get_hw_control(adapter);
1310
1da177e4
LT		 1311 return E1000_SUCCESS;
1312
1313err_up:
401a552b
VA		 1314 e1000_power_down_phy(adapter);
1315 e1000_free_irq(adapter);
1316err_req_irq:
581d708e 1317 e1000_free_all_rx_resources(adapter);
1da177e4 1318err_setup_rx:
581d708e 1319 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1320err_setup_tx:
1321 e1000_reset(adapter);
1322
1323 return err;
1324}
1325
1326/**
1327 * e1000_close - Disables a network interface
1328 * @netdev: network interface device structure
1329 *
1330 * Returns 0, this is not allowed to fail
1331 *
1332 * The close entry point is called when an interface is de-activated
1333 * by the OS. The hardware is still under the drivers control, but
1334 * needs to be disabled. A global MAC reset is issued to stop the
1335 * hardware, and all transmit and receive resources are freed.
1336 **/
1337
1338static int
1339e1000_close(struct net_device *netdev)
1340{
60490fe0 1341 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1342
2db10a08 1343 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1344 e1000_down(adapter);
79f05bf0 1345 e1000_power_down_phy(adapter);
2db10a08 1346 e1000_free_irq(adapter);
1da177e4 1347
581d708e
MC		 1348 e1000_free_all_tx_resources(adapter);
1349 e1000_free_all_rx_resources(adapter);
1da177e4 1350
4666560a
BA		 1351 /* kill manageability vlan ID if supported, but not if a vlan with
1352 * the same ID is registered on the host OS (let 8021q kill it) */
96838a40 1353 if ((adapter->hw.mng_cookie.status &
4666560a
BA		 1354 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1355 !(adapter->vlgrp &&
1356 adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) {
2d7edb92
MC		 1357 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1358 }
b55ccb35
JK		 1359
1360 /* If AMT is enabled, let the firmware know that the network
1361 * interface is now closed */
1362 if (adapter->hw.mac_type == e1000_82573 &&
1363 e1000_check_mng_mode(&adapter->hw))
1364 e1000_release_hw_control(adapter);
1365
1da177e4
LT		 1366 return 0;
1367}
1368
1369/**
1370 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1371 * @adapter: address of board private structure
2d7edb92
MC		 1372 * @start: address of beginning of memory
1373 * @len: length of memory
1da177e4 1374 **/
e619d523 1375static boolean_t
1da177e4
LT		 1376e1000_check_64k_bound(struct e1000_adapter *adapter,
1377 void *start, unsigned long len)
1378{
1379 unsigned long begin = (unsigned long) start;
1380 unsigned long end = begin + len;
1381
2648345f
MC		 1382 /* First rev 82545 and 82546 need to not allow any memory
1383 * write location to cross 64k boundary due to errata 23 */
1da177e4 1384 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1385 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1386 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1387 }
1388
1389 return TRUE;
1390}
1391
1392/**
1393 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1394 * @adapter: board private structure
581d708e 1395 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1396 *
1397 * Return 0 on success, negative on failure
1398 **/
1399
3ad2cc67 1400static int
581d708e
MC		 1401e1000_setup_tx_resources(struct e1000_adapter *adapter,
1402 struct e1000_tx_ring *txdr)
1da177e4 1403{
1da177e4
LT		 1404 struct pci_dev *pdev = adapter->pdev;
1405 int size;
1406
1407 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1408 txdr->buffer_info = vmalloc(size);
96838a40 1409 if (!txdr->buffer_info) {
2648345f
MC		 1410 DPRINTK(PROBE, ERR,
1411 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1412 return -ENOMEM;
1413 }
1414 memset(txdr->buffer_info, 0, size);
1415
1416 /* round up to nearest 4K */
1417
1418 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1419 E1000_ROUNDUP(txdr->size, 4096);
1420
1421 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1422 if (!txdr->desc) {
1da177e4 1423setup_tx_desc_die:
1da177e4 1424 vfree(txdr->buffer_info);
2648345f
MC		 1425 DPRINTK(PROBE, ERR,
1426 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1427 return -ENOMEM;
1428 }
1429
2648345f 1430 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1431 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1432 void *olddesc = txdr->desc;
1433 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1434 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1435 "at %p\n", txdr->size, txdr->desc);
1436 /* Try again, without freeing the previous */
1da177e4 1437 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1438 /* Failed allocation, critical failure */
96838a40 1439 if (!txdr->desc) {
1da177e4
LT		 1440 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1441 goto setup_tx_desc_die;
1442 }
1443
1444 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1445 /* give up */
2648345f
MC		 1446 pci_free_consistent(pdev, txdr->size, txdr->desc,
1447 txdr->dma);
1da177e4
LT		 1448 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1449 DPRINTK(PROBE, ERR,
2648345f
MC		 1450 "Unable to allocate aligned memory "
1451 "for the transmit descriptor ring\n");
1da177e4
LT		 1452 vfree(txdr->buffer_info);
1453 return -ENOMEM;
1454 } else {
2648345f 1455 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1456 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1457 }
1458 }
1459 memset(txdr->desc, 0, txdr->size);
1460
1461 txdr->next_to_use = 0;
1462 txdr->next_to_clean = 0;
2ae76d98 1463 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1464
1465 return 0;
1466}
1467
581d708e
MC		 1468/**
1469 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1470 * (Descriptors) for all queues
1471 * @adapter: board private structure
1472 *
581d708e
MC		 1473 * Return 0 on success, negative on failure
1474 **/
1475
1476int
1477e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1478{
1479 int i, err = 0;
1480
f56799ea 1481 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1482 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1483 if (err) {
1484 DPRINTK(PROBE, ERR,
1485 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1486 for (i-- ; i >= 0; i--)
1487 e1000_free_tx_resources(adapter,
1488 &adapter->tx_ring[i]);
581d708e
MC		 1489 break;
1490 }
1491 }
1492
1493 return err;
1494}
1495
1da177e4
LT		 1496/**
1497 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1498 * @adapter: board private structure
1499 *
1500 * Configure the Tx unit of the MAC after a reset.
1501 **/
1502
1503static void
1504e1000_configure_tx(struct e1000_adapter *adapter)
1505{
581d708e
MC		 1506 uint64_t tdba;
1507 struct e1000_hw *hw = &adapter->hw;
1508 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1509 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1510
1511 /* Setup the HW Tx Head and Tail descriptor pointers */
1512
f56799ea 1513 switch (adapter->num_tx_queues) {
24025e4e
MC		 1514 case 1:
1515 default:
581d708e
MC		 1516 tdba = adapter->tx_ring[0].dma;
1517 tdlen = adapter->tx_ring[0].count *
1518 sizeof(struct e1000_tx_desc);
581d708e 1519 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1520 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1521 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1522 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1523 E1000_WRITE_REG(hw, TDH, 0);
6a951698
AK		 1524 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1525 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1526 break;
1527 }
1da177e4
LT		 1528
1529 /* Set the default values for the Tx Inter Packet Gap timer */
1530
0fadb059
JK		 1531 if (hw->media_type == e1000_media_type_fiber ||
1532 hw->media_type == e1000_media_type_internal_serdes)
1533 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1534 else
1535 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1536
581d708e 1537 switch (hw->mac_type) {
1da177e4
LT		 1538 case e1000_82542_rev2_0:
1539 case e1000_82542_rev2_1:
1540 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1541 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1542 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1543 break;
87041639
JK		 1544 case e1000_80003es2lan:
1545 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1546 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1547 break;
1da177e4 1548 default:
0fadb059
JK		 1549 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1550 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1551 break;
1da177e4 1552 }
0fadb059
JK		 1553 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1554 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1555 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1556
1557 /* Set the Tx Interrupt Delay register */
1558
581d708e
MC		 1559 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1560 if (hw->mac_type >= e1000_82540)
1561 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1562
1563 /* Program the Transmit Control Register */
1564
581d708e 1565 tctl = E1000_READ_REG(hw, TCTL);
1da177e4 1566 tctl &= ~E1000_TCTL_CT;
7e6c9861 1567 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1568 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1569
2ae76d98
MC		 1570 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1571 tarc = E1000_READ_REG(hw, TARC0);
09ae3e88 1572 tarc |= (1 << 21);
2ae76d98 1573 E1000_WRITE_REG(hw, TARC0, tarc);
87041639
JK		 1574 } else if (hw->mac_type == e1000_80003es2lan) {
1575 tarc = E1000_READ_REG(hw, TARC0);
1576 tarc |= 1;
87041639
JK		 1577 E1000_WRITE_REG(hw, TARC0, tarc);
1578 tarc = E1000_READ_REG(hw, TARC1);
1579 tarc |= 1;
1580 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1581 }
1582
581d708e 1583 e1000_config_collision_dist(hw);
1da177e4
LT		 1584
1585 /* Setup Transmit Descriptor Settings for eop descriptor */
1586 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1587 E1000_TXD_CMD_IFCS;
1588
581d708e 1589 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1590 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1591 else
1592 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1593
1594 /* Cache if we're 82544 running in PCI-X because we'll
1595 * need this to apply a workaround later in the send path. */
581d708e
MC		 1596 if (hw->mac_type == e1000_82544 &&
1597 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1598 adapter->pcix_82544 = 1;
7e6c9861
JK		 1599
1600 E1000_WRITE_REG(hw, TCTL, tctl);
1601
1da177e4
LT		 1602}
1603
1604/**
1605 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1606 * @adapter: board private structure
581d708e 1607 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1608 *
1609 * Returns 0 on success, negative on failure
1610 **/
1611
3ad2cc67 1612static int
581d708e
MC		 1613e1000_setup_rx_resources(struct e1000_adapter *adapter,
1614 struct e1000_rx_ring *rxdr)
1da177e4 1615{
1da177e4 1616 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1617 int size, desc_len;
1da177e4
LT		 1618
1619 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1620 rxdr->buffer_info = vmalloc(size);
581d708e 1621 if (!rxdr->buffer_info) {
2648345f
MC		 1622 DPRINTK(PROBE, ERR,
1623 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1624 return -ENOMEM;
1625 }
1626 memset(rxdr->buffer_info, 0, size);
1627
2d7edb92
MC		 1628 size = sizeof(struct e1000_ps_page) * rxdr->count;
1629 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1630 if (!rxdr->ps_page) {
2d7edb92
MC		 1631 vfree(rxdr->buffer_info);
1632 DPRINTK(PROBE, ERR,
1633 "Unable to allocate memory for the receive descriptor ring\n");
1634 return -ENOMEM;
1635 }
1636 memset(rxdr->ps_page, 0, size);
1637
1638 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1639 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1640 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1641 vfree(rxdr->buffer_info);
1642 kfree(rxdr->ps_page);
1643 DPRINTK(PROBE, ERR,
1644 "Unable to allocate memory for the receive descriptor ring\n");
1645 return -ENOMEM;
1646 }
1647 memset(rxdr->ps_page_dma, 0, size);
1648
96838a40 1649 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1650 desc_len = sizeof(struct e1000_rx_desc);
1651 else
1652 desc_len = sizeof(union e1000_rx_desc_packet_split);
1653
1da177e4
LT		 1654 /* Round up to nearest 4K */
1655
2d7edb92 1656 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1657 E1000_ROUNDUP(rxdr->size, 4096);
1658
1659 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1660
581d708e
MC		 1661 if (!rxdr->desc) {
1662 DPRINTK(PROBE, ERR,
1663 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1664setup_rx_desc_die:
1da177e4 1665 vfree(rxdr->buffer_info);
2d7edb92
MC		 1666 kfree(rxdr->ps_page);
1667 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1668 return -ENOMEM;
1669 }
1670
2648345f 1671 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1672 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1673 void *olddesc = rxdr->desc;
1674 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1675 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1676 "at %p\n", rxdr->size, rxdr->desc);
1677 /* Try again, without freeing the previous */
1da177e4 1678 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1679 /* Failed allocation, critical failure */
581d708e 1680 if (!rxdr->desc) {
1da177e4 1681 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1682 DPRINTK(PROBE, ERR,
1683 "Unable to allocate memory "
1684 "for the receive descriptor ring\n");
1da177e4
LT		 1685 goto setup_rx_desc_die;
1686 }
1687
1688 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1689 /* give up */
2648345f
MC		 1690 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1691 rxdr->dma);
1da177e4 1692 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1693 DPRINTK(PROBE, ERR,
1694 "Unable to allocate aligned memory "
1695 "for the receive descriptor ring\n");
581d708e 1696 goto setup_rx_desc_die;
1da177e4 1697 } else {
2648345f 1698 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1699 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1700 }
1701 }
1702 memset(rxdr->desc, 0, rxdr->size);
1703
1704 rxdr->next_to_clean = 0;
1705 rxdr->next_to_use = 0;
1706
1707 return 0;
1708}
1709
581d708e
MC		 1710/**
1711 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1712 * (Descriptors) for all queues
1713 * @adapter: board private structure
1714 *
581d708e
MC		 1715 * Return 0 on success, negative on failure
1716 **/
1717
1718int
1719e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1720{
1721 int i, err = 0;
1722
f56799ea 1723 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1724 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1725 if (err) {
1726 DPRINTK(PROBE, ERR,
1727 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1728 for (i-- ; i >= 0; i--)
1729 e1000_free_rx_resources(adapter,
1730 &adapter->rx_ring[i]);
581d708e
MC		 1731 break;
1732 }
1733 }
1734
1735 return err;
1736}
1737
1da177e4 1738/**
2648345f 1739 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1740 * @adapter: Board private structure
1741 **/
e4c811c9
MC		 1742#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1743 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1744static void
1745e1000_setup_rctl(struct e1000_adapter *adapter)
1746{
2d7edb92
MC		 1747 uint32_t rctl, rfctl;
1748 uint32_t psrctl = 0;
35ec56bb 1749#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1750 uint32_t pages = 0;
1751#endif
1da177e4
LT		 1752
1753 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1754
1755 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1756
1757 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1758 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1759 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1760
0fadb059 1761 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1762 rctl |= E1000_RCTL_SBP;
1763 else
1764 rctl &= ~E1000_RCTL_SBP;
1765
2d7edb92
MC		 1766 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1767 rctl &= ~E1000_RCTL_LPE;
1768 else
1769 rctl |= E1000_RCTL_LPE;
1770
1da177e4 1771 /* Setup buffer sizes */
9e2feace
AK		 1772 rctl &= ~E1000_RCTL_SZ_4096;
1773 rctl |= E1000_RCTL_BSEX;
1774 switch (adapter->rx_buffer_len) {
1775 case E1000_RXBUFFER_256:
1776 rctl |= E1000_RCTL_SZ_256;
1777 rctl &= ~E1000_RCTL_BSEX;
1778 break;
1779 case E1000_RXBUFFER_512:
1780 rctl |= E1000_RCTL_SZ_512;
1781 rctl &= ~E1000_RCTL_BSEX;
1782 break;
1783 case E1000_RXBUFFER_1024:
1784 rctl |= E1000_RCTL_SZ_1024;
1785 rctl &= ~E1000_RCTL_BSEX;
1786 break;
a1415ee6
JK		 1787 case E1000_RXBUFFER_2048:
1788 default:
1789 rctl |= E1000_RCTL_SZ_2048;
1790 rctl &= ~E1000_RCTL_BSEX;
1791 break;
1792 case E1000_RXBUFFER_4096:
1793 rctl |= E1000_RCTL_SZ_4096;
1794 break;
1795 case E1000_RXBUFFER_8192:
1796 rctl |= E1000_RCTL_SZ_8192;
1797 break;
1798 case E1000_RXBUFFER_16384:
1799 rctl |= E1000_RCTL_SZ_16384;
1800 break;
2d7edb92
MC		 1801 }
1802
35ec56bb 1803#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1804 /* 82571 and greater support packet-split where the protocol
1805 * header is placed in skb->data and the packet data is
1806 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1807 * In the case of a non-split, skb->data is linearly filled,
1808 * followed by the page buffers. Therefore, skb->data is
1809 * sized to hold the largest protocol header.
1810 */
e4c811c9
MC		 1811 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1812 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1813 PAGE_SIZE <= 16384)
1814 adapter->rx_ps_pages = pages;
1815 else
1816 adapter->rx_ps_pages = 0;
2d7edb92 1817#endif
e4c811c9 1818 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1819 /* Configure extra packet-split registers */
1820 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1821 rfctl |= E1000_RFCTL_EXTEN;
1822 /* disable IPv6 packet split support */
1823 rfctl |= E1000_RFCTL_IPV6_DIS;
1824 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1825
7dfee0cb 1826 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1827
2d7edb92
MC		 1828 psrctl |= adapter->rx_ps_bsize0 >>
1829 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1830
1831 switch (adapter->rx_ps_pages) {
1832 case 3:
1833 psrctl |= PAGE_SIZE <<
1834 E1000_PSRCTL_BSIZE3_SHIFT;
1835 case 2:
1836 psrctl |= PAGE_SIZE <<
1837 E1000_PSRCTL_BSIZE2_SHIFT;
1838 case 1:
1839 psrctl |= PAGE_SIZE >>
1840 E1000_PSRCTL_BSIZE1_SHIFT;
1841 break;
1842 }
2d7edb92
MC		 1843
1844 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1845 }
1846
1847 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1848}
1849
1850/**
1851 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1852 * @adapter: board private structure
1853 *
1854 * Configure the Rx unit of the MAC after a reset.
1855 **/
1856
1857static void
1858e1000_configure_rx(struct e1000_adapter *adapter)
1859{
581d708e
MC		 1860 uint64_t rdba;
1861 struct e1000_hw *hw = &adapter->hw;
1862 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1863
e4c811c9 1864 if (adapter->rx_ps_pages) {
0f15a8fa 1865 /* this is a 32 byte descriptor */
581d708e 1866 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1867 sizeof(union e1000_rx_desc_packet_split);
1868 adapter->clean_rx = e1000_clean_rx_irq_ps;
1869 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1870 } else {
581d708e
MC		 1871 rdlen = adapter->rx_ring[0].count *
1872 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1873 adapter->clean_rx = e1000_clean_rx_irq;
1874 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1875 }
1da177e4
LT		 1876
1877 /* disable receives while setting up the descriptors */
581d708e
MC		 1878 rctl = E1000_READ_REG(hw, RCTL);
1879 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1880
1881 /* set the Receive Delay Timer Register */
581d708e 1882 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1883
581d708e
MC		 1884 if (hw->mac_type >= e1000_82540) {
1885 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1886 if (adapter->itr > 1)
581d708e 1887 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1888 1000000000 / (adapter->itr * 256));
1889 }
1890
2ae76d98 1891 if (hw->mac_type >= e1000_82571) {
2ae76d98 1892 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1893 /* Reset delay timers after every interrupt */
6fc7a7ec 1894 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9
JK		 1895#ifdef CONFIG_E1000_NAPI
1896 /* Auto-Mask interrupts upon ICR read. */
1897 ctrl_ext |= E1000_CTRL_EXT_IAME;
1898#endif
2ae76d98 1899 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1900 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1901 E1000_WRITE_FLUSH(hw);
1902 }
1903
581d708e
MC		 1904 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1905 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1906 switch (adapter->num_rx_queues) {
24025e4e
MC		 1907 case 1:
1908 default:
581d708e 1909 rdba = adapter->rx_ring[0].dma;
581d708e 1910 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 1911 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1912 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 1913 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 1914 E1000_WRITE_REG(hw, RDH, 0);
6a951698
AK		 1915 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1916 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1917 break;
24025e4e
MC		 1918 }
1919
1da177e4 1920 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1921 if (hw->mac_type >= e1000_82543) {
1922 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1923 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1924 rxcsum |= E1000_RXCSUM_TUOFL;
1925
868d5309 1926 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1927 * Must be used in conjunction with packet-split. */
96838a40
JB		 1928 if ((hw->mac_type >= e1000_82571) &&
1929 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1930 rxcsum |= E1000_RXCSUM_IPPCSE;
1931 }
1932 } else {
1933 rxcsum &= ~E1000_RXCSUM_TUOFL;
1934 /* don't need to clear IPPCSE as it defaults to 0 */
1935 }
581d708e 1936 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1937 }
1938
1939 /* Enable Receives */
581d708e 1940 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1941}
1942
1943/**
581d708e 1944 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1945 * @adapter: board private structure
581d708e 1946 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1947 *
1948 * Free all transmit software resources
1949 **/
1950
3ad2cc67 1951static void
581d708e
MC		 1952e1000_free_tx_resources(struct e1000_adapter *adapter,
1953 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1954{
1955 struct pci_dev *pdev = adapter->pdev;
1956
581d708e 1957 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1958
581d708e
MC		 1959 vfree(tx_ring->buffer_info);
1960 tx_ring->buffer_info = NULL;
1da177e4 1961
581d708e 1962 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1963
581d708e
MC		 1964 tx_ring->desc = NULL;
1965}
1966
1967/**
1968 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1969 * @adapter: board private structure
1970 *
1971 * Free all transmit software resources
1972 **/
1973
1974void
1975e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1976{
1977 int i;
1978
f56799ea 1979 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1980 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1981}
1982
e619d523 1983static void
1da177e4
LT		 1984e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1985 struct e1000_buffer *buffer_info)
1986{
96838a40 1987 if (buffer_info->dma) {
2648345f
MC		 1988 pci_unmap_page(adapter->pdev,
1989 buffer_info->dma,
1990 buffer_info->length,
1991 PCI_DMA_TODEVICE);
1da177e4 1992 }
8241e35e 1993 if (buffer_info->skb)
1da177e4 1994 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1995 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1996}
1997
1998/**
1999 * e1000_clean_tx_ring - Free Tx Buffers
2000 * @adapter: board private structure
581d708e 2001 * @tx_ring: ring to be cleaned
1da177e4
LT		 2002 **/
2003
2004static void
581d708e
MC		 2005e1000_clean_tx_ring(struct e1000_adapter *adapter,
2006 struct e1000_tx_ring *tx_ring)
1da177e4 2007{
1da177e4
LT		 2008 struct e1000_buffer *buffer_info;
2009 unsigned long size;
2010 unsigned int i;
2011
2012 /* Free all the Tx ring sk_buffs */
2013
96838a40 2014 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2015 buffer_info = &tx_ring->buffer_info[i];
2016 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2017 }
2018
2019 size = sizeof(struct e1000_buffer) * tx_ring->count;
2020 memset(tx_ring->buffer_info, 0, size);
2021
2022 /* Zero out the descriptor ring */
2023
2024 memset(tx_ring->desc, 0, tx_ring->size);
2025
2026 tx_ring->next_to_use = 0;
2027 tx_ring->next_to_clean = 0;
fd803241 2028 tx_ring->last_tx_tso = 0;
1da177e4 2029
581d708e
MC		 2030 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2031 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2032}
2033
2034/**
2035 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2036 * @adapter: board private structure
2037 **/
2038
2039static void
2040e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2041{
2042 int i;
2043
f56799ea 2044 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2045 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2046}
2047
2048/**
2049 * e1000_free_rx_resources - Free Rx Resources
2050 * @adapter: board private structure
581d708e 2051 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2052 *
2053 * Free all receive software resources
2054 **/
2055
3ad2cc67 2056static void
581d708e
MC		 2057e1000_free_rx_resources(struct e1000_adapter *adapter,
2058 struct e1000_rx_ring *rx_ring)
1da177e4 2059{
1da177e4
LT		 2060 struct pci_dev *pdev = adapter->pdev;
2061
581d708e 2062 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2063
2064 vfree(rx_ring->buffer_info);
2065 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2066 kfree(rx_ring->ps_page);
2067 rx_ring->ps_page = NULL;
2068 kfree(rx_ring->ps_page_dma);
2069 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2070
2071 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2072
2073 rx_ring->desc = NULL;
2074}
2075
2076/**
581d708e 2077 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2078 * @adapter: board private structure
581d708e
MC		 2079 *
2080 * Free all receive software resources
2081 **/
2082
2083void
2084e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2085{
2086 int i;
2087
f56799ea 2088 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2089 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2090}
2091
2092/**
2093 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2094 * @adapter: board private structure
2095 * @rx_ring: ring to free buffers from
1da177e4
LT		 2096 **/
2097
2098static void
581d708e
MC		 2099e1000_clean_rx_ring(struct e1000_adapter *adapter,
2100 struct e1000_rx_ring *rx_ring)
1da177e4 2101{
1da177e4 2102 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2103 struct e1000_ps_page *ps_page;
2104 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2105 struct pci_dev *pdev = adapter->pdev;
2106 unsigned long size;
2d7edb92 2107 unsigned int i, j;
1da177e4
LT		 2108
2109 /* Free all the Rx ring sk_buffs */
96838a40 2110 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2111 buffer_info = &rx_ring->buffer_info[i];
96838a40 2112 if (buffer_info->skb) {
1da177e4
LT		 2113 pci_unmap_single(pdev,
2114 buffer_info->dma,
2115 buffer_info->length,
2116 PCI_DMA_FROMDEVICE);
2117
2118 dev_kfree_skb(buffer_info->skb);
2119 buffer_info->skb = NULL;
997f5cbd
JK		 2120 }
2121 ps_page = &rx_ring->ps_page[i];
2122 ps_page_dma = &rx_ring->ps_page_dma[i];
2123 for (j = 0; j < adapter->rx_ps_pages; j++) {
2124 if (!ps_page->ps_page[j]) break;
2125 pci_unmap_page(pdev,
2126 ps_page_dma->ps_page_dma[j],
2127 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2128 ps_page_dma->ps_page_dma[j] = 0;
2129 put_page(ps_page->ps_page[j]);
2130 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2131 }
2132 }
2133
2134 size = sizeof(struct e1000_buffer) * rx_ring->count;
2135 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2136 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2137 memset(rx_ring->ps_page, 0, size);
2138 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2139 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2140
2141 /* Zero out the descriptor ring */
2142
2143 memset(rx_ring->desc, 0, rx_ring->size);
2144
2145 rx_ring->next_to_clean = 0;
2146 rx_ring->next_to_use = 0;
2147
581d708e
MC		 2148 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2149 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2150}
2151
2152/**
2153 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2154 * @adapter: board private structure
2155 **/
2156
2157static void
2158e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2159{
2160 int i;
2161
f56799ea 2162 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2163 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2164}
2165
2166/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2167 * and memory write and invalidate disabled for certain operations
2168 */
2169static void
2170e1000_enter_82542_rst(struct e1000_adapter *adapter)
2171{
2172 struct net_device *netdev = adapter->netdev;
2173 uint32_t rctl;
2174
2175 e1000_pci_clear_mwi(&adapter->hw);
2176
2177 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2178 rctl |= E1000_RCTL_RST;
2179 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2180 E1000_WRITE_FLUSH(&adapter->hw);
2181 mdelay(5);
2182
96838a40 2183 if (netif_running(netdev))
581d708e 2184 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2185}
2186
2187static void
2188e1000_leave_82542_rst(struct e1000_adapter *adapter)
2189{
2190 struct net_device *netdev = adapter->netdev;
2191 uint32_t rctl;
2192
2193 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2194 rctl &= ~E1000_RCTL_RST;
2195 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2196 E1000_WRITE_FLUSH(&adapter->hw);
2197 mdelay(5);
2198
96838a40 2199 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2200 e1000_pci_set_mwi(&adapter->hw);
2201
96838a40 2202 if (netif_running(netdev)) {
72d64a43
JK		 2203 /* No need to loop, because 82542 supports only 1 queue */
2204 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2205 e1000_configure_rx(adapter);
72d64a43 2206 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2207 }
2208}
2209
2210/**
2211 * e1000_set_mac - Change the Ethernet Address of the NIC
2212 * @netdev: network interface device structure
2213 * @p: pointer to an address structure
2214 *
2215 * Returns 0 on success, negative on failure
2216 **/
2217
2218static int
2219e1000_set_mac(struct net_device *netdev, void *p)
2220{
60490fe0 2221 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2222 struct sockaddr *addr = p;
2223
96838a40 2224 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2225 return -EADDRNOTAVAIL;
2226
2227 /* 82542 2.0 needs to be in reset to write receive address registers */
2228
96838a40 2229 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2230 e1000_enter_82542_rst(adapter);
2231
2232 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2233 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2234
2235 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2236
868d5309
MC		 2237 /* With 82571 controllers, LAA may be overwritten (with the default)
2238 * due to controller reset from the other port. */
2239 if (adapter->hw.mac_type == e1000_82571) {
2240 /* activate the work around */
2241 adapter->hw.laa_is_present = 1;
2242
96838a40
JB		 2243 /* Hold a copy of the LAA in RAR[14] This is done so that
2244 * between the time RAR[0] gets clobbered and the time it
2245 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2246 * of the RARs and no incoming packets directed to this port
96838a40 2247 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2248 * RAR[14] */
96838a40 2249 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2250 E1000_RAR_ENTRIES - 1);
2251 }
2252
96838a40 2253 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2254 e1000_leave_82542_rst(adapter);
2255
2256 return 0;
2257}
2258
2259/**
2260 * e1000_set_multi - Multicast and Promiscuous mode set
2261 * @netdev: network interface device structure
2262 *
2263 * The set_multi entry point is called whenever the multicast address
2264 * list or the network interface flags are updated. This routine is
2265 * responsible for configuring the hardware for proper multicast,
2266 * promiscuous mode, and all-multi behavior.
2267 **/
2268
2269static void
2270e1000_set_multi(struct net_device *netdev)
2271{
60490fe0 2272 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2273 struct e1000_hw *hw = &adapter->hw;
2274 struct dev_mc_list *mc_ptr;
2275 uint32_t rctl;
2276 uint32_t hash_value;
868d5309 2277 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2278 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2279 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2280 E1000_NUM_MTA_REGISTERS;
2281
2282 if (adapter->hw.mac_type == e1000_ich8lan)
2283 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2284
868d5309
MC		 2285 /* reserve RAR[14] for LAA over-write work-around */
2286 if (adapter->hw.mac_type == e1000_82571)
2287 rar_entries--;
1da177e4 2288
2648345f
MC		 2289 /* Check for Promiscuous and All Multicast modes */
2290
1da177e4
LT		 2291 rctl = E1000_READ_REG(hw, RCTL);
2292
96838a40 2293 if (netdev->flags & IFF_PROMISC) {
1da177e4 2294 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2295 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2296 rctl |= E1000_RCTL_MPE;
2297 rctl &= ~E1000_RCTL_UPE;
2298 } else {
2299 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2300 }
2301
2302 E1000_WRITE_REG(hw, RCTL, rctl);
2303
2304 /* 82542 2.0 needs to be in reset to write receive address registers */
2305
96838a40 2306 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2307 e1000_enter_82542_rst(adapter);
2308
2309 /* load the first 14 multicast address into the exact filters 1-14
2310 * RAR 0 is used for the station MAC adddress
2311 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2312 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2313 */
2314 mc_ptr = netdev->mc_list;
2315
96838a40 2316 for (i = 1; i < rar_entries; i++) {
868d5309 2317 if (mc_ptr) {
1da177e4
LT		 2318 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2319 mc_ptr = mc_ptr->next;
2320 } else {
2321 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2322 E1000_WRITE_FLUSH(hw);
1da177e4 2323 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2324 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2325 }
2326 }
2327
2328 /* clear the old settings from the multicast hash table */
2329
cd94dd0b 2330 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2331 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2332 E1000_WRITE_FLUSH(hw);
2333 }
1da177e4
LT		 2334
2335 /* load any remaining addresses into the hash table */
2336
96838a40 2337 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2338 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2339 e1000_mta_set(hw, hash_value);
2340 }
2341
96838a40 2342 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2343 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2344}
2345
2346/* Need to wait a few seconds after link up to get diagnostic information from
2347 * the phy */
2348
2349static void
2350e1000_update_phy_info(unsigned long data)
2351{
2352 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2353 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2354}
2355
2356/**
2357 * e1000_82547_tx_fifo_stall - Timer Call-back
2358 * @data: pointer to adapter cast into an unsigned long
2359 **/
2360
2361static void
2362e1000_82547_tx_fifo_stall(unsigned long data)
2363{
2364 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2365 struct net_device *netdev = adapter->netdev;
2366 uint32_t tctl;
2367
96838a40
JB		 2368 if (atomic_read(&adapter->tx_fifo_stall)) {
2369 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2370 E1000_READ_REG(&adapter->hw, TDH)) &&
2371 (E1000_READ_REG(&adapter->hw, TDFT) ==
2372 E1000_READ_REG(&adapter->hw, TDFH)) &&
2373 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2374 E1000_READ_REG(&adapter->hw, TDFHS))) {
2375 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2376 E1000_WRITE_REG(&adapter->hw, TCTL,
2377 tctl & ~E1000_TCTL_EN);
2378 E1000_WRITE_REG(&adapter->hw, TDFT,
2379 adapter->tx_head_addr);
2380 E1000_WRITE_REG(&adapter->hw, TDFH,
2381 adapter->tx_head_addr);
2382 E1000_WRITE_REG(&adapter->hw, TDFTS,
2383 adapter->tx_head_addr);
2384 E1000_WRITE_REG(&adapter->hw, TDFHS,
2385 adapter->tx_head_addr);
2386 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2387 E1000_WRITE_FLUSH(&adapter->hw);
2388
2389 adapter->tx_fifo_head = 0;
2390 atomic_set(&adapter->tx_fifo_stall, 0);
2391 netif_wake_queue(netdev);
2392 } else {
2393 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2394 }
2395 }
2396}
2397
2398/**
2399 * e1000_watchdog - Timer Call-back
2400 * @data: pointer to adapter cast into an unsigned long
2401 **/
2402static void
2403e1000_watchdog(unsigned long data)
2404{
2405 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2406 struct net_device *netdev = adapter->netdev;
545c67c0 2407 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2408 uint32_t link, tctl;
cd94dd0b
AK		 2409 int32_t ret_val;
2410
2411 ret_val = e1000_check_for_link(&adapter->hw);
2412 if ((ret_val == E1000_ERR_PHY) &&
2413 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2414 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2415 /* See e1000_kumeran_lock_loss_workaround() */
2416 DPRINTK(LINK, INFO,
2417 "Gigabit has been disabled, downgrading speed\n");
2418 }
2d7edb92
MC		 2419 if (adapter->hw.mac_type == e1000_82573) {
2420 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2421 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2422 e1000_update_mng_vlan(adapter);
96838a40 2423 }
1da177e4 2424
96838a40 2425 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2426 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2427 link = !adapter->hw.serdes_link_down;
2428 else
2429 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2430
96838a40
JB		 2431 if (link) {
2432 if (!netif_carrier_ok(netdev)) {
fe7fe28e 2433 boolean_t txb2b = 1;
1da177e4
LT		 2434 e1000_get_speed_and_duplex(&adapter->hw,
2435 &adapter->link_speed,
2436 &adapter->link_duplex);
2437
2438 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2439 adapter->link_speed,
2440 adapter->link_duplex == FULL_DUPLEX ?
2441 "Full Duplex" : "Half Duplex");
2442
7e6c9861
JK		 2443 /* tweak tx_queue_len according to speed/duplex
2444 * and adjust the timeout factor */
66a2b0a3
JK		 2445 netdev->tx_queue_len = adapter->tx_queue_len;
2446 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2447 switch (adapter->link_speed) {
2448 case SPEED_10:
fe7fe28e 2449 txb2b = 0;
7e6c9861
JK		 2450 netdev->tx_queue_len = 10;
2451 adapter->tx_timeout_factor = 8;
2452 break;
2453 case SPEED_100:
fe7fe28e 2454 txb2b = 0;
7e6c9861
JK		 2455 netdev->tx_queue_len = 100;
2456 /* maybe add some timeout factor ? */
2457 break;
2458 }
2459
fe7fe28e 2460 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2461 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2462 txb2b == 0) {
7e6c9861
JK		 2463#define SPEED_MODE_BIT (1 << 21)
2464 uint32_t tarc0;
2465 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2466 tarc0 &= ~SPEED_MODE_BIT;
2467 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2468 }
2469
2470#ifdef NETIF_F_TSO
2471 /* disable TSO for pcie and 10/100 speeds, to avoid
2472 * some hardware issues */
2473 if (!adapter->tso_force &&
2474 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2475 switch (adapter->link_speed) {
2476 case SPEED_10:
66a2b0a3 2477 case SPEED_100:
7e6c9861
JK		 2478 DPRINTK(PROBE,INFO,
2479 "10/100 speed: disabling TSO\n");
2480 netdev->features &= ~NETIF_F_TSO;
2481 break;
2482 case SPEED_1000:
2483 netdev->features |= NETIF_F_TSO;
2484 break;
2485 default:
2486 /* oops */
66a2b0a3
JK		 2487 break;
2488 }
2489 }
7e6c9861
JK		 2490#endif
2491
2492 /* enable transmits in the hardware, need to do this
2493 * after setting TARC0 */
2494 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2495 tctl |= E1000_TCTL_EN;
2496 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2497
1da177e4
LT		 2498 netif_carrier_on(netdev);
2499 netif_wake_queue(netdev);
2500 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2501 adapter->smartspeed = 0;
2502 }
2503 } else {
96838a40 2504 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2505 adapter->link_speed = 0;
2506 adapter->link_duplex = 0;
2507 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2508 netif_carrier_off(netdev);
2509 netif_stop_queue(netdev);
2510 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2511
2512 /* 80003ES2LAN workaround--
2513 * For packet buffer work-around on link down event;
2514 * disable receives in the ISR and
2515 * reset device here in the watchdog
2516 */
8fc897b0 2517 if (adapter->hw.mac_type == e1000_80003es2lan)
87041639
JK		 2518 /* reset device */
2519 schedule_work(&adapter->reset_task);
1da177e4
LT		 2520 }
2521
2522 e1000_smartspeed(adapter);
2523 }
2524
2525 e1000_update_stats(adapter);
2526
2527 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2528 adapter->tpt_old = adapter->stats.tpt;
2529 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2530 adapter->colc_old = adapter->stats.colc;
2531
2532 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2533 adapter->gorcl_old = adapter->stats.gorcl;
2534 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2535 adapter->gotcl_old = adapter->stats.gotcl;
2536
2537 e1000_update_adaptive(&adapter->hw);
2538
f56799ea 2539 if (!netif_carrier_ok(netdev)) {
581d708e 2540 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2541 /* We've lost link, so the controller stops DMA,
2542 * but we've got queued Tx work that's never going
2543 * to get done, so reset controller to flush Tx.
2544 * (Do the reset outside of interrupt context). */
87041639
JK		 2545 adapter->tx_timeout_count++;
2546 schedule_work(&adapter->reset_task);
1da177e4
LT		 2547 }
2548 }
2549
2550 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2551 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2552 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2553 * asymmetrical Tx or Rx gets ITR=8000; everyone
2554 * else is between 2000-8000. */
2555 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2556 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2557 adapter->gotcl - adapter->gorcl :
2558 adapter->gorcl - adapter->gotcl) / 10000;
2559 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2560 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2561 }
2562
2563 /* Cause software interrupt to ensure rx ring is cleaned */
2564 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2565
2648345f 2566 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2567 adapter->detect_tx_hung = TRUE;
2568
96838a40 2569 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2570 * reset from the other port. Set the appropriate LAA in RAR[0] */
2571 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2572 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2573
1da177e4
LT		 2574 /* Reset the timer */
2575 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2576}
2577
2578#define E1000_TX_FLAGS_CSUM 0x00000001
2579#define E1000_TX_FLAGS_VLAN 0x00000002
2580#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2581#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2582#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2583#define E1000_TX_FLAGS_VLAN_SHIFT 16
2584
e619d523 2585static int
581d708e
MC		 2586e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2587 struct sk_buff *skb)
1da177e4
LT		 2588{
2589#ifdef NETIF_F_TSO
2590 struct e1000_context_desc *context_desc;
545c67c0 2591 struct e1000_buffer *buffer_info;
1da177e4
LT		 2592 unsigned int i;
2593 uint32_t cmd_length = 0;
2d7edb92 2594 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2595 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2596 int err;
2597
89114afd 2598 if (skb_is_gso(skb)) {
1da177e4
LT		 2599 if (skb_header_cloned(skb)) {
2600 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2601 if (err)
2602 return err;
2603 }
2604
2605 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 2606 mss = skb_shinfo(skb)->gso_size;
60828236 2607 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2608 skb->nh.iph->tot_len = 0;
2609 skb->nh.iph->check = 0;
2610 skb->h.th->check =
2611 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2612 skb->nh.iph->daddr,
2613 0,
2614 IPPROTO_TCP,
2615 0);
2616 cmd_length = E1000_TXD_CMD_IP;
2617 ipcse = skb->h.raw - skb->data - 1;
2618#ifdef NETIF_F_TSO_IPV6
e15fdd03 2619 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2d7edb92
MC		 2620 skb->nh.ipv6h->payload_len = 0;
2621 skb->h.th->check =
2622 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2623 &skb->nh.ipv6h->daddr,
2624 0,
2625 IPPROTO_TCP,
2626 0);
2627 ipcse = 0;
2628#endif
2629 }
1da177e4
LT		 2630 ipcss = skb->nh.raw - skb->data;
2631 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2632 tucss = skb->h.raw - skb->data;
2633 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2634 tucse = 0;
2635
2636 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2637 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2638
581d708e
MC		 2639 i = tx_ring->next_to_use;
2640 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2641 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2642
2643 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2644 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2645 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2646 context_desc->upper_setup.tcp_fields.tucss = tucss;
2647 context_desc->upper_setup.tcp_fields.tucso = tucso;
2648 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2649 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2650 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2651 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2652
545c67c0
JK		 2653 buffer_info->time_stamp = jiffies;
2654
581d708e
MC		 2655 if (++i == tx_ring->count) i = 0;
2656 tx_ring->next_to_use = i;
1da177e4 2657
8241e35e 2658 return TRUE;
1da177e4
LT		 2659 }
2660#endif
2661
8241e35e 2662 return FALSE;
1da177e4
LT		 2663}
2664
e619d523 2665static boolean_t
581d708e
MC		 2666e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2667 struct sk_buff *skb)
1da177e4
LT		 2668{
2669 struct e1000_context_desc *context_desc;
545c67c0 2670 struct e1000_buffer *buffer_info;
1da177e4
LT		 2671 unsigned int i;
2672 uint8_t css;
2673
84fa7933 2674 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1da177e4
LT		 2675 css = skb->h.raw - skb->data;
2676
581d708e 2677 i = tx_ring->next_to_use;
545c67c0 2678 buffer_info = &tx_ring->buffer_info[i];
581d708e 2679 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2680
2681 context_desc->upper_setup.tcp_fields.tucss = css;
2682 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2683 context_desc->upper_setup.tcp_fields.tucse = 0;
2684 context_desc->tcp_seg_setup.data = 0;
2685 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2686
545c67c0
JK		 2687 buffer_info->time_stamp = jiffies;
2688
581d708e
MC		 2689 if (unlikely(++i == tx_ring->count)) i = 0;
2690 tx_ring->next_to_use = i;
1da177e4
LT		 2691
2692 return TRUE;
2693 }
2694
2695 return FALSE;
2696}
2697
2698#define E1000_MAX_TXD_PWR 12
2699#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2700
e619d523 2701static int
581d708e
MC		 2702e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2703 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2704 unsigned int nr_frags, unsigned int mss)
1da177e4 2705{
1da177e4
LT		 2706 struct e1000_buffer *buffer_info;
2707 unsigned int len = skb->len;
2708 unsigned int offset = 0, size, count = 0, i;
2709 unsigned int f;
2710 len -= skb->data_len;
2711
2712 i = tx_ring->next_to_use;
2713
96838a40 2714 while (len) {
1da177e4
LT		 2715 buffer_info = &tx_ring->buffer_info[i];
2716 size = min(len, max_per_txd);
2717#ifdef NETIF_F_TSO
fd803241
JK		 2718 /* Workaround for Controller erratum --
2719 * descriptor for non-tso packet in a linear SKB that follows a
2720 * tso gets written back prematurely before the data is fully
0f15a8fa 2721 * DMA'd to the controller */
fd803241 2722 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2723 !skb_is_gso(skb)) {
fd803241
JK		 2724 tx_ring->last_tx_tso = 0;
2725 size -= 4;
2726 }
2727
1da177e4
LT		 2728 /* Workaround for premature desc write-backs
2729 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2730 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2731 size -= 4;
2732#endif
97338bde
MC		 2733 /* work-around for errata 10 and it applies
2734 * to all controllers in PCI-X mode
2735 * The fix is to make sure that the first descriptor of a
2736 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2737 */
96838a40 2738 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2739 (size > 2015) && count == 0))
2740 size = 2015;
96838a40 2741
1da177e4
LT		 2742 /* Workaround for potential 82544 hang in PCI-X. Avoid
2743 * terminating buffers within evenly-aligned dwords. */
96838a40 2744 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2745 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2746 size > 4))
2747 size -= 4;
2748
2749 buffer_info->length = size;
2750 buffer_info->dma =
2751 pci_map_single(adapter->pdev,
2752 skb->data + offset,
2753 size,
2754 PCI_DMA_TODEVICE);
2755 buffer_info->time_stamp = jiffies;
2756
2757 len -= size;
2758 offset += size;
2759 count++;
96838a40 2760 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2761 }
2762
96838a40 2763 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2764 struct skb_frag_struct *frag;
2765
2766 frag = &skb_shinfo(skb)->frags[f];
2767 len = frag->size;
2768 offset = frag->page_offset;
2769
96838a40 2770 while (len) {
1da177e4
LT		 2771 buffer_info = &tx_ring->buffer_info[i];
2772 size = min(len, max_per_txd);
2773#ifdef NETIF_F_TSO
2774 /* Workaround for premature desc write-backs
2775 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2776 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2777 size -= 4;
2778#endif
2779 /* Workaround for potential 82544 hang in PCI-X.
2780 * Avoid terminating buffers within evenly-aligned
2781 * dwords. */
96838a40 2782 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2783 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2784 size > 4))
2785 size -= 4;
2786
2787 buffer_info->length = size;
2788 buffer_info->dma =
2789 pci_map_page(adapter->pdev,
2790 frag->page,
2791 offset,
2792 size,
2793 PCI_DMA_TODEVICE);
2794 buffer_info->time_stamp = jiffies;
2795
2796 len -= size;
2797 offset += size;
2798 count++;
96838a40 2799 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2800 }
2801 }
2802
2803 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2804 tx_ring->buffer_info[i].skb = skb;
2805 tx_ring->buffer_info[first].next_to_watch = i;
2806
2807 return count;
2808}
2809
e619d523 2810static void
581d708e
MC		 2811e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2812 int tx_flags, int count)
1da177e4 2813{
1da177e4
LT		 2814 struct e1000_tx_desc *tx_desc = NULL;
2815 struct e1000_buffer *buffer_info;
2816 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2817 unsigned int i;
2818
96838a40 2819 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2820 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2821 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2822 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2823
96838a40 2824 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2825 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2826 }
2827
96838a40 2828 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2829 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2830 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2831 }
2832
96838a40 2833 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2834 txd_lower |= E1000_TXD_CMD_VLE;
2835 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2836 }
2837
2838 i = tx_ring->next_to_use;
2839
96838a40 2840 while (count--) {
1da177e4
LT		 2841 buffer_info = &tx_ring->buffer_info[i];
2842 tx_desc = E1000_TX_DESC(*tx_ring, i);
2843 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2844 tx_desc->lower.data =
2845 cpu_to_le32(txd_lower | buffer_info->length);
2846 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2847 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2848 }
2849
2850 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2851
2852 /* Force memory writes to complete before letting h/w
2853 * know there are new descriptors to fetch. (Only
2854 * applicable for weak-ordered memory model archs,
2855 * such as IA-64). */
2856 wmb();
2857
2858 tx_ring->next_to_use = i;
581d708e 2859 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2860}
2861
2862/**
2863 * 82547 workaround to avoid controller hang in half-duplex environment.
2864 * The workaround is to avoid queuing a large packet that would span
2865 * the internal Tx FIFO ring boundary by notifying the stack to resend
2866 * the packet at a later time. This gives the Tx FIFO an opportunity to
2867 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2868 * to the beginning of the Tx FIFO.
2869 **/
2870
2871#define E1000_FIFO_HDR 0x10
2872#define E1000_82547_PAD_LEN 0x3E0
2873
e619d523 2874static int
1da177e4
LT		 2875e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2876{
2877 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2878 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2879
2880 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2881
96838a40 2882 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2883 goto no_fifo_stall_required;
2884
96838a40 2885 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2886 return 1;
2887
96838a40 2888 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2889 atomic_set(&adapter->tx_fifo_stall, 1);
2890 return 1;
2891 }
2892
2893no_fifo_stall_required:
2894 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2895 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2896 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2897 return 0;
2898}
2899
2d7edb92 2900#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 2901static int
2d7edb92
MC		 2902e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2903{
2904 struct e1000_hw *hw = &adapter->hw;
2905 uint16_t length, offset;
96838a40
JB		 2906 if (vlan_tx_tag_present(skb)) {
2907 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2908 ( adapter->hw.mng_cookie.status &
2909 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2910 return 0;
2911 }
20a44028 2912 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2913 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2914 if ((htons(ETH_P_IP) == eth->h_proto)) {
2915 const struct iphdr *ip =
2d7edb92 2916 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2917 if (IPPROTO_UDP == ip->protocol) {
2918 struct udphdr *udp =
2919 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2920 (ip->ihl << 2));
96838a40 2921 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2922 offset = (uint8_t *)udp + 8 - skb->data;
2923 length = skb->len - offset;
2924
2925 return e1000_mng_write_dhcp_info(hw,
96838a40 2926 (uint8_t *)udp + 8,
2d7edb92
MC		 2927 length);
2928 }
2929 }
2930 }
2931 }
2932 return 0;
2933}
2934
65c7973f
JB		 2935static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
2936{
2937 struct e1000_adapter *adapter = netdev_priv(netdev);
2938 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
2939
2940 netif_stop_queue(netdev);
2941 /* Herbert's original patch had:
2942 * smp_mb__after_netif_stop_queue();
2943 * but since that doesn't exist yet, just open code it. */
2944 smp_mb();
2945
2946 /* We need to check again in a case another CPU has just
2947 * made room available. */
2948 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
2949 return -EBUSY;
2950
2951 /* A reprieve! */
2952 netif_start_queue(netdev);
2953 return 0;
2954}
2955
2956static int e1000_maybe_stop_tx(struct net_device *netdev,
2957 struct e1000_tx_ring *tx_ring, int size)
2958{
2959 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
2960 return 0;
2961 return __e1000_maybe_stop_tx(netdev, size);
2962}
2963
1da177e4
LT		 2964#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2965static int
2966e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2967{
60490fe0 2968 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2969 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2970 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2971 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2972 unsigned int tx_flags = 0;
2973 unsigned int len = skb->len;
2974 unsigned long flags;
2975 unsigned int nr_frags = 0;
2976 unsigned int mss = 0;
2977 int count = 0;
76c224bc 2978 int tso;
1da177e4
LT		 2979 unsigned int f;
2980 len -= skb->data_len;
2981
65c7973f
JB		 2982 /* This goes back to the question of how to logically map a tx queue
2983 * to a flow. Right now, performance is impacted slightly negatively
2984 * if using multiple tx queues. If the stack breaks away from a
2985 * single qdisc implementation, we can look at this again. */
581d708e 2986 tx_ring = adapter->tx_ring;
24025e4e 2987
581d708e 2988 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2989 dev_kfree_skb_any(skb);
2990 return NETDEV_TX_OK;
2991 }
2992
2993#ifdef NETIF_F_TSO
7967168c 2994 mss = skb_shinfo(skb)->gso_size;
76c224bc 2995 /* The controller does a simple calculation to
1da177e4
LT		 2996 * make sure there is enough room in the FIFO before
2997 * initiating the DMA for each buffer. The calc is:
2998 * 4 = ceil(buffer len/mss). To make sure we don't
2999 * overrun the FIFO, adjust the max buffer len if mss
3000 * drops. */
96838a40 3001 if (mss) {
9a3056da 3002 uint8_t hdr_len;
1da177e4
LT		 3003 max_per_txd = min(mss << 2, max_per_txd);
3004 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3005
9f687888 3006 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
9a3056da
JK		 3007 * points to just header, pull a few bytes of payload from
3008 * frags into skb->data */
3009 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 3010 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3011 switch (adapter->hw.mac_type) {
3012 unsigned int pull_size;
3013 case e1000_82571:
3014 case e1000_82572:
3015 case e1000_82573:
cd94dd0b 3016 case e1000_ich8lan:
9f687888
JK		 3017 pull_size = min((unsigned int)4, skb->data_len);
3018 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3019 DPRINTK(DRV, ERR,
9f687888
JK		 3020 "__pskb_pull_tail failed.\n");
3021 dev_kfree_skb_any(skb);
749dfc70 3022 return NETDEV_TX_OK;
9f687888
JK		 3023 }
3024 len = skb->len - skb->data_len;
3025 break;
3026 default:
3027 /* do nothing */
3028 break;
d74bbd3b 3029 }
9a3056da 3030 }
1da177e4
LT		 3031 }
3032
9a3056da 3033 /* reserve a descriptor for the offload context */
84fa7933 3034 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3035 count++;
2648345f 3036 count++;
1da177e4 3037#else
84fa7933 3038 if (skb->ip_summed == CHECKSUM_PARTIAL)
1da177e4
LT		 3039 count++;
3040#endif
fd803241
JK		 3041
3042#ifdef NETIF_F_TSO
3043 /* Controller Erratum workaround */
89114afd 3044 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241
JK		 3045 count++;
3046#endif
3047
1da177e4
LT		 3048 count += TXD_USE_COUNT(len, max_txd_pwr);
3049
96838a40 3050 if (adapter->pcix_82544)
1da177e4
LT		 3051 count++;
3052
96838a40 3053 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3054 * in PCI-X mode, so add one more descriptor to the count
3055 */
96838a40 3056 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3057 (len > 2015)))
3058 count++;
3059
1da177e4 3060 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3061 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3062 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3063 max_txd_pwr);
96838a40 3064 if (adapter->pcix_82544)
1da177e4
LT		 3065 count += nr_frags;
3066
0f15a8fa
JK		 3067
3068 if (adapter->hw.tx_pkt_filtering &&
3069 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 3070 e1000_transfer_dhcp_info(adapter, skb);
3071
581d708e
MC		 3072 local_irq_save(flags);
3073 if (!spin_trylock(&tx_ring->tx_lock)) {
3074 /* Collision - tell upper layer to requeue */
3075 local_irq_restore(flags);
3076 return NETDEV_TX_LOCKED;
3077 }
1da177e4
LT		 3078
3079 /* need: count + 2 desc gap to keep tail from touching
3080 * head, otherwise try next time */
65c7973f 3081 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3082 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3083 return NETDEV_TX_BUSY;
3084 }
3085
96838a40
JB		 3086 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3087 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3088 netif_stop_queue(netdev);
1314bbf3 3089 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
581d708e 3090 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3091 return NETDEV_TX_BUSY;
3092 }
3093 }
3094
96838a40 3095 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3096 tx_flags |= E1000_TX_FLAGS_VLAN;
3097 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3098 }
3099
581d708e 3100 first = tx_ring->next_to_use;
96838a40 3101
581d708e 3102 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3103 if (tso < 0) {
3104 dev_kfree_skb_any(skb);
581d708e 3105 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3106 return NETDEV_TX_OK;
3107 }
3108
fd803241
JK		 3109 if (likely(tso)) {
3110 tx_ring->last_tx_tso = 1;
1da177e4 3111 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3112 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3113 tx_flags |= E1000_TX_FLAGS_CSUM;
3114
2d7edb92 3115 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3116 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3117 * no longer assume, we must. */
60828236 3118 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3119 tx_flags |= E1000_TX_FLAGS_IPV4;
3120
581d708e
MC		 3121 e1000_tx_queue(adapter, tx_ring, tx_flags,
3122 e1000_tx_map(adapter, tx_ring, skb, first,
3123 max_per_txd, nr_frags, mss));
1da177e4
LT		 3124
3125 netdev->trans_start = jiffies;
3126
3127 /* Make sure there is space in the ring for the next send. */
65c7973f 3128 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3129
581d708e 3130 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3131 return NETDEV_TX_OK;
3132}
3133
3134/**
3135 * e1000_tx_timeout - Respond to a Tx Hang
3136 * @netdev: network interface device structure
3137 **/
3138
3139static void
3140e1000_tx_timeout(struct net_device *netdev)
3141{
60490fe0 3142 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3143
3144 /* Do the reset outside of interrupt context */
87041639
JK		 3145 adapter->tx_timeout_count++;
3146 schedule_work(&adapter->reset_task);
1da177e4
LT		 3147}
3148
3149static void
87041639 3150e1000_reset_task(struct net_device *netdev)
1da177e4 3151{
60490fe0 3152 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3153
2db10a08 3154 e1000_reinit_locked(adapter);
1da177e4
LT		 3155}
3156
3157/**
3158 * e1000_get_stats - Get System Network Statistics
3159 * @netdev: network interface device structure
3160 *
3161 * Returns the address of the device statistics structure.
3162 * The statistics are actually updated from the timer callback.
3163 **/
3164
3165static struct net_device_stats *
3166e1000_get_stats(struct net_device *netdev)
3167{
60490fe0 3168 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3169
6b7660cd 3170 /* only return the current stats */
1da177e4
LT		 3171 return &adapter->net_stats;
3172}
3173
3174/**
3175 * e1000_change_mtu - Change the Maximum Transfer Unit
3176 * @netdev: network interface device structure
3177 * @new_mtu: new value for maximum frame size
3178 *
3179 * Returns 0 on success, negative on failure
3180 **/
3181
3182static int
3183e1000_change_mtu(struct net_device *netdev, int new_mtu)
3184{
60490fe0 3185 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3186 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3187 uint16_t eeprom_data = 0;
1da177e4 3188
96838a40
JB		 3189 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3190 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3191 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3192 return -EINVAL;
2d7edb92 3193 }
1da177e4 3194
997f5cbd
JK		 3195 /* Adapter-specific max frame size limits. */
3196 switch (adapter->hw.mac_type) {
9e2feace 3197 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3198 case e1000_ich8lan:
997f5cbd
JK		 3199 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3200 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3201 return -EINVAL;
2d7edb92 3202 }
997f5cbd 3203 break;
85b22eb6 3204 case e1000_82573:
249d71d6
BA		 3205 /* Jumbo Frames not supported if:
3206 * - this is not an 82573L device
3207 * - ASPM is enabled in any way (0x1A bits 3:2) */
85b22eb6
JK		 3208 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3209 &eeprom_data);
249d71d6
BA		 3210 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3211 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3212 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3213 DPRINTK(PROBE, ERR,
3214 "Jumbo Frames not supported.\n");
3215 return -EINVAL;
3216 }
3217 break;
3218 }
249d71d6
BA		 3219 /* ERT will be enabled later to enable wire speed receives */
3220
85b22eb6 3221 /* fall through to get support */
997f5cbd
JK		 3222 case e1000_82571:
3223 case e1000_82572:
87041639 3224 case e1000_80003es2lan:
997f5cbd
JK		 3225#define MAX_STD_JUMBO_FRAME_SIZE 9234
3226 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3227 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3228 return -EINVAL;
3229 }
3230 break;
3231 default:
3232 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3233 break;
1da177e4
LT		 3234 }
3235
87f5032e 3236 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3237 * means we reserve 2 more, this pushes us to allocate from the next
3238 * larger slab size
3239 * i.e. RXBUFFER_2048 --> size-4096 slab */
3240
3241 if (max_frame <= E1000_RXBUFFER_256)
3242 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3243 else if (max_frame <= E1000_RXBUFFER_512)
3244 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3245 else if (max_frame <= E1000_RXBUFFER_1024)
3246 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3247 else if (max_frame <= E1000_RXBUFFER_2048)
3248 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3249 else if (max_frame <= E1000_RXBUFFER_4096)
3250 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3251 else if (max_frame <= E1000_RXBUFFER_8192)
3252 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3253 else if (max_frame <= E1000_RXBUFFER_16384)
3254 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3255
3256 /* adjust allocation if LPE protects us, and we aren't using SBP */
9e2feace
AK		 3257 if (!adapter->hw.tbi_compatibility_on &&
3258 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3259 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3260 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3261
2d7edb92
MC		 3262 netdev->mtu = new_mtu;
3263
2db10a08
AK		 3264 if (netif_running(netdev))
3265 e1000_reinit_locked(adapter);
1da177e4 3266
1da177e4
LT		 3267 adapter->hw.max_frame_size = max_frame;
3268
3269 return 0;
3270}
3271
3272/**
3273 * e1000_update_stats - Update the board statistics counters
3274 * @adapter: board private structure
3275 **/
3276
3277void
3278e1000_update_stats(struct e1000_adapter *adapter)
3279{
3280 struct e1000_hw *hw = &adapter->hw;
282f33c9 3281 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3282 unsigned long flags;
3283 uint16_t phy_tmp;
3284
3285#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3286
282f33c9
LV		 3287 /*
3288 * Prevent stats update while adapter is being reset, or if the pci
3289 * connection is down.
3290 */
9026729b 3291 if (adapter->link_speed == 0)
282f33c9
LV		 3292 return;
3293 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
9026729b
AK		 3294 return;
3295
1da177e4
LT		 3296 spin_lock_irqsave(&adapter->stats_lock, flags);
3297
3298 /* these counters are modified from e1000_adjust_tbi_stats,
3299 * called from the interrupt context, so they must only
3300 * be written while holding adapter->stats_lock
3301 */
3302
3303 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3304 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3305 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3306 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3307 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3308 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3309 adapter->stats.roc += E1000_READ_REG(hw, ROC);
cd94dd0b
AK		 3310
3311 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3312 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3313 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3314 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3315 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3316 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3317 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
cd94dd0b 3318 }
1da177e4
LT		 3319
3320 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3321 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3322 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3323 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3324 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3325 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3326 adapter->stats.dc += E1000_READ_REG(hw, DC);
3327 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3328 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3329 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3330 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3331 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3332 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3333 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3334 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3335 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3336 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3337 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3338 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3339 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3340 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3341 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3342 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3343 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3344 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3345 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
cd94dd0b
AK		 3346
3347 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3348 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3349 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3350 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3351 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3352 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3353 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
cd94dd0b
AK		 3354 }
3355
1da177e4
LT		 3356 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3357 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3358
3359 /* used for adaptive IFS */
3360
3361 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3362 adapter->stats.tpt += hw->tx_packet_delta;
3363 hw->collision_delta = E1000_READ_REG(hw, COLC);
3364 adapter->stats.colc += hw->collision_delta;
3365
96838a40 3366 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3367 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3368 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3369 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3370 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3371 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3372 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3373 }
96838a40 3374 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3375 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3376 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
cd94dd0b
AK		 3377
3378 if (adapter->hw.mac_type != e1000_ich8lan) {
2d7edb92
MC		 3379 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3380 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3381 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3382 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3383 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3384 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3385 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
cd94dd0b 3386 }
2d7edb92 3387 }
1da177e4
LT		 3388
3389 /* Fill out the OS statistics structure */
3390
3391 adapter->net_stats.rx_packets = adapter->stats.gprc;
3392 adapter->net_stats.tx_packets = adapter->stats.gptc;
3393 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3394 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3395 adapter->net_stats.multicast = adapter->stats.mprc;
3396 adapter->net_stats.collisions = adapter->stats.colc;
3397
3398 /* Rx Errors */
3399
87041639
JK		 3400 /* RLEC on some newer hardware can be incorrect so build
3401 * our own version based on RUC and ROC */
1da177e4
LT		 3402 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3403 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3404 adapter->stats.ruc + adapter->stats.roc +
3405 adapter->stats.cexterr;
49559854
MW		 3406 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3407 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3408 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3409 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3410 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3411
3412 /* Tx Errors */
49559854
MW		 3413 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3414 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3415 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3416 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3417 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3418
3419 /* Tx Dropped needs to be maintained elsewhere */
3420
3421 /* Phy Stats */
3422
96838a40
JB		 3423 if (hw->media_type == e1000_media_type_copper) {
3424 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3425 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3426 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3427 adapter->phy_stats.idle_errors += phy_tmp;
3428 }
3429
96838a40 3430 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3431 (hw->phy_type == e1000_phy_m88) &&
3432 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3433 adapter->phy_stats.receive_errors += phy_tmp;
3434 }
3435
3436 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3437}
3438
3439/**
3440 * e1000_intr - Interrupt Handler
3441 * @irq: interrupt number
3442 * @data: pointer to a network interface device structure
1da177e4
LT		 3443 **/
3444
3445static irqreturn_t
7d12e780 3446e1000_intr(int irq, void *data)
1da177e4
LT		 3447{
3448 struct net_device *netdev = data;
60490fe0 3449 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3450 struct e1000_hw *hw = &adapter->hw;
87041639 3451 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3452#ifndef CONFIG_E1000_NAPI
581d708e 3453 int i;
1e613fd9
JK		 3454#else
3455 /* Interrupt Auto-Mask...upon reading ICR,
3456 * interrupts are masked. No need for the
3457 * IMC write, but it does mean we should
3458 * account for it ASAP. */
3459 if (likely(hw->mac_type >= e1000_82571))
3460 atomic_inc(&adapter->irq_sem);
be2b28ed 3461#endif
1da177e4 3462
1e613fd9
JK		 3463 if (unlikely(!icr)) {
3464#ifdef CONFIG_E1000_NAPI
3465 if (hw->mac_type >= e1000_82571)
3466 e1000_irq_enable(adapter);
3467#endif
1da177e4 3468 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3469 }
1da177e4 3470
96838a40 3471 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3472 hw->get_link_status = 1;
87041639
JK		 3473 /* 80003ES2LAN workaround--
3474 * For packet buffer work-around on link down event;
3475 * disable receives here in the ISR and
3476 * reset adapter in watchdog
3477 */
3478 if (netif_carrier_ok(netdev) &&
3479 (adapter->hw.mac_type == e1000_80003es2lan)) {
3480 /* disable receives */
3481 rctl = E1000_READ_REG(hw, RCTL);
3482 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3483 }
1314bbf3
AK		 3484 /* guard against interrupt when we're going down */
3485 if (!test_bit(__E1000_DOWN, &adapter->flags))
3486 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3487 }
3488
3489#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3490 if (unlikely(hw->mac_type < e1000_82571)) {
3491 atomic_inc(&adapter->irq_sem);
3492 E1000_WRITE_REG(hw, IMC, ~0);
3493 E1000_WRITE_FLUSH(hw);
3494 }
d3d9e484
AK		 3495 if (likely(netif_rx_schedule_prep(netdev)))
3496 __netif_rx_schedule(netdev);
581d708e
MC		 3497 else
3498 e1000_irq_enable(adapter);
c1605eb3 3499#else
1da177e4 3500 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3501 * Due to Hub Link bus being occupied, an interrupt
3502 * de-assertion message is not able to be sent.
3503 * When an interrupt assertion message is generated later,
3504 * two messages are re-ordered and sent out.
3505 * That causes APIC to think 82547 is in de-assertion
3506 * state, while 82547 is in assertion state, resulting
3507 * in dead lock. Writing IMC forces 82547 into
3508 * de-assertion state.
3509 */
3510 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3511 atomic_inc(&adapter->irq_sem);
2648345f 3512 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3513 }
3514
96838a40
JB		 3515 for (i = 0; i < E1000_MAX_INTR; i++)
3516 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3517 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3518 break;
3519
96838a40 3520 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3521 e1000_irq_enable(adapter);
581d708e 3522
c1605eb3 3523#endif
1da177e4
LT		 3524
3525 return IRQ_HANDLED;
3526}
3527
3528#ifdef CONFIG_E1000_NAPI
3529/**
3530 * e1000_clean - NAPI Rx polling callback
3531 * @adapter: board private structure
3532 **/
3533
3534static int
581d708e 3535e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3536{
581d708e
MC		 3537 struct e1000_adapter *adapter;
3538 int work_to_do = min(*budget, poll_dev->quota);
d3d9e484 3539 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3540
3541 /* Must NOT use netdev_priv macro here. */
3542 adapter = poll_dev->priv;
3543
3544 /* Keep link state information with original netdev */
d3d9e484 3545 if (!netif_carrier_ok(poll_dev))
581d708e 3546 goto quit_polling;
2648345f 3547
d3d9e484
AK		 3548 /* e1000_clean is called per-cpu. This lock protects
3549 * tx_ring[0] from being cleaned by multiple cpus
3550 * simultaneously. A failure obtaining the lock means
3551 * tx_ring[0] is currently being cleaned anyway. */
3552 if (spin_trylock(&adapter->tx_queue_lock)) {
3553 tx_cleaned = e1000_clean_tx_irq(adapter,
3554 &adapter->tx_ring[0]);
3555 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3556 }
3557
d3d9e484 3558 adapter->clean_rx(adapter, &adapter->rx_ring[0],
581d708e 3559 &work_done, work_to_do);
1da177e4
LT		 3560
3561 *budget -= work_done;
581d708e 3562 poll_dev->quota -= work_done;
96838a40 3563
2b02893e 3564 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3565 if ((!tx_cleaned && (work_done == 0)) ||
d3d9e484 3566 !netif_running(poll_dev)) {
581d708e
MC		 3567quit_polling:
3568 netif_rx_complete(poll_dev);
1da177e4
LT		 3569 e1000_irq_enable(adapter);
3570 return 0;
3571 }
3572
3573 return 1;
3574}
3575
3576#endif
3577/**
3578 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3579 * @adapter: board private structure
3580 **/
3581
3582static boolean_t
581d708e
MC		 3583e1000_clean_tx_irq(struct e1000_adapter *adapter,
3584 struct e1000_tx_ring *tx_ring)
1da177e4 3585{
1da177e4
LT		 3586 struct net_device *netdev = adapter->netdev;
3587 struct e1000_tx_desc *tx_desc, *eop_desc;
3588 struct e1000_buffer *buffer_info;
3589 unsigned int i, eop;
2a1af5d7
JK		 3590#ifdef CONFIG_E1000_NAPI
3591 unsigned int count = 0;
3592#endif
1da177e4
LT		 3593 boolean_t cleaned = FALSE;
3594
3595 i = tx_ring->next_to_clean;
3596 eop = tx_ring->buffer_info[i].next_to_watch;
3597 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3598
581d708e 3599 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3600 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3601 tx_desc = E1000_TX_DESC(*tx_ring, i);
3602 buffer_info = &tx_ring->buffer_info[i];
3603 cleaned = (i == eop);
3604
fd803241 3605 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3606 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3607
96838a40 3608 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3609 }
581d708e 3610
7bfa4816 3611
1da177e4
LT		 3612 eop = tx_ring->buffer_info[i].next_to_watch;
3613 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3614#ifdef CONFIG_E1000_NAPI
3615#define E1000_TX_WEIGHT 64
3616 /* weight of a sort for tx, to avoid endless transmit cleanup */
3617 if (count++ == E1000_TX_WEIGHT) break;
3618#endif
1da177e4
LT		 3619 }
3620
3621 tx_ring->next_to_clean = i;
3622
77b2aad5 3623#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 3624 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3625 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3626 /* Make sure that anybody stopping the queue after this
3627 * sees the new next_to_clean.
3628 */
3629 smp_mb();
3630 if (netif_queue_stopped(netdev))
77b2aad5 3631 netif_wake_queue(netdev);
77b2aad5 3632 }
2648345f 3633
581d708e 3634 if (adapter->detect_tx_hung) {
2648345f 3635 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3636 * check with the clearing of time_stamp and movement of i */
3637 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3638 if (tx_ring->buffer_info[eop].dma &&
3639 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3640 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3641 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3642 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3643
3644 /* detected Tx unit hang */
c6963ef5 3645 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3646 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3647 " TDH <%x>\n"
3648 " TDT <%x>\n"
3649 " next_to_use <%x>\n"
3650 " next_to_clean <%x>\n"
3651 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3652 " time_stamp <%lx>\n"
3653 " next_to_watch <%x>\n"
3654 " jiffies <%lx>\n"
3655 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3656 (unsigned long)((tx_ring - adapter->tx_ring) /
3657 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3658 readl(adapter->hw.hw_addr + tx_ring->tdh),
3659 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3660 tx_ring->next_to_use,
392137fa
JK		 3661 tx_ring->next_to_clean,
3662 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3663 eop,
3664 jiffies,
3665 eop_desc->upper.fields.status);
1da177e4 3666 netif_stop_queue(netdev);
70b8f1e1 3667 }
1da177e4 3668 }
1da177e4
LT		 3669 return cleaned;
3670}
3671
3672/**
3673 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3674 * @adapter: board private structure
3675 * @status_err: receive descriptor status and error fields
3676 * @csum: receive descriptor csum field
3677 * @sk_buff: socket buffer with received data
1da177e4
LT		 3678 **/
3679
e619d523 3680static void
1da177e4 3681e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3682 uint32_t status_err, uint32_t csum,
3683 struct sk_buff *skb)
1da177e4 3684{
2d7edb92
MC		 3685 uint16_t status = (uint16_t)status_err;
3686 uint8_t errors = (uint8_t)(status_err >> 24);
3687 skb->ip_summed = CHECKSUM_NONE;
3688
1da177e4 3689 /* 82543 or newer only */
96838a40 3690 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3691 /* Ignore Checksum bit is set */
96838a40 3692 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3693 /* TCP/UDP checksum error bit is set */
96838a40 3694 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3695 /* let the stack verify checksum errors */
1da177e4 3696 adapter->hw_csum_err++;
2d7edb92
MC		 3697 return;
3698 }
3699 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3700 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3701 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3702 return;
1da177e4 3703 } else {
96838a40 3704 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3705 return;
3706 }
3707 /* It must be a TCP or UDP packet with a valid checksum */
3708 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3709 /* TCP checksum is good */
3710 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3711 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3712 /* IP fragment with UDP payload */
3713 /* Hardware complements the payload checksum, so we undo it
3714 * and then put the value in host order for further stack use.
3715 */
3716 csum = ntohl(csum ^ 0xFFFF);
3717 skb->csum = csum;
84fa7933 3718 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3719 }
2d7edb92 3720 adapter->hw_csum_good++;
1da177e4
LT		 3721}
3722
3723/**
2d7edb92 3724 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3725 * @adapter: board private structure
3726 **/
3727
3728static boolean_t
3729#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3730e1000_clean_rx_irq(struct e1000_adapter *adapter,
3731 struct e1000_rx_ring *rx_ring,
3732 int *work_done, int work_to_do)
1da177e4 3733#else
581d708e
MC		 3734e1000_clean_rx_irq(struct e1000_adapter *adapter,
3735 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3736#endif
3737{
1da177e4
LT		 3738 struct net_device *netdev = adapter->netdev;
3739 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3740 struct e1000_rx_desc *rx_desc, *next_rxd;
3741 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3742 unsigned long flags;
3743 uint32_t length;
3744 uint8_t last_byte;
3745 unsigned int i;
72d64a43 3746 int cleaned_count = 0;
a1415ee6 3747 boolean_t cleaned = FALSE;
1da177e4
LT		 3748
3749 i = rx_ring->next_to_clean;
3750 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3751 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3752
b92ff8ee 3753 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3754 struct sk_buff *skb;
a292ca6e 3755 u8 status;
1da177e4 3756#ifdef CONFIG_E1000_NAPI
96838a40 3757 if (*work_done >= work_to_do)
1da177e4
LT		 3758 break;
3759 (*work_done)++;
3760#endif
a292ca6e 3761 status = rx_desc->status;
b92ff8ee 3762 skb = buffer_info->skb;
86c3d59f
JB		 3763 buffer_info->skb = NULL;
3764
30320be8
JK		 3765 prefetch(skb->data - NET_IP_ALIGN);
3766
86c3d59f
JB		 3767 if (++i == rx_ring->count) i = 0;
3768 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3769 prefetch(next_rxd);
3770
86c3d59f 3771 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3772
72d64a43
JK		 3773 cleaned = TRUE;
3774 cleaned_count++;
a292ca6e
JK		 3775 pci_unmap_single(pdev,
3776 buffer_info->dma,
3777 buffer_info->length,
1da177e4
LT		 3778 PCI_DMA_FROMDEVICE);
3779
1da177e4
LT		 3780 length = le16_to_cpu(rx_desc->length);
3781
f235a2ab
AK		 3782 /* adjust length to remove Ethernet CRC */
3783 length -= 4;
3784
a1415ee6
JK		 3785 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3786 /* All receives must fit into a single buffer */
3787 E1000_DBG("%s: Receive packet consumed multiple"
3788 " buffers\n", netdev->name);
864c4e45 3789 /* recycle */
8fc897b0 3790 buffer_info->skb = skb;
1da177e4
LT		 3791 goto next_desc;
3792 }
3793
96838a40 3794 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3795 last_byte = *(skb->data + length - 1);
b92ff8ee 3796 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3797 rx_desc->errors, length, last_byte)) {
3798 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3799 e1000_tbi_adjust_stats(&adapter->hw,
3800 &adapter->stats,
1da177e4
LT		 3801 length, skb->data);
3802 spin_unlock_irqrestore(&adapter->stats_lock,
3803 flags);
3804 length--;
3805 } else {
9e2feace
AK		 3806 /* recycle */
3807 buffer_info->skb = skb;
1da177e4
LT		 3808 goto next_desc;
3809 }
1cb5821f 3810 }
1da177e4 3811
a292ca6e
JK		 3812 /* code added for copybreak, this should improve
3813 * performance for small packets with large amounts
3814 * of reassembly being done in the stack */
3815#define E1000_CB_LENGTH 256
a1415ee6 3816 if (length < E1000_CB_LENGTH) {
a292ca6e 3817 struct sk_buff *new_skb =
87f5032e 3818 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 3819 if (new_skb) {
3820 skb_reserve(new_skb, NET_IP_ALIGN);
a292ca6e
JK		 3821 memcpy(new_skb->data - NET_IP_ALIGN,
3822 skb->data - NET_IP_ALIGN,
3823 length + NET_IP_ALIGN);
3824 /* save the skb in buffer_info as good */
3825 buffer_info->skb = skb;
3826 skb = new_skb;
3827 skb_put(skb, length);
3828 }
a1415ee6
JK		 3829 } else
3830 skb_put(skb, length);
a292ca6e
JK		 3831
3832 /* end copybreak code */
1da177e4
LT		 3833
3834 /* Receive Checksum Offload */
a292ca6e
JK		 3835 e1000_rx_checksum(adapter,
3836 (uint32_t)(status) |
2d7edb92 3837 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 3838 le16_to_cpu(rx_desc->csum), skb);
96838a40 3839
1da177e4
LT		 3840 skb->protocol = eth_type_trans(skb, netdev);
3841#ifdef CONFIG_E1000_NAPI
96838a40 3842 if (unlikely(adapter->vlgrp &&
a292ca6e 3843 (status & E1000_RXD_STAT_VP))) {
1da177e4 3844 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3845 le16_to_cpu(rx_desc->special) &
3846 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3847 } else {
3848 netif_receive_skb(skb);
3849 }
3850#else /* CONFIG_E1000_NAPI */
96838a40 3851 if (unlikely(adapter->vlgrp &&
b92ff8ee 3852 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3853 vlan_hwaccel_rx(skb, adapter->vlgrp,
3854 le16_to_cpu(rx_desc->special) &
3855 E1000_RXD_SPC_VLAN_MASK);
3856 } else {
3857 netif_rx(skb);
3858 }
3859#endif /* CONFIG_E1000_NAPI */
3860 netdev->last_rx = jiffies;
3861
3862next_desc:
3863 rx_desc->status = 0;
1da177e4 3864
72d64a43
JK		 3865 /* return some buffers to hardware, one at a time is too slow */
3866 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3867 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3868 cleaned_count = 0;
3869 }
3870
30320be8 3871 /* use prefetched values */
86c3d59f
JB		 3872 rx_desc = next_rxd;
3873 buffer_info = next_buffer;
1da177e4 3874 }
1da177e4 3875 rx_ring->next_to_clean = i;
72d64a43
JK		 3876
3877 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3878 if (cleaned_count)
3879 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3880
3881 return cleaned;
3882}
3883
3884/**
3885 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3886 * @adapter: board private structure
3887 **/
3888
3889static boolean_t
3890#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3891e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3892 struct e1000_rx_ring *rx_ring,
3893 int *work_done, int work_to_do)
2d7edb92 3894#else
581d708e
MC		 3895e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3896 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3897#endif
3898{
86c3d59f 3899 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3900 struct net_device *netdev = adapter->netdev;
3901 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3902 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3903 struct e1000_ps_page *ps_page;
3904 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 3905 struct sk_buff *skb;
2d7edb92
MC		 3906 unsigned int i, j;
3907 uint32_t length, staterr;
72d64a43 3908 int cleaned_count = 0;
2d7edb92
MC		 3909 boolean_t cleaned = FALSE;
3910
3911 i = rx_ring->next_to_clean;
3912 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3913 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 3914 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3915
96838a40 3916 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3917 ps_page = &rx_ring->ps_page[i];
3918 ps_page_dma = &rx_ring->ps_page_dma[i];
3919#ifdef CONFIG_E1000_NAPI
96838a40 3920 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3921 break;
3922 (*work_done)++;
3923#endif
86c3d59f
JB		 3924 skb = buffer_info->skb;
3925
30320be8
JK		 3926 /* in the packet split case this is header only */
3927 prefetch(skb->data - NET_IP_ALIGN);
3928
86c3d59f
JB		 3929 if (++i == rx_ring->count) i = 0;
3930 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3931 prefetch(next_rxd);
3932
86c3d59f 3933 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3934
2d7edb92 3935 cleaned = TRUE;
72d64a43 3936 cleaned_count++;
2d7edb92
MC		 3937 pci_unmap_single(pdev, buffer_info->dma,
3938 buffer_info->length,
3939 PCI_DMA_FROMDEVICE);
3940
96838a40 3941 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3942 E1000_DBG("%s: Packet Split buffers didn't pick up"
3943 " the full packet\n", netdev->name);
3944 dev_kfree_skb_irq(skb);
3945 goto next_desc;
3946 }
1da177e4 3947
96838a40 3948 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3949 dev_kfree_skb_irq(skb);
3950 goto next_desc;
3951 }
3952
3953 length = le16_to_cpu(rx_desc->wb.middle.length0);
3954
96838a40 3955 if (unlikely(!length)) {
2d7edb92
MC		 3956 E1000_DBG("%s: Last part of the packet spanning"
3957 " multiple descriptors\n", netdev->name);
3958 dev_kfree_skb_irq(skb);
3959 goto next_desc;
3960 }
3961
3962 /* Good Receive */
3963 skb_put(skb, length);
3964
dc7c6add
JK		 3965 {
3966 /* this looks ugly, but it seems compiler issues make it
3967 more efficient than reusing j */
3968 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3969
3970 /* page alloc/put takes too long and effects small packet
3971 * throughput, so unsplit small packets and save the alloc/put*/
9e2feace 3972 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 3973 u8 *vaddr;
76c224bc 3974 /* there is no documentation about how to call
dc7c6add
JK		 3975 * kmap_atomic, so we can't hold the mapping
3976 * very long */
3977 pci_dma_sync_single_for_cpu(pdev,
3978 ps_page_dma->ps_page_dma[0],
3979 PAGE_SIZE,
3980 PCI_DMA_FROMDEVICE);
3981 vaddr = kmap_atomic(ps_page->ps_page[0],
3982 KM_SKB_DATA_SOFTIRQ);
3983 memcpy(skb->tail, vaddr, l1);
3984 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3985 pci_dma_sync_single_for_device(pdev,
3986 ps_page_dma->ps_page_dma[0],
3987 PAGE_SIZE, PCI_DMA_FROMDEVICE);
f235a2ab
AK		 3988 /* remove the CRC */
3989 l1 -= 4;
dc7c6add 3990 skb_put(skb, l1);
dc7c6add
JK		 3991 goto copydone;
3992 } /* if */
3993 }
3994
96838a40 3995 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 3996 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 3997 break;
2d7edb92
MC		 3998 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3999 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4000 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 4001 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4002 length);
2d7edb92 4003 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 4004 skb->len += length;
4005 skb->data_len += length;
5d51b80f 4006 skb->truesize += length;
2d7edb92
MC		 4007 }
4008
f235a2ab
AK		 4009 /* strip the ethernet crc, problem is we're using pages now so
4010 * this whole operation can get a little cpu intensive */
4011 pskb_trim(skb, skb->len - 4);
4012
dc7c6add 4013copydone:
2d7edb92 4014 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 4015 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 4016 skb->protocol = eth_type_trans(skb, netdev);
4017
96838a40 4018 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 4019 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 4020 adapter->rx_hdr_split++;
2d7edb92 4021#ifdef CONFIG_E1000_NAPI
96838a40 4022 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4023 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 4024 le16_to_cpu(rx_desc->wb.middle.vlan) &
4025 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4026 } else {
4027 netif_receive_skb(skb);
4028 }
4029#else /* CONFIG_E1000_NAPI */
96838a40 4030 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4031 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 4032 le16_to_cpu(rx_desc->wb.middle.vlan) &
4033 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4034 } else {
4035 netif_rx(skb);
4036 }
4037#endif /* CONFIG_E1000_NAPI */
4038 netdev->last_rx = jiffies;
4039
4040next_desc:
c3d7a3a4 4041 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 4042 buffer_info->skb = NULL;
2d7edb92 4043
72d64a43
JK		 4044 /* return some buffers to hardware, one at a time is too slow */
4045 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4046 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4047 cleaned_count = 0;
4048 }
4049
30320be8 4050 /* use prefetched values */
86c3d59f
JB		 4051 rx_desc = next_rxd;
4052 buffer_info = next_buffer;
4053
683a38f3 4054 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 4055 }
4056 rx_ring->next_to_clean = i;
72d64a43
JK		 4057
4058 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4059 if (cleaned_count)
4060 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 4061
4062 return cleaned;
4063}
4064
4065/**
2d7edb92 4066 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4067 * @adapter: address of board private structure
4068 **/
4069
4070static void
581d708e 4071e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 4072 struct e1000_rx_ring *rx_ring,
a292ca6e 4073 int cleaned_count)
1da177e4 4074{
1da177e4
LT		 4075 struct net_device *netdev = adapter->netdev;
4076 struct pci_dev *pdev = adapter->pdev;
4077 struct e1000_rx_desc *rx_desc;
4078 struct e1000_buffer *buffer_info;
4079 struct sk_buff *skb;
2648345f
MC		 4080 unsigned int i;
4081 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4082
4083 i = rx_ring->next_to_use;
4084 buffer_info = &rx_ring->buffer_info[i];
4085
a292ca6e 4086 while (cleaned_count--) {
ca6f7224
CH		 4087 skb = buffer_info->skb;
4088 if (skb) {
a292ca6e
JK		 4089 skb_trim(skb, 0);
4090 goto map_skb;
4091 }
4092
ca6f7224 4093 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4094 if (unlikely(!skb)) {
1da177e4 4095 /* Better luck next round */
72d64a43 4096 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4097 break;
4098 }
4099
2648345f 4100 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4101 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4102 struct sk_buff *oldskb = skb;
2648345f
MC		 4103 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4104 "at %p\n", bufsz, skb->data);
4105 /* Try again, without freeing the previous */
87f5032e 4106 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4107 /* Failed allocation, critical failure */
1da177e4
LT		 4108 if (!skb) {
4109 dev_kfree_skb(oldskb);
4110 break;
4111 }
2648345f 4112
1da177e4
LT		 4113 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4114 /* give up */
4115 dev_kfree_skb(skb);
4116 dev_kfree_skb(oldskb);
4117 break; /* while !buffer_info->skb */
1da177e4 4118 }
ca6f7224
CH		 4119
4120 /* Use new allocation */
4121 dev_kfree_skb(oldskb);
1da177e4 4122 }
1da177e4
LT		 4123 /* Make buffer alignment 2 beyond a 16 byte boundary
4124 * this will result in a 16 byte aligned IP header after
4125 * the 14 byte MAC header is removed
4126 */
4127 skb_reserve(skb, NET_IP_ALIGN);
4128
1da177e4
LT		 4129 buffer_info->skb = skb;
4130 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4131map_skb:
1da177e4
LT		 4132 buffer_info->dma = pci_map_single(pdev,
4133 skb->data,
4134 adapter->rx_buffer_len,
4135 PCI_DMA_FROMDEVICE);
4136
2648345f
MC		 4137 /* Fix for errata 23, can't cross 64kB boundary */
4138 if (!e1000_check_64k_bound(adapter,
4139 (void *)(unsigned long)buffer_info->dma,
4140 adapter->rx_buffer_len)) {
4141 DPRINTK(RX_ERR, ERR,
4142 "dma align check failed: %u bytes at %p\n",
4143 adapter->rx_buffer_len,
4144 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4145 dev_kfree_skb(skb);
4146 buffer_info->skb = NULL;
4147
2648345f 4148 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4149 adapter->rx_buffer_len,
4150 PCI_DMA_FROMDEVICE);
4151
4152 break; /* while !buffer_info->skb */
4153 }
1da177e4
LT		 4154 rx_desc = E1000_RX_DESC(*rx_ring, i);
4155 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4156
96838a40
JB		 4157 if (unlikely(++i == rx_ring->count))
4158 i = 0;
1da177e4
LT		 4159 buffer_info = &rx_ring->buffer_info[i];
4160 }
4161
b92ff8ee
JB		 4162 if (likely(rx_ring->next_to_use != i)) {
4163 rx_ring->next_to_use = i;
4164 if (unlikely(i-- == 0))
4165 i = (rx_ring->count - 1);
4166
4167 /* Force memory writes to complete before letting h/w
4168 * know there are new descriptors to fetch. (Only
4169 * applicable for weak-ordered memory model archs,
4170 * such as IA-64). */
4171 wmb();
4172 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4173 }
1da177e4
LT		 4174}
4175
2d7edb92
MC		 4176/**
4177 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4178 * @adapter: address of board private structure
4179 **/
4180
4181static void
581d708e 4182e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4183 struct e1000_rx_ring *rx_ring,
4184 int cleaned_count)
2d7edb92 4185{
2d7edb92
MC		 4186 struct net_device *netdev = adapter->netdev;
4187 struct pci_dev *pdev = adapter->pdev;
4188 union e1000_rx_desc_packet_split *rx_desc;
4189 struct e1000_buffer *buffer_info;
4190 struct e1000_ps_page *ps_page;
4191 struct e1000_ps_page_dma *ps_page_dma;
4192 struct sk_buff *skb;
4193 unsigned int i, j;
4194
4195 i = rx_ring->next_to_use;
4196 buffer_info = &rx_ring->buffer_info[i];
4197 ps_page = &rx_ring->ps_page[i];
4198 ps_page_dma = &rx_ring->ps_page_dma[i];
4199
72d64a43 4200 while (cleaned_count--) {
2d7edb92
MC		 4201 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4202
96838a40 4203 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4204 if (j < adapter->rx_ps_pages) {
4205 if (likely(!ps_page->ps_page[j])) {
4206 ps_page->ps_page[j] =
4207 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4208 if (unlikely(!ps_page->ps_page[j])) {
4209 adapter->alloc_rx_buff_failed++;
e4c811c9 4210 goto no_buffers;
b92ff8ee 4211 }
e4c811c9
MC		 4212 ps_page_dma->ps_page_dma[j] =
4213 pci_map_page(pdev,
4214 ps_page->ps_page[j],
4215 0, PAGE_SIZE,
4216 PCI_DMA_FROMDEVICE);
4217 }
4218 /* Refresh the desc even if buffer_addrs didn't
96838a40 4219 * change because each write-back erases
e4c811c9
MC		 4220 * this info.
4221 */
4222 rx_desc->read.buffer_addr[j+1] =
4223 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4224 } else
4225 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4226 }
4227
87f5032e
DM		 4228 skb = netdev_alloc_skb(netdev,
4229 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
2d7edb92 4230
b92ff8ee
JB		 4231 if (unlikely(!skb)) {
4232 adapter->alloc_rx_buff_failed++;
2d7edb92 4233 break;
b92ff8ee 4234 }
2d7edb92
MC		 4235
4236 /* Make buffer alignment 2 beyond a 16 byte boundary
4237 * this will result in a 16 byte aligned IP header after
4238 * the 14 byte MAC header is removed
4239 */
4240 skb_reserve(skb, NET_IP_ALIGN);
4241
2d7edb92
MC		 4242 buffer_info->skb = skb;
4243 buffer_info->length = adapter->rx_ps_bsize0;
4244 buffer_info->dma = pci_map_single(pdev, skb->data,
4245 adapter->rx_ps_bsize0,
4246 PCI_DMA_FROMDEVICE);
4247
4248 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4249
96838a40 4250 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4251 buffer_info = &rx_ring->buffer_info[i];
4252 ps_page = &rx_ring->ps_page[i];
4253 ps_page_dma = &rx_ring->ps_page_dma[i];
4254 }
4255
4256no_buffers:
b92ff8ee
JB		 4257 if (likely(rx_ring->next_to_use != i)) {
4258 rx_ring->next_to_use = i;
4259 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4260
4261 /* Force memory writes to complete before letting h/w
4262 * know there are new descriptors to fetch. (Only
4263 * applicable for weak-ordered memory model archs,
4264 * such as IA-64). */
4265 wmb();
4266 /* Hardware increments by 16 bytes, but packet split
4267 * descriptors are 32 bytes...so we increment tail
4268 * twice as much.
4269 */
4270 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4271 }
2d7edb92
MC		 4272}
4273
1da177e4
LT		 4274/**
4275 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4276 * @adapter:
4277 **/
4278
4279static void
4280e1000_smartspeed(struct e1000_adapter *adapter)
4281{
4282 uint16_t phy_status;
4283 uint16_t phy_ctrl;
4284
96838a40 4285 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4286 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4287 return;
4288
96838a40 4289 if (adapter->smartspeed == 0) {
1da177e4
LT		 4290 /* If Master/Slave config fault is asserted twice,
4291 * we assume back-to-back */
4292 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4293 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4294 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4295 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4296 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4297 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4298 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4299 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4300 phy_ctrl);
4301 adapter->smartspeed++;
96838a40 4302 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4303 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4304 &phy_ctrl)) {
4305 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4306 MII_CR_RESTART_AUTO_NEG);
4307 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4308 phy_ctrl);
4309 }
4310 }
4311 return;
96838a40 4312 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4313 /* If still no link, perhaps using 2/3 pair cable */
4314 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4315 phy_ctrl |= CR_1000T_MS_ENABLE;
4316 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4317 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4318 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4319 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4320 MII_CR_RESTART_AUTO_NEG);
4321 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4322 }
4323 }
4324 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4325 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4326 adapter->smartspeed = 0;
4327}
4328
4329/**
4330 * e1000_ioctl -
4331 * @netdev:
4332 * @ifreq:
4333 * @cmd:
4334 **/
4335
4336static int
4337e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4338{
4339 switch (cmd) {
4340 case SIOCGMIIPHY:
4341 case SIOCGMIIREG:
4342 case SIOCSMIIREG:
4343 return e1000_mii_ioctl(netdev, ifr, cmd);
4344 default:
4345 return -EOPNOTSUPP;
4346 }
4347}
4348
4349/**
4350 * e1000_mii_ioctl -
4351 * @netdev:
4352 * @ifreq:
4353 * @cmd:
4354 **/
4355
4356static int
4357e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4358{
60490fe0 4359 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4360 struct mii_ioctl_data *data = if_mii(ifr);
4361 int retval;
4362 uint16_t mii_reg;
4363 uint16_t spddplx;
97876fc6 4364 unsigned long flags;
1da177e4 4365
96838a40 4366 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4367 return -EOPNOTSUPP;
4368
4369 switch (cmd) {
4370 case SIOCGMIIPHY:
4371 data->phy_id = adapter->hw.phy_addr;
4372 break;
4373 case SIOCGMIIREG:
96838a40 4374 if (!capable(CAP_NET_ADMIN))
1da177e4 4375 return -EPERM;
97876fc6 4376 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4377 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4378 &data->val_out)) {
4379 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4380 return -EIO;
97876fc6
MC		 4381 }
4382 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4383 break;
4384 case SIOCSMIIREG:
96838a40 4385 if (!capable(CAP_NET_ADMIN))
1da177e4 4386 return -EPERM;
96838a40 4387 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4388 return -EFAULT;
4389 mii_reg = data->val_in;
97876fc6 4390 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4391 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4392 mii_reg)) {
4393 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4394 return -EIO;
97876fc6 4395 }
dc86d32a 4396 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4397 switch (data->reg_num) {
4398 case PHY_CTRL:
96838a40 4399 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4400 break;
96838a40 4401 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4402 adapter->hw.autoneg = 1;
4403 adapter->hw.autoneg_advertised = 0x2F;
4404 } else {
4405 if (mii_reg & 0x40)
4406 spddplx = SPEED_1000;
4407 else if (mii_reg & 0x2000)
4408 spddplx = SPEED_100;
4409 else
4410 spddplx = SPEED_10;
4411 spddplx += (mii_reg & 0x100)
cb764326
JK		 4412 ? DUPLEX_FULL :
4413 DUPLEX_HALF;
1da177e4
LT		 4414 retval = e1000_set_spd_dplx(adapter,
4415 spddplx);
96838a40 4416 if (retval) {
97876fc6 4417 spin_unlock_irqrestore(
96838a40 4418 &adapter->stats_lock,
97876fc6 4419 flags);
1da177e4 4420 return retval;
97876fc6 4421 }
1da177e4 4422 }
2db10a08
AK		 4423 if (netif_running(adapter->netdev))
4424 e1000_reinit_locked(adapter);
4425 else
1da177e4
LT		 4426 e1000_reset(adapter);
4427 break;
4428 case M88E1000_PHY_SPEC_CTRL:
4429 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4430 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4431 spin_unlock_irqrestore(
4432 &adapter->stats_lock, flags);
1da177e4 4433 return -EIO;
97876fc6 4434 }
1da177e4
LT		 4435 break;
4436 }
4437 } else {
4438 switch (data->reg_num) {
4439 case PHY_CTRL:
96838a40 4440 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4441 break;
2db10a08
AK		 4442 if (netif_running(adapter->netdev))
4443 e1000_reinit_locked(adapter);
4444 else
1da177e4
LT		 4445 e1000_reset(adapter);
4446 break;
4447 }
4448 }
97876fc6 4449 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4450 break;
4451 default:
4452 return -EOPNOTSUPP;
4453 }
4454 return E1000_SUCCESS;
4455}
4456
4457void
4458e1000_pci_set_mwi(struct e1000_hw *hw)
4459{
4460 struct e1000_adapter *adapter = hw->back;
2648345f 4461 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4462
96838a40 4463 if (ret_val)
2648345f 4464 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4465}
4466
4467void
4468e1000_pci_clear_mwi(struct e1000_hw *hw)
4469{
4470 struct e1000_adapter *adapter = hw->back;
4471
4472 pci_clear_mwi(adapter->pdev);
4473}
4474
4475void
4476e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4477{
4478 struct e1000_adapter *adapter = hw->back;
4479
4480 pci_read_config_word(adapter->pdev, reg, value);
4481}
4482
4483void
4484e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4485{
4486 struct e1000_adapter *adapter = hw->back;
4487
4488 pci_write_config_word(adapter->pdev, reg, *value);
4489}
4490
caeccb68
JK		 4491int32_t
4492e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4493{
4494 struct e1000_adapter *adapter = hw->back;
4495 uint16_t cap_offset;
4496
4497 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4498 if (!cap_offset)
4499 return -E1000_ERR_CONFIG;
4500
4501 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4502
4503 return E1000_SUCCESS;
4504}
4505
4506
1da177e4
LT		 4507void
4508e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4509{
4510 outl(value, port);
4511}
4512
4513static void
4514e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4515{
60490fe0 4516 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4517 uint32_t ctrl, rctl;
4518
4519 e1000_irq_disable(adapter);
4520 adapter->vlgrp = grp;
4521
96838a40 4522 if (grp) {
1da177e4
LT		 4523 /* enable VLAN tag insert/strip */
4524 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4525 ctrl |= E1000_CTRL_VME;
4526 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4527
cd94dd0b 4528 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4529 /* enable VLAN receive filtering */
4530 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4531 rctl |= E1000_RCTL_VFE;
4532 rctl &= ~E1000_RCTL_CFIEN;
4533 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4534 e1000_update_mng_vlan(adapter);
cd94dd0b 4535 }
1da177e4
LT		 4536 } else {
4537 /* disable VLAN tag insert/strip */
4538 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4539 ctrl &= ~E1000_CTRL_VME;
4540 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4541
cd94dd0b 4542 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4543 /* disable VLAN filtering */
4544 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4545 rctl &= ~E1000_RCTL_VFE;
4546 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4547 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4548 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4549 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4550 }
cd94dd0b 4551 }
1da177e4
LT		 4552 }
4553
4554 e1000_irq_enable(adapter);
4555}
4556
4557static void
4558e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4559{
60490fe0 4560 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4561 uint32_t vfta, index;
96838a40
JB		 4562
4563 if ((adapter->hw.mng_cookie.status &
4564 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4565 (vid == adapter->mng_vlan_id))
2d7edb92 4566 return;
1da177e4
LT		 4567 /* add VID to filter table */
4568 index = (vid >> 5) & 0x7F;
4569 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4570 vfta |= (1 << (vid & 0x1F));
4571 e1000_write_vfta(&adapter->hw, index, vfta);
4572}
4573
4574static void
4575e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4576{
60490fe0 4577 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4578 uint32_t vfta, index;
4579
4580 e1000_irq_disable(adapter);
4581
96838a40 4582 if (adapter->vlgrp)
1da177e4
LT		 4583 adapter->vlgrp->vlan_devices[vid] = NULL;
4584
4585 e1000_irq_enable(adapter);
4586
96838a40
JB		 4587 if ((adapter->hw.mng_cookie.status &
4588 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4589 (vid == adapter->mng_vlan_id)) {
4590 /* release control to f/w */
4591 e1000_release_hw_control(adapter);
2d7edb92 4592 return;
ff147013
JK		 4593 }
4594
1da177e4
LT		 4595 /* remove VID from filter table */
4596 index = (vid >> 5) & 0x7F;
4597 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4598 vfta &= ~(1 << (vid & 0x1F));
4599 e1000_write_vfta(&adapter->hw, index, vfta);
4600}
4601
4602static void
4603e1000_restore_vlan(struct e1000_adapter *adapter)
4604{
4605 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4606
96838a40 4607 if (adapter->vlgrp) {
1da177e4 4608 uint16_t vid;
96838a40
JB		 4609 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4610 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4611 continue;
4612 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4613 }
4614 }
4615}
4616
4617int
4618e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4619{
4620 adapter->hw.autoneg = 0;
4621
6921368f 4622 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4623 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4624 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4625 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4626 return -EINVAL;
4627 }
4628
96838a40 4629 switch (spddplx) {
1da177e4
LT		 4630 case SPEED_10 + DUPLEX_HALF:
4631 adapter->hw.forced_speed_duplex = e1000_10_half;
4632 break;
4633 case SPEED_10 + DUPLEX_FULL:
4634 adapter->hw.forced_speed_duplex = e1000_10_full;
4635 break;
4636 case SPEED_100 + DUPLEX_HALF:
4637 adapter->hw.forced_speed_duplex = e1000_100_half;
4638 break;
4639 case SPEED_100 + DUPLEX_FULL:
4640 adapter->hw.forced_speed_duplex = e1000_100_full;
4641 break;
4642 case SPEED_1000 + DUPLEX_FULL:
4643 adapter->hw.autoneg = 1;
4644 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4645 break;
4646 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4647 default:
2648345f 4648 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4649 return -EINVAL;
4650 }
4651 return 0;
4652}
4653
b6a1d5f8 4654#ifdef CONFIG_PM
0f15a8fa
JK		 4655/* Save/restore 16 or 64 dwords of PCI config space depending on which
4656 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4657 */
4658#define PCIE_CONFIG_SPACE_LEN 256
4659#define PCI_CONFIG_SPACE_LEN 64
4660static int
4661e1000_pci_save_state(struct e1000_adapter *adapter)
4662{
4663 struct pci_dev *dev = adapter->pdev;
4664 int size;
4665 int i;
0f15a8fa 4666
2f82665f
JB		 4667 if (adapter->hw.mac_type >= e1000_82571)
4668 size = PCIE_CONFIG_SPACE_LEN;
4669 else
4670 size = PCI_CONFIG_SPACE_LEN;
4671
4672 WARN_ON(adapter->config_space != NULL);
4673
4674 adapter->config_space = kmalloc(size, GFP_KERNEL);
4675 if (!adapter->config_space) {
4676 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4677 return -ENOMEM;
4678 }
4679 for (i = 0; i < (size / 4); i++)
4680 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4681 return 0;
4682}
4683
4684static void
4685e1000_pci_restore_state(struct e1000_adapter *adapter)
4686{
4687 struct pci_dev *dev = adapter->pdev;
4688 int size;
4689 int i;
0f15a8fa 4690
2f82665f
JB		 4691 if (adapter->config_space == NULL)
4692 return;
0f15a8fa 4693
2f82665f
JB		 4694 if (adapter->hw.mac_type >= e1000_82571)
4695 size = PCIE_CONFIG_SPACE_LEN;
4696 else
4697 size = PCI_CONFIG_SPACE_LEN;
4698 for (i = 0; i < (size / 4); i++)
4699 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4700 kfree(adapter->config_space);
4701 adapter->config_space = NULL;
4702 return;
4703}
4704#endif /* CONFIG_PM */
4705
1da177e4 4706static int
829ca9a3 4707e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4708{
4709 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4710 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4711 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4712 uint32_t wufc = adapter->wol;
6fdfef16 4713#ifdef CONFIG_PM
240b1710 4714 int retval = 0;
6fdfef16 4715#endif
1da177e4
LT		 4716
4717 netif_device_detach(netdev);
4718
2db10a08
AK		 4719 if (netif_running(netdev)) {
4720 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4721 e1000_down(adapter);
2db10a08 4722 }
1da177e4 4723
2f82665f 4724#ifdef CONFIG_PM
0f15a8fa
JK		 4725 /* Implement our own version of pci_save_state(pdev) because pci-
4726 * express adapters have 256-byte config spaces. */
2f82665f
JB		 4727 retval = e1000_pci_save_state(adapter);
4728 if (retval)
4729 return retval;
4730#endif
4731
1da177e4 4732 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4733 if (status & E1000_STATUS_LU)
1da177e4
LT		 4734 wufc &= ~E1000_WUFC_LNKC;
4735
96838a40 4736 if (wufc) {
1da177e4
LT		 4737 e1000_setup_rctl(adapter);
4738 e1000_set_multi(netdev);
4739
4740 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4741 if (wufc & E1000_WUFC_MC) {
1da177e4
LT		 4742 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4743 rctl |= E1000_RCTL_MPE;
4744 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4745 }
4746
96838a40 4747 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4748 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4749 /* advertise wake from D3Cold */
4750 #define E1000_CTRL_ADVD3WUC 0x00100000
4751 /* phy power management enable */
4752 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4753 ctrl |= E1000_CTRL_ADVD3WUC |
4754 E1000_CTRL_EN_PHY_PWR_MGMT;
4755 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4756 }
4757
96838a40 4758 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4759 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4760 /* keep the laser running in D3 */
4761 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4762 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4763 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4764 }
4765
2d7edb92
MC		 4766 /* Allow time for pending master requests to run */
4767 e1000_disable_pciex_master(&adapter->hw);
4768
1da177e4
LT		 4769 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4770 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 4771 pci_enable_wake(pdev, PCI_D3hot, 1);
4772 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4773 } else {
4774 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4775 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 4776 pci_enable_wake(pdev, PCI_D3hot, 0);
4777 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4778 }
4779
4ccc12ae
JB		 4780 if (adapter->hw.mac_type >= e1000_82540 &&
4781 adapter->hw.mac_type < e1000_82571 &&
4782 adapter->hw.media_type == e1000_media_type_copper) {
1da177e4 4783 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4784 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4785 manc |= E1000_MANC_ARP_EN;
4786 E1000_WRITE_REG(&adapter->hw, MANC, manc);
d0e027db
AK		 4787 pci_enable_wake(pdev, PCI_D3hot, 1);
4788 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4789 }
4790 }
4791
cd94dd0b
AK		 4792 if (adapter->hw.phy_type == e1000_phy_igp_3)
4793 e1000_phy_powerdown_workaround(&adapter->hw);
4794
b55ccb35
JK		 4795 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4796 * would have already happened in close and is redundant. */
4797 e1000_release_hw_control(adapter);
2d7edb92 4798
1da177e4 4799 pci_disable_device(pdev);
240b1710 4800
d0e027db 4801 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4802
4803 return 0;
4804}
4805
2f82665f 4806#ifdef CONFIG_PM
1da177e4
LT		 4807static int
4808e1000_resume(struct pci_dev *pdev)
4809{
4810 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4811 struct e1000_adapter *adapter = netdev_priv(netdev);
3d1dd8cb 4812 uint32_t manc, err;
1da177e4 4813
d0e027db 4814 pci_set_power_state(pdev, PCI_D0);
2f82665f 4815 e1000_pci_restore_state(adapter);
3d1dd8cb
AK		 4816 if ((err = pci_enable_device(pdev))) {
4817 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4818 return err;
4819 }
a4cb847d 4820 pci_set_master(pdev);
1da177e4 4821
d0e027db
AK		 4822 pci_enable_wake(pdev, PCI_D3hot, 0);
4823 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4824
4825 e1000_reset(adapter);
4826 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4827
96838a40 4828 if (netif_running(netdev))
1da177e4
LT		 4829 e1000_up(adapter);
4830
4831 netif_device_attach(netdev);
4832
4ccc12ae
JB		 4833 if (adapter->hw.mac_type >= e1000_82540 &&
4834 adapter->hw.mac_type < e1000_82571 &&
4835 adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4836 manc = E1000_READ_REG(&adapter->hw, MANC);
4837 manc &= ~(E1000_MANC_ARP_EN);
4838 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4839 }
4840
b55ccb35
JK		 4841 /* If the controller is 82573 and f/w is AMT, do not set
4842 * DRV_LOAD until the interface is up. For all other cases,
4843 * let the f/w know that the h/w is now under the control
4844 * of the driver. */
4845 if (adapter->hw.mac_type != e1000_82573 ||
4846 !e1000_check_mng_mode(&adapter->hw))
4847 e1000_get_hw_control(adapter);
2d7edb92 4848
1da177e4
LT		 4849 return 0;
4850}
4851#endif
c653e635
AK		 4852
4853static void e1000_shutdown(struct pci_dev *pdev)
4854{
4855 e1000_suspend(pdev, PMSG_SUSPEND);
4856}
4857
1da177e4
LT		 4858#ifdef CONFIG_NET_POLL_CONTROLLER
4859/*
4860 * Polling 'interrupt' - used by things like netconsole to send skbs
4861 * without having to re-enable interrupts. It's not called while
4862 * the interrupt routine is executing.
4863 */
4864static void
2648345f 4865e1000_netpoll(struct net_device *netdev)
1da177e4 4866{
60490fe0 4867 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4868
1da177e4 4869 disable_irq(adapter->pdev->irq);
7d12e780 4870 e1000_intr(adapter->pdev->irq, netdev);
c4cfe567 4871 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4872#ifndef CONFIG_E1000_NAPI
4873 adapter->clean_rx(adapter, adapter->rx_ring);
4874#endif
1da177e4
LT		 4875 enable_irq(adapter->pdev->irq);
4876}
4877#endif
4878
9026729b
AK		 4879/**
4880 * e1000_io_error_detected - called when PCI error is detected
4881 * @pdev: Pointer to PCI device
4882 * @state: The current pci conneection state
4883 *
4884 * This function is called after a PCI bus error affecting
4885 * this device has been detected.
4886 */
4887static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4888{
4889 struct net_device *netdev = pci_get_drvdata(pdev);
4890 struct e1000_adapter *adapter = netdev->priv;
4891
4892 netif_device_detach(netdev);
4893
4894 if (netif_running(netdev))
4895 e1000_down(adapter);
72e8d6bb 4896 pci_disable_device(pdev);
9026729b
AK		 4897
4898 /* Request a slot slot reset. */
4899 return PCI_ERS_RESULT_NEED_RESET;
4900}
4901
4902/**
4903 * e1000_io_slot_reset - called after the pci bus has been reset.
4904 * @pdev: Pointer to PCI device
4905 *
4906 * Restart the card from scratch, as if from a cold-boot. Implementation
4907 * resembles the first-half of the e1000_resume routine.
4908 */
4909static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4910{
4911 struct net_device *netdev = pci_get_drvdata(pdev);
4912 struct e1000_adapter *adapter = netdev->priv;
4913
4914 if (pci_enable_device(pdev)) {
4915 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4916 return PCI_ERS_RESULT_DISCONNECT;
4917 }
4918 pci_set_master(pdev);
4919
dbf38c94
LV		 4920 pci_enable_wake(pdev, PCI_D3hot, 0);
4921 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4922
9026729b
AK		 4923 e1000_reset(adapter);
4924 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4925
4926 return PCI_ERS_RESULT_RECOVERED;
4927}
4928
4929/**
4930 * e1000_io_resume - called when traffic can start flowing again.
4931 * @pdev: Pointer to PCI device
4932 *
4933 * This callback is called when the error recovery driver tells us that
4934 * its OK to resume normal operation. Implementation resembles the
4935 * second-half of the e1000_resume routine.
4936 */
4937static void e1000_io_resume(struct pci_dev *pdev)
4938{
4939 struct net_device *netdev = pci_get_drvdata(pdev);
4940 struct e1000_adapter *adapter = netdev->priv;
4941 uint32_t manc, swsm;
4942
4943 if (netif_running(netdev)) {
4944 if (e1000_up(adapter)) {
4945 printk("e1000: can't bring device back up after reset\n");
4946 return;
4947 }
4948 }
4949
4950 netif_device_attach(netdev);
4951
4952 if (adapter->hw.mac_type >= e1000_82540 &&
4ccc12ae 4953 adapter->hw.mac_type < e1000_82571 &&
9026729b
AK		 4954 adapter->hw.media_type == e1000_media_type_copper) {
4955 manc = E1000_READ_REG(&adapter->hw, MANC);
4956 manc &= ~(E1000_MANC_ARP_EN);
4957 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4958 }
4959
4960 switch (adapter->hw.mac_type) {
4961 case e1000_82573:
4962 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4963 E1000_WRITE_REG(&adapter->hw, SWSM,
4964 swsm | E1000_SWSM_DRV_LOAD);
4965 break;
4966 default:
4967 break;
4968 }
4969
4970 if (netif_running(netdev))
4971 mod_timer(&adapter->watchdog_timer, jiffies);
4972}
4973
1da177e4 4974/* e1000_main.c */
Linux 6.x block layer and io_uring tree(s)