Commit | Line | Data |
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1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
3 | ||
3d41e30a | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
1da177e4 LT |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms of the GNU General Public License as published by the Free | |
8 | Software Foundation; either version 2 of the License, or (at your option) | |
9 | any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License along with | |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | ||
20 | The full GNU General Public License is included in this distribution in the | |
21 | file called LICENSE. | |
22 | ||
23 | Contact Information: | |
24 | Linux NICS <linux.nics@intel.com> | |
3d41e30a | 25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
1da177e4 LT |
26 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
27 | ||
28 | *******************************************************************************/ | |
29 | ||
30 | #include "e1000.h" | |
31 | ||
1da177e4 | 32 | char e1000_driver_name[] = "e1000"; |
3ad2cc67 | 33 | static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; |
1da177e4 LT |
34 | #ifndef CONFIG_E1000_NAPI |
35 | #define DRIVERNAPI | |
36 | #else | |
37 | #define DRIVERNAPI "-NAPI" | |
38 | #endif | |
36902f2e | 39 | #define DRV_VERSION "7.1.9-k4"DRIVERNAPI |
1da177e4 | 40 | char e1000_driver_version[] = DRV_VERSION; |
3d41e30a | 41 | static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; |
1da177e4 LT |
42 | |
43 | /* e1000_pci_tbl - PCI Device ID Table | |
44 | * | |
45 | * Last entry must be all 0s | |
46 | * | |
47 | * Macro expands to... | |
48 | * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)} | |
49 | */ | |
50 | static struct pci_device_id e1000_pci_tbl[] = { | |
51 | INTEL_E1000_ETHERNET_DEVICE(0x1000), | |
52 | INTEL_E1000_ETHERNET_DEVICE(0x1001), | |
53 | INTEL_E1000_ETHERNET_DEVICE(0x1004), | |
54 | INTEL_E1000_ETHERNET_DEVICE(0x1008), | |
55 | INTEL_E1000_ETHERNET_DEVICE(0x1009), | |
56 | INTEL_E1000_ETHERNET_DEVICE(0x100C), | |
57 | INTEL_E1000_ETHERNET_DEVICE(0x100D), | |
58 | INTEL_E1000_ETHERNET_DEVICE(0x100E), | |
59 | INTEL_E1000_ETHERNET_DEVICE(0x100F), | |
60 | INTEL_E1000_ETHERNET_DEVICE(0x1010), | |
61 | INTEL_E1000_ETHERNET_DEVICE(0x1011), | |
62 | INTEL_E1000_ETHERNET_DEVICE(0x1012), | |
63 | INTEL_E1000_ETHERNET_DEVICE(0x1013), | |
64 | INTEL_E1000_ETHERNET_DEVICE(0x1014), | |
65 | INTEL_E1000_ETHERNET_DEVICE(0x1015), | |
66 | INTEL_E1000_ETHERNET_DEVICE(0x1016), | |
67 | INTEL_E1000_ETHERNET_DEVICE(0x1017), | |
68 | INTEL_E1000_ETHERNET_DEVICE(0x1018), | |
69 | INTEL_E1000_ETHERNET_DEVICE(0x1019), | |
2648345f | 70 | INTEL_E1000_ETHERNET_DEVICE(0x101A), |
1da177e4 LT |
71 | INTEL_E1000_ETHERNET_DEVICE(0x101D), |
72 | INTEL_E1000_ETHERNET_DEVICE(0x101E), | |
73 | INTEL_E1000_ETHERNET_DEVICE(0x1026), | |
74 | INTEL_E1000_ETHERNET_DEVICE(0x1027), | |
75 | INTEL_E1000_ETHERNET_DEVICE(0x1028), | |
ae2c3860 AK |
76 | INTEL_E1000_ETHERNET_DEVICE(0x1049), |
77 | INTEL_E1000_ETHERNET_DEVICE(0x104A), | |
78 | INTEL_E1000_ETHERNET_DEVICE(0x104B), | |
79 | INTEL_E1000_ETHERNET_DEVICE(0x104C), | |
80 | INTEL_E1000_ETHERNET_DEVICE(0x104D), | |
07b8fede MC |
81 | INTEL_E1000_ETHERNET_DEVICE(0x105E), |
82 | INTEL_E1000_ETHERNET_DEVICE(0x105F), | |
83 | INTEL_E1000_ETHERNET_DEVICE(0x1060), | |
1da177e4 LT |
84 | INTEL_E1000_ETHERNET_DEVICE(0x1075), |
85 | INTEL_E1000_ETHERNET_DEVICE(0x1076), | |
86 | INTEL_E1000_ETHERNET_DEVICE(0x1077), | |
87 | INTEL_E1000_ETHERNET_DEVICE(0x1078), | |
88 | INTEL_E1000_ETHERNET_DEVICE(0x1079), | |
89 | INTEL_E1000_ETHERNET_DEVICE(0x107A), | |
90 | INTEL_E1000_ETHERNET_DEVICE(0x107B), | |
91 | INTEL_E1000_ETHERNET_DEVICE(0x107C), | |
07b8fede MC |
92 | INTEL_E1000_ETHERNET_DEVICE(0x107D), |
93 | INTEL_E1000_ETHERNET_DEVICE(0x107E), | |
94 | INTEL_E1000_ETHERNET_DEVICE(0x107F), | |
1da177e4 | 95 | INTEL_E1000_ETHERNET_DEVICE(0x108A), |
2648345f MC |
96 | INTEL_E1000_ETHERNET_DEVICE(0x108B), |
97 | INTEL_E1000_ETHERNET_DEVICE(0x108C), | |
6418ecc6 JK |
98 | INTEL_E1000_ETHERNET_DEVICE(0x1096), |
99 | INTEL_E1000_ETHERNET_DEVICE(0x1098), | |
b7ee49db | 100 | INTEL_E1000_ETHERNET_DEVICE(0x1099), |
07b8fede | 101 | INTEL_E1000_ETHERNET_DEVICE(0x109A), |
b7ee49db | 102 | INTEL_E1000_ETHERNET_DEVICE(0x10B5), |
6418ecc6 | 103 | INTEL_E1000_ETHERNET_DEVICE(0x10B9), |
ae2c3860 AK |
104 | INTEL_E1000_ETHERNET_DEVICE(0x10BA), |
105 | INTEL_E1000_ETHERNET_DEVICE(0x10BB), | |
1da177e4 LT |
106 | /* required last entry */ |
107 | {0,} | |
108 | }; | |
109 | ||
110 | MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); | |
111 | ||
3ad2cc67 | 112 | static int e1000_setup_tx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 113 | struct e1000_tx_ring *txdr); |
3ad2cc67 | 114 | static int e1000_setup_rx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 115 | struct e1000_rx_ring *rxdr); |
3ad2cc67 | 116 | static void e1000_free_tx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 117 | struct e1000_tx_ring *tx_ring); |
3ad2cc67 | 118 | static void e1000_free_rx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 119 | struct e1000_rx_ring *rx_ring); |
1da177e4 LT |
120 | |
121 | /* Local Function Prototypes */ | |
122 | ||
123 | static int e1000_init_module(void); | |
124 | static void e1000_exit_module(void); | |
125 | static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent); | |
126 | static void __devexit e1000_remove(struct pci_dev *pdev); | |
581d708e | 127 | static int e1000_alloc_queues(struct e1000_adapter *adapter); |
1da177e4 LT |
128 | static int e1000_sw_init(struct e1000_adapter *adapter); |
129 | static int e1000_open(struct net_device *netdev); | |
130 | static int e1000_close(struct net_device *netdev); | |
131 | static void e1000_configure_tx(struct e1000_adapter *adapter); | |
132 | static void e1000_configure_rx(struct e1000_adapter *adapter); | |
133 | static void e1000_setup_rctl(struct e1000_adapter *adapter); | |
581d708e MC |
134 | static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter); |
135 | static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter); | |
136 | static void e1000_clean_tx_ring(struct e1000_adapter *adapter, | |
137 | struct e1000_tx_ring *tx_ring); | |
138 | static void e1000_clean_rx_ring(struct e1000_adapter *adapter, | |
139 | struct e1000_rx_ring *rx_ring); | |
1da177e4 LT |
140 | static void e1000_set_multi(struct net_device *netdev); |
141 | static void e1000_update_phy_info(unsigned long data); | |
142 | static void e1000_watchdog(unsigned long data); | |
1da177e4 LT |
143 | static void e1000_82547_tx_fifo_stall(unsigned long data); |
144 | static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev); | |
145 | static struct net_device_stats * e1000_get_stats(struct net_device *netdev); | |
146 | static int e1000_change_mtu(struct net_device *netdev, int new_mtu); | |
147 | static int e1000_set_mac(struct net_device *netdev, void *p); | |
148 | static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs); | |
581d708e MC |
149 | static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter, |
150 | struct e1000_tx_ring *tx_ring); | |
1da177e4 | 151 | #ifdef CONFIG_E1000_NAPI |
581d708e | 152 | static int e1000_clean(struct net_device *poll_dev, int *budget); |
1da177e4 | 153 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
581d708e | 154 | struct e1000_rx_ring *rx_ring, |
1da177e4 | 155 | int *work_done, int work_to_do); |
2d7edb92 | 156 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
581d708e | 157 | struct e1000_rx_ring *rx_ring, |
2d7edb92 | 158 | int *work_done, int work_to_do); |
1da177e4 | 159 | #else |
581d708e MC |
160 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
161 | struct e1000_rx_ring *rx_ring); | |
162 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | |
163 | struct e1000_rx_ring *rx_ring); | |
1da177e4 | 164 | #endif |
581d708e | 165 | static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
72d64a43 JK |
166 | struct e1000_rx_ring *rx_ring, |
167 | int cleaned_count); | |
581d708e | 168 | static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, |
72d64a43 JK |
169 | struct e1000_rx_ring *rx_ring, |
170 | int cleaned_count); | |
1da177e4 LT |
171 | static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); |
172 | static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, | |
173 | int cmd); | |
1da177e4 LT |
174 | static void e1000_enter_82542_rst(struct e1000_adapter *adapter); |
175 | static void e1000_leave_82542_rst(struct e1000_adapter *adapter); | |
176 | static void e1000_tx_timeout(struct net_device *dev); | |
87041639 | 177 | static void e1000_reset_task(struct net_device *dev); |
1da177e4 | 178 | static void e1000_smartspeed(struct e1000_adapter *adapter); |
e619d523 AK |
179 | static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, |
180 | struct sk_buff *skb); | |
1da177e4 LT |
181 | |
182 | static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp); | |
183 | static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid); | |
184 | static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); | |
185 | static void e1000_restore_vlan(struct e1000_adapter *adapter); | |
186 | ||
977e74b5 | 187 | static int e1000_suspend(struct pci_dev *pdev, pm_message_t state); |
6fdfef16 | 188 | #ifdef CONFIG_PM |
1da177e4 LT |
189 | static int e1000_resume(struct pci_dev *pdev); |
190 | #endif | |
c653e635 | 191 | static void e1000_shutdown(struct pci_dev *pdev); |
1da177e4 LT |
192 | |
193 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
194 | /* for netdump / net console */ | |
195 | static void e1000_netpoll (struct net_device *netdev); | |
196 | #endif | |
197 | ||
9026729b AK |
198 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, |
199 | pci_channel_state_t state); | |
200 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev); | |
201 | static void e1000_io_resume(struct pci_dev *pdev); | |
202 | ||
203 | static struct pci_error_handlers e1000_err_handler = { | |
204 | .error_detected = e1000_io_error_detected, | |
205 | .slot_reset = e1000_io_slot_reset, | |
206 | .resume = e1000_io_resume, | |
207 | }; | |
24025e4e | 208 | |
1da177e4 LT |
209 | static struct pci_driver e1000_driver = { |
210 | .name = e1000_driver_name, | |
211 | .id_table = e1000_pci_tbl, | |
212 | .probe = e1000_probe, | |
213 | .remove = __devexit_p(e1000_remove), | |
214 | /* Power Managment Hooks */ | |
1da177e4 | 215 | .suspend = e1000_suspend, |
6fdfef16 | 216 | #ifdef CONFIG_PM |
c653e635 | 217 | .resume = e1000_resume, |
1da177e4 | 218 | #endif |
9026729b AK |
219 | .shutdown = e1000_shutdown, |
220 | .err_handler = &e1000_err_handler | |
1da177e4 LT |
221 | }; |
222 | ||
223 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); | |
224 | MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); | |
225 | MODULE_LICENSE("GPL"); | |
226 | MODULE_VERSION(DRV_VERSION); | |
227 | ||
228 | static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE; | |
229 | module_param(debug, int, 0); | |
230 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | |
231 | ||
232 | /** | |
233 | * e1000_init_module - Driver Registration Routine | |
234 | * | |
235 | * e1000_init_module is the first routine called when the driver is | |
236 | * loaded. All it does is register with the PCI subsystem. | |
237 | **/ | |
238 | ||
239 | static int __init | |
240 | e1000_init_module(void) | |
241 | { | |
242 | int ret; | |
243 | printk(KERN_INFO "%s - version %s\n", | |
244 | e1000_driver_string, e1000_driver_version); | |
245 | ||
246 | printk(KERN_INFO "%s\n", e1000_copyright); | |
247 | ||
248 | ret = pci_module_init(&e1000_driver); | |
8b378def | 249 | |
1da177e4 LT |
250 | return ret; |
251 | } | |
252 | ||
253 | module_init(e1000_init_module); | |
254 | ||
255 | /** | |
256 | * e1000_exit_module - Driver Exit Cleanup Routine | |
257 | * | |
258 | * e1000_exit_module is called just before the driver is removed | |
259 | * from memory. | |
260 | **/ | |
261 | ||
262 | static void __exit | |
263 | e1000_exit_module(void) | |
264 | { | |
1da177e4 LT |
265 | pci_unregister_driver(&e1000_driver); |
266 | } | |
267 | ||
268 | module_exit(e1000_exit_module); | |
269 | ||
2db10a08 AK |
270 | static int e1000_request_irq(struct e1000_adapter *adapter) |
271 | { | |
272 | struct net_device *netdev = adapter->netdev; | |
273 | int flags, err = 0; | |
274 | ||
c0bc8721 | 275 | flags = IRQF_SHARED; |
2db10a08 AK |
276 | #ifdef CONFIG_PCI_MSI |
277 | if (adapter->hw.mac_type > e1000_82547_rev_2) { | |
278 | adapter->have_msi = TRUE; | |
279 | if ((err = pci_enable_msi(adapter->pdev))) { | |
280 | DPRINTK(PROBE, ERR, | |
281 | "Unable to allocate MSI interrupt Error: %d\n", err); | |
282 | adapter->have_msi = FALSE; | |
283 | } | |
284 | } | |
285 | if (adapter->have_msi) | |
61ef5c00 | 286 | flags &= ~IRQF_SHARED; |
2db10a08 AK |
287 | #endif |
288 | if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags, | |
289 | netdev->name, netdev))) | |
290 | DPRINTK(PROBE, ERR, | |
291 | "Unable to allocate interrupt Error: %d\n", err); | |
292 | ||
293 | return err; | |
294 | } | |
295 | ||
296 | static void e1000_free_irq(struct e1000_adapter *adapter) | |
297 | { | |
298 | struct net_device *netdev = adapter->netdev; | |
299 | ||
300 | free_irq(adapter->pdev->irq, netdev); | |
301 | ||
302 | #ifdef CONFIG_PCI_MSI | |
303 | if (adapter->have_msi) | |
304 | pci_disable_msi(adapter->pdev); | |
305 | #endif | |
306 | } | |
307 | ||
1da177e4 LT |
308 | /** |
309 | * e1000_irq_disable - Mask off interrupt generation on the NIC | |
310 | * @adapter: board private structure | |
311 | **/ | |
312 | ||
e619d523 | 313 | static void |
1da177e4 LT |
314 | e1000_irq_disable(struct e1000_adapter *adapter) |
315 | { | |
316 | atomic_inc(&adapter->irq_sem); | |
317 | E1000_WRITE_REG(&adapter->hw, IMC, ~0); | |
318 | E1000_WRITE_FLUSH(&adapter->hw); | |
319 | synchronize_irq(adapter->pdev->irq); | |
320 | } | |
321 | ||
322 | /** | |
323 | * e1000_irq_enable - Enable default interrupt generation settings | |
324 | * @adapter: board private structure | |
325 | **/ | |
326 | ||
e619d523 | 327 | static void |
1da177e4 LT |
328 | e1000_irq_enable(struct e1000_adapter *adapter) |
329 | { | |
96838a40 | 330 | if (likely(atomic_dec_and_test(&adapter->irq_sem))) { |
1da177e4 LT |
331 | E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK); |
332 | E1000_WRITE_FLUSH(&adapter->hw); | |
333 | } | |
334 | } | |
3ad2cc67 AB |
335 | |
336 | static void | |
2d7edb92 MC |
337 | e1000_update_mng_vlan(struct e1000_adapter *adapter) |
338 | { | |
339 | struct net_device *netdev = adapter->netdev; | |
340 | uint16_t vid = adapter->hw.mng_cookie.vlan_id; | |
341 | uint16_t old_vid = adapter->mng_vlan_id; | |
96838a40 JB |
342 | if (adapter->vlgrp) { |
343 | if (!adapter->vlgrp->vlan_devices[vid]) { | |
344 | if (adapter->hw.mng_cookie.status & | |
2d7edb92 MC |
345 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) { |
346 | e1000_vlan_rx_add_vid(netdev, vid); | |
347 | adapter->mng_vlan_id = vid; | |
348 | } else | |
349 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
96838a40 JB |
350 | |
351 | if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) && | |
352 | (vid != old_vid) && | |
2d7edb92 MC |
353 | !adapter->vlgrp->vlan_devices[old_vid]) |
354 | e1000_vlan_rx_kill_vid(netdev, old_vid); | |
c5f226fe JK |
355 | } else |
356 | adapter->mng_vlan_id = vid; | |
2d7edb92 MC |
357 | } |
358 | } | |
b55ccb35 JK |
359 | |
360 | /** | |
361 | * e1000_release_hw_control - release control of the h/w to f/w | |
362 | * @adapter: address of board private structure | |
363 | * | |
364 | * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit. | |
365 | * For ASF and Pass Through versions of f/w this means that the | |
366 | * driver is no longer loaded. For AMT version (only with 82573) i | |
367 | * of the f/w this means that the netowrk i/f is closed. | |
76c224bc | 368 | * |
b55ccb35 JK |
369 | **/ |
370 | ||
e619d523 | 371 | static void |
b55ccb35 JK |
372 | e1000_release_hw_control(struct e1000_adapter *adapter) |
373 | { | |
374 | uint32_t ctrl_ext; | |
375 | uint32_t swsm; | |
cd94dd0b | 376 | uint32_t extcnf; |
b55ccb35 JK |
377 | |
378 | /* Let firmware taken over control of h/w */ | |
379 | switch (adapter->hw.mac_type) { | |
380 | case e1000_82571: | |
381 | case e1000_82572: | |
4cc15f54 | 382 | case e1000_80003es2lan: |
b55ccb35 JK |
383 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
384 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
385 | ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); | |
386 | break; | |
387 | case e1000_82573: | |
388 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
389 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
390 | swsm & ~E1000_SWSM_DRV_LOAD); | |
cd94dd0b AK |
391 | case e1000_ich8lan: |
392 | extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
393 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
394 | extcnf & ~E1000_CTRL_EXT_DRV_LOAD); | |
395 | break; | |
b55ccb35 JK |
396 | default: |
397 | break; | |
398 | } | |
399 | } | |
400 | ||
401 | /** | |
402 | * e1000_get_hw_control - get control of the h/w from f/w | |
403 | * @adapter: address of board private structure | |
404 | * | |
405 | * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit. | |
76c224bc AK |
406 | * For ASF and Pass Through versions of f/w this means that |
407 | * the driver is loaded. For AMT version (only with 82573) | |
b55ccb35 | 408 | * of the f/w this means that the netowrk i/f is open. |
76c224bc | 409 | * |
b55ccb35 JK |
410 | **/ |
411 | ||
e619d523 | 412 | static void |
b55ccb35 JK |
413 | e1000_get_hw_control(struct e1000_adapter *adapter) |
414 | { | |
415 | uint32_t ctrl_ext; | |
416 | uint32_t swsm; | |
cd94dd0b | 417 | uint32_t extcnf; |
b55ccb35 JK |
418 | /* Let firmware know the driver has taken over */ |
419 | switch (adapter->hw.mac_type) { | |
420 | case e1000_82571: | |
421 | case e1000_82572: | |
4cc15f54 | 422 | case e1000_80003es2lan: |
b55ccb35 JK |
423 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
424 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
425 | ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); | |
426 | break; | |
427 | case e1000_82573: | |
428 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
429 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
430 | swsm | E1000_SWSM_DRV_LOAD); | |
431 | break; | |
cd94dd0b AK |
432 | case e1000_ich8lan: |
433 | extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL); | |
434 | E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL, | |
435 | extcnf | E1000_EXTCNF_CTRL_SWFLAG); | |
436 | break; | |
b55ccb35 JK |
437 | default: |
438 | break; | |
439 | } | |
440 | } | |
441 | ||
1da177e4 LT |
442 | int |
443 | e1000_up(struct e1000_adapter *adapter) | |
444 | { | |
445 | struct net_device *netdev = adapter->netdev; | |
2db10a08 | 446 | int i; |
1da177e4 LT |
447 | |
448 | /* hardware has been reset, we need to reload some things */ | |
449 | ||
1da177e4 LT |
450 | e1000_set_multi(netdev); |
451 | ||
452 | e1000_restore_vlan(adapter); | |
453 | ||
454 | e1000_configure_tx(adapter); | |
455 | e1000_setup_rctl(adapter); | |
456 | e1000_configure_rx(adapter); | |
72d64a43 JK |
457 | /* call E1000_DESC_UNUSED which always leaves |
458 | * at least 1 descriptor unused to make sure | |
459 | * next_to_use != next_to_clean */ | |
f56799ea | 460 | for (i = 0; i < adapter->num_rx_queues; i++) { |
72d64a43 | 461 | struct e1000_rx_ring *ring = &adapter->rx_ring[i]; |
a292ca6e JK |
462 | adapter->alloc_rx_buf(adapter, ring, |
463 | E1000_DESC_UNUSED(ring)); | |
f56799ea | 464 | } |
1da177e4 | 465 | |
7bfa4816 JK |
466 | adapter->tx_queue_len = netdev->tx_queue_len; |
467 | ||
1da177e4 | 468 | mod_timer(&adapter->watchdog_timer, jiffies); |
1da177e4 LT |
469 | |
470 | #ifdef CONFIG_E1000_NAPI | |
471 | netif_poll_enable(netdev); | |
472 | #endif | |
5de55624 MC |
473 | e1000_irq_enable(adapter); |
474 | ||
1da177e4 LT |
475 | return 0; |
476 | } | |
477 | ||
79f05bf0 AK |
478 | /** |
479 | * e1000_power_up_phy - restore link in case the phy was powered down | |
480 | * @adapter: address of board private structure | |
481 | * | |
482 | * The phy may be powered down to save power and turn off link when the | |
483 | * driver is unloaded and wake on lan is not enabled (among others) | |
484 | * *** this routine MUST be followed by a call to e1000_reset *** | |
485 | * | |
486 | **/ | |
487 | ||
488 | static void e1000_power_up_phy(struct e1000_adapter *adapter) | |
489 | { | |
490 | uint16_t mii_reg = 0; | |
491 | ||
492 | /* Just clear the power down bit to wake the phy back up */ | |
493 | if (adapter->hw.media_type == e1000_media_type_copper) { | |
494 | /* according to the manual, the phy will retain its | |
495 | * settings across a power-down/up cycle */ | |
496 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | |
497 | mii_reg &= ~MII_CR_POWER_DOWN; | |
498 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); | |
499 | } | |
500 | } | |
501 | ||
502 | static void e1000_power_down_phy(struct e1000_adapter *adapter) | |
503 | { | |
504 | boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) && | |
505 | e1000_check_mng_mode(&adapter->hw); | |
506 | /* Power down the PHY so no link is implied when interface is down | |
507 | * The PHY cannot be powered down if any of the following is TRUE | |
508 | * (a) WoL is enabled | |
509 | * (b) AMT is active | |
510 | * (c) SoL/IDER session is active */ | |
511 | if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 && | |
cd94dd0b | 512 | adapter->hw.mac_type != e1000_ich8lan && |
79f05bf0 AK |
513 | adapter->hw.media_type == e1000_media_type_copper && |
514 | !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) && | |
515 | !mng_mode_enabled && | |
516 | !e1000_check_phy_reset_block(&adapter->hw)) { | |
517 | uint16_t mii_reg = 0; | |
518 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | |
519 | mii_reg |= MII_CR_POWER_DOWN; | |
520 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); | |
521 | mdelay(1); | |
522 | } | |
523 | } | |
524 | ||
1da177e4 LT |
525 | void |
526 | e1000_down(struct e1000_adapter *adapter) | |
527 | { | |
528 | struct net_device *netdev = adapter->netdev; | |
529 | ||
530 | e1000_irq_disable(adapter); | |
c1605eb3 | 531 | |
1da177e4 LT |
532 | del_timer_sync(&adapter->tx_fifo_stall_timer); |
533 | del_timer_sync(&adapter->watchdog_timer); | |
534 | del_timer_sync(&adapter->phy_info_timer); | |
535 | ||
536 | #ifdef CONFIG_E1000_NAPI | |
537 | netif_poll_disable(netdev); | |
538 | #endif | |
7bfa4816 | 539 | netdev->tx_queue_len = adapter->tx_queue_len; |
1da177e4 LT |
540 | adapter->link_speed = 0; |
541 | adapter->link_duplex = 0; | |
542 | netif_carrier_off(netdev); | |
543 | netif_stop_queue(netdev); | |
544 | ||
545 | e1000_reset(adapter); | |
581d708e MC |
546 | e1000_clean_all_tx_rings(adapter); |
547 | e1000_clean_all_rx_rings(adapter); | |
1da177e4 | 548 | } |
1da177e4 | 549 | |
2db10a08 AK |
550 | void |
551 | e1000_reinit_locked(struct e1000_adapter *adapter) | |
552 | { | |
553 | WARN_ON(in_interrupt()); | |
554 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) | |
555 | msleep(1); | |
556 | e1000_down(adapter); | |
557 | e1000_up(adapter); | |
558 | clear_bit(__E1000_RESETTING, &adapter->flags); | |
1da177e4 LT |
559 | } |
560 | ||
561 | void | |
562 | e1000_reset(struct e1000_adapter *adapter) | |
563 | { | |
2d7edb92 | 564 | uint32_t pba, manc; |
1125ecbc | 565 | uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF; |
1da177e4 LT |
566 | |
567 | /* Repartition Pba for greater than 9k mtu | |
568 | * To take effect CTRL.RST is required. | |
569 | */ | |
570 | ||
2d7edb92 MC |
571 | switch (adapter->hw.mac_type) { |
572 | case e1000_82547: | |
0e6ef3e0 | 573 | case e1000_82547_rev_2: |
2d7edb92 MC |
574 | pba = E1000_PBA_30K; |
575 | break; | |
868d5309 MC |
576 | case e1000_82571: |
577 | case e1000_82572: | |
6418ecc6 | 578 | case e1000_80003es2lan: |
868d5309 MC |
579 | pba = E1000_PBA_38K; |
580 | break; | |
2d7edb92 MC |
581 | case e1000_82573: |
582 | pba = E1000_PBA_12K; | |
583 | break; | |
cd94dd0b AK |
584 | case e1000_ich8lan: |
585 | pba = E1000_PBA_8K; | |
586 | break; | |
2d7edb92 MC |
587 | default: |
588 | pba = E1000_PBA_48K; | |
589 | break; | |
590 | } | |
591 | ||
96838a40 | 592 | if ((adapter->hw.mac_type != e1000_82573) && |
f11b7f85 | 593 | (adapter->netdev->mtu > E1000_RXBUFFER_8192)) |
1125ecbc | 594 | pba -= 8; /* allocate more FIFO for Tx */ |
2d7edb92 MC |
595 | |
596 | ||
96838a40 | 597 | if (adapter->hw.mac_type == e1000_82547) { |
1da177e4 LT |
598 | adapter->tx_fifo_head = 0; |
599 | adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT; | |
600 | adapter->tx_fifo_size = | |
601 | (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT; | |
602 | atomic_set(&adapter->tx_fifo_stall, 0); | |
603 | } | |
2d7edb92 | 604 | |
1da177e4 LT |
605 | E1000_WRITE_REG(&adapter->hw, PBA, pba); |
606 | ||
607 | /* flow control settings */ | |
f11b7f85 JK |
608 | /* Set the FC high water mark to 90% of the FIFO size. |
609 | * Required to clear last 3 LSB */ | |
610 | fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8; | |
cd94dd0b AK |
611 | /* We can't use 90% on small FIFOs because the remainder |
612 | * would be less than 1 full frame. In this case, we size | |
613 | * it to allow at least a full frame above the high water | |
614 | * mark. */ | |
615 | if (pba < E1000_PBA_16K) | |
616 | fc_high_water_mark = (pba * 1024) - 1600; | |
f11b7f85 JK |
617 | |
618 | adapter->hw.fc_high_water = fc_high_water_mark; | |
619 | adapter->hw.fc_low_water = fc_high_water_mark - 8; | |
87041639 JK |
620 | if (adapter->hw.mac_type == e1000_80003es2lan) |
621 | adapter->hw.fc_pause_time = 0xFFFF; | |
622 | else | |
623 | adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME; | |
1da177e4 LT |
624 | adapter->hw.fc_send_xon = 1; |
625 | adapter->hw.fc = adapter->hw.original_fc; | |
626 | ||
2d7edb92 | 627 | /* Allow time for pending master requests to run */ |
1da177e4 | 628 | e1000_reset_hw(&adapter->hw); |
96838a40 | 629 | if (adapter->hw.mac_type >= e1000_82544) |
1da177e4 | 630 | E1000_WRITE_REG(&adapter->hw, WUC, 0); |
96838a40 | 631 | if (e1000_init_hw(&adapter->hw)) |
1da177e4 | 632 | DPRINTK(PROBE, ERR, "Hardware Error\n"); |
2d7edb92 | 633 | e1000_update_mng_vlan(adapter); |
1da177e4 LT |
634 | /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ |
635 | E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE); | |
636 | ||
637 | e1000_reset_adaptive(&adapter->hw); | |
638 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
9a53a202 AK |
639 | |
640 | if (!adapter->smart_power_down && | |
641 | (adapter->hw.mac_type == e1000_82571 || | |
642 | adapter->hw.mac_type == e1000_82572)) { | |
643 | uint16_t phy_data = 0; | |
644 | /* speed up time to link by disabling smart power down, ignore | |
645 | * the return value of this function because there is nothing | |
646 | * different we would do if it failed */ | |
647 | e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT, | |
648 | &phy_data); | |
649 | phy_data &= ~IGP02E1000_PM_SPD; | |
650 | e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT, | |
651 | phy_data); | |
652 | } | |
653 | ||
cd94dd0b AK |
654 | if (adapter->hw.mac_type < e1000_ich8lan) |
655 | /* FIXME: this code is duplicate and wrong for PCI Express */ | |
2d7edb92 MC |
656 | if (adapter->en_mng_pt) { |
657 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
658 | manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST); | |
659 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
660 | } | |
1da177e4 LT |
661 | } |
662 | ||
663 | /** | |
664 | * e1000_probe - Device Initialization Routine | |
665 | * @pdev: PCI device information struct | |
666 | * @ent: entry in e1000_pci_tbl | |
667 | * | |
668 | * Returns 0 on success, negative on failure | |
669 | * | |
670 | * e1000_probe initializes an adapter identified by a pci_dev structure. | |
671 | * The OS initialization, configuring of the adapter private structure, | |
672 | * and a hardware reset occur. | |
673 | **/ | |
674 | ||
675 | static int __devinit | |
676 | e1000_probe(struct pci_dev *pdev, | |
677 | const struct pci_device_id *ent) | |
678 | { | |
679 | struct net_device *netdev; | |
680 | struct e1000_adapter *adapter; | |
2d7edb92 | 681 | unsigned long mmio_start, mmio_len; |
cd94dd0b | 682 | unsigned long flash_start, flash_len; |
2d7edb92 | 683 | |
1da177e4 | 684 | static int cards_found = 0; |
84916829 | 685 | static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */ |
2d7edb92 | 686 | int i, err, pci_using_dac; |
1da177e4 LT |
687 | uint16_t eeprom_data; |
688 | uint16_t eeprom_apme_mask = E1000_EEPROM_APME; | |
96838a40 | 689 | if ((err = pci_enable_device(pdev))) |
1da177e4 LT |
690 | return err; |
691 | ||
cd94dd0b AK |
692 | if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) && |
693 | !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) { | |
1da177e4 LT |
694 | pci_using_dac = 1; |
695 | } else { | |
cd94dd0b AK |
696 | if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) && |
697 | (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) { | |
1da177e4 LT |
698 | E1000_ERR("No usable DMA configuration, aborting\n"); |
699 | return err; | |
700 | } | |
701 | pci_using_dac = 0; | |
702 | } | |
703 | ||
96838a40 | 704 | if ((err = pci_request_regions(pdev, e1000_driver_name))) |
1da177e4 LT |
705 | return err; |
706 | ||
707 | pci_set_master(pdev); | |
708 | ||
709 | netdev = alloc_etherdev(sizeof(struct e1000_adapter)); | |
96838a40 | 710 | if (!netdev) { |
1da177e4 LT |
711 | err = -ENOMEM; |
712 | goto err_alloc_etherdev; | |
713 | } | |
714 | ||
715 | SET_MODULE_OWNER(netdev); | |
716 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
717 | ||
718 | pci_set_drvdata(pdev, netdev); | |
60490fe0 | 719 | adapter = netdev_priv(netdev); |
1da177e4 LT |
720 | adapter->netdev = netdev; |
721 | adapter->pdev = pdev; | |
722 | adapter->hw.back = adapter; | |
723 | adapter->msg_enable = (1 << debug) - 1; | |
724 | ||
725 | mmio_start = pci_resource_start(pdev, BAR_0); | |
726 | mmio_len = pci_resource_len(pdev, BAR_0); | |
727 | ||
728 | adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); | |
96838a40 | 729 | if (!adapter->hw.hw_addr) { |
1da177e4 LT |
730 | err = -EIO; |
731 | goto err_ioremap; | |
732 | } | |
733 | ||
96838a40 JB |
734 | for (i = BAR_1; i <= BAR_5; i++) { |
735 | if (pci_resource_len(pdev, i) == 0) | |
1da177e4 | 736 | continue; |
96838a40 | 737 | if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { |
1da177e4 LT |
738 | adapter->hw.io_base = pci_resource_start(pdev, i); |
739 | break; | |
740 | } | |
741 | } | |
742 | ||
743 | netdev->open = &e1000_open; | |
744 | netdev->stop = &e1000_close; | |
745 | netdev->hard_start_xmit = &e1000_xmit_frame; | |
746 | netdev->get_stats = &e1000_get_stats; | |
747 | netdev->set_multicast_list = &e1000_set_multi; | |
748 | netdev->set_mac_address = &e1000_set_mac; | |
749 | netdev->change_mtu = &e1000_change_mtu; | |
750 | netdev->do_ioctl = &e1000_ioctl; | |
751 | e1000_set_ethtool_ops(netdev); | |
752 | netdev->tx_timeout = &e1000_tx_timeout; | |
753 | netdev->watchdog_timeo = 5 * HZ; | |
754 | #ifdef CONFIG_E1000_NAPI | |
755 | netdev->poll = &e1000_clean; | |
756 | netdev->weight = 64; | |
757 | #endif | |
758 | netdev->vlan_rx_register = e1000_vlan_rx_register; | |
759 | netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid; | |
760 | netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid; | |
761 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
762 | netdev->poll_controller = e1000_netpoll; | |
763 | #endif | |
764 | strcpy(netdev->name, pci_name(pdev)); | |
765 | ||
766 | netdev->mem_start = mmio_start; | |
767 | netdev->mem_end = mmio_start + mmio_len; | |
768 | netdev->base_addr = adapter->hw.io_base; | |
769 | ||
770 | adapter->bd_number = cards_found; | |
771 | ||
772 | /* setup the private structure */ | |
773 | ||
96838a40 | 774 | if ((err = e1000_sw_init(adapter))) |
1da177e4 LT |
775 | goto err_sw_init; |
776 | ||
cd94dd0b AK |
777 | /* Flash BAR mapping must happen after e1000_sw_init |
778 | * because it depends on mac_type */ | |
779 | if ((adapter->hw.mac_type == e1000_ich8lan) && | |
780 | (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { | |
781 | flash_start = pci_resource_start(pdev, 1); | |
782 | flash_len = pci_resource_len(pdev, 1); | |
783 | adapter->hw.flash_address = ioremap(flash_start, flash_len); | |
784 | if (!adapter->hw.flash_address) { | |
785 | err = -EIO; | |
786 | goto err_flashmap; | |
787 | } | |
788 | } | |
789 | ||
96838a40 | 790 | if ((err = e1000_check_phy_reset_block(&adapter->hw))) |
2d7edb92 MC |
791 | DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n"); |
792 | ||
84916829 | 793 | /* if ksp3, indicate if it's port a being setup */ |
76c224bc AK |
794 | if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 && |
795 | e1000_ksp3_port_a == 0) | |
84916829 JK |
796 | adapter->ksp3_port_a = 1; |
797 | e1000_ksp3_port_a++; | |
798 | /* Reset for multiple KP3 adapters */ | |
799 | if (e1000_ksp3_port_a == 4) | |
800 | e1000_ksp3_port_a = 0; | |
801 | ||
96838a40 | 802 | if (adapter->hw.mac_type >= e1000_82543) { |
1da177e4 LT |
803 | netdev->features = NETIF_F_SG | |
804 | NETIF_F_HW_CSUM | | |
805 | NETIF_F_HW_VLAN_TX | | |
806 | NETIF_F_HW_VLAN_RX | | |
807 | NETIF_F_HW_VLAN_FILTER; | |
cd94dd0b AK |
808 | if (adapter->hw.mac_type == e1000_ich8lan) |
809 | netdev->features &= ~NETIF_F_HW_VLAN_FILTER; | |
1da177e4 LT |
810 | } |
811 | ||
812 | #ifdef NETIF_F_TSO | |
96838a40 | 813 | if ((adapter->hw.mac_type >= e1000_82544) && |
1da177e4 LT |
814 | (adapter->hw.mac_type != e1000_82547)) |
815 | netdev->features |= NETIF_F_TSO; | |
2d7edb92 MC |
816 | |
817 | #ifdef NETIF_F_TSO_IPV6 | |
96838a40 | 818 | if (adapter->hw.mac_type > e1000_82547_rev_2) |
2d7edb92 MC |
819 | netdev->features |= NETIF_F_TSO_IPV6; |
820 | #endif | |
1da177e4 | 821 | #endif |
96838a40 | 822 | if (pci_using_dac) |
1da177e4 LT |
823 | netdev->features |= NETIF_F_HIGHDMA; |
824 | ||
76c224bc AK |
825 | netdev->features |= NETIF_F_LLTX; |
826 | ||
2d7edb92 MC |
827 | adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw); |
828 | ||
cd94dd0b AK |
829 | /* initialize eeprom parameters */ |
830 | ||
831 | if (e1000_init_eeprom_params(&adapter->hw)) { | |
832 | E1000_ERR("EEPROM initialization failed\n"); | |
833 | return -EIO; | |
834 | } | |
835 | ||
96838a40 | 836 | /* before reading the EEPROM, reset the controller to |
1da177e4 | 837 | * put the device in a known good starting state */ |
96838a40 | 838 | |
1da177e4 LT |
839 | e1000_reset_hw(&adapter->hw); |
840 | ||
841 | /* make sure the EEPROM is good */ | |
842 | ||
96838a40 | 843 | if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) { |
1da177e4 LT |
844 | DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n"); |
845 | err = -EIO; | |
846 | goto err_eeprom; | |
847 | } | |
848 | ||
849 | /* copy the MAC address out of the EEPROM */ | |
850 | ||
96838a40 | 851 | if (e1000_read_mac_addr(&adapter->hw)) |
1da177e4 LT |
852 | DPRINTK(PROBE, ERR, "EEPROM Read Error\n"); |
853 | memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); | |
9beb0ac1 | 854 | memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); |
1da177e4 | 855 | |
96838a40 | 856 | if (!is_valid_ether_addr(netdev->perm_addr)) { |
1da177e4 LT |
857 | DPRINTK(PROBE, ERR, "Invalid MAC Address\n"); |
858 | err = -EIO; | |
859 | goto err_eeprom; | |
860 | } | |
861 | ||
862 | e1000_read_part_num(&adapter->hw, &(adapter->part_num)); | |
863 | ||
864 | e1000_get_bus_info(&adapter->hw); | |
865 | ||
866 | init_timer(&adapter->tx_fifo_stall_timer); | |
867 | adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall; | |
868 | adapter->tx_fifo_stall_timer.data = (unsigned long) adapter; | |
869 | ||
870 | init_timer(&adapter->watchdog_timer); | |
871 | adapter->watchdog_timer.function = &e1000_watchdog; | |
872 | adapter->watchdog_timer.data = (unsigned long) adapter; | |
873 | ||
1da177e4 LT |
874 | init_timer(&adapter->phy_info_timer); |
875 | adapter->phy_info_timer.function = &e1000_update_phy_info; | |
876 | adapter->phy_info_timer.data = (unsigned long) adapter; | |
877 | ||
87041639 JK |
878 | INIT_WORK(&adapter->reset_task, |
879 | (void (*)(void *))e1000_reset_task, netdev); | |
1da177e4 LT |
880 | |
881 | /* we're going to reset, so assume we have no link for now */ | |
882 | ||
883 | netif_carrier_off(netdev); | |
884 | netif_stop_queue(netdev); | |
885 | ||
886 | e1000_check_options(adapter); | |
887 | ||
888 | /* Initial Wake on LAN setting | |
889 | * If APM wake is enabled in the EEPROM, | |
890 | * enable the ACPI Magic Packet filter | |
891 | */ | |
892 | ||
96838a40 | 893 | switch (adapter->hw.mac_type) { |
1da177e4 LT |
894 | case e1000_82542_rev2_0: |
895 | case e1000_82542_rev2_1: | |
896 | case e1000_82543: | |
897 | break; | |
898 | case e1000_82544: | |
899 | e1000_read_eeprom(&adapter->hw, | |
900 | EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data); | |
901 | eeprom_apme_mask = E1000_EEPROM_82544_APM; | |
902 | break; | |
cd94dd0b AK |
903 | case e1000_ich8lan: |
904 | e1000_read_eeprom(&adapter->hw, | |
905 | EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data); | |
906 | eeprom_apme_mask = E1000_EEPROM_ICH8_APME; | |
907 | break; | |
1da177e4 LT |
908 | case e1000_82546: |
909 | case e1000_82546_rev_3: | |
fd803241 | 910 | case e1000_82571: |
6418ecc6 | 911 | case e1000_80003es2lan: |
96838a40 | 912 | if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){ |
1da177e4 LT |
913 | e1000_read_eeprom(&adapter->hw, |
914 | EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); | |
915 | break; | |
916 | } | |
917 | /* Fall Through */ | |
918 | default: | |
919 | e1000_read_eeprom(&adapter->hw, | |
920 | EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); | |
921 | break; | |
922 | } | |
96838a40 | 923 | if (eeprom_data & eeprom_apme_mask) |
1da177e4 LT |
924 | adapter->wol |= E1000_WUFC_MAG; |
925 | ||
fb3d47d4 JK |
926 | /* print bus type/speed/width info */ |
927 | { | |
928 | struct e1000_hw *hw = &adapter->hw; | |
929 | DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ", | |
930 | ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : | |
931 | (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")), | |
932 | ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" : | |
933 | (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" : | |
934 | (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" : | |
935 | (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" : | |
936 | (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"), | |
937 | ((hw->bus_width == e1000_bus_width_64) ? "64-bit" : | |
938 | (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" : | |
939 | (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" : | |
940 | "32-bit")); | |
941 | } | |
942 | ||
943 | for (i = 0; i < 6; i++) | |
944 | printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':'); | |
945 | ||
1da177e4 LT |
946 | /* reset the hardware with the new settings */ |
947 | e1000_reset(adapter); | |
948 | ||
b55ccb35 JK |
949 | /* If the controller is 82573 and f/w is AMT, do not set |
950 | * DRV_LOAD until the interface is up. For all other cases, | |
951 | * let the f/w know that the h/w is now under the control | |
952 | * of the driver. */ | |
953 | if (adapter->hw.mac_type != e1000_82573 || | |
954 | !e1000_check_mng_mode(&adapter->hw)) | |
955 | e1000_get_hw_control(adapter); | |
2d7edb92 | 956 | |
1da177e4 | 957 | strcpy(netdev->name, "eth%d"); |
96838a40 | 958 | if ((err = register_netdev(netdev))) |
1da177e4 LT |
959 | goto err_register; |
960 | ||
961 | DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n"); | |
962 | ||
963 | cards_found++; | |
964 | return 0; | |
965 | ||
966 | err_register: | |
cd94dd0b AK |
967 | if (adapter->hw.flash_address) |
968 | iounmap(adapter->hw.flash_address); | |
969 | err_flashmap: | |
1da177e4 LT |
970 | err_sw_init: |
971 | err_eeprom: | |
972 | iounmap(adapter->hw.hw_addr); | |
973 | err_ioremap: | |
974 | free_netdev(netdev); | |
975 | err_alloc_etherdev: | |
976 | pci_release_regions(pdev); | |
977 | return err; | |
978 | } | |
979 | ||
980 | /** | |
981 | * e1000_remove - Device Removal Routine | |
982 | * @pdev: PCI device information struct | |
983 | * | |
984 | * e1000_remove is called by the PCI subsystem to alert the driver | |
985 | * that it should release a PCI device. The could be caused by a | |
986 | * Hot-Plug event, or because the driver is going to be removed from | |
987 | * memory. | |
988 | **/ | |
989 | ||
990 | static void __devexit | |
991 | e1000_remove(struct pci_dev *pdev) | |
992 | { | |
993 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 994 | struct e1000_adapter *adapter = netdev_priv(netdev); |
b55ccb35 | 995 | uint32_t manc; |
581d708e MC |
996 | #ifdef CONFIG_E1000_NAPI |
997 | int i; | |
998 | #endif | |
1da177e4 | 999 | |
be2b28ed JG |
1000 | flush_scheduled_work(); |
1001 | ||
96838a40 | 1002 | if (adapter->hw.mac_type >= e1000_82540 && |
cd94dd0b | 1003 | adapter->hw.mac_type != e1000_ich8lan && |
1da177e4 LT |
1004 | adapter->hw.media_type == e1000_media_type_copper) { |
1005 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
96838a40 | 1006 | if (manc & E1000_MANC_SMBUS_EN) { |
1da177e4 LT |
1007 | manc |= E1000_MANC_ARP_EN; |
1008 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
1009 | } | |
1010 | } | |
1011 | ||
b55ccb35 JK |
1012 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
1013 | * would have already happened in close and is redundant. */ | |
1014 | e1000_release_hw_control(adapter); | |
2d7edb92 | 1015 | |
1da177e4 | 1016 | unregister_netdev(netdev); |
581d708e | 1017 | #ifdef CONFIG_E1000_NAPI |
f56799ea | 1018 | for (i = 0; i < adapter->num_rx_queues; i++) |
15333061 | 1019 | dev_put(&adapter->polling_netdev[i]); |
581d708e | 1020 | #endif |
1da177e4 | 1021 | |
96838a40 | 1022 | if (!e1000_check_phy_reset_block(&adapter->hw)) |
2d7edb92 | 1023 | e1000_phy_hw_reset(&adapter->hw); |
1da177e4 | 1024 | |
24025e4e MC |
1025 | kfree(adapter->tx_ring); |
1026 | kfree(adapter->rx_ring); | |
1027 | #ifdef CONFIG_E1000_NAPI | |
1028 | kfree(adapter->polling_netdev); | |
1029 | #endif | |
1030 | ||
1da177e4 | 1031 | iounmap(adapter->hw.hw_addr); |
cd94dd0b AK |
1032 | if (adapter->hw.flash_address) |
1033 | iounmap(adapter->hw.flash_address); | |
1da177e4 LT |
1034 | pci_release_regions(pdev); |
1035 | ||
1036 | free_netdev(netdev); | |
1037 | ||
1038 | pci_disable_device(pdev); | |
1039 | } | |
1040 | ||
1041 | /** | |
1042 | * e1000_sw_init - Initialize general software structures (struct e1000_adapter) | |
1043 | * @adapter: board private structure to initialize | |
1044 | * | |
1045 | * e1000_sw_init initializes the Adapter private data structure. | |
1046 | * Fields are initialized based on PCI device information and | |
1047 | * OS network device settings (MTU size). | |
1048 | **/ | |
1049 | ||
1050 | static int __devinit | |
1051 | e1000_sw_init(struct e1000_adapter *adapter) | |
1052 | { | |
1053 | struct e1000_hw *hw = &adapter->hw; | |
1054 | struct net_device *netdev = adapter->netdev; | |
1055 | struct pci_dev *pdev = adapter->pdev; | |
581d708e MC |
1056 | #ifdef CONFIG_E1000_NAPI |
1057 | int i; | |
1058 | #endif | |
1da177e4 LT |
1059 | |
1060 | /* PCI config space info */ | |
1061 | ||
1062 | hw->vendor_id = pdev->vendor; | |
1063 | hw->device_id = pdev->device; | |
1064 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
1065 | hw->subsystem_id = pdev->subsystem_device; | |
1066 | ||
1067 | pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); | |
1068 | ||
1069 | pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); | |
1070 | ||
eb0f8054 | 1071 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; |
9e2feace | 1072 | adapter->rx_ps_bsize0 = E1000_RXBUFFER_128; |
1da177e4 LT |
1073 | hw->max_frame_size = netdev->mtu + |
1074 | ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; | |
1075 | hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE; | |
1076 | ||
1077 | /* identify the MAC */ | |
1078 | ||
96838a40 | 1079 | if (e1000_set_mac_type(hw)) { |
1da177e4 LT |
1080 | DPRINTK(PROBE, ERR, "Unknown MAC Type\n"); |
1081 | return -EIO; | |
1082 | } | |
1083 | ||
96838a40 | 1084 | switch (hw->mac_type) { |
1da177e4 LT |
1085 | default: |
1086 | break; | |
1087 | case e1000_82541: | |
1088 | case e1000_82547: | |
1089 | case e1000_82541_rev_2: | |
1090 | case e1000_82547_rev_2: | |
1091 | hw->phy_init_script = 1; | |
1092 | break; | |
1093 | } | |
1094 | ||
1095 | e1000_set_media_type(hw); | |
1096 | ||
1097 | hw->wait_autoneg_complete = FALSE; | |
1098 | hw->tbi_compatibility_en = TRUE; | |
1099 | hw->adaptive_ifs = TRUE; | |
1100 | ||
1101 | /* Copper options */ | |
1102 | ||
96838a40 | 1103 | if (hw->media_type == e1000_media_type_copper) { |
1da177e4 LT |
1104 | hw->mdix = AUTO_ALL_MODES; |
1105 | hw->disable_polarity_correction = FALSE; | |
1106 | hw->master_slave = E1000_MASTER_SLAVE; | |
1107 | } | |
1108 | ||
f56799ea JK |
1109 | adapter->num_tx_queues = 1; |
1110 | adapter->num_rx_queues = 1; | |
581d708e MC |
1111 | |
1112 | if (e1000_alloc_queues(adapter)) { | |
1113 | DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n"); | |
1114 | return -ENOMEM; | |
1115 | } | |
1116 | ||
1117 | #ifdef CONFIG_E1000_NAPI | |
f56799ea | 1118 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
1119 | adapter->polling_netdev[i].priv = adapter; |
1120 | adapter->polling_netdev[i].poll = &e1000_clean; | |
1121 | adapter->polling_netdev[i].weight = 64; | |
1122 | dev_hold(&adapter->polling_netdev[i]); | |
1123 | set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state); | |
1124 | } | |
7bfa4816 | 1125 | spin_lock_init(&adapter->tx_queue_lock); |
24025e4e MC |
1126 | #endif |
1127 | ||
1da177e4 LT |
1128 | atomic_set(&adapter->irq_sem, 1); |
1129 | spin_lock_init(&adapter->stats_lock); | |
1da177e4 LT |
1130 | |
1131 | return 0; | |
1132 | } | |
1133 | ||
581d708e MC |
1134 | /** |
1135 | * e1000_alloc_queues - Allocate memory for all rings | |
1136 | * @adapter: board private structure to initialize | |
1137 | * | |
1138 | * We allocate one ring per queue at run-time since we don't know the | |
1139 | * number of queues at compile-time. The polling_netdev array is | |
1140 | * intended for Multiqueue, but should work fine with a single queue. | |
1141 | **/ | |
1142 | ||
1143 | static int __devinit | |
1144 | e1000_alloc_queues(struct e1000_adapter *adapter) | |
1145 | { | |
1146 | int size; | |
1147 | ||
f56799ea | 1148 | size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues; |
581d708e MC |
1149 | adapter->tx_ring = kmalloc(size, GFP_KERNEL); |
1150 | if (!adapter->tx_ring) | |
1151 | return -ENOMEM; | |
1152 | memset(adapter->tx_ring, 0, size); | |
1153 | ||
f56799ea | 1154 | size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues; |
581d708e MC |
1155 | adapter->rx_ring = kmalloc(size, GFP_KERNEL); |
1156 | if (!adapter->rx_ring) { | |
1157 | kfree(adapter->tx_ring); | |
1158 | return -ENOMEM; | |
1159 | } | |
1160 | memset(adapter->rx_ring, 0, size); | |
1161 | ||
1162 | #ifdef CONFIG_E1000_NAPI | |
f56799ea | 1163 | size = sizeof(struct net_device) * adapter->num_rx_queues; |
581d708e MC |
1164 | adapter->polling_netdev = kmalloc(size, GFP_KERNEL); |
1165 | if (!adapter->polling_netdev) { | |
1166 | kfree(adapter->tx_ring); | |
1167 | kfree(adapter->rx_ring); | |
1168 | return -ENOMEM; | |
1169 | } | |
1170 | memset(adapter->polling_netdev, 0, size); | |
1171 | #endif | |
1172 | ||
1173 | return E1000_SUCCESS; | |
1174 | } | |
1175 | ||
1da177e4 LT |
1176 | /** |
1177 | * e1000_open - Called when a network interface is made active | |
1178 | * @netdev: network interface device structure | |
1179 | * | |
1180 | * Returns 0 on success, negative value on failure | |
1181 | * | |
1182 | * The open entry point is called when a network interface is made | |
1183 | * active by the system (IFF_UP). At this point all resources needed | |
1184 | * for transmit and receive operations are allocated, the interrupt | |
1185 | * handler is registered with the OS, the watchdog timer is started, | |
1186 | * and the stack is notified that the interface is ready. | |
1187 | **/ | |
1188 | ||
1189 | static int | |
1190 | e1000_open(struct net_device *netdev) | |
1191 | { | |
60490fe0 | 1192 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1193 | int err; |
1194 | ||
2db10a08 AK |
1195 | /* disallow open during test */ |
1196 | if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags)) | |
1197 | return -EBUSY; | |
1198 | ||
1da177e4 LT |
1199 | /* allocate transmit descriptors */ |
1200 | ||
581d708e | 1201 | if ((err = e1000_setup_all_tx_resources(adapter))) |
1da177e4 LT |
1202 | goto err_setup_tx; |
1203 | ||
1204 | /* allocate receive descriptors */ | |
1205 | ||
581d708e | 1206 | if ((err = e1000_setup_all_rx_resources(adapter))) |
1da177e4 LT |
1207 | goto err_setup_rx; |
1208 | ||
2db10a08 AK |
1209 | err = e1000_request_irq(adapter); |
1210 | if (err) | |
1211 | goto err_up; | |
1212 | ||
79f05bf0 AK |
1213 | e1000_power_up_phy(adapter); |
1214 | ||
96838a40 | 1215 | if ((err = e1000_up(adapter))) |
1da177e4 | 1216 | goto err_up; |
2d7edb92 | 1217 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; |
96838a40 | 1218 | if ((adapter->hw.mng_cookie.status & |
2d7edb92 MC |
1219 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { |
1220 | e1000_update_mng_vlan(adapter); | |
1221 | } | |
1da177e4 | 1222 | |
b55ccb35 JK |
1223 | /* If AMT is enabled, let the firmware know that the network |
1224 | * interface is now open */ | |
1225 | if (adapter->hw.mac_type == e1000_82573 && | |
1226 | e1000_check_mng_mode(&adapter->hw)) | |
1227 | e1000_get_hw_control(adapter); | |
1228 | ||
1da177e4 LT |
1229 | return E1000_SUCCESS; |
1230 | ||
1231 | err_up: | |
581d708e | 1232 | e1000_free_all_rx_resources(adapter); |
1da177e4 | 1233 | err_setup_rx: |
581d708e | 1234 | e1000_free_all_tx_resources(adapter); |
1da177e4 LT |
1235 | err_setup_tx: |
1236 | e1000_reset(adapter); | |
1237 | ||
1238 | return err; | |
1239 | } | |
1240 | ||
1241 | /** | |
1242 | * e1000_close - Disables a network interface | |
1243 | * @netdev: network interface device structure | |
1244 | * | |
1245 | * Returns 0, this is not allowed to fail | |
1246 | * | |
1247 | * The close entry point is called when an interface is de-activated | |
1248 | * by the OS. The hardware is still under the drivers control, but | |
1249 | * needs to be disabled. A global MAC reset is issued to stop the | |
1250 | * hardware, and all transmit and receive resources are freed. | |
1251 | **/ | |
1252 | ||
1253 | static int | |
1254 | e1000_close(struct net_device *netdev) | |
1255 | { | |
60490fe0 | 1256 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 1257 | |
2db10a08 | 1258 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); |
1da177e4 | 1259 | e1000_down(adapter); |
79f05bf0 | 1260 | e1000_power_down_phy(adapter); |
2db10a08 | 1261 | e1000_free_irq(adapter); |
1da177e4 | 1262 | |
581d708e MC |
1263 | e1000_free_all_tx_resources(adapter); |
1264 | e1000_free_all_rx_resources(adapter); | |
1da177e4 | 1265 | |
96838a40 | 1266 | if ((adapter->hw.mng_cookie.status & |
2d7edb92 MC |
1267 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { |
1268 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); | |
1269 | } | |
b55ccb35 JK |
1270 | |
1271 | /* If AMT is enabled, let the firmware know that the network | |
1272 | * interface is now closed */ | |
1273 | if (adapter->hw.mac_type == e1000_82573 && | |
1274 | e1000_check_mng_mode(&adapter->hw)) | |
1275 | e1000_release_hw_control(adapter); | |
1276 | ||
1da177e4 LT |
1277 | return 0; |
1278 | } | |
1279 | ||
1280 | /** | |
1281 | * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary | |
1282 | * @adapter: address of board private structure | |
2d7edb92 MC |
1283 | * @start: address of beginning of memory |
1284 | * @len: length of memory | |
1da177e4 | 1285 | **/ |
e619d523 | 1286 | static boolean_t |
1da177e4 LT |
1287 | e1000_check_64k_bound(struct e1000_adapter *adapter, |
1288 | void *start, unsigned long len) | |
1289 | { | |
1290 | unsigned long begin = (unsigned long) start; | |
1291 | unsigned long end = begin + len; | |
1292 | ||
2648345f MC |
1293 | /* First rev 82545 and 82546 need to not allow any memory |
1294 | * write location to cross 64k boundary due to errata 23 */ | |
1da177e4 | 1295 | if (adapter->hw.mac_type == e1000_82545 || |
2648345f | 1296 | adapter->hw.mac_type == e1000_82546) { |
1da177e4 LT |
1297 | return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE; |
1298 | } | |
1299 | ||
1300 | return TRUE; | |
1301 | } | |
1302 | ||
1303 | /** | |
1304 | * e1000_setup_tx_resources - allocate Tx resources (Descriptors) | |
1305 | * @adapter: board private structure | |
581d708e | 1306 | * @txdr: tx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1307 | * |
1308 | * Return 0 on success, negative on failure | |
1309 | **/ | |
1310 | ||
3ad2cc67 | 1311 | static int |
581d708e MC |
1312 | e1000_setup_tx_resources(struct e1000_adapter *adapter, |
1313 | struct e1000_tx_ring *txdr) | |
1da177e4 | 1314 | { |
1da177e4 LT |
1315 | struct pci_dev *pdev = adapter->pdev; |
1316 | int size; | |
1317 | ||
1318 | size = sizeof(struct e1000_buffer) * txdr->count; | |
cd94dd0b | 1319 | txdr->buffer_info = vmalloc(size); |
96838a40 | 1320 | if (!txdr->buffer_info) { |
2648345f MC |
1321 | DPRINTK(PROBE, ERR, |
1322 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1323 | return -ENOMEM; |
1324 | } | |
1325 | memset(txdr->buffer_info, 0, size); | |
1326 | ||
1327 | /* round up to nearest 4K */ | |
1328 | ||
1329 | txdr->size = txdr->count * sizeof(struct e1000_tx_desc); | |
1330 | E1000_ROUNDUP(txdr->size, 4096); | |
1331 | ||
1332 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); | |
96838a40 | 1333 | if (!txdr->desc) { |
1da177e4 | 1334 | setup_tx_desc_die: |
1da177e4 | 1335 | vfree(txdr->buffer_info); |
2648345f MC |
1336 | DPRINTK(PROBE, ERR, |
1337 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1338 | return -ENOMEM; |
1339 | } | |
1340 | ||
2648345f | 1341 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1342 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { |
1343 | void *olddesc = txdr->desc; | |
1344 | dma_addr_t olddma = txdr->dma; | |
2648345f MC |
1345 | DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes " |
1346 | "at %p\n", txdr->size, txdr->desc); | |
1347 | /* Try again, without freeing the previous */ | |
1da177e4 | 1348 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); |
2648345f | 1349 | /* Failed allocation, critical failure */ |
96838a40 | 1350 | if (!txdr->desc) { |
1da177e4 LT |
1351 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1352 | goto setup_tx_desc_die; | |
1353 | } | |
1354 | ||
1355 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { | |
1356 | /* give up */ | |
2648345f MC |
1357 | pci_free_consistent(pdev, txdr->size, txdr->desc, |
1358 | txdr->dma); | |
1da177e4 LT |
1359 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1360 | DPRINTK(PROBE, ERR, | |
2648345f MC |
1361 | "Unable to allocate aligned memory " |
1362 | "for the transmit descriptor ring\n"); | |
1da177e4 LT |
1363 | vfree(txdr->buffer_info); |
1364 | return -ENOMEM; | |
1365 | } else { | |
2648345f | 1366 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1367 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1368 | } | |
1369 | } | |
1370 | memset(txdr->desc, 0, txdr->size); | |
1371 | ||
1372 | txdr->next_to_use = 0; | |
1373 | txdr->next_to_clean = 0; | |
2ae76d98 | 1374 | spin_lock_init(&txdr->tx_lock); |
1da177e4 LT |
1375 | |
1376 | return 0; | |
1377 | } | |
1378 | ||
581d708e MC |
1379 | /** |
1380 | * e1000_setup_all_tx_resources - wrapper to allocate Tx resources | |
1381 | * (Descriptors) for all queues | |
1382 | * @adapter: board private structure | |
1383 | * | |
1384 | * If this function returns with an error, then it's possible one or | |
1385 | * more of the rings is populated (while the rest are not). It is the | |
1386 | * callers duty to clean those orphaned rings. | |
1387 | * | |
1388 | * Return 0 on success, negative on failure | |
1389 | **/ | |
1390 | ||
1391 | int | |
1392 | e1000_setup_all_tx_resources(struct e1000_adapter *adapter) | |
1393 | { | |
1394 | int i, err = 0; | |
1395 | ||
f56799ea | 1396 | for (i = 0; i < adapter->num_tx_queues; i++) { |
581d708e MC |
1397 | err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]); |
1398 | if (err) { | |
1399 | DPRINTK(PROBE, ERR, | |
1400 | "Allocation for Tx Queue %u failed\n", i); | |
1401 | break; | |
1402 | } | |
1403 | } | |
1404 | ||
1405 | return err; | |
1406 | } | |
1407 | ||
1da177e4 LT |
1408 | /** |
1409 | * e1000_configure_tx - Configure 8254x Transmit Unit after Reset | |
1410 | * @adapter: board private structure | |
1411 | * | |
1412 | * Configure the Tx unit of the MAC after a reset. | |
1413 | **/ | |
1414 | ||
1415 | static void | |
1416 | e1000_configure_tx(struct e1000_adapter *adapter) | |
1417 | { | |
581d708e MC |
1418 | uint64_t tdba; |
1419 | struct e1000_hw *hw = &adapter->hw; | |
1420 | uint32_t tdlen, tctl, tipg, tarc; | |
0fadb059 | 1421 | uint32_t ipgr1, ipgr2; |
1da177e4 LT |
1422 | |
1423 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
1424 | ||
f56799ea | 1425 | switch (adapter->num_tx_queues) { |
24025e4e MC |
1426 | case 1: |
1427 | default: | |
581d708e MC |
1428 | tdba = adapter->tx_ring[0].dma; |
1429 | tdlen = adapter->tx_ring[0].count * | |
1430 | sizeof(struct e1000_tx_desc); | |
581d708e | 1431 | E1000_WRITE_REG(hw, TDLEN, tdlen); |
4ca213a6 AK |
1432 | E1000_WRITE_REG(hw, TDBAH, (tdba >> 32)); |
1433 | E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL)); | |
581d708e | 1434 | E1000_WRITE_REG(hw, TDT, 0); |
4ca213a6 | 1435 | E1000_WRITE_REG(hw, TDH, 0); |
581d708e MC |
1436 | adapter->tx_ring[0].tdh = E1000_TDH; |
1437 | adapter->tx_ring[0].tdt = E1000_TDT; | |
24025e4e MC |
1438 | break; |
1439 | } | |
1da177e4 LT |
1440 | |
1441 | /* Set the default values for the Tx Inter Packet Gap timer */ | |
1442 | ||
0fadb059 JK |
1443 | if (hw->media_type == e1000_media_type_fiber || |
1444 | hw->media_type == e1000_media_type_internal_serdes) | |
1445 | tipg = DEFAULT_82543_TIPG_IPGT_FIBER; | |
1446 | else | |
1447 | tipg = DEFAULT_82543_TIPG_IPGT_COPPER; | |
1448 | ||
581d708e | 1449 | switch (hw->mac_type) { |
1da177e4 LT |
1450 | case e1000_82542_rev2_0: |
1451 | case e1000_82542_rev2_1: | |
1452 | tipg = DEFAULT_82542_TIPG_IPGT; | |
0fadb059 JK |
1453 | ipgr1 = DEFAULT_82542_TIPG_IPGR1; |
1454 | ipgr2 = DEFAULT_82542_TIPG_IPGR2; | |
1da177e4 | 1455 | break; |
87041639 JK |
1456 | case e1000_80003es2lan: |
1457 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; | |
1458 | ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; | |
1459 | break; | |
1da177e4 | 1460 | default: |
0fadb059 JK |
1461 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; |
1462 | ipgr2 = DEFAULT_82543_TIPG_IPGR2; | |
1463 | break; | |
1da177e4 | 1464 | } |
0fadb059 JK |
1465 | tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT; |
1466 | tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT; | |
581d708e | 1467 | E1000_WRITE_REG(hw, TIPG, tipg); |
1da177e4 LT |
1468 | |
1469 | /* Set the Tx Interrupt Delay register */ | |
1470 | ||
581d708e MC |
1471 | E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay); |
1472 | if (hw->mac_type >= e1000_82540) | |
1473 | E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay); | |
1da177e4 LT |
1474 | |
1475 | /* Program the Transmit Control Register */ | |
1476 | ||
581d708e | 1477 | tctl = E1000_READ_REG(hw, TCTL); |
1da177e4 LT |
1478 | |
1479 | tctl &= ~E1000_TCTL_CT; | |
7e6c9861 | 1480 | tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | |
1da177e4 LT |
1481 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); |
1482 | ||
7e6c9861 JK |
1483 | #ifdef DISABLE_MULR |
1484 | /* disable Multiple Reads for debugging */ | |
1485 | tctl &= ~E1000_TCTL_MULR; | |
1486 | #endif | |
1da177e4 | 1487 | |
2ae76d98 MC |
1488 | if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) { |
1489 | tarc = E1000_READ_REG(hw, TARC0); | |
1490 | tarc |= ((1 << 25) | (1 << 21)); | |
1491 | E1000_WRITE_REG(hw, TARC0, tarc); | |
1492 | tarc = E1000_READ_REG(hw, TARC1); | |
1493 | tarc |= (1 << 25); | |
1494 | if (tctl & E1000_TCTL_MULR) | |
1495 | tarc &= ~(1 << 28); | |
1496 | else | |
1497 | tarc |= (1 << 28); | |
1498 | E1000_WRITE_REG(hw, TARC1, tarc); | |
87041639 JK |
1499 | } else if (hw->mac_type == e1000_80003es2lan) { |
1500 | tarc = E1000_READ_REG(hw, TARC0); | |
1501 | tarc |= 1; | |
1502 | if (hw->media_type == e1000_media_type_internal_serdes) | |
1503 | tarc |= (1 << 20); | |
1504 | E1000_WRITE_REG(hw, TARC0, tarc); | |
1505 | tarc = E1000_READ_REG(hw, TARC1); | |
1506 | tarc |= 1; | |
1507 | E1000_WRITE_REG(hw, TARC1, tarc); | |
2ae76d98 MC |
1508 | } |
1509 | ||
581d708e | 1510 | e1000_config_collision_dist(hw); |
1da177e4 LT |
1511 | |
1512 | /* Setup Transmit Descriptor Settings for eop descriptor */ | |
1513 | adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP | | |
1514 | E1000_TXD_CMD_IFCS; | |
1515 | ||
581d708e | 1516 | if (hw->mac_type < e1000_82543) |
1da177e4 LT |
1517 | adapter->txd_cmd |= E1000_TXD_CMD_RPS; |
1518 | else | |
1519 | adapter->txd_cmd |= E1000_TXD_CMD_RS; | |
1520 | ||
1521 | /* Cache if we're 82544 running in PCI-X because we'll | |
1522 | * need this to apply a workaround later in the send path. */ | |
581d708e MC |
1523 | if (hw->mac_type == e1000_82544 && |
1524 | hw->bus_type == e1000_bus_type_pcix) | |
1da177e4 | 1525 | adapter->pcix_82544 = 1; |
7e6c9861 JK |
1526 | |
1527 | E1000_WRITE_REG(hw, TCTL, tctl); | |
1528 | ||
1da177e4 LT |
1529 | } |
1530 | ||
1531 | /** | |
1532 | * e1000_setup_rx_resources - allocate Rx resources (Descriptors) | |
1533 | * @adapter: board private structure | |
581d708e | 1534 | * @rxdr: rx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1535 | * |
1536 | * Returns 0 on success, negative on failure | |
1537 | **/ | |
1538 | ||
3ad2cc67 | 1539 | static int |
581d708e MC |
1540 | e1000_setup_rx_resources(struct e1000_adapter *adapter, |
1541 | struct e1000_rx_ring *rxdr) | |
1da177e4 | 1542 | { |
1da177e4 | 1543 | struct pci_dev *pdev = adapter->pdev; |
2d7edb92 | 1544 | int size, desc_len; |
1da177e4 LT |
1545 | |
1546 | size = sizeof(struct e1000_buffer) * rxdr->count; | |
cd94dd0b | 1547 | rxdr->buffer_info = vmalloc(size); |
581d708e | 1548 | if (!rxdr->buffer_info) { |
2648345f MC |
1549 | DPRINTK(PROBE, ERR, |
1550 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 LT |
1551 | return -ENOMEM; |
1552 | } | |
1553 | memset(rxdr->buffer_info, 0, size); | |
1554 | ||
2d7edb92 MC |
1555 | size = sizeof(struct e1000_ps_page) * rxdr->count; |
1556 | rxdr->ps_page = kmalloc(size, GFP_KERNEL); | |
96838a40 | 1557 | if (!rxdr->ps_page) { |
2d7edb92 MC |
1558 | vfree(rxdr->buffer_info); |
1559 | DPRINTK(PROBE, ERR, | |
1560 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1561 | return -ENOMEM; | |
1562 | } | |
1563 | memset(rxdr->ps_page, 0, size); | |
1564 | ||
1565 | size = sizeof(struct e1000_ps_page_dma) * rxdr->count; | |
1566 | rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL); | |
96838a40 | 1567 | if (!rxdr->ps_page_dma) { |
2d7edb92 MC |
1568 | vfree(rxdr->buffer_info); |
1569 | kfree(rxdr->ps_page); | |
1570 | DPRINTK(PROBE, ERR, | |
1571 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1572 | return -ENOMEM; | |
1573 | } | |
1574 | memset(rxdr->ps_page_dma, 0, size); | |
1575 | ||
96838a40 | 1576 | if (adapter->hw.mac_type <= e1000_82547_rev_2) |
2d7edb92 MC |
1577 | desc_len = sizeof(struct e1000_rx_desc); |
1578 | else | |
1579 | desc_len = sizeof(union e1000_rx_desc_packet_split); | |
1580 | ||
1da177e4 LT |
1581 | /* Round up to nearest 4K */ |
1582 | ||
2d7edb92 | 1583 | rxdr->size = rxdr->count * desc_len; |
1da177e4 LT |
1584 | E1000_ROUNDUP(rxdr->size, 4096); |
1585 | ||
1586 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); | |
1587 | ||
581d708e MC |
1588 | if (!rxdr->desc) { |
1589 | DPRINTK(PROBE, ERR, | |
1590 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 | 1591 | setup_rx_desc_die: |
1da177e4 | 1592 | vfree(rxdr->buffer_info); |
2d7edb92 MC |
1593 | kfree(rxdr->ps_page); |
1594 | kfree(rxdr->ps_page_dma); | |
1da177e4 LT |
1595 | return -ENOMEM; |
1596 | } | |
1597 | ||
2648345f | 1598 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1599 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { |
1600 | void *olddesc = rxdr->desc; | |
1601 | dma_addr_t olddma = rxdr->dma; | |
2648345f MC |
1602 | DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes " |
1603 | "at %p\n", rxdr->size, rxdr->desc); | |
1604 | /* Try again, without freeing the previous */ | |
1da177e4 | 1605 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); |
2648345f | 1606 | /* Failed allocation, critical failure */ |
581d708e | 1607 | if (!rxdr->desc) { |
1da177e4 | 1608 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
581d708e MC |
1609 | DPRINTK(PROBE, ERR, |
1610 | "Unable to allocate memory " | |
1611 | "for the receive descriptor ring\n"); | |
1da177e4 LT |
1612 | goto setup_rx_desc_die; |
1613 | } | |
1614 | ||
1615 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { | |
1616 | /* give up */ | |
2648345f MC |
1617 | pci_free_consistent(pdev, rxdr->size, rxdr->desc, |
1618 | rxdr->dma); | |
1da177e4 | 1619 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
2648345f MC |
1620 | DPRINTK(PROBE, ERR, |
1621 | "Unable to allocate aligned memory " | |
1622 | "for the receive descriptor ring\n"); | |
581d708e | 1623 | goto setup_rx_desc_die; |
1da177e4 | 1624 | } else { |
2648345f | 1625 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1626 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
1627 | } | |
1628 | } | |
1629 | memset(rxdr->desc, 0, rxdr->size); | |
1630 | ||
1631 | rxdr->next_to_clean = 0; | |
1632 | rxdr->next_to_use = 0; | |
1633 | ||
1634 | return 0; | |
1635 | } | |
1636 | ||
581d708e MC |
1637 | /** |
1638 | * e1000_setup_all_rx_resources - wrapper to allocate Rx resources | |
1639 | * (Descriptors) for all queues | |
1640 | * @adapter: board private structure | |
1641 | * | |
1642 | * If this function returns with an error, then it's possible one or | |
1643 | * more of the rings is populated (while the rest are not). It is the | |
1644 | * callers duty to clean those orphaned rings. | |
1645 | * | |
1646 | * Return 0 on success, negative on failure | |
1647 | **/ | |
1648 | ||
1649 | int | |
1650 | e1000_setup_all_rx_resources(struct e1000_adapter *adapter) | |
1651 | { | |
1652 | int i, err = 0; | |
1653 | ||
f56799ea | 1654 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
1655 | err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]); |
1656 | if (err) { | |
1657 | DPRINTK(PROBE, ERR, | |
1658 | "Allocation for Rx Queue %u failed\n", i); | |
1659 | break; | |
1660 | } | |
1661 | } | |
1662 | ||
1663 | return err; | |
1664 | } | |
1665 | ||
1da177e4 | 1666 | /** |
2648345f | 1667 | * e1000_setup_rctl - configure the receive control registers |
1da177e4 LT |
1668 | * @adapter: Board private structure |
1669 | **/ | |
e4c811c9 MC |
1670 | #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ |
1671 | (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) | |
1da177e4 LT |
1672 | static void |
1673 | e1000_setup_rctl(struct e1000_adapter *adapter) | |
1674 | { | |
2d7edb92 MC |
1675 | uint32_t rctl, rfctl; |
1676 | uint32_t psrctl = 0; | |
35ec56bb | 1677 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT |
e4c811c9 MC |
1678 | uint32_t pages = 0; |
1679 | #endif | |
1da177e4 LT |
1680 | |
1681 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
1682 | ||
1683 | rctl &= ~(3 << E1000_RCTL_MO_SHIFT); | |
1684 | ||
1685 | rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | | |
1686 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | |
1687 | (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); | |
1688 | ||
0fadb059 | 1689 | if (adapter->hw.tbi_compatibility_on == 1) |
1da177e4 LT |
1690 | rctl |= E1000_RCTL_SBP; |
1691 | else | |
1692 | rctl &= ~E1000_RCTL_SBP; | |
1693 | ||
2d7edb92 MC |
1694 | if (adapter->netdev->mtu <= ETH_DATA_LEN) |
1695 | rctl &= ~E1000_RCTL_LPE; | |
1696 | else | |
1697 | rctl |= E1000_RCTL_LPE; | |
1698 | ||
1da177e4 | 1699 | /* Setup buffer sizes */ |
9e2feace AK |
1700 | rctl &= ~E1000_RCTL_SZ_4096; |
1701 | rctl |= E1000_RCTL_BSEX; | |
1702 | switch (adapter->rx_buffer_len) { | |
1703 | case E1000_RXBUFFER_256: | |
1704 | rctl |= E1000_RCTL_SZ_256; | |
1705 | rctl &= ~E1000_RCTL_BSEX; | |
1706 | break; | |
1707 | case E1000_RXBUFFER_512: | |
1708 | rctl |= E1000_RCTL_SZ_512; | |
1709 | rctl &= ~E1000_RCTL_BSEX; | |
1710 | break; | |
1711 | case E1000_RXBUFFER_1024: | |
1712 | rctl |= E1000_RCTL_SZ_1024; | |
1713 | rctl &= ~E1000_RCTL_BSEX; | |
1714 | break; | |
a1415ee6 JK |
1715 | case E1000_RXBUFFER_2048: |
1716 | default: | |
1717 | rctl |= E1000_RCTL_SZ_2048; | |
1718 | rctl &= ~E1000_RCTL_BSEX; | |
1719 | break; | |
1720 | case E1000_RXBUFFER_4096: | |
1721 | rctl |= E1000_RCTL_SZ_4096; | |
1722 | break; | |
1723 | case E1000_RXBUFFER_8192: | |
1724 | rctl |= E1000_RCTL_SZ_8192; | |
1725 | break; | |
1726 | case E1000_RXBUFFER_16384: | |
1727 | rctl |= E1000_RCTL_SZ_16384; | |
1728 | break; | |
2d7edb92 MC |
1729 | } |
1730 | ||
35ec56bb | 1731 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT |
2d7edb92 MC |
1732 | /* 82571 and greater support packet-split where the protocol |
1733 | * header is placed in skb->data and the packet data is | |
1734 | * placed in pages hanging off of skb_shinfo(skb)->nr_frags. | |
1735 | * In the case of a non-split, skb->data is linearly filled, | |
1736 | * followed by the page buffers. Therefore, skb->data is | |
1737 | * sized to hold the largest protocol header. | |
1738 | */ | |
e4c811c9 MC |
1739 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); |
1740 | if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) && | |
1741 | PAGE_SIZE <= 16384) | |
1742 | adapter->rx_ps_pages = pages; | |
1743 | else | |
1744 | adapter->rx_ps_pages = 0; | |
2d7edb92 | 1745 | #endif |
e4c811c9 | 1746 | if (adapter->rx_ps_pages) { |
2d7edb92 MC |
1747 | /* Configure extra packet-split registers */ |
1748 | rfctl = E1000_READ_REG(&adapter->hw, RFCTL); | |
1749 | rfctl |= E1000_RFCTL_EXTEN; | |
1750 | /* disable IPv6 packet split support */ | |
1751 | rfctl |= E1000_RFCTL_IPV6_DIS; | |
1752 | E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl); | |
1753 | ||
7dfee0cb | 1754 | rctl |= E1000_RCTL_DTYP_PS; |
96838a40 | 1755 | |
2d7edb92 MC |
1756 | psrctl |= adapter->rx_ps_bsize0 >> |
1757 | E1000_PSRCTL_BSIZE0_SHIFT; | |
e4c811c9 MC |
1758 | |
1759 | switch (adapter->rx_ps_pages) { | |
1760 | case 3: | |
1761 | psrctl |= PAGE_SIZE << | |
1762 | E1000_PSRCTL_BSIZE3_SHIFT; | |
1763 | case 2: | |
1764 | psrctl |= PAGE_SIZE << | |
1765 | E1000_PSRCTL_BSIZE2_SHIFT; | |
1766 | case 1: | |
1767 | psrctl |= PAGE_SIZE >> | |
1768 | E1000_PSRCTL_BSIZE1_SHIFT; | |
1769 | break; | |
1770 | } | |
2d7edb92 MC |
1771 | |
1772 | E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl); | |
1da177e4 LT |
1773 | } |
1774 | ||
1775 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
1776 | } | |
1777 | ||
1778 | /** | |
1779 | * e1000_configure_rx - Configure 8254x Receive Unit after Reset | |
1780 | * @adapter: board private structure | |
1781 | * | |
1782 | * Configure the Rx unit of the MAC after a reset. | |
1783 | **/ | |
1784 | ||
1785 | static void | |
1786 | e1000_configure_rx(struct e1000_adapter *adapter) | |
1787 | { | |
581d708e MC |
1788 | uint64_t rdba; |
1789 | struct e1000_hw *hw = &adapter->hw; | |
1790 | uint32_t rdlen, rctl, rxcsum, ctrl_ext; | |
2d7edb92 | 1791 | |
e4c811c9 | 1792 | if (adapter->rx_ps_pages) { |
0f15a8fa | 1793 | /* this is a 32 byte descriptor */ |
581d708e | 1794 | rdlen = adapter->rx_ring[0].count * |
2d7edb92 MC |
1795 | sizeof(union e1000_rx_desc_packet_split); |
1796 | adapter->clean_rx = e1000_clean_rx_irq_ps; | |
1797 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; | |
1798 | } else { | |
581d708e MC |
1799 | rdlen = adapter->rx_ring[0].count * |
1800 | sizeof(struct e1000_rx_desc); | |
2d7edb92 MC |
1801 | adapter->clean_rx = e1000_clean_rx_irq; |
1802 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers; | |
1803 | } | |
1da177e4 LT |
1804 | |
1805 | /* disable receives while setting up the descriptors */ | |
581d708e MC |
1806 | rctl = E1000_READ_REG(hw, RCTL); |
1807 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
1da177e4 LT |
1808 | |
1809 | /* set the Receive Delay Timer Register */ | |
581d708e | 1810 | E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay); |
1da177e4 | 1811 | |
581d708e MC |
1812 | if (hw->mac_type >= e1000_82540) { |
1813 | E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay); | |
96838a40 | 1814 | if (adapter->itr > 1) |
581d708e | 1815 | E1000_WRITE_REG(hw, ITR, |
1da177e4 LT |
1816 | 1000000000 / (adapter->itr * 256)); |
1817 | } | |
1818 | ||
2ae76d98 | 1819 | if (hw->mac_type >= e1000_82571) { |
2ae76d98 | 1820 | ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); |
1e613fd9 | 1821 | /* Reset delay timers after every interrupt */ |
6fc7a7ec | 1822 | ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR; |
1e613fd9 JK |
1823 | #ifdef CONFIG_E1000_NAPI |
1824 | /* Auto-Mask interrupts upon ICR read. */ | |
1825 | ctrl_ext |= E1000_CTRL_EXT_IAME; | |
1826 | #endif | |
2ae76d98 | 1827 | E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext); |
1e613fd9 | 1828 | E1000_WRITE_REG(hw, IAM, ~0); |
2ae76d98 MC |
1829 | E1000_WRITE_FLUSH(hw); |
1830 | } | |
1831 | ||
581d708e MC |
1832 | /* Setup the HW Rx Head and Tail Descriptor Pointers and |
1833 | * the Base and Length of the Rx Descriptor Ring */ | |
f56799ea | 1834 | switch (adapter->num_rx_queues) { |
24025e4e MC |
1835 | case 1: |
1836 | default: | |
581d708e | 1837 | rdba = adapter->rx_ring[0].dma; |
581d708e | 1838 | E1000_WRITE_REG(hw, RDLEN, rdlen); |
4ca213a6 AK |
1839 | E1000_WRITE_REG(hw, RDBAH, (rdba >> 32)); |
1840 | E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL)); | |
581d708e | 1841 | E1000_WRITE_REG(hw, RDT, 0); |
4ca213a6 | 1842 | E1000_WRITE_REG(hw, RDH, 0); |
581d708e MC |
1843 | adapter->rx_ring[0].rdh = E1000_RDH; |
1844 | adapter->rx_ring[0].rdt = E1000_RDT; | |
1845 | break; | |
24025e4e MC |
1846 | } |
1847 | ||
1da177e4 | 1848 | /* Enable 82543 Receive Checksum Offload for TCP and UDP */ |
581d708e MC |
1849 | if (hw->mac_type >= e1000_82543) { |
1850 | rxcsum = E1000_READ_REG(hw, RXCSUM); | |
96838a40 | 1851 | if (adapter->rx_csum == TRUE) { |
2d7edb92 MC |
1852 | rxcsum |= E1000_RXCSUM_TUOFL; |
1853 | ||
868d5309 | 1854 | /* Enable 82571 IPv4 payload checksum for UDP fragments |
2d7edb92 | 1855 | * Must be used in conjunction with packet-split. */ |
96838a40 JB |
1856 | if ((hw->mac_type >= e1000_82571) && |
1857 | (adapter->rx_ps_pages)) { | |
2d7edb92 MC |
1858 | rxcsum |= E1000_RXCSUM_IPPCSE; |
1859 | } | |
1860 | } else { | |
1861 | rxcsum &= ~E1000_RXCSUM_TUOFL; | |
1862 | /* don't need to clear IPPCSE as it defaults to 0 */ | |
1863 | } | |
581d708e | 1864 | E1000_WRITE_REG(hw, RXCSUM, rxcsum); |
1da177e4 LT |
1865 | } |
1866 | ||
1867 | /* Enable Receives */ | |
581d708e | 1868 | E1000_WRITE_REG(hw, RCTL, rctl); |
1da177e4 LT |
1869 | } |
1870 | ||
1871 | /** | |
581d708e | 1872 | * e1000_free_tx_resources - Free Tx Resources per Queue |
1da177e4 | 1873 | * @adapter: board private structure |
581d708e | 1874 | * @tx_ring: Tx descriptor ring for a specific queue |
1da177e4 LT |
1875 | * |
1876 | * Free all transmit software resources | |
1877 | **/ | |
1878 | ||
3ad2cc67 | 1879 | static void |
581d708e MC |
1880 | e1000_free_tx_resources(struct e1000_adapter *adapter, |
1881 | struct e1000_tx_ring *tx_ring) | |
1da177e4 LT |
1882 | { |
1883 | struct pci_dev *pdev = adapter->pdev; | |
1884 | ||
581d708e | 1885 | e1000_clean_tx_ring(adapter, tx_ring); |
1da177e4 | 1886 | |
581d708e MC |
1887 | vfree(tx_ring->buffer_info); |
1888 | tx_ring->buffer_info = NULL; | |
1da177e4 | 1889 | |
581d708e | 1890 | pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma); |
1da177e4 | 1891 | |
581d708e MC |
1892 | tx_ring->desc = NULL; |
1893 | } | |
1894 | ||
1895 | /** | |
1896 | * e1000_free_all_tx_resources - Free Tx Resources for All Queues | |
1897 | * @adapter: board private structure | |
1898 | * | |
1899 | * Free all transmit software resources | |
1900 | **/ | |
1901 | ||
1902 | void | |
1903 | e1000_free_all_tx_resources(struct e1000_adapter *adapter) | |
1904 | { | |
1905 | int i; | |
1906 | ||
f56799ea | 1907 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 1908 | e1000_free_tx_resources(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
1909 | } |
1910 | ||
e619d523 | 1911 | static void |
1da177e4 LT |
1912 | e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter, |
1913 | struct e1000_buffer *buffer_info) | |
1914 | { | |
96838a40 | 1915 | if (buffer_info->dma) { |
2648345f MC |
1916 | pci_unmap_page(adapter->pdev, |
1917 | buffer_info->dma, | |
1918 | buffer_info->length, | |
1919 | PCI_DMA_TODEVICE); | |
1da177e4 | 1920 | } |
8241e35e | 1921 | if (buffer_info->skb) |
1da177e4 | 1922 | dev_kfree_skb_any(buffer_info->skb); |
8241e35e | 1923 | memset(buffer_info, 0, sizeof(struct e1000_buffer)); |
1da177e4 LT |
1924 | } |
1925 | ||
1926 | /** | |
1927 | * e1000_clean_tx_ring - Free Tx Buffers | |
1928 | * @adapter: board private structure | |
581d708e | 1929 | * @tx_ring: ring to be cleaned |
1da177e4 LT |
1930 | **/ |
1931 | ||
1932 | static void | |
581d708e MC |
1933 | e1000_clean_tx_ring(struct e1000_adapter *adapter, |
1934 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 1935 | { |
1da177e4 LT |
1936 | struct e1000_buffer *buffer_info; |
1937 | unsigned long size; | |
1938 | unsigned int i; | |
1939 | ||
1940 | /* Free all the Tx ring sk_buffs */ | |
1941 | ||
96838a40 | 1942 | for (i = 0; i < tx_ring->count; i++) { |
1da177e4 LT |
1943 | buffer_info = &tx_ring->buffer_info[i]; |
1944 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); | |
1945 | } | |
1946 | ||
1947 | size = sizeof(struct e1000_buffer) * tx_ring->count; | |
1948 | memset(tx_ring->buffer_info, 0, size); | |
1949 | ||
1950 | /* Zero out the descriptor ring */ | |
1951 | ||
1952 | memset(tx_ring->desc, 0, tx_ring->size); | |
1953 | ||
1954 | tx_ring->next_to_use = 0; | |
1955 | tx_ring->next_to_clean = 0; | |
fd803241 | 1956 | tx_ring->last_tx_tso = 0; |
1da177e4 | 1957 | |
581d708e MC |
1958 | writel(0, adapter->hw.hw_addr + tx_ring->tdh); |
1959 | writel(0, adapter->hw.hw_addr + tx_ring->tdt); | |
1960 | } | |
1961 | ||
1962 | /** | |
1963 | * e1000_clean_all_tx_rings - Free Tx Buffers for all queues | |
1964 | * @adapter: board private structure | |
1965 | **/ | |
1966 | ||
1967 | static void | |
1968 | e1000_clean_all_tx_rings(struct e1000_adapter *adapter) | |
1969 | { | |
1970 | int i; | |
1971 | ||
f56799ea | 1972 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 1973 | e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
1974 | } |
1975 | ||
1976 | /** | |
1977 | * e1000_free_rx_resources - Free Rx Resources | |
1978 | * @adapter: board private structure | |
581d708e | 1979 | * @rx_ring: ring to clean the resources from |
1da177e4 LT |
1980 | * |
1981 | * Free all receive software resources | |
1982 | **/ | |
1983 | ||
3ad2cc67 | 1984 | static void |
581d708e MC |
1985 | e1000_free_rx_resources(struct e1000_adapter *adapter, |
1986 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 1987 | { |
1da177e4 LT |
1988 | struct pci_dev *pdev = adapter->pdev; |
1989 | ||
581d708e | 1990 | e1000_clean_rx_ring(adapter, rx_ring); |
1da177e4 LT |
1991 | |
1992 | vfree(rx_ring->buffer_info); | |
1993 | rx_ring->buffer_info = NULL; | |
2d7edb92 MC |
1994 | kfree(rx_ring->ps_page); |
1995 | rx_ring->ps_page = NULL; | |
1996 | kfree(rx_ring->ps_page_dma); | |
1997 | rx_ring->ps_page_dma = NULL; | |
1da177e4 LT |
1998 | |
1999 | pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma); | |
2000 | ||
2001 | rx_ring->desc = NULL; | |
2002 | } | |
2003 | ||
2004 | /** | |
581d708e | 2005 | * e1000_free_all_rx_resources - Free Rx Resources for All Queues |
1da177e4 | 2006 | * @adapter: board private structure |
581d708e MC |
2007 | * |
2008 | * Free all receive software resources | |
2009 | **/ | |
2010 | ||
2011 | void | |
2012 | e1000_free_all_rx_resources(struct e1000_adapter *adapter) | |
2013 | { | |
2014 | int i; | |
2015 | ||
f56799ea | 2016 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e MC |
2017 | e1000_free_rx_resources(adapter, &adapter->rx_ring[i]); |
2018 | } | |
2019 | ||
2020 | /** | |
2021 | * e1000_clean_rx_ring - Free Rx Buffers per Queue | |
2022 | * @adapter: board private structure | |
2023 | * @rx_ring: ring to free buffers from | |
1da177e4 LT |
2024 | **/ |
2025 | ||
2026 | static void | |
581d708e MC |
2027 | e1000_clean_rx_ring(struct e1000_adapter *adapter, |
2028 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 2029 | { |
1da177e4 | 2030 | struct e1000_buffer *buffer_info; |
2d7edb92 MC |
2031 | struct e1000_ps_page *ps_page; |
2032 | struct e1000_ps_page_dma *ps_page_dma; | |
1da177e4 LT |
2033 | struct pci_dev *pdev = adapter->pdev; |
2034 | unsigned long size; | |
2d7edb92 | 2035 | unsigned int i, j; |
1da177e4 LT |
2036 | |
2037 | /* Free all the Rx ring sk_buffs */ | |
96838a40 | 2038 | for (i = 0; i < rx_ring->count; i++) { |
1da177e4 | 2039 | buffer_info = &rx_ring->buffer_info[i]; |
96838a40 | 2040 | if (buffer_info->skb) { |
1da177e4 LT |
2041 | pci_unmap_single(pdev, |
2042 | buffer_info->dma, | |
2043 | buffer_info->length, | |
2044 | PCI_DMA_FROMDEVICE); | |
2045 | ||
2046 | dev_kfree_skb(buffer_info->skb); | |
2047 | buffer_info->skb = NULL; | |
997f5cbd JK |
2048 | } |
2049 | ps_page = &rx_ring->ps_page[i]; | |
2050 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
2051 | for (j = 0; j < adapter->rx_ps_pages; j++) { | |
2052 | if (!ps_page->ps_page[j]) break; | |
2053 | pci_unmap_page(pdev, | |
2054 | ps_page_dma->ps_page_dma[j], | |
2055 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
2056 | ps_page_dma->ps_page_dma[j] = 0; | |
2057 | put_page(ps_page->ps_page[j]); | |
2058 | ps_page->ps_page[j] = NULL; | |
1da177e4 LT |
2059 | } |
2060 | } | |
2061 | ||
2062 | size = sizeof(struct e1000_buffer) * rx_ring->count; | |
2063 | memset(rx_ring->buffer_info, 0, size); | |
2d7edb92 MC |
2064 | size = sizeof(struct e1000_ps_page) * rx_ring->count; |
2065 | memset(rx_ring->ps_page, 0, size); | |
2066 | size = sizeof(struct e1000_ps_page_dma) * rx_ring->count; | |
2067 | memset(rx_ring->ps_page_dma, 0, size); | |
1da177e4 LT |
2068 | |
2069 | /* Zero out the descriptor ring */ | |
2070 | ||
2071 | memset(rx_ring->desc, 0, rx_ring->size); | |
2072 | ||
2073 | rx_ring->next_to_clean = 0; | |
2074 | rx_ring->next_to_use = 0; | |
2075 | ||
581d708e MC |
2076 | writel(0, adapter->hw.hw_addr + rx_ring->rdh); |
2077 | writel(0, adapter->hw.hw_addr + rx_ring->rdt); | |
2078 | } | |
2079 | ||
2080 | /** | |
2081 | * e1000_clean_all_rx_rings - Free Rx Buffers for all queues | |
2082 | * @adapter: board private structure | |
2083 | **/ | |
2084 | ||
2085 | static void | |
2086 | e1000_clean_all_rx_rings(struct e1000_adapter *adapter) | |
2087 | { | |
2088 | int i; | |
2089 | ||
f56799ea | 2090 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e | 2091 | e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]); |
1da177e4 LT |
2092 | } |
2093 | ||
2094 | /* The 82542 2.0 (revision 2) needs to have the receive unit in reset | |
2095 | * and memory write and invalidate disabled for certain operations | |
2096 | */ | |
2097 | static void | |
2098 | e1000_enter_82542_rst(struct e1000_adapter *adapter) | |
2099 | { | |
2100 | struct net_device *netdev = adapter->netdev; | |
2101 | uint32_t rctl; | |
2102 | ||
2103 | e1000_pci_clear_mwi(&adapter->hw); | |
2104 | ||
2105 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
2106 | rctl |= E1000_RCTL_RST; | |
2107 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2108 | E1000_WRITE_FLUSH(&adapter->hw); | |
2109 | mdelay(5); | |
2110 | ||
96838a40 | 2111 | if (netif_running(netdev)) |
581d708e | 2112 | e1000_clean_all_rx_rings(adapter); |
1da177e4 LT |
2113 | } |
2114 | ||
2115 | static void | |
2116 | e1000_leave_82542_rst(struct e1000_adapter *adapter) | |
2117 | { | |
2118 | struct net_device *netdev = adapter->netdev; | |
2119 | uint32_t rctl; | |
2120 | ||
2121 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
2122 | rctl &= ~E1000_RCTL_RST; | |
2123 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2124 | E1000_WRITE_FLUSH(&adapter->hw); | |
2125 | mdelay(5); | |
2126 | ||
96838a40 | 2127 | if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE) |
1da177e4 LT |
2128 | e1000_pci_set_mwi(&adapter->hw); |
2129 | ||
96838a40 | 2130 | if (netif_running(netdev)) { |
72d64a43 JK |
2131 | /* No need to loop, because 82542 supports only 1 queue */ |
2132 | struct e1000_rx_ring *ring = &adapter->rx_ring[0]; | |
7c4d3367 | 2133 | e1000_configure_rx(adapter); |
72d64a43 | 2134 | adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring)); |
1da177e4 LT |
2135 | } |
2136 | } | |
2137 | ||
2138 | /** | |
2139 | * e1000_set_mac - Change the Ethernet Address of the NIC | |
2140 | * @netdev: network interface device structure | |
2141 | * @p: pointer to an address structure | |
2142 | * | |
2143 | * Returns 0 on success, negative on failure | |
2144 | **/ | |
2145 | ||
2146 | static int | |
2147 | e1000_set_mac(struct net_device *netdev, void *p) | |
2148 | { | |
60490fe0 | 2149 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2150 | struct sockaddr *addr = p; |
2151 | ||
96838a40 | 2152 | if (!is_valid_ether_addr(addr->sa_data)) |
1da177e4 LT |
2153 | return -EADDRNOTAVAIL; |
2154 | ||
2155 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2156 | ||
96838a40 | 2157 | if (adapter->hw.mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2158 | e1000_enter_82542_rst(adapter); |
2159 | ||
2160 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
2161 | memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); | |
2162 | ||
2163 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2164 | ||
868d5309 MC |
2165 | /* With 82571 controllers, LAA may be overwritten (with the default) |
2166 | * due to controller reset from the other port. */ | |
2167 | if (adapter->hw.mac_type == e1000_82571) { | |
2168 | /* activate the work around */ | |
2169 | adapter->hw.laa_is_present = 1; | |
2170 | ||
96838a40 JB |
2171 | /* Hold a copy of the LAA in RAR[14] This is done so that |
2172 | * between the time RAR[0] gets clobbered and the time it | |
2173 | * gets fixed (in e1000_watchdog), the actual LAA is in one | |
868d5309 | 2174 | * of the RARs and no incoming packets directed to this port |
96838a40 | 2175 | * are dropped. Eventaully the LAA will be in RAR[0] and |
868d5309 | 2176 | * RAR[14] */ |
96838a40 | 2177 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, |
868d5309 MC |
2178 | E1000_RAR_ENTRIES - 1); |
2179 | } | |
2180 | ||
96838a40 | 2181 | if (adapter->hw.mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2182 | e1000_leave_82542_rst(adapter); |
2183 | ||
2184 | return 0; | |
2185 | } | |
2186 | ||
2187 | /** | |
2188 | * e1000_set_multi - Multicast and Promiscuous mode set | |
2189 | * @netdev: network interface device structure | |
2190 | * | |
2191 | * The set_multi entry point is called whenever the multicast address | |
2192 | * list or the network interface flags are updated. This routine is | |
2193 | * responsible for configuring the hardware for proper multicast, | |
2194 | * promiscuous mode, and all-multi behavior. | |
2195 | **/ | |
2196 | ||
2197 | static void | |
2198 | e1000_set_multi(struct net_device *netdev) | |
2199 | { | |
60490fe0 | 2200 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2201 | struct e1000_hw *hw = &adapter->hw; |
2202 | struct dev_mc_list *mc_ptr; | |
2203 | uint32_t rctl; | |
2204 | uint32_t hash_value; | |
868d5309 | 2205 | int i, rar_entries = E1000_RAR_ENTRIES; |
cd94dd0b AK |
2206 | int mta_reg_count = (hw->mac_type == e1000_ich8lan) ? |
2207 | E1000_NUM_MTA_REGISTERS_ICH8LAN : | |
2208 | E1000_NUM_MTA_REGISTERS; | |
2209 | ||
2210 | if (adapter->hw.mac_type == e1000_ich8lan) | |
2211 | rar_entries = E1000_RAR_ENTRIES_ICH8LAN; | |
1da177e4 | 2212 | |
868d5309 MC |
2213 | /* reserve RAR[14] for LAA over-write work-around */ |
2214 | if (adapter->hw.mac_type == e1000_82571) | |
2215 | rar_entries--; | |
1da177e4 | 2216 | |
2648345f MC |
2217 | /* Check for Promiscuous and All Multicast modes */ |
2218 | ||
1da177e4 LT |
2219 | rctl = E1000_READ_REG(hw, RCTL); |
2220 | ||
96838a40 | 2221 | if (netdev->flags & IFF_PROMISC) { |
1da177e4 | 2222 | rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); |
96838a40 | 2223 | } else if (netdev->flags & IFF_ALLMULTI) { |
1da177e4 LT |
2224 | rctl |= E1000_RCTL_MPE; |
2225 | rctl &= ~E1000_RCTL_UPE; | |
2226 | } else { | |
2227 | rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); | |
2228 | } | |
2229 | ||
2230 | E1000_WRITE_REG(hw, RCTL, rctl); | |
2231 | ||
2232 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2233 | ||
96838a40 | 2234 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2235 | e1000_enter_82542_rst(adapter); |
2236 | ||
2237 | /* load the first 14 multicast address into the exact filters 1-14 | |
2238 | * RAR 0 is used for the station MAC adddress | |
2239 | * if there are not 14 addresses, go ahead and clear the filters | |
868d5309 | 2240 | * -- with 82571 controllers only 0-13 entries are filled here |
1da177e4 LT |
2241 | */ |
2242 | mc_ptr = netdev->mc_list; | |
2243 | ||
96838a40 | 2244 | for (i = 1; i < rar_entries; i++) { |
868d5309 | 2245 | if (mc_ptr) { |
1da177e4 LT |
2246 | e1000_rar_set(hw, mc_ptr->dmi_addr, i); |
2247 | mc_ptr = mc_ptr->next; | |
2248 | } else { | |
2249 | E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0); | |
4ca213a6 | 2250 | E1000_WRITE_FLUSH(hw); |
1da177e4 | 2251 | E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0); |
4ca213a6 | 2252 | E1000_WRITE_FLUSH(hw); |
1da177e4 LT |
2253 | } |
2254 | } | |
2255 | ||
2256 | /* clear the old settings from the multicast hash table */ | |
2257 | ||
cd94dd0b | 2258 | for (i = 0; i < mta_reg_count; i++) { |
1da177e4 | 2259 | E1000_WRITE_REG_ARRAY(hw, MTA, i, 0); |
4ca213a6 AK |
2260 | E1000_WRITE_FLUSH(hw); |
2261 | } | |
1da177e4 LT |
2262 | |
2263 | /* load any remaining addresses into the hash table */ | |
2264 | ||
96838a40 | 2265 | for (; mc_ptr; mc_ptr = mc_ptr->next) { |
1da177e4 LT |
2266 | hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr); |
2267 | e1000_mta_set(hw, hash_value); | |
2268 | } | |
2269 | ||
96838a40 | 2270 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 | 2271 | e1000_leave_82542_rst(adapter); |
1da177e4 LT |
2272 | } |
2273 | ||
2274 | /* Need to wait a few seconds after link up to get diagnostic information from | |
2275 | * the phy */ | |
2276 | ||
2277 | static void | |
2278 | e1000_update_phy_info(unsigned long data) | |
2279 | { | |
2280 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2281 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
2282 | } | |
2283 | ||
2284 | /** | |
2285 | * e1000_82547_tx_fifo_stall - Timer Call-back | |
2286 | * @data: pointer to adapter cast into an unsigned long | |
2287 | **/ | |
2288 | ||
2289 | static void | |
2290 | e1000_82547_tx_fifo_stall(unsigned long data) | |
2291 | { | |
2292 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2293 | struct net_device *netdev = adapter->netdev; | |
2294 | uint32_t tctl; | |
2295 | ||
96838a40 JB |
2296 | if (atomic_read(&adapter->tx_fifo_stall)) { |
2297 | if ((E1000_READ_REG(&adapter->hw, TDT) == | |
1da177e4 LT |
2298 | E1000_READ_REG(&adapter->hw, TDH)) && |
2299 | (E1000_READ_REG(&adapter->hw, TDFT) == | |
2300 | E1000_READ_REG(&adapter->hw, TDFH)) && | |
2301 | (E1000_READ_REG(&adapter->hw, TDFTS) == | |
2302 | E1000_READ_REG(&adapter->hw, TDFHS))) { | |
2303 | tctl = E1000_READ_REG(&adapter->hw, TCTL); | |
2304 | E1000_WRITE_REG(&adapter->hw, TCTL, | |
2305 | tctl & ~E1000_TCTL_EN); | |
2306 | E1000_WRITE_REG(&adapter->hw, TDFT, | |
2307 | adapter->tx_head_addr); | |
2308 | E1000_WRITE_REG(&adapter->hw, TDFH, | |
2309 | adapter->tx_head_addr); | |
2310 | E1000_WRITE_REG(&adapter->hw, TDFTS, | |
2311 | adapter->tx_head_addr); | |
2312 | E1000_WRITE_REG(&adapter->hw, TDFHS, | |
2313 | adapter->tx_head_addr); | |
2314 | E1000_WRITE_REG(&adapter->hw, TCTL, tctl); | |
2315 | E1000_WRITE_FLUSH(&adapter->hw); | |
2316 | ||
2317 | adapter->tx_fifo_head = 0; | |
2318 | atomic_set(&adapter->tx_fifo_stall, 0); | |
2319 | netif_wake_queue(netdev); | |
2320 | } else { | |
2321 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); | |
2322 | } | |
2323 | } | |
2324 | } | |
2325 | ||
2326 | /** | |
2327 | * e1000_watchdog - Timer Call-back | |
2328 | * @data: pointer to adapter cast into an unsigned long | |
2329 | **/ | |
2330 | static void | |
2331 | e1000_watchdog(unsigned long data) | |
2332 | { | |
2333 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
1da177e4 | 2334 | struct net_device *netdev = adapter->netdev; |
545c67c0 | 2335 | struct e1000_tx_ring *txdr = adapter->tx_ring; |
7e6c9861 | 2336 | uint32_t link, tctl; |
cd94dd0b AK |
2337 | int32_t ret_val; |
2338 | ||
2339 | ret_val = e1000_check_for_link(&adapter->hw); | |
2340 | if ((ret_val == E1000_ERR_PHY) && | |
2341 | (adapter->hw.phy_type == e1000_phy_igp_3) && | |
2342 | (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { | |
2343 | /* See e1000_kumeran_lock_loss_workaround() */ | |
2344 | DPRINTK(LINK, INFO, | |
2345 | "Gigabit has been disabled, downgrading speed\n"); | |
2346 | } | |
2d7edb92 MC |
2347 | if (adapter->hw.mac_type == e1000_82573) { |
2348 | e1000_enable_tx_pkt_filtering(&adapter->hw); | |
96838a40 | 2349 | if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id) |
2d7edb92 | 2350 | e1000_update_mng_vlan(adapter); |
96838a40 | 2351 | } |
1da177e4 | 2352 | |
96838a40 | 2353 | if ((adapter->hw.media_type == e1000_media_type_internal_serdes) && |
1da177e4 LT |
2354 | !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE)) |
2355 | link = !adapter->hw.serdes_link_down; | |
2356 | else | |
2357 | link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU; | |
2358 | ||
96838a40 JB |
2359 | if (link) { |
2360 | if (!netif_carrier_ok(netdev)) { | |
fe7fe28e | 2361 | boolean_t txb2b = 1; |
1da177e4 LT |
2362 | e1000_get_speed_and_duplex(&adapter->hw, |
2363 | &adapter->link_speed, | |
2364 | &adapter->link_duplex); | |
2365 | ||
2366 | DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n", | |
2367 | adapter->link_speed, | |
2368 | adapter->link_duplex == FULL_DUPLEX ? | |
2369 | "Full Duplex" : "Half Duplex"); | |
2370 | ||
7e6c9861 JK |
2371 | /* tweak tx_queue_len according to speed/duplex |
2372 | * and adjust the timeout factor */ | |
66a2b0a3 JK |
2373 | netdev->tx_queue_len = adapter->tx_queue_len; |
2374 | adapter->tx_timeout_factor = 1; | |
7e6c9861 JK |
2375 | switch (adapter->link_speed) { |
2376 | case SPEED_10: | |
fe7fe28e | 2377 | txb2b = 0; |
7e6c9861 JK |
2378 | netdev->tx_queue_len = 10; |
2379 | adapter->tx_timeout_factor = 8; | |
2380 | break; | |
2381 | case SPEED_100: | |
fe7fe28e | 2382 | txb2b = 0; |
7e6c9861 JK |
2383 | netdev->tx_queue_len = 100; |
2384 | /* maybe add some timeout factor ? */ | |
2385 | break; | |
2386 | } | |
2387 | ||
fe7fe28e | 2388 | if ((adapter->hw.mac_type == e1000_82571 || |
7e6c9861 | 2389 | adapter->hw.mac_type == e1000_82572) && |
fe7fe28e | 2390 | txb2b == 0) { |
7e6c9861 JK |
2391 | #define SPEED_MODE_BIT (1 << 21) |
2392 | uint32_t tarc0; | |
2393 | tarc0 = E1000_READ_REG(&adapter->hw, TARC0); | |
2394 | tarc0 &= ~SPEED_MODE_BIT; | |
2395 | E1000_WRITE_REG(&adapter->hw, TARC0, tarc0); | |
2396 | } | |
2397 | ||
2398 | #ifdef NETIF_F_TSO | |
2399 | /* disable TSO for pcie and 10/100 speeds, to avoid | |
2400 | * some hardware issues */ | |
2401 | if (!adapter->tso_force && | |
2402 | adapter->hw.bus_type == e1000_bus_type_pci_express){ | |
66a2b0a3 JK |
2403 | switch (adapter->link_speed) { |
2404 | case SPEED_10: | |
66a2b0a3 | 2405 | case SPEED_100: |
7e6c9861 JK |
2406 | DPRINTK(PROBE,INFO, |
2407 | "10/100 speed: disabling TSO\n"); | |
2408 | netdev->features &= ~NETIF_F_TSO; | |
2409 | break; | |
2410 | case SPEED_1000: | |
2411 | netdev->features |= NETIF_F_TSO; | |
2412 | break; | |
2413 | default: | |
2414 | /* oops */ | |
66a2b0a3 JK |
2415 | break; |
2416 | } | |
2417 | } | |
7e6c9861 JK |
2418 | #endif |
2419 | ||
2420 | /* enable transmits in the hardware, need to do this | |
2421 | * after setting TARC0 */ | |
2422 | tctl = E1000_READ_REG(&adapter->hw, TCTL); | |
2423 | tctl |= E1000_TCTL_EN; | |
2424 | E1000_WRITE_REG(&adapter->hw, TCTL, tctl); | |
66a2b0a3 | 2425 | |
1da177e4 LT |
2426 | netif_carrier_on(netdev); |
2427 | netif_wake_queue(netdev); | |
2428 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
2429 | adapter->smartspeed = 0; | |
2430 | } | |
2431 | } else { | |
96838a40 | 2432 | if (netif_carrier_ok(netdev)) { |
1da177e4 LT |
2433 | adapter->link_speed = 0; |
2434 | adapter->link_duplex = 0; | |
2435 | DPRINTK(LINK, INFO, "NIC Link is Down\n"); | |
2436 | netif_carrier_off(netdev); | |
2437 | netif_stop_queue(netdev); | |
2438 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
87041639 JK |
2439 | |
2440 | /* 80003ES2LAN workaround-- | |
2441 | * For packet buffer work-around on link down event; | |
2442 | * disable receives in the ISR and | |
2443 | * reset device here in the watchdog | |
2444 | */ | |
2445 | if (adapter->hw.mac_type == e1000_80003es2lan) { | |
2446 | /* reset device */ | |
2447 | schedule_work(&adapter->reset_task); | |
2448 | } | |
1da177e4 LT |
2449 | } |
2450 | ||
2451 | e1000_smartspeed(adapter); | |
2452 | } | |
2453 | ||
2454 | e1000_update_stats(adapter); | |
2455 | ||
2456 | adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; | |
2457 | adapter->tpt_old = adapter->stats.tpt; | |
2458 | adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old; | |
2459 | adapter->colc_old = adapter->stats.colc; | |
2460 | ||
2461 | adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old; | |
2462 | adapter->gorcl_old = adapter->stats.gorcl; | |
2463 | adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old; | |
2464 | adapter->gotcl_old = adapter->stats.gotcl; | |
2465 | ||
2466 | e1000_update_adaptive(&adapter->hw); | |
2467 | ||
f56799ea | 2468 | if (!netif_carrier_ok(netdev)) { |
581d708e | 2469 | if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) { |
1da177e4 LT |
2470 | /* We've lost link, so the controller stops DMA, |
2471 | * but we've got queued Tx work that's never going | |
2472 | * to get done, so reset controller to flush Tx. | |
2473 | * (Do the reset outside of interrupt context). */ | |
87041639 JK |
2474 | adapter->tx_timeout_count++; |
2475 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
2476 | } |
2477 | } | |
2478 | ||
2479 | /* Dynamic mode for Interrupt Throttle Rate (ITR) */ | |
96838a40 | 2480 | if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) { |
1da177e4 LT |
2481 | /* Symmetric Tx/Rx gets a reduced ITR=2000; Total |
2482 | * asymmetrical Tx or Rx gets ITR=8000; everyone | |
2483 | * else is between 2000-8000. */ | |
2484 | uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000; | |
96838a40 | 2485 | uint32_t dif = (adapter->gotcl > adapter->gorcl ? |
1da177e4 LT |
2486 | adapter->gotcl - adapter->gorcl : |
2487 | adapter->gorcl - adapter->gotcl) / 10000; | |
2488 | uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; | |
2489 | E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256)); | |
2490 | } | |
2491 | ||
2492 | /* Cause software interrupt to ensure rx ring is cleaned */ | |
2493 | E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0); | |
2494 | ||
2648345f | 2495 | /* Force detection of hung controller every watchdog period */ |
1da177e4 LT |
2496 | adapter->detect_tx_hung = TRUE; |
2497 | ||
96838a40 | 2498 | /* With 82571 controllers, LAA may be overwritten due to controller |
868d5309 MC |
2499 | * reset from the other port. Set the appropriate LAA in RAR[0] */ |
2500 | if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present) | |
2501 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2502 | ||
1da177e4 LT |
2503 | /* Reset the timer */ |
2504 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | |
2505 | } | |
2506 | ||
2507 | #define E1000_TX_FLAGS_CSUM 0x00000001 | |
2508 | #define E1000_TX_FLAGS_VLAN 0x00000002 | |
2509 | #define E1000_TX_FLAGS_TSO 0x00000004 | |
2d7edb92 | 2510 | #define E1000_TX_FLAGS_IPV4 0x00000008 |
1da177e4 LT |
2511 | #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 |
2512 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 | |
2513 | ||
e619d523 | 2514 | static int |
581d708e MC |
2515 | e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2516 | struct sk_buff *skb) | |
1da177e4 LT |
2517 | { |
2518 | #ifdef NETIF_F_TSO | |
2519 | struct e1000_context_desc *context_desc; | |
545c67c0 | 2520 | struct e1000_buffer *buffer_info; |
1da177e4 LT |
2521 | unsigned int i; |
2522 | uint32_t cmd_length = 0; | |
2d7edb92 | 2523 | uint16_t ipcse = 0, tucse, mss; |
1da177e4 LT |
2524 | uint8_t ipcss, ipcso, tucss, tucso, hdr_len; |
2525 | int err; | |
2526 | ||
89114afd | 2527 | if (skb_is_gso(skb)) { |
1da177e4 LT |
2528 | if (skb_header_cloned(skb)) { |
2529 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); | |
2530 | if (err) | |
2531 | return err; | |
2532 | } | |
2533 | ||
2534 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | |
7967168c | 2535 | mss = skb_shinfo(skb)->gso_size; |
60828236 | 2536 | if (skb->protocol == htons(ETH_P_IP)) { |
2d7edb92 MC |
2537 | skb->nh.iph->tot_len = 0; |
2538 | skb->nh.iph->check = 0; | |
2539 | skb->h.th->check = | |
2540 | ~csum_tcpudp_magic(skb->nh.iph->saddr, | |
2541 | skb->nh.iph->daddr, | |
2542 | 0, | |
2543 | IPPROTO_TCP, | |
2544 | 0); | |
2545 | cmd_length = E1000_TXD_CMD_IP; | |
2546 | ipcse = skb->h.raw - skb->data - 1; | |
2547 | #ifdef NETIF_F_TSO_IPV6 | |
96838a40 | 2548 | } else if (skb->protocol == ntohs(ETH_P_IPV6)) { |
2d7edb92 MC |
2549 | skb->nh.ipv6h->payload_len = 0; |
2550 | skb->h.th->check = | |
2551 | ~csum_ipv6_magic(&skb->nh.ipv6h->saddr, | |
2552 | &skb->nh.ipv6h->daddr, | |
2553 | 0, | |
2554 | IPPROTO_TCP, | |
2555 | 0); | |
2556 | ipcse = 0; | |
2557 | #endif | |
2558 | } | |
1da177e4 LT |
2559 | ipcss = skb->nh.raw - skb->data; |
2560 | ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data; | |
1da177e4 LT |
2561 | tucss = skb->h.raw - skb->data; |
2562 | tucso = (void *)&(skb->h.th->check) - (void *)skb->data; | |
2563 | tucse = 0; | |
2564 | ||
2565 | cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | | |
2d7edb92 | 2566 | E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); |
1da177e4 | 2567 | |
581d708e MC |
2568 | i = tx_ring->next_to_use; |
2569 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); | |
545c67c0 | 2570 | buffer_info = &tx_ring->buffer_info[i]; |
1da177e4 LT |
2571 | |
2572 | context_desc->lower_setup.ip_fields.ipcss = ipcss; | |
2573 | context_desc->lower_setup.ip_fields.ipcso = ipcso; | |
2574 | context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); | |
2575 | context_desc->upper_setup.tcp_fields.tucss = tucss; | |
2576 | context_desc->upper_setup.tcp_fields.tucso = tucso; | |
2577 | context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); | |
2578 | context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); | |
2579 | context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; | |
2580 | context_desc->cmd_and_length = cpu_to_le32(cmd_length); | |
2581 | ||
545c67c0 JK |
2582 | buffer_info->time_stamp = jiffies; |
2583 | ||
581d708e MC |
2584 | if (++i == tx_ring->count) i = 0; |
2585 | tx_ring->next_to_use = i; | |
1da177e4 | 2586 | |
8241e35e | 2587 | return TRUE; |
1da177e4 LT |
2588 | } |
2589 | #endif | |
2590 | ||
8241e35e | 2591 | return FALSE; |
1da177e4 LT |
2592 | } |
2593 | ||
e619d523 | 2594 | static boolean_t |
581d708e MC |
2595 | e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2596 | struct sk_buff *skb) | |
1da177e4 LT |
2597 | { |
2598 | struct e1000_context_desc *context_desc; | |
545c67c0 | 2599 | struct e1000_buffer *buffer_info; |
1da177e4 LT |
2600 | unsigned int i; |
2601 | uint8_t css; | |
2602 | ||
96838a40 | 2603 | if (likely(skb->ip_summed == CHECKSUM_HW)) { |
1da177e4 LT |
2604 | css = skb->h.raw - skb->data; |
2605 | ||
581d708e | 2606 | i = tx_ring->next_to_use; |
545c67c0 | 2607 | buffer_info = &tx_ring->buffer_info[i]; |
581d708e | 2608 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); |
1da177e4 LT |
2609 | |
2610 | context_desc->upper_setup.tcp_fields.tucss = css; | |
2611 | context_desc->upper_setup.tcp_fields.tucso = css + skb->csum; | |
2612 | context_desc->upper_setup.tcp_fields.tucse = 0; | |
2613 | context_desc->tcp_seg_setup.data = 0; | |
2614 | context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT); | |
2615 | ||
545c67c0 JK |
2616 | buffer_info->time_stamp = jiffies; |
2617 | ||
581d708e MC |
2618 | if (unlikely(++i == tx_ring->count)) i = 0; |
2619 | tx_ring->next_to_use = i; | |
1da177e4 LT |
2620 | |
2621 | return TRUE; | |
2622 | } | |
2623 | ||
2624 | return FALSE; | |
2625 | } | |
2626 | ||
2627 | #define E1000_MAX_TXD_PWR 12 | |
2628 | #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR) | |
2629 | ||
e619d523 | 2630 | static int |
581d708e MC |
2631 | e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2632 | struct sk_buff *skb, unsigned int first, unsigned int max_per_txd, | |
2633 | unsigned int nr_frags, unsigned int mss) | |
1da177e4 | 2634 | { |
1da177e4 LT |
2635 | struct e1000_buffer *buffer_info; |
2636 | unsigned int len = skb->len; | |
2637 | unsigned int offset = 0, size, count = 0, i; | |
2638 | unsigned int f; | |
2639 | len -= skb->data_len; | |
2640 | ||
2641 | i = tx_ring->next_to_use; | |
2642 | ||
96838a40 | 2643 | while (len) { |
1da177e4 LT |
2644 | buffer_info = &tx_ring->buffer_info[i]; |
2645 | size = min(len, max_per_txd); | |
2646 | #ifdef NETIF_F_TSO | |
fd803241 JK |
2647 | /* Workaround for Controller erratum -- |
2648 | * descriptor for non-tso packet in a linear SKB that follows a | |
2649 | * tso gets written back prematurely before the data is fully | |
0f15a8fa | 2650 | * DMA'd to the controller */ |
fd803241 | 2651 | if (!skb->data_len && tx_ring->last_tx_tso && |
89114afd | 2652 | !skb_is_gso(skb)) { |
fd803241 JK |
2653 | tx_ring->last_tx_tso = 0; |
2654 | size -= 4; | |
2655 | } | |
2656 | ||
1da177e4 LT |
2657 | /* Workaround for premature desc write-backs |
2658 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 2659 | if (unlikely(mss && !nr_frags && size == len && size > 8)) |
1da177e4 LT |
2660 | size -= 4; |
2661 | #endif | |
97338bde MC |
2662 | /* work-around for errata 10 and it applies |
2663 | * to all controllers in PCI-X mode | |
2664 | * The fix is to make sure that the first descriptor of a | |
2665 | * packet is smaller than 2048 - 16 - 16 (or 2016) bytes | |
2666 | */ | |
96838a40 | 2667 | if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && |
97338bde MC |
2668 | (size > 2015) && count == 0)) |
2669 | size = 2015; | |
96838a40 | 2670 | |
1da177e4 LT |
2671 | /* Workaround for potential 82544 hang in PCI-X. Avoid |
2672 | * terminating buffers within evenly-aligned dwords. */ | |
96838a40 | 2673 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
2674 | !((unsigned long)(skb->data + offset + size - 1) & 4) && |
2675 | size > 4)) | |
2676 | size -= 4; | |
2677 | ||
2678 | buffer_info->length = size; | |
2679 | buffer_info->dma = | |
2680 | pci_map_single(adapter->pdev, | |
2681 | skb->data + offset, | |
2682 | size, | |
2683 | PCI_DMA_TODEVICE); | |
2684 | buffer_info->time_stamp = jiffies; | |
2685 | ||
2686 | len -= size; | |
2687 | offset += size; | |
2688 | count++; | |
96838a40 | 2689 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2690 | } |
2691 | ||
96838a40 | 2692 | for (f = 0; f < nr_frags; f++) { |
1da177e4 LT |
2693 | struct skb_frag_struct *frag; |
2694 | ||
2695 | frag = &skb_shinfo(skb)->frags[f]; | |
2696 | len = frag->size; | |
2697 | offset = frag->page_offset; | |
2698 | ||
96838a40 | 2699 | while (len) { |
1da177e4 LT |
2700 | buffer_info = &tx_ring->buffer_info[i]; |
2701 | size = min(len, max_per_txd); | |
2702 | #ifdef NETIF_F_TSO | |
2703 | /* Workaround for premature desc write-backs | |
2704 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 2705 | if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8)) |
1da177e4 LT |
2706 | size -= 4; |
2707 | #endif | |
2708 | /* Workaround for potential 82544 hang in PCI-X. | |
2709 | * Avoid terminating buffers within evenly-aligned | |
2710 | * dwords. */ | |
96838a40 | 2711 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
2712 | !((unsigned long)(frag->page+offset+size-1) & 4) && |
2713 | size > 4)) | |
2714 | size -= 4; | |
2715 | ||
2716 | buffer_info->length = size; | |
2717 | buffer_info->dma = | |
2718 | pci_map_page(adapter->pdev, | |
2719 | frag->page, | |
2720 | offset, | |
2721 | size, | |
2722 | PCI_DMA_TODEVICE); | |
2723 | buffer_info->time_stamp = jiffies; | |
2724 | ||
2725 | len -= size; | |
2726 | offset += size; | |
2727 | count++; | |
96838a40 | 2728 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2729 | } |
2730 | } | |
2731 | ||
2732 | i = (i == 0) ? tx_ring->count - 1 : i - 1; | |
2733 | tx_ring->buffer_info[i].skb = skb; | |
2734 | tx_ring->buffer_info[first].next_to_watch = i; | |
2735 | ||
2736 | return count; | |
2737 | } | |
2738 | ||
e619d523 | 2739 | static void |
581d708e MC |
2740 | e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2741 | int tx_flags, int count) | |
1da177e4 | 2742 | { |
1da177e4 LT |
2743 | struct e1000_tx_desc *tx_desc = NULL; |
2744 | struct e1000_buffer *buffer_info; | |
2745 | uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; | |
2746 | unsigned int i; | |
2747 | ||
96838a40 | 2748 | if (likely(tx_flags & E1000_TX_FLAGS_TSO)) { |
1da177e4 LT |
2749 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | |
2750 | E1000_TXD_CMD_TSE; | |
2d7edb92 MC |
2751 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; |
2752 | ||
96838a40 | 2753 | if (likely(tx_flags & E1000_TX_FLAGS_IPV4)) |
2d7edb92 | 2754 | txd_upper |= E1000_TXD_POPTS_IXSM << 8; |
1da177e4 LT |
2755 | } |
2756 | ||
96838a40 | 2757 | if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) { |
1da177e4 LT |
2758 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; |
2759 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; | |
2760 | } | |
2761 | ||
96838a40 | 2762 | if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) { |
1da177e4 LT |
2763 | txd_lower |= E1000_TXD_CMD_VLE; |
2764 | txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); | |
2765 | } | |
2766 | ||
2767 | i = tx_ring->next_to_use; | |
2768 | ||
96838a40 | 2769 | while (count--) { |
1da177e4 LT |
2770 | buffer_info = &tx_ring->buffer_info[i]; |
2771 | tx_desc = E1000_TX_DESC(*tx_ring, i); | |
2772 | tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
2773 | tx_desc->lower.data = | |
2774 | cpu_to_le32(txd_lower | buffer_info->length); | |
2775 | tx_desc->upper.data = cpu_to_le32(txd_upper); | |
96838a40 | 2776 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2777 | } |
2778 | ||
2779 | tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); | |
2780 | ||
2781 | /* Force memory writes to complete before letting h/w | |
2782 | * know there are new descriptors to fetch. (Only | |
2783 | * applicable for weak-ordered memory model archs, | |
2784 | * such as IA-64). */ | |
2785 | wmb(); | |
2786 | ||
2787 | tx_ring->next_to_use = i; | |
581d708e | 2788 | writel(i, adapter->hw.hw_addr + tx_ring->tdt); |
1da177e4 LT |
2789 | } |
2790 | ||
2791 | /** | |
2792 | * 82547 workaround to avoid controller hang in half-duplex environment. | |
2793 | * The workaround is to avoid queuing a large packet that would span | |
2794 | * the internal Tx FIFO ring boundary by notifying the stack to resend | |
2795 | * the packet at a later time. This gives the Tx FIFO an opportunity to | |
2796 | * flush all packets. When that occurs, we reset the Tx FIFO pointers | |
2797 | * to the beginning of the Tx FIFO. | |
2798 | **/ | |
2799 | ||
2800 | #define E1000_FIFO_HDR 0x10 | |
2801 | #define E1000_82547_PAD_LEN 0x3E0 | |
2802 | ||
e619d523 | 2803 | static int |
1da177e4 LT |
2804 | e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb) |
2805 | { | |
2806 | uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; | |
2807 | uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR; | |
2808 | ||
2809 | E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR); | |
2810 | ||
96838a40 | 2811 | if (adapter->link_duplex != HALF_DUPLEX) |
1da177e4 LT |
2812 | goto no_fifo_stall_required; |
2813 | ||
96838a40 | 2814 | if (atomic_read(&adapter->tx_fifo_stall)) |
1da177e4 LT |
2815 | return 1; |
2816 | ||
96838a40 | 2817 | if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) { |
1da177e4 LT |
2818 | atomic_set(&adapter->tx_fifo_stall, 1); |
2819 | return 1; | |
2820 | } | |
2821 | ||
2822 | no_fifo_stall_required: | |
2823 | adapter->tx_fifo_head += skb_fifo_len; | |
96838a40 | 2824 | if (adapter->tx_fifo_head >= adapter->tx_fifo_size) |
1da177e4 LT |
2825 | adapter->tx_fifo_head -= adapter->tx_fifo_size; |
2826 | return 0; | |
2827 | } | |
2828 | ||
2d7edb92 | 2829 | #define MINIMUM_DHCP_PACKET_SIZE 282 |
e619d523 | 2830 | static int |
2d7edb92 MC |
2831 | e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb) |
2832 | { | |
2833 | struct e1000_hw *hw = &adapter->hw; | |
2834 | uint16_t length, offset; | |
96838a40 JB |
2835 | if (vlan_tx_tag_present(skb)) { |
2836 | if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && | |
2d7edb92 MC |
2837 | ( adapter->hw.mng_cookie.status & |
2838 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) ) | |
2839 | return 0; | |
2840 | } | |
20a44028 | 2841 | if (skb->len > MINIMUM_DHCP_PACKET_SIZE) { |
2d7edb92 | 2842 | struct ethhdr *eth = (struct ethhdr *) skb->data; |
96838a40 JB |
2843 | if ((htons(ETH_P_IP) == eth->h_proto)) { |
2844 | const struct iphdr *ip = | |
2d7edb92 | 2845 | (struct iphdr *)((uint8_t *)skb->data+14); |
96838a40 JB |
2846 | if (IPPROTO_UDP == ip->protocol) { |
2847 | struct udphdr *udp = | |
2848 | (struct udphdr *)((uint8_t *)ip + | |
2d7edb92 | 2849 | (ip->ihl << 2)); |
96838a40 | 2850 | if (ntohs(udp->dest) == 67) { |
2d7edb92 MC |
2851 | offset = (uint8_t *)udp + 8 - skb->data; |
2852 | length = skb->len - offset; | |
2853 | ||
2854 | return e1000_mng_write_dhcp_info(hw, | |
96838a40 | 2855 | (uint8_t *)udp + 8, |
2d7edb92 MC |
2856 | length); |
2857 | } | |
2858 | } | |
2859 | } | |
2860 | } | |
2861 | return 0; | |
2862 | } | |
2863 | ||
1da177e4 LT |
2864 | #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) |
2865 | static int | |
2866 | e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |
2867 | { | |
60490fe0 | 2868 | struct e1000_adapter *adapter = netdev_priv(netdev); |
581d708e | 2869 | struct e1000_tx_ring *tx_ring; |
1da177e4 LT |
2870 | unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD; |
2871 | unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; | |
2872 | unsigned int tx_flags = 0; | |
2873 | unsigned int len = skb->len; | |
2874 | unsigned long flags; | |
2875 | unsigned int nr_frags = 0; | |
2876 | unsigned int mss = 0; | |
2877 | int count = 0; | |
76c224bc | 2878 | int tso; |
1da177e4 LT |
2879 | unsigned int f; |
2880 | len -= skb->data_len; | |
2881 | ||
581d708e | 2882 | tx_ring = adapter->tx_ring; |
24025e4e | 2883 | |
581d708e | 2884 | if (unlikely(skb->len <= 0)) { |
1da177e4 LT |
2885 | dev_kfree_skb_any(skb); |
2886 | return NETDEV_TX_OK; | |
2887 | } | |
2888 | ||
2889 | #ifdef NETIF_F_TSO | |
7967168c | 2890 | mss = skb_shinfo(skb)->gso_size; |
76c224bc | 2891 | /* The controller does a simple calculation to |
1da177e4 LT |
2892 | * make sure there is enough room in the FIFO before |
2893 | * initiating the DMA for each buffer. The calc is: | |
2894 | * 4 = ceil(buffer len/mss). To make sure we don't | |
2895 | * overrun the FIFO, adjust the max buffer len if mss | |
2896 | * drops. */ | |
96838a40 | 2897 | if (mss) { |
9a3056da | 2898 | uint8_t hdr_len; |
1da177e4 LT |
2899 | max_per_txd = min(mss << 2, max_per_txd); |
2900 | max_txd_pwr = fls(max_per_txd) - 1; | |
9a3056da | 2901 | |
9f687888 | 2902 | /* TSO Workaround for 82571/2/3 Controllers -- if skb->data |
9a3056da JK |
2903 | * points to just header, pull a few bytes of payload from |
2904 | * frags into skb->data */ | |
2905 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | |
9f687888 JK |
2906 | if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) { |
2907 | switch (adapter->hw.mac_type) { | |
2908 | unsigned int pull_size; | |
2909 | case e1000_82571: | |
2910 | case e1000_82572: | |
2911 | case e1000_82573: | |
cd94dd0b | 2912 | case e1000_ich8lan: |
9f687888 JK |
2913 | pull_size = min((unsigned int)4, skb->data_len); |
2914 | if (!__pskb_pull_tail(skb, pull_size)) { | |
a5eafce2 | 2915 | DPRINTK(DRV, ERR, |
9f687888 JK |
2916 | "__pskb_pull_tail failed.\n"); |
2917 | dev_kfree_skb_any(skb); | |
749dfc70 | 2918 | return NETDEV_TX_OK; |
9f687888 JK |
2919 | } |
2920 | len = skb->len - skb->data_len; | |
2921 | break; | |
2922 | default: | |
2923 | /* do nothing */ | |
2924 | break; | |
d74bbd3b | 2925 | } |
9a3056da | 2926 | } |
1da177e4 LT |
2927 | } |
2928 | ||
9a3056da | 2929 | /* reserve a descriptor for the offload context */ |
96838a40 | 2930 | if ((mss) || (skb->ip_summed == CHECKSUM_HW)) |
1da177e4 | 2931 | count++; |
2648345f | 2932 | count++; |
1da177e4 | 2933 | #else |
96838a40 | 2934 | if (skb->ip_summed == CHECKSUM_HW) |
1da177e4 LT |
2935 | count++; |
2936 | #endif | |
fd803241 JK |
2937 | |
2938 | #ifdef NETIF_F_TSO | |
2939 | /* Controller Erratum workaround */ | |
89114afd | 2940 | if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb)) |
fd803241 JK |
2941 | count++; |
2942 | #endif | |
2943 | ||
1da177e4 LT |
2944 | count += TXD_USE_COUNT(len, max_txd_pwr); |
2945 | ||
96838a40 | 2946 | if (adapter->pcix_82544) |
1da177e4 LT |
2947 | count++; |
2948 | ||
96838a40 | 2949 | /* work-around for errata 10 and it applies to all controllers |
97338bde MC |
2950 | * in PCI-X mode, so add one more descriptor to the count |
2951 | */ | |
96838a40 | 2952 | if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && |
97338bde MC |
2953 | (len > 2015))) |
2954 | count++; | |
2955 | ||
1da177e4 | 2956 | nr_frags = skb_shinfo(skb)->nr_frags; |
96838a40 | 2957 | for (f = 0; f < nr_frags; f++) |
1da177e4 LT |
2958 | count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size, |
2959 | max_txd_pwr); | |
96838a40 | 2960 | if (adapter->pcix_82544) |
1da177e4 LT |
2961 | count += nr_frags; |
2962 | ||
0f15a8fa JK |
2963 | |
2964 | if (adapter->hw.tx_pkt_filtering && | |
2965 | (adapter->hw.mac_type == e1000_82573)) | |
2d7edb92 MC |
2966 | e1000_transfer_dhcp_info(adapter, skb); |
2967 | ||
581d708e MC |
2968 | local_irq_save(flags); |
2969 | if (!spin_trylock(&tx_ring->tx_lock)) { | |
2970 | /* Collision - tell upper layer to requeue */ | |
2971 | local_irq_restore(flags); | |
2972 | return NETDEV_TX_LOCKED; | |
2973 | } | |
1da177e4 LT |
2974 | |
2975 | /* need: count + 2 desc gap to keep tail from touching | |
2976 | * head, otherwise try next time */ | |
581d708e | 2977 | if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) { |
1da177e4 | 2978 | netif_stop_queue(netdev); |
581d708e | 2979 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
2980 | return NETDEV_TX_BUSY; |
2981 | } | |
2982 | ||
96838a40 JB |
2983 | if (unlikely(adapter->hw.mac_type == e1000_82547)) { |
2984 | if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) { | |
1da177e4 LT |
2985 | netif_stop_queue(netdev); |
2986 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies); | |
581d708e | 2987 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
2988 | return NETDEV_TX_BUSY; |
2989 | } | |
2990 | } | |
2991 | ||
96838a40 | 2992 | if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) { |
1da177e4 LT |
2993 | tx_flags |= E1000_TX_FLAGS_VLAN; |
2994 | tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); | |
2995 | } | |
2996 | ||
581d708e | 2997 | first = tx_ring->next_to_use; |
96838a40 | 2998 | |
581d708e | 2999 | tso = e1000_tso(adapter, tx_ring, skb); |
1da177e4 LT |
3000 | if (tso < 0) { |
3001 | dev_kfree_skb_any(skb); | |
581d708e | 3002 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3003 | return NETDEV_TX_OK; |
3004 | } | |
3005 | ||
fd803241 JK |
3006 | if (likely(tso)) { |
3007 | tx_ring->last_tx_tso = 1; | |
1da177e4 | 3008 | tx_flags |= E1000_TX_FLAGS_TSO; |
fd803241 | 3009 | } else if (likely(e1000_tx_csum(adapter, tx_ring, skb))) |
1da177e4 LT |
3010 | tx_flags |= E1000_TX_FLAGS_CSUM; |
3011 | ||
2d7edb92 | 3012 | /* Old method was to assume IPv4 packet by default if TSO was enabled. |
868d5309 | 3013 | * 82571 hardware supports TSO capabilities for IPv6 as well... |
2d7edb92 | 3014 | * no longer assume, we must. */ |
60828236 | 3015 | if (likely(skb->protocol == htons(ETH_P_IP))) |
2d7edb92 MC |
3016 | tx_flags |= E1000_TX_FLAGS_IPV4; |
3017 | ||
581d708e MC |
3018 | e1000_tx_queue(adapter, tx_ring, tx_flags, |
3019 | e1000_tx_map(adapter, tx_ring, skb, first, | |
3020 | max_per_txd, nr_frags, mss)); | |
1da177e4 LT |
3021 | |
3022 | netdev->trans_start = jiffies; | |
3023 | ||
3024 | /* Make sure there is space in the ring for the next send. */ | |
581d708e | 3025 | if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2)) |
1da177e4 LT |
3026 | netif_stop_queue(netdev); |
3027 | ||
581d708e | 3028 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3029 | return NETDEV_TX_OK; |
3030 | } | |
3031 | ||
3032 | /** | |
3033 | * e1000_tx_timeout - Respond to a Tx Hang | |
3034 | * @netdev: network interface device structure | |
3035 | **/ | |
3036 | ||
3037 | static void | |
3038 | e1000_tx_timeout(struct net_device *netdev) | |
3039 | { | |
60490fe0 | 3040 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
3041 | |
3042 | /* Do the reset outside of interrupt context */ | |
87041639 JK |
3043 | adapter->tx_timeout_count++; |
3044 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
3045 | } |
3046 | ||
3047 | static void | |
87041639 | 3048 | e1000_reset_task(struct net_device *netdev) |
1da177e4 | 3049 | { |
60490fe0 | 3050 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3051 | |
2db10a08 | 3052 | e1000_reinit_locked(adapter); |
1da177e4 LT |
3053 | } |
3054 | ||
3055 | /** | |
3056 | * e1000_get_stats - Get System Network Statistics | |
3057 | * @netdev: network interface device structure | |
3058 | * | |
3059 | * Returns the address of the device statistics structure. | |
3060 | * The statistics are actually updated from the timer callback. | |
3061 | **/ | |
3062 | ||
3063 | static struct net_device_stats * | |
3064 | e1000_get_stats(struct net_device *netdev) | |
3065 | { | |
60490fe0 | 3066 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3067 | |
6b7660cd | 3068 | /* only return the current stats */ |
1da177e4 LT |
3069 | return &adapter->net_stats; |
3070 | } | |
3071 | ||
3072 | /** | |
3073 | * e1000_change_mtu - Change the Maximum Transfer Unit | |
3074 | * @netdev: network interface device structure | |
3075 | * @new_mtu: new value for maximum frame size | |
3076 | * | |
3077 | * Returns 0 on success, negative on failure | |
3078 | **/ | |
3079 | ||
3080 | static int | |
3081 | e1000_change_mtu(struct net_device *netdev, int new_mtu) | |
3082 | { | |
60490fe0 | 3083 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3084 | int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; |
85b22eb6 | 3085 | uint16_t eeprom_data = 0; |
1da177e4 | 3086 | |
96838a40 JB |
3087 | if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) || |
3088 | (max_frame > MAX_JUMBO_FRAME_SIZE)) { | |
3089 | DPRINTK(PROBE, ERR, "Invalid MTU setting\n"); | |
1da177e4 | 3090 | return -EINVAL; |
2d7edb92 | 3091 | } |
1da177e4 | 3092 | |
997f5cbd JK |
3093 | /* Adapter-specific max frame size limits. */ |
3094 | switch (adapter->hw.mac_type) { | |
9e2feace | 3095 | case e1000_undefined ... e1000_82542_rev2_1: |
cd94dd0b | 3096 | case e1000_ich8lan: |
997f5cbd JK |
3097 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { |
3098 | DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n"); | |
2d7edb92 | 3099 | return -EINVAL; |
2d7edb92 | 3100 | } |
997f5cbd | 3101 | break; |
85b22eb6 JK |
3102 | case e1000_82573: |
3103 | /* only enable jumbo frames if ASPM is disabled completely | |
3104 | * this means both bits must be zero in 0x1A bits 3:2 */ | |
3105 | e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1, | |
3106 | &eeprom_data); | |
3107 | if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) { | |
3108 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { | |
3109 | DPRINTK(PROBE, ERR, | |
3110 | "Jumbo Frames not supported.\n"); | |
3111 | return -EINVAL; | |
3112 | } | |
3113 | break; | |
3114 | } | |
3115 | /* fall through to get support */ | |
997f5cbd JK |
3116 | case e1000_82571: |
3117 | case e1000_82572: | |
87041639 | 3118 | case e1000_80003es2lan: |
997f5cbd JK |
3119 | #define MAX_STD_JUMBO_FRAME_SIZE 9234 |
3120 | if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) { | |
3121 | DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n"); | |
3122 | return -EINVAL; | |
3123 | } | |
3124 | break; | |
3125 | default: | |
3126 | /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */ | |
3127 | break; | |
1da177e4 LT |
3128 | } |
3129 | ||
87f5032e | 3130 | /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN |
9e2feace AK |
3131 | * means we reserve 2 more, this pushes us to allocate from the next |
3132 | * larger slab size | |
3133 | * i.e. RXBUFFER_2048 --> size-4096 slab */ | |
3134 | ||
3135 | if (max_frame <= E1000_RXBUFFER_256) | |
3136 | adapter->rx_buffer_len = E1000_RXBUFFER_256; | |
3137 | else if (max_frame <= E1000_RXBUFFER_512) | |
3138 | adapter->rx_buffer_len = E1000_RXBUFFER_512; | |
3139 | else if (max_frame <= E1000_RXBUFFER_1024) | |
3140 | adapter->rx_buffer_len = E1000_RXBUFFER_1024; | |
3141 | else if (max_frame <= E1000_RXBUFFER_2048) | |
3142 | adapter->rx_buffer_len = E1000_RXBUFFER_2048; | |
3143 | else if (max_frame <= E1000_RXBUFFER_4096) | |
3144 | adapter->rx_buffer_len = E1000_RXBUFFER_4096; | |
3145 | else if (max_frame <= E1000_RXBUFFER_8192) | |
3146 | adapter->rx_buffer_len = E1000_RXBUFFER_8192; | |
3147 | else if (max_frame <= E1000_RXBUFFER_16384) | |
3148 | adapter->rx_buffer_len = E1000_RXBUFFER_16384; | |
3149 | ||
3150 | /* adjust allocation if LPE protects us, and we aren't using SBP */ | |
9e2feace AK |
3151 | if (!adapter->hw.tbi_compatibility_on && |
3152 | ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) || | |
3153 | (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))) | |
3154 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; | |
997f5cbd | 3155 | |
2d7edb92 MC |
3156 | netdev->mtu = new_mtu; |
3157 | ||
2db10a08 AK |
3158 | if (netif_running(netdev)) |
3159 | e1000_reinit_locked(adapter); | |
1da177e4 | 3160 | |
1da177e4 LT |
3161 | adapter->hw.max_frame_size = max_frame; |
3162 | ||
3163 | return 0; | |
3164 | } | |
3165 | ||
3166 | /** | |
3167 | * e1000_update_stats - Update the board statistics counters | |
3168 | * @adapter: board private structure | |
3169 | **/ | |
3170 | ||
3171 | void | |
3172 | e1000_update_stats(struct e1000_adapter *adapter) | |
3173 | { | |
3174 | struct e1000_hw *hw = &adapter->hw; | |
282f33c9 | 3175 | struct pci_dev *pdev = adapter->pdev; |
1da177e4 LT |
3176 | unsigned long flags; |
3177 | uint16_t phy_tmp; | |
3178 | ||
3179 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF | |
3180 | ||
282f33c9 LV |
3181 | /* |
3182 | * Prevent stats update while adapter is being reset, or if the pci | |
3183 | * connection is down. | |
3184 | */ | |
9026729b | 3185 | if (adapter->link_speed == 0) |
282f33c9 LV |
3186 | return; |
3187 | if (pdev->error_state && pdev->error_state != pci_channel_io_normal) | |
9026729b AK |
3188 | return; |
3189 | ||
1da177e4 LT |
3190 | spin_lock_irqsave(&adapter->stats_lock, flags); |
3191 | ||
3192 | /* these counters are modified from e1000_adjust_tbi_stats, | |
3193 | * called from the interrupt context, so they must only | |
3194 | * be written while holding adapter->stats_lock | |
3195 | */ | |
3196 | ||
3197 | adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS); | |
3198 | adapter->stats.gprc += E1000_READ_REG(hw, GPRC); | |
3199 | adapter->stats.gorcl += E1000_READ_REG(hw, GORCL); | |
3200 | adapter->stats.gorch += E1000_READ_REG(hw, GORCH); | |
3201 | adapter->stats.bprc += E1000_READ_REG(hw, BPRC); | |
3202 | adapter->stats.mprc += E1000_READ_REG(hw, MPRC); | |
3203 | adapter->stats.roc += E1000_READ_REG(hw, ROC); | |
cd94dd0b AK |
3204 | |
3205 | if (adapter->hw.mac_type != e1000_ich8lan) { | |
1da177e4 LT |
3206 | adapter->stats.prc64 += E1000_READ_REG(hw, PRC64); |
3207 | adapter->stats.prc127 += E1000_READ_REG(hw, PRC127); | |
3208 | adapter->stats.prc255 += E1000_READ_REG(hw, PRC255); | |
3209 | adapter->stats.prc511 += E1000_READ_REG(hw, PRC511); | |
3210 | adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023); | |
3211 | adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522); | |
cd94dd0b | 3212 | } |
1da177e4 LT |
3213 | |
3214 | adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS); | |
3215 | adapter->stats.mpc += E1000_READ_REG(hw, MPC); | |
3216 | adapter->stats.scc += E1000_READ_REG(hw, SCC); | |
3217 | adapter->stats.ecol += E1000_READ_REG(hw, ECOL); | |
3218 | adapter->stats.mcc += E1000_READ_REG(hw, MCC); | |
3219 | adapter->stats.latecol += E1000_READ_REG(hw, LATECOL); | |
3220 | adapter->stats.dc += E1000_READ_REG(hw, DC); | |
3221 | adapter->stats.sec += E1000_READ_REG(hw, SEC); | |
3222 | adapter->stats.rlec += E1000_READ_REG(hw, RLEC); | |
3223 | adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC); | |
3224 | adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC); | |
3225 | adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC); | |
3226 | adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC); | |
3227 | adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC); | |
3228 | adapter->stats.gptc += E1000_READ_REG(hw, GPTC); | |
3229 | adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL); | |
3230 | adapter->stats.gotch += E1000_READ_REG(hw, GOTCH); | |
3231 | adapter->stats.rnbc += E1000_READ_REG(hw, RNBC); | |
3232 | adapter->stats.ruc += E1000_READ_REG(hw, RUC); | |
3233 | adapter->stats.rfc += E1000_READ_REG(hw, RFC); | |
3234 | adapter->stats.rjc += E1000_READ_REG(hw, RJC); | |
3235 | adapter->stats.torl += E1000_READ_REG(hw, TORL); | |
3236 | adapter->stats.torh += E1000_READ_REG(hw, TORH); | |
3237 | adapter->stats.totl += E1000_READ_REG(hw, TOTL); | |
3238 | adapter->stats.toth += E1000_READ_REG(hw, TOTH); | |
3239 | adapter->stats.tpr += E1000_READ_REG(hw, TPR); | |
cd94dd0b AK |
3240 | |
3241 | if (adapter->hw.mac_type != e1000_ich8lan) { | |
1da177e4 LT |
3242 | adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64); |
3243 | adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127); | |
3244 | adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255); | |
3245 | adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511); | |
3246 | adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023); | |
3247 | adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522); | |
cd94dd0b AK |
3248 | } |
3249 | ||
1da177e4 LT |
3250 | adapter->stats.mptc += E1000_READ_REG(hw, MPTC); |
3251 | adapter->stats.bptc += E1000_READ_REG(hw, BPTC); | |
3252 | ||
3253 | /* used for adaptive IFS */ | |
3254 | ||
3255 | hw->tx_packet_delta = E1000_READ_REG(hw, TPT); | |
3256 | adapter->stats.tpt += hw->tx_packet_delta; | |
3257 | hw->collision_delta = E1000_READ_REG(hw, COLC); | |
3258 | adapter->stats.colc += hw->collision_delta; | |
3259 | ||
96838a40 | 3260 | if (hw->mac_type >= e1000_82543) { |
1da177e4 LT |
3261 | adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC); |
3262 | adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC); | |
3263 | adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS); | |
3264 | adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR); | |
3265 | adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC); | |
3266 | adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC); | |
3267 | } | |
96838a40 | 3268 | if (hw->mac_type > e1000_82547_rev_2) { |
2d7edb92 MC |
3269 | adapter->stats.iac += E1000_READ_REG(hw, IAC); |
3270 | adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC); | |
cd94dd0b AK |
3271 | |
3272 | if (adapter->hw.mac_type != e1000_ich8lan) { | |
2d7edb92 MC |
3273 | adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC); |
3274 | adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC); | |
3275 | adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC); | |
3276 | adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC); | |
3277 | adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC); | |
3278 | adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC); | |
3279 | adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC); | |
cd94dd0b | 3280 | } |
2d7edb92 | 3281 | } |
1da177e4 LT |
3282 | |
3283 | /* Fill out the OS statistics structure */ | |
3284 | ||
3285 | adapter->net_stats.rx_packets = adapter->stats.gprc; | |
3286 | adapter->net_stats.tx_packets = adapter->stats.gptc; | |
3287 | adapter->net_stats.rx_bytes = adapter->stats.gorcl; | |
3288 | adapter->net_stats.tx_bytes = adapter->stats.gotcl; | |
3289 | adapter->net_stats.multicast = adapter->stats.mprc; | |
3290 | adapter->net_stats.collisions = adapter->stats.colc; | |
3291 | ||
3292 | /* Rx Errors */ | |
3293 | ||
87041639 JK |
3294 | /* RLEC on some newer hardware can be incorrect so build |
3295 | * our own version based on RUC and ROC */ | |
1da177e4 LT |
3296 | adapter->net_stats.rx_errors = adapter->stats.rxerrc + |
3297 | adapter->stats.crcerrs + adapter->stats.algnerrc + | |
87041639 JK |
3298 | adapter->stats.ruc + adapter->stats.roc + |
3299 | adapter->stats.cexterr; | |
87041639 JK |
3300 | adapter->net_stats.rx_length_errors = adapter->stats.ruc + |
3301 | adapter->stats.roc; | |
1da177e4 LT |
3302 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; |
3303 | adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc; | |
1da177e4 LT |
3304 | adapter->net_stats.rx_missed_errors = adapter->stats.mpc; |
3305 | ||
3306 | /* Tx Errors */ | |
3307 | ||
3308 | adapter->net_stats.tx_errors = adapter->stats.ecol + | |
3309 | adapter->stats.latecol; | |
3310 | adapter->net_stats.tx_aborted_errors = adapter->stats.ecol; | |
3311 | adapter->net_stats.tx_window_errors = adapter->stats.latecol; | |
3312 | adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs; | |
3313 | ||
3314 | /* Tx Dropped needs to be maintained elsewhere */ | |
3315 | ||
3316 | /* Phy Stats */ | |
3317 | ||
96838a40 JB |
3318 | if (hw->media_type == e1000_media_type_copper) { |
3319 | if ((adapter->link_speed == SPEED_1000) && | |
1da177e4 LT |
3320 | (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) { |
3321 | phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK; | |
3322 | adapter->phy_stats.idle_errors += phy_tmp; | |
3323 | } | |
3324 | ||
96838a40 | 3325 | if ((hw->mac_type <= e1000_82546) && |
1da177e4 LT |
3326 | (hw->phy_type == e1000_phy_m88) && |
3327 | !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp)) | |
3328 | adapter->phy_stats.receive_errors += phy_tmp; | |
3329 | } | |
3330 | ||
3331 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
3332 | } | |
3333 | ||
3334 | /** | |
3335 | * e1000_intr - Interrupt Handler | |
3336 | * @irq: interrupt number | |
3337 | * @data: pointer to a network interface device structure | |
3338 | * @pt_regs: CPU registers structure | |
3339 | **/ | |
3340 | ||
3341 | static irqreturn_t | |
3342 | e1000_intr(int irq, void *data, struct pt_regs *regs) | |
3343 | { | |
3344 | struct net_device *netdev = data; | |
60490fe0 | 3345 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3346 | struct e1000_hw *hw = &adapter->hw; |
87041639 | 3347 | uint32_t rctl, icr = E1000_READ_REG(hw, ICR); |
1e613fd9 | 3348 | #ifndef CONFIG_E1000_NAPI |
581d708e | 3349 | int i; |
1e613fd9 JK |
3350 | #else |
3351 | /* Interrupt Auto-Mask...upon reading ICR, | |
3352 | * interrupts are masked. No need for the | |
3353 | * IMC write, but it does mean we should | |
3354 | * account for it ASAP. */ | |
3355 | if (likely(hw->mac_type >= e1000_82571)) | |
3356 | atomic_inc(&adapter->irq_sem); | |
be2b28ed | 3357 | #endif |
1da177e4 | 3358 | |
1e613fd9 JK |
3359 | if (unlikely(!icr)) { |
3360 | #ifdef CONFIG_E1000_NAPI | |
3361 | if (hw->mac_type >= e1000_82571) | |
3362 | e1000_irq_enable(adapter); | |
3363 | #endif | |
1da177e4 | 3364 | return IRQ_NONE; /* Not our interrupt */ |
1e613fd9 | 3365 | } |
1da177e4 | 3366 | |
96838a40 | 3367 | if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { |
1da177e4 | 3368 | hw->get_link_status = 1; |
87041639 JK |
3369 | /* 80003ES2LAN workaround-- |
3370 | * For packet buffer work-around on link down event; | |
3371 | * disable receives here in the ISR and | |
3372 | * reset adapter in watchdog | |
3373 | */ | |
3374 | if (netif_carrier_ok(netdev) && | |
3375 | (adapter->hw.mac_type == e1000_80003es2lan)) { | |
3376 | /* disable receives */ | |
3377 | rctl = E1000_READ_REG(hw, RCTL); | |
3378 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
3379 | } | |
1da177e4 LT |
3380 | mod_timer(&adapter->watchdog_timer, jiffies); |
3381 | } | |
3382 | ||
3383 | #ifdef CONFIG_E1000_NAPI | |
1e613fd9 JK |
3384 | if (unlikely(hw->mac_type < e1000_82571)) { |
3385 | atomic_inc(&adapter->irq_sem); | |
3386 | E1000_WRITE_REG(hw, IMC, ~0); | |
3387 | E1000_WRITE_FLUSH(hw); | |
3388 | } | |
d3d9e484 AK |
3389 | if (likely(netif_rx_schedule_prep(netdev))) |
3390 | __netif_rx_schedule(netdev); | |
581d708e MC |
3391 | else |
3392 | e1000_irq_enable(adapter); | |
c1605eb3 | 3393 | #else |
1da177e4 | 3394 | /* Writing IMC and IMS is needed for 82547. |
96838a40 JB |
3395 | * Due to Hub Link bus being occupied, an interrupt |
3396 | * de-assertion message is not able to be sent. | |
3397 | * When an interrupt assertion message is generated later, | |
3398 | * two messages are re-ordered and sent out. | |
3399 | * That causes APIC to think 82547 is in de-assertion | |
3400 | * state, while 82547 is in assertion state, resulting | |
3401 | * in dead lock. Writing IMC forces 82547 into | |
3402 | * de-assertion state. | |
3403 | */ | |
3404 | if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) { | |
1da177e4 | 3405 | atomic_inc(&adapter->irq_sem); |
2648345f | 3406 | E1000_WRITE_REG(hw, IMC, ~0); |
1da177e4 LT |
3407 | } |
3408 | ||
96838a40 JB |
3409 | for (i = 0; i < E1000_MAX_INTR; i++) |
3410 | if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & | |
581d708e | 3411 | !e1000_clean_tx_irq(adapter, adapter->tx_ring))) |
1da177e4 LT |
3412 | break; |
3413 | ||
96838a40 | 3414 | if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) |
1da177e4 | 3415 | e1000_irq_enable(adapter); |
581d708e | 3416 | |
c1605eb3 | 3417 | #endif |
1da177e4 LT |
3418 | |
3419 | return IRQ_HANDLED; | |
3420 | } | |
3421 | ||
3422 | #ifdef CONFIG_E1000_NAPI | |
3423 | /** | |
3424 | * e1000_clean - NAPI Rx polling callback | |
3425 | * @adapter: board private structure | |
3426 | **/ | |
3427 | ||
3428 | static int | |
581d708e | 3429 | e1000_clean(struct net_device *poll_dev, int *budget) |
1da177e4 | 3430 | { |
581d708e MC |
3431 | struct e1000_adapter *adapter; |
3432 | int work_to_do = min(*budget, poll_dev->quota); | |
d3d9e484 | 3433 | int tx_cleaned = 0, work_done = 0; |
581d708e MC |
3434 | |
3435 | /* Must NOT use netdev_priv macro here. */ | |
3436 | adapter = poll_dev->priv; | |
3437 | ||
3438 | /* Keep link state information with original netdev */ | |
d3d9e484 | 3439 | if (!netif_carrier_ok(poll_dev)) |
581d708e | 3440 | goto quit_polling; |
2648345f | 3441 | |
d3d9e484 AK |
3442 | /* e1000_clean is called per-cpu. This lock protects |
3443 | * tx_ring[0] from being cleaned by multiple cpus | |
3444 | * simultaneously. A failure obtaining the lock means | |
3445 | * tx_ring[0] is currently being cleaned anyway. */ | |
3446 | if (spin_trylock(&adapter->tx_queue_lock)) { | |
3447 | tx_cleaned = e1000_clean_tx_irq(adapter, | |
3448 | &adapter->tx_ring[0]); | |
3449 | spin_unlock(&adapter->tx_queue_lock); | |
581d708e MC |
3450 | } |
3451 | ||
d3d9e484 | 3452 | adapter->clean_rx(adapter, &adapter->rx_ring[0], |
581d708e | 3453 | &work_done, work_to_do); |
1da177e4 LT |
3454 | |
3455 | *budget -= work_done; | |
581d708e | 3456 | poll_dev->quota -= work_done; |
96838a40 | 3457 | |
2b02893e | 3458 | /* If no Tx and not enough Rx work done, exit the polling mode */ |
96838a40 | 3459 | if ((!tx_cleaned && (work_done == 0)) || |
d3d9e484 | 3460 | !netif_running(poll_dev)) { |
581d708e MC |
3461 | quit_polling: |
3462 | netif_rx_complete(poll_dev); | |
1da177e4 LT |
3463 | e1000_irq_enable(adapter); |
3464 | return 0; | |
3465 | } | |
3466 | ||
3467 | return 1; | |
3468 | } | |
3469 | ||
3470 | #endif | |
3471 | /** | |
3472 | * e1000_clean_tx_irq - Reclaim resources after transmit completes | |
3473 | * @adapter: board private structure | |
3474 | **/ | |
3475 | ||
3476 | static boolean_t | |
581d708e MC |
3477 | e1000_clean_tx_irq(struct e1000_adapter *adapter, |
3478 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 3479 | { |
1da177e4 LT |
3480 | struct net_device *netdev = adapter->netdev; |
3481 | struct e1000_tx_desc *tx_desc, *eop_desc; | |
3482 | struct e1000_buffer *buffer_info; | |
3483 | unsigned int i, eop; | |
2a1af5d7 JK |
3484 | #ifdef CONFIG_E1000_NAPI |
3485 | unsigned int count = 0; | |
3486 | #endif | |
1da177e4 LT |
3487 | boolean_t cleaned = FALSE; |
3488 | ||
3489 | i = tx_ring->next_to_clean; | |
3490 | eop = tx_ring->buffer_info[i].next_to_watch; | |
3491 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
3492 | ||
581d708e | 3493 | while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) { |
96838a40 | 3494 | for (cleaned = FALSE; !cleaned; ) { |
1da177e4 LT |
3495 | tx_desc = E1000_TX_DESC(*tx_ring, i); |
3496 | buffer_info = &tx_ring->buffer_info[i]; | |
3497 | cleaned = (i == eop); | |
3498 | ||
fd803241 | 3499 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); |
8241e35e | 3500 | memset(tx_desc, 0, sizeof(struct e1000_tx_desc)); |
1da177e4 | 3501 | |
96838a40 | 3502 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 | 3503 | } |
581d708e | 3504 | |
7bfa4816 | 3505 | |
1da177e4 LT |
3506 | eop = tx_ring->buffer_info[i].next_to_watch; |
3507 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
2a1af5d7 JK |
3508 | #ifdef CONFIG_E1000_NAPI |
3509 | #define E1000_TX_WEIGHT 64 | |
3510 | /* weight of a sort for tx, to avoid endless transmit cleanup */ | |
3511 | if (count++ == E1000_TX_WEIGHT) break; | |
3512 | #endif | |
1da177e4 LT |
3513 | } |
3514 | ||
3515 | tx_ring->next_to_clean = i; | |
3516 | ||
77b2aad5 | 3517 | #define TX_WAKE_THRESHOLD 32 |
96838a40 | 3518 | if (unlikely(cleaned && netif_queue_stopped(netdev) && |
77b2aad5 AK |
3519 | netif_carrier_ok(netdev))) { |
3520 | spin_lock(&tx_ring->tx_lock); | |
3521 | if (netif_queue_stopped(netdev) && | |
3522 | (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) | |
3523 | netif_wake_queue(netdev); | |
3524 | spin_unlock(&tx_ring->tx_lock); | |
3525 | } | |
2648345f | 3526 | |
581d708e | 3527 | if (adapter->detect_tx_hung) { |
2648345f | 3528 | /* Detect a transmit hang in hardware, this serializes the |
1da177e4 LT |
3529 | * check with the clearing of time_stamp and movement of i */ |
3530 | adapter->detect_tx_hung = FALSE; | |
392137fa JK |
3531 | if (tx_ring->buffer_info[eop].dma && |
3532 | time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + | |
7e6c9861 | 3533 | (adapter->tx_timeout_factor * HZ)) |
70b8f1e1 | 3534 | && !(E1000_READ_REG(&adapter->hw, STATUS) & |
392137fa | 3535 | E1000_STATUS_TXOFF)) { |
70b8f1e1 MC |
3536 | |
3537 | /* detected Tx unit hang */ | |
c6963ef5 | 3538 | DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n" |
7bfa4816 | 3539 | " Tx Queue <%lu>\n" |
70b8f1e1 MC |
3540 | " TDH <%x>\n" |
3541 | " TDT <%x>\n" | |
3542 | " next_to_use <%x>\n" | |
3543 | " next_to_clean <%x>\n" | |
3544 | "buffer_info[next_to_clean]\n" | |
70b8f1e1 MC |
3545 | " time_stamp <%lx>\n" |
3546 | " next_to_watch <%x>\n" | |
3547 | " jiffies <%lx>\n" | |
3548 | " next_to_watch.status <%x>\n", | |
7bfa4816 JK |
3549 | (unsigned long)((tx_ring - adapter->tx_ring) / |
3550 | sizeof(struct e1000_tx_ring)), | |
581d708e MC |
3551 | readl(adapter->hw.hw_addr + tx_ring->tdh), |
3552 | readl(adapter->hw.hw_addr + tx_ring->tdt), | |
70b8f1e1 | 3553 | tx_ring->next_to_use, |
392137fa JK |
3554 | tx_ring->next_to_clean, |
3555 | tx_ring->buffer_info[eop].time_stamp, | |
70b8f1e1 MC |
3556 | eop, |
3557 | jiffies, | |
3558 | eop_desc->upper.fields.status); | |
1da177e4 | 3559 | netif_stop_queue(netdev); |
70b8f1e1 | 3560 | } |
1da177e4 | 3561 | } |
1da177e4 LT |
3562 | return cleaned; |
3563 | } | |
3564 | ||
3565 | /** | |
3566 | * e1000_rx_checksum - Receive Checksum Offload for 82543 | |
2d7edb92 MC |
3567 | * @adapter: board private structure |
3568 | * @status_err: receive descriptor status and error fields | |
3569 | * @csum: receive descriptor csum field | |
3570 | * @sk_buff: socket buffer with received data | |
1da177e4 LT |
3571 | **/ |
3572 | ||
e619d523 | 3573 | static void |
1da177e4 | 3574 | e1000_rx_checksum(struct e1000_adapter *adapter, |
2d7edb92 MC |
3575 | uint32_t status_err, uint32_t csum, |
3576 | struct sk_buff *skb) | |
1da177e4 | 3577 | { |
2d7edb92 MC |
3578 | uint16_t status = (uint16_t)status_err; |
3579 | uint8_t errors = (uint8_t)(status_err >> 24); | |
3580 | skb->ip_summed = CHECKSUM_NONE; | |
3581 | ||
1da177e4 | 3582 | /* 82543 or newer only */ |
96838a40 | 3583 | if (unlikely(adapter->hw.mac_type < e1000_82543)) return; |
1da177e4 | 3584 | /* Ignore Checksum bit is set */ |
96838a40 | 3585 | if (unlikely(status & E1000_RXD_STAT_IXSM)) return; |
2d7edb92 | 3586 | /* TCP/UDP checksum error bit is set */ |
96838a40 | 3587 | if (unlikely(errors & E1000_RXD_ERR_TCPE)) { |
1da177e4 | 3588 | /* let the stack verify checksum errors */ |
1da177e4 | 3589 | adapter->hw_csum_err++; |
2d7edb92 MC |
3590 | return; |
3591 | } | |
3592 | /* TCP/UDP Checksum has not been calculated */ | |
96838a40 JB |
3593 | if (adapter->hw.mac_type <= e1000_82547_rev_2) { |
3594 | if (!(status & E1000_RXD_STAT_TCPCS)) | |
2d7edb92 | 3595 | return; |
1da177e4 | 3596 | } else { |
96838a40 | 3597 | if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) |
2d7edb92 MC |
3598 | return; |
3599 | } | |
3600 | /* It must be a TCP or UDP packet with a valid checksum */ | |
3601 | if (likely(status & E1000_RXD_STAT_TCPCS)) { | |
1da177e4 LT |
3602 | /* TCP checksum is good */ |
3603 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
2d7edb92 MC |
3604 | } else if (adapter->hw.mac_type > e1000_82547_rev_2) { |
3605 | /* IP fragment with UDP payload */ | |
3606 | /* Hardware complements the payload checksum, so we undo it | |
3607 | * and then put the value in host order for further stack use. | |
3608 | */ | |
3609 | csum = ntohl(csum ^ 0xFFFF); | |
3610 | skb->csum = csum; | |
3611 | skb->ip_summed = CHECKSUM_HW; | |
1da177e4 | 3612 | } |
2d7edb92 | 3613 | adapter->hw_csum_good++; |
1da177e4 LT |
3614 | } |
3615 | ||
3616 | /** | |
2d7edb92 | 3617 | * e1000_clean_rx_irq - Send received data up the network stack; legacy |
1da177e4 LT |
3618 | * @adapter: board private structure |
3619 | **/ | |
3620 | ||
3621 | static boolean_t | |
3622 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
3623 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
3624 | struct e1000_rx_ring *rx_ring, | |
3625 | int *work_done, int work_to_do) | |
1da177e4 | 3626 | #else |
581d708e MC |
3627 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
3628 | struct e1000_rx_ring *rx_ring) | |
1da177e4 LT |
3629 | #endif |
3630 | { | |
1da177e4 LT |
3631 | struct net_device *netdev = adapter->netdev; |
3632 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f JB |
3633 | struct e1000_rx_desc *rx_desc, *next_rxd; |
3634 | struct e1000_buffer *buffer_info, *next_buffer; | |
1da177e4 LT |
3635 | unsigned long flags; |
3636 | uint32_t length; | |
3637 | uint8_t last_byte; | |
3638 | unsigned int i; | |
72d64a43 | 3639 | int cleaned_count = 0; |
a1415ee6 | 3640 | boolean_t cleaned = FALSE; |
1da177e4 LT |
3641 | |
3642 | i = rx_ring->next_to_clean; | |
3643 | rx_desc = E1000_RX_DESC(*rx_ring, i); | |
b92ff8ee | 3644 | buffer_info = &rx_ring->buffer_info[i]; |
1da177e4 | 3645 | |
b92ff8ee | 3646 | while (rx_desc->status & E1000_RXD_STAT_DD) { |
24f476ee | 3647 | struct sk_buff *skb; |
a292ca6e | 3648 | u8 status; |
1da177e4 | 3649 | #ifdef CONFIG_E1000_NAPI |
96838a40 | 3650 | if (*work_done >= work_to_do) |
1da177e4 LT |
3651 | break; |
3652 | (*work_done)++; | |
3653 | #endif | |
a292ca6e | 3654 | status = rx_desc->status; |
b92ff8ee | 3655 | skb = buffer_info->skb; |
86c3d59f JB |
3656 | buffer_info->skb = NULL; |
3657 | ||
30320be8 JK |
3658 | prefetch(skb->data - NET_IP_ALIGN); |
3659 | ||
86c3d59f JB |
3660 | if (++i == rx_ring->count) i = 0; |
3661 | next_rxd = E1000_RX_DESC(*rx_ring, i); | |
30320be8 JK |
3662 | prefetch(next_rxd); |
3663 | ||
86c3d59f | 3664 | next_buffer = &rx_ring->buffer_info[i]; |
86c3d59f | 3665 | |
72d64a43 JK |
3666 | cleaned = TRUE; |
3667 | cleaned_count++; | |
a292ca6e JK |
3668 | pci_unmap_single(pdev, |
3669 | buffer_info->dma, | |
3670 | buffer_info->length, | |
1da177e4 LT |
3671 | PCI_DMA_FROMDEVICE); |
3672 | ||
1da177e4 LT |
3673 | length = le16_to_cpu(rx_desc->length); |
3674 | ||
f235a2ab AK |
3675 | /* adjust length to remove Ethernet CRC */ |
3676 | length -= 4; | |
3677 | ||
a1415ee6 JK |
3678 | if (unlikely(!(status & E1000_RXD_STAT_EOP))) { |
3679 | /* All receives must fit into a single buffer */ | |
3680 | E1000_DBG("%s: Receive packet consumed multiple" | |
3681 | " buffers\n", netdev->name); | |
864c4e45 AK |
3682 | /* recycle */ |
3683 | buffer_info-> skb = skb; | |
1da177e4 LT |
3684 | goto next_desc; |
3685 | } | |
3686 | ||
96838a40 | 3687 | if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) { |
1da177e4 | 3688 | last_byte = *(skb->data + length - 1); |
b92ff8ee | 3689 | if (TBI_ACCEPT(&adapter->hw, status, |
1da177e4 LT |
3690 | rx_desc->errors, length, last_byte)) { |
3691 | spin_lock_irqsave(&adapter->stats_lock, flags); | |
a292ca6e JK |
3692 | e1000_tbi_adjust_stats(&adapter->hw, |
3693 | &adapter->stats, | |
1da177e4 LT |
3694 | length, skb->data); |
3695 | spin_unlock_irqrestore(&adapter->stats_lock, | |
3696 | flags); | |
3697 | length--; | |
3698 | } else { | |
9e2feace AK |
3699 | /* recycle */ |
3700 | buffer_info->skb = skb; | |
1da177e4 LT |
3701 | goto next_desc; |
3702 | } | |
1cb5821f | 3703 | } |
1da177e4 | 3704 | |
a292ca6e JK |
3705 | /* code added for copybreak, this should improve |
3706 | * performance for small packets with large amounts | |
3707 | * of reassembly being done in the stack */ | |
3708 | #define E1000_CB_LENGTH 256 | |
a1415ee6 | 3709 | if (length < E1000_CB_LENGTH) { |
a292ca6e | 3710 | struct sk_buff *new_skb = |
87f5032e | 3711 | netdev_alloc_skb(netdev, length + NET_IP_ALIGN); |
a292ca6e JK |
3712 | if (new_skb) { |
3713 | skb_reserve(new_skb, NET_IP_ALIGN); | |
3714 | new_skb->dev = netdev; | |
3715 | memcpy(new_skb->data - NET_IP_ALIGN, | |
3716 | skb->data - NET_IP_ALIGN, | |
3717 | length + NET_IP_ALIGN); | |
3718 | /* save the skb in buffer_info as good */ | |
3719 | buffer_info->skb = skb; | |
3720 | skb = new_skb; | |
3721 | skb_put(skb, length); | |
3722 | } | |
a1415ee6 JK |
3723 | } else |
3724 | skb_put(skb, length); | |
a292ca6e JK |
3725 | |
3726 | /* end copybreak code */ | |
1da177e4 LT |
3727 | |
3728 | /* Receive Checksum Offload */ | |
a292ca6e JK |
3729 | e1000_rx_checksum(adapter, |
3730 | (uint32_t)(status) | | |
2d7edb92 | 3731 | ((uint32_t)(rx_desc->errors) << 24), |
c3d7a3a4 | 3732 | le16_to_cpu(rx_desc->csum), skb); |
96838a40 | 3733 | |
1da177e4 LT |
3734 | skb->protocol = eth_type_trans(skb, netdev); |
3735 | #ifdef CONFIG_E1000_NAPI | |
96838a40 | 3736 | if (unlikely(adapter->vlgrp && |
a292ca6e | 3737 | (status & E1000_RXD_STAT_VP))) { |
1da177e4 | 3738 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
2d7edb92 MC |
3739 | le16_to_cpu(rx_desc->special) & |
3740 | E1000_RXD_SPC_VLAN_MASK); | |
1da177e4 LT |
3741 | } else { |
3742 | netif_receive_skb(skb); | |
3743 | } | |
3744 | #else /* CONFIG_E1000_NAPI */ | |
96838a40 | 3745 | if (unlikely(adapter->vlgrp && |
b92ff8ee | 3746 | (status & E1000_RXD_STAT_VP))) { |
1da177e4 LT |
3747 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
3748 | le16_to_cpu(rx_desc->special) & | |
3749 | E1000_RXD_SPC_VLAN_MASK); | |
3750 | } else { | |
3751 | netif_rx(skb); | |
3752 | } | |
3753 | #endif /* CONFIG_E1000_NAPI */ | |
3754 | netdev->last_rx = jiffies; | |
3755 | ||
3756 | next_desc: | |
3757 | rx_desc->status = 0; | |
1da177e4 | 3758 | |
72d64a43 JK |
3759 | /* return some buffers to hardware, one at a time is too slow */ |
3760 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
3761 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
3762 | cleaned_count = 0; | |
3763 | } | |
3764 | ||
30320be8 | 3765 | /* use prefetched values */ |
86c3d59f JB |
3766 | rx_desc = next_rxd; |
3767 | buffer_info = next_buffer; | |
1da177e4 | 3768 | } |
1da177e4 | 3769 | rx_ring->next_to_clean = i; |
72d64a43 JK |
3770 | |
3771 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
3772 | if (cleaned_count) | |
3773 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
2d7edb92 MC |
3774 | |
3775 | return cleaned; | |
3776 | } | |
3777 | ||
3778 | /** | |
3779 | * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split | |
3780 | * @adapter: board private structure | |
3781 | **/ | |
3782 | ||
3783 | static boolean_t | |
3784 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
3785 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
3786 | struct e1000_rx_ring *rx_ring, | |
3787 | int *work_done, int work_to_do) | |
2d7edb92 | 3788 | #else |
581d708e MC |
3789 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
3790 | struct e1000_rx_ring *rx_ring) | |
2d7edb92 MC |
3791 | #endif |
3792 | { | |
86c3d59f | 3793 | union e1000_rx_desc_packet_split *rx_desc, *next_rxd; |
2d7edb92 MC |
3794 | struct net_device *netdev = adapter->netdev; |
3795 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f | 3796 | struct e1000_buffer *buffer_info, *next_buffer; |
2d7edb92 MC |
3797 | struct e1000_ps_page *ps_page; |
3798 | struct e1000_ps_page_dma *ps_page_dma; | |
24f476ee | 3799 | struct sk_buff *skb; |
2d7edb92 MC |
3800 | unsigned int i, j; |
3801 | uint32_t length, staterr; | |
72d64a43 | 3802 | int cleaned_count = 0; |
2d7edb92 MC |
3803 | boolean_t cleaned = FALSE; |
3804 | ||
3805 | i = rx_ring->next_to_clean; | |
3806 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); | |
683a38f3 | 3807 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
9e2feace | 3808 | buffer_info = &rx_ring->buffer_info[i]; |
2d7edb92 | 3809 | |
96838a40 | 3810 | while (staterr & E1000_RXD_STAT_DD) { |
2d7edb92 MC |
3811 | ps_page = &rx_ring->ps_page[i]; |
3812 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
3813 | #ifdef CONFIG_E1000_NAPI | |
96838a40 | 3814 | if (unlikely(*work_done >= work_to_do)) |
2d7edb92 MC |
3815 | break; |
3816 | (*work_done)++; | |
3817 | #endif | |
86c3d59f JB |
3818 | skb = buffer_info->skb; |
3819 | ||
30320be8 JK |
3820 | /* in the packet split case this is header only */ |
3821 | prefetch(skb->data - NET_IP_ALIGN); | |
3822 | ||
86c3d59f JB |
3823 | if (++i == rx_ring->count) i = 0; |
3824 | next_rxd = E1000_RX_DESC_PS(*rx_ring, i); | |
30320be8 JK |
3825 | prefetch(next_rxd); |
3826 | ||
86c3d59f | 3827 | next_buffer = &rx_ring->buffer_info[i]; |
86c3d59f | 3828 | |
2d7edb92 | 3829 | cleaned = TRUE; |
72d64a43 | 3830 | cleaned_count++; |
2d7edb92 MC |
3831 | pci_unmap_single(pdev, buffer_info->dma, |
3832 | buffer_info->length, | |
3833 | PCI_DMA_FROMDEVICE); | |
3834 | ||
96838a40 | 3835 | if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) { |
2d7edb92 MC |
3836 | E1000_DBG("%s: Packet Split buffers didn't pick up" |
3837 | " the full packet\n", netdev->name); | |
3838 | dev_kfree_skb_irq(skb); | |
3839 | goto next_desc; | |
3840 | } | |
1da177e4 | 3841 | |
96838a40 | 3842 | if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) { |
2d7edb92 MC |
3843 | dev_kfree_skb_irq(skb); |
3844 | goto next_desc; | |
3845 | } | |
3846 | ||
3847 | length = le16_to_cpu(rx_desc->wb.middle.length0); | |
3848 | ||
96838a40 | 3849 | if (unlikely(!length)) { |
2d7edb92 MC |
3850 | E1000_DBG("%s: Last part of the packet spanning" |
3851 | " multiple descriptors\n", netdev->name); | |
3852 | dev_kfree_skb_irq(skb); | |
3853 | goto next_desc; | |
3854 | } | |
3855 | ||
3856 | /* Good Receive */ | |
3857 | skb_put(skb, length); | |
3858 | ||
dc7c6add JK |
3859 | { |
3860 | /* this looks ugly, but it seems compiler issues make it | |
3861 | more efficient than reusing j */ | |
3862 | int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); | |
3863 | ||
3864 | /* page alloc/put takes too long and effects small packet | |
3865 | * throughput, so unsplit small packets and save the alloc/put*/ | |
9e2feace | 3866 | if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) { |
dc7c6add | 3867 | u8 *vaddr; |
76c224bc | 3868 | /* there is no documentation about how to call |
dc7c6add JK |
3869 | * kmap_atomic, so we can't hold the mapping |
3870 | * very long */ | |
3871 | pci_dma_sync_single_for_cpu(pdev, | |
3872 | ps_page_dma->ps_page_dma[0], | |
3873 | PAGE_SIZE, | |
3874 | PCI_DMA_FROMDEVICE); | |
3875 | vaddr = kmap_atomic(ps_page->ps_page[0], | |
3876 | KM_SKB_DATA_SOFTIRQ); | |
3877 | memcpy(skb->tail, vaddr, l1); | |
3878 | kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); | |
3879 | pci_dma_sync_single_for_device(pdev, | |
3880 | ps_page_dma->ps_page_dma[0], | |
3881 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
f235a2ab AK |
3882 | /* remove the CRC */ |
3883 | l1 -= 4; | |
dc7c6add | 3884 | skb_put(skb, l1); |
dc7c6add JK |
3885 | goto copydone; |
3886 | } /* if */ | |
3887 | } | |
3888 | ||
96838a40 | 3889 | for (j = 0; j < adapter->rx_ps_pages; j++) { |
30320be8 | 3890 | if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j]))) |
2d7edb92 | 3891 | break; |
2d7edb92 MC |
3892 | pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j], |
3893 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
3894 | ps_page_dma->ps_page_dma[j] = 0; | |
329bfd0b JK |
3895 | skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0, |
3896 | length); | |
2d7edb92 | 3897 | ps_page->ps_page[j] = NULL; |
2d7edb92 MC |
3898 | skb->len += length; |
3899 | skb->data_len += length; | |
5d51b80f | 3900 | skb->truesize += length; |
2d7edb92 MC |
3901 | } |
3902 | ||
f235a2ab AK |
3903 | /* strip the ethernet crc, problem is we're using pages now so |
3904 | * this whole operation can get a little cpu intensive */ | |
3905 | pskb_trim(skb, skb->len - 4); | |
3906 | ||
dc7c6add | 3907 | copydone: |
2d7edb92 | 3908 | e1000_rx_checksum(adapter, staterr, |
c3d7a3a4 | 3909 | le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb); |
2d7edb92 MC |
3910 | skb->protocol = eth_type_trans(skb, netdev); |
3911 | ||
96838a40 | 3912 | if (likely(rx_desc->wb.upper.header_status & |
c3d7a3a4 | 3913 | cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))) |
e4c811c9 | 3914 | adapter->rx_hdr_split++; |
2d7edb92 | 3915 | #ifdef CONFIG_E1000_NAPI |
96838a40 | 3916 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
2d7edb92 | 3917 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
683a38f3 MC |
3918 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
3919 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
3920 | } else { |
3921 | netif_receive_skb(skb); | |
3922 | } | |
3923 | #else /* CONFIG_E1000_NAPI */ | |
96838a40 | 3924 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
2d7edb92 | 3925 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
683a38f3 MC |
3926 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
3927 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
3928 | } else { |
3929 | netif_rx(skb); | |
3930 | } | |
3931 | #endif /* CONFIG_E1000_NAPI */ | |
3932 | netdev->last_rx = jiffies; | |
3933 | ||
3934 | next_desc: | |
c3d7a3a4 | 3935 | rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); |
2d7edb92 | 3936 | buffer_info->skb = NULL; |
2d7edb92 | 3937 | |
72d64a43 JK |
3938 | /* return some buffers to hardware, one at a time is too slow */ |
3939 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
3940 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
3941 | cleaned_count = 0; | |
3942 | } | |
3943 | ||
30320be8 | 3944 | /* use prefetched values */ |
86c3d59f JB |
3945 | rx_desc = next_rxd; |
3946 | buffer_info = next_buffer; | |
3947 | ||
683a38f3 | 3948 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
2d7edb92 MC |
3949 | } |
3950 | rx_ring->next_to_clean = i; | |
72d64a43 JK |
3951 | |
3952 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
3953 | if (cleaned_count) | |
3954 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
1da177e4 LT |
3955 | |
3956 | return cleaned; | |
3957 | } | |
3958 | ||
3959 | /** | |
2d7edb92 | 3960 | * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended |
1da177e4 LT |
3961 | * @adapter: address of board private structure |
3962 | **/ | |
3963 | ||
3964 | static void | |
581d708e | 3965 | e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
72d64a43 | 3966 | struct e1000_rx_ring *rx_ring, |
a292ca6e | 3967 | int cleaned_count) |
1da177e4 | 3968 | { |
1da177e4 LT |
3969 | struct net_device *netdev = adapter->netdev; |
3970 | struct pci_dev *pdev = adapter->pdev; | |
3971 | struct e1000_rx_desc *rx_desc; | |
3972 | struct e1000_buffer *buffer_info; | |
3973 | struct sk_buff *skb; | |
2648345f MC |
3974 | unsigned int i; |
3975 | unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN; | |
1da177e4 LT |
3976 | |
3977 | i = rx_ring->next_to_use; | |
3978 | buffer_info = &rx_ring->buffer_info[i]; | |
3979 | ||
a292ca6e JK |
3980 | while (cleaned_count--) { |
3981 | if (!(skb = buffer_info->skb)) | |
87f5032e | 3982 | skb = netdev_alloc_skb(netdev, bufsz); |
a292ca6e JK |
3983 | else { |
3984 | skb_trim(skb, 0); | |
3985 | goto map_skb; | |
3986 | } | |
3987 | ||
96838a40 | 3988 | if (unlikely(!skb)) { |
1da177e4 | 3989 | /* Better luck next round */ |
72d64a43 | 3990 | adapter->alloc_rx_buff_failed++; |
1da177e4 LT |
3991 | break; |
3992 | } | |
3993 | ||
2648345f | 3994 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
3995 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
3996 | struct sk_buff *oldskb = skb; | |
2648345f MC |
3997 | DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes " |
3998 | "at %p\n", bufsz, skb->data); | |
3999 | /* Try again, without freeing the previous */ | |
87f5032e | 4000 | skb = netdev_alloc_skb(netdev, bufsz); |
2648345f | 4001 | /* Failed allocation, critical failure */ |
1da177e4 LT |
4002 | if (!skb) { |
4003 | dev_kfree_skb(oldskb); | |
4004 | break; | |
4005 | } | |
2648345f | 4006 | |
1da177e4 LT |
4007 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
4008 | /* give up */ | |
4009 | dev_kfree_skb(skb); | |
4010 | dev_kfree_skb(oldskb); | |
4011 | break; /* while !buffer_info->skb */ | |
4012 | } else { | |
2648345f | 4013 | /* Use new allocation */ |
1da177e4 LT |
4014 | dev_kfree_skb(oldskb); |
4015 | } | |
4016 | } | |
1da177e4 LT |
4017 | /* Make buffer alignment 2 beyond a 16 byte boundary |
4018 | * this will result in a 16 byte aligned IP header after | |
4019 | * the 14 byte MAC header is removed | |
4020 | */ | |
4021 | skb_reserve(skb, NET_IP_ALIGN); | |
4022 | ||
4023 | skb->dev = netdev; | |
4024 | ||
4025 | buffer_info->skb = skb; | |
4026 | buffer_info->length = adapter->rx_buffer_len; | |
a292ca6e | 4027 | map_skb: |
1da177e4 LT |
4028 | buffer_info->dma = pci_map_single(pdev, |
4029 | skb->data, | |
4030 | adapter->rx_buffer_len, | |
4031 | PCI_DMA_FROMDEVICE); | |
4032 | ||
2648345f MC |
4033 | /* Fix for errata 23, can't cross 64kB boundary */ |
4034 | if (!e1000_check_64k_bound(adapter, | |
4035 | (void *)(unsigned long)buffer_info->dma, | |
4036 | adapter->rx_buffer_len)) { | |
4037 | DPRINTK(RX_ERR, ERR, | |
4038 | "dma align check failed: %u bytes at %p\n", | |
4039 | adapter->rx_buffer_len, | |
4040 | (void *)(unsigned long)buffer_info->dma); | |
1da177e4 LT |
4041 | dev_kfree_skb(skb); |
4042 | buffer_info->skb = NULL; | |
4043 | ||
2648345f | 4044 | pci_unmap_single(pdev, buffer_info->dma, |
1da177e4 LT |
4045 | adapter->rx_buffer_len, |
4046 | PCI_DMA_FROMDEVICE); | |
4047 | ||
4048 | break; /* while !buffer_info->skb */ | |
4049 | } | |
1da177e4 LT |
4050 | rx_desc = E1000_RX_DESC(*rx_ring, i); |
4051 | rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
4052 | ||
96838a40 JB |
4053 | if (unlikely(++i == rx_ring->count)) |
4054 | i = 0; | |
1da177e4 LT |
4055 | buffer_info = &rx_ring->buffer_info[i]; |
4056 | } | |
4057 | ||
b92ff8ee JB |
4058 | if (likely(rx_ring->next_to_use != i)) { |
4059 | rx_ring->next_to_use = i; | |
4060 | if (unlikely(i-- == 0)) | |
4061 | i = (rx_ring->count - 1); | |
4062 | ||
4063 | /* Force memory writes to complete before letting h/w | |
4064 | * know there are new descriptors to fetch. (Only | |
4065 | * applicable for weak-ordered memory model archs, | |
4066 | * such as IA-64). */ | |
4067 | wmb(); | |
4068 | writel(i, adapter->hw.hw_addr + rx_ring->rdt); | |
4069 | } | |
1da177e4 LT |
4070 | } |
4071 | ||
2d7edb92 MC |
4072 | /** |
4073 | * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split | |
4074 | * @adapter: address of board private structure | |
4075 | **/ | |
4076 | ||
4077 | static void | |
581d708e | 4078 | e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, |
72d64a43 JK |
4079 | struct e1000_rx_ring *rx_ring, |
4080 | int cleaned_count) | |
2d7edb92 | 4081 | { |
2d7edb92 MC |
4082 | struct net_device *netdev = adapter->netdev; |
4083 | struct pci_dev *pdev = adapter->pdev; | |
4084 | union e1000_rx_desc_packet_split *rx_desc; | |
4085 | struct e1000_buffer *buffer_info; | |
4086 | struct e1000_ps_page *ps_page; | |
4087 | struct e1000_ps_page_dma *ps_page_dma; | |
4088 | struct sk_buff *skb; | |
4089 | unsigned int i, j; | |
4090 | ||
4091 | i = rx_ring->next_to_use; | |
4092 | buffer_info = &rx_ring->buffer_info[i]; | |
4093 | ps_page = &rx_ring->ps_page[i]; | |
4094 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
4095 | ||
72d64a43 | 4096 | while (cleaned_count--) { |
2d7edb92 MC |
4097 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); |
4098 | ||
96838a40 | 4099 | for (j = 0; j < PS_PAGE_BUFFERS; j++) { |
e4c811c9 MC |
4100 | if (j < adapter->rx_ps_pages) { |
4101 | if (likely(!ps_page->ps_page[j])) { | |
4102 | ps_page->ps_page[j] = | |
4103 | alloc_page(GFP_ATOMIC); | |
b92ff8ee JB |
4104 | if (unlikely(!ps_page->ps_page[j])) { |
4105 | adapter->alloc_rx_buff_failed++; | |
e4c811c9 | 4106 | goto no_buffers; |
b92ff8ee | 4107 | } |
e4c811c9 MC |
4108 | ps_page_dma->ps_page_dma[j] = |
4109 | pci_map_page(pdev, | |
4110 | ps_page->ps_page[j], | |
4111 | 0, PAGE_SIZE, | |
4112 | PCI_DMA_FROMDEVICE); | |
4113 | } | |
4114 | /* Refresh the desc even if buffer_addrs didn't | |
96838a40 | 4115 | * change because each write-back erases |
e4c811c9 MC |
4116 | * this info. |
4117 | */ | |
4118 | rx_desc->read.buffer_addr[j+1] = | |
4119 | cpu_to_le64(ps_page_dma->ps_page_dma[j]); | |
4120 | } else | |
4121 | rx_desc->read.buffer_addr[j+1] = ~0; | |
2d7edb92 MC |
4122 | } |
4123 | ||
87f5032e DM |
4124 | skb = netdev_alloc_skb(netdev, |
4125 | adapter->rx_ps_bsize0 + NET_IP_ALIGN); | |
2d7edb92 | 4126 | |
b92ff8ee JB |
4127 | if (unlikely(!skb)) { |
4128 | adapter->alloc_rx_buff_failed++; | |
2d7edb92 | 4129 | break; |
b92ff8ee | 4130 | } |
2d7edb92 MC |
4131 | |
4132 | /* Make buffer alignment 2 beyond a 16 byte boundary | |
4133 | * this will result in a 16 byte aligned IP header after | |
4134 | * the 14 byte MAC header is removed | |
4135 | */ | |
4136 | skb_reserve(skb, NET_IP_ALIGN); | |
4137 | ||
4138 | skb->dev = netdev; | |
4139 | ||
4140 | buffer_info->skb = skb; | |
4141 | buffer_info->length = adapter->rx_ps_bsize0; | |
4142 | buffer_info->dma = pci_map_single(pdev, skb->data, | |
4143 | adapter->rx_ps_bsize0, | |
4144 | PCI_DMA_FROMDEVICE); | |
4145 | ||
4146 | rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); | |
4147 | ||
96838a40 | 4148 | if (unlikely(++i == rx_ring->count)) i = 0; |
2d7edb92 MC |
4149 | buffer_info = &rx_ring->buffer_info[i]; |
4150 | ps_page = &rx_ring->ps_page[i]; | |
4151 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
4152 | } | |
4153 | ||
4154 | no_buffers: | |
b92ff8ee JB |
4155 | if (likely(rx_ring->next_to_use != i)) { |
4156 | rx_ring->next_to_use = i; | |
4157 | if (unlikely(i-- == 0)) i = (rx_ring->count - 1); | |
4158 | ||
4159 | /* Force memory writes to complete before letting h/w | |
4160 | * know there are new descriptors to fetch. (Only | |
4161 | * applicable for weak-ordered memory model archs, | |
4162 | * such as IA-64). */ | |
4163 | wmb(); | |
4164 | /* Hardware increments by 16 bytes, but packet split | |
4165 | * descriptors are 32 bytes...so we increment tail | |
4166 | * twice as much. | |
4167 | */ | |
4168 | writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt); | |
4169 | } | |
2d7edb92 MC |
4170 | } |
4171 | ||
1da177e4 LT |
4172 | /** |
4173 | * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers. | |
4174 | * @adapter: | |
4175 | **/ | |
4176 | ||
4177 | static void | |
4178 | e1000_smartspeed(struct e1000_adapter *adapter) | |
4179 | { | |
4180 | uint16_t phy_status; | |
4181 | uint16_t phy_ctrl; | |
4182 | ||
96838a40 | 4183 | if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg || |
1da177e4 LT |
4184 | !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL)) |
4185 | return; | |
4186 | ||
96838a40 | 4187 | if (adapter->smartspeed == 0) { |
1da177e4 LT |
4188 | /* If Master/Slave config fault is asserted twice, |
4189 | * we assume back-to-back */ | |
4190 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); | |
96838a40 | 4191 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1da177e4 | 4192 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); |
96838a40 | 4193 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1da177e4 | 4194 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); |
96838a40 | 4195 | if (phy_ctrl & CR_1000T_MS_ENABLE) { |
1da177e4 LT |
4196 | phy_ctrl &= ~CR_1000T_MS_ENABLE; |
4197 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, | |
4198 | phy_ctrl); | |
4199 | adapter->smartspeed++; | |
96838a40 | 4200 | if (!e1000_phy_setup_autoneg(&adapter->hw) && |
1da177e4 LT |
4201 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, |
4202 | &phy_ctrl)) { | |
4203 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
4204 | MII_CR_RESTART_AUTO_NEG); | |
4205 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, | |
4206 | phy_ctrl); | |
4207 | } | |
4208 | } | |
4209 | return; | |
96838a40 | 4210 | } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) { |
1da177e4 LT |
4211 | /* If still no link, perhaps using 2/3 pair cable */ |
4212 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); | |
4213 | phy_ctrl |= CR_1000T_MS_ENABLE; | |
4214 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl); | |
96838a40 | 4215 | if (!e1000_phy_setup_autoneg(&adapter->hw) && |
1da177e4 LT |
4216 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) { |
4217 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
4218 | MII_CR_RESTART_AUTO_NEG); | |
4219 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl); | |
4220 | } | |
4221 | } | |
4222 | /* Restart process after E1000_SMARTSPEED_MAX iterations */ | |
96838a40 | 4223 | if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX) |
1da177e4 LT |
4224 | adapter->smartspeed = 0; |
4225 | } | |
4226 | ||
4227 | /** | |
4228 | * e1000_ioctl - | |
4229 | * @netdev: | |
4230 | * @ifreq: | |
4231 | * @cmd: | |
4232 | **/ | |
4233 | ||
4234 | static int | |
4235 | e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
4236 | { | |
4237 | switch (cmd) { | |
4238 | case SIOCGMIIPHY: | |
4239 | case SIOCGMIIREG: | |
4240 | case SIOCSMIIREG: | |
4241 | return e1000_mii_ioctl(netdev, ifr, cmd); | |
4242 | default: | |
4243 | return -EOPNOTSUPP; | |
4244 | } | |
4245 | } | |
4246 | ||
4247 | /** | |
4248 | * e1000_mii_ioctl - | |
4249 | * @netdev: | |
4250 | * @ifreq: | |
4251 | * @cmd: | |
4252 | **/ | |
4253 | ||
4254 | static int | |
4255 | e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
4256 | { | |
60490fe0 | 4257 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4258 | struct mii_ioctl_data *data = if_mii(ifr); |
4259 | int retval; | |
4260 | uint16_t mii_reg; | |
4261 | uint16_t spddplx; | |
97876fc6 | 4262 | unsigned long flags; |
1da177e4 | 4263 | |
96838a40 | 4264 | if (adapter->hw.media_type != e1000_media_type_copper) |
1da177e4 LT |
4265 | return -EOPNOTSUPP; |
4266 | ||
4267 | switch (cmd) { | |
4268 | case SIOCGMIIPHY: | |
4269 | data->phy_id = adapter->hw.phy_addr; | |
4270 | break; | |
4271 | case SIOCGMIIREG: | |
96838a40 | 4272 | if (!capable(CAP_NET_ADMIN)) |
1da177e4 | 4273 | return -EPERM; |
97876fc6 | 4274 | spin_lock_irqsave(&adapter->stats_lock, flags); |
96838a40 | 4275 | if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, |
97876fc6 MC |
4276 | &data->val_out)) { |
4277 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4278 | return -EIO; |
97876fc6 MC |
4279 | } |
4280 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 LT |
4281 | break; |
4282 | case SIOCSMIIREG: | |
96838a40 | 4283 | if (!capable(CAP_NET_ADMIN)) |
1da177e4 | 4284 | return -EPERM; |
96838a40 | 4285 | if (data->reg_num & ~(0x1F)) |
1da177e4 LT |
4286 | return -EFAULT; |
4287 | mii_reg = data->val_in; | |
97876fc6 | 4288 | spin_lock_irqsave(&adapter->stats_lock, flags); |
96838a40 | 4289 | if (e1000_write_phy_reg(&adapter->hw, data->reg_num, |
97876fc6 MC |
4290 | mii_reg)) { |
4291 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4292 | return -EIO; |
97876fc6 | 4293 | } |
dc86d32a | 4294 | if (adapter->hw.media_type == e1000_media_type_copper) { |
1da177e4 LT |
4295 | switch (data->reg_num) { |
4296 | case PHY_CTRL: | |
96838a40 | 4297 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4298 | break; |
96838a40 | 4299 | if (mii_reg & MII_CR_AUTO_NEG_EN) { |
1da177e4 LT |
4300 | adapter->hw.autoneg = 1; |
4301 | adapter->hw.autoneg_advertised = 0x2F; | |
4302 | } else { | |
4303 | if (mii_reg & 0x40) | |
4304 | spddplx = SPEED_1000; | |
4305 | else if (mii_reg & 0x2000) | |
4306 | spddplx = SPEED_100; | |
4307 | else | |
4308 | spddplx = SPEED_10; | |
4309 | spddplx += (mii_reg & 0x100) | |
cb764326 JK |
4310 | ? DUPLEX_FULL : |
4311 | DUPLEX_HALF; | |
1da177e4 LT |
4312 | retval = e1000_set_spd_dplx(adapter, |
4313 | spddplx); | |
96838a40 | 4314 | if (retval) { |
97876fc6 | 4315 | spin_unlock_irqrestore( |
96838a40 | 4316 | &adapter->stats_lock, |
97876fc6 | 4317 | flags); |
1da177e4 | 4318 | return retval; |
97876fc6 | 4319 | } |
1da177e4 | 4320 | } |
2db10a08 AK |
4321 | if (netif_running(adapter->netdev)) |
4322 | e1000_reinit_locked(adapter); | |
4323 | else | |
1da177e4 LT |
4324 | e1000_reset(adapter); |
4325 | break; | |
4326 | case M88E1000_PHY_SPEC_CTRL: | |
4327 | case M88E1000_EXT_PHY_SPEC_CTRL: | |
96838a40 | 4328 | if (e1000_phy_reset(&adapter->hw)) { |
97876fc6 MC |
4329 | spin_unlock_irqrestore( |
4330 | &adapter->stats_lock, flags); | |
1da177e4 | 4331 | return -EIO; |
97876fc6 | 4332 | } |
1da177e4 LT |
4333 | break; |
4334 | } | |
4335 | } else { | |
4336 | switch (data->reg_num) { | |
4337 | case PHY_CTRL: | |
96838a40 | 4338 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4339 | break; |
2db10a08 AK |
4340 | if (netif_running(adapter->netdev)) |
4341 | e1000_reinit_locked(adapter); | |
4342 | else | |
1da177e4 LT |
4343 | e1000_reset(adapter); |
4344 | break; | |
4345 | } | |
4346 | } | |
97876fc6 | 4347 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
1da177e4 LT |
4348 | break; |
4349 | default: | |
4350 | return -EOPNOTSUPP; | |
4351 | } | |
4352 | return E1000_SUCCESS; | |
4353 | } | |
4354 | ||
4355 | void | |
4356 | e1000_pci_set_mwi(struct e1000_hw *hw) | |
4357 | { | |
4358 | struct e1000_adapter *adapter = hw->back; | |
2648345f | 4359 | int ret_val = pci_set_mwi(adapter->pdev); |
1da177e4 | 4360 | |
96838a40 | 4361 | if (ret_val) |
2648345f | 4362 | DPRINTK(PROBE, ERR, "Error in setting MWI\n"); |
1da177e4 LT |
4363 | } |
4364 | ||
4365 | void | |
4366 | e1000_pci_clear_mwi(struct e1000_hw *hw) | |
4367 | { | |
4368 | struct e1000_adapter *adapter = hw->back; | |
4369 | ||
4370 | pci_clear_mwi(adapter->pdev); | |
4371 | } | |
4372 | ||
4373 | void | |
4374 | e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4375 | { | |
4376 | struct e1000_adapter *adapter = hw->back; | |
4377 | ||
4378 | pci_read_config_word(adapter->pdev, reg, value); | |
4379 | } | |
4380 | ||
4381 | void | |
4382 | e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4383 | { | |
4384 | struct e1000_adapter *adapter = hw->back; | |
4385 | ||
4386 | pci_write_config_word(adapter->pdev, reg, *value); | |
4387 | } | |
4388 | ||
e4c780b1 | 4389 | #if 0 |
1da177e4 LT |
4390 | uint32_t |
4391 | e1000_io_read(struct e1000_hw *hw, unsigned long port) | |
4392 | { | |
4393 | return inl(port); | |
4394 | } | |
e4c780b1 | 4395 | #endif /* 0 */ |
1da177e4 LT |
4396 | |
4397 | void | |
4398 | e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value) | |
4399 | { | |
4400 | outl(value, port); | |
4401 | } | |
4402 | ||
4403 | static void | |
4404 | e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
4405 | { | |
60490fe0 | 4406 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4407 | uint32_t ctrl, rctl; |
4408 | ||
4409 | e1000_irq_disable(adapter); | |
4410 | adapter->vlgrp = grp; | |
4411 | ||
96838a40 | 4412 | if (grp) { |
1da177e4 LT |
4413 | /* enable VLAN tag insert/strip */ |
4414 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4415 | ctrl |= E1000_CTRL_VME; | |
4416 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4417 | ||
cd94dd0b | 4418 | if (adapter->hw.mac_type != e1000_ich8lan) { |
1da177e4 LT |
4419 | /* enable VLAN receive filtering */ |
4420 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4421 | rctl |= E1000_RCTL_VFE; | |
4422 | rctl &= ~E1000_RCTL_CFIEN; | |
4423 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2d7edb92 | 4424 | e1000_update_mng_vlan(adapter); |
cd94dd0b | 4425 | } |
1da177e4 LT |
4426 | } else { |
4427 | /* disable VLAN tag insert/strip */ | |
4428 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4429 | ctrl &= ~E1000_CTRL_VME; | |
4430 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4431 | ||
cd94dd0b | 4432 | if (adapter->hw.mac_type != e1000_ich8lan) { |
1da177e4 LT |
4433 | /* disable VLAN filtering */ |
4434 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4435 | rctl &= ~E1000_RCTL_VFE; | |
4436 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
96838a40 | 4437 | if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) { |
2d7edb92 MC |
4438 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); |
4439 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
4440 | } | |
cd94dd0b | 4441 | } |
1da177e4 LT |
4442 | } |
4443 | ||
4444 | e1000_irq_enable(adapter); | |
4445 | } | |
4446 | ||
4447 | static void | |
4448 | e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid) | |
4449 | { | |
60490fe0 | 4450 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 4451 | uint32_t vfta, index; |
96838a40 JB |
4452 | |
4453 | if ((adapter->hw.mng_cookie.status & | |
4454 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
4455 | (vid == adapter->mng_vlan_id)) | |
2d7edb92 | 4456 | return; |
1da177e4 LT |
4457 | /* add VID to filter table */ |
4458 | index = (vid >> 5) & 0x7F; | |
4459 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
4460 | vfta |= (1 << (vid & 0x1F)); | |
4461 | e1000_write_vfta(&adapter->hw, index, vfta); | |
4462 | } | |
4463 | ||
4464 | static void | |
4465 | e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid) | |
4466 | { | |
60490fe0 | 4467 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4468 | uint32_t vfta, index; |
4469 | ||
4470 | e1000_irq_disable(adapter); | |
4471 | ||
96838a40 | 4472 | if (adapter->vlgrp) |
1da177e4 LT |
4473 | adapter->vlgrp->vlan_devices[vid] = NULL; |
4474 | ||
4475 | e1000_irq_enable(adapter); | |
4476 | ||
96838a40 JB |
4477 | if ((adapter->hw.mng_cookie.status & |
4478 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
ff147013 JK |
4479 | (vid == adapter->mng_vlan_id)) { |
4480 | /* release control to f/w */ | |
4481 | e1000_release_hw_control(adapter); | |
2d7edb92 | 4482 | return; |
ff147013 JK |
4483 | } |
4484 | ||
1da177e4 LT |
4485 | /* remove VID from filter table */ |
4486 | index = (vid >> 5) & 0x7F; | |
4487 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
4488 | vfta &= ~(1 << (vid & 0x1F)); | |
4489 | e1000_write_vfta(&adapter->hw, index, vfta); | |
4490 | } | |
4491 | ||
4492 | static void | |
4493 | e1000_restore_vlan(struct e1000_adapter *adapter) | |
4494 | { | |
4495 | e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp); | |
4496 | ||
96838a40 | 4497 | if (adapter->vlgrp) { |
1da177e4 | 4498 | uint16_t vid; |
96838a40 JB |
4499 | for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { |
4500 | if (!adapter->vlgrp->vlan_devices[vid]) | |
1da177e4 LT |
4501 | continue; |
4502 | e1000_vlan_rx_add_vid(adapter->netdev, vid); | |
4503 | } | |
4504 | } | |
4505 | } | |
4506 | ||
4507 | int | |
4508 | e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx) | |
4509 | { | |
4510 | adapter->hw.autoneg = 0; | |
4511 | ||
6921368f | 4512 | /* Fiber NICs only allow 1000 gbps Full duplex */ |
96838a40 | 4513 | if ((adapter->hw.media_type == e1000_media_type_fiber) && |
6921368f MC |
4514 | spddplx != (SPEED_1000 + DUPLEX_FULL)) { |
4515 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); | |
4516 | return -EINVAL; | |
4517 | } | |
4518 | ||
96838a40 | 4519 | switch (spddplx) { |
1da177e4 LT |
4520 | case SPEED_10 + DUPLEX_HALF: |
4521 | adapter->hw.forced_speed_duplex = e1000_10_half; | |
4522 | break; | |
4523 | case SPEED_10 + DUPLEX_FULL: | |
4524 | adapter->hw.forced_speed_duplex = e1000_10_full; | |
4525 | break; | |
4526 | case SPEED_100 + DUPLEX_HALF: | |
4527 | adapter->hw.forced_speed_duplex = e1000_100_half; | |
4528 | break; | |
4529 | case SPEED_100 + DUPLEX_FULL: | |
4530 | adapter->hw.forced_speed_duplex = e1000_100_full; | |
4531 | break; | |
4532 | case SPEED_1000 + DUPLEX_FULL: | |
4533 | adapter->hw.autoneg = 1; | |
4534 | adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL; | |
4535 | break; | |
4536 | case SPEED_1000 + DUPLEX_HALF: /* not supported */ | |
4537 | default: | |
2648345f | 4538 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); |
1da177e4 LT |
4539 | return -EINVAL; |
4540 | } | |
4541 | return 0; | |
4542 | } | |
4543 | ||
b6a1d5f8 | 4544 | #ifdef CONFIG_PM |
0f15a8fa JK |
4545 | /* Save/restore 16 or 64 dwords of PCI config space depending on which |
4546 | * bus we're on (PCI(X) vs. PCI-E) | |
2f82665f JB |
4547 | */ |
4548 | #define PCIE_CONFIG_SPACE_LEN 256 | |
4549 | #define PCI_CONFIG_SPACE_LEN 64 | |
4550 | static int | |
4551 | e1000_pci_save_state(struct e1000_adapter *adapter) | |
4552 | { | |
4553 | struct pci_dev *dev = adapter->pdev; | |
4554 | int size; | |
4555 | int i; | |
0f15a8fa | 4556 | |
2f82665f JB |
4557 | if (adapter->hw.mac_type >= e1000_82571) |
4558 | size = PCIE_CONFIG_SPACE_LEN; | |
4559 | else | |
4560 | size = PCI_CONFIG_SPACE_LEN; | |
4561 | ||
4562 | WARN_ON(adapter->config_space != NULL); | |
4563 | ||
4564 | adapter->config_space = kmalloc(size, GFP_KERNEL); | |
4565 | if (!adapter->config_space) { | |
4566 | DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size); | |
4567 | return -ENOMEM; | |
4568 | } | |
4569 | for (i = 0; i < (size / 4); i++) | |
4570 | pci_read_config_dword(dev, i * 4, &adapter->config_space[i]); | |
4571 | return 0; | |
4572 | } | |
4573 | ||
4574 | static void | |
4575 | e1000_pci_restore_state(struct e1000_adapter *adapter) | |
4576 | { | |
4577 | struct pci_dev *dev = adapter->pdev; | |
4578 | int size; | |
4579 | int i; | |
0f15a8fa | 4580 | |
2f82665f JB |
4581 | if (adapter->config_space == NULL) |
4582 | return; | |
0f15a8fa | 4583 | |
2f82665f JB |
4584 | if (adapter->hw.mac_type >= e1000_82571) |
4585 | size = PCIE_CONFIG_SPACE_LEN; | |
4586 | else | |
4587 | size = PCI_CONFIG_SPACE_LEN; | |
4588 | for (i = 0; i < (size / 4); i++) | |
4589 | pci_write_config_dword(dev, i * 4, adapter->config_space[i]); | |
4590 | kfree(adapter->config_space); | |
4591 | adapter->config_space = NULL; | |
4592 | return; | |
4593 | } | |
4594 | #endif /* CONFIG_PM */ | |
4595 | ||
1da177e4 | 4596 | static int |
829ca9a3 | 4597 | e1000_suspend(struct pci_dev *pdev, pm_message_t state) |
1da177e4 LT |
4598 | { |
4599 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 4600 | struct e1000_adapter *adapter = netdev_priv(netdev); |
b55ccb35 | 4601 | uint32_t ctrl, ctrl_ext, rctl, manc, status; |
1da177e4 | 4602 | uint32_t wufc = adapter->wol; |
6fdfef16 | 4603 | #ifdef CONFIG_PM |
240b1710 | 4604 | int retval = 0; |
6fdfef16 | 4605 | #endif |
1da177e4 LT |
4606 | |
4607 | netif_device_detach(netdev); | |
4608 | ||
2db10a08 AK |
4609 | if (netif_running(netdev)) { |
4610 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); | |
1da177e4 | 4611 | e1000_down(adapter); |
2db10a08 | 4612 | } |
1da177e4 | 4613 | |
2f82665f | 4614 | #ifdef CONFIG_PM |
0f15a8fa JK |
4615 | /* Implement our own version of pci_save_state(pdev) because pci- |
4616 | * express adapters have 256-byte config spaces. */ | |
2f82665f JB |
4617 | retval = e1000_pci_save_state(adapter); |
4618 | if (retval) | |
4619 | return retval; | |
4620 | #endif | |
4621 | ||
1da177e4 | 4622 | status = E1000_READ_REG(&adapter->hw, STATUS); |
96838a40 | 4623 | if (status & E1000_STATUS_LU) |
1da177e4 LT |
4624 | wufc &= ~E1000_WUFC_LNKC; |
4625 | ||
96838a40 | 4626 | if (wufc) { |
1da177e4 LT |
4627 | e1000_setup_rctl(adapter); |
4628 | e1000_set_multi(netdev); | |
4629 | ||
4630 | /* turn on all-multi mode if wake on multicast is enabled */ | |
96838a40 | 4631 | if (adapter->wol & E1000_WUFC_MC) { |
1da177e4 LT |
4632 | rctl = E1000_READ_REG(&adapter->hw, RCTL); |
4633 | rctl |= E1000_RCTL_MPE; | |
4634 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
4635 | } | |
4636 | ||
96838a40 | 4637 | if (adapter->hw.mac_type >= e1000_82540) { |
1da177e4 LT |
4638 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); |
4639 | /* advertise wake from D3Cold */ | |
4640 | #define E1000_CTRL_ADVD3WUC 0x00100000 | |
4641 | /* phy power management enable */ | |
4642 | #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 | |
4643 | ctrl |= E1000_CTRL_ADVD3WUC | | |
4644 | E1000_CTRL_EN_PHY_PWR_MGMT; | |
4645 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4646 | } | |
4647 | ||
96838a40 | 4648 | if (adapter->hw.media_type == e1000_media_type_fiber || |
1da177e4 LT |
4649 | adapter->hw.media_type == e1000_media_type_internal_serdes) { |
4650 | /* keep the laser running in D3 */ | |
4651 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
4652 | ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA; | |
4653 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext); | |
4654 | } | |
4655 | ||
2d7edb92 MC |
4656 | /* Allow time for pending master requests to run */ |
4657 | e1000_disable_pciex_master(&adapter->hw); | |
4658 | ||
1da177e4 LT |
4659 | E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN); |
4660 | E1000_WRITE_REG(&adapter->hw, WUFC, wufc); | |
d0e027db AK |
4661 | pci_enable_wake(pdev, PCI_D3hot, 1); |
4662 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1da177e4 LT |
4663 | } else { |
4664 | E1000_WRITE_REG(&adapter->hw, WUC, 0); | |
4665 | E1000_WRITE_REG(&adapter->hw, WUFC, 0); | |
d0e027db AK |
4666 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4667 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 LT |
4668 | } |
4669 | ||
cd94dd0b | 4670 | /* FIXME: this code is incorrect for PCI Express */ |
96838a40 | 4671 | if (adapter->hw.mac_type >= e1000_82540 && |
cd94dd0b | 4672 | adapter->hw.mac_type != e1000_ich8lan && |
1da177e4 LT |
4673 | adapter->hw.media_type == e1000_media_type_copper) { |
4674 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
96838a40 | 4675 | if (manc & E1000_MANC_SMBUS_EN) { |
1da177e4 LT |
4676 | manc |= E1000_MANC_ARP_EN; |
4677 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
d0e027db AK |
4678 | pci_enable_wake(pdev, PCI_D3hot, 1); |
4679 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1da177e4 LT |
4680 | } |
4681 | } | |
4682 | ||
cd94dd0b AK |
4683 | if (adapter->hw.phy_type == e1000_phy_igp_3) |
4684 | e1000_phy_powerdown_workaround(&adapter->hw); | |
4685 | ||
b55ccb35 JK |
4686 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
4687 | * would have already happened in close and is redundant. */ | |
4688 | e1000_release_hw_control(adapter); | |
2d7edb92 | 4689 | |
1da177e4 | 4690 | pci_disable_device(pdev); |
240b1710 | 4691 | |
d0e027db | 4692 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
1da177e4 LT |
4693 | |
4694 | return 0; | |
4695 | } | |
4696 | ||
2f82665f | 4697 | #ifdef CONFIG_PM |
1da177e4 LT |
4698 | static int |
4699 | e1000_resume(struct pci_dev *pdev) | |
4700 | { | |
4701 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 4702 | struct e1000_adapter *adapter = netdev_priv(netdev); |
b55ccb35 | 4703 | uint32_t manc, ret_val; |
1da177e4 | 4704 | |
d0e027db | 4705 | pci_set_power_state(pdev, PCI_D0); |
2f82665f | 4706 | e1000_pci_restore_state(adapter); |
2b02893e | 4707 | ret_val = pci_enable_device(pdev); |
a4cb847d | 4708 | pci_set_master(pdev); |
1da177e4 | 4709 | |
d0e027db AK |
4710 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4711 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 LT |
4712 | |
4713 | e1000_reset(adapter); | |
4714 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | |
4715 | ||
96838a40 | 4716 | if (netif_running(netdev)) |
1da177e4 LT |
4717 | e1000_up(adapter); |
4718 | ||
4719 | netif_device_attach(netdev); | |
4720 | ||
cd94dd0b | 4721 | /* FIXME: this code is incorrect for PCI Express */ |
96838a40 | 4722 | if (adapter->hw.mac_type >= e1000_82540 && |
cd94dd0b | 4723 | adapter->hw.mac_type != e1000_ich8lan && |
1da177e4 LT |
4724 | adapter->hw.media_type == e1000_media_type_copper) { |
4725 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
4726 | manc &= ~(E1000_MANC_ARP_EN); | |
4727 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
4728 | } | |
4729 | ||
b55ccb35 JK |
4730 | /* If the controller is 82573 and f/w is AMT, do not set |
4731 | * DRV_LOAD until the interface is up. For all other cases, | |
4732 | * let the f/w know that the h/w is now under the control | |
4733 | * of the driver. */ | |
4734 | if (adapter->hw.mac_type != e1000_82573 || | |
4735 | !e1000_check_mng_mode(&adapter->hw)) | |
4736 | e1000_get_hw_control(adapter); | |
2d7edb92 | 4737 | |
1da177e4 LT |
4738 | return 0; |
4739 | } | |
4740 | #endif | |
c653e635 AK |
4741 | |
4742 | static void e1000_shutdown(struct pci_dev *pdev) | |
4743 | { | |
4744 | e1000_suspend(pdev, PMSG_SUSPEND); | |
4745 | } | |
4746 | ||
1da177e4 LT |
4747 | #ifdef CONFIG_NET_POLL_CONTROLLER |
4748 | /* | |
4749 | * Polling 'interrupt' - used by things like netconsole to send skbs | |
4750 | * without having to re-enable interrupts. It's not called while | |
4751 | * the interrupt routine is executing. | |
4752 | */ | |
4753 | static void | |
2648345f | 4754 | e1000_netpoll(struct net_device *netdev) |
1da177e4 | 4755 | { |
60490fe0 | 4756 | struct e1000_adapter *adapter = netdev_priv(netdev); |
d3d9e484 | 4757 | |
1da177e4 LT |
4758 | disable_irq(adapter->pdev->irq); |
4759 | e1000_intr(adapter->pdev->irq, netdev, NULL); | |
c4cfe567 | 4760 | e1000_clean_tx_irq(adapter, adapter->tx_ring); |
e8da8be1 JK |
4761 | #ifndef CONFIG_E1000_NAPI |
4762 | adapter->clean_rx(adapter, adapter->rx_ring); | |
4763 | #endif | |
1da177e4 LT |
4764 | enable_irq(adapter->pdev->irq); |
4765 | } | |
4766 | #endif | |
4767 | ||
9026729b AK |
4768 | /** |
4769 | * e1000_io_error_detected - called when PCI error is detected | |
4770 | * @pdev: Pointer to PCI device | |
4771 | * @state: The current pci conneection state | |
4772 | * | |
4773 | * This function is called after a PCI bus error affecting | |
4774 | * this device has been detected. | |
4775 | */ | |
4776 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) | |
4777 | { | |
4778 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4779 | struct e1000_adapter *adapter = netdev->priv; | |
4780 | ||
4781 | netif_device_detach(netdev); | |
4782 | ||
4783 | if (netif_running(netdev)) | |
4784 | e1000_down(adapter); | |
4785 | ||
4786 | /* Request a slot slot reset. */ | |
4787 | return PCI_ERS_RESULT_NEED_RESET; | |
4788 | } | |
4789 | ||
4790 | /** | |
4791 | * e1000_io_slot_reset - called after the pci bus has been reset. | |
4792 | * @pdev: Pointer to PCI device | |
4793 | * | |
4794 | * Restart the card from scratch, as if from a cold-boot. Implementation | |
4795 | * resembles the first-half of the e1000_resume routine. | |
4796 | */ | |
4797 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) | |
4798 | { | |
4799 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4800 | struct e1000_adapter *adapter = netdev->priv; | |
4801 | ||
4802 | if (pci_enable_device(pdev)) { | |
4803 | printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n"); | |
4804 | return PCI_ERS_RESULT_DISCONNECT; | |
4805 | } | |
4806 | pci_set_master(pdev); | |
4807 | ||
4808 | pci_enable_wake(pdev, 3, 0); | |
4809 | pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */ | |
4810 | ||
4811 | /* Perform card reset only on one instance of the card */ | |
4812 | if (PCI_FUNC (pdev->devfn) != 0) | |
4813 | return PCI_ERS_RESULT_RECOVERED; | |
4814 | ||
4815 | e1000_reset(adapter); | |
4816 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | |
4817 | ||
4818 | return PCI_ERS_RESULT_RECOVERED; | |
4819 | } | |
4820 | ||
4821 | /** | |
4822 | * e1000_io_resume - called when traffic can start flowing again. | |
4823 | * @pdev: Pointer to PCI device | |
4824 | * | |
4825 | * This callback is called when the error recovery driver tells us that | |
4826 | * its OK to resume normal operation. Implementation resembles the | |
4827 | * second-half of the e1000_resume routine. | |
4828 | */ | |
4829 | static void e1000_io_resume(struct pci_dev *pdev) | |
4830 | { | |
4831 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4832 | struct e1000_adapter *adapter = netdev->priv; | |
4833 | uint32_t manc, swsm; | |
4834 | ||
4835 | if (netif_running(netdev)) { | |
4836 | if (e1000_up(adapter)) { | |
4837 | printk("e1000: can't bring device back up after reset\n"); | |
4838 | return; | |
4839 | } | |
4840 | } | |
4841 | ||
4842 | netif_device_attach(netdev); | |
4843 | ||
4844 | if (adapter->hw.mac_type >= e1000_82540 && | |
4845 | adapter->hw.media_type == e1000_media_type_copper) { | |
4846 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
4847 | manc &= ~(E1000_MANC_ARP_EN); | |
4848 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
4849 | } | |
4850 | ||
4851 | switch (adapter->hw.mac_type) { | |
4852 | case e1000_82573: | |
4853 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
4854 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
4855 | swsm | E1000_SWSM_DRV_LOAD); | |
4856 | break; | |
4857 | default: | |
4858 | break; | |
4859 | } | |
4860 | ||
4861 | if (netif_running(netdev)) | |
4862 | mod_timer(&adapter->watchdog_timer, jiffies); | |
4863 | } | |
4864 | ||
1da177e4 | 4865 | /* e1000_main.c */ |