[PATCH] prism54: correct overly aggressive check of return from pci_set_mwi
[linux-2.6-block.git] / drivers / net / e1000 / e1000_ethtool.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2
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3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
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16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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LT
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include "e1000.h"
32
33#include <asm/uaccess.h>
34
35574764
NN
35extern char e1000_driver_name[];
36extern char e1000_driver_version[];
37
38extern int e1000_up(struct e1000_adapter *adapter);
39extern void e1000_down(struct e1000_adapter *adapter);
40extern void e1000_reinit_locked(struct e1000_adapter *adapter);
41extern void e1000_reset(struct e1000_adapter *adapter);
42extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
43extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
44extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
45extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
46extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
47extern void e1000_update_stats(struct e1000_adapter *adapter);
48
49
1da177e4
LT
50struct e1000_stats {
51 char stat_string[ETH_GSTRING_LEN];
52 int sizeof_stat;
53 int stat_offset;
54};
55
56#define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
57 offsetof(struct e1000_adapter, m)
58static const struct e1000_stats e1000_gstrings_stats[] = {
49559854
MW
59 { "rx_packets", E1000_STAT(stats.gprc) },
60 { "tx_packets", E1000_STAT(stats.gptc) },
61 { "rx_bytes", E1000_STAT(stats.gorcl) },
62 { "tx_bytes", E1000_STAT(stats.gotcl) },
63 { "rx_broadcast", E1000_STAT(stats.bprc) },
64 { "tx_broadcast", E1000_STAT(stats.bptc) },
65 { "rx_multicast", E1000_STAT(stats.mprc) },
66 { "tx_multicast", E1000_STAT(stats.mptc) },
67 { "rx_errors", E1000_STAT(stats.rxerrc) },
68 { "tx_errors", E1000_STAT(stats.txerrc) },
1da177e4 69 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
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MW
70 { "multicast", E1000_STAT(stats.mprc) },
71 { "collisions", E1000_STAT(stats.colc) },
72 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
1da177e4 73 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
49559854 74 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
1da177e4 75 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
2648345f 76 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
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MW
77 { "rx_missed_errors", E1000_STAT(stats.mpc) },
78 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
79 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
1da177e4
LT
80 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
81 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
49559854 82 { "tx_window_errors", E1000_STAT(stats.latecol) },
1da177e4
LT
83 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
84 { "tx_deferred_ok", E1000_STAT(stats.dc) },
85 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
86 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
6b7660cd 87 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
fcfb1224 88 { "tx_restart_queue", E1000_STAT(restart_queue) },
1da177e4
LT
89 { "rx_long_length_errors", E1000_STAT(stats.roc) },
90 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
91 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
92 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
93 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
94 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
95 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
96 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
97 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
98 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
99 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
e4c811c9
MC
100 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
101 { "rx_header_split", E1000_STAT(rx_hdr_split) },
6b7660cd 102 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
1da177e4 103};
7bfa4816 104
7bfa4816 105#define E1000_QUEUE_STATS_LEN 0
7bfa4816 106#define E1000_GLOBAL_STATS_LEN \
1da177e4 107 sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
7bfa4816 108#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
1da177e4
LT
109static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
110 "Register test (offline)", "Eeprom test (offline)",
111 "Interrupt test (offline)", "Loopback test (offline)",
112 "Link test (on/offline)"
113};
114#define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
115
116static int
117e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
118{
60490fe0 119 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
120 struct e1000_hw *hw = &adapter->hw;
121
96838a40 122 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT
123
124 ecmd->supported = (SUPPORTED_10baseT_Half |
125 SUPPORTED_10baseT_Full |
126 SUPPORTED_100baseT_Half |
127 SUPPORTED_100baseT_Full |
128 SUPPORTED_1000baseT_Full|
129 SUPPORTED_Autoneg |
130 SUPPORTED_TP);
cd94dd0b
AK
131 if (hw->phy_type == e1000_phy_ife)
132 ecmd->supported &= ~SUPPORTED_1000baseT_Full;
1da177e4
LT
133 ecmd->advertising = ADVERTISED_TP;
134
96838a40 135 if (hw->autoneg == 1) {
1da177e4 136 ecmd->advertising |= ADVERTISED_Autoneg;
1da177e4 137 /* the e1000 autoneg seems to match ethtool nicely */
1da177e4
LT
138 ecmd->advertising |= hw->autoneg_advertised;
139 }
140
141 ecmd->port = PORT_TP;
142 ecmd->phy_address = hw->phy_addr;
143
96838a40 144 if (hw->mac_type == e1000_82543)
1da177e4
LT
145 ecmd->transceiver = XCVR_EXTERNAL;
146 else
147 ecmd->transceiver = XCVR_INTERNAL;
148
149 } else {
150 ecmd->supported = (SUPPORTED_1000baseT_Full |
151 SUPPORTED_FIBRE |
152 SUPPORTED_Autoneg);
153
012609a8
MC
154 ecmd->advertising = (ADVERTISED_1000baseT_Full |
155 ADVERTISED_FIBRE |
156 ADVERTISED_Autoneg);
1da177e4
LT
157
158 ecmd->port = PORT_FIBRE;
159
96838a40 160 if (hw->mac_type >= e1000_82545)
1da177e4
LT
161 ecmd->transceiver = XCVR_INTERNAL;
162 else
163 ecmd->transceiver = XCVR_EXTERNAL;
164 }
165
96838a40 166 if (netif_carrier_ok(adapter->netdev)) {
1da177e4
LT
167
168 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
169 &adapter->link_duplex);
170 ecmd->speed = adapter->link_speed;
171
172 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
173 * and HALF_DUPLEX != DUPLEX_HALF */
174
96838a40 175 if (adapter->link_duplex == FULL_DUPLEX)
1da177e4
LT
176 ecmd->duplex = DUPLEX_FULL;
177 else
178 ecmd->duplex = DUPLEX_HALF;
179 } else {
180 ecmd->speed = -1;
181 ecmd->duplex = -1;
182 }
183
184 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
185 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
186 return 0;
187}
188
189static int
190e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
191{
60490fe0 192 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
193 struct e1000_hw *hw = &adapter->hw;
194
57128197
JK
195 /* When SoL/IDER sessions are active, autoneg/speed/duplex
196 * cannot be changed */
197 if (e1000_check_phy_reset_block(hw)) {
198 DPRINTK(DRV, ERR, "Cannot change link characteristics "
199 "when SoL/IDER is active.\n");
200 return -EINVAL;
201 }
202
1a821ca5
JB
203 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
204 msleep(1);
205
57128197 206 if (ecmd->autoneg == AUTONEG_ENABLE) {
1da177e4 207 hw->autoneg = 1;
96838a40 208 if (hw->media_type == e1000_media_type_fiber)
012609a8
MC
209 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
210 ADVERTISED_FIBRE |
211 ADVERTISED_Autoneg;
96838a40 212 else
2f2ca263
JK
213 hw->autoneg_advertised = ecmd->advertising |
214 ADVERTISED_TP |
215 ADVERTISED_Autoneg;
012609a8 216 ecmd->advertising = hw->autoneg_advertised;
1da177e4 217 } else
1a821ca5
JB
218 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
219 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 220 return -EINVAL;
1a821ca5 221 }
1da177e4
LT
222
223 /* reset the link */
224
1a821ca5
JB
225 if (netif_running(adapter->netdev)) {
226 e1000_down(adapter);
227 e1000_up(adapter);
228 } else
1da177e4
LT
229 e1000_reset(adapter);
230
1a821ca5 231 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
232 return 0;
233}
234
235static void
236e1000_get_pauseparam(struct net_device *netdev,
237 struct ethtool_pauseparam *pause)
238{
60490fe0 239 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
240 struct e1000_hw *hw = &adapter->hw;
241
96838a40 242 pause->autoneg =
1da177e4 243 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
96838a40 244
11241b10 245 if (hw->fc == E1000_FC_RX_PAUSE)
1da177e4 246 pause->rx_pause = 1;
11241b10 247 else if (hw->fc == E1000_FC_TX_PAUSE)
1da177e4 248 pause->tx_pause = 1;
11241b10 249 else if (hw->fc == E1000_FC_FULL) {
1da177e4
LT
250 pause->rx_pause = 1;
251 pause->tx_pause = 1;
252 }
253}
254
255static int
256e1000_set_pauseparam(struct net_device *netdev,
257 struct ethtool_pauseparam *pause)
258{
60490fe0 259 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 260 struct e1000_hw *hw = &adapter->hw;
1a821ca5 261 int retval = 0;
96838a40 262
1da177e4
LT
263 adapter->fc_autoneg = pause->autoneg;
264
1a821ca5
JB
265 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
266 msleep(1);
267
96838a40 268 if (pause->rx_pause && pause->tx_pause)
11241b10 269 hw->fc = E1000_FC_FULL;
96838a40 270 else if (pause->rx_pause && !pause->tx_pause)
11241b10 271 hw->fc = E1000_FC_RX_PAUSE;
96838a40 272 else if (!pause->rx_pause && pause->tx_pause)
11241b10 273 hw->fc = E1000_FC_TX_PAUSE;
96838a40 274 else if (!pause->rx_pause && !pause->tx_pause)
11241b10 275 hw->fc = E1000_FC_NONE;
1da177e4
LT
276
277 hw->original_fc = hw->fc;
278
96838a40 279 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
1a821ca5
JB
280 if (netif_running(adapter->netdev)) {
281 e1000_down(adapter);
282 e1000_up(adapter);
283 } else
1da177e4 284 e1000_reset(adapter);
96838a40 285 } else
1a821ca5 286 retval = ((hw->media_type == e1000_media_type_fiber) ?
90fb5135 287 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
96838a40 288
1a821ca5
JB
289 clear_bit(__E1000_RESETTING, &adapter->flags);
290 return retval;
1da177e4
LT
291}
292
293static uint32_t
294e1000_get_rx_csum(struct net_device *netdev)
295{
60490fe0 296 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
297 return adapter->rx_csum;
298}
299
300static int
301e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
302{
60490fe0 303 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
304 adapter->rx_csum = data;
305
2db10a08
AK
306 if (netif_running(netdev))
307 e1000_reinit_locked(adapter);
308 else
1da177e4
LT
309 e1000_reset(adapter);
310 return 0;
311}
96838a40 312
1da177e4
LT
313static uint32_t
314e1000_get_tx_csum(struct net_device *netdev)
315{
316 return (netdev->features & NETIF_F_HW_CSUM) != 0;
317}
318
319static int
320e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
321{
60490fe0 322 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 323
96838a40 324 if (adapter->hw.mac_type < e1000_82543) {
1da177e4
LT
325 if (!data)
326 return -EINVAL;
327 return 0;
328 }
329
330 if (data)
331 netdev->features |= NETIF_F_HW_CSUM;
332 else
333 netdev->features &= ~NETIF_F_HW_CSUM;
334
335 return 0;
336}
337
338#ifdef NETIF_F_TSO
339static int
340e1000_set_tso(struct net_device *netdev, uint32_t data)
341{
60490fe0 342 struct e1000_adapter *adapter = netdev_priv(netdev);
96838a40
JB
343 if ((adapter->hw.mac_type < e1000_82544) ||
344 (adapter->hw.mac_type == e1000_82547))
1da177e4
LT
345 return data ? -EINVAL : 0;
346
347 if (data)
348 netdev->features |= NETIF_F_TSO;
349 else
350 netdev->features &= ~NETIF_F_TSO;
7e6c9861 351
87ca4e5b
AK
352#ifdef NETIF_F_TSO6
353 if (data)
354 netdev->features |= NETIF_F_TSO6;
355 else
356 netdev->features &= ~NETIF_F_TSO6;
357#endif
358
7e6c9861
JK
359 DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
360 adapter->tso_force = TRUE;
1da177e4 361 return 0;
96838a40 362}
1da177e4
LT
363#endif /* NETIF_F_TSO */
364
365static uint32_t
366e1000_get_msglevel(struct net_device *netdev)
367{
60490fe0 368 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
369 return adapter->msg_enable;
370}
371
372static void
373e1000_set_msglevel(struct net_device *netdev, uint32_t data)
374{
60490fe0 375 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
376 adapter->msg_enable = data;
377}
378
96838a40 379static int
1da177e4
LT
380e1000_get_regs_len(struct net_device *netdev)
381{
382#define E1000_REGS_LEN 32
383 return E1000_REGS_LEN * sizeof(uint32_t);
384}
385
386static void
387e1000_get_regs(struct net_device *netdev,
388 struct ethtool_regs *regs, void *p)
389{
60490fe0 390 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
391 struct e1000_hw *hw = &adapter->hw;
392 uint32_t *regs_buff = p;
393 uint16_t phy_data;
394
395 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
396
397 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
398
399 regs_buff[0] = E1000_READ_REG(hw, CTRL);
400 regs_buff[1] = E1000_READ_REG(hw, STATUS);
401
402 regs_buff[2] = E1000_READ_REG(hw, RCTL);
403 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
404 regs_buff[4] = E1000_READ_REG(hw, RDH);
405 regs_buff[5] = E1000_READ_REG(hw, RDT);
406 regs_buff[6] = E1000_READ_REG(hw, RDTR);
407
408 regs_buff[7] = E1000_READ_REG(hw, TCTL);
409 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
410 regs_buff[9] = E1000_READ_REG(hw, TDH);
411 regs_buff[10] = E1000_READ_REG(hw, TDT);
412 regs_buff[11] = E1000_READ_REG(hw, TIDV);
413
414 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
96838a40 415 if (hw->phy_type == e1000_phy_igp) {
1da177e4
LT
416 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
417 IGP01E1000_PHY_AGC_A);
418 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
419 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
420 regs_buff[13] = (uint32_t)phy_data; /* cable length */
421 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
422 IGP01E1000_PHY_AGC_B);
423 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
424 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
425 regs_buff[14] = (uint32_t)phy_data; /* cable length */
426 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
427 IGP01E1000_PHY_AGC_C);
428 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
429 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
430 regs_buff[15] = (uint32_t)phy_data; /* cable length */
431 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
432 IGP01E1000_PHY_AGC_D);
433 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
434 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
435 regs_buff[16] = (uint32_t)phy_data; /* cable length */
436 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
437 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
438 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
439 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
440 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
441 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
442 IGP01E1000_PHY_PCS_INIT_REG);
443 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
444 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
445 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
446 regs_buff[20] = 0; /* polarity correction enabled (always) */
447 regs_buff[22] = 0; /* phy receive errors (unavailable) */
448 regs_buff[23] = regs_buff[18]; /* mdix mode */
449 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
450 } else {
8fc897b0 451 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
1da177e4
LT
452 regs_buff[13] = (uint32_t)phy_data; /* cable length */
453 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
454 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
455 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
8fc897b0 456 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1da177e4
LT
457 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
458 regs_buff[18] = regs_buff[13]; /* cable polarity */
459 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
460 regs_buff[20] = regs_buff[17]; /* polarity correction */
461 /* phy receive errors */
462 regs_buff[22] = adapter->phy_stats.receive_errors;
463 regs_buff[23] = regs_buff[13]; /* mdix mode */
464 }
465 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
466 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
467 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
468 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
96838a40 469 if (hw->mac_type >= e1000_82540 &&
4ccc12ae
JB
470 hw->mac_type < e1000_82571 &&
471 hw->media_type == e1000_media_type_copper) {
1da177e4
LT
472 regs_buff[26] = E1000_READ_REG(hw, MANC);
473 }
474}
475
476static int
477e1000_get_eeprom_len(struct net_device *netdev)
478{
60490fe0 479 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
480 return adapter->hw.eeprom.word_size * 2;
481}
482
483static int
484e1000_get_eeprom(struct net_device *netdev,
485 struct ethtool_eeprom *eeprom, uint8_t *bytes)
486{
60490fe0 487 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
488 struct e1000_hw *hw = &adapter->hw;
489 uint16_t *eeprom_buff;
490 int first_word, last_word;
491 int ret_val = 0;
492 uint16_t i;
493
96838a40 494 if (eeprom->len == 0)
1da177e4
LT
495 return -EINVAL;
496
497 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
498
499 first_word = eeprom->offset >> 1;
500 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
501
502 eeprom_buff = kmalloc(sizeof(uint16_t) *
503 (last_word - first_word + 1), GFP_KERNEL);
96838a40 504 if (!eeprom_buff)
1da177e4
LT
505 return -ENOMEM;
506
96838a40 507 if (hw->eeprom.type == e1000_eeprom_spi)
1da177e4
LT
508 ret_val = e1000_read_eeprom(hw, first_word,
509 last_word - first_word + 1,
510 eeprom_buff);
511 else {
512 for (i = 0; i < last_word - first_word + 1; i++)
96838a40 513 if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
1da177e4
LT
514 &eeprom_buff[i])))
515 break;
516 }
517
518 /* Device's eeprom is always little-endian, word addressable */
519 for (i = 0; i < last_word - first_word + 1; i++)
520 le16_to_cpus(&eeprom_buff[i]);
521
522 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
523 eeprom->len);
524 kfree(eeprom_buff);
525
526 return ret_val;
527}
528
529static int
530e1000_set_eeprom(struct net_device *netdev,
531 struct ethtool_eeprom *eeprom, uint8_t *bytes)
532{
60490fe0 533 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
534 struct e1000_hw *hw = &adapter->hw;
535 uint16_t *eeprom_buff;
536 void *ptr;
537 int max_len, first_word, last_word, ret_val = 0;
538 uint16_t i;
539
96838a40 540 if (eeprom->len == 0)
1da177e4
LT
541 return -EOPNOTSUPP;
542
96838a40 543 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1da177e4
LT
544 return -EFAULT;
545
546 max_len = hw->eeprom.word_size * 2;
547
548 first_word = eeprom->offset >> 1;
549 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
550 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
96838a40 551 if (!eeprom_buff)
1da177e4
LT
552 return -ENOMEM;
553
554 ptr = (void *)eeprom_buff;
555
96838a40 556 if (eeprom->offset & 1) {
1da177e4
LT
557 /* need read/modify/write of first changed EEPROM word */
558 /* only the second byte of the word is being modified */
559 ret_val = e1000_read_eeprom(hw, first_word, 1,
560 &eeprom_buff[0]);
561 ptr++;
562 }
96838a40 563 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
1da177e4
LT
564 /* need read/modify/write of last changed EEPROM word */
565 /* only the first byte of the word is being modified */
566 ret_val = e1000_read_eeprom(hw, last_word, 1,
567 &eeprom_buff[last_word - first_word]);
568 }
569
570 /* Device's eeprom is always little-endian, word addressable */
571 for (i = 0; i < last_word - first_word + 1; i++)
572 le16_to_cpus(&eeprom_buff[i]);
573
574 memcpy(ptr, bytes, eeprom->len);
575
576 for (i = 0; i < last_word - first_word + 1; i++)
577 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
578
579 ret_val = e1000_write_eeprom(hw, first_word,
580 last_word - first_word + 1, eeprom_buff);
581
96838a40 582 /* Update the checksum over the first part of the EEPROM if needed
a7990ba6 583 * and flush shadow RAM for 82573 conrollers */
96838a40 584 if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
a7990ba6 585 (hw->mac_type == e1000_82573)))
1da177e4
LT
586 e1000_update_eeprom_checksum(hw);
587
588 kfree(eeprom_buff);
589 return ret_val;
590}
591
592static void
593e1000_get_drvinfo(struct net_device *netdev,
594 struct ethtool_drvinfo *drvinfo)
595{
60490fe0 596 struct e1000_adapter *adapter = netdev_priv(netdev);
a2917e22
JK
597 char firmware_version[32];
598 uint16_t eeprom_data;
1da177e4
LT
599
600 strncpy(drvinfo->driver, e1000_driver_name, 32);
601 strncpy(drvinfo->version, e1000_driver_version, 32);
a2917e22
JK
602
603 /* EEPROM image version # is reported as firmware version # for
604 * 8257{1|2|3} controllers */
605 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
606 switch (adapter->hw.mac_type) {
607 case e1000_82571:
608 case e1000_82572:
609 case e1000_82573:
6418ecc6 610 case e1000_80003es2lan:
cd94dd0b 611 case e1000_ich8lan:
a2917e22
JK
612 sprintf(firmware_version, "%d.%d-%d",
613 (eeprom_data & 0xF000) >> 12,
614 (eeprom_data & 0x0FF0) >> 4,
615 eeprom_data & 0x000F);
616 break;
617 default:
618 sprintf(firmware_version, "N/A");
619 }
620
621 strncpy(drvinfo->fw_version, firmware_version, 32);
1da177e4
LT
622 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
623 drvinfo->n_stats = E1000_STATS_LEN;
624 drvinfo->testinfo_len = E1000_TEST_LEN;
625 drvinfo->regdump_len = e1000_get_regs_len(netdev);
626 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
627}
628
629static void
630e1000_get_ringparam(struct net_device *netdev,
631 struct ethtool_ringparam *ring)
632{
60490fe0 633 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 634 e1000_mac_type mac_type = adapter->hw.mac_type;
581d708e
MC
635 struct e1000_tx_ring *txdr = adapter->tx_ring;
636 struct e1000_rx_ring *rxdr = adapter->rx_ring;
1da177e4
LT
637
638 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
639 E1000_MAX_82544_RXD;
640 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
641 E1000_MAX_82544_TXD;
642 ring->rx_mini_max_pending = 0;
643 ring->rx_jumbo_max_pending = 0;
644 ring->rx_pending = rxdr->count;
645 ring->tx_pending = txdr->count;
646 ring->rx_mini_pending = 0;
647 ring->rx_jumbo_pending = 0;
648}
649
96838a40 650static int
1da177e4
LT
651e1000_set_ringparam(struct net_device *netdev,
652 struct ethtool_ringparam *ring)
653{
60490fe0 654 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 655 e1000_mac_type mac_type = adapter->hw.mac_type;
793fab72
VA
656 struct e1000_tx_ring *txdr, *tx_old;
657 struct e1000_rx_ring *rxdr, *rx_old;
581d708e
MC
658 int i, err, tx_ring_size, rx_ring_size;
659
0989aa43
JK
660 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
661 return -EINVAL;
662
f56799ea
JK
663 tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
664 rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e 665
2db10a08
AK
666 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
667 msleep(1);
668
581d708e
MC
669 if (netif_running(adapter->netdev))
670 e1000_down(adapter);
1da177e4
LT
671
672 tx_old = adapter->tx_ring;
673 rx_old = adapter->rx_ring;
674
793fab72
VA
675 err = -ENOMEM;
676 txdr = kzalloc(tx_ring_size, GFP_KERNEL);
677 if (!txdr)
678 goto err_alloc_tx;
581d708e 679
793fab72
VA
680 rxdr = kzalloc(rx_ring_size, GFP_KERNEL);
681 if (!rxdr)
682 goto err_alloc_rx;
581d708e 683
793fab72
VA
684 adapter->tx_ring = txdr;
685 adapter->rx_ring = rxdr;
581d708e 686
1da177e4
LT
687 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
688 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
689 E1000_MAX_RXD : E1000_MAX_82544_RXD));
96838a40 690 E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
1da177e4
LT
691
692 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
693 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
694 E1000_MAX_TXD : E1000_MAX_82544_TXD));
96838a40 695 E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
1da177e4 696
f56799ea 697 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 698 txdr[i].count = txdr->count;
f56799ea 699 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 700 rxdr[i].count = rxdr->count;
581d708e 701
96838a40 702 if (netif_running(adapter->netdev)) {
1da177e4 703 /* Try to get new resources before deleting old */
581d708e 704 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4 705 goto err_setup_rx;
581d708e 706 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT
707 goto err_setup_tx;
708
709 /* save the new, restore the old in order to free it,
710 * then restore the new back again */
711
1da177e4
LT
712 adapter->rx_ring = rx_old;
713 adapter->tx_ring = tx_old;
581d708e
MC
714 e1000_free_all_rx_resources(adapter);
715 e1000_free_all_tx_resources(adapter);
716 kfree(tx_old);
717 kfree(rx_old);
793fab72
VA
718 adapter->rx_ring = rxdr;
719 adapter->tx_ring = txdr;
96838a40 720 if ((err = e1000_up(adapter)))
2db10a08 721 goto err_setup;
1da177e4
LT
722 }
723
2db10a08 724 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
725 return 0;
726err_setup_tx:
581d708e 727 e1000_free_all_rx_resources(adapter);
1da177e4
LT
728err_setup_rx:
729 adapter->rx_ring = rx_old;
730 adapter->tx_ring = tx_old;
793fab72
VA
731 kfree(rxdr);
732err_alloc_rx:
733 kfree(txdr);
734err_alloc_tx:
1da177e4 735 e1000_up(adapter);
2db10a08
AK
736err_setup:
737 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
738 return err;
739}
740
741#define REG_PATTERN_TEST(R, M, W) \
742{ \
743 uint32_t pat, value; \
744 uint32_t test[] = \
745 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
96838a40 746 for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
1da177e4
LT
747 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
748 value = E1000_READ_REG(&adapter->hw, R); \
96838a40 749 if (value != (test[pat] & W & M)) { \
b01f6691
MC
750 DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
751 "0x%08X expected 0x%08X\n", \
752 E1000_##R, value, (test[pat] & W & M)); \
1da177e4
LT
753 *data = (adapter->hw.mac_type < e1000_82543) ? \
754 E1000_82542_##R : E1000_##R; \
755 return 1; \
756 } \
757 } \
758}
759
760#define REG_SET_AND_CHECK(R, M, W) \
761{ \
762 uint32_t value; \
763 E1000_WRITE_REG(&adapter->hw, R, W & M); \
764 value = E1000_READ_REG(&adapter->hw, R); \
96838a40 765 if ((W & M) != (value & M)) { \
b01f6691
MC
766 DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
767 "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
1da177e4
LT
768 *data = (adapter->hw.mac_type < e1000_82543) ? \
769 E1000_82542_##R : E1000_##R; \
770 return 1; \
771 } \
772}
773
774static int
775e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
776{
b01f6691
MC
777 uint32_t value, before, after;
778 uint32_t i, toggle;
1da177e4
LT
779
780 /* The status register is Read Only, so a write should fail.
781 * Some bits that get toggled are ignored.
782 */
90fb5135 783 switch (adapter->hw.mac_type) {
868d5309
MC
784 /* there are several bits on newer hardware that are r/w */
785 case e1000_82571:
786 case e1000_82572:
6418ecc6 787 case e1000_80003es2lan:
868d5309
MC
788 toggle = 0x7FFFF3FF;
789 break;
b01f6691 790 case e1000_82573:
cd94dd0b 791 case e1000_ich8lan:
b01f6691
MC
792 toggle = 0x7FFFF033;
793 break;
794 default:
795 toggle = 0xFFFFF833;
796 break;
797 }
798
799 before = E1000_READ_REG(&adapter->hw, STATUS);
800 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
801 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
802 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
96838a40 803 if (value != after) {
b01f6691
MC
804 DPRINTK(DRV, ERR, "failed STATUS register test got: "
805 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT
806 *data = 1;
807 return 1;
808 }
b01f6691
MC
809 /* restore previous status */
810 E1000_WRITE_REG(&adapter->hw, STATUS, before);
90fb5135 811
cd94dd0b
AK
812 if (adapter->hw.mac_type != e1000_ich8lan) {
813 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
814 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
815 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
816 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
817 }
90fb5135 818
1da177e4
LT
819 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
820 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
821 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
822 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
823 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
824 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
825 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
826 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
827 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
828 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
829
830 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
90fb5135 831
cd94dd0b 832 before = (adapter->hw.mac_type == e1000_ich8lan ?
90fb5135 833 0x06C3B33E : 0x06DFB3FE);
cd94dd0b 834 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
1da177e4
LT
835 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
836
96838a40 837 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4 838
cd94dd0b 839 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
1da177e4 840 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
cd94dd0b
AK
841 if (adapter->hw.mac_type != e1000_ich8lan)
842 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
1da177e4
LT
843 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
844 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
cd94dd0b 845 value = (adapter->hw.mac_type == e1000_ich8lan ?
90fb5135 846 E1000_RAR_ENTRIES_ICH8LAN : E1000_RAR_ENTRIES);
cd94dd0b 847 for (i = 0; i < value; i++) {
1da177e4 848 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
90fb5135 849 0xFFFFFFFF);
1da177e4
LT
850 }
851
852 } else {
853
854 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
855 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
856 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
857 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
858
859 }
860
cd94dd0b
AK
861 value = (adapter->hw.mac_type == e1000_ich8lan ?
862 E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE);
863 for (i = 0; i < value; i++)
1da177e4
LT
864 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
865
866 *data = 0;
867 return 0;
868}
869
870static int
871e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
872{
873 uint16_t temp;
874 uint16_t checksum = 0;
875 uint16_t i;
876
877 *data = 0;
878 /* Read and add up the contents of the EEPROM */
96838a40
JB
879 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
880 if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
1da177e4
LT
881 *data = 1;
882 break;
883 }
884 checksum += temp;
885 }
886
887 /* If Checksum is not Correct return error else test passed */
96838a40 888 if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
1da177e4
LT
889 *data = 2;
890
891 return *data;
892}
893
894static irqreturn_t
90fb5135 895e1000_test_intr(int irq, void *data)
1da177e4
LT
896{
897 struct net_device *netdev = (struct net_device *) data;
60490fe0 898 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
899
900 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
901
902 return IRQ_HANDLED;
903}
904
905static int
906e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
907{
908 struct net_device *netdev = adapter->netdev;
76c224bc
AK
909 uint32_t mask, i=0, shared_int = TRUE;
910 uint32_t irq = adapter->pdev->irq;
1da177e4
LT
911
912 *data = 0;
913
8fc897b0 914 /* NOTE: we don't test MSI interrupts here, yet */
1da177e4 915 /* Hook up test interrupt handler just for this test */
90fb5135
AK
916 if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
917 netdev))
8fc897b0
AK
918 shared_int = FALSE;
919 else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
90fb5135 920 netdev->name, netdev)) {
1da177e4
LT
921 *data = 1;
922 return -1;
923 }
8fc897b0 924 DPRINTK(HW, INFO, "testing %s interrupt\n",
b9b6e78b 925 (shared_int ? "shared" : "unshared"));
1da177e4
LT
926
927 /* Disable all the interrupts */
928 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
f8ec4733 929 msleep(10);
1da177e4
LT
930
931 /* Test each interrupt */
96838a40 932 for (; i < 10; i++) {
1da177e4 933
cd94dd0b
AK
934 if (adapter->hw.mac_type == e1000_ich8lan && i == 8)
935 continue;
90fb5135 936
1da177e4
LT
937 /* Interrupt to test */
938 mask = 1 << i;
939
76c224bc
AK
940 if (!shared_int) {
941 /* Disable the interrupt to be reported in
942 * the cause register and then force the same
943 * interrupt and see if one gets posted. If
944 * an interrupt was posted to the bus, the
945 * test failed.
946 */
947 adapter->test_icr = 0;
948 E1000_WRITE_REG(&adapter->hw, IMC, mask);
949 E1000_WRITE_REG(&adapter->hw, ICS, mask);
f8ec4733 950 msleep(10);
76c224bc
AK
951
952 if (adapter->test_icr & mask) {
953 *data = 3;
954 break;
955 }
1da177e4
LT
956 }
957
958 /* Enable the interrupt to be reported in
959 * the cause register and then force the same
960 * interrupt and see if one gets posted. If
961 * an interrupt was not posted to the bus, the
962 * test failed.
963 */
964 adapter->test_icr = 0;
965 E1000_WRITE_REG(&adapter->hw, IMS, mask);
966 E1000_WRITE_REG(&adapter->hw, ICS, mask);
f8ec4733 967 msleep(10);
1da177e4 968
96838a40 969 if (!(adapter->test_icr & mask)) {
1da177e4
LT
970 *data = 4;
971 break;
972 }
973
76c224bc 974 if (!shared_int) {
1da177e4
LT
975 /* Disable the other interrupts to be reported in
976 * the cause register and then force the other
977 * interrupts and see if any get posted. If
978 * an interrupt was posted to the bus, the
979 * test failed.
980 */
981 adapter->test_icr = 0;
2648345f
MC
982 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
983 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
f8ec4733 984 msleep(10);
1da177e4 985
96838a40 986 if (adapter->test_icr) {
1da177e4
LT
987 *data = 5;
988 break;
989 }
990 }
991 }
992
993 /* Disable all the interrupts */
994 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
f8ec4733 995 msleep(10);
1da177e4
LT
996
997 /* Unhook test interrupt handler */
998 free_irq(irq, netdev);
999
1000 return *data;
1001}
1002
1003static void
1004e1000_free_desc_rings(struct e1000_adapter *adapter)
1005{
581d708e
MC
1006 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1007 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT
1008 struct pci_dev *pdev = adapter->pdev;
1009 int i;
1010
96838a40
JB
1011 if (txdr->desc && txdr->buffer_info) {
1012 for (i = 0; i < txdr->count; i++) {
1013 if (txdr->buffer_info[i].dma)
1da177e4
LT
1014 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
1015 txdr->buffer_info[i].length,
1016 PCI_DMA_TODEVICE);
96838a40 1017 if (txdr->buffer_info[i].skb)
1da177e4
LT
1018 dev_kfree_skb(txdr->buffer_info[i].skb);
1019 }
1020 }
1021
96838a40
JB
1022 if (rxdr->desc && rxdr->buffer_info) {
1023 for (i = 0; i < rxdr->count; i++) {
1024 if (rxdr->buffer_info[i].dma)
1da177e4
LT
1025 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
1026 rxdr->buffer_info[i].length,
1027 PCI_DMA_FROMDEVICE);
96838a40 1028 if (rxdr->buffer_info[i].skb)
1da177e4
LT
1029 dev_kfree_skb(rxdr->buffer_info[i].skb);
1030 }
1031 }
1032
f5645110 1033 if (txdr->desc) {
1da177e4 1034 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
6b27adb6
JL
1035 txdr->desc = NULL;
1036 }
f5645110 1037 if (rxdr->desc) {
1da177e4 1038 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
6b27adb6
JL
1039 rxdr->desc = NULL;
1040 }
1da177e4 1041
b4558ea9 1042 kfree(txdr->buffer_info);
6b27adb6 1043 txdr->buffer_info = NULL;
b4558ea9 1044 kfree(rxdr->buffer_info);
6b27adb6 1045 rxdr->buffer_info = NULL;
f5645110 1046
1da177e4
LT
1047 return;
1048}
1049
1050static int
1051e1000_setup_desc_rings(struct e1000_adapter *adapter)
1052{
581d708e
MC
1053 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1054 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT
1055 struct pci_dev *pdev = adapter->pdev;
1056 uint32_t rctl;
1057 int size, i, ret_val;
1058
1059 /* Setup Tx descriptor ring and Tx buffers */
1060
96838a40
JB
1061 if (!txdr->count)
1062 txdr->count = E1000_DEFAULT_TXD;
1da177e4
LT
1063
1064 size = txdr->count * sizeof(struct e1000_buffer);
96838a40 1065 if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1da177e4
LT
1066 ret_val = 1;
1067 goto err_nomem;
1068 }
1069 memset(txdr->buffer_info, 0, size);
1070
1071 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1072 E1000_ROUNDUP(txdr->size, 4096);
96838a40 1073 if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
1da177e4
LT
1074 ret_val = 2;
1075 goto err_nomem;
1076 }
1077 memset(txdr->desc, 0, txdr->size);
1078 txdr->next_to_use = txdr->next_to_clean = 0;
1079
1080 E1000_WRITE_REG(&adapter->hw, TDBAL,
1081 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
1082 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1083 E1000_WRITE_REG(&adapter->hw, TDLEN,
1084 txdr->count * sizeof(struct e1000_tx_desc));
1085 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1086 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1087 E1000_WRITE_REG(&adapter->hw, TCTL,
1088 E1000_TCTL_PSP | E1000_TCTL_EN |
1089 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1090 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1091
96838a40 1092 for (i = 0; i < txdr->count; i++) {
1da177e4
LT
1093 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1094 struct sk_buff *skb;
1095 unsigned int size = 1024;
1096
96838a40 1097 if (!(skb = alloc_skb(size, GFP_KERNEL))) {
1da177e4
LT
1098 ret_val = 3;
1099 goto err_nomem;
1100 }
1101 skb_put(skb, size);
1102 txdr->buffer_info[i].skb = skb;
1103 txdr->buffer_info[i].length = skb->len;
1104 txdr->buffer_info[i].dma =
1105 pci_map_single(pdev, skb->data, skb->len,
1106 PCI_DMA_TODEVICE);
1107 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1108 tx_desc->lower.data = cpu_to_le32(skb->len);
1109 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1110 E1000_TXD_CMD_IFCS |
1111 E1000_TXD_CMD_RPS);
1112 tx_desc->upper.data = 0;
1113 }
1114
1115 /* Setup Rx descriptor ring and Rx buffers */
1116
96838a40
JB
1117 if (!rxdr->count)
1118 rxdr->count = E1000_DEFAULT_RXD;
1da177e4
LT
1119
1120 size = rxdr->count * sizeof(struct e1000_buffer);
96838a40 1121 if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1da177e4
LT
1122 ret_val = 4;
1123 goto err_nomem;
1124 }
1125 memset(rxdr->buffer_info, 0, size);
1126
1127 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
96838a40 1128 if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1da177e4
LT
1129 ret_val = 5;
1130 goto err_nomem;
1131 }
1132 memset(rxdr->desc, 0, rxdr->size);
1133 rxdr->next_to_use = rxdr->next_to_clean = 0;
1134
1135 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1136 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1137 E1000_WRITE_REG(&adapter->hw, RDBAL,
1138 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1139 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1140 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1141 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1142 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1143 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1144 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1145 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1146 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1147
96838a40 1148 for (i = 0; i < rxdr->count; i++) {
1da177e4
LT
1149 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1150 struct sk_buff *skb;
1151
96838a40 1152 if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1da177e4
LT
1153 GFP_KERNEL))) {
1154 ret_val = 6;
1155 goto err_nomem;
1156 }
1157 skb_reserve(skb, NET_IP_ALIGN);
1158 rxdr->buffer_info[i].skb = skb;
1159 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1160 rxdr->buffer_info[i].dma =
1161 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1162 PCI_DMA_FROMDEVICE);
1163 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1164 memset(skb->data, 0x00, skb->len);
1165 }
1166
1167 return 0;
1168
1169err_nomem:
1170 e1000_free_desc_rings(adapter);
1171 return ret_val;
1172}
1173
1174static void
1175e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1176{
1177 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1178 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1179 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1180 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1181 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1182}
1183
1184static void
1185e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1186{
1187 uint16_t phy_reg;
1188
1189 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1190 * Extended PHY Specific Control Register to 25MHz clock. This
1191 * value defaults back to a 2.5MHz clock when the PHY is reset.
1192 */
1193 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1194 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1195 e1000_write_phy_reg(&adapter->hw,
1196 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1197
1198 /* In addition, because of the s/w reset above, we need to enable
1199 * CRS on TX. This must be set for both full and half duplex
1200 * operation.
1201 */
1202 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1203 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1204 e1000_write_phy_reg(&adapter->hw,
1205 M88E1000_PHY_SPEC_CTRL, phy_reg);
1206}
1207
1208static int
1209e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1210{
1211 uint32_t ctrl_reg;
1212 uint16_t phy_reg;
1213
1214 /* Setup the Device Control Register for PHY loopback test. */
1215
1216 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1217 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1218 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1219 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1220 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1221 E1000_CTRL_FD); /* Force Duplex to FULL */
1222
1223 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1224
1225 /* Read the PHY Specific Control Register (0x10) */
1226 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1227
1228 /* Clear Auto-Crossover bits in PHY Specific Control Register
1229 * (bits 6:5).
1230 */
1231 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1232 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1233
1234 /* Perform software reset on the PHY */
1235 e1000_phy_reset(&adapter->hw);
1236
1237 /* Have to setup TX_CLK and TX_CRS after software reset */
1238 e1000_phy_reset_clk_and_crs(adapter);
1239
1240 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1241
1242 /* Wait for reset to complete. */
1243 udelay(500);
1244
1245 /* Have to setup TX_CLK and TX_CRS after software reset */
1246 e1000_phy_reset_clk_and_crs(adapter);
1247
1248 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1249 e1000_phy_disable_receiver(adapter);
1250
1251 /* Set the loopback bit in the PHY control register. */
1252 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1253 phy_reg |= MII_CR_LOOPBACK;
1254 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1255
1256 /* Setup TX_CLK and TX_CRS one more time. */
1257 e1000_phy_reset_clk_and_crs(adapter);
1258
1259 /* Check Phy Configuration */
1260 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
96838a40 1261 if (phy_reg != 0x4100)
1da177e4
LT
1262 return 9;
1263
1264 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
96838a40 1265 if (phy_reg != 0x0070)
1da177e4
LT
1266 return 10;
1267
1268 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
96838a40 1269 if (phy_reg != 0x001A)
1da177e4
LT
1270 return 11;
1271
1272 return 0;
1273}
1274
1275static int
1276e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1277{
1278 uint32_t ctrl_reg = 0;
1279 uint32_t stat_reg = 0;
1280
1281 adapter->hw.autoneg = FALSE;
1282
96838a40 1283 if (adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT
1284 /* Auto-MDI/MDIX Off */
1285 e1000_write_phy_reg(&adapter->hw,
1286 M88E1000_PHY_SPEC_CTRL, 0x0808);
1287 /* reset to update Auto-MDI/MDIX */
1288 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1289 /* autoneg off */
1290 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
8fc897b0 1291 } else if (adapter->hw.phy_type == e1000_phy_gg82563)
87041639
JK
1292 e1000_write_phy_reg(&adapter->hw,
1293 GG82563_PHY_KMRN_MODE_CTRL,
acfbc9fd 1294 0x1CC);
1da177e4 1295
1da177e4 1296 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
cd94dd0b
AK
1297
1298 if (adapter->hw.phy_type == e1000_phy_ife) {
1299 /* force 100, set loopback */
1300 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x6100);
1301
1302 /* Now set up the MAC to the same speed/duplex as the PHY. */
1303 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1304 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1305 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1306 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1307 E1000_CTRL_FD); /* Force Duplex to FULL */
1308 } else {
1309 /* force 1000, set loopback */
1310 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1311
1312 /* Now set up the MAC to the same speed/duplex as the PHY. */
1313 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1314 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1315 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1316 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1317 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1318 E1000_CTRL_FD); /* Force Duplex to FULL */
1319 }
1da177e4 1320
96838a40 1321 if (adapter->hw.media_type == e1000_media_type_copper &&
8fc897b0 1322 adapter->hw.phy_type == e1000_phy_m88)
1da177e4 1323 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
8fc897b0 1324 else {
1da177e4
LT
1325 /* Set the ILOS bit on the fiber Nic is half
1326 * duplex link is detected. */
1327 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 1328 if ((stat_reg & E1000_STATUS_FD) == 0)
1da177e4
LT
1329 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1330 }
1331
1332 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1333
1334 /* Disable the receiver on the PHY so when a cable is plugged in, the
1335 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1336 */
96838a40 1337 if (adapter->hw.phy_type == e1000_phy_m88)
1da177e4
LT
1338 e1000_phy_disable_receiver(adapter);
1339
1340 udelay(500);
1341
1342 return 0;
1343}
1344
1345static int
1346e1000_set_phy_loopback(struct e1000_adapter *adapter)
1347{
1348 uint16_t phy_reg = 0;
1349 uint16_t count = 0;
1350
1351 switch (adapter->hw.mac_type) {
1352 case e1000_82543:
96838a40 1353 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT
1354 /* Attempt to setup Loopback mode on Non-integrated PHY.
1355 * Some PHY registers get corrupted at random, so
1356 * attempt this 10 times.
1357 */
96838a40 1358 while (e1000_nonintegrated_phy_loopback(adapter) &&
1da177e4 1359 count++ < 10);
96838a40 1360 if (count < 11)
1da177e4
LT
1361 return 0;
1362 }
1363 break;
1364
1365 case e1000_82544:
1366 case e1000_82540:
1367 case e1000_82545:
1368 case e1000_82545_rev_3:
1369 case e1000_82546:
1370 case e1000_82546_rev_3:
1371 case e1000_82541:
1372 case e1000_82541_rev_2:
1373 case e1000_82547:
1374 case e1000_82547_rev_2:
868d5309
MC
1375 case e1000_82571:
1376 case e1000_82572:
4564327b 1377 case e1000_82573:
6418ecc6 1378 case e1000_80003es2lan:
cd94dd0b 1379 case e1000_ich8lan:
1da177e4
LT
1380 return e1000_integrated_phy_loopback(adapter);
1381 break;
1382
1383 default:
1384 /* Default PHY loopback work is to read the MII
1385 * control register and assert bit 14 (loopback mode).
1386 */
1387 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1388 phy_reg |= MII_CR_LOOPBACK;
1389 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1390 return 0;
1391 break;
1392 }
1393
1394 return 8;
1395}
1396
1397static int
1398e1000_setup_loopback_test(struct e1000_adapter *adapter)
1399{
49273163 1400 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
1401 uint32_t rctl;
1402
49273163
JK
1403 if (hw->media_type == e1000_media_type_fiber ||
1404 hw->media_type == e1000_media_type_internal_serdes) {
1405 switch (hw->mac_type) {
1406 case e1000_82545:
1407 case e1000_82546:
1408 case e1000_82545_rev_3:
1409 case e1000_82546_rev_3:
1da177e4 1410 return e1000_set_phy_loopback(adapter);
49273163
JK
1411 break;
1412 case e1000_82571:
1413 case e1000_82572:
1414#define E1000_SERDES_LB_ON 0x410
1415 e1000_set_phy_loopback(adapter);
1416 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
f8ec4733 1417 msleep(10);
49273163
JK
1418 return 0;
1419 break;
1420 default:
1421 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1422 rctl |= E1000_RCTL_LBM_TCVR;
49273163 1423 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT
1424 return 0;
1425 }
49273163 1426 } else if (hw->media_type == e1000_media_type_copper)
1da177e4
LT
1427 return e1000_set_phy_loopback(adapter);
1428
1429 return 7;
1430}
1431
1432static void
1433e1000_loopback_cleanup(struct e1000_adapter *adapter)
1434{
49273163 1435 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
1436 uint32_t rctl;
1437 uint16_t phy_reg;
1438
49273163 1439 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1440 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
49273163 1441 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4 1442
49273163
JK
1443 switch (hw->mac_type) {
1444 case e1000_82571:
1445 case e1000_82572:
1446 if (hw->media_type == e1000_media_type_fiber ||
1447 hw->media_type == e1000_media_type_internal_serdes) {
1448#define E1000_SERDES_LB_OFF 0x400
1449 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
f8ec4733 1450 msleep(10);
49273163
JK
1451 break;
1452 }
1453 /* Fall Through */
1454 case e1000_82545:
1455 case e1000_82546:
1456 case e1000_82545_rev_3:
1457 case e1000_82546_rev_3:
1458 default:
1459 hw->autoneg = TRUE;
8fc897b0 1460 if (hw->phy_type == e1000_phy_gg82563)
87041639
JK
1461 e1000_write_phy_reg(hw,
1462 GG82563_PHY_KMRN_MODE_CTRL,
1463 0x180);
49273163
JK
1464 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1465 if (phy_reg & MII_CR_LOOPBACK) {
1da177e4 1466 phy_reg &= ~MII_CR_LOOPBACK;
49273163
JK
1467 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1468 e1000_phy_reset(hw);
1da177e4 1469 }
49273163 1470 break;
1da177e4
LT
1471 }
1472}
1473
1474static void
1475e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1476{
1477 memset(skb->data, 0xFF, frame_size);
ce7393b9 1478 frame_size &= ~1;
1da177e4
LT
1479 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1480 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1481 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1482}
1483
1484static int
1485e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1486{
ce7393b9 1487 frame_size &= ~1;
96838a40
JB
1488 if (*(skb->data + 3) == 0xFF) {
1489 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1da177e4
LT
1490 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1491 return 0;
1492 }
1493 }
1494 return 13;
1495}
1496
1497static int
1498e1000_run_loopback_test(struct e1000_adapter *adapter)
1499{
581d708e
MC
1500 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1501 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1502 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC
1503 int i, j, k, l, lc, good_cnt, ret_val=0;
1504 unsigned long time;
1da177e4
LT
1505
1506 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1507
96838a40 1508 /* Calculate the loop count based on the largest descriptor ring
e4eff729
MC
1509 * The idea is to wrap the largest ring a number of times using 64
1510 * send/receive pairs during each loop
1511 */
1da177e4 1512
96838a40 1513 if (rxdr->count <= txdr->count)
e4eff729
MC
1514 lc = ((txdr->count / 64) * 2) + 1;
1515 else
1516 lc = ((rxdr->count / 64) * 2) + 1;
1517
1518 k = l = 0;
96838a40
JB
1519 for (j = 0; j <= lc; j++) { /* loop count loop */
1520 for (i = 0; i < 64; i++) { /* send the packets */
1521 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
e4eff729 1522 1024);
96838a40 1523 pci_dma_sync_single_for_device(pdev,
e4eff729
MC
1524 txdr->buffer_info[k].dma,
1525 txdr->buffer_info[k].length,
1526 PCI_DMA_TODEVICE);
96838a40 1527 if (unlikely(++k == txdr->count)) k = 0;
e4eff729
MC
1528 }
1529 E1000_WRITE_REG(&adapter->hw, TDT, k);
f8ec4733 1530 msleep(200);
e4eff729
MC
1531 time = jiffies; /* set the start time for the receive */
1532 good_cnt = 0;
1533 do { /* receive the sent packets */
96838a40 1534 pci_dma_sync_single_for_cpu(pdev,
e4eff729
MC
1535 rxdr->buffer_info[l].dma,
1536 rxdr->buffer_info[l].length,
1537 PCI_DMA_FROMDEVICE);
96838a40 1538
e4eff729
MC
1539 ret_val = e1000_check_lbtest_frame(
1540 rxdr->buffer_info[l].skb,
1541 1024);
96838a40 1542 if (!ret_val)
e4eff729 1543 good_cnt++;
96838a40
JB
1544 if (unlikely(++l == rxdr->count)) l = 0;
1545 /* time + 20 msecs (200 msecs on 2.4) is more than
1546 * enough time to complete the receives, if it's
e4eff729
MC
1547 * exceeded, break and error off
1548 */
1549 } while (good_cnt < 64 && jiffies < (time + 20));
96838a40 1550 if (good_cnt != 64) {
e4eff729 1551 ret_val = 13; /* ret_val is the same as mis-compare */
96838a40 1552 break;
e4eff729 1553 }
96838a40 1554 if (jiffies >= (time + 2)) {
e4eff729
MC
1555 ret_val = 14; /* error code for time out error */
1556 break;
1557 }
1558 } /* end loop count loop */
1da177e4
LT
1559 return ret_val;
1560}
1561
1562static int
1563e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1564{
57128197
JK
1565 /* PHY loopback cannot be performed if SoL/IDER
1566 * sessions are active */
1567 if (e1000_check_phy_reset_block(&adapter->hw)) {
1568 DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
1569 "when SoL/IDER is active.\n");
1570 *data = 0;
1571 goto out;
1572 }
1573
1574 if ((*data = e1000_setup_desc_rings(adapter)))
1575 goto out;
1576 if ((*data = e1000_setup_loopback_test(adapter)))
1577 goto err_loopback;
1da177e4
LT
1578 *data = e1000_run_loopback_test(adapter);
1579 e1000_loopback_cleanup(adapter);
57128197 1580
1da177e4 1581err_loopback:
57128197
JK
1582 e1000_free_desc_rings(adapter);
1583out:
1da177e4
LT
1584 return *data;
1585}
1586
1587static int
1588e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1589{
1590 *data = 0;
1da177e4
LT
1591 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1592 int i = 0;
1593 adapter->hw.serdes_link_down = TRUE;
1594
2648345f
MC
1595 /* On some blade server designs, link establishment
1596 * could take as long as 2-3 minutes */
1da177e4
LT
1597 do {
1598 e1000_check_for_link(&adapter->hw);
1599 if (adapter->hw.serdes_link_down == FALSE)
1600 return *data;
f8ec4733 1601 msleep(20);
1da177e4
LT
1602 } while (i++ < 3750);
1603
2648345f 1604 *data = 1;
1da177e4
LT
1605 } else {
1606 e1000_check_for_link(&adapter->hw);
96838a40 1607 if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
f8ec4733 1608 msleep(4000);
1da177e4 1609
96838a40 1610 if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1da177e4
LT
1611 *data = 1;
1612 }
1613 }
1614 return *data;
1615}
1616
96838a40 1617static int
1da177e4
LT
1618e1000_diag_test_count(struct net_device *netdev)
1619{
1620 return E1000_TEST_LEN;
1621}
1622
d658266e
JB
1623extern void e1000_power_up_phy(struct e1000_adapter *);
1624
1da177e4
LT
1625static void
1626e1000_diag_test(struct net_device *netdev,
1627 struct ethtool_test *eth_test, uint64_t *data)
1628{
60490fe0 1629 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1630 boolean_t if_running = netif_running(netdev);
1631
1314bbf3 1632 set_bit(__E1000_TESTING, &adapter->flags);
96838a40 1633 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1da177e4
LT
1634 /* Offline tests */
1635
1636 /* save speed, duplex, autoneg settings */
1637 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1638 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1639 uint8_t autoneg = adapter->hw.autoneg;
1640
d658266e
JB
1641 DPRINTK(HW, INFO, "offline testing starting\n");
1642
1da177e4
LT
1643 /* Link test performed before hardware reset so autoneg doesn't
1644 * interfere with test result */
96838a40 1645 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1646 eth_test->flags |= ETH_TEST_FL_FAILED;
1647
96838a40 1648 if (if_running)
2db10a08
AK
1649 /* indicate we're in test mode */
1650 dev_close(netdev);
1da177e4
LT
1651 else
1652 e1000_reset(adapter);
1653
96838a40 1654 if (e1000_reg_test(adapter, &data[0]))
1da177e4
LT
1655 eth_test->flags |= ETH_TEST_FL_FAILED;
1656
1657 e1000_reset(adapter);
96838a40 1658 if (e1000_eeprom_test(adapter, &data[1]))
1da177e4
LT
1659 eth_test->flags |= ETH_TEST_FL_FAILED;
1660
1661 e1000_reset(adapter);
96838a40 1662 if (e1000_intr_test(adapter, &data[2]))
1da177e4
LT
1663 eth_test->flags |= ETH_TEST_FL_FAILED;
1664
1665 e1000_reset(adapter);
d658266e
JB
1666 /* make sure the phy is powered up */
1667 e1000_power_up_phy(adapter);
96838a40 1668 if (e1000_loopback_test(adapter, &data[3]))
1da177e4
LT
1669 eth_test->flags |= ETH_TEST_FL_FAILED;
1670
1671 /* restore speed, duplex, autoneg settings */
1672 adapter->hw.autoneg_advertised = autoneg_advertised;
1673 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1674 adapter->hw.autoneg = autoneg;
1675
1676 e1000_reset(adapter);
1314bbf3 1677 clear_bit(__E1000_TESTING, &adapter->flags);
96838a40 1678 if (if_running)
2db10a08 1679 dev_open(netdev);
1da177e4 1680 } else {
d658266e 1681 DPRINTK(HW, INFO, "online testing starting\n");
1da177e4 1682 /* Online tests */
96838a40 1683 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1684 eth_test->flags |= ETH_TEST_FL_FAILED;
1685
90fb5135 1686 /* Online tests aren't run; pass by default */
1da177e4
LT
1687 data[0] = 0;
1688 data[1] = 0;
1689 data[2] = 0;
1690 data[3] = 0;
2db10a08 1691
1314bbf3 1692 clear_bit(__E1000_TESTING, &adapter->flags);
1da177e4 1693 }
352c9f85 1694 msleep_interruptible(4 * 1000);
1da177e4
LT
1695}
1696
120cd576 1697static int e1000_wol_exclusion(struct e1000_adapter *adapter, struct ethtool_wolinfo *wol)
1da177e4 1698{
1da177e4 1699 struct e1000_hw *hw = &adapter->hw;
120cd576 1700 int retval = 1; /* fail by default */
1da177e4 1701
120cd576 1702 switch (hw->device_id) {
dc1f71f6 1703 case E1000_DEV_ID_82542:
1da177e4
LT
1704 case E1000_DEV_ID_82543GC_FIBER:
1705 case E1000_DEV_ID_82543GC_COPPER:
1706 case E1000_DEV_ID_82544EI_FIBER:
1707 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1708 case E1000_DEV_ID_82545EM_FIBER:
1709 case E1000_DEV_ID_82545EM_COPPER:
84916829 1710 case E1000_DEV_ID_82546GB_QUAD_COPPER:
120cd576
JB
1711 case E1000_DEV_ID_82546GB_PCIE:
1712 /* these don't support WoL at all */
1da177e4 1713 wol->supported = 0;
120cd576 1714 break;
1da177e4
LT
1715 case E1000_DEV_ID_82546EB_FIBER:
1716 case E1000_DEV_ID_82546GB_FIBER:
b7ee49db 1717 case E1000_DEV_ID_82571EB_FIBER:
120cd576
JB
1718 case E1000_DEV_ID_82571EB_SERDES:
1719 case E1000_DEV_ID_82571EB_COPPER:
1720 /* Wake events not supported on port B */
96838a40 1721 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1da177e4 1722 wol->supported = 0;
120cd576 1723 break;
1da177e4 1724 }
120cd576
JB
1725 /* return success for non excluded adapter ports */
1726 retval = 0;
1727 break;
5881cde8 1728 case E1000_DEV_ID_82571EB_QUAD_COPPER:
fc2307d0 1729 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
120cd576
JB
1730 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1731 /* quad port adapters only support WoL on port A */
1732 if (!adapter->quad_port_a) {
1733 wol->supported = 0;
1734 break;
1735 }
1736 /* return success for non excluded adapter ports */
1737 retval = 0;
1738 break;
1da177e4 1739 default:
120cd576
JB
1740 /* dual port cards only support WoL on port A from now on
1741 * unless it was enabled in the eeprom for port B
1742 * so exclude FUNC_1 ports from having WoL enabled */
1743 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1 &&
1744 !adapter->eeprom_wol) {
1745 wol->supported = 0;
1746 break;
1747 }
84916829 1748
120cd576
JB
1749 retval = 0;
1750 }
1751
1752 return retval;
1753}
1754
1755static void
1756e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1757{
1758 struct e1000_adapter *adapter = netdev_priv(netdev);
1759
1760 wol->supported = WAKE_UCAST | WAKE_MCAST |
1761 WAKE_BCAST | WAKE_MAGIC;
1762 wol->wolopts = 0;
1763
1764 /* this function will set ->supported = 0 and return 1 if wol is not
1765 * supported by this hardware */
1766 if (e1000_wol_exclusion(adapter, wol))
1da177e4 1767 return;
120cd576
JB
1768
1769 /* apply any specific unsupported masks here */
1770 switch (adapter->hw.device_id) {
1771 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1772 /* KSP3 does not suppport UCAST wake-ups */
1773 wol->supported &= ~WAKE_UCAST;
1774
1775 if (adapter->wol & E1000_WUFC_EX)
1776 DPRINTK(DRV, ERR, "Interface does not support "
1777 "directed (unicast) frame wake-up packets\n");
1778 break;
1779 default:
1780 break;
1da177e4 1781 }
120cd576
JB
1782
1783 if (adapter->wol & E1000_WUFC_EX)
1784 wol->wolopts |= WAKE_UCAST;
1785 if (adapter->wol & E1000_WUFC_MC)
1786 wol->wolopts |= WAKE_MCAST;
1787 if (adapter->wol & E1000_WUFC_BC)
1788 wol->wolopts |= WAKE_BCAST;
1789 if (adapter->wol & E1000_WUFC_MAG)
1790 wol->wolopts |= WAKE_MAGIC;
1791
1792 return;
1da177e4
LT
1793}
1794
1795static int
1796e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1797{
60490fe0 1798 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1799 struct e1000_hw *hw = &adapter->hw;
1800
120cd576
JB
1801 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1802 return -EOPNOTSUPP;
1803
1804 if (e1000_wol_exclusion(adapter, wol))
1da177e4
LT
1805 return wol->wolopts ? -EOPNOTSUPP : 0;
1806
120cd576 1807 switch (hw->device_id) {
84916829 1808 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
84916829
JK
1809 if (wol->wolopts & WAKE_UCAST) {
1810 DPRINTK(DRV, ERR, "Interface does not support "
1811 "directed (unicast) frame wake-up packets\n");
1812 return -EOPNOTSUPP;
1813 }
120cd576 1814 break;
1da177e4 1815 default:
120cd576 1816 break;
1da177e4
LT
1817 }
1818
120cd576
JB
1819 /* these settings will always override what we currently have */
1820 adapter->wol = 0;
1821
1822 if (wol->wolopts & WAKE_UCAST)
1823 adapter->wol |= E1000_WUFC_EX;
1824 if (wol->wolopts & WAKE_MCAST)
1825 adapter->wol |= E1000_WUFC_MC;
1826 if (wol->wolopts & WAKE_BCAST)
1827 adapter->wol |= E1000_WUFC_BC;
1828 if (wol->wolopts & WAKE_MAGIC)
1829 adapter->wol |= E1000_WUFC_MAG;
1830
1da177e4
LT
1831 return 0;
1832}
1833
1834/* toggle LED 4 times per second = 2 "blinks" per second */
1835#define E1000_ID_INTERVAL (HZ/4)
1836
1837/* bit defines for adapter->led_status */
1838#define E1000_LED_ON 0
1839
1840static void
1841e1000_led_blink_callback(unsigned long data)
1842{
1843 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1844
96838a40 1845 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1da177e4
LT
1846 e1000_led_off(&adapter->hw);
1847 else
1848 e1000_led_on(&adapter->hw);
1849
1850 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1851}
1852
1853static int
1854e1000_phys_id(struct net_device *netdev, uint32_t data)
1855{
60490fe0 1856 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1857
96838a40 1858 if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
1da177e4
LT
1859 data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
1860
96838a40
JB
1861 if (adapter->hw.mac_type < e1000_82571) {
1862 if (!adapter->blink_timer.function) {
d439d4b7
MC
1863 init_timer(&adapter->blink_timer);
1864 adapter->blink_timer.function = e1000_led_blink_callback;
1865 adapter->blink_timer.data = (unsigned long) adapter;
1866 }
1867 e1000_setup_led(&adapter->hw);
1868 mod_timer(&adapter->blink_timer, jiffies);
1869 msleep_interruptible(data * 1000);
1870 del_timer_sync(&adapter->blink_timer);
cd94dd0b
AK
1871 } else if (adapter->hw.phy_type == e1000_phy_ife) {
1872 if (!adapter->blink_timer.function) {
1873 init_timer(&adapter->blink_timer);
1874 adapter->blink_timer.function = e1000_led_blink_callback;
1875 adapter->blink_timer.data = (unsigned long) adapter;
1876 }
1877 mod_timer(&adapter->blink_timer, jiffies);
d8c2bd3d 1878 msleep_interruptible(data * 1000);
cd94dd0b
AK
1879 del_timer_sync(&adapter->blink_timer);
1880 e1000_write_phy_reg(&(adapter->hw), IFE_PHY_SPECIAL_CONTROL_LED, 0);
d8c2bd3d 1881 } else {
f1b3a853 1882 e1000_blink_led_start(&adapter->hw);
d439d4b7 1883 msleep_interruptible(data * 1000);
1da177e4
LT
1884 }
1885
1da177e4
LT
1886 e1000_led_off(&adapter->hw);
1887 clear_bit(E1000_LED_ON, &adapter->led_status);
1888 e1000_cleanup_led(&adapter->hw);
1889
1890 return 0;
1891}
1892
1893static int
1894e1000_nway_reset(struct net_device *netdev)
1895{
60490fe0 1896 struct e1000_adapter *adapter = netdev_priv(netdev);
2db10a08
AK
1897 if (netif_running(netdev))
1898 e1000_reinit_locked(adapter);
1da177e4
LT
1899 return 0;
1900}
1901
96838a40 1902static int
1da177e4
LT
1903e1000_get_stats_count(struct net_device *netdev)
1904{
1905 return E1000_STATS_LEN;
1906}
1907
96838a40
JB
1908static void
1909e1000_get_ethtool_stats(struct net_device *netdev,
1da177e4
LT
1910 struct ethtool_stats *stats, uint64_t *data)
1911{
60490fe0 1912 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1913 int i;
1914
1915 e1000_update_stats(adapter);
7bfa4816
JK
1916 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1917 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1918 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1da177e4
LT
1919 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1920 }
7bfa4816 1921/* BUG_ON(i != E1000_STATS_LEN); */
1da177e4
LT
1922}
1923
96838a40 1924static void
1da177e4
LT
1925e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1926{
7bfa4816 1927 uint8_t *p = data;
1da177e4
LT
1928 int i;
1929
96838a40 1930 switch (stringset) {
1da177e4 1931 case ETH_SS_TEST:
96838a40 1932 memcpy(data, *e1000_gstrings_test,
1da177e4
LT
1933 E1000_TEST_LEN*ETH_GSTRING_LEN);
1934 break;
1935 case ETH_SS_STATS:
7bfa4816
JK
1936 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1937 memcpy(p, e1000_gstrings_stats[i].stat_string,
1938 ETH_GSTRING_LEN);
1939 p += ETH_GSTRING_LEN;
1940 }
7bfa4816 1941/* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1da177e4
LT
1942 break;
1943 }
1944}
1945
7282d491 1946static const struct ethtool_ops e1000_ethtool_ops = {
1da177e4
LT
1947 .get_settings = e1000_get_settings,
1948 .set_settings = e1000_set_settings,
1949 .get_drvinfo = e1000_get_drvinfo,
1950 .get_regs_len = e1000_get_regs_len,
1951 .get_regs = e1000_get_regs,
1952 .get_wol = e1000_get_wol,
1953 .set_wol = e1000_set_wol,
8fc897b0
AK
1954 .get_msglevel = e1000_get_msglevel,
1955 .set_msglevel = e1000_set_msglevel,
1da177e4
LT
1956 .nway_reset = e1000_nway_reset,
1957 .get_link = ethtool_op_get_link,
1958 .get_eeprom_len = e1000_get_eeprom_len,
1959 .get_eeprom = e1000_get_eeprom,
1960 .set_eeprom = e1000_set_eeprom,
1961 .get_ringparam = e1000_get_ringparam,
1962 .set_ringparam = e1000_set_ringparam,
8fc897b0
AK
1963 .get_pauseparam = e1000_get_pauseparam,
1964 .set_pauseparam = e1000_set_pauseparam,
1965 .get_rx_csum = e1000_get_rx_csum,
1966 .set_rx_csum = e1000_set_rx_csum,
1967 .get_tx_csum = e1000_get_tx_csum,
1968 .set_tx_csum = e1000_set_tx_csum,
1969 .get_sg = ethtool_op_get_sg,
1970 .set_sg = ethtool_op_set_sg,
1da177e4 1971#ifdef NETIF_F_TSO
8fc897b0
AK
1972 .get_tso = ethtool_op_get_tso,
1973 .set_tso = e1000_set_tso,
1da177e4
LT
1974#endif
1975 .self_test_count = e1000_diag_test_count,
1976 .self_test = e1000_diag_test,
1977 .get_strings = e1000_get_strings,
1978 .phys_id = e1000_phys_id,
1979 .get_stats_count = e1000_get_stats_count,
1980 .get_ethtool_stats = e1000_get_ethtool_stats,
8fc897b0 1981 .get_perm_addr = ethtool_op_get_perm_addr,
1da177e4
LT
1982};
1983
1984void e1000_set_ethtool_ops(struct net_device *netdev)
1985{
1986 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1987}